arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 500;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 139 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 140 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 141
 142 static bool __read_mostly vector_hashing = true;
 143 module_param(vector_hashing, bool, S_IRUGO);
 144
 145 bool __read_mostly enable_vmware_backdoor = false;
 146 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 147 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 148
 149 #define KVM_NR_SHARED_MSRS 16
 150
 151 struct kvm_shared_msrs_global {
 152         int nr;
 153         u32 msrs[KVM_NR_SHARED_MSRS];
 154 };
 155
 156 struct kvm_shared_msrs {
 157         struct user_return_notifier urn;
 158         bool registered;
 159         struct kvm_shared_msr_values {
 160                 u64 host;
 161                 u64 curr;
 162         } values[KVM_NR_SHARED_MSRS];
 163 };
 164
 165 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 166 static struct kvm_shared_msrs __percpu *shared_msrs;
 167
 168 struct kvm_stats_debugfs_item debugfs_entries[] = {
 169         { "pf_fixed", VCPU_STAT(pf_fixed) },
 170         { "pf_guest", VCPU_STAT(pf_guest) },
 171         { "tlb_flush", VCPU_STAT(tlb_flush) },
 172         { "invlpg", VCPU_STAT(invlpg) },
 173         { "exits", VCPU_STAT(exits) },
 174         { "io_exits", VCPU_STAT(io_exits) },
 175         { "mmio_exits", VCPU_STAT(mmio_exits) },
 176         { "signal_exits", VCPU_STAT(signal_exits) },
 177         { "irq_window", VCPU_STAT(irq_window_exits) },
 178         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 179         { "halt_exits", VCPU_STAT(halt_exits) },
 180         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 181         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 182         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 183         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 184         { "hypercalls", VCPU_STAT(hypercalls) },
 185         { "request_irq", VCPU_STAT(request_irq_exits) },
 186         { "irq_exits", VCPU_STAT(irq_exits) },
 187         { "host_state_reload", VCPU_STAT(host_state_reload) },
 188         { "fpu_reload", VCPU_STAT(fpu_reload) },
 189         { "insn_emulation", VCPU_STAT(insn_emulation) },
 190         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 191         { "irq_injections", VCPU_STAT(irq_injections) },
 192         { "nmi_injections", VCPU_STAT(nmi_injections) },
 193         { "req_event", VCPU_STAT(req_event) },
 194         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 195         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 196         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 197         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 198         { "mmu_flooded", VM_STAT(mmu_flooded) },
 199         { "mmu_recycled", VM_STAT(mmu_recycled) },
 200         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 201         { "mmu_unsync", VM_STAT(mmu_unsync) },
 202         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 203         { "largepages", VM_STAT(lpages) },
 204         { "max_mmu_page_hash_collisions",
 205                 VM_STAT(max_mmu_page_hash_collisions) },
 206         { NULL }
 207 };
 208
 209 u64 __read_mostly host_xcr0;
 210
 211 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 212
 213 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 214 {
 215         int i;
 216         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 217                 vcpu->arch.apf.gfns[i] = ~0;
 218 }
 219
 220 static void kvm_on_user_return(struct user_return_notifier *urn)
 221 {
 222         unsigned slot;
 223         struct kvm_shared_msrs *locals
 224                 = container_of(urn, struct kvm_shared_msrs, urn);
 225         struct kvm_shared_msr_values *values;
 226         unsigned long flags;
 227
 228         /*
 229          * Disabling irqs at this point since the following code could be
 230          * interrupted and executed through kvm_arch_hardware_disable()
 231          */
 232         local_irq_save(flags);
 233         if (locals->registered) {
 234                 locals->registered = false;
 235                 user_return_notifier_unregister(urn);
 236         }
 237         local_irq_restore(flags);
 238         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 239                 values = &locals->values[slot];
 240                 if (values->host != values->curr) {
 241                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 242                         values->curr = values->host;
 243                 }
 244         }
 245 }
 246
 247 static void shared_msr_update(unsigned slot, u32 msr)
 248 {
 249         u64 value;
 250         unsigned int cpu = smp_processor_id();
 251         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 252
 253         /* only read, and nobody should modify it at this time,
 254          * so don't need lock */
 255         if (slot >= shared_msrs_global.nr) {
 256                 printk(KERN_ERR "kvm: invalid MSR slot!");
 257                 return;
 258         }
 259         rdmsrl_safe(msr, &value);
 260         smsr->values[slot].host = value;
 261         smsr->values[slot].curr = value;
 262 }
 263
 264 void kvm_define_shared_msr(unsigned slot, u32 msr)
 265 {
 266         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 267         shared_msrs_global.msrs[slot] = msr;
 268         if (slot >= shared_msrs_global.nr)
 269                 shared_msrs_global.nr = slot + 1;
 270 }
 271 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 272
 273 static void kvm_shared_msr_cpu_online(void)
 274 {
 275         unsigned i;
 276
 277         for (i = 0; i < shared_msrs_global.nr; ++i)
 278                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 279 }
 280
 281 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 282 {
 283         unsigned int cpu = smp_processor_id();
 284         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 285         int err;
 286
 287         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 288                 return 0;
 289         smsr->values[slot].curr = value;
 290         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 291         if (err)
 292                 return 1;
 293
 294         if (!smsr->registered) {
 295                 smsr->urn.on_user_return = kvm_on_user_return;
 296                 user_return_notifier_register(&smsr->urn);
 297                 smsr->registered = true;
 298         }
 299         return 0;
 300 }
 301 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 302
 303 static void drop_user_return_notifiers(void)
 304 {
 305         unsigned int cpu = smp_processor_id();
 306         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 307
 308         if (smsr->registered)
 309                 kvm_on_user_return(&smsr->urn);
 310 }
 311
 312 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 313 {
 314         return vcpu->arch.apic_base;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 317
 318 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 319 {
 320         u64 old_state = vcpu->arch.apic_base &
 321                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 322         u64 new_state = msr_info->data &
 323                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 324         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 325                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 326
 327         if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)
 328                 return 1;
 329         if (!msr_info->host_initiated &&
 330             ((new_state == MSR_IA32_APICBASE_ENABLE &&
 331               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 332              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 333               old_state == 0)))
 334                 return 1;
 335
 336         kvm_lapic_set_base(vcpu, msr_info->data);
 337         return 0;
 338 }
 339 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 340
 341 asmlinkage __visible void kvm_spurious_fault(void)
 342 {
 343         /* Fault while not rebooting.  We want the trace. */
 344         BUG();
 345 }
 346 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 347
 348 #define EXCPT_BENIGN            0
 349 #define EXCPT_CONTRIBUTORY      1
 350 #define EXCPT_PF                2
 351
 352 static int exception_class(int vector)
 353 {
 354         switch (vector) {
 355         case PF_VECTOR:
 356                 return EXCPT_PF;
 357         case DE_VECTOR:
 358         case TS_VECTOR:
 359         case NP_VECTOR:
 360         case SS_VECTOR:
 361         case GP_VECTOR:
 362                 return EXCPT_CONTRIBUTORY;
 363         default:
 364                 break;
 365         }
 366         return EXCPT_BENIGN;
 367 }
 368
 369 #define EXCPT_FAULT             0
 370 #define EXCPT_TRAP              1
 371 #define EXCPT_ABORT             2
 372 #define EXCPT_INTERRUPT         3
 373
 374 static int exception_type(int vector)
 375 {
 376         unsigned int mask;
 377
 378         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 379                 return EXCPT_INTERRUPT;
 380
 381         mask = 1 << vector;
 382
 383         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 384         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 385                 return EXCPT_TRAP;
 386
 387         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 388                 return EXCPT_ABORT;
 389
 390         /* Reserved exceptions will result in fault */
 391         return EXCPT_FAULT;
 392 }
 393
 394 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 395                 unsigned nr, bool has_error, u32 error_code,
 396                 bool reinject)
 397 {
 398         u32 prev_nr;
 399         int class1, class2;
 400
 401         kvm_make_request(KVM_REQ_EVENT, vcpu);
 402
 403         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 404         queue:
 405                 if (has_error && !is_protmode(vcpu))
 406                         has_error = false;
 407                 if (reinject) {
 408                         /*
 409                          * On vmentry, vcpu->arch.exception.pending is only
 410                          * true if an event injection was blocked by
 411                          * nested_run_pending.  In that case, however,
 412                          * vcpu_enter_guest requests an immediate exit,
 413                          * and the guest shouldn't proceed far enough to
 414                          * need reinjection.
 415                          */
 416                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 417                         vcpu->arch.exception.injected = true;
 418                 } else {
 419                         vcpu->arch.exception.pending = true;
 420                         vcpu->arch.exception.injected = false;
 421                 }
 422                 vcpu->arch.exception.has_error_code = has_error;
 423                 vcpu->arch.exception.nr = nr;
 424                 vcpu->arch.exception.error_code = error_code;
 425                 return;
 426         }
 427
 428         /* to check exception */
 429         prev_nr = vcpu->arch.exception.nr;
 430         if (prev_nr == DF_VECTOR) {
 431                 /* triple fault -> shutdown */
 432                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 433                 return;
 434         }
 435         class1 = exception_class(prev_nr);
 436         class2 = exception_class(nr);
 437         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 438                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 439                 /*
 440                  * Generate double fault per SDM Table 5-5.  Set
 441                  * exception.pending = true so that the double fault
 442                  * can trigger a nested vmexit.
 443                  */
 444                 vcpu->arch.exception.pending = true;
 445                 vcpu->arch.exception.injected = false;
 446                 vcpu->arch.exception.has_error_code = true;
 447                 vcpu->arch.exception.nr = DF_VECTOR;
 448                 vcpu->arch.exception.error_code = 0;
 449         } else
 450                 /* replace previous exception with a new one in a hope
 451                    that instruction re-execution will regenerate lost
 452                    exception */
 453                 goto queue;
 454 }
 455
 456 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 457 {
 458         kvm_multiple_exception(vcpu, nr, false, 0, false);
 459 }
 460 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 461
 462 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 463 {
 464         kvm_multiple_exception(vcpu, nr, false, 0, true);
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 467
 468 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 469 {
 470         if (err)
 471                 kvm_inject_gp(vcpu, 0);
 472         else
 473                 return kvm_skip_emulated_instruction(vcpu);
 474
 475         return 1;
 476 }
 477 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 478
 479 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 480 {
 481         ++vcpu->stat.pf_guest;
 482         vcpu->arch.exception.nested_apf =
 483                 is_guest_mode(vcpu) && fault->async_page_fault;
 484         if (vcpu->arch.exception.nested_apf)
 485                 vcpu->arch.apf.nested_apf_token = fault->address;
 486         else
 487                 vcpu->arch.cr2 = fault->address;
 488         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 489 }
 490 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 491
 492 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 493 {
 494         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 495                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 496         else
 497                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 498
 499         return fault->nested_page_fault;
 500 }
 501
 502 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 503 {
 504         atomic_inc(&vcpu->arch.nmi_queued);
 505         kvm_make_request(KVM_REQ_NMI, vcpu);
 506 }
 507 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 508
 509 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 510 {
 511         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 512 }
 513 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 514
 515 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 516 {
 517         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 518 }
 519 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 520
 521 /*
 522  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 523  * a #GP and return false.
 524  */
 525 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 526 {
 527         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 528                 return true;
 529         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 530         return false;
 531 }
 532 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 533
 534 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 535 {
 536         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 537                 return true;
 538
 539         kvm_queue_exception(vcpu, UD_VECTOR);
 540         return false;
 541 }
 542 EXPORT_SYMBOL_GPL(kvm_require_dr);
 543
 544 /*
 545  * This function will be used to read from the physical memory of the currently
 546  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 547  * can read from guest physical or from the guest's guest physical memory.
 548  */
 549 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 550                             gfn_t ngfn, void *data, int offset, int len,
 551                             u32 access)
 552 {
 553         struct x86_exception exception;
 554         gfn_t real_gfn;
 555         gpa_t ngpa;
 556
 557         ngpa     = gfn_to_gpa(ngfn);
 558         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 559         if (real_gfn == UNMAPPED_GVA)
 560                 return -EFAULT;
 561
 562         real_gfn = gpa_to_gfn(real_gfn);
 563
 564         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 565 }
 566 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 567
 568 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 569                                void *data, int offset, int len, u32 access)
 570 {
 571         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 572                                        data, offset, len, access);
 573 }
 574
 575 /*
 576  * Load the pae pdptrs.  Return true is they are all valid.
 577  */
 578 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 579 {
 580         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 581         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 582         int i;
 583         int ret;
 584         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 585
 586         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 587                                       offset * sizeof(u64), sizeof(pdpte),
 588                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 589         if (ret < 0) {
 590                 ret = 0;
 591                 goto out;
 592         }
 593         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 594                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 595                     (pdpte[i] &
 596                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 597                         ret = 0;
 598                         goto out;
 599                 }
 600         }
 601         ret = 1;
 602
 603         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 604         __set_bit(VCPU_EXREG_PDPTR,
 605                   (unsigned long *)&vcpu->arch.regs_avail);
 606         __set_bit(VCPU_EXREG_PDPTR,
 607                   (unsigned long *)&vcpu->arch.regs_dirty);
 608 out:
 609
 610         return ret;
 611 }
 612 EXPORT_SYMBOL_GPL(load_pdptrs);
 613
 614 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 615 {
 616         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 617         bool changed = true;
 618         int offset;
 619         gfn_t gfn;
 620         int r;
 621
 622         if (is_long_mode(vcpu) || !is_pae(vcpu))
 623                 return false;
 624
 625         if (!test_bit(VCPU_EXREG_PDPTR,
 626                       (unsigned long *)&vcpu->arch.regs_avail))
 627                 return true;
 628
 629         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 630         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 631         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 632                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 633         if (r < 0)
 634                 goto out;
 635         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 636 out:
 637
 638         return changed;
 639 }
 640 EXPORT_SYMBOL_GPL(pdptrs_changed);
 641
 642 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 643 {
 644         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 645         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 646
 647         cr0 |= X86_CR0_ET;
 648
 649 #ifdef CONFIG_X86_64
 650         if (cr0 & 0xffffffff00000000UL)
 651                 return 1;
 652 #endif
 653
 654         cr0 &= ~CR0_RESERVED_BITS;
 655
 656         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 657                 return 1;
 658
 659         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 660                 return 1;
 661
 662         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 663 #ifdef CONFIG_X86_64
 664                 if ((vcpu->arch.efer & EFER_LME)) {
 665                         int cs_db, cs_l;
 666
 667                         if (!is_pae(vcpu))
 668                                 return 1;
 669                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 670                         if (cs_l)
 671                                 return 1;
 672                 } else
 673 #endif
 674                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 675                                                  kvm_read_cr3(vcpu)))
 676                         return 1;
 677         }
 678
 679         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 680                 return 1;
 681
 682         kvm_x86_ops->set_cr0(vcpu, cr0);
 683
 684         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 685                 kvm_clear_async_pf_completion_queue(vcpu);
 686                 kvm_async_pf_hash_reset(vcpu);
 687         }
 688
 689         if ((cr0 ^ old_cr0) & update_bits)
 690                 kvm_mmu_reset_context(vcpu);
 691
 692         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 693             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 694             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 695                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 696
 697         return 0;
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 700
 701 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 702 {
 703         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 704 }
 705 EXPORT_SYMBOL_GPL(kvm_lmsw);
 706
 707 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 708 {
 709         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 710                         !vcpu->guest_xcr0_loaded) {
 711                 /* kvm_set_xcr() also depends on this */
 712                 if (vcpu->arch.xcr0 != host_xcr0)
 713                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 714                 vcpu->guest_xcr0_loaded = 1;
 715         }
 716 }
 717
 718 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 719 {
 720         if (vcpu->guest_xcr0_loaded) {
 721                 if (vcpu->arch.xcr0 != host_xcr0)
 722                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 723                 vcpu->guest_xcr0_loaded = 0;
 724         }
 725 }
 726
 727 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 728 {
 729         u64 xcr0 = xcr;
 730         u64 old_xcr0 = vcpu->arch.xcr0;
 731         u64 valid_bits;
 732
 733         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 734         if (index != XCR_XFEATURE_ENABLED_MASK)
 735                 return 1;
 736         if (!(xcr0 & XFEATURE_MASK_FP))
 737                 return 1;
 738         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 739                 return 1;
 740
 741         /*
 742          * Do not allow the guest to set bits that we do not support
 743          * saving.  However, xcr0 bit 0 is always set, even if the
 744          * emulated CPU does not support XSAVE (see fx_init).
 745          */
 746         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 747         if (xcr0 & ~valid_bits)
 748                 return 1;
 749
 750         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 751             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 752                 return 1;
 753
 754         if (xcr0 & XFEATURE_MASK_AVX512) {
 755                 if (!(xcr0 & XFEATURE_MASK_YMM))
 756                         return 1;
 757                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 758                         return 1;
 759         }
 760         vcpu->arch.xcr0 = xcr0;
 761
 762         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 763                 kvm_update_cpuid(vcpu);
 764         return 0;
 765 }
 766
 767 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 768 {
 769         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 770             __kvm_set_xcr(vcpu, index, xcr)) {
 771                 kvm_inject_gp(vcpu, 0);
 772                 return 1;
 773         }
 774         return 0;
 775 }
 776 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 777
 778 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 779 {
 780         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 781         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 782                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 783
 784         if (cr4 & CR4_RESERVED_BITS)
 785                 return 1;
 786
 787         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 788                 return 1;
 789
 790         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 791                 return 1;
 792
 793         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 794                 return 1;
 795
 796         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 797                 return 1;
 798
 799         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 800                 return 1;
 801
 802         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 803                 return 1;
 804
 805         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 806                 return 1;
 807
 808         if (is_long_mode(vcpu)) {
 809                 if (!(cr4 & X86_CR4_PAE))
 810                         return 1;
 811         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 812                    && ((cr4 ^ old_cr4) & pdptr_bits)
 813                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 814                                    kvm_read_cr3(vcpu)))
 815                 return 1;
 816
 817         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 818                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 819                         return 1;
 820
 821                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 822                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 823                         return 1;
 824         }
 825
 826         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 827                 return 1;
 828
 829         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 830             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 831                 kvm_mmu_reset_context(vcpu);
 832
 833         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 834                 kvm_update_cpuid(vcpu);
 835
 836         return 0;
 837 }
 838 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 839
 840 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 841 {
 842 #ifdef CONFIG_X86_64
 843         cr3 &= ~CR3_PCID_INVD;
 844 #endif
 845
 846         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 847                 kvm_mmu_sync_roots(vcpu);
 848                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 849                 return 0;
 850         }
 851
 852         if (is_long_mode(vcpu) &&
 853             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 62)))
 854                 return 1;
 855         else if (is_pae(vcpu) && is_paging(vcpu) &&
 856                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 857                 return 1;
 858
 859         vcpu->arch.cr3 = cr3;
 860         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 861         kvm_mmu_new_cr3(vcpu);
 862         return 0;
 863 }
 864 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 865
 866 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 867 {
 868         if (cr8 & CR8_RESERVED_BITS)
 869                 return 1;
 870         if (lapic_in_kernel(vcpu))
 871                 kvm_lapic_set_tpr(vcpu, cr8);
 872         else
 873                 vcpu->arch.cr8 = cr8;
 874         return 0;
 875 }
 876 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 877
 878 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 879 {
 880         if (lapic_in_kernel(vcpu))
 881                 return kvm_lapic_get_cr8(vcpu);
 882         else
 883                 return vcpu->arch.cr8;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 886
 887 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 888 {
 889         int i;
 890
 891         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 892                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 893                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 894                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 895         }
 896 }
 897
 898 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 899 {
 900         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 901                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 902 }
 903
 904 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 905 {
 906         unsigned long dr7;
 907
 908         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 909                 dr7 = vcpu->arch.guest_debug_dr7;
 910         else
 911                 dr7 = vcpu->arch.dr7;
 912         kvm_x86_ops->set_dr7(vcpu, dr7);
 913         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 914         if (dr7 & DR7_BP_EN_MASK)
 915                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 916 }
 917
 918 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 919 {
 920         u64 fixed = DR6_FIXED_1;
 921
 922         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 923                 fixed |= DR6_RTM;
 924         return fixed;
 925 }
 926
 927 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 928 {
 929         switch (dr) {
 930         case 0 ... 3:
 931                 vcpu->arch.db[dr] = val;
 932                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 933                         vcpu->arch.eff_db[dr] = val;
 934                 break;
 935         case 4:
 936                 /* fall through */
 937         case 6:
 938                 if (val & 0xffffffff00000000ULL)
 939                         return -1; /* #GP */
 940                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 941                 kvm_update_dr6(vcpu);
 942                 break;
 943         case 5:
 944                 /* fall through */
 945         default: /* 7 */
 946                 if (val & 0xffffffff00000000ULL)
 947                         return -1; /* #GP */
 948                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 949                 kvm_update_dr7(vcpu);
 950                 break;
 951         }
 952
 953         return 0;
 954 }
 955
 956 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 957 {
 958         if (__kvm_set_dr(vcpu, dr, val)) {
 959                 kvm_inject_gp(vcpu, 0);
 960                 return 1;
 961         }
 962         return 0;
 963 }
 964 EXPORT_SYMBOL_GPL(kvm_set_dr);
 965
 966 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 967 {
 968         switch (dr) {
 969         case 0 ... 3:
 970                 *val = vcpu->arch.db[dr];
 971                 break;
 972         case 4:
 973                 /* fall through */
 974         case 6:
 975                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 976                         *val = vcpu->arch.dr6;
 977                 else
 978                         *val = kvm_x86_ops->get_dr6(vcpu);
 979                 break;
 980         case 5:
 981                 /* fall through */
 982         default: /* 7 */
 983                 *val = vcpu->arch.dr7;
 984                 break;
 985         }
 986         return 0;
 987 }
 988 EXPORT_SYMBOL_GPL(kvm_get_dr);
 989
 990 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 991 {
 992         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 993         u64 data;
 994         int err;
 995
 996         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 997         if (err)
 998                 return err;
 999         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
1000         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
1001         return err;
1002 }
1003 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1004
1005 /*
1006  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1007  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1008  *
1009  * This list is modified at module load time to reflect the
1010  * capabilities of the host cpu. This capabilities test skips MSRs that are
1011  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1012  * may depend on host virtualization features rather than host cpu features.
1013  */
1014
1015 static u32 msrs_to_save[] = {
1016         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1017         MSR_STAR,
1018 #ifdef CONFIG_X86_64
1019         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1020 #endif
1021         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1022         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1023         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1024 };
1025
1026 static unsigned num_msrs_to_save;
1027
1028 static u32 emulated_msrs[] = {
1029         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1030         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1031         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1032         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1033         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1034         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1035         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1036         HV_X64_MSR_RESET,
1037         HV_X64_MSR_VP_INDEX,
1038         HV_X64_MSR_VP_RUNTIME,
1039         HV_X64_MSR_SCONTROL,
1040         HV_X64_MSR_STIMER0_CONFIG,
1041         HV_X64_MSR_APIC_ASSIST_PAGE,
1042         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1043         HV_X64_MSR_TSC_EMULATION_STATUS,
1044
1045         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1046         MSR_KVM_PV_EOI_EN,
1047
1048         MSR_IA32_TSC_ADJUST,
1049         MSR_IA32_TSCDEADLINE,
1050         MSR_IA32_MISC_ENABLE,
1051         MSR_IA32_MCG_STATUS,
1052         MSR_IA32_MCG_CTL,
1053         MSR_IA32_MCG_EXT_CTL,
1054         MSR_IA32_SMBASE,
1055         MSR_SMI_COUNT,
1056         MSR_PLATFORM_INFO,
1057         MSR_MISC_FEATURES_ENABLES,
1058 };
1059
1060 static unsigned num_emulated_msrs;
1061
1062 /*
1063  * List of msr numbers which are used to expose MSR-based features that
1064  * can be used by a hypervisor to validate requested CPU features.
1065  */
1066 static u32 msr_based_features[] = {
1067         MSR_IA32_VMX_BASIC,
1068         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1069         MSR_IA32_VMX_PINBASED_CTLS,
1070         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1071         MSR_IA32_VMX_PROCBASED_CTLS,
1072         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1073         MSR_IA32_VMX_EXIT_CTLS,
1074         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1075         MSR_IA32_VMX_ENTRY_CTLS,
1076         MSR_IA32_VMX_MISC,
1077         MSR_IA32_VMX_CR0_FIXED0,
1078         MSR_IA32_VMX_CR0_FIXED1,
1079         MSR_IA32_VMX_CR4_FIXED0,
1080         MSR_IA32_VMX_CR4_FIXED1,
1081         MSR_IA32_VMX_VMCS_ENUM,
1082         MSR_IA32_VMX_PROCBASED_CTLS2,
1083         MSR_IA32_VMX_EPT_VPID_CAP,
1084         MSR_IA32_VMX_VMFUNC,
1085
1086         MSR_F10H_DECFG,
1087         MSR_IA32_UCODE_REV,
1088 };
1089
1090 static unsigned int num_msr_based_features;
1091
1092 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1093 {
1094         switch (msr->index) {
1095         case MSR_IA32_UCODE_REV:
1096                 rdmsrl(msr->index, msr->data);
1097                 break;
1098         default:
1099                 if (kvm_x86_ops->get_msr_feature(msr))
1100                         return 1;
1101         }
1102         return 0;
1103 }
1104
1105 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1106 {
1107         struct kvm_msr_entry msr;
1108         int r;
1109
1110         msr.index = index;
1111         r = kvm_get_msr_feature(&msr);
1112         if (r)
1113                 return r;
1114
1115         *data = msr.data;
1116
1117         return 0;
1118 }
1119
1120 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1121 {
1122         if (efer & efer_reserved_bits)
1123                 return false;
1124
1125         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1126                         return false;
1127
1128         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1129                         return false;
1130
1131         return true;
1132 }
1133 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1134
1135 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1136 {
1137         u64 old_efer = vcpu->arch.efer;
1138
1139         if (!kvm_valid_efer(vcpu, efer))
1140                 return 1;
1141
1142         if (is_paging(vcpu)
1143             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1144                 return 1;
1145
1146         efer &= ~EFER_LMA;
1147         efer |= vcpu->arch.efer & EFER_LMA;
1148
1149         kvm_x86_ops->set_efer(vcpu, efer);
1150
1151         /* Update reserved bits */
1152         if ((efer ^ old_efer) & EFER_NX)
1153                 kvm_mmu_reset_context(vcpu);
1154
1155         return 0;
1156 }
1157
1158 void kvm_enable_efer_bits(u64 mask)
1159 {
1160        efer_reserved_bits &= ~mask;
1161 }
1162 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1163
1164 /*
1165  * Writes msr value into into the appropriate "register".
1166  * Returns 0 on success, non-0 otherwise.
1167  * Assumes vcpu_load() was already called.
1168  */
1169 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1170 {
1171         switch (msr->index) {
1172         case MSR_FS_BASE:
1173         case MSR_GS_BASE:
1174         case MSR_KERNEL_GS_BASE:
1175         case MSR_CSTAR:
1176         case MSR_LSTAR:
1177                 if (is_noncanonical_address(msr->data, vcpu))
1178                         return 1;
1179                 break;
1180         case MSR_IA32_SYSENTER_EIP:
1181         case MSR_IA32_SYSENTER_ESP:
1182                 /*
1183                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1184                  * non-canonical address is written on Intel but not on
1185                  * AMD (which ignores the top 32-bits, because it does
1186                  * not implement 64-bit SYSENTER).
1187                  *
1188                  * 64-bit code should hence be able to write a non-canonical
1189                  * value on AMD.  Making the address canonical ensures that
1190                  * vmentry does not fail on Intel after writing a non-canonical
1191                  * value, and that something deterministic happens if the guest
1192                  * invokes 64-bit SYSENTER.
1193                  */
1194                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1195         }
1196         return kvm_x86_ops->set_msr(vcpu, msr);
1197 }
1198 EXPORT_SYMBOL_GPL(kvm_set_msr);
1199
1200 /*
1201  * Adapt set_msr() to msr_io()'s calling convention
1202  */
1203 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1204 {
1205         struct msr_data msr;
1206         int r;
1207
1208         msr.index = index;
1209         msr.host_initiated = true;
1210         r = kvm_get_msr(vcpu, &msr);
1211         if (r)
1212                 return r;
1213
1214         *data = msr.data;
1215         return 0;
1216 }
1217
1218 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1219 {
1220         struct msr_data msr;
1221
1222         msr.data = *data;
1223         msr.index = index;
1224         msr.host_initiated = true;
1225         return kvm_set_msr(vcpu, &msr);
1226 }
1227
1228 #ifdef CONFIG_X86_64
1229 struct pvclock_gtod_data {
1230         seqcount_t      seq;
1231
1232         struct { /* extract of a clocksource struct */
1233                 int vclock_mode;
1234                 u64     cycle_last;
1235                 u64     mask;
1236                 u32     mult;
1237                 u32     shift;
1238         } clock;
1239
1240         u64             boot_ns;
1241         u64             nsec_base;
1242         u64             wall_time_sec;
1243 };
1244
1245 static struct pvclock_gtod_data pvclock_gtod_data;
1246
1247 static void update_pvclock_gtod(struct timekeeper *tk)
1248 {
1249         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1250         u64 boot_ns;
1251
1252         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1253
1254         write_seqcount_begin(&vdata->seq);
1255
1256         /* copy pvclock gtod data */
1257         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1258         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1259         vdata->clock.mask               = tk->tkr_mono.mask;
1260         vdata->clock.mult               = tk->tkr_mono.mult;
1261         vdata->clock.shift              = tk->tkr_mono.shift;
1262
1263         vdata->boot_ns                  = boot_ns;
1264         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1265
1266         vdata->wall_time_sec            = tk->xtime_sec;
1267
1268         write_seqcount_end(&vdata->seq);
1269 }
1270 #endif
1271
1272 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1273 {
1274         /*
1275          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1276          * vcpu_enter_guest.  This function is only called from
1277          * the physical CPU that is running vcpu.
1278          */
1279         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1280 }
1281
1282 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1283 {
1284         int version;
1285         int r;
1286         struct pvclock_wall_clock wc;
1287         struct timespec64 boot;
1288
1289         if (!wall_clock)
1290                 return;
1291
1292         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1293         if (r)
1294                 return;
1295
1296         if (version & 1)
1297                 ++version;  /* first time write, random junk */
1298
1299         ++version;
1300
1301         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1302                 return;
1303
1304         /*
1305          * The guest calculates current wall clock time by adding
1306          * system time (updated by kvm_guest_time_update below) to the
1307          * wall clock specified here.  guest system time equals host
1308          * system time for us, thus we must fill in host boot time here.
1309          */
1310         getboottime64(&boot);
1311
1312         if (kvm->arch.kvmclock_offset) {
1313                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1314                 boot = timespec64_sub(boot, ts);
1315         }
1316         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1317         wc.nsec = boot.tv_nsec;
1318         wc.version = version;
1319
1320         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1321
1322         version++;
1323         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1324 }
1325
1326 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1327 {
1328         do_shl32_div32(dividend, divisor);
1329         return dividend;
1330 }
1331
1332 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1333                                s8 *pshift, u32 *pmultiplier)
1334 {
1335         uint64_t scaled64;
1336         int32_t  shift = 0;
1337         uint64_t tps64;
1338         uint32_t tps32;
1339
1340         tps64 = base_hz;
1341         scaled64 = scaled_hz;
1342         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1343                 tps64 >>= 1;
1344                 shift--;
1345         }
1346
1347         tps32 = (uint32_t)tps64;
1348         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1349                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1350                         scaled64 >>= 1;
1351                 else
1352                         tps32 <<= 1;
1353                 shift++;
1354         }
1355
1356         *pshift = shift;
1357         *pmultiplier = div_frac(scaled64, tps32);
1358
1359         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1360                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1361 }
1362
1363 #ifdef CONFIG_X86_64
1364 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1365 #endif
1366
1367 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1368 static unsigned long max_tsc_khz;
1369
1370 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1371 {
1372         u64 v = (u64)khz * (1000000 + ppm);
1373         do_div(v, 1000000);
1374         return v;
1375 }
1376
1377 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1378 {
1379         u64 ratio;
1380
1381         /* Guest TSC same frequency as host TSC? */
1382         if (!scale) {
1383                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1384                 return 0;
1385         }
1386
1387         /* TSC scaling supported? */
1388         if (!kvm_has_tsc_control) {
1389                 if (user_tsc_khz > tsc_khz) {
1390                         vcpu->arch.tsc_catchup = 1;
1391                         vcpu->arch.tsc_always_catchup = 1;
1392                         return 0;
1393                 } else {
1394                         WARN(1, "user requested TSC rate below hardware speed\n");
1395                         return -1;
1396                 }
1397         }
1398
1399         /* TSC scaling required  - calculate ratio */
1400         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1401                                 user_tsc_khz, tsc_khz);
1402
1403         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1404                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1405                           user_tsc_khz);
1406                 return -1;
1407         }
1408
1409         vcpu->arch.tsc_scaling_ratio = ratio;
1410         return 0;
1411 }
1412
1413 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1414 {
1415         u32 thresh_lo, thresh_hi;
1416         int use_scaling = 0;
1417
1418         /* tsc_khz can be zero if TSC calibration fails */
1419         if (user_tsc_khz == 0) {
1420                 /* set tsc_scaling_ratio to a safe value */
1421                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1422                 return -1;
1423         }
1424
1425         /* Compute a scale to convert nanoseconds in TSC cycles */
1426         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1427                            &vcpu->arch.virtual_tsc_shift,
1428                            &vcpu->arch.virtual_tsc_mult);
1429         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1430
1431         /*
1432          * Compute the variation in TSC rate which is acceptable
1433          * within the range of tolerance and decide if the
1434          * rate being applied is within that bounds of the hardware
1435          * rate.  If so, no scaling or compensation need be done.
1436          */
1437         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1438         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1439         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1440                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1441                 use_scaling = 1;
1442         }
1443         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1444 }
1445
1446 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1447 {
1448         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1449                                       vcpu->arch.virtual_tsc_mult,
1450                                       vcpu->arch.virtual_tsc_shift);
1451         tsc += vcpu->arch.this_tsc_write;
1452         return tsc;
1453 }
1454
1455 static inline int gtod_is_based_on_tsc(int mode)
1456 {
1457         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1458 }
1459
1460 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1461 {
1462 #ifdef CONFIG_X86_64
1463         bool vcpus_matched;
1464         struct kvm_arch *ka = &vcpu->kvm->arch;
1465         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1466
1467         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1468                          atomic_read(&vcpu->kvm->online_vcpus));
1469
1470         /*
1471          * Once the masterclock is enabled, always perform request in
1472          * order to update it.
1473          *
1474          * In order to enable masterclock, the host clocksource must be TSC
1475          * and the vcpus need to have matched TSCs.  When that happens,
1476          * perform request to enable masterclock.
1477          */
1478         if (ka->use_master_clock ||
1479             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1480                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1481
1482         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1483                             atomic_read(&vcpu->kvm->online_vcpus),
1484                             ka->use_master_clock, gtod->clock.vclock_mode);
1485 #endif
1486 }
1487
1488 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1489 {
1490         u64 curr_offset = vcpu->arch.tsc_offset;
1491         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1492 }
1493
1494 /*
1495  * Multiply tsc by a fixed point number represented by ratio.
1496  *
1497  * The most significant 64-N bits (mult) of ratio represent the
1498  * integral part of the fixed point number; the remaining N bits
1499  * (frac) represent the fractional part, ie. ratio represents a fixed
1500  * point number (mult + frac * 2^(-N)).
1501  *
1502  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1503  */
1504 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1505 {
1506         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1507 }
1508
1509 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1510 {
1511         u64 _tsc = tsc;
1512         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1513
1514         if (ratio != kvm_default_tsc_scaling_ratio)
1515                 _tsc = __scale_tsc(ratio, tsc);
1516
1517         return _tsc;
1518 }
1519 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1520
1521 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1522 {
1523         u64 tsc;
1524
1525         tsc = kvm_scale_tsc(vcpu, rdtsc());
1526
1527         return target_tsc - tsc;
1528 }
1529
1530 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1531 {
1532         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1533 }
1534 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1535
1536 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1537 {
1538         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1539         vcpu->arch.tsc_offset = offset;
1540 }
1541
1542 static inline bool kvm_check_tsc_unstable(void)
1543 {
1544 #ifdef CONFIG_X86_64
1545         /*
1546          * TSC is marked unstable when we're running on Hyper-V,
1547          * 'TSC page' clocksource is good.
1548          */
1549         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1550                 return false;
1551 #endif
1552         return check_tsc_unstable();
1553 }
1554
1555 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1556 {
1557         struct kvm *kvm = vcpu->kvm;
1558         u64 offset, ns, elapsed;
1559         unsigned long flags;
1560         bool matched;
1561         bool already_matched;
1562         u64 data = msr->data;
1563         bool synchronizing = false;
1564
1565         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1566         offset = kvm_compute_tsc_offset(vcpu, data);
1567         ns = ktime_get_boot_ns();
1568         elapsed = ns - kvm->arch.last_tsc_nsec;
1569
1570         if (vcpu->arch.virtual_tsc_khz) {
1571                 if (data == 0 && msr->host_initiated) {
1572                         /*
1573                          * detection of vcpu initialization -- need to sync
1574                          * with other vCPUs. This particularly helps to keep
1575                          * kvm_clock stable after CPU hotplug
1576                          */
1577                         synchronizing = true;
1578                 } else {
1579                         u64 tsc_exp = kvm->arch.last_tsc_write +
1580                                                 nsec_to_cycles(vcpu, elapsed);
1581                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1582                         /*
1583                          * Special case: TSC write with a small delta (1 second)
1584                          * of virtual cycle time against real time is
1585                          * interpreted as an attempt to synchronize the CPU.
1586                          */
1587                         synchronizing = data < tsc_exp + tsc_hz &&
1588                                         data + tsc_hz > tsc_exp;
1589                 }
1590         }
1591
1592         /*
1593          * For a reliable TSC, we can match TSC offsets, and for an unstable
1594          * TSC, we add elapsed time in this computation.  We could let the
1595          * compensation code attempt to catch up if we fall behind, but
1596          * it's better to try to match offsets from the beginning.
1597          */
1598         if (synchronizing &&
1599             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1600                 if (!kvm_check_tsc_unstable()) {
1601                         offset = kvm->arch.cur_tsc_offset;
1602                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1603                 } else {
1604                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1605                         data += delta;
1606                         offset = kvm_compute_tsc_offset(vcpu, data);
1607                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1608                 }
1609                 matched = true;
1610                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1611         } else {
1612                 /*
1613                  * We split periods of matched TSC writes into generations.
1614                  * For each generation, we track the original measured
1615                  * nanosecond time, offset, and write, so if TSCs are in
1616                  * sync, we can match exact offset, and if not, we can match
1617                  * exact software computation in compute_guest_tsc()
1618                  *
1619                  * These values are tracked in kvm->arch.cur_xxx variables.
1620                  */
1621                 kvm->arch.cur_tsc_generation++;
1622                 kvm->arch.cur_tsc_nsec = ns;
1623                 kvm->arch.cur_tsc_write = data;
1624                 kvm->arch.cur_tsc_offset = offset;
1625                 matched = false;
1626                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1627                          kvm->arch.cur_tsc_generation, data);
1628         }
1629
1630         /*
1631          * We also track th most recent recorded KHZ, write and time to
1632          * allow the matching interval to be extended at each write.
1633          */
1634         kvm->arch.last_tsc_nsec = ns;
1635         kvm->arch.last_tsc_write = data;
1636         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1637
1638         vcpu->arch.last_guest_tsc = data;
1639
1640         /* Keep track of which generation this VCPU has synchronized to */
1641         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1642         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1643         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1644
1645         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1646                 update_ia32_tsc_adjust_msr(vcpu, offset);
1647
1648         kvm_vcpu_write_tsc_offset(vcpu, offset);
1649         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1650
1651         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1652         if (!matched) {
1653                 kvm->arch.nr_vcpus_matched_tsc = 0;
1654         } else if (!already_matched) {
1655                 kvm->arch.nr_vcpus_matched_tsc++;
1656         }
1657
1658         kvm_track_tsc_matching(vcpu);
1659         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1660 }
1661
1662 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1663
1664 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1665                                            s64 adjustment)
1666 {
1667         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1668 }
1669
1670 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1671 {
1672         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1673                 WARN_ON(adjustment < 0);
1674         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1675         adjust_tsc_offset_guest(vcpu, adjustment);
1676 }
1677
1678 #ifdef CONFIG_X86_64
1679
1680 static u64 read_tsc(void)
1681 {
1682         u64 ret = (u64)rdtsc_ordered();
1683         u64 last = pvclock_gtod_data.clock.cycle_last;
1684
1685         if (likely(ret >= last))
1686                 return ret;
1687
1688         /*
1689          * GCC likes to generate cmov here, but this branch is extremely
1690          * predictable (it's just a function of time and the likely is
1691          * very likely) and there's a data dependence, so force GCC
1692          * to generate a branch instead.  I don't barrier() because
1693          * we don't actually need a barrier, and if this function
1694          * ever gets inlined it will generate worse code.
1695          */
1696         asm volatile ("");
1697         return last;
1698 }
1699
1700 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1701 {
1702         long v;
1703         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1704         u64 tsc_pg_val;
1705
1706         switch (gtod->clock.vclock_mode) {
1707         case VCLOCK_HVCLOCK:
1708                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1709                                                   tsc_timestamp);
1710                 if (tsc_pg_val != U64_MAX) {
1711                         /* TSC page valid */
1712                         *mode = VCLOCK_HVCLOCK;
1713                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1714                                 gtod->clock.mask;
1715                 } else {
1716                         /* TSC page invalid */
1717                         *mode = VCLOCK_NONE;
1718                 }
1719                 break;
1720         case VCLOCK_TSC:
1721                 *mode = VCLOCK_TSC;
1722                 *tsc_timestamp = read_tsc();
1723                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1724                         gtod->clock.mask;
1725                 break;
1726         default:
1727                 *mode = VCLOCK_NONE;
1728         }
1729
1730         if (*mode == VCLOCK_NONE)
1731                 *tsc_timestamp = v = 0;
1732
1733         return v * gtod->clock.mult;
1734 }
1735
1736 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1737 {
1738         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1739         unsigned long seq;
1740         int mode;
1741         u64 ns;
1742
1743         do {
1744                 seq = read_seqcount_begin(&gtod->seq);
1745                 ns = gtod->nsec_base;
1746                 ns += vgettsc(tsc_timestamp, &mode);
1747                 ns >>= gtod->clock.shift;
1748                 ns += gtod->boot_ns;
1749         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1750         *t = ns;
1751
1752         return mode;
1753 }
1754
1755 static int do_realtime(struct timespec *ts, u64 *tsc_timestamp)
1756 {
1757         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1758         unsigned long seq;
1759         int mode;
1760         u64 ns;
1761
1762         do {
1763                 seq = read_seqcount_begin(&gtod->seq);
1764                 ts->tv_sec = gtod->wall_time_sec;
1765                 ns = gtod->nsec_base;
1766                 ns += vgettsc(tsc_timestamp, &mode);
1767                 ns >>= gtod->clock.shift;
1768         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1769
1770         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1771         ts->tv_nsec = ns;
1772
1773         return mode;
1774 }
1775
1776 /* returns true if host is using TSC based clocksource */
1777 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1778 {
1779         /* checked again under seqlock below */
1780         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1781                 return false;
1782
1783         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1784                                                       tsc_timestamp));
1785 }
1786
1787 /* returns true if host is using TSC based clocksource */
1788 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1789                                            u64 *tsc_timestamp)
1790 {
1791         /* checked again under seqlock below */
1792         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1793                 return false;
1794
1795         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1796 }
1797 #endif
1798
1799 /*
1800  *
1801  * Assuming a stable TSC across physical CPUS, and a stable TSC
1802  * across virtual CPUs, the following condition is possible.
1803  * Each numbered line represents an event visible to both
1804  * CPUs at the next numbered event.
1805  *
1806  * "timespecX" represents host monotonic time. "tscX" represents
1807  * RDTSC value.
1808  *
1809  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1810  *
1811  * 1.  read timespec0,tsc0
1812  * 2.                                   | timespec1 = timespec0 + N
1813  *                                      | tsc1 = tsc0 + M
1814  * 3. transition to guest               | transition to guest
1815  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1816  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1817  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1818  *
1819  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1820  *
1821  *      - ret0 < ret1
1822  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1823  *              ...
1824  *      - 0 < N - M => M < N
1825  *
1826  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1827  * always the case (the difference between two distinct xtime instances
1828  * might be smaller then the difference between corresponding TSC reads,
1829  * when updating guest vcpus pvclock areas).
1830  *
1831  * To avoid that problem, do not allow visibility of distinct
1832  * system_timestamp/tsc_timestamp values simultaneously: use a master
1833  * copy of host monotonic time values. Update that master copy
1834  * in lockstep.
1835  *
1836  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1837  *
1838  */
1839
1840 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1841 {
1842 #ifdef CONFIG_X86_64
1843         struct kvm_arch *ka = &kvm->arch;
1844         int vclock_mode;
1845         bool host_tsc_clocksource, vcpus_matched;
1846
1847         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1848                         atomic_read(&kvm->online_vcpus));
1849
1850         /*
1851          * If the host uses TSC clock, then passthrough TSC as stable
1852          * to the guest.
1853          */
1854         host_tsc_clocksource = kvm_get_time_and_clockread(
1855                                         &ka->master_kernel_ns,
1856                                         &ka->master_cycle_now);
1857
1858         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1859                                 && !ka->backwards_tsc_observed
1860                                 && !ka->boot_vcpu_runs_old_kvmclock;
1861
1862         if (ka->use_master_clock)
1863                 atomic_set(&kvm_guest_has_master_clock, 1);
1864
1865         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1866         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1867                                         vcpus_matched);
1868 #endif
1869 }
1870
1871 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1872 {
1873         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1874 }
1875
1876 static void kvm_gen_update_masterclock(struct kvm *kvm)
1877 {
1878 #ifdef CONFIG_X86_64
1879         int i;
1880         struct kvm_vcpu *vcpu;
1881         struct kvm_arch *ka = &kvm->arch;
1882
1883         spin_lock(&ka->pvclock_gtod_sync_lock);
1884         kvm_make_mclock_inprogress_request(kvm);
1885         /* no guest entries from this point */
1886         pvclock_update_vm_gtod_copy(kvm);
1887
1888         kvm_for_each_vcpu(i, vcpu, kvm)
1889                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1890
1891         /* guest entries allowed */
1892         kvm_for_each_vcpu(i, vcpu, kvm)
1893                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1894
1895         spin_unlock(&ka->pvclock_gtod_sync_lock);
1896 #endif
1897 }
1898
1899 u64 get_kvmclock_ns(struct kvm *kvm)
1900 {
1901         struct kvm_arch *ka = &kvm->arch;
1902         struct pvclock_vcpu_time_info hv_clock;
1903         u64 ret;
1904
1905         spin_lock(&ka->pvclock_gtod_sync_lock);
1906         if (!ka->use_master_clock) {
1907                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1908                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1909         }
1910
1911         hv_clock.tsc_timestamp = ka->master_cycle_now;
1912         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1913         spin_unlock(&ka->pvclock_gtod_sync_lock);
1914
1915         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1916         get_cpu();
1917
1918         if (__this_cpu_read(cpu_tsc_khz)) {
1919                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1920                                    &hv_clock.tsc_shift,
1921                                    &hv_clock.tsc_to_system_mul);
1922                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1923         } else
1924                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1925
1926         put_cpu();
1927
1928         return ret;
1929 }
1930
1931 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1932 {
1933         struct kvm_vcpu_arch *vcpu = &v->arch;
1934         struct pvclock_vcpu_time_info guest_hv_clock;
1935
1936         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1937                 &guest_hv_clock, sizeof(guest_hv_clock))))
1938                 return;
1939
1940         /* This VCPU is paused, but it's legal for a guest to read another
1941          * VCPU's kvmclock, so we really have to follow the specification where
1942          * it says that version is odd if data is being modified, and even after
1943          * it is consistent.
1944          *
1945          * Version field updates must be kept separate.  This is because
1946          * kvm_write_guest_cached might use a "rep movs" instruction, and
1947          * writes within a string instruction are weakly ordered.  So there
1948          * are three writes overall.
1949          *
1950          * As a small optimization, only write the version field in the first
1951          * and third write.  The vcpu->pv_time cache is still valid, because the
1952          * version field is the first in the struct.
1953          */
1954         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1955
1956         if (guest_hv_clock.version & 1)
1957                 ++guest_hv_clock.version;  /* first time write, random junk */
1958
1959         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1960         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1961                                 &vcpu->hv_clock,
1962                                 sizeof(vcpu->hv_clock.version));
1963
1964         smp_wmb();
1965
1966         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1967         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1968
1969         if (vcpu->pvclock_set_guest_stopped_request) {
1970                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1971                 vcpu->pvclock_set_guest_stopped_request = false;
1972         }
1973
1974         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1975
1976         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1977                                 &vcpu->hv_clock,
1978                                 sizeof(vcpu->hv_clock));
1979
1980         smp_wmb();
1981
1982         vcpu->hv_clock.version++;
1983         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1984                                 &vcpu->hv_clock,
1985                                 sizeof(vcpu->hv_clock.version));
1986 }
1987
1988 static int kvm_guest_time_update(struct kvm_vcpu *v)
1989 {
1990         unsigned long flags, tgt_tsc_khz;
1991         struct kvm_vcpu_arch *vcpu = &v->arch;
1992         struct kvm_arch *ka = &v->kvm->arch;
1993         s64 kernel_ns;
1994         u64 tsc_timestamp, host_tsc;
1995         u8 pvclock_flags;
1996         bool use_master_clock;
1997
1998         kernel_ns = 0;
1999         host_tsc = 0;
2000
2001         /*
2002          * If the host uses TSC clock, then passthrough TSC as stable
2003          * to the guest.
2004          */
2005         spin_lock(&ka->pvclock_gtod_sync_lock);
2006         use_master_clock = ka->use_master_clock;
2007         if (use_master_clock) {
2008                 host_tsc = ka->master_cycle_now;
2009                 kernel_ns = ka->master_kernel_ns;
2010         }
2011         spin_unlock(&ka->pvclock_gtod_sync_lock);
2012
2013         /* Keep irq disabled to prevent changes to the clock */
2014         local_irq_save(flags);
2015         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2016         if (unlikely(tgt_tsc_khz == 0)) {
2017                 local_irq_restore(flags);
2018                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2019                 return 1;
2020         }
2021         if (!use_master_clock) {
2022                 host_tsc = rdtsc();
2023                 kernel_ns = ktime_get_boot_ns();
2024         }
2025
2026         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2027
2028         /*
2029          * We may have to catch up the TSC to match elapsed wall clock
2030          * time for two reasons, even if kvmclock is used.
2031          *   1) CPU could have been running below the maximum TSC rate
2032          *   2) Broken TSC compensation resets the base at each VCPU
2033          *      entry to avoid unknown leaps of TSC even when running
2034          *      again on the same CPU.  This may cause apparent elapsed
2035          *      time to disappear, and the guest to stand still or run
2036          *      very slowly.
2037          */
2038         if (vcpu->tsc_catchup) {
2039                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2040                 if (tsc > tsc_timestamp) {
2041                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2042                         tsc_timestamp = tsc;
2043                 }
2044         }
2045
2046         local_irq_restore(flags);
2047
2048         /* With all the info we got, fill in the values */
2049
2050         if (kvm_has_tsc_control)
2051                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2052
2053         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2054                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2055                                    &vcpu->hv_clock.tsc_shift,
2056                                    &vcpu->hv_clock.tsc_to_system_mul);
2057                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2058         }
2059
2060         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2061         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2062         vcpu->last_guest_tsc = tsc_timestamp;
2063
2064         /* If the host uses TSC clocksource, then it is stable */
2065         pvclock_flags = 0;
2066         if (use_master_clock)
2067                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2068
2069         vcpu->hv_clock.flags = pvclock_flags;
2070
2071         if (vcpu->pv_time_enabled)
2072                 kvm_setup_pvclock_page(v);
2073         if (v == kvm_get_vcpu(v->kvm, 0))
2074                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2075         return 0;
2076 }
2077
2078 /*
2079  * kvmclock updates which are isolated to a given vcpu, such as
2080  * vcpu->cpu migration, should not allow system_timestamp from
2081  * the rest of the vcpus to remain static. Otherwise ntp frequency
2082  * correction applies to one vcpu's system_timestamp but not
2083  * the others.
2084  *
2085  * So in those cases, request a kvmclock update for all vcpus.
2086  * We need to rate-limit these requests though, as they can
2087  * considerably slow guests that have a large number of vcpus.
2088  * The time for a remote vcpu to update its kvmclock is bound
2089  * by the delay we use to rate-limit the updates.
2090  */
2091
2092 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2093
2094 static void kvmclock_update_fn(struct work_struct *work)
2095 {
2096         int i;
2097         struct delayed_work *dwork = to_delayed_work(work);
2098         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2099                                            kvmclock_update_work);
2100         struct kvm *kvm = container_of(ka, struct kvm, arch);
2101         struct kvm_vcpu *vcpu;
2102
2103         kvm_for_each_vcpu(i, vcpu, kvm) {
2104                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2105                 kvm_vcpu_kick(vcpu);
2106         }
2107 }
2108
2109 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2110 {
2111         struct kvm *kvm = v->kvm;
2112
2113         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2114         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2115                                         KVMCLOCK_UPDATE_DELAY);
2116 }
2117
2118 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2119
2120 static void kvmclock_sync_fn(struct work_struct *work)
2121 {
2122         struct delayed_work *dwork = to_delayed_work(work);
2123         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2124                                            kvmclock_sync_work);
2125         struct kvm *kvm = container_of(ka, struct kvm, arch);
2126
2127         if (!kvmclock_periodic_sync)
2128                 return;
2129
2130         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2131         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2132                                         KVMCLOCK_SYNC_PERIOD);
2133 }
2134
2135 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2136 {
2137         u64 mcg_cap = vcpu->arch.mcg_cap;
2138         unsigned bank_num = mcg_cap & 0xff;
2139         u32 msr = msr_info->index;
2140         u64 data = msr_info->data;
2141
2142         switch (msr) {
2143         case MSR_IA32_MCG_STATUS:
2144                 vcpu->arch.mcg_status = data;
2145                 break;
2146         case MSR_IA32_MCG_CTL:
2147                 if (!(mcg_cap & MCG_CTL_P))
2148                         return 1;
2149                 if (data != 0 && data != ~(u64)0)
2150                         return -1;
2151                 vcpu->arch.mcg_ctl = data;
2152                 break;
2153         default:
2154                 if (msr >= MSR_IA32_MC0_CTL &&
2155                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2156                         u32 offset = msr - MSR_IA32_MC0_CTL;
2157                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2158                          * some Linux kernels though clear bit 10 in bank 4 to
2159                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2160                          * this to avoid an uncatched #GP in the guest
2161                          */
2162                         if ((offset & 0x3) == 0 &&
2163                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2164                                 return -1;
2165                         if (!msr_info->host_initiated &&
2166                                 (offset & 0x3) == 1 && data != 0)
2167                                 return -1;
2168                         vcpu->arch.mce_banks[offset] = data;
2169                         break;
2170                 }
2171                 return 1;
2172         }
2173         return 0;
2174 }
2175
2176 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2177 {
2178         struct kvm *kvm = vcpu->kvm;
2179         int lm = is_long_mode(vcpu);
2180         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2181                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2182         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2183                 : kvm->arch.xen_hvm_config.blob_size_32;
2184         u32 page_num = data & ~PAGE_MASK;
2185         u64 page_addr = data & PAGE_MASK;
2186         u8 *page;
2187         int r;
2188
2189         r = -E2BIG;
2190         if (page_num >= blob_size)
2191                 goto out;
2192         r = -ENOMEM;
2193         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2194         if (IS_ERR(page)) {
2195                 r = PTR_ERR(page);
2196                 goto out;
2197         }
2198         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2199                 goto out_free;
2200         r = 0;
2201 out_free:
2202         kfree(page);
2203 out:
2204         return r;
2205 }
2206
2207 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2208 {
2209         gpa_t gpa = data & ~0x3f;
2210
2211         /* Bits 3:5 are reserved, Should be zero */
2212         if (data & 0x38)
2213                 return 1;
2214
2215         vcpu->arch.apf.msr_val = data;
2216
2217         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2218                 kvm_clear_async_pf_completion_queue(vcpu);
2219                 kvm_async_pf_hash_reset(vcpu);
2220                 return 0;
2221         }
2222
2223         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2224                                         sizeof(u32)))
2225                 return 1;
2226
2227         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2228         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2229         kvm_async_pf_wakeup_all(vcpu);
2230         return 0;
2231 }
2232
2233 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2234 {
2235         vcpu->arch.pv_time_enabled = false;
2236 }
2237
2238 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2239 {
2240         ++vcpu->stat.tlb_flush;
2241         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2242 }
2243
2244 static void record_steal_time(struct kvm_vcpu *vcpu)
2245 {
2246         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2247                 return;
2248
2249         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2250                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2251                 return;
2252
2253         /*
2254          * Doing a TLB flush here, on the guest's behalf, can avoid
2255          * expensive IPIs.
2256          */
2257         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2258                 kvm_vcpu_flush_tlb(vcpu, false);
2259
2260         if (vcpu->arch.st.steal.version & 1)
2261                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2262
2263         vcpu->arch.st.steal.version += 1;
2264
2265         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2266                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2267
2268         smp_wmb();
2269
2270         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2271                 vcpu->arch.st.last_steal;
2272         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2273
2274         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2275                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2276
2277         smp_wmb();
2278
2279         vcpu->arch.st.steal.version += 1;
2280
2281         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2282                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2283 }
2284
2285 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2286 {
2287         bool pr = false;
2288         u32 msr = msr_info->index;
2289         u64 data = msr_info->data;
2290
2291         switch (msr) {
2292         case MSR_AMD64_NB_CFG:
2293         case MSR_IA32_UCODE_WRITE:
2294         case MSR_VM_HSAVE_PA:
2295         case MSR_AMD64_PATCH_LOADER:
2296         case MSR_AMD64_BU_CFG2:
2297         case MSR_AMD64_DC_CFG:
2298                 break;
2299
2300         case MSR_IA32_UCODE_REV:
2301                 if (msr_info->host_initiated)
2302                         vcpu->arch.microcode_version = data;
2303                 break;
2304         case MSR_EFER:
2305                 return set_efer(vcpu, data);
2306         case MSR_K7_HWCR:
2307                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2308                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2309                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2310                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2311                 if (data != 0) {
2312                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2313                                     data);
2314                         return 1;
2315                 }
2316                 break;
2317         case MSR_FAM10H_MMIO_CONF_BASE:
2318                 if (data != 0) {
2319                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2320                                     "0x%llx\n", data);
2321                         return 1;
2322                 }
2323                 break;
2324         case MSR_IA32_DEBUGCTLMSR:
2325                 if (!data) {
2326                         /* We support the non-activated case already */
2327                         break;
2328                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2329                         /* Values other than LBR and BTF are vendor-specific,
2330                            thus reserved and should throw a #GP */
2331                         return 1;
2332                 }
2333                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2334                             __func__, data);
2335                 break;
2336         case 0x200 ... 0x2ff:
2337                 return kvm_mtrr_set_msr(vcpu, msr, data);
2338         case MSR_IA32_APICBASE:
2339                 return kvm_set_apic_base(vcpu, msr_info);
2340         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2341                 return kvm_x2apic_msr_write(vcpu, msr, data);
2342         case MSR_IA32_TSCDEADLINE:
2343                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2344                 break;
2345         case MSR_IA32_TSC_ADJUST:
2346                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2347                         if (!msr_info->host_initiated) {
2348                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2349                                 adjust_tsc_offset_guest(vcpu, adj);
2350                         }
2351                         vcpu->arch.ia32_tsc_adjust_msr = data;
2352                 }
2353                 break;
2354         case MSR_IA32_MISC_ENABLE:
2355                 vcpu->arch.ia32_misc_enable_msr = data;
2356                 break;
2357         case MSR_IA32_SMBASE:
2358                 if (!msr_info->host_initiated)
2359                         return 1;
2360                 vcpu->arch.smbase = data;
2361                 break;
2362         case MSR_SMI_COUNT:
2363                 if (!msr_info->host_initiated)
2364                         return 1;
2365                 vcpu->arch.smi_count = data;
2366                 break;
2367         case MSR_KVM_WALL_CLOCK_NEW:
2368         case MSR_KVM_WALL_CLOCK:
2369                 vcpu->kvm->arch.wall_clock = data;
2370                 kvm_write_wall_clock(vcpu->kvm, data);
2371                 break;
2372         case MSR_KVM_SYSTEM_TIME_NEW:
2373         case MSR_KVM_SYSTEM_TIME: {
2374                 struct kvm_arch *ka = &vcpu->kvm->arch;
2375
2376                 kvmclock_reset(vcpu);
2377
2378                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2379                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2380
2381                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2382                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2383
2384                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2385                 }
2386
2387                 vcpu->arch.time = data;
2388                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2389
2390                 /* we verify if the enable bit is set... */
2391                 if (!(data & 1))
2392                         break;
2393
2394                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2395                      &vcpu->arch.pv_time, data & ~1ULL,
2396                      sizeof(struct pvclock_vcpu_time_info)))
2397                         vcpu->arch.pv_time_enabled = false;
2398                 else
2399                         vcpu->arch.pv_time_enabled = true;
2400
2401                 break;
2402         }
2403         case MSR_KVM_ASYNC_PF_EN:
2404                 if (kvm_pv_enable_async_pf(vcpu, data))
2405                         return 1;
2406                 break;
2407         case MSR_KVM_STEAL_TIME:
2408
2409                 if (unlikely(!sched_info_on()))
2410                         return 1;
2411
2412                 if (data & KVM_STEAL_RESERVED_MASK)
2413                         return 1;
2414
2415                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2416                                                 data & KVM_STEAL_VALID_BITS,
2417                                                 sizeof(struct kvm_steal_time)))
2418                         return 1;
2419
2420                 vcpu->arch.st.msr_val = data;
2421
2422                 if (!(data & KVM_MSR_ENABLED))
2423                         break;
2424
2425                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2426
2427                 break;
2428         case MSR_KVM_PV_EOI_EN:
2429                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2430                         return 1;
2431                 break;
2432
2433         case MSR_IA32_MCG_CTL:
2434         case MSR_IA32_MCG_STATUS:
2435         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2436                 return set_msr_mce(vcpu, msr_info);
2437
2438         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2439         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2440                 pr = true; /* fall through */
2441         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2442         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2443                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2444                         return kvm_pmu_set_msr(vcpu, msr_info);
2445
2446                 if (pr || data != 0)
2447                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2448                                     "0x%x data 0x%llx\n", msr, data);
2449                 break;
2450         case MSR_K7_CLK_CTL:
2451                 /*
2452                  * Ignore all writes to this no longer documented MSR.
2453                  * Writes are only relevant for old K7 processors,
2454                  * all pre-dating SVM, but a recommended workaround from
2455                  * AMD for these chips. It is possible to specify the
2456                  * affected processor models on the command line, hence
2457                  * the need to ignore the workaround.
2458                  */
2459                 break;
2460         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2461         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2462         case HV_X64_MSR_CRASH_CTL:
2463         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2464         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2465         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2466         case HV_X64_MSR_TSC_EMULATION_STATUS:
2467                 return kvm_hv_set_msr_common(vcpu, msr, data,
2468                                              msr_info->host_initiated);
2469         case MSR_IA32_BBL_CR_CTL3:
2470                 /* Drop writes to this legacy MSR -- see rdmsr
2471                  * counterpart for further detail.
2472                  */
2473                 if (report_ignored_msrs)
2474                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2475                                 msr, data);
2476                 break;
2477         case MSR_AMD64_OSVW_ID_LENGTH:
2478                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2479                         return 1;
2480                 vcpu->arch.osvw.length = data;
2481                 break;
2482         case MSR_AMD64_OSVW_STATUS:
2483                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2484                         return 1;
2485                 vcpu->arch.osvw.status = data;
2486                 break;
2487         case MSR_PLATFORM_INFO:
2488                 if (!msr_info->host_initiated ||
2489                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2490                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2491                      cpuid_fault_enabled(vcpu)))
2492                         return 1;
2493                 vcpu->arch.msr_platform_info = data;
2494                 break;
2495         case MSR_MISC_FEATURES_ENABLES:
2496                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2497                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2498                      !supports_cpuid_fault(vcpu)))
2499                         return 1;
2500                 vcpu->arch.msr_misc_features_enables = data;
2501                 break;
2502         default:
2503                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2504                         return xen_hvm_config(vcpu, data);
2505                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2506                         return kvm_pmu_set_msr(vcpu, msr_info);
2507                 if (!ignore_msrs) {
2508                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2509                                     msr, data);
2510                         return 1;
2511                 } else {
2512                         if (report_ignored_msrs)
2513                                 vcpu_unimpl(vcpu,
2514                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2515                                         msr, data);
2516                         break;
2517                 }
2518         }
2519         return 0;
2520 }
2521 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2522
2523
2524 /*
2525  * Reads an msr value (of 'msr_index') into 'pdata'.
2526  * Returns 0 on success, non-0 otherwise.
2527  * Assumes vcpu_load() was already called.
2528  */
2529 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2530 {
2531         return kvm_x86_ops->get_msr(vcpu, msr);
2532 }
2533 EXPORT_SYMBOL_GPL(kvm_get_msr);
2534
2535 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2536 {
2537         u64 data;
2538         u64 mcg_cap = vcpu->arch.mcg_cap;
2539         unsigned bank_num = mcg_cap & 0xff;
2540
2541         switch (msr) {
2542         case MSR_IA32_P5_MC_ADDR:
2543         case MSR_IA32_P5_MC_TYPE:
2544                 data = 0;
2545                 break;
2546         case MSR_IA32_MCG_CAP:
2547                 data = vcpu->arch.mcg_cap;
2548                 break;
2549         case MSR_IA32_MCG_CTL:
2550                 if (!(mcg_cap & MCG_CTL_P))
2551                         return 1;
2552                 data = vcpu->arch.mcg_ctl;
2553                 break;
2554         case MSR_IA32_MCG_STATUS:
2555                 data = vcpu->arch.mcg_status;
2556                 break;
2557         default:
2558                 if (msr >= MSR_IA32_MC0_CTL &&
2559                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2560                         u32 offset = msr - MSR_IA32_MC0_CTL;
2561                         data = vcpu->arch.mce_banks[offset];
2562                         break;
2563                 }
2564                 return 1;
2565         }
2566         *pdata = data;
2567         return 0;
2568 }
2569
2570 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2571 {
2572         switch (msr_info->index) {
2573         case MSR_IA32_PLATFORM_ID:
2574         case MSR_IA32_EBL_CR_POWERON:
2575         case MSR_IA32_DEBUGCTLMSR:
2576         case MSR_IA32_LASTBRANCHFROMIP:
2577         case MSR_IA32_LASTBRANCHTOIP:
2578         case MSR_IA32_LASTINTFROMIP:
2579         case MSR_IA32_LASTINTTOIP:
2580         case MSR_K8_SYSCFG:
2581         case MSR_K8_TSEG_ADDR:
2582         case MSR_K8_TSEG_MASK:
2583         case MSR_K7_HWCR:
2584         case MSR_VM_HSAVE_PA:
2585         case MSR_K8_INT_PENDING_MSG:
2586         case MSR_AMD64_NB_CFG:
2587         case MSR_FAM10H_MMIO_CONF_BASE:
2588         case MSR_AMD64_BU_CFG2:
2589         case MSR_IA32_PERF_CTL:
2590         case MSR_AMD64_DC_CFG:
2591                 msr_info->data = 0;
2592                 break;
2593         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2594         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2595         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2596         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2597         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2598                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2599                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2600                 msr_info->data = 0;
2601                 break;
2602         case MSR_IA32_UCODE_REV:
2603                 msr_info->data = vcpu->arch.microcode_version;
2604                 break;
2605         case MSR_MTRRcap:
2606         case 0x200 ... 0x2ff:
2607                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2608         case 0xcd: /* fsb frequency */
2609                 msr_info->data = 3;
2610                 break;
2611                 /*
2612                  * MSR_EBC_FREQUENCY_ID
2613                  * Conservative value valid for even the basic CPU models.
2614                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2615                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2616                  * and 266MHz for model 3, or 4. Set Core Clock
2617                  * Frequency to System Bus Frequency Ratio to 1 (bits
2618                  * 31:24) even though these are only valid for CPU
2619                  * models > 2, however guests may end up dividing or
2620                  * multiplying by zero otherwise.
2621                  */
2622         case MSR_EBC_FREQUENCY_ID:
2623                 msr_info->data = 1 << 24;
2624                 break;
2625         case MSR_IA32_APICBASE:
2626                 msr_info->data = kvm_get_apic_base(vcpu);
2627                 break;
2628         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2629                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2630                 break;
2631         case MSR_IA32_TSCDEADLINE:
2632                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2633                 break;
2634         case MSR_IA32_TSC_ADJUST:
2635                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2636                 break;
2637         case MSR_IA32_MISC_ENABLE:
2638                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2639                 break;
2640         case MSR_IA32_SMBASE:
2641                 if (!msr_info->host_initiated)
2642                         return 1;
2643                 msr_info->data = vcpu->arch.smbase;
2644                 break;
2645         case MSR_SMI_COUNT:
2646                 msr_info->data = vcpu->arch.smi_count;
2647                 break;
2648         case MSR_IA32_PERF_STATUS:
2649                 /* TSC increment by tick */
2650                 msr_info->data = 1000ULL;
2651                 /* CPU multiplier */
2652                 msr_info->data |= (((uint64_t)4ULL) << 40);
2653                 break;
2654         case MSR_EFER:
2655                 msr_info->data = vcpu->arch.efer;
2656                 break;
2657         case MSR_KVM_WALL_CLOCK:
2658         case MSR_KVM_WALL_CLOCK_NEW:
2659                 msr_info->data = vcpu->kvm->arch.wall_clock;
2660                 break;
2661         case MSR_KVM_SYSTEM_TIME:
2662         case MSR_KVM_SYSTEM_TIME_NEW:
2663                 msr_info->data = vcpu->arch.time;
2664                 break;
2665         case MSR_KVM_ASYNC_PF_EN:
2666                 msr_info->data = vcpu->arch.apf.msr_val;
2667                 break;
2668         case MSR_KVM_STEAL_TIME:
2669                 msr_info->data = vcpu->arch.st.msr_val;
2670                 break;
2671         case MSR_KVM_PV_EOI_EN:
2672                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2673                 break;
2674         case MSR_IA32_P5_MC_ADDR:
2675         case MSR_IA32_P5_MC_TYPE:
2676         case MSR_IA32_MCG_CAP:
2677         case MSR_IA32_MCG_CTL:
2678         case MSR_IA32_MCG_STATUS:
2679         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2680                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2681         case MSR_K7_CLK_CTL:
2682                 /*
2683                  * Provide expected ramp-up count for K7. All other
2684                  * are set to zero, indicating minimum divisors for
2685                  * every field.
2686                  *
2687                  * This prevents guest kernels on AMD host with CPU
2688                  * type 6, model 8 and higher from exploding due to
2689                  * the rdmsr failing.
2690                  */
2691                 msr_info->data = 0x20000000;
2692                 break;
2693         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2694         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2695         case HV_X64_MSR_CRASH_CTL:
2696         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2697         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2698         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2699         case HV_X64_MSR_TSC_EMULATION_STATUS:
2700                 return kvm_hv_get_msr_common(vcpu,
2701                                              msr_info->index, &msr_info->data);
2702                 break;
2703         case MSR_IA32_BBL_CR_CTL3:
2704                 /* This legacy MSR exists but isn't fully documented in current
2705                  * silicon.  It is however accessed by winxp in very narrow
2706                  * scenarios where it sets bit #19, itself documented as
2707                  * a "reserved" bit.  Best effort attempt to source coherent
2708                  * read data here should the balance of the register be
2709                  * interpreted by the guest:
2710                  *
2711                  * L2 cache control register 3: 64GB range, 256KB size,
2712                  * enabled, latency 0x1, configured
2713                  */
2714                 msr_info->data = 0xbe702111;
2715                 break;
2716         case MSR_AMD64_OSVW_ID_LENGTH:
2717                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2718                         return 1;
2719                 msr_info->data = vcpu->arch.osvw.length;
2720                 break;
2721         case MSR_AMD64_OSVW_STATUS:
2722                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2723                         return 1;
2724                 msr_info->data = vcpu->arch.osvw.status;
2725                 break;
2726         case MSR_PLATFORM_INFO:
2727                 msr_info->data = vcpu->arch.msr_platform_info;
2728                 break;
2729         case MSR_MISC_FEATURES_ENABLES:
2730                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2731                 break;
2732         default:
2733                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2734                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2735                 if (!ignore_msrs) {
2736                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2737                                                msr_info->index);
2738                         return 1;
2739                 } else {
2740                         if (report_ignored_msrs)
2741                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2742                                         msr_info->index);
2743                         msr_info->data = 0;
2744                 }
2745                 break;
2746         }
2747         return 0;
2748 }
2749 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2750
2751 /*
2752  * Read or write a bunch of msrs. All parameters are kernel addresses.
2753  *
2754  * @return number of msrs set successfully.
2755  */
2756 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2757                     struct kvm_msr_entry *entries,
2758                     int (*do_msr)(struct kvm_vcpu *vcpu,
2759                                   unsigned index, u64 *data))
2760 {
2761         int i;
2762
2763         for (i = 0; i < msrs->nmsrs; ++i)
2764                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2765                         break;
2766
2767         return i;
2768 }
2769
2770 /*
2771  * Read or write a bunch of msrs. Parameters are user addresses.
2772  *
2773  * @return number of msrs set successfully.
2774  */
2775 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2776                   int (*do_msr)(struct kvm_vcpu *vcpu,
2777                                 unsigned index, u64 *data),
2778                   int writeback)
2779 {
2780         struct kvm_msrs msrs;
2781         struct kvm_msr_entry *entries;
2782         int r, n;
2783         unsigned size;
2784
2785         r = -EFAULT;
2786         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2787                 goto out;
2788
2789         r = -E2BIG;
2790         if (msrs.nmsrs >= MAX_IO_MSRS)
2791                 goto out;
2792
2793         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2794         entries = memdup_user(user_msrs->entries, size);
2795         if (IS_ERR(entries)) {
2796                 r = PTR_ERR(entries);
2797                 goto out;
2798         }
2799
2800         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2801         if (r < 0)
2802                 goto out_free;
2803
2804         r = -EFAULT;
2805         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2806                 goto out_free;
2807
2808         r = n;
2809
2810 out_free:
2811         kfree(entries);
2812 out:
2813         return r;
2814 }
2815
2816 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2817 {
2818         int r;
2819
2820         switch (ext) {
2821         case KVM_CAP_IRQCHIP:
2822         case KVM_CAP_HLT:
2823         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2824         case KVM_CAP_SET_TSS_ADDR:
2825         case KVM_CAP_EXT_CPUID:
2826         case KVM_CAP_EXT_EMUL_CPUID:
2827         case KVM_CAP_CLOCKSOURCE:
2828         case KVM_CAP_PIT:
2829         case KVM_CAP_NOP_IO_DELAY:
2830         case KVM_CAP_MP_STATE:
2831         case KVM_CAP_SYNC_MMU:
2832         case KVM_CAP_USER_NMI:
2833         case KVM_CAP_REINJECT_CONTROL:
2834         case KVM_CAP_IRQ_INJECT_STATUS:
2835         case KVM_CAP_IOEVENTFD:
2836         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2837         case KVM_CAP_PIT2:
2838         case KVM_CAP_PIT_STATE2:
2839         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2840         case KVM_CAP_XEN_HVM:
2841         case KVM_CAP_VCPU_EVENTS:
2842         case KVM_CAP_HYPERV:
2843         case KVM_CAP_HYPERV_VAPIC:
2844         case KVM_CAP_HYPERV_SPIN:
2845         case KVM_CAP_HYPERV_SYNIC:
2846         case KVM_CAP_HYPERV_SYNIC2:
2847         case KVM_CAP_HYPERV_VP_INDEX:
2848         case KVM_CAP_HYPERV_EVENTFD:
2849         case KVM_CAP_PCI_SEGMENT:
2850         case KVM_CAP_DEBUGREGS:
2851         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2852         case KVM_CAP_XSAVE:
2853         case KVM_CAP_ASYNC_PF:
2854         case KVM_CAP_GET_TSC_KHZ:
2855         case KVM_CAP_KVMCLOCK_CTRL:
2856         case KVM_CAP_READONLY_MEM:
2857         case KVM_CAP_HYPERV_TIME:
2858         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2859         case KVM_CAP_TSC_DEADLINE_TIMER:
2860         case KVM_CAP_ENABLE_CAP_VM:
2861         case KVM_CAP_DISABLE_QUIRKS:
2862         case KVM_CAP_SET_BOOT_CPU_ID:
2863         case KVM_CAP_SPLIT_IRQCHIP:
2864         case KVM_CAP_IMMEDIATE_EXIT:
2865         case KVM_CAP_GET_MSR_FEATURES:
2866                 r = 1;
2867                 break;
2868         case KVM_CAP_SYNC_REGS:
2869                 r = KVM_SYNC_X86_VALID_FIELDS;
2870                 break;
2871         case KVM_CAP_ADJUST_CLOCK:
2872                 r = KVM_CLOCK_TSC_STABLE;
2873                 break;
2874         case KVM_CAP_X86_GUEST_MWAIT:
2875                 r = kvm_mwait_in_guest();
2876                 break;
2877         case KVM_CAP_X86_SMM:
2878                 /* SMBASE is usually relocated above 1M on modern chipsets,
2879                  * and SMM handlers might indeed rely on 4G segment limits,
2880                  * so do not report SMM to be available if real mode is
2881                  * emulated via vm86 mode.  Still, do not go to great lengths
2882                  * to avoid userspace's usage of the feature, because it is a
2883                  * fringe case that is not enabled except via specific settings
2884                  * of the module parameters.
2885                  */
2886                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2887                 break;
2888         case KVM_CAP_VAPIC:
2889                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2890                 break;
2891         case KVM_CAP_NR_VCPUS:
2892                 r = KVM_SOFT_MAX_VCPUS;
2893                 break;
2894         case KVM_CAP_MAX_VCPUS:
2895                 r = KVM_MAX_VCPUS;
2896                 break;
2897         case KVM_CAP_NR_MEMSLOTS:
2898                 r = KVM_USER_MEM_SLOTS;
2899                 break;
2900         case KVM_CAP_PV_MMU:    /* obsolete */
2901                 r = 0;
2902                 break;
2903         case KVM_CAP_MCE:
2904                 r = KVM_MAX_MCE_BANKS;
2905                 break;
2906         case KVM_CAP_XCRS:
2907                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2908                 break;
2909         case KVM_CAP_TSC_CONTROL:
2910                 r = kvm_has_tsc_control;
2911                 break;
2912         case KVM_CAP_X2APIC_API:
2913                 r = KVM_X2APIC_API_VALID_FLAGS;
2914                 break;
2915         default:
2916                 r = 0;
2917                 break;
2918         }
2919         return r;
2920
2921 }
2922
2923 long kvm_arch_dev_ioctl(struct file *filp,
2924                         unsigned int ioctl, unsigned long arg)
2925 {
2926         void __user *argp = (void __user *)arg;
2927         long r;
2928
2929         switch (ioctl) {
2930         case KVM_GET_MSR_INDEX_LIST: {
2931                 struct kvm_msr_list __user *user_msr_list = argp;
2932                 struct kvm_msr_list msr_list;
2933                 unsigned n;
2934
2935                 r = -EFAULT;
2936                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2937                         goto out;
2938                 n = msr_list.nmsrs;
2939                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2940                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2941                         goto out;
2942                 r = -E2BIG;
2943                 if (n < msr_list.nmsrs)
2944                         goto out;
2945                 r = -EFAULT;
2946                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2947                                  num_msrs_to_save * sizeof(u32)))
2948                         goto out;
2949                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2950                                  &emulated_msrs,
2951                                  num_emulated_msrs * sizeof(u32)))
2952                         goto out;
2953                 r = 0;
2954                 break;
2955         }
2956         case KVM_GET_SUPPORTED_CPUID:
2957         case KVM_GET_EMULATED_CPUID: {
2958                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2959                 struct kvm_cpuid2 cpuid;
2960
2961                 r = -EFAULT;
2962                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2963                         goto out;
2964
2965                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2966                                             ioctl);
2967                 if (r)
2968                         goto out;
2969
2970                 r = -EFAULT;
2971                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2972                         goto out;
2973                 r = 0;
2974                 break;
2975         }
2976         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2977                 r = -EFAULT;
2978                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2979                                  sizeof(kvm_mce_cap_supported)))
2980                         goto out;
2981                 r = 0;
2982                 break;
2983         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
2984                 struct kvm_msr_list __user *user_msr_list = argp;
2985                 struct kvm_msr_list msr_list;
2986                 unsigned int n;
2987
2988                 r = -EFAULT;
2989                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
2990                         goto out;
2991                 n = msr_list.nmsrs;
2992                 msr_list.nmsrs = num_msr_based_features;
2993                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
2994                         goto out;
2995                 r = -E2BIG;
2996                 if (n < msr_list.nmsrs)
2997                         goto out;
2998                 r = -EFAULT;
2999                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3000                                  num_msr_based_features * sizeof(u32)))
3001                         goto out;
3002                 r = 0;
3003                 break;
3004         }
3005         case KVM_GET_MSRS:
3006                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3007                 break;
3008         }
3009         default:
3010                 r = -EINVAL;
3011         }
3012 out:
3013         return r;
3014 }
3015
3016 static void wbinvd_ipi(void *garbage)
3017 {
3018         wbinvd();
3019 }
3020
3021 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3022 {
3023         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3024 }
3025
3026 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3027 {
3028         /* Address WBINVD may be executed by guest */
3029         if (need_emulate_wbinvd(vcpu)) {
3030                 if (kvm_x86_ops->has_wbinvd_exit())
3031                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3032                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3033                         smp_call_function_single(vcpu->cpu,
3034                                         wbinvd_ipi, NULL, 1);
3035         }
3036
3037         kvm_x86_ops->vcpu_load(vcpu, cpu);
3038
3039         /* Apply any externally detected TSC adjustments (due to suspend) */
3040         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3041                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3042                 vcpu->arch.tsc_offset_adjustment = 0;
3043                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3044         }
3045
3046         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3047                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3048                                 rdtsc() - vcpu->arch.last_host_tsc;
3049                 if (tsc_delta < 0)
3050                         mark_tsc_unstable("KVM discovered backwards TSC");
3051
3052                 if (kvm_check_tsc_unstable()) {
3053                         u64 offset = kvm_compute_tsc_offset(vcpu,
3054                                                 vcpu->arch.last_guest_tsc);
3055                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3056                         vcpu->arch.tsc_catchup = 1;
3057                 }
3058
3059                 if (kvm_lapic_hv_timer_in_use(vcpu))
3060                         kvm_lapic_restart_hv_timer(vcpu);
3061
3062                 /*
3063                  * On a host with synchronized TSC, there is no need to update
3064                  * kvmclock on vcpu->cpu migration
3065                  */
3066                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3067                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3068                 if (vcpu->cpu != cpu)
3069                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3070                 vcpu->cpu = cpu;
3071         }
3072
3073         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3074 }
3075
3076 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3077 {
3078         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3079                 return;
3080
3081         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3082
3083         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3084                         &vcpu->arch.st.steal.preempted,
3085                         offsetof(struct kvm_steal_time, preempted),
3086                         sizeof(vcpu->arch.st.steal.preempted));
3087 }
3088
3089 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3090 {
3091         int idx;
3092
3093         if (vcpu->preempted)
3094                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3095
3096         /*
3097          * Disable page faults because we're in atomic context here.
3098          * kvm_write_guest_offset_cached() would call might_fault()
3099          * that relies on pagefault_disable() to tell if there's a
3100          * bug. NOTE: the write to guest memory may not go through if
3101          * during postcopy live migration or if there's heavy guest
3102          * paging.
3103          */
3104         pagefault_disable();
3105         /*
3106          * kvm_memslots() will be called by
3107          * kvm_write_guest_offset_cached() so take the srcu lock.
3108          */
3109         idx = srcu_read_lock(&vcpu->kvm->srcu);
3110         kvm_steal_time_set_preempted(vcpu);
3111         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3112         pagefault_enable();
3113         kvm_x86_ops->vcpu_put(vcpu);
3114         vcpu->arch.last_host_tsc = rdtsc();
3115         /*
3116          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3117          * on every vmexit, but if not, we might have a stale dr6 from the
3118          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3119          */
3120         set_debugreg(0, 6);
3121 }
3122
3123 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3124                                     struct kvm_lapic_state *s)
3125 {
3126         if (vcpu->arch.apicv_active)
3127                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3128
3129         return kvm_apic_get_state(vcpu, s);
3130 }
3131
3132 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3133                                     struct kvm_lapic_state *s)
3134 {
3135         int r;
3136
3137         r = kvm_apic_set_state(vcpu, s);
3138         if (r)
3139                 return r;
3140         update_cr8_intercept(vcpu);
3141
3142         return 0;
3143 }
3144
3145 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3146 {
3147         return (!lapic_in_kernel(vcpu) ||
3148                 kvm_apic_accept_pic_intr(vcpu));
3149 }
3150
3151 /*
3152  * if userspace requested an interrupt window, check that the
3153  * interrupt window is open.
3154  *
3155  * No need to exit to userspace if we already have an interrupt queued.
3156  */
3157 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3158 {
3159         return kvm_arch_interrupt_allowed(vcpu) &&
3160                 !kvm_cpu_has_interrupt(vcpu) &&
3161                 !kvm_event_needs_reinjection(vcpu) &&
3162                 kvm_cpu_accept_dm_intr(vcpu);
3163 }
3164
3165 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3166                                     struct kvm_interrupt *irq)
3167 {
3168         if (irq->irq >= KVM_NR_INTERRUPTS)
3169                 return -EINVAL;
3170
3171         if (!irqchip_in_kernel(vcpu->kvm)) {
3172                 kvm_queue_interrupt(vcpu, irq->irq, false);
3173                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3174                 return 0;
3175         }
3176
3177         /*
3178          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3179          * fail for in-kernel 8259.
3180          */
3181         if (pic_in_kernel(vcpu->kvm))
3182                 return -ENXIO;
3183
3184         if (vcpu->arch.pending_external_vector != -1)
3185                 return -EEXIST;
3186
3187         vcpu->arch.pending_external_vector = irq->irq;
3188         kvm_make_request(KVM_REQ_EVENT, vcpu);
3189         return 0;
3190 }
3191
3192 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3193 {
3194         kvm_inject_nmi(vcpu);
3195
3196         return 0;
3197 }
3198
3199 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3200 {
3201         kvm_make_request(KVM_REQ_SMI, vcpu);
3202
3203         return 0;
3204 }
3205
3206 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3207                                            struct kvm_tpr_access_ctl *tac)
3208 {
3209         if (tac->flags)
3210                 return -EINVAL;
3211         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3212         return 0;
3213 }
3214
3215 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3216                                         u64 mcg_cap)
3217 {
3218         int r;
3219         unsigned bank_num = mcg_cap & 0xff, bank;
3220
3221         r = -EINVAL;
3222         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3223                 goto out;
3224         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3225                 goto out;
3226         r = 0;
3227         vcpu->arch.mcg_cap = mcg_cap;
3228         /* Init IA32_MCG_CTL to all 1s */
3229         if (mcg_cap & MCG_CTL_P)
3230                 vcpu->arch.mcg_ctl = ~(u64)0;
3231         /* Init IA32_MCi_CTL to all 1s */
3232         for (bank = 0; bank < bank_num; bank++)
3233                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3234
3235         if (kvm_x86_ops->setup_mce)
3236                 kvm_x86_ops->setup_mce(vcpu);
3237 out:
3238         return r;
3239 }
3240
3241 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3242                                       struct kvm_x86_mce *mce)
3243 {
3244         u64 mcg_cap = vcpu->arch.mcg_cap;
3245         unsigned bank_num = mcg_cap & 0xff;
3246         u64 *banks = vcpu->arch.mce_banks;
3247
3248         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3249                 return -EINVAL;
3250         /*
3251          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3252          * reporting is disabled
3253          */
3254         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3255             vcpu->arch.mcg_ctl != ~(u64)0)
3256                 return 0;
3257         banks += 4 * mce->bank;
3258         /*
3259          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3260          * reporting is disabled for the bank
3261          */
3262         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3263                 return 0;
3264         if (mce->status & MCI_STATUS_UC) {
3265                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3266                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3267                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3268                         return 0;
3269                 }
3270                 if (banks[1] & MCI_STATUS_VAL)
3271                         mce->status |= MCI_STATUS_OVER;
3272                 banks[2] = mce->addr;
3273                 banks[3] = mce->misc;
3274                 vcpu->arch.mcg_status = mce->mcg_status;
3275                 banks[1] = mce->status;
3276                 kvm_queue_exception(vcpu, MC_VECTOR);
3277         } else if (!(banks[1] & MCI_STATUS_VAL)
3278                    || !(banks[1] & MCI_STATUS_UC)) {
3279                 if (banks[1] & MCI_STATUS_VAL)
3280                         mce->status |= MCI_STATUS_OVER;
3281                 banks[2] = mce->addr;
3282                 banks[3] = mce->misc;
3283                 banks[1] = mce->status;
3284         } else
3285                 banks[1] |= MCI_STATUS_OVER;
3286         return 0;
3287 }
3288
3289 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3290                                                struct kvm_vcpu_events *events)
3291 {
3292         process_nmi(vcpu);
3293         /*
3294          * FIXME: pass injected and pending separately.  This is only
3295          * needed for nested virtualization, whose state cannot be
3296          * migrated yet.  For now we can combine them.
3297          */
3298         events->exception.injected =
3299                 (vcpu->arch.exception.pending ||
3300                  vcpu->arch.exception.injected) &&
3301                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3302         events->exception.nr = vcpu->arch.exception.nr;
3303         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3304         events->exception.pad = 0;
3305         events->exception.error_code = vcpu->arch.exception.error_code;
3306
3307         events->interrupt.injected =
3308                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3309         events->interrupt.nr = vcpu->arch.interrupt.nr;
3310         events->interrupt.soft = 0;
3311         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3312
3313         events->nmi.injected = vcpu->arch.nmi_injected;
3314         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3315         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3316         events->nmi.pad = 0;
3317
3318         events->sipi_vector = 0; /* never valid when reporting to user space */
3319
3320         events->smi.smm = is_smm(vcpu);
3321         events->smi.pending = vcpu->arch.smi_pending;
3322         events->smi.smm_inside_nmi =
3323                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3324         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3325
3326         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3327                          | KVM_VCPUEVENT_VALID_SHADOW
3328                          | KVM_VCPUEVENT_VALID_SMM);
3329         memset(&events->reserved, 0, sizeof(events->reserved));
3330 }
3331
3332 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3333
3334 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3335                                               struct kvm_vcpu_events *events)
3336 {
3337         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3338                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3339                               | KVM_VCPUEVENT_VALID_SHADOW
3340                               | KVM_VCPUEVENT_VALID_SMM))
3341                 return -EINVAL;
3342
3343         if (events->exception.injected &&
3344             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3345              is_guest_mode(vcpu)))
3346                 return -EINVAL;
3347
3348         /* INITs are latched while in SMM */
3349         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3350             (events->smi.smm || events->smi.pending) &&
3351             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3352                 return -EINVAL;
3353
3354         process_nmi(vcpu);
3355         vcpu->arch.exception.injected = false;
3356         vcpu->arch.exception.pending = events->exception.injected;
3357         vcpu->arch.exception.nr = events->exception.nr;
3358         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3359         vcpu->arch.exception.error_code = events->exception.error_code;
3360
3361         vcpu->arch.interrupt.pending = events->interrupt.injected;
3362         vcpu->arch.interrupt.nr = events->interrupt.nr;
3363         vcpu->arch.interrupt.soft = events->interrupt.soft;
3364         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3365                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3366                                                   events->interrupt.shadow);
3367
3368         vcpu->arch.nmi_injected = events->nmi.injected;
3369         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3370                 vcpu->arch.nmi_pending = events->nmi.pending;
3371         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3372
3373         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3374             lapic_in_kernel(vcpu))
3375                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3376
3377         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3378                 u32 hflags = vcpu->arch.hflags;
3379                 if (events->smi.smm)
3380                         hflags |= HF_SMM_MASK;
3381                 else
3382                         hflags &= ~HF_SMM_MASK;
3383                 kvm_set_hflags(vcpu, hflags);
3384
3385                 vcpu->arch.smi_pending = events->smi.pending;
3386
3387                 if (events->smi.smm) {
3388                         if (events->smi.smm_inside_nmi)
3389                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3390                         else
3391                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3392                         if (lapic_in_kernel(vcpu)) {
3393                                 if (events->smi.latched_init)
3394                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3395                                 else
3396                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3397                         }
3398                 }
3399         }
3400
3401         kvm_make_request(KVM_REQ_EVENT, vcpu);
3402
3403         return 0;
3404 }
3405
3406 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3407                                              struct kvm_debugregs *dbgregs)
3408 {
3409         unsigned long val;
3410
3411         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3412         kvm_get_dr(vcpu, 6, &val);
3413         dbgregs->dr6 = val;
3414         dbgregs->dr7 = vcpu->arch.dr7;
3415         dbgregs->flags = 0;
3416         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3417 }
3418
3419 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3420                                             struct kvm_debugregs *dbgregs)
3421 {
3422         if (dbgregs->flags)
3423                 return -EINVAL;
3424
3425         if (dbgregs->dr6 & ~0xffffffffull)
3426                 return -EINVAL;
3427         if (dbgregs->dr7 & ~0xffffffffull)
3428                 return -EINVAL;
3429
3430         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3431         kvm_update_dr0123(vcpu);
3432         vcpu->arch.dr6 = dbgregs->dr6;
3433         kvm_update_dr6(vcpu);
3434         vcpu->arch.dr7 = dbgregs->dr7;
3435         kvm_update_dr7(vcpu);
3436
3437         return 0;
3438 }
3439
3440 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3441
3442 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3443 {
3444         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3445         u64 xstate_bv = xsave->header.xfeatures;
3446         u64 valid;
3447
3448         /*
3449          * Copy legacy XSAVE area, to avoid complications with CPUID
3450          * leaves 0 and 1 in the loop below.
3451          */
3452         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3453
3454         /* Set XSTATE_BV */
3455         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3456         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3457
3458         /*
3459          * Copy each region from the possibly compacted offset to the
3460          * non-compacted offset.
3461          */
3462         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3463         while (valid) {
3464                 u64 feature = valid & -valid;
3465                 int index = fls64(feature) - 1;
3466                 void *src = get_xsave_addr(xsave, feature);
3467
3468                 if (src) {
3469                         u32 size, offset, ecx, edx;
3470                         cpuid_count(XSTATE_CPUID, index,
3471                                     &size, &offset, &ecx, &edx);
3472                         if (feature == XFEATURE_MASK_PKRU)
3473                                 memcpy(dest + offset, &vcpu->arch.pkru,
3474                                        sizeof(vcpu->arch.pkru));
3475                         else
3476                                 memcpy(dest + offset, src, size);
3477
3478                 }
3479
3480                 valid -= feature;
3481         }
3482 }
3483
3484 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3485 {
3486         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3487         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3488         u64 valid;
3489
3490         /*
3491          * Copy legacy XSAVE area, to avoid complications with CPUID
3492          * leaves 0 and 1 in the loop below.
3493          */
3494         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3495
3496         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3497         xsave->header.xfeatures = xstate_bv;
3498         if (boot_cpu_has(X86_FEATURE_XSAVES))
3499                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3500
3501         /*
3502          * Copy each region from the non-compacted offset to the
3503          * possibly compacted offset.
3504          */
3505         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3506         while (valid) {
3507                 u64 feature = valid & -valid;
3508                 int index = fls64(feature) - 1;
3509                 void *dest = get_xsave_addr(xsave, feature);
3510
3511                 if (dest) {
3512                         u32 size, offset, ecx, edx;
3513                         cpuid_count(XSTATE_CPUID, index,
3514                                     &size, &offset, &ecx, &edx);
3515                         if (feature == XFEATURE_MASK_PKRU)
3516                                 memcpy(&vcpu->arch.pkru, src + offset,
3517                                        sizeof(vcpu->arch.pkru));
3518                         else
3519                                 memcpy(dest, src + offset, size);
3520                 }
3521
3522                 valid -= feature;
3523         }
3524 }
3525
3526 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3527                                          struct kvm_xsave *guest_xsave)
3528 {
3529         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3530                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3531                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3532         } else {
3533                 memcpy(guest_xsave->region,
3534                         &vcpu->arch.guest_fpu.state.fxsave,
3535                         sizeof(struct fxregs_state));
3536                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3537                         XFEATURE_MASK_FPSSE;
3538         }
3539 }
3540
3541 #define XSAVE_MXCSR_OFFSET 24
3542
3543 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3544                                         struct kvm_xsave *guest_xsave)
3545 {
3546         u64 xstate_bv =
3547                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3548         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3549
3550         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3551                 /*
3552                  * Here we allow setting states that are not present in
3553                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3554                  * with old userspace.
3555                  */
3556                 if (xstate_bv & ~kvm_supported_xcr0() ||
3557                         mxcsr & ~mxcsr_feature_mask)
3558                         return -EINVAL;
3559                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3560         } else {
3561                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3562                         mxcsr & ~mxcsr_feature_mask)
3563                         return -EINVAL;
3564                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3565                         guest_xsave->region, sizeof(struct fxregs_state));
3566         }
3567         return 0;
3568 }
3569
3570 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3571                                         struct kvm_xcrs *guest_xcrs)
3572 {
3573         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3574                 guest_xcrs->nr_xcrs = 0;
3575                 return;
3576         }
3577
3578         guest_xcrs->nr_xcrs = 1;
3579         guest_xcrs->flags = 0;
3580         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3581         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3582 }
3583
3584 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3585                                        struct kvm_xcrs *guest_xcrs)
3586 {
3587         int i, r = 0;
3588
3589         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3590                 return -EINVAL;
3591
3592         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3593                 return -EINVAL;
3594
3595         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3596                 /* Only support XCR0 currently */
3597                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3598                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3599                                 guest_xcrs->xcrs[i].value);
3600                         break;
3601                 }
3602         if (r)
3603                 r = -EINVAL;
3604         return r;
3605 }
3606
3607 /*
3608  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3609  * stopped by the hypervisor.  This function will be called from the host only.
3610  * EINVAL is returned when the host attempts to set the flag for a guest that
3611  * does not support pv clocks.
3612  */
3613 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3614 {
3615         if (!vcpu->arch.pv_time_enabled)
3616                 return -EINVAL;
3617         vcpu->arch.pvclock_set_guest_stopped_request = true;
3618         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3619         return 0;
3620 }
3621
3622 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3623                                      struct kvm_enable_cap *cap)
3624 {
3625         if (cap->flags)
3626                 return -EINVAL;
3627
3628         switch (cap->cap) {
3629         case KVM_CAP_HYPERV_SYNIC2:
3630                 if (cap->args[0])
3631                         return -EINVAL;
3632         case KVM_CAP_HYPERV_SYNIC:
3633                 if (!irqchip_in_kernel(vcpu->kvm))
3634                         return -EINVAL;
3635                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3636                                              KVM_CAP_HYPERV_SYNIC2);
3637         default:
3638                 return -EINVAL;
3639         }
3640 }
3641
3642 long kvm_arch_vcpu_ioctl(struct file *filp,
3643                          unsigned int ioctl, unsigned long arg)
3644 {
3645         struct kvm_vcpu *vcpu = filp->private_data;
3646         void __user *argp = (void __user *)arg;
3647         int r;
3648         union {
3649                 struct kvm_lapic_state *lapic;
3650                 struct kvm_xsave *xsave;
3651                 struct kvm_xcrs *xcrs;
3652                 void *buffer;
3653         } u;
3654
3655         vcpu_load(vcpu);
3656
3657         u.buffer = NULL;
3658         switch (ioctl) {
3659         case KVM_GET_LAPIC: {
3660                 r = -EINVAL;
3661                 if (!lapic_in_kernel(vcpu))
3662                         goto out;
3663                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3664
3665                 r = -ENOMEM;
3666                 if (!u.lapic)
3667                         goto out;
3668                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3669                 if (r)
3670                         goto out;
3671                 r = -EFAULT;
3672                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3673                         goto out;
3674                 r = 0;
3675                 break;
3676         }
3677         case KVM_SET_LAPIC: {
3678                 r = -EINVAL;
3679                 if (!lapic_in_kernel(vcpu))
3680                         goto out;
3681                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3682                 if (IS_ERR(u.lapic)) {
3683                         r = PTR_ERR(u.lapic);
3684                         goto out_nofree;
3685                 }
3686
3687                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3688                 break;
3689         }
3690         case KVM_INTERRUPT: {
3691                 struct kvm_interrupt irq;
3692
3693                 r = -EFAULT;
3694                 if (copy_from_user(&irq, argp, sizeof irq))
3695                         goto out;
3696                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3697                 break;
3698         }
3699         case KVM_NMI: {
3700                 r = kvm_vcpu_ioctl_nmi(vcpu);
3701                 break;
3702         }
3703         case KVM_SMI: {
3704                 r = kvm_vcpu_ioctl_smi(vcpu);
3705                 break;
3706         }
3707         case KVM_SET_CPUID: {
3708                 struct kvm_cpuid __user *cpuid_arg = argp;
3709                 struct kvm_cpuid cpuid;
3710
3711                 r = -EFAULT;
3712                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3713                         goto out;
3714                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3715                 break;
3716         }
3717         case KVM_SET_CPUID2: {
3718                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3719                 struct kvm_cpuid2 cpuid;
3720
3721                 r = -EFAULT;
3722                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3723                         goto out;
3724                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3725                                               cpuid_arg->entries);
3726                 break;
3727         }
3728         case KVM_GET_CPUID2: {
3729                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3730                 struct kvm_cpuid2 cpuid;
3731
3732                 r = -EFAULT;
3733                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3734                         goto out;
3735                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3736                                               cpuid_arg->entries);
3737                 if (r)
3738                         goto out;
3739                 r = -EFAULT;
3740                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3741                         goto out;
3742                 r = 0;
3743                 break;
3744         }
3745         case KVM_GET_MSRS: {
3746                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3747                 r = msr_io(vcpu, argp, do_get_msr, 1);
3748                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3749                 break;
3750         }
3751         case KVM_SET_MSRS: {
3752                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3753                 r = msr_io(vcpu, argp, do_set_msr, 0);
3754                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3755                 break;
3756         }
3757         case KVM_TPR_ACCESS_REPORTING: {
3758                 struct kvm_tpr_access_ctl tac;
3759
3760                 r = -EFAULT;
3761                 if (copy_from_user(&tac, argp, sizeof tac))
3762                         goto out;
3763                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3764                 if (r)
3765                         goto out;
3766                 r = -EFAULT;
3767                 if (copy_to_user(argp, &tac, sizeof tac))
3768                         goto out;
3769                 r = 0;
3770                 break;
3771         };
3772         case KVM_SET_VAPIC_ADDR: {
3773                 struct kvm_vapic_addr va;
3774                 int idx;
3775
3776                 r = -EINVAL;
3777                 if (!lapic_in_kernel(vcpu))
3778                         goto out;
3779                 r = -EFAULT;
3780                 if (copy_from_user(&va, argp, sizeof va))
3781                         goto out;
3782                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3783                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3784                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3785                 break;
3786         }
3787         case KVM_X86_SETUP_MCE: {
3788                 u64 mcg_cap;
3789
3790                 r = -EFAULT;
3791                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3792                         goto out;
3793                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3794                 break;
3795         }
3796         case KVM_X86_SET_MCE: {
3797                 struct kvm_x86_mce mce;
3798
3799                 r = -EFAULT;
3800                 if (copy_from_user(&mce, argp, sizeof mce))
3801                         goto out;
3802                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3803                 break;
3804         }
3805         case KVM_GET_VCPU_EVENTS: {
3806                 struct kvm_vcpu_events events;
3807
3808                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3809
3810                 r = -EFAULT;
3811                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3812                         break;
3813                 r = 0;
3814                 break;
3815         }
3816         case KVM_SET_VCPU_EVENTS: {
3817                 struct kvm_vcpu_events events;
3818
3819                 r = -EFAULT;
3820                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3821                         break;
3822
3823                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3824                 break;
3825         }
3826         case KVM_GET_DEBUGREGS: {
3827                 struct kvm_debugregs dbgregs;
3828
3829                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3830
3831                 r = -EFAULT;
3832                 if (copy_to_user(argp, &dbgregs,
3833                                  sizeof(struct kvm_debugregs)))
3834                         break;
3835                 r = 0;
3836                 break;
3837         }
3838         case KVM_SET_DEBUGREGS: {
3839                 struct kvm_debugregs dbgregs;
3840
3841                 r = -EFAULT;
3842                 if (copy_from_user(&dbgregs, argp,
3843                                    sizeof(struct kvm_debugregs)))
3844                         break;
3845
3846                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3847                 break;
3848         }
3849         case KVM_GET_XSAVE: {
3850                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3851                 r = -ENOMEM;
3852                 if (!u.xsave)
3853                         break;
3854
3855                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3856
3857                 r = -EFAULT;
3858                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3859                         break;
3860                 r = 0;
3861                 break;
3862         }
3863         case KVM_SET_XSAVE: {
3864                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3865                 if (IS_ERR(u.xsave)) {
3866                         r = PTR_ERR(u.xsave);
3867                         goto out_nofree;
3868                 }
3869
3870                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3871                 break;
3872         }
3873         case KVM_GET_XCRS: {
3874                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3875                 r = -ENOMEM;
3876                 if (!u.xcrs)
3877                         break;
3878
3879                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3880
3881                 r = -EFAULT;
3882                 if (copy_to_user(argp, u.xcrs,
3883                                  sizeof(struct kvm_xcrs)))
3884                         break;
3885                 r = 0;
3886                 break;
3887         }
3888         case KVM_SET_XCRS: {
3889                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3890                 if (IS_ERR(u.xcrs)) {
3891                         r = PTR_ERR(u.xcrs);
3892                         goto out_nofree;
3893                 }
3894
3895                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3896                 break;
3897         }
3898         case KVM_SET_TSC_KHZ: {
3899                 u32 user_tsc_khz;
3900
3901                 r = -EINVAL;
3902                 user_tsc_khz = (u32)arg;
3903
3904                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3905                         goto out;
3906
3907                 if (user_tsc_khz == 0)
3908                         user_tsc_khz = tsc_khz;
3909
3910                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3911                         r = 0;
3912
3913                 goto out;
3914         }
3915         case KVM_GET_TSC_KHZ: {
3916                 r = vcpu->arch.virtual_tsc_khz;
3917                 goto out;
3918         }
3919         case KVM_KVMCLOCK_CTRL: {
3920                 r = kvm_set_guest_paused(vcpu);
3921                 goto out;
3922         }
3923         case KVM_ENABLE_CAP: {
3924                 struct kvm_enable_cap cap;
3925
3926                 r = -EFAULT;
3927                 if (copy_from_user(&cap, argp, sizeof(cap)))
3928                         goto out;
3929                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3930                 break;
3931         }
3932         default:
3933                 r = -EINVAL;
3934         }
3935 out:
3936         kfree(u.buffer);
3937 out_nofree:
3938         vcpu_put(vcpu);
3939         return r;
3940 }
3941
3942 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3943 {
3944         return VM_FAULT_SIGBUS;
3945 }
3946
3947 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3948 {
3949         int ret;
3950
3951         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3952                 return -EINVAL;
3953         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3954         return ret;
3955 }
3956
3957 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3958                                               u64 ident_addr)
3959 {
3960         kvm->arch.ept_identity_map_addr = ident_addr;
3961         return 0;
3962 }
3963
3964 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3965                                           u32 kvm_nr_mmu_pages)
3966 {
3967         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3968                 return -EINVAL;
3969
3970         mutex_lock(&kvm->slots_lock);
3971
3972         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3973         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3974
3975         mutex_unlock(&kvm->slots_lock);
3976         return 0;
3977 }
3978
3979 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3980 {
3981         return kvm->arch.n_max_mmu_pages;
3982 }
3983
3984 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3985 {
3986         struct kvm_pic *pic = kvm->arch.vpic;
3987         int r;
3988
3989         r = 0;
3990         switch (chip->chip_id) {
3991         case KVM_IRQCHIP_PIC_MASTER:
3992                 memcpy(&chip->chip.pic, &pic->pics[0],
3993                         sizeof(struct kvm_pic_state));
3994                 break;
3995         case KVM_IRQCHIP_PIC_SLAVE:
3996                 memcpy(&chip->chip.pic, &pic->pics[1],
3997                         sizeof(struct kvm_pic_state));
3998                 break;
3999         case KVM_IRQCHIP_IOAPIC:
4000                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4001                 break;
4002         default:
4003                 r = -EINVAL;
4004                 break;
4005         }
4006         return r;
4007 }
4008
4009 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4010 {
4011         struct kvm_pic *pic = kvm->arch.vpic;
4012         int r;
4013
4014         r = 0;
4015         switch (chip->chip_id) {
4016         case KVM_IRQCHIP_PIC_MASTER:
4017                 spin_lock(&pic->lock);
4018                 memcpy(&pic->pics[0], &chip->chip.pic,
4019                         sizeof(struct kvm_pic_state));
4020                 spin_unlock(&pic->lock);
4021                 break;
4022         case KVM_IRQCHIP_PIC_SLAVE:
4023                 spin_lock(&pic->lock);
4024                 memcpy(&pic->pics[1], &chip->chip.pic,
4025                         sizeof(struct kvm_pic_state));
4026                 spin_unlock(&pic->lock);
4027                 break;
4028         case KVM_IRQCHIP_IOAPIC:
4029                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4030                 break;
4031         default:
4032                 r = -EINVAL;
4033                 break;
4034         }
4035         kvm_pic_update_irq(pic);
4036         return r;
4037 }
4038
4039 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4040 {
4041         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4042
4043         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4044
4045         mutex_lock(&kps->lock);
4046         memcpy(ps, &kps->channels, sizeof(*ps));
4047         mutex_unlock(&kps->lock);
4048         return 0;
4049 }
4050
4051 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4052 {
4053         int i;
4054         struct kvm_pit *pit = kvm->arch.vpit;
4055
4056         mutex_lock(&pit->pit_state.lock);
4057         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4058         for (i = 0; i < 3; i++)
4059                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4060         mutex_unlock(&pit->pit_state.lock);
4061         return 0;
4062 }
4063
4064 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4065 {
4066         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4067         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4068                 sizeof(ps->channels));
4069         ps->flags = kvm->arch.vpit->pit_state.flags;
4070         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4071         memset(&ps->reserved, 0, sizeof(ps->reserved));
4072         return 0;
4073 }
4074
4075 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4076 {
4077         int start = 0;
4078         int i;
4079         u32 prev_legacy, cur_legacy;
4080         struct kvm_pit *pit = kvm->arch.vpit;
4081
4082         mutex_lock(&pit->pit_state.lock);
4083         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4084         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4085         if (!prev_legacy && cur_legacy)
4086                 start = 1;
4087         memcpy(&pit->pit_state.channels, &ps->channels,
4088                sizeof(pit->pit_state.channels));
4089         pit->pit_state.flags = ps->flags;
4090         for (i = 0; i < 3; i++)
4091                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4092                                    start && i == 0);
4093         mutex_unlock(&pit->pit_state.lock);
4094         return 0;
4095 }
4096
4097 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4098                                  struct kvm_reinject_control *control)
4099 {
4100         struct kvm_pit *pit = kvm->arch.vpit;
4101
4102         if (!pit)
4103                 return -ENXIO;
4104
4105         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4106          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4107          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4108          */
4109         mutex_lock(&pit->pit_state.lock);
4110         kvm_pit_set_reinject(pit, control->pit_reinject);
4111         mutex_unlock(&pit->pit_state.lock);
4112
4113         return 0;
4114 }
4115
4116 /**
4117  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4118  * @kvm: kvm instance
4119  * @log: slot id and address to which we copy the log
4120  *
4121  * Steps 1-4 below provide general overview of dirty page logging. See
4122  * kvm_get_dirty_log_protect() function description for additional details.
4123  *
4124  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4125  * always flush the TLB (step 4) even if previous step failed  and the dirty
4126  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4127  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4128  * writes will be marked dirty for next log read.
4129  *
4130  *   1. Take a snapshot of the bit and clear it if needed.
4131  *   2. Write protect the corresponding page.
4132  *   3. Copy the snapshot to the userspace.
4133  *   4. Flush TLB's if needed.
4134  */
4135 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4136 {
4137         bool is_dirty = false;
4138         int r;
4139
4140         mutex_lock(&kvm->slots_lock);
4141
4142         /*
4143          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4144          */
4145         if (kvm_x86_ops->flush_log_dirty)
4146                 kvm_x86_ops->flush_log_dirty(kvm);
4147
4148         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4149
4150         /*
4151          * All the TLBs can be flushed out of mmu lock, see the comments in
4152          * kvm_mmu_slot_remove_write_access().
4153          */
4154         lockdep_assert_held(&kvm->slots_lock);
4155         if (is_dirty)
4156                 kvm_flush_remote_tlbs(kvm);
4157
4158         mutex_unlock(&kvm->slots_lock);
4159         return r;
4160 }
4161
4162 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4163                         bool line_status)
4164 {
4165         if (!irqchip_in_kernel(kvm))
4166                 return -ENXIO;
4167
4168         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4169                                         irq_event->irq, irq_event->level,
4170                                         line_status);
4171         return 0;
4172 }
4173
4174 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4175                                    struct kvm_enable_cap *cap)
4176 {
4177         int r;
4178
4179         if (cap->flags)
4180                 return -EINVAL;
4181
4182         switch (cap->cap) {
4183         case KVM_CAP_DISABLE_QUIRKS:
4184                 kvm->arch.disabled_quirks = cap->args[0];
4185                 r = 0;
4186                 break;
4187         case KVM_CAP_SPLIT_IRQCHIP: {
4188                 mutex_lock(&kvm->lock);
4189                 r = -EINVAL;
4190                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4191                         goto split_irqchip_unlock;
4192                 r = -EEXIST;
4193                 if (irqchip_in_kernel(kvm))
4194                         goto split_irqchip_unlock;
4195                 if (kvm->created_vcpus)
4196                         goto split_irqchip_unlock;
4197                 r = kvm_setup_empty_irq_routing(kvm);
4198                 if (r)
4199                         goto split_irqchip_unlock;
4200                 /* Pairs with irqchip_in_kernel. */
4201                 smp_wmb();
4202                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4203                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4204                 r = 0;
4205 split_irqchip_unlock:
4206                 mutex_unlock(&kvm->lock);
4207                 break;
4208         }
4209         case KVM_CAP_X2APIC_API:
4210                 r = -EINVAL;
4211                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4212                         break;
4213
4214                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4215                         kvm->arch.x2apic_format = true;
4216                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4217                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4218
4219                 r = 0;
4220                 break;
4221         default:
4222                 r = -EINVAL;
4223                 break;
4224         }
4225         return r;
4226 }
4227
4228 long kvm_arch_vm_ioctl(struct file *filp,
4229                        unsigned int ioctl, unsigned long arg)
4230 {
4231         struct kvm *kvm = filp->private_data;
4232         void __user *argp = (void __user *)arg;
4233         int r = -ENOTTY;
4234         /*
4235          * This union makes it completely explicit to gcc-3.x
4236          * that these two variables' stack usage should be
4237          * combined, not added together.
4238          */
4239         union {
4240                 struct kvm_pit_state ps;
4241                 struct kvm_pit_state2 ps2;
4242                 struct kvm_pit_config pit_config;
4243         } u;
4244
4245         switch (ioctl) {
4246         case KVM_SET_TSS_ADDR:
4247                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4248                 break;
4249         case KVM_SET_IDENTITY_MAP_ADDR: {
4250                 u64 ident_addr;
4251
4252                 mutex_lock(&kvm->lock);
4253                 r = -EINVAL;
4254                 if (kvm->created_vcpus)
4255                         goto set_identity_unlock;
4256                 r = -EFAULT;
4257                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4258                         goto set_identity_unlock;
4259                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4260 set_identity_unlock:
4261                 mutex_unlock(&kvm->lock);
4262                 break;
4263         }
4264         case KVM_SET_NR_MMU_PAGES:
4265                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4266                 break;
4267         case KVM_GET_NR_MMU_PAGES:
4268                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4269                 break;
4270         case KVM_CREATE_IRQCHIP: {
4271                 mutex_lock(&kvm->lock);
4272
4273                 r = -EEXIST;
4274                 if (irqchip_in_kernel(kvm))
4275                         goto create_irqchip_unlock;
4276
4277                 r = -EINVAL;
4278                 if (kvm->created_vcpus)
4279                         goto create_irqchip_unlock;
4280
4281                 r = kvm_pic_init(kvm);
4282                 if (r)
4283                         goto create_irqchip_unlock;
4284
4285                 r = kvm_ioapic_init(kvm);
4286                 if (r) {
4287                         kvm_pic_destroy(kvm);
4288                         goto create_irqchip_unlock;
4289                 }
4290
4291                 r = kvm_setup_default_irq_routing(kvm);
4292                 if (r) {
4293                         kvm_ioapic_destroy(kvm);
4294                         kvm_pic_destroy(kvm);
4295                         goto create_irqchip_unlock;
4296                 }
4297                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4298                 smp_wmb();
4299                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4300         create_irqchip_unlock:
4301                 mutex_unlock(&kvm->lock);
4302                 break;
4303         }
4304         case KVM_CREATE_PIT:
4305                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4306                 goto create_pit;
4307         case KVM_CREATE_PIT2:
4308                 r = -EFAULT;
4309                 if (copy_from_user(&u.pit_config, argp,
4310                                    sizeof(struct kvm_pit_config)))
4311                         goto out;
4312         create_pit:
4313                 mutex_lock(&kvm->lock);
4314                 r = -EEXIST;
4315                 if (kvm->arch.vpit)
4316                         goto create_pit_unlock;
4317                 r = -ENOMEM;
4318                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4319                 if (kvm->arch.vpit)
4320                         r = 0;
4321         create_pit_unlock:
4322                 mutex_unlock(&kvm->lock);
4323                 break;
4324         case KVM_GET_IRQCHIP: {
4325                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4326                 struct kvm_irqchip *chip;
4327
4328                 chip = memdup_user(argp, sizeof(*chip));
4329                 if (IS_ERR(chip)) {
4330                         r = PTR_ERR(chip);
4331                         goto out;
4332                 }
4333
4334                 r = -ENXIO;
4335                 if (!irqchip_kernel(kvm))
4336                         goto get_irqchip_out;
4337                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4338                 if (r)
4339                         goto get_irqchip_out;
4340                 r = -EFAULT;
4341                 if (copy_to_user(argp, chip, sizeof *chip))
4342                         goto get_irqchip_out;
4343                 r = 0;
4344         get_irqchip_out:
4345                 kfree(chip);
4346                 break;
4347         }
4348         case KVM_SET_IRQCHIP: {
4349                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4350                 struct kvm_irqchip *chip;
4351
4352                 chip = memdup_user(argp, sizeof(*chip));
4353                 if (IS_ERR(chip)) {
4354                         r = PTR_ERR(chip);
4355                         goto out;
4356                 }
4357
4358                 r = -ENXIO;
4359                 if (!irqchip_kernel(kvm))
4360                         goto set_irqchip_out;
4361                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4362                 if (r)
4363                         goto set_irqchip_out;
4364                 r = 0;
4365         set_irqchip_out:
4366                 kfree(chip);
4367                 break;
4368         }
4369         case KVM_GET_PIT: {
4370                 r = -EFAULT;
4371                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4372                         goto out;
4373                 r = -ENXIO;
4374                 if (!kvm->arch.vpit)
4375                         goto out;
4376                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4377                 if (r)
4378                         goto out;
4379                 r = -EFAULT;
4380                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4381                         goto out;
4382                 r = 0;
4383                 break;
4384         }
4385         case KVM_SET_PIT: {
4386                 r = -EFAULT;
4387                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4388                         goto out;
4389                 r = -ENXIO;
4390                 if (!kvm->arch.vpit)
4391                         goto out;
4392                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4393                 break;
4394         }
4395         case KVM_GET_PIT2: {
4396                 r = -ENXIO;
4397                 if (!kvm->arch.vpit)
4398                         goto out;
4399                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4400                 if (r)
4401                         goto out;
4402                 r = -EFAULT;
4403                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4404                         goto out;
4405                 r = 0;
4406                 break;
4407         }
4408         case KVM_SET_PIT2: {
4409                 r = -EFAULT;
4410                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4411                         goto out;
4412                 r = -ENXIO;
4413                 if (!kvm->arch.vpit)
4414                         goto out;
4415                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4416                 break;
4417         }
4418         case KVM_REINJECT_CONTROL: {
4419                 struct kvm_reinject_control control;
4420                 r =  -EFAULT;
4421                 if (copy_from_user(&control, argp, sizeof(control)))
4422                         goto out;
4423                 r = kvm_vm_ioctl_reinject(kvm, &control);
4424                 break;
4425         }
4426         case KVM_SET_BOOT_CPU_ID:
4427                 r = 0;
4428                 mutex_lock(&kvm->lock);
4429                 if (kvm->created_vcpus)
4430                         r = -EBUSY;
4431                 else
4432                         kvm->arch.bsp_vcpu_id = arg;
4433                 mutex_unlock(&kvm->lock);
4434                 break;
4435         case KVM_XEN_HVM_CONFIG: {
4436                 struct kvm_xen_hvm_config xhc;
4437                 r = -EFAULT;
4438                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4439                         goto out;
4440                 r = -EINVAL;
4441                 if (xhc.flags)
4442                         goto out;
4443                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4444                 r = 0;
4445                 break;
4446         }
4447         case KVM_SET_CLOCK: {
4448                 struct kvm_clock_data user_ns;
4449                 u64 now_ns;
4450
4451                 r = -EFAULT;
4452                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4453                         goto out;
4454
4455                 r = -EINVAL;
4456                 if (user_ns.flags)
4457                         goto out;
4458
4459                 r = 0;
4460                 /*
4461                  * TODO: userspace has to take care of races with VCPU_RUN, so
4462                  * kvm_gen_update_masterclock() can be cut down to locked
4463                  * pvclock_update_vm_gtod_copy().
4464                  */
4465                 kvm_gen_update_masterclock(kvm);
4466                 now_ns = get_kvmclock_ns(kvm);
4467                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4468                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4469                 break;
4470         }
4471         case KVM_GET_CLOCK: {
4472                 struct kvm_clock_data user_ns;
4473                 u64 now_ns;
4474
4475                 now_ns = get_kvmclock_ns(kvm);
4476                 user_ns.clock = now_ns;
4477                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4478                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4479
4480                 r = -EFAULT;
4481                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4482                         goto out;
4483                 r = 0;
4484                 break;
4485         }
4486         case KVM_ENABLE_CAP: {
4487                 struct kvm_enable_cap cap;
4488
4489                 r = -EFAULT;
4490                 if (copy_from_user(&cap, argp, sizeof(cap)))
4491                         goto out;
4492                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4493                 break;
4494         }
4495         case KVM_MEMORY_ENCRYPT_OP: {
4496                 r = -ENOTTY;
4497                 if (kvm_x86_ops->mem_enc_op)
4498                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4499                 break;
4500         }
4501         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4502                 struct kvm_enc_region region;
4503
4504                 r = -EFAULT;
4505                 if (copy_from_user(&region, argp, sizeof(region)))
4506                         goto out;
4507
4508                 r = -ENOTTY;
4509                 if (kvm_x86_ops->mem_enc_reg_region)
4510                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4511                 break;
4512         }
4513         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4514                 struct kvm_enc_region region;
4515
4516                 r = -EFAULT;
4517                 if (copy_from_user(&region, argp, sizeof(region)))
4518                         goto out;
4519
4520                 r = -ENOTTY;
4521                 if (kvm_x86_ops->mem_enc_unreg_region)
4522                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4523                 break;
4524         }
4525         case KVM_HYPERV_EVENTFD: {
4526                 struct kvm_hyperv_eventfd hvevfd;
4527
4528                 r = -EFAULT;
4529                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4530                         goto out;
4531                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4532                 break;
4533         }
4534         default:
4535                 r = -ENOTTY;
4536         }
4537 out:
4538         return r;
4539 }
4540
4541 static void kvm_init_msr_list(void)
4542 {
4543         u32 dummy[2];
4544         unsigned i, j;
4545
4546         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4547                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4548                         continue;
4549
4550                 /*
4551                  * Even MSRs that are valid in the host may not be exposed
4552                  * to the guests in some cases.
4553                  */
4554                 switch (msrs_to_save[i]) {
4555                 case MSR_IA32_BNDCFGS:
4556                         if (!kvm_x86_ops->mpx_supported())
4557                                 continue;
4558                         break;
4559                 case MSR_TSC_AUX:
4560                         if (!kvm_x86_ops->rdtscp_supported())
4561                                 continue;
4562                         break;
4563                 default:
4564                         break;
4565                 }
4566
4567                 if (j < i)
4568                         msrs_to_save[j] = msrs_to_save[i];
4569                 j++;
4570         }
4571         num_msrs_to_save = j;
4572
4573         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4574                 switch (emulated_msrs[i]) {
4575                 case MSR_IA32_SMBASE:
4576                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4577                                 continue;
4578                         break;
4579                 default:
4580                         break;
4581                 }
4582
4583                 if (j < i)
4584                         emulated_msrs[j] = emulated_msrs[i];
4585                 j++;
4586         }
4587         num_emulated_msrs = j;
4588
4589         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4590                 struct kvm_msr_entry msr;
4591
4592                 msr.index = msr_based_features[i];
4593                 if (kvm_get_msr_feature(&msr))
4594                         continue;
4595
4596                 if (j < i)
4597                         msr_based_features[j] = msr_based_features[i];
4598                 j++;
4599         }
4600         num_msr_based_features = j;
4601 }
4602
4603 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4604                            const void *v)
4605 {
4606         int handled = 0;
4607         int n;
4608
4609         do {
4610                 n = min(len, 8);
4611                 if (!(lapic_in_kernel(vcpu) &&
4612                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4613                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4614                         break;
4615                 handled += n;
4616                 addr += n;
4617                 len -= n;
4618                 v += n;
4619         } while (len);
4620
4621         return handled;
4622 }
4623
4624 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4625 {
4626         int handled = 0;
4627         int n;
4628
4629         do {
4630                 n = min(len, 8);
4631                 if (!(lapic_in_kernel(vcpu) &&
4632                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4633                                          addr, n, v))
4634                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4635                         break;
4636                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4637                 handled += n;
4638                 addr += n;
4639                 len -= n;
4640                 v += n;
4641         } while (len);
4642
4643         return handled;
4644 }
4645
4646 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4647                         struct kvm_segment *var, int seg)
4648 {
4649         kvm_x86_ops->set_segment(vcpu, var, seg);
4650 }
4651
4652 void kvm_get_segment(struct kvm_vcpu *vcpu,
4653                      struct kvm_segment *var, int seg)
4654 {
4655         kvm_x86_ops->get_segment(vcpu, var, seg);
4656 }
4657
4658 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4659                            struct x86_exception *exception)
4660 {
4661         gpa_t t_gpa;
4662
4663         BUG_ON(!mmu_is_nested(vcpu));
4664
4665         /* NPT walks are always user-walks */
4666         access |= PFERR_USER_MASK;
4667         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4668
4669         return t_gpa;
4670 }
4671
4672 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4673                               struct x86_exception *exception)
4674 {
4675         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4676         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4677 }
4678
4679  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4680                                 struct x86_exception *exception)
4681 {
4682         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4683         access |= PFERR_FETCH_MASK;
4684         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4685 }
4686
4687 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4688                                struct x86_exception *exception)
4689 {
4690         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4691         access |= PFERR_WRITE_MASK;
4692         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4693 }
4694
4695 /* uses this to access any guest's mapped memory without checking CPL */
4696 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4697                                 struct x86_exception *exception)
4698 {
4699         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4700 }
4701
4702 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4703                                       struct kvm_vcpu *vcpu, u32 access,
4704                                       struct x86_exception *exception)
4705 {
4706         void *data = val;
4707         int r = X86EMUL_CONTINUE;
4708
4709         while (bytes) {
4710                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4711                                                             exception);
4712                 unsigned offset = addr & (PAGE_SIZE-1);
4713                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4714                 int ret;
4715
4716                 if (gpa == UNMAPPED_GVA)
4717                         return X86EMUL_PROPAGATE_FAULT;
4718                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4719                                                offset, toread);
4720                 if (ret < 0) {
4721                         r = X86EMUL_IO_NEEDED;
4722                         goto out;
4723                 }
4724
4725                 bytes -= toread;
4726                 data += toread;
4727                 addr += toread;
4728         }
4729 out:
4730         return r;
4731 }
4732
4733 /* used for instruction fetching */
4734 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4735                                 gva_t addr, void *val, unsigned int bytes,
4736                                 struct x86_exception *exception)
4737 {
4738         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4739         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4740         unsigned offset;
4741         int ret;
4742
4743         /* Inline kvm_read_guest_virt_helper for speed.  */
4744         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4745                                                     exception);
4746         if (unlikely(gpa == UNMAPPED_GVA))
4747                 return X86EMUL_PROPAGATE_FAULT;
4748
4749         offset = addr & (PAGE_SIZE-1);
4750         if (WARN_ON(offset + bytes > PAGE_SIZE))
4751                 bytes = (unsigned)PAGE_SIZE - offset;
4752         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4753                                        offset, bytes);
4754         if (unlikely(ret < 0))
4755                 return X86EMUL_IO_NEEDED;
4756
4757         return X86EMUL_CONTINUE;
4758 }
4759
4760 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4761                                gva_t addr, void *val, unsigned int bytes,
4762                                struct x86_exception *exception)
4763 {
4764         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4765         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4766
4767         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4768                                           exception);
4769 }
4770 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4771
4772 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4773                                       gva_t addr, void *val, unsigned int bytes,
4774                                       struct x86_exception *exception)
4775 {
4776         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4777         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4778 }
4779
4780 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4781                 unsigned long addr, void *val, unsigned int bytes)
4782 {
4783         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4784         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4785
4786         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4787 }
4788
4789 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4790                                        gva_t addr, void *val,
4791                                        unsigned int bytes,
4792                                        struct x86_exception *exception)
4793 {
4794         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4795         void *data = val;
4796         int r = X86EMUL_CONTINUE;
4797
4798         while (bytes) {
4799                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4800                                                              PFERR_WRITE_MASK,
4801                                                              exception);
4802                 unsigned offset = addr & (PAGE_SIZE-1);
4803                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4804                 int ret;
4805
4806                 if (gpa == UNMAPPED_GVA)
4807                         return X86EMUL_PROPAGATE_FAULT;
4808                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4809                 if (ret < 0) {
4810                         r = X86EMUL_IO_NEEDED;
4811                         goto out;
4812                 }
4813
4814                 bytes -= towrite;
4815                 data += towrite;
4816                 addr += towrite;
4817         }
4818 out:
4819         return r;
4820 }
4821 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4822
4823 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4824                             gpa_t gpa, bool write)
4825 {
4826         /* For APIC access vmexit */
4827         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4828                 return 1;
4829
4830         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4831                 trace_vcpu_match_mmio(gva, gpa, write, true);
4832                 return 1;
4833         }
4834
4835         return 0;
4836 }
4837
4838 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4839                                 gpa_t *gpa, struct x86_exception *exception,
4840                                 bool write)
4841 {
4842         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4843                 | (write ? PFERR_WRITE_MASK : 0);
4844
4845         /*
4846          * currently PKRU is only applied to ept enabled guest so
4847          * there is no pkey in EPT page table for L1 guest or EPT
4848          * shadow page table for L2 guest.
4849          */
4850         if (vcpu_match_mmio_gva(vcpu, gva)
4851             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4852                                  vcpu->arch.access, 0, access)) {
4853                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4854                                         (gva & (PAGE_SIZE - 1));
4855                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4856                 return 1;
4857         }
4858
4859         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4860
4861         if (*gpa == UNMAPPED_GVA)
4862                 return -1;
4863
4864         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4865 }
4866
4867 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4868                         const void *val, int bytes)
4869 {
4870         int ret;
4871
4872         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4873         if (ret < 0)
4874                 return 0;
4875         kvm_page_track_write(vcpu, gpa, val, bytes);
4876         return 1;
4877 }
4878
4879 struct read_write_emulator_ops {
4880         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4881                                   int bytes);
4882         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4883                                   void *val, int bytes);
4884         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4885                                int bytes, void *val);
4886         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4887                                     void *val, int bytes);
4888         bool write;
4889 };
4890
4891 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4892 {
4893         if (vcpu->mmio_read_completed) {
4894                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4895                                vcpu->mmio_fragments[0].gpa, val);
4896                 vcpu->mmio_read_completed = 0;
4897                 return 1;
4898         }
4899
4900         return 0;
4901 }
4902
4903 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4904                         void *val, int bytes)
4905 {
4906         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4907 }
4908
4909 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4910                          void *val, int bytes)
4911 {
4912         return emulator_write_phys(vcpu, gpa, val, bytes);
4913 }
4914
4915 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4916 {
4917         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
4918         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4919 }
4920
4921 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4922                           void *val, int bytes)
4923 {
4924         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
4925         return X86EMUL_IO_NEEDED;
4926 }
4927
4928 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4929                            void *val, int bytes)
4930 {
4931         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4932
4933         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4934         return X86EMUL_CONTINUE;
4935 }
4936
4937 static const struct read_write_emulator_ops read_emultor = {
4938         .read_write_prepare = read_prepare,
4939         .read_write_emulate = read_emulate,
4940         .read_write_mmio = vcpu_mmio_read,
4941         .read_write_exit_mmio = read_exit_mmio,
4942 };
4943
4944 static const struct read_write_emulator_ops write_emultor = {
4945         .read_write_emulate = write_emulate,
4946         .read_write_mmio = write_mmio,
4947         .read_write_exit_mmio = write_exit_mmio,
4948         .write = true,
4949 };
4950
4951 static int emulator_read_write_onepage(unsigned long addr, void *val,
4952                                        unsigned int bytes,
4953                                        struct x86_exception *exception,
4954                                        struct kvm_vcpu *vcpu,
4955                                        const struct read_write_emulator_ops *ops)
4956 {
4957         gpa_t gpa;
4958         int handled, ret;
4959         bool write = ops->write;
4960         struct kvm_mmio_fragment *frag;
4961         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4962
4963         /*
4964          * If the exit was due to a NPF we may already have a GPA.
4965          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4966          * Note, this cannot be used on string operations since string
4967          * operation using rep will only have the initial GPA from the NPF
4968          * occurred.
4969          */
4970         if (vcpu->arch.gpa_available &&
4971             emulator_can_use_gpa(ctxt) &&
4972             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
4973                 gpa = vcpu->arch.gpa_val;
4974                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
4975         } else {
4976                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4977                 if (ret < 0)
4978                         return X86EMUL_PROPAGATE_FAULT;
4979         }
4980
4981         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
4982                 return X86EMUL_CONTINUE;
4983
4984         /*
4985          * Is this MMIO handled locally?
4986          */
4987         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4988         if (handled == bytes)
4989                 return X86EMUL_CONTINUE;
4990
4991         gpa += handled;
4992         bytes -= handled;
4993         val += handled;
4994
4995         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4996         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4997         frag->gpa = gpa;
4998         frag->data = val;
4999         frag->len = bytes;
5000         return X86EMUL_CONTINUE;
5001 }
5002
5003 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5004                         unsigned long addr,
5005                         void *val, unsigned int bytes,
5006                         struct x86_exception *exception,
5007                         const struct read_write_emulator_ops *ops)
5008 {
5009         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5010         gpa_t gpa;
5011         int rc;
5012
5013         if (ops->read_write_prepare &&
5014                   ops->read_write_prepare(vcpu, val, bytes))
5015                 return X86EMUL_CONTINUE;
5016
5017         vcpu->mmio_nr_fragments = 0;
5018
5019         /* Crossing a page boundary? */
5020         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5021                 int now;
5022
5023                 now = -addr & ~PAGE_MASK;
5024                 rc = emulator_read_write_onepage(addr, val, now, exception,
5025                                                  vcpu, ops);
5026
5027                 if (rc != X86EMUL_CONTINUE)
5028                         return rc;
5029                 addr += now;
5030                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5031                         addr = (u32)addr;
5032                 val += now;
5033                 bytes -= now;
5034         }
5035
5036         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5037                                          vcpu, ops);
5038         if (rc != X86EMUL_CONTINUE)
5039                 return rc;
5040
5041         if (!vcpu->mmio_nr_fragments)
5042                 return rc;
5043
5044         gpa = vcpu->mmio_fragments[0].gpa;
5045
5046         vcpu->mmio_needed = 1;
5047         vcpu->mmio_cur_fragment = 0;
5048
5049         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5050         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5051         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5052         vcpu->run->mmio.phys_addr = gpa;
5053
5054         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5055 }
5056
5057 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5058                                   unsigned long addr,
5059                                   void *val,
5060                                   unsigned int bytes,
5061                                   struct x86_exception *exception)
5062 {
5063         return emulator_read_write(ctxt, addr, val, bytes,
5064                                    exception, &read_emultor);
5065 }
5066
5067 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5068                             unsigned long addr,
5069                             const void *val,
5070                             unsigned int bytes,
5071                             struct x86_exception *exception)
5072 {
5073         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5074                                    exception, &write_emultor);
5075 }
5076
5077 #define CMPXCHG_TYPE(t, ptr, old, new) \
5078         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5079
5080 #ifdef CONFIG_X86_64
5081 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5082 #else
5083 #  define CMPXCHG64(ptr, old, new) \
5084         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5085 #endif
5086
5087 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5088                                      unsigned long addr,
5089                                      const void *old,
5090                                      const void *new,
5091                                      unsigned int bytes,
5092                                      struct x86_exception *exception)
5093 {
5094         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5095         gpa_t gpa;
5096         struct page *page;
5097         char *kaddr;
5098         bool exchanged;
5099
5100         /* guests cmpxchg8b have to be emulated atomically */
5101         if (bytes > 8 || (bytes & (bytes - 1)))
5102                 goto emul_write;
5103
5104         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5105
5106         if (gpa == UNMAPPED_GVA ||
5107             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5108                 goto emul_write;
5109
5110         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5111                 goto emul_write;
5112
5113         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5114         if (is_error_page(page))
5115                 goto emul_write;
5116
5117         kaddr = kmap_atomic(page);
5118         kaddr += offset_in_page(gpa);
5119         switch (bytes) {
5120         case 1:
5121                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5122                 break;
5123         case 2:
5124                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5125                 break;
5126         case 4:
5127                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5128                 break;
5129         case 8:
5130                 exchanged = CMPXCHG64(kaddr, old, new);
5131                 break;
5132         default:
5133                 BUG();
5134         }
5135         kunmap_atomic(kaddr);
5136         kvm_release_page_dirty(page);
5137
5138         if (!exchanged)
5139                 return X86EMUL_CMPXCHG_FAILED;
5140
5141         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5142         kvm_page_track_write(vcpu, gpa, new, bytes);
5143
5144         return X86EMUL_CONTINUE;
5145
5146 emul_write:
5147         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5148
5149         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5150 }
5151
5152 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5153 {
5154         int r = 0, i;
5155
5156         for (i = 0; i < vcpu->arch.pio.count; i++) {
5157                 if (vcpu->arch.pio.in)
5158                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5159                                             vcpu->arch.pio.size, pd);
5160                 else
5161                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5162                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5163                                              pd);
5164                 if (r)
5165                         break;
5166                 pd += vcpu->arch.pio.size;
5167         }
5168         return r;
5169 }
5170
5171 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5172                                unsigned short port, void *val,
5173                                unsigned int count, bool in)
5174 {
5175         vcpu->arch.pio.port = port;
5176         vcpu->arch.pio.in = in;
5177         vcpu->arch.pio.count  = count;
5178         vcpu->arch.pio.size = size;
5179
5180         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5181                 vcpu->arch.pio.count = 0;
5182                 return 1;
5183         }
5184
5185         vcpu->run->exit_reason = KVM_EXIT_IO;
5186         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5187         vcpu->run->io.size = size;
5188         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5189         vcpu->run->io.count = count;
5190         vcpu->run->io.port = port;
5191
5192         return 0;
5193 }
5194
5195 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5196                                     int size, unsigned short port, void *val,
5197                                     unsigned int count)
5198 {
5199         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5200         int ret;
5201
5202         if (vcpu->arch.pio.count)
5203                 goto data_avail;
5204
5205         memset(vcpu->arch.pio_data, 0, size * count);
5206
5207         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5208         if (ret) {
5209 data_avail:
5210                 memcpy(val, vcpu->arch.pio_data, size * count);
5211                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5212                 vcpu->arch.pio.count = 0;
5213                 return 1;
5214         }
5215
5216         return 0;
5217 }
5218
5219 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5220                                      int size, unsigned short port,
5221                                      const void *val, unsigned int count)
5222 {
5223         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5224
5225         memcpy(vcpu->arch.pio_data, val, size * count);
5226         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5227         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5228 }
5229
5230 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5231 {
5232         return kvm_x86_ops->get_segment_base(vcpu, seg);
5233 }
5234
5235 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5236 {
5237         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5238 }
5239
5240 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5241 {
5242         if (!need_emulate_wbinvd(vcpu))
5243                 return X86EMUL_CONTINUE;
5244
5245         if (kvm_x86_ops->has_wbinvd_exit()) {
5246                 int cpu = get_cpu();
5247
5248                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5249                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5250                                 wbinvd_ipi, NULL, 1);
5251                 put_cpu();
5252                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5253         } else
5254                 wbinvd();
5255         return X86EMUL_CONTINUE;
5256 }
5257
5258 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5259 {
5260         kvm_emulate_wbinvd_noskip(vcpu);
5261         return kvm_skip_emulated_instruction(vcpu);
5262 }
5263 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5264
5265
5266
5267 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5268 {
5269         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5270 }
5271
5272 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5273                            unsigned long *dest)
5274 {
5275         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5276 }
5277
5278 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5279                            unsigned long value)
5280 {
5281
5282         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5283 }
5284
5285 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5286 {
5287         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5288 }
5289
5290 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5291 {
5292         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5293         unsigned long value;
5294
5295         switch (cr) {
5296         case 0:
5297                 value = kvm_read_cr0(vcpu);
5298                 break;
5299         case 2:
5300                 value = vcpu->arch.cr2;
5301                 break;
5302         case 3:
5303                 value = kvm_read_cr3(vcpu);
5304                 break;
5305         case 4:
5306                 value = kvm_read_cr4(vcpu);
5307                 break;
5308         case 8:
5309                 value = kvm_get_cr8(vcpu);
5310                 break;
5311         default:
5312                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5313                 return 0;
5314         }
5315
5316         return value;
5317 }
5318
5319 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5320 {
5321         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5322         int res = 0;
5323
5324         switch (cr) {
5325         case 0:
5326                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5327                 break;
5328         case 2:
5329                 vcpu->arch.cr2 = val;
5330                 break;
5331         case 3:
5332                 res = kvm_set_cr3(vcpu, val);
5333                 break;
5334         case 4:
5335                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5336                 break;
5337         case 8:
5338                 res = kvm_set_cr8(vcpu, val);
5339                 break;
5340         default:
5341                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5342                 res = -1;
5343         }
5344
5345         return res;
5346 }
5347
5348 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5349 {
5350         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5351 }
5352
5353 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5354 {
5355         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5356 }
5357
5358 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5359 {
5360         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5361 }
5362
5363 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5364 {
5365         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5366 }
5367
5368 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5369 {
5370         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5371 }
5372
5373 static unsigned long emulator_get_cached_segment_base(
5374         struct x86_emulate_ctxt *ctxt, int seg)
5375 {
5376         return get_segment_base(emul_to_vcpu(ctxt), seg);
5377 }
5378
5379 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5380                                  struct desc_struct *desc, u32 *base3,
5381                                  int seg)
5382 {
5383         struct kvm_segment var;
5384
5385         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5386         *selector = var.selector;
5387
5388         if (var.unusable) {
5389                 memset(desc, 0, sizeof(*desc));
5390                 if (base3)
5391                         *base3 = 0;
5392                 return false;
5393         }
5394
5395         if (var.g)
5396                 var.limit >>= 12;
5397         set_desc_limit(desc, var.limit);
5398         set_desc_base(desc, (unsigned long)var.base);
5399 #ifdef CONFIG_X86_64
5400         if (base3)
5401                 *base3 = var.base >> 32;
5402 #endif
5403         desc->type = var.type;
5404         desc->s = var.s;
5405         desc->dpl = var.dpl;
5406         desc->p = var.present;
5407         desc->avl = var.avl;
5408         desc->l = var.l;
5409         desc->d = var.db;
5410         desc->g = var.g;
5411
5412         return true;
5413 }
5414
5415 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5416                                  struct desc_struct *desc, u32 base3,
5417                                  int seg)
5418 {
5419         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5420         struct kvm_segment var;
5421
5422         var.selector = selector;
5423         var.base = get_desc_base(desc);
5424 #ifdef CONFIG_X86_64
5425         var.base |= ((u64)base3) << 32;
5426 #endif
5427         var.limit = get_desc_limit(desc);
5428         if (desc->g)
5429                 var.limit = (var.limit << 12) | 0xfff;
5430         var.type = desc->type;
5431         var.dpl = desc->dpl;
5432         var.db = desc->d;
5433         var.s = desc->s;
5434         var.l = desc->l;
5435         var.g = desc->g;
5436         var.avl = desc->avl;
5437         var.present = desc->p;
5438         var.unusable = !var.present;
5439         var.padding = 0;
5440
5441         kvm_set_segment(vcpu, &var, seg);
5442         return;
5443 }
5444
5445 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5446                             u32 msr_index, u64 *pdata)
5447 {
5448         struct msr_data msr;
5449         int r;
5450
5451         msr.index = msr_index;
5452         msr.host_initiated = false;
5453         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5454         if (r)
5455                 return r;
5456
5457         *pdata = msr.data;
5458         return 0;
5459 }
5460
5461 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5462                             u32 msr_index, u64 data)
5463 {
5464         struct msr_data msr;
5465
5466         msr.data = data;
5467         msr.index = msr_index;
5468         msr.host_initiated = false;
5469         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5470 }
5471
5472 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5473 {
5474         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5475
5476         return vcpu->arch.smbase;
5477 }
5478
5479 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5480 {
5481         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5482
5483         vcpu->arch.smbase = smbase;
5484 }
5485
5486 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5487                               u32 pmc)
5488 {
5489         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5490 }
5491
5492 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5493                              u32 pmc, u64 *pdata)
5494 {
5495         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5496 }
5497
5498 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5499 {
5500         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5501 }
5502
5503 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5504                               struct x86_instruction_info *info,
5505                               enum x86_intercept_stage stage)
5506 {
5507         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5508 }
5509
5510 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5511                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5512 {
5513         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5514 }
5515
5516 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5517 {
5518         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5519 }
5520
5521 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5522 {
5523         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5524 }
5525
5526 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5527 {
5528         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5529 }
5530
5531 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5532 {
5533         return emul_to_vcpu(ctxt)->arch.hflags;
5534 }
5535
5536 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5537 {
5538         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5539 }
5540
5541 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5542 {
5543         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5544 }
5545
5546 static const struct x86_emulate_ops emulate_ops = {
5547         .read_gpr            = emulator_read_gpr,
5548         .write_gpr           = emulator_write_gpr,
5549         .read_std            = kvm_read_guest_virt_system,
5550         .write_std           = kvm_write_guest_virt_system,
5551         .read_phys           = kvm_read_guest_phys_system,
5552         .fetch               = kvm_fetch_guest_virt,
5553         .read_emulated       = emulator_read_emulated,
5554         .write_emulated      = emulator_write_emulated,
5555         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5556         .invlpg              = emulator_invlpg,
5557         .pio_in_emulated     = emulator_pio_in_emulated,
5558         .pio_out_emulated    = emulator_pio_out_emulated,
5559         .get_segment         = emulator_get_segment,
5560         .set_segment         = emulator_set_segment,
5561         .get_cached_segment_base = emulator_get_cached_segment_base,
5562         .get_gdt             = emulator_get_gdt,
5563         .get_idt             = emulator_get_idt,
5564         .set_gdt             = emulator_set_gdt,
5565         .set_idt             = emulator_set_idt,
5566         .get_cr              = emulator_get_cr,
5567         .set_cr              = emulator_set_cr,
5568         .cpl                 = emulator_get_cpl,
5569         .get_dr              = emulator_get_dr,
5570         .set_dr              = emulator_set_dr,
5571         .get_smbase          = emulator_get_smbase,
5572         .set_smbase          = emulator_set_smbase,
5573         .set_msr             = emulator_set_msr,
5574         .get_msr             = emulator_get_msr,
5575         .check_pmc           = emulator_check_pmc,
5576         .read_pmc            = emulator_read_pmc,
5577         .halt                = emulator_halt,
5578         .wbinvd              = emulator_wbinvd,
5579         .fix_hypercall       = emulator_fix_hypercall,
5580         .intercept           = emulator_intercept,
5581         .get_cpuid           = emulator_get_cpuid,
5582         .set_nmi_mask        = emulator_set_nmi_mask,
5583         .get_hflags          = emulator_get_hflags,
5584         .set_hflags          = emulator_set_hflags,
5585         .pre_leave_smm       = emulator_pre_leave_smm,
5586 };
5587
5588 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5589 {
5590         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5591         /*
5592          * an sti; sti; sequence only disable interrupts for the first
5593          * instruction. So, if the last instruction, be it emulated or
5594          * not, left the system with the INT_STI flag enabled, it
5595          * means that the last instruction is an sti. We should not
5596          * leave the flag on in this case. The same goes for mov ss
5597          */
5598         if (int_shadow & mask)
5599                 mask = 0;
5600         if (unlikely(int_shadow || mask)) {
5601                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5602                 if (!mask)
5603                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5604         }
5605 }
5606
5607 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5608 {
5609         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5610         if (ctxt->exception.vector == PF_VECTOR)
5611                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5612
5613         if (ctxt->exception.error_code_valid)
5614                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5615                                       ctxt->exception.error_code);
5616         else
5617                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5618         return false;
5619 }
5620
5621 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5622 {
5623         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5624         int cs_db, cs_l;
5625
5626         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5627
5628         ctxt->eflags = kvm_get_rflags(vcpu);
5629         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5630
5631         ctxt->eip = kvm_rip_read(vcpu);
5632         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5633                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5634                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5635                      cs_db                              ? X86EMUL_MODE_PROT32 :
5636                                                           X86EMUL_MODE_PROT16;
5637         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5638         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5639         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5640
5641         init_decode_cache(ctxt);
5642         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5643 }
5644
5645 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5646 {
5647         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5648         int ret;
5649
5650         init_emulate_ctxt(vcpu);
5651
5652         ctxt->op_bytes = 2;
5653         ctxt->ad_bytes = 2;
5654         ctxt->_eip = ctxt->eip + inc_eip;
5655         ret = emulate_int_real(ctxt, irq);
5656
5657         if (ret != X86EMUL_CONTINUE)
5658                 return EMULATE_FAIL;
5659
5660         ctxt->eip = ctxt->_eip;
5661         kvm_rip_write(vcpu, ctxt->eip);
5662         kvm_set_rflags(vcpu, ctxt->eflags);
5663
5664         if (irq == NMI_VECTOR)
5665                 vcpu->arch.nmi_pending = 0;
5666         else
5667                 vcpu->arch.interrupt.pending = false;
5668
5669         return EMULATE_DONE;
5670 }
5671 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5672
5673 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
5674 {
5675         int r = EMULATE_DONE;
5676
5677         ++vcpu->stat.insn_emulation_fail;
5678         trace_kvm_emulate_insn_failed(vcpu);
5679
5680         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
5681                 return EMULATE_FAIL;
5682
5683         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5684                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5685                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5686                 vcpu->run->internal.ndata = 0;
5687                 r = EMULATE_USER_EXIT;
5688         }
5689
5690         kvm_queue_exception(vcpu, UD_VECTOR);
5691
5692         return r;
5693 }
5694
5695 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5696                                   bool write_fault_to_shadow_pgtable,
5697                                   int emulation_type)
5698 {
5699         gpa_t gpa = cr2;
5700         kvm_pfn_t pfn;
5701
5702         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5703                 return false;
5704
5705         if (!vcpu->arch.mmu.direct_map) {
5706                 /*
5707                  * Write permission should be allowed since only
5708                  * write access need to be emulated.
5709                  */
5710                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5711
5712                 /*
5713                  * If the mapping is invalid in guest, let cpu retry
5714                  * it to generate fault.
5715                  */
5716                 if (gpa == UNMAPPED_GVA)
5717                         return true;
5718         }
5719
5720         /*
5721          * Do not retry the unhandleable instruction if it faults on the
5722          * readonly host memory, otherwise it will goto a infinite loop:
5723          * retry instruction -> write #PF -> emulation fail -> retry
5724          * instruction -> ...
5725          */
5726         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5727
5728         /*
5729          * If the instruction failed on the error pfn, it can not be fixed,
5730          * report the error to userspace.
5731          */
5732         if (is_error_noslot_pfn(pfn))
5733                 return false;
5734
5735         kvm_release_pfn_clean(pfn);
5736
5737         /* The instructions are well-emulated on direct mmu. */
5738         if (vcpu->arch.mmu.direct_map) {
5739                 unsigned int indirect_shadow_pages;
5740
5741                 spin_lock(&vcpu->kvm->mmu_lock);
5742                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5743                 spin_unlock(&vcpu->kvm->mmu_lock);
5744
5745                 if (indirect_shadow_pages)
5746                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5747
5748                 return true;
5749         }
5750
5751         /*
5752          * if emulation was due to access to shadowed page table
5753          * and it failed try to unshadow page and re-enter the
5754          * guest to let CPU execute the instruction.
5755          */
5756         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5757
5758         /*
5759          * If the access faults on its page table, it can not
5760          * be fixed by unprotecting shadow page and it should
5761          * be reported to userspace.
5762          */
5763         return !write_fault_to_shadow_pgtable;
5764 }
5765
5766 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5767                               unsigned long cr2,  int emulation_type)
5768 {
5769         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5770         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5771
5772         last_retry_eip = vcpu->arch.last_retry_eip;
5773         last_retry_addr = vcpu->arch.last_retry_addr;
5774
5775         /*
5776          * If the emulation is caused by #PF and it is non-page_table
5777          * writing instruction, it means the VM-EXIT is caused by shadow
5778          * page protected, we can zap the shadow page and retry this
5779          * instruction directly.
5780          *
5781          * Note: if the guest uses a non-page-table modifying instruction
5782          * on the PDE that points to the instruction, then we will unmap
5783          * the instruction and go to an infinite loop. So, we cache the
5784          * last retried eip and the last fault address, if we meet the eip
5785          * and the address again, we can break out of the potential infinite
5786          * loop.
5787          */
5788         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5789
5790         if (!(emulation_type & EMULTYPE_RETRY))
5791                 return false;
5792
5793         if (x86_page_table_writing_insn(ctxt))
5794                 return false;
5795
5796         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5797                 return false;
5798
5799         vcpu->arch.last_retry_eip = ctxt->eip;
5800         vcpu->arch.last_retry_addr = cr2;
5801
5802         if (!vcpu->arch.mmu.direct_map)
5803                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5804
5805         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5806
5807         return true;
5808 }
5809
5810 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5811 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5812
5813 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5814 {
5815         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5816                 /* This is a good place to trace that we are exiting SMM.  */
5817                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5818
5819                 /* Process a latched INIT or SMI, if any.  */
5820                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5821         }
5822
5823         kvm_mmu_reset_context(vcpu);
5824 }
5825
5826 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5827 {
5828         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5829
5830         vcpu->arch.hflags = emul_flags;
5831
5832         if (changed & HF_SMM_MASK)
5833                 kvm_smm_changed(vcpu);
5834 }
5835
5836 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5837                                 unsigned long *db)
5838 {
5839         u32 dr6 = 0;
5840         int i;
5841         u32 enable, rwlen;
5842
5843         enable = dr7;
5844         rwlen = dr7 >> 16;
5845         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5846                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5847                         dr6 |= (1 << i);
5848         return dr6;
5849 }
5850
5851 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5852 {
5853         struct kvm_run *kvm_run = vcpu->run;
5854
5855         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5856                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5857                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5858                 kvm_run->debug.arch.exception = DB_VECTOR;
5859                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5860                 *r = EMULATE_USER_EXIT;
5861         } else {
5862                 /*
5863                  * "Certain debug exceptions may clear bit 0-3.  The
5864                  * remaining contents of the DR6 register are never
5865                  * cleared by the processor".
5866                  */
5867                 vcpu->arch.dr6 &= ~15;
5868                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5869                 kvm_queue_exception(vcpu, DB_VECTOR);
5870         }
5871 }
5872
5873 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5874 {
5875         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5876         int r = EMULATE_DONE;
5877
5878         kvm_x86_ops->skip_emulated_instruction(vcpu);
5879
5880         /*
5881          * rflags is the old, "raw" value of the flags.  The new value has
5882          * not been saved yet.
5883          *
5884          * This is correct even for TF set by the guest, because "the
5885          * processor will not generate this exception after the instruction
5886          * that sets the TF flag".
5887          */
5888         if (unlikely(rflags & X86_EFLAGS_TF))
5889                 kvm_vcpu_do_singlestep(vcpu, &r);
5890         return r == EMULATE_DONE;
5891 }
5892 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5893
5894 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5895 {
5896         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5897             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5898                 struct kvm_run *kvm_run = vcpu->run;
5899                 unsigned long eip = kvm_get_linear_rip(vcpu);
5900                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5901                                            vcpu->arch.guest_debug_dr7,
5902                                            vcpu->arch.eff_db);
5903
5904                 if (dr6 != 0) {
5905                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5906                         kvm_run->debug.arch.pc = eip;
5907                         kvm_run->debug.arch.exception = DB_VECTOR;
5908                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5909                         *r = EMULATE_USER_EXIT;
5910                         return true;
5911                 }
5912         }
5913
5914         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5915             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5916                 unsigned long eip = kvm_get_linear_rip(vcpu);
5917                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5918                                            vcpu->arch.dr7,
5919                                            vcpu->arch.db);
5920
5921                 if (dr6 != 0) {
5922                         vcpu->arch.dr6 &= ~15;
5923                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5924                         kvm_queue_exception(vcpu, DB_VECTOR);
5925                         *r = EMULATE_DONE;
5926                         return true;
5927                 }
5928         }
5929
5930         return false;
5931 }
5932
5933 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
5934 {
5935         switch (ctxt->opcode_len) {
5936         case 1:
5937                 switch (ctxt->b) {
5938                 case 0xe4:      /* IN */
5939                 case 0xe5:
5940                 case 0xec:
5941                 case 0xed:
5942                 case 0xe6:      /* OUT */
5943                 case 0xe7:
5944                 case 0xee:
5945                 case 0xef:
5946                 case 0x6c:      /* INS */
5947                 case 0x6d:
5948                 case 0x6e:      /* OUTS */
5949                 case 0x6f:
5950                         return true;
5951                 }
5952                 break;
5953         case 2:
5954                 switch (ctxt->b) {
5955                 case 0x33:      /* RDPMC */
5956                         return true;
5957                 }
5958                 break;
5959         }
5960
5961         return false;
5962 }
5963
5964 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5965                             unsigned long cr2,
5966                             int emulation_type,
5967                             void *insn,
5968                             int insn_len)
5969 {
5970         int r;
5971         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5972         bool writeback = true;
5973         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5974
5975         /*
5976          * Clear write_fault_to_shadow_pgtable here to ensure it is
5977          * never reused.
5978          */
5979         vcpu->arch.write_fault_to_shadow_pgtable = false;
5980         kvm_clear_exception_queue(vcpu);
5981
5982         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5983                 init_emulate_ctxt(vcpu);
5984
5985                 /*
5986                  * We will reenter on the same instruction since
5987                  * we do not set complete_userspace_io.  This does not
5988                  * handle watchpoints yet, those would be handled in
5989                  * the emulate_ops.
5990                  */
5991                 if (!(emulation_type & EMULTYPE_SKIP) &&
5992                     kvm_vcpu_check_breakpoint(vcpu, &r))
5993                         return r;
5994
5995                 ctxt->interruptibility = 0;
5996                 ctxt->have_exception = false;
5997                 ctxt->exception.vector = -1;
5998                 ctxt->perm_ok = false;
5999
6000                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6001
6002                 r = x86_decode_insn(ctxt, insn, insn_len);
6003
6004                 trace_kvm_emulate_insn_start(vcpu);
6005                 ++vcpu->stat.insn_emulation;
6006                 if (r != EMULATION_OK)  {
6007                         if (emulation_type & EMULTYPE_TRAP_UD)
6008                                 return EMULATE_FAIL;
6009                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6010                                                 emulation_type))
6011                                 return EMULATE_DONE;
6012                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6013                                 return EMULATE_DONE;
6014                         if (emulation_type & EMULTYPE_SKIP)
6015                                 return EMULATE_FAIL;
6016                         return handle_emulation_failure(vcpu, emulation_type);
6017                 }
6018         }
6019
6020         if ((emulation_type & EMULTYPE_VMWARE) &&
6021             !is_vmware_backdoor_opcode(ctxt))
6022                 return EMULATE_FAIL;
6023
6024         if (emulation_type & EMULTYPE_SKIP) {
6025                 kvm_rip_write(vcpu, ctxt->_eip);
6026                 if (ctxt->eflags & X86_EFLAGS_RF)
6027                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6028                 return EMULATE_DONE;
6029         }
6030
6031         if (retry_instruction(ctxt, cr2, emulation_type))
6032                 return EMULATE_DONE;
6033
6034         /* this is needed for vmware backdoor interface to work since it
6035            changes registers values  during IO operation */
6036         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6037                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6038                 emulator_invalidate_register_cache(ctxt);
6039         }
6040
6041 restart:
6042         /* Save the faulting GPA (cr2) in the address field */
6043         ctxt->exception.address = cr2;
6044
6045         r = x86_emulate_insn(ctxt);
6046
6047         if (r == EMULATION_INTERCEPTED)
6048                 return EMULATE_DONE;
6049
6050         if (r == EMULATION_FAILED) {
6051                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6052                                         emulation_type))
6053                         return EMULATE_DONE;
6054
6055                 return handle_emulation_failure(vcpu, emulation_type);
6056         }
6057
6058         if (ctxt->have_exception) {
6059                 r = EMULATE_DONE;
6060                 if (inject_emulated_exception(vcpu))
6061                         return r;
6062         } else if (vcpu->arch.pio.count) {
6063                 if (!vcpu->arch.pio.in) {
6064                         /* FIXME: return into emulator if single-stepping.  */
6065                         vcpu->arch.pio.count = 0;
6066                 } else {
6067                         writeback = false;
6068                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6069                 }
6070                 r = EMULATE_USER_EXIT;
6071         } else if (vcpu->mmio_needed) {
6072                 if (!vcpu->mmio_is_write)
6073                         writeback = false;
6074                 r = EMULATE_USER_EXIT;
6075                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6076         } else if (r == EMULATION_RESTART)
6077                 goto restart;
6078         else
6079                 r = EMULATE_DONE;
6080
6081         if (writeback) {
6082                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6083                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6084                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6085                 kvm_rip_write(vcpu, ctxt->eip);
6086                 if (r == EMULATE_DONE &&
6087                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6088                         kvm_vcpu_do_singlestep(vcpu, &r);
6089                 if (!ctxt->have_exception ||
6090                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6091                         __kvm_set_rflags(vcpu, ctxt->eflags);
6092
6093                 /*
6094                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6095                  * do nothing, and it will be requested again as soon as
6096                  * the shadow expires.  But we still need to check here,
6097                  * because POPF has no interrupt shadow.
6098                  */
6099                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6100                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6101         } else
6102                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6103
6104         return r;
6105 }
6106 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
6107
6108 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6109                             unsigned short port)
6110 {
6111         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6112         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6113                                             size, port, &val, 1);
6114         /* do not return to emulator after return from userspace */
6115         vcpu->arch.pio.count = 0;
6116         return ret;
6117 }
6118
6119 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6120 {
6121         unsigned long val;
6122
6123         /* We should only ever be called with arch.pio.count equal to 1 */
6124         BUG_ON(vcpu->arch.pio.count != 1);
6125
6126         /* For size less than 4 we merge, else we zero extend */
6127         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6128                                         : 0;
6129
6130         /*
6131          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6132          * the copy and tracing
6133          */
6134         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6135                                  vcpu->arch.pio.port, &val, 1);
6136         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6137
6138         return 1;
6139 }
6140
6141 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6142                            unsigned short port)
6143 {
6144         unsigned long val;
6145         int ret;
6146
6147         /* For size less than 4 we merge, else we zero extend */
6148         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6149
6150         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6151                                        &val, 1);
6152         if (ret) {
6153                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6154                 return ret;
6155         }
6156
6157         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6158
6159         return 0;
6160 }
6161
6162 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6163 {
6164         int ret = kvm_skip_emulated_instruction(vcpu);
6165
6166         /*
6167          * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
6168          * KVM_EXIT_DEBUG here.
6169          */
6170         if (in)
6171                 return kvm_fast_pio_in(vcpu, size, port) && ret;
6172         else
6173                 return kvm_fast_pio_out(vcpu, size, port) && ret;
6174 }
6175 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6176
6177 static int kvmclock_cpu_down_prep(unsigned int cpu)
6178 {
6179         __this_cpu_write(cpu_tsc_khz, 0);
6180         return 0;
6181 }
6182
6183 static void tsc_khz_changed(void *data)
6184 {
6185         struct cpufreq_freqs *freq = data;
6186         unsigned long khz = 0;
6187
6188         if (data)
6189                 khz = freq->new;
6190         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6191                 khz = cpufreq_quick_get(raw_smp_processor_id());
6192         if (!khz)
6193                 khz = tsc_khz;
6194         __this_cpu_write(cpu_tsc_khz, khz);
6195 }
6196
6197 #ifdef CONFIG_X86_64
6198 static void kvm_hyperv_tsc_notifier(void)
6199 {
6200         struct kvm *kvm;
6201         struct kvm_vcpu *vcpu;
6202         int cpu;
6203
6204         spin_lock(&kvm_lock);
6205         list_for_each_entry(kvm, &vm_list, vm_list)
6206                 kvm_make_mclock_inprogress_request(kvm);
6207
6208         hyperv_stop_tsc_emulation();
6209
6210         /* TSC frequency always matches when on Hyper-V */
6211         for_each_present_cpu(cpu)
6212                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6213         kvm_max_guest_tsc_khz = tsc_khz;
6214
6215         list_for_each_entry(kvm, &vm_list, vm_list) {
6216                 struct kvm_arch *ka = &kvm->arch;
6217
6218                 spin_lock(&ka->pvclock_gtod_sync_lock);
6219
6220                 pvclock_update_vm_gtod_copy(kvm);
6221
6222                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6223                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6224
6225                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6226                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6227
6228                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6229         }
6230         spin_unlock(&kvm_lock);
6231 }
6232 #endif
6233
6234 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6235                                      void *data)
6236 {
6237         struct cpufreq_freqs *freq = data;
6238         struct kvm *kvm;
6239         struct kvm_vcpu *vcpu;
6240         int i, send_ipi = 0;
6241
6242         /*
6243          * We allow guests to temporarily run on slowing clocks,
6244          * provided we notify them after, or to run on accelerating
6245          * clocks, provided we notify them before.  Thus time never
6246          * goes backwards.
6247          *
6248          * However, we have a problem.  We can't atomically update
6249          * the frequency of a given CPU from this function; it is
6250          * merely a notifier, which can be called from any CPU.
6251          * Changing the TSC frequency at arbitrary points in time
6252          * requires a recomputation of local variables related to
6253          * the TSC for each VCPU.  We must flag these local variables
6254          * to be updated and be sure the update takes place with the
6255          * new frequency before any guests proceed.
6256          *
6257          * Unfortunately, the combination of hotplug CPU and frequency
6258          * change creates an intractable locking scenario; the order
6259          * of when these callouts happen is undefined with respect to
6260          * CPU hotplug, and they can race with each other.  As such,
6261          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6262          * undefined; you can actually have a CPU frequency change take
6263          * place in between the computation of X and the setting of the
6264          * variable.  To protect against this problem, all updates of
6265          * the per_cpu tsc_khz variable are done in an interrupt
6266          * protected IPI, and all callers wishing to update the value
6267          * must wait for a synchronous IPI to complete (which is trivial
6268          * if the caller is on the CPU already).  This establishes the
6269          * necessary total order on variable updates.
6270          *
6271          * Note that because a guest time update may take place
6272          * anytime after the setting of the VCPU's request bit, the
6273          * correct TSC value must be set before the request.  However,
6274          * to ensure the update actually makes it to any guest which
6275          * starts running in hardware virtualization between the set
6276          * and the acquisition of the spinlock, we must also ping the
6277          * CPU after setting the request bit.
6278          *
6279          */
6280
6281         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6282                 return 0;
6283         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6284                 return 0;
6285
6286         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6287
6288         spin_lock(&kvm_lock);
6289         list_for_each_entry(kvm, &vm_list, vm_list) {
6290                 kvm_for_each_vcpu(i, vcpu, kvm) {
6291                         if (vcpu->cpu != freq->cpu)
6292                                 continue;
6293                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6294                         if (vcpu->cpu != smp_processor_id())
6295                                 send_ipi = 1;
6296                 }
6297         }
6298         spin_unlock(&kvm_lock);
6299
6300         if (freq->old < freq->new && send_ipi) {
6301                 /*
6302                  * We upscale the frequency.  Must make the guest
6303                  * doesn't see old kvmclock values while running with
6304                  * the new frequency, otherwise we risk the guest sees
6305                  * time go backwards.
6306                  *
6307                  * In case we update the frequency for another cpu
6308                  * (which might be in guest context) send an interrupt
6309                  * to kick the cpu out of guest context.  Next time
6310                  * guest context is entered kvmclock will be updated,
6311                  * so the guest will not see stale values.
6312                  */
6313                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6314         }
6315         return 0;
6316 }
6317
6318 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6319         .notifier_call  = kvmclock_cpufreq_notifier
6320 };
6321
6322 static int kvmclock_cpu_online(unsigned int cpu)
6323 {
6324         tsc_khz_changed(NULL);
6325         return 0;
6326 }
6327
6328 static void kvm_timer_init(void)
6329 {
6330         max_tsc_khz = tsc_khz;
6331
6332         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6333 #ifdef CONFIG_CPU_FREQ
6334                 struct cpufreq_policy policy;
6335                 int cpu;
6336
6337                 memset(&policy, 0, sizeof(policy));
6338                 cpu = get_cpu();
6339                 cpufreq_get_policy(&policy, cpu);
6340                 if (policy.cpuinfo.max_freq)
6341                         max_tsc_khz = policy.cpuinfo.max_freq;
6342                 put_cpu();
6343 #endif
6344                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6345                                           CPUFREQ_TRANSITION_NOTIFIER);
6346         }
6347         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6348
6349         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6350                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6351 }
6352
6353 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6354
6355 int kvm_is_in_guest(void)
6356 {
6357         return __this_cpu_read(current_vcpu) != NULL;
6358 }
6359
6360 static int kvm_is_user_mode(void)
6361 {
6362         int user_mode = 3;
6363
6364         if (__this_cpu_read(current_vcpu))
6365                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6366
6367         return user_mode != 0;
6368 }
6369
6370 static unsigned long kvm_get_guest_ip(void)
6371 {
6372         unsigned long ip = 0;
6373
6374         if (__this_cpu_read(current_vcpu))
6375                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6376
6377         return ip;
6378 }
6379
6380 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6381         .is_in_guest            = kvm_is_in_guest,
6382         .is_user_mode           = kvm_is_user_mode,
6383         .get_guest_ip           = kvm_get_guest_ip,
6384 };
6385
6386 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
6387 {
6388         __this_cpu_write(current_vcpu, vcpu);
6389 }
6390 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
6391
6392 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
6393 {
6394         __this_cpu_write(current_vcpu, NULL);
6395 }
6396 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
6397
6398 static void kvm_set_mmio_spte_mask(void)
6399 {
6400         u64 mask;
6401         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6402
6403         /*
6404          * Set the reserved bits and the present bit of an paging-structure
6405          * entry to generate page fault with PFER.RSV = 1.
6406          */
6407          /* Mask the reserved physical address bits. */
6408         mask = rsvd_bits(maxphyaddr, 51);
6409
6410         /* Set the present bit. */
6411         mask |= 1ull;
6412
6413 #ifdef CONFIG_X86_64
6414         /*
6415          * If reserved bit is not supported, clear the present bit to disable
6416          * mmio page fault.
6417          */
6418         if (maxphyaddr == 52)
6419                 mask &= ~1ull;
6420 #endif
6421
6422         kvm_mmu_set_mmio_spte_mask(mask, mask);
6423 }
6424
6425 #ifdef CONFIG_X86_64
6426 static void pvclock_gtod_update_fn(struct work_struct *work)
6427 {
6428         struct kvm *kvm;
6429
6430         struct kvm_vcpu *vcpu;
6431         int i;
6432
6433         spin_lock(&kvm_lock);
6434         list_for_each_entry(kvm, &vm_list, vm_list)
6435                 kvm_for_each_vcpu(i, vcpu, kvm)
6436                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6437         atomic_set(&kvm_guest_has_master_clock, 0);
6438         spin_unlock(&kvm_lock);
6439 }
6440
6441 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6442
6443 /*
6444  * Notification about pvclock gtod data update.
6445  */
6446 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6447                                void *priv)
6448 {
6449         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6450         struct timekeeper *tk = priv;
6451
6452         update_pvclock_gtod(tk);
6453
6454         /* disable master clock if host does not trust, or does not
6455          * use, TSC based clocksource.
6456          */
6457         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6458             atomic_read(&kvm_guest_has_master_clock) != 0)
6459                 queue_work(system_long_wq, &pvclock_gtod_work);
6460
6461         return 0;
6462 }
6463
6464 static struct notifier_block pvclock_gtod_notifier = {
6465         .notifier_call = pvclock_gtod_notify,
6466 };
6467 #endif
6468
6469 int kvm_arch_init(void *opaque)
6470 {
6471         int r;
6472         struct kvm_x86_ops *ops = opaque;
6473
6474         if (kvm_x86_ops) {
6475                 printk(KERN_ERR "kvm: already loaded the other module\n");
6476                 r = -EEXIST;
6477                 goto out;
6478         }
6479
6480         if (!ops->cpu_has_kvm_support()) {
6481                 printk(KERN_ERR "kvm: no hardware support\n");
6482                 r = -EOPNOTSUPP;
6483                 goto out;
6484         }
6485         if (ops->disabled_by_bios()) {
6486                 printk(KERN_ERR "kvm: disabled by bios\n");
6487                 r = -EOPNOTSUPP;
6488                 goto out;
6489         }
6490
6491         r = -ENOMEM;
6492         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6493         if (!shared_msrs) {
6494                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6495                 goto out;
6496         }
6497
6498         r = kvm_mmu_module_init();
6499         if (r)
6500                 goto out_free_percpu;
6501
6502         kvm_set_mmio_spte_mask();
6503
6504         kvm_x86_ops = ops;
6505
6506         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6507                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6508                         PT_PRESENT_MASK, 0, sme_me_mask);
6509         kvm_timer_init();
6510
6511         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6512
6513         if (boot_cpu_has(X86_FEATURE_XSAVE))
6514                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6515
6516         kvm_lapic_init();
6517 #ifdef CONFIG_X86_64
6518         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6519
6520         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6521                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6522 #endif
6523
6524         return 0;
6525
6526 out_free_percpu:
6527         free_percpu(shared_msrs);
6528 out:
6529         return r;
6530 }
6531
6532 void kvm_arch_exit(void)
6533 {
6534 #ifdef CONFIG_X86_64
6535         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6536                 clear_hv_tscchange_cb();
6537 #endif
6538         kvm_lapic_exit();
6539         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6540
6541         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6542                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6543                                             CPUFREQ_TRANSITION_NOTIFIER);
6544         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6545 #ifdef CONFIG_X86_64
6546         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6547 #endif
6548         kvm_x86_ops = NULL;
6549         kvm_mmu_module_exit();
6550         free_percpu(shared_msrs);
6551 }
6552
6553 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6554 {
6555         ++vcpu->stat.halt_exits;
6556         if (lapic_in_kernel(vcpu)) {
6557                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6558                 return 1;
6559         } else {
6560                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6561                 return 0;
6562         }
6563 }
6564 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6565
6566 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6567 {
6568         int ret = kvm_skip_emulated_instruction(vcpu);
6569         /*
6570          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6571          * KVM_EXIT_DEBUG here.
6572          */
6573         return kvm_vcpu_halt(vcpu) && ret;
6574 }
6575 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6576
6577 #ifdef CONFIG_X86_64
6578 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6579                                 unsigned long clock_type)
6580 {
6581         struct kvm_clock_pairing clock_pairing;
6582         struct timespec ts;
6583         u64 cycle;
6584         int ret;
6585
6586         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6587                 return -KVM_EOPNOTSUPP;
6588
6589         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6590                 return -KVM_EOPNOTSUPP;
6591
6592         clock_pairing.sec = ts.tv_sec;
6593         clock_pairing.nsec = ts.tv_nsec;
6594         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6595         clock_pairing.flags = 0;
6596
6597         ret = 0;
6598         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6599                             sizeof(struct kvm_clock_pairing)))
6600                 ret = -KVM_EFAULT;
6601
6602         return ret;
6603 }
6604 #endif
6605
6606 /*
6607  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6608  *
6609  * @apicid - apicid of vcpu to be kicked.
6610  */
6611 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6612 {
6613         struct kvm_lapic_irq lapic_irq;
6614
6615         lapic_irq.shorthand = 0;
6616         lapic_irq.dest_mode = 0;
6617         lapic_irq.level = 0;
6618         lapic_irq.dest_id = apicid;
6619         lapic_irq.msi_redir_hint = false;
6620
6621         lapic_irq.delivery_mode = APIC_DM_REMRD;
6622         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6623 }
6624
6625 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6626 {
6627         vcpu->arch.apicv_active = false;
6628         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6629 }
6630
6631 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6632 {
6633         unsigned long nr, a0, a1, a2, a3, ret;
6634         int op_64_bit, r;
6635
6636         r = kvm_skip_emulated_instruction(vcpu);
6637
6638         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6639                 return kvm_hv_hypercall(vcpu);
6640
6641         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6642         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6643         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6644         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6645         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6646
6647         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6648
6649         op_64_bit = is_64_bit_mode(vcpu);
6650         if (!op_64_bit) {
6651                 nr &= 0xFFFFFFFF;
6652                 a0 &= 0xFFFFFFFF;
6653                 a1 &= 0xFFFFFFFF;
6654                 a2 &= 0xFFFFFFFF;
6655                 a3 &= 0xFFFFFFFF;
6656         }
6657
6658         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6659                 ret = -KVM_EPERM;
6660                 goto out;
6661         }
6662
6663         switch (nr) {
6664         case KVM_HC_VAPIC_POLL_IRQ:
6665                 ret = 0;
6666                 break;
6667         case KVM_HC_KICK_CPU:
6668                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6669                 ret = 0;
6670                 break;
6671 #ifdef CONFIG_X86_64
6672         case KVM_HC_CLOCK_PAIRING:
6673                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6674                 break;
6675 #endif
6676         default:
6677                 ret = -KVM_ENOSYS;
6678                 break;
6679         }
6680 out:
6681         if (!op_64_bit)
6682                 ret = (u32)ret;
6683         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6684         ++vcpu->stat.hypercalls;
6685         return r;
6686 }
6687 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6688
6689 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6690 {
6691         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6692         char instruction[3];
6693         unsigned long rip = kvm_rip_read(vcpu);
6694
6695         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6696
6697         return emulator_write_emulated(ctxt, rip, instruction, 3,
6698                 &ctxt->exception);
6699 }
6700
6701 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6702 {
6703         return vcpu->run->request_interrupt_window &&
6704                 likely(!pic_in_kernel(vcpu->kvm));
6705 }
6706
6707 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6708 {
6709         struct kvm_run *kvm_run = vcpu->run;
6710
6711         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6712         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6713         kvm_run->cr8 = kvm_get_cr8(vcpu);
6714         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6715         kvm_run->ready_for_interrupt_injection =
6716                 pic_in_kernel(vcpu->kvm) ||
6717                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6718 }
6719
6720 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6721 {
6722         int max_irr, tpr;
6723
6724         if (!kvm_x86_ops->update_cr8_intercept)
6725                 return;
6726
6727         if (!lapic_in_kernel(vcpu))
6728                 return;
6729
6730         if (vcpu->arch.apicv_active)
6731                 return;
6732
6733         if (!vcpu->arch.apic->vapic_addr)
6734                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6735         else
6736                 max_irr = -1;
6737
6738         if (max_irr != -1)
6739                 max_irr >>= 4;
6740
6741         tpr = kvm_lapic_get_cr8(vcpu);
6742
6743         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6744 }
6745
6746 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6747 {
6748         int r;
6749
6750         /* try to reinject previous events if any */
6751         if (vcpu->arch.exception.injected) {
6752                 kvm_x86_ops->queue_exception(vcpu);
6753                 return 0;
6754         }
6755
6756         /*
6757          * Exceptions must be injected immediately, or the exception
6758          * frame will have the address of the NMI or interrupt handler.
6759          */
6760         if (!vcpu->arch.exception.pending) {
6761                 if (vcpu->arch.nmi_injected) {
6762                         kvm_x86_ops->set_nmi(vcpu);
6763                         return 0;
6764                 }
6765
6766                 if (vcpu->arch.interrupt.pending) {
6767                         kvm_x86_ops->set_irq(vcpu);
6768                         return 0;
6769                 }
6770         }
6771
6772         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6773                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6774                 if (r != 0)
6775                         return r;
6776         }
6777
6778         /* try to inject new event if pending */
6779         if (vcpu->arch.exception.pending) {
6780                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6781                                         vcpu->arch.exception.has_error_code,
6782                                         vcpu->arch.exception.error_code);
6783
6784                 vcpu->arch.exception.pending = false;
6785                 vcpu->arch.exception.injected = true;
6786
6787                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6788                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6789                                              X86_EFLAGS_RF);
6790
6791                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6792                     (vcpu->arch.dr7 & DR7_GD)) {
6793                         vcpu->arch.dr7 &= ~DR7_GD;
6794                         kvm_update_dr7(vcpu);
6795                 }
6796
6797                 kvm_x86_ops->queue_exception(vcpu);
6798         } else if (vcpu->arch.smi_pending && !is_smm(vcpu) && kvm_x86_ops->smi_allowed(vcpu)) {
6799                 vcpu->arch.smi_pending = false;
6800                 ++vcpu->arch.smi_count;
6801                 enter_smm(vcpu);
6802         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6803                 --vcpu->arch.nmi_pending;
6804                 vcpu->arch.nmi_injected = true;
6805                 kvm_x86_ops->set_nmi(vcpu);
6806         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6807                 /*
6808                  * Because interrupts can be injected asynchronously, we are
6809                  * calling check_nested_events again here to avoid a race condition.
6810                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6811                  * proposal and current concerns.  Perhaps we should be setting
6812                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6813                  */
6814                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6815                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6816                         if (r != 0)
6817                                 return r;
6818                 }
6819                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6820                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6821                                             false);
6822                         kvm_x86_ops->set_irq(vcpu);
6823                 }
6824         }
6825
6826         return 0;
6827 }
6828
6829 static void process_nmi(struct kvm_vcpu *vcpu)
6830 {
6831         unsigned limit = 2;
6832
6833         /*
6834          * x86 is limited to one NMI running, and one NMI pending after it.
6835          * If an NMI is already in progress, limit further NMIs to just one.
6836          * Otherwise, allow two (and we'll inject the first one immediately).
6837          */
6838         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6839                 limit = 1;
6840
6841         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6842         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6843         kvm_make_request(KVM_REQ_EVENT, vcpu);
6844 }
6845
6846 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6847 {
6848         u32 flags = 0;
6849         flags |= seg->g       << 23;
6850         flags |= seg->db      << 22;
6851         flags |= seg->l       << 21;
6852         flags |= seg->avl     << 20;
6853         flags |= seg->present << 15;
6854         flags |= seg->dpl     << 13;
6855         flags |= seg->s       << 12;
6856         flags |= seg->type    << 8;
6857         return flags;
6858 }
6859
6860 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6861 {
6862         struct kvm_segment seg;
6863         int offset;
6864
6865         kvm_get_segment(vcpu, &seg, n);
6866         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6867
6868         if (n < 3)
6869                 offset = 0x7f84 + n * 12;
6870         else
6871                 offset = 0x7f2c + (n - 3) * 12;
6872
6873         put_smstate(u32, buf, offset + 8, seg.base);
6874         put_smstate(u32, buf, offset + 4, seg.limit);
6875         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6876 }
6877
6878 #ifdef CONFIG_X86_64
6879 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6880 {
6881         struct kvm_segment seg;
6882         int offset;
6883         u16 flags;
6884
6885         kvm_get_segment(vcpu, &seg, n);
6886         offset = 0x7e00 + n * 16;
6887
6888         flags = enter_smm_get_segment_flags(&seg) >> 8;
6889         put_smstate(u16, buf, offset, seg.selector);
6890         put_smstate(u16, buf, offset + 2, flags);
6891         put_smstate(u32, buf, offset + 4, seg.limit);
6892         put_smstate(u64, buf, offset + 8, seg.base);
6893 }
6894 #endif
6895
6896 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6897 {
6898         struct desc_ptr dt;
6899         struct kvm_segment seg;
6900         unsigned long val;
6901         int i;
6902
6903         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6904         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6905         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6906         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6907
6908         for (i = 0; i < 8; i++)
6909                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6910
6911         kvm_get_dr(vcpu, 6, &val);
6912         put_smstate(u32, buf, 0x7fcc, (u32)val);
6913         kvm_get_dr(vcpu, 7, &val);
6914         put_smstate(u32, buf, 0x7fc8, (u32)val);
6915
6916         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6917         put_smstate(u32, buf, 0x7fc4, seg.selector);
6918         put_smstate(u32, buf, 0x7f64, seg.base);
6919         put_smstate(u32, buf, 0x7f60, seg.limit);
6920         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6921
6922         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6923         put_smstate(u32, buf, 0x7fc0, seg.selector);
6924         put_smstate(u32, buf, 0x7f80, seg.base);
6925         put_smstate(u32, buf, 0x7f7c, seg.limit);
6926         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6927
6928         kvm_x86_ops->get_gdt(vcpu, &dt);
6929         put_smstate(u32, buf, 0x7f74, dt.address);
6930         put_smstate(u32, buf, 0x7f70, dt.size);
6931
6932         kvm_x86_ops->get_idt(vcpu, &dt);
6933         put_smstate(u32, buf, 0x7f58, dt.address);
6934         put_smstate(u32, buf, 0x7f54, dt.size);
6935
6936         for (i = 0; i < 6; i++)
6937                 enter_smm_save_seg_32(vcpu, buf, i);
6938
6939         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6940
6941         /* revision id */
6942         put_smstate(u32, buf, 0x7efc, 0x00020000);
6943         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6944 }
6945
6946 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6947 {
6948 #ifdef CONFIG_X86_64
6949         struct desc_ptr dt;
6950         struct kvm_segment seg;
6951         unsigned long val;
6952         int i;
6953
6954         for (i = 0; i < 16; i++)
6955                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6956
6957         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6958         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6959
6960         kvm_get_dr(vcpu, 6, &val);
6961         put_smstate(u64, buf, 0x7f68, val);
6962         kvm_get_dr(vcpu, 7, &val);
6963         put_smstate(u64, buf, 0x7f60, val);
6964
6965         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6966         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6967         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6968
6969         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6970
6971         /* revision id */
6972         put_smstate(u32, buf, 0x7efc, 0x00020064);
6973
6974         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6975
6976         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6977         put_smstate(u16, buf, 0x7e90, seg.selector);
6978         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6979         put_smstate(u32, buf, 0x7e94, seg.limit);
6980         put_smstate(u64, buf, 0x7e98, seg.base);
6981
6982         kvm_x86_ops->get_idt(vcpu, &dt);
6983         put_smstate(u32, buf, 0x7e84, dt.size);
6984         put_smstate(u64, buf, 0x7e88, dt.address);
6985
6986         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6987         put_smstate(u16, buf, 0x7e70, seg.selector);
6988         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6989         put_smstate(u32, buf, 0x7e74, seg.limit);
6990         put_smstate(u64, buf, 0x7e78, seg.base);
6991
6992         kvm_x86_ops->get_gdt(vcpu, &dt);
6993         put_smstate(u32, buf, 0x7e64, dt.size);
6994         put_smstate(u64, buf, 0x7e68, dt.address);
6995
6996         for (i = 0; i < 6; i++)
6997                 enter_smm_save_seg_64(vcpu, buf, i);
6998 #else
6999         WARN_ON_ONCE(1);
7000 #endif
7001 }
7002
7003 static void enter_smm(struct kvm_vcpu *vcpu)
7004 {
7005         struct kvm_segment cs, ds;
7006         struct desc_ptr dt;
7007         char buf[512];
7008         u32 cr0;
7009
7010         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7011         memset(buf, 0, 512);
7012         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7013                 enter_smm_save_state_64(vcpu, buf);
7014         else
7015                 enter_smm_save_state_32(vcpu, buf);
7016
7017         /*
7018          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7019          * vCPU state (e.g. leave guest mode) after we've saved the state into
7020          * the SMM state-save area.
7021          */
7022         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7023
7024         vcpu->arch.hflags |= HF_SMM_MASK;
7025         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7026
7027         if (kvm_x86_ops->get_nmi_mask(vcpu))
7028                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7029         else
7030                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7031
7032         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7033         kvm_rip_write(vcpu, 0x8000);
7034
7035         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7036         kvm_x86_ops->set_cr0(vcpu, cr0);
7037         vcpu->arch.cr0 = cr0;
7038
7039         kvm_x86_ops->set_cr4(vcpu, 0);
7040
7041         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7042         dt.address = dt.size = 0;
7043         kvm_x86_ops->set_idt(vcpu, &dt);
7044
7045         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7046
7047         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7048         cs.base = vcpu->arch.smbase;
7049
7050         ds.selector = 0;
7051         ds.base = 0;
7052
7053         cs.limit    = ds.limit = 0xffffffff;
7054         cs.type     = ds.type = 0x3;
7055         cs.dpl      = ds.dpl = 0;
7056         cs.db       = ds.db = 0;
7057         cs.s        = ds.s = 1;
7058         cs.l        = ds.l = 0;
7059         cs.g        = ds.g = 1;
7060         cs.avl      = ds.avl = 0;
7061         cs.present  = ds.present = 1;
7062         cs.unusable = ds.unusable = 0;
7063         cs.padding  = ds.padding = 0;
7064
7065         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7066         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7067         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7068         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7069         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7070         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7071
7072         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7073                 kvm_x86_ops->set_efer(vcpu, 0);
7074
7075         kvm_update_cpuid(vcpu);
7076         kvm_mmu_reset_context(vcpu);
7077 }
7078
7079 static void process_smi(struct kvm_vcpu *vcpu)
7080 {
7081         vcpu->arch.smi_pending = true;
7082         kvm_make_request(KVM_REQ_EVENT, vcpu);
7083 }
7084
7085 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7086 {
7087         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7088 }
7089
7090 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7091 {
7092         u64 eoi_exit_bitmap[4];
7093
7094         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7095                 return;
7096
7097         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7098
7099         if (irqchip_split(vcpu->kvm))
7100                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7101         else {
7102                 if (vcpu->arch.apicv_active)
7103                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7104                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7105         }
7106         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7107                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7108         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7109 }
7110
7111 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7112                 unsigned long start, unsigned long end)
7113 {
7114         unsigned long apic_address;
7115
7116         /*
7117          * The physical address of apic access page is stored in the VMCS.
7118          * Update it when it becomes invalid.
7119          */
7120         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7121         if (start <= apic_address && apic_address < end)
7122                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7123 }
7124
7125 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7126 {
7127         struct page *page = NULL;
7128
7129         if (!lapic_in_kernel(vcpu))
7130                 return;
7131
7132         if (!kvm_x86_ops->set_apic_access_page_addr)
7133                 return;
7134
7135         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7136         if (is_error_page(page))
7137                 return;
7138         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7139
7140         /*
7141          * Do not pin apic access page in memory, the MMU notifier
7142          * will call us again if it is migrated or swapped out.
7143          */
7144         put_page(page);
7145 }
7146 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7147
7148 /*
7149  * Returns 1 to let vcpu_run() continue the guest execution loop without
7150  * exiting to the userspace.  Otherwise, the value will be returned to the
7151  * userspace.
7152  */
7153 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7154 {
7155         int r;
7156         bool req_int_win =
7157                 dm_request_for_irq_injection(vcpu) &&
7158                 kvm_cpu_accept_dm_intr(vcpu);
7159
7160         bool req_immediate_exit = false;
7161
7162         if (kvm_request_pending(vcpu)) {
7163                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7164                         kvm_mmu_unload(vcpu);
7165                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7166                         __kvm_migrate_timers(vcpu);
7167                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7168                         kvm_gen_update_masterclock(vcpu->kvm);
7169                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7170                         kvm_gen_kvmclock_update(vcpu);
7171                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7172                         r = kvm_guest_time_update(vcpu);
7173                         if (unlikely(r))
7174                                 goto out;
7175                 }
7176                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7177                         kvm_mmu_sync_roots(vcpu);
7178                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7179                         kvm_vcpu_flush_tlb(vcpu, true);
7180                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7181                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7182                         r = 0;
7183                         goto out;
7184                 }
7185                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7186                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7187                         vcpu->mmio_needed = 0;
7188                         r = 0;
7189                         goto out;
7190                 }
7191                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7192                         /* Page is swapped out. Do synthetic halt */
7193                         vcpu->arch.apf.halted = true;
7194                         r = 1;
7195                         goto out;
7196                 }
7197                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7198                         record_steal_time(vcpu);
7199                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7200                         process_smi(vcpu);
7201                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7202                         process_nmi(vcpu);
7203                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7204                         kvm_pmu_handle_event(vcpu);
7205                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7206                         kvm_pmu_deliver_pmi(vcpu);
7207                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7208                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7209                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7210                                      vcpu->arch.ioapic_handled_vectors)) {
7211                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7212                                 vcpu->run->eoi.vector =
7213                                                 vcpu->arch.pending_ioapic_eoi;
7214                                 r = 0;
7215                                 goto out;
7216                         }
7217                 }
7218                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7219                         vcpu_scan_ioapic(vcpu);
7220                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7221                         kvm_vcpu_reload_apic_access_page(vcpu);
7222                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7223                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7224                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7225                         r = 0;
7226                         goto out;
7227                 }
7228                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7229                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7230                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7231                         r = 0;
7232                         goto out;
7233                 }
7234                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7235                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7236                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7237                         r = 0;
7238                         goto out;
7239                 }
7240
7241                 /*
7242                  * KVM_REQ_HV_STIMER has to be processed after
7243                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7244                  * depend on the guest clock being up-to-date
7245                  */
7246                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7247                         kvm_hv_process_stimers(vcpu);
7248         }
7249
7250         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7251                 ++vcpu->stat.req_event;
7252                 kvm_apic_accept_events(vcpu);
7253                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7254                         r = 1;
7255                         goto out;
7256                 }
7257
7258                 if (inject_pending_event(vcpu, req_int_win) != 0)
7259                         req_immediate_exit = true;
7260                 else {
7261                         /* Enable SMI/NMI/IRQ window open exits if needed.
7262                          *
7263                          * SMIs have three cases:
7264                          * 1) They can be nested, and then there is nothing to
7265                          *    do here because RSM will cause a vmexit anyway.
7266                          * 2) There is an ISA-specific reason why SMI cannot be
7267                          *    injected, and the moment when this changes can be
7268                          *    intercepted.
7269                          * 3) Or the SMI can be pending because
7270                          *    inject_pending_event has completed the injection
7271                          *    of an IRQ or NMI from the previous vmexit, and
7272                          *    then we request an immediate exit to inject the
7273                          *    SMI.
7274                          */
7275                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7276                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7277                                         req_immediate_exit = true;
7278                         if (vcpu->arch.nmi_pending)
7279                                 kvm_x86_ops->enable_nmi_window(vcpu);
7280                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7281                                 kvm_x86_ops->enable_irq_window(vcpu);
7282                         WARN_ON(vcpu->arch.exception.pending);
7283                 }
7284
7285                 if (kvm_lapic_enabled(vcpu)) {
7286                         update_cr8_intercept(vcpu);
7287                         kvm_lapic_sync_to_vapic(vcpu);
7288                 }
7289         }
7290
7291         r = kvm_mmu_reload(vcpu);
7292         if (unlikely(r)) {
7293                 goto cancel_injection;
7294         }
7295
7296         preempt_disable();
7297
7298         kvm_x86_ops->prepare_guest_switch(vcpu);
7299
7300         /*
7301          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7302          * IPI are then delayed after guest entry, which ensures that they
7303          * result in virtual interrupt delivery.
7304          */
7305         local_irq_disable();
7306         vcpu->mode = IN_GUEST_MODE;
7307
7308         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7309
7310         /*
7311          * 1) We should set ->mode before checking ->requests.  Please see
7312          * the comment in kvm_vcpu_exiting_guest_mode().
7313          *
7314          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7315          * pairs with the memory barrier implicit in pi_test_and_set_on
7316          * (see vmx_deliver_posted_interrupt).
7317          *
7318          * 3) This also orders the write to mode from any reads to the page
7319          * tables done while the VCPU is running.  Please see the comment
7320          * in kvm_flush_remote_tlbs.
7321          */
7322         smp_mb__after_srcu_read_unlock();
7323
7324         /*
7325          * This handles the case where a posted interrupt was
7326          * notified with kvm_vcpu_kick.
7327          */
7328         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7329                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7330
7331         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7332             || need_resched() || signal_pending(current)) {
7333                 vcpu->mode = OUTSIDE_GUEST_MODE;
7334                 smp_wmb();
7335                 local_irq_enable();
7336                 preempt_enable();
7337                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7338                 r = 1;
7339                 goto cancel_injection;
7340         }
7341
7342         kvm_load_guest_xcr0(vcpu);
7343
7344         if (req_immediate_exit) {
7345                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7346                 smp_send_reschedule(vcpu->cpu);
7347         }
7348
7349         trace_kvm_entry(vcpu->vcpu_id);
7350         if (lapic_timer_advance_ns)
7351                 wait_lapic_expire(vcpu);
7352         guest_enter_irqoff();
7353
7354         if (unlikely(vcpu->arch.switch_db_regs)) {
7355                 set_debugreg(0, 7);
7356                 set_debugreg(vcpu->arch.eff_db[0], 0);
7357                 set_debugreg(vcpu->arch.eff_db[1], 1);
7358                 set_debugreg(vcpu->arch.eff_db[2], 2);
7359                 set_debugreg(vcpu->arch.eff_db[3], 3);
7360                 set_debugreg(vcpu->arch.dr6, 6);
7361                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7362         }
7363
7364         kvm_x86_ops->run(vcpu);
7365
7366         /*
7367          * Do this here before restoring debug registers on the host.  And
7368          * since we do this before handling the vmexit, a DR access vmexit
7369          * can (a) read the correct value of the debug registers, (b) set
7370          * KVM_DEBUGREG_WONT_EXIT again.
7371          */
7372         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7373                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7374                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7375                 kvm_update_dr0123(vcpu);
7376                 kvm_update_dr6(vcpu);
7377                 kvm_update_dr7(vcpu);
7378                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7379         }
7380
7381         /*
7382          * If the guest has used debug registers, at least dr7
7383          * will be disabled while returning to the host.
7384          * If we don't have active breakpoints in the host, we don't
7385          * care about the messed up debug address registers. But if
7386          * we have some of them active, restore the old state.
7387          */
7388         if (hw_breakpoint_active())
7389                 hw_breakpoint_restore();
7390
7391         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7392
7393         vcpu->mode = OUTSIDE_GUEST_MODE;
7394         smp_wmb();
7395
7396         kvm_put_guest_xcr0(vcpu);
7397
7398         kvm_x86_ops->handle_external_intr(vcpu);
7399
7400         ++vcpu->stat.exits;
7401
7402         guest_exit_irqoff();
7403
7404         local_irq_enable();
7405         preempt_enable();
7406
7407         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7408
7409         /*
7410          * Profile KVM exit RIPs:
7411          */
7412         if (unlikely(prof_on == KVM_PROFILING)) {
7413                 unsigned long rip = kvm_rip_read(vcpu);
7414                 profile_hit(KVM_PROFILING, (void *)rip);
7415         }
7416
7417         if (unlikely(vcpu->arch.tsc_always_catchup))
7418                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7419
7420         if (vcpu->arch.apic_attention)
7421                 kvm_lapic_sync_from_vapic(vcpu);
7422
7423         vcpu->arch.gpa_available = false;
7424         r = kvm_x86_ops->handle_exit(vcpu);
7425         return r;
7426
7427 cancel_injection:
7428         kvm_x86_ops->cancel_injection(vcpu);
7429         if (unlikely(vcpu->arch.apic_attention))
7430                 kvm_lapic_sync_from_vapic(vcpu);
7431 out:
7432         return r;
7433 }
7434
7435 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7436 {
7437         if (!kvm_arch_vcpu_runnable(vcpu) &&
7438             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7439                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7440                 kvm_vcpu_block(vcpu);
7441                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7442
7443                 if (kvm_x86_ops->post_block)
7444                         kvm_x86_ops->post_block(vcpu);
7445
7446                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7447                         return 1;
7448         }
7449
7450         kvm_apic_accept_events(vcpu);
7451         switch(vcpu->arch.mp_state) {
7452         case KVM_MP_STATE_HALTED:
7453                 vcpu->arch.pv.pv_unhalted = false;
7454                 vcpu->arch.mp_state =
7455                         KVM_MP_STATE_RUNNABLE;
7456         case KVM_MP_STATE_RUNNABLE:
7457                 vcpu->arch.apf.halted = false;
7458                 break;
7459         case KVM_MP_STATE_INIT_RECEIVED:
7460                 break;
7461         default:
7462                 return -EINTR;
7463                 break;
7464         }
7465         return 1;
7466 }
7467
7468 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7469 {
7470         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7471                 kvm_x86_ops->check_nested_events(vcpu, false);
7472
7473         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7474                 !vcpu->arch.apf.halted);
7475 }
7476
7477 static int vcpu_run(struct kvm_vcpu *vcpu)
7478 {
7479         int r;
7480         struct kvm *kvm = vcpu->kvm;
7481
7482         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7483
7484         for (;;) {
7485                 if (kvm_vcpu_running(vcpu)) {
7486                         r = vcpu_enter_guest(vcpu);
7487                 } else {
7488                         r = vcpu_block(kvm, vcpu);
7489                 }
7490
7491                 if (r <= 0)
7492                         break;
7493
7494                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7495                 if (kvm_cpu_has_pending_timer(vcpu))
7496                         kvm_inject_pending_timer_irqs(vcpu);
7497
7498                 if (dm_request_for_irq_injection(vcpu) &&
7499                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7500                         r = 0;
7501                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7502                         ++vcpu->stat.request_irq_exits;
7503                         break;
7504                 }
7505
7506                 kvm_check_async_pf_completion(vcpu);
7507
7508                 if (signal_pending(current)) {
7509                         r = -EINTR;
7510                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7511                         ++vcpu->stat.signal_exits;
7512                         break;
7513                 }
7514                 if (need_resched()) {
7515                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7516                         cond_resched();
7517                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7518                 }
7519         }
7520
7521         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7522
7523         return r;
7524 }
7525
7526 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7527 {
7528         int r;
7529         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7530         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7531         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7532         if (r != EMULATE_DONE)
7533                 return 0;
7534         return 1;
7535 }
7536
7537 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7538 {
7539         BUG_ON(!vcpu->arch.pio.count);
7540
7541         return complete_emulated_io(vcpu);
7542 }
7543
7544 /*
7545  * Implements the following, as a state machine:
7546  *
7547  * read:
7548  *   for each fragment
7549  *     for each mmio piece in the fragment
7550  *       write gpa, len
7551  *       exit
7552  *       copy data
7553  *   execute insn
7554  *
7555  * write:
7556  *   for each fragment
7557  *     for each mmio piece in the fragment
7558  *       write gpa, len
7559  *       copy data
7560  *       exit
7561  */
7562 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7563 {
7564         struct kvm_run *run = vcpu->run;
7565         struct kvm_mmio_fragment *frag;
7566         unsigned len;
7567
7568         BUG_ON(!vcpu->mmio_needed);
7569
7570         /* Complete previous fragment */
7571         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7572         len = min(8u, frag->len);
7573         if (!vcpu->mmio_is_write)
7574                 memcpy(frag->data, run->mmio.data, len);
7575
7576         if (frag->len <= 8) {
7577                 /* Switch to the next fragment. */
7578                 frag++;
7579                 vcpu->mmio_cur_fragment++;
7580         } else {
7581                 /* Go forward to the next mmio piece. */
7582                 frag->data += len;
7583                 frag->gpa += len;
7584                 frag->len -= len;
7585         }
7586
7587         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7588                 vcpu->mmio_needed = 0;
7589
7590                 /* FIXME: return into emulator if single-stepping.  */
7591                 if (vcpu->mmio_is_write)
7592                         return 1;
7593                 vcpu->mmio_read_completed = 1;
7594                 return complete_emulated_io(vcpu);
7595         }
7596
7597         run->exit_reason = KVM_EXIT_MMIO;
7598         run->mmio.phys_addr = frag->gpa;
7599         if (vcpu->mmio_is_write)
7600                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7601         run->mmio.len = min(8u, frag->len);
7602         run->mmio.is_write = vcpu->mmio_is_write;
7603         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7604         return 0;
7605 }
7606
7607 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7608 {
7609         int r;
7610
7611         vcpu_load(vcpu);
7612         kvm_sigset_activate(vcpu);
7613         kvm_load_guest_fpu(vcpu);
7614
7615         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7616                 if (kvm_run->immediate_exit) {
7617                         r = -EINTR;
7618                         goto out;
7619                 }
7620                 kvm_vcpu_block(vcpu);
7621                 kvm_apic_accept_events(vcpu);
7622                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7623                 r = -EAGAIN;
7624                 if (signal_pending(current)) {
7625                         r = -EINTR;
7626                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7627                         ++vcpu->stat.signal_exits;
7628                 }
7629                 goto out;
7630         }
7631
7632         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
7633                 r = -EINVAL;
7634                 goto out;
7635         }
7636
7637         if (vcpu->run->kvm_dirty_regs) {
7638                 r = sync_regs(vcpu);
7639                 if (r != 0)
7640                         goto out;
7641         }
7642
7643         /* re-sync apic's tpr */
7644         if (!lapic_in_kernel(vcpu)) {
7645                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7646                         r = -EINVAL;
7647                         goto out;
7648                 }
7649         }
7650
7651         if (unlikely(vcpu->arch.complete_userspace_io)) {
7652                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7653                 vcpu->arch.complete_userspace_io = NULL;
7654                 r = cui(vcpu);
7655                 if (r <= 0)
7656                         goto out;
7657         } else
7658                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7659
7660         if (kvm_run->immediate_exit)
7661                 r = -EINTR;
7662         else
7663                 r = vcpu_run(vcpu);
7664
7665 out:
7666         kvm_put_guest_fpu(vcpu);
7667         if (vcpu->run->kvm_valid_regs)
7668                 store_regs(vcpu);
7669         post_kvm_run_save(vcpu);
7670         kvm_sigset_deactivate(vcpu);
7671
7672         vcpu_put(vcpu);
7673         return r;
7674 }
7675
7676 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7677 {
7678         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7679                 /*
7680                  * We are here if userspace calls get_regs() in the middle of
7681                  * instruction emulation. Registers state needs to be copied
7682                  * back from emulation context to vcpu. Userspace shouldn't do
7683                  * that usually, but some bad designed PV devices (vmware
7684                  * backdoor interface) need this to work
7685                  */
7686                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7687                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7688         }
7689         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7690         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7691         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7692         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7693         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7694         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7695         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7696         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7697 #ifdef CONFIG_X86_64
7698         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7699         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7700         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7701         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7702         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7703         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7704         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7705         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7706 #endif
7707
7708         regs->rip = kvm_rip_read(vcpu);
7709         regs->rflags = kvm_get_rflags(vcpu);
7710 }
7711
7712 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7713 {
7714         vcpu_load(vcpu);
7715         __get_regs(vcpu, regs);
7716         vcpu_put(vcpu);
7717         return 0;
7718 }
7719
7720 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7721 {
7722         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7723         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7724
7725         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7726         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7727         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7728         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7729         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7730         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7731         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7732         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7733 #ifdef CONFIG_X86_64
7734         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7735         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7736         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7737         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7738         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7739         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7740         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7741         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7742 #endif
7743
7744         kvm_rip_write(vcpu, regs->rip);
7745         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7746
7747         vcpu->arch.exception.pending = false;
7748
7749         kvm_make_request(KVM_REQ_EVENT, vcpu);
7750 }
7751
7752 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7753 {
7754         vcpu_load(vcpu);
7755         __set_regs(vcpu, regs);
7756         vcpu_put(vcpu);
7757         return 0;
7758 }
7759
7760 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7761 {
7762         struct kvm_segment cs;
7763
7764         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7765         *db = cs.db;
7766         *l = cs.l;
7767 }
7768 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7769
7770 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7771 {
7772         struct desc_ptr dt;
7773
7774         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7775         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7776         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7777         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7778         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7779         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7780
7781         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7782         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7783
7784         kvm_x86_ops->get_idt(vcpu, &dt);
7785         sregs->idt.limit = dt.size;
7786         sregs->idt.base = dt.address;
7787         kvm_x86_ops->get_gdt(vcpu, &dt);
7788         sregs->gdt.limit = dt.size;
7789         sregs->gdt.base = dt.address;
7790
7791         sregs->cr0 = kvm_read_cr0(vcpu);
7792         sregs->cr2 = vcpu->arch.cr2;
7793         sregs->cr3 = kvm_read_cr3(vcpu);
7794         sregs->cr4 = kvm_read_cr4(vcpu);
7795         sregs->cr8 = kvm_get_cr8(vcpu);
7796         sregs->efer = vcpu->arch.efer;
7797         sregs->apic_base = kvm_get_apic_base(vcpu);
7798
7799         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7800
7801         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7802                 set_bit(vcpu->arch.interrupt.nr,
7803                         (unsigned long *)sregs->interrupt_bitmap);
7804 }
7805
7806 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7807                                   struct kvm_sregs *sregs)
7808 {
7809         vcpu_load(vcpu);
7810         __get_sregs(vcpu, sregs);
7811         vcpu_put(vcpu);
7812         return 0;
7813 }
7814
7815 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7816                                     struct kvm_mp_state *mp_state)
7817 {
7818         vcpu_load(vcpu);
7819
7820         kvm_apic_accept_events(vcpu);
7821         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7822                                         vcpu->arch.pv.pv_unhalted)
7823                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7824         else
7825                 mp_state->mp_state = vcpu->arch.mp_state;
7826
7827         vcpu_put(vcpu);
7828         return 0;
7829 }
7830
7831 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7832                                     struct kvm_mp_state *mp_state)
7833 {
7834         int ret = -EINVAL;
7835
7836         vcpu_load(vcpu);
7837
7838         if (!lapic_in_kernel(vcpu) &&
7839             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7840                 goto out;
7841
7842         /* INITs are latched while in SMM */
7843         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7844             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7845              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7846                 goto out;
7847
7848         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7849                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7850                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7851         } else
7852                 vcpu->arch.mp_state = mp_state->mp_state;
7853         kvm_make_request(KVM_REQ_EVENT, vcpu);
7854
7855         ret = 0;
7856 out:
7857         vcpu_put(vcpu);
7858         return ret;
7859 }
7860
7861 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7862                     int reason, bool has_error_code, u32 error_code)
7863 {
7864         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7865         int ret;
7866
7867         init_emulate_ctxt(vcpu);
7868
7869         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7870                                    has_error_code, error_code);
7871
7872         if (ret)
7873                 return EMULATE_FAIL;
7874
7875         kvm_rip_write(vcpu, ctxt->eip);
7876         kvm_set_rflags(vcpu, ctxt->eflags);
7877         kvm_make_request(KVM_REQ_EVENT, vcpu);
7878         return EMULATE_DONE;
7879 }
7880 EXPORT_SYMBOL_GPL(kvm_task_switch);
7881
7882 int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7883 {
7884         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
7885                 /*
7886                  * When EFER.LME and CR0.PG are set, the processor is in
7887                  * 64-bit mode (though maybe in a 32-bit code segment).
7888                  * CR4.PAE and EFER.LMA must be set.
7889                  */
7890                 if (!(sregs->cr4 & X86_CR4_PAE)
7891                     || !(sregs->efer & EFER_LMA))
7892                         return -EINVAL;
7893         } else {
7894                 /*
7895                  * Not in 64-bit mode: EFER.LMA is clear and the code
7896                  * segment cannot be 64-bit.
7897                  */
7898                 if (sregs->efer & EFER_LMA || sregs->cs.l)
7899                         return -EINVAL;
7900         }
7901
7902         return 0;
7903 }
7904
7905 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7906 {
7907         struct msr_data apic_base_msr;
7908         int mmu_reset_needed = 0;
7909         int pending_vec, max_bits, idx;
7910         struct desc_ptr dt;
7911         int ret = -EINVAL;
7912
7913         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7914                         (sregs->cr4 & X86_CR4_OSXSAVE))
7915                 goto out;
7916
7917         if (kvm_valid_sregs(vcpu, sregs))
7918                 goto out;
7919
7920         apic_base_msr.data = sregs->apic_base;
7921         apic_base_msr.host_initiated = true;
7922         if (kvm_set_apic_base(vcpu, &apic_base_msr))
7923                 goto out;
7924
7925         dt.size = sregs->idt.limit;
7926         dt.address = sregs->idt.base;
7927         kvm_x86_ops->set_idt(vcpu, &dt);
7928         dt.size = sregs->gdt.limit;
7929         dt.address = sregs->gdt.base;
7930         kvm_x86_ops->set_gdt(vcpu, &dt);
7931
7932         vcpu->arch.cr2 = sregs->cr2;
7933         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7934         vcpu->arch.cr3 = sregs->cr3;
7935         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7936
7937         kvm_set_cr8(vcpu, sregs->cr8);
7938
7939         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7940         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7941
7942         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7943         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7944         vcpu->arch.cr0 = sregs->cr0;
7945
7946         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7947         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7948         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7949                 kvm_update_cpuid(vcpu);
7950
7951         idx = srcu_read_lock(&vcpu->kvm->srcu);
7952         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7953                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7954                 mmu_reset_needed = 1;
7955         }
7956         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7957
7958         if (mmu_reset_needed)
7959                 kvm_mmu_reset_context(vcpu);
7960
7961         max_bits = KVM_NR_INTERRUPTS;
7962         pending_vec = find_first_bit(
7963                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7964         if (pending_vec < max_bits) {
7965                 kvm_queue_interrupt(vcpu, pending_vec, false);
7966                 pr_debug("Set back pending irq %d\n", pending_vec);
7967         }
7968
7969         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7970         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7971         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7972         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7973         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7974         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7975
7976         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7977         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7978
7979         update_cr8_intercept(vcpu);
7980
7981         /* Older userspace won't unhalt the vcpu on reset. */
7982         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7983             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7984             !is_protmode(vcpu))
7985                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7986
7987         kvm_make_request(KVM_REQ_EVENT, vcpu);
7988
7989         ret = 0;
7990 out:
7991         return ret;
7992 }
7993
7994 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7995                                   struct kvm_sregs *sregs)
7996 {
7997         int ret;
7998
7999         vcpu_load(vcpu);
8000         ret = __set_sregs(vcpu, sregs);
8001         vcpu_put(vcpu);
8002         return ret;
8003 }
8004
8005 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8006                                         struct kvm_guest_debug *dbg)
8007 {
8008         unsigned long rflags;
8009         int i, r;
8010
8011         vcpu_load(vcpu);
8012
8013         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8014                 r = -EBUSY;
8015                 if (vcpu->arch.exception.pending)
8016                         goto out;
8017                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8018                         kvm_queue_exception(vcpu, DB_VECTOR);
8019                 else
8020                         kvm_queue_exception(vcpu, BP_VECTOR);
8021         }
8022
8023         /*
8024          * Read rflags as long as potentially injected trace flags are still
8025          * filtered out.
8026          */
8027         rflags = kvm_get_rflags(vcpu);
8028
8029         vcpu->guest_debug = dbg->control;
8030         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8031                 vcpu->guest_debug = 0;
8032
8033         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8034                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8035                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8036                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8037         } else {
8038                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8039                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8040         }
8041         kvm_update_dr7(vcpu);
8042
8043         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8044                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8045                         get_segment_base(vcpu, VCPU_SREG_CS);
8046
8047         /*
8048          * Trigger an rflags update that will inject or remove the trace
8049          * flags.
8050          */
8051         kvm_set_rflags(vcpu, rflags);
8052
8053         kvm_x86_ops->update_bp_intercept(vcpu);
8054
8055         r = 0;
8056
8057 out:
8058         vcpu_put(vcpu);
8059         return r;
8060 }
8061
8062 /*
8063  * Translate a guest virtual address to a guest physical address.
8064  */
8065 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8066                                     struct kvm_translation *tr)
8067 {
8068         unsigned long vaddr = tr->linear_address;
8069         gpa_t gpa;
8070         int idx;
8071
8072         vcpu_load(vcpu);
8073
8074         idx = srcu_read_lock(&vcpu->kvm->srcu);
8075         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8076         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8077         tr->physical_address = gpa;
8078         tr->valid = gpa != UNMAPPED_GVA;
8079         tr->writeable = 1;
8080         tr->usermode = 0;
8081
8082         vcpu_put(vcpu);
8083         return 0;
8084 }
8085
8086 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8087 {
8088         struct fxregs_state *fxsave;
8089
8090         vcpu_load(vcpu);
8091
8092         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8093         memcpy(fpu->fpr, fxsave->st_space, 128);
8094         fpu->fcw = fxsave->cwd;
8095         fpu->fsw = fxsave->swd;
8096         fpu->ftwx = fxsave->twd;
8097         fpu->last_opcode = fxsave->fop;
8098         fpu->last_ip = fxsave->rip;
8099         fpu->last_dp = fxsave->rdp;
8100         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
8101
8102         vcpu_put(vcpu);
8103         return 0;
8104 }
8105
8106 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8107 {
8108         struct fxregs_state *fxsave;
8109
8110         vcpu_load(vcpu);
8111
8112         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8113
8114         memcpy(fxsave->st_space, fpu->fpr, 128);
8115         fxsave->cwd = fpu->fcw;
8116         fxsave->swd = fpu->fsw;
8117         fxsave->twd = fpu->ftwx;
8118         fxsave->fop = fpu->last_opcode;
8119         fxsave->rip = fpu->last_ip;
8120         fxsave->rdp = fpu->last_dp;
8121         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
8122
8123         vcpu_put(vcpu);
8124         return 0;
8125 }
8126
8127 static void store_regs(struct kvm_vcpu *vcpu)
8128 {
8129         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8130
8131         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8132                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8133
8134         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8135                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8136
8137         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8138                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8139                                 vcpu, &vcpu->run->s.regs.events);
8140 }
8141
8142 static int sync_regs(struct kvm_vcpu *vcpu)
8143 {
8144         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8145                 return -EINVAL;
8146
8147         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8148                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8149                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8150         }
8151         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8152                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8153                         return -EINVAL;
8154                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8155         }
8156         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8157                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8158                                 vcpu, &vcpu->run->s.regs.events))
8159                         return -EINVAL;
8160                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8161         }
8162
8163         return 0;
8164 }
8165
8166 static void fx_init(struct kvm_vcpu *vcpu)
8167 {
8168         fpstate_init(&vcpu->arch.guest_fpu.state);
8169         if (boot_cpu_has(X86_FEATURE_XSAVES))
8170                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8171                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8172
8173         /*
8174          * Ensure guest xcr0 is valid for loading
8175          */
8176         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8177
8178         vcpu->arch.cr0 |= X86_CR0_ET;
8179 }
8180
8181 /* Swap (qemu) user FPU context for the guest FPU context. */
8182 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8183 {
8184         preempt_disable();
8185         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8186         /* PKRU is separately restored in kvm_x86_ops->run.  */
8187         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8188                                 ~XFEATURE_MASK_PKRU);
8189         preempt_enable();
8190         trace_kvm_fpu(1);
8191 }
8192
8193 /* When vcpu_run ends, restore user space FPU context. */
8194 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8195 {
8196         preempt_disable();
8197         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8198         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8199         preempt_enable();
8200         ++vcpu->stat.fpu_reload;
8201         trace_kvm_fpu(0);
8202 }
8203
8204 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8205 {
8206         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8207
8208         kvmclock_reset(vcpu);
8209
8210         kvm_x86_ops->vcpu_free(vcpu);
8211         free_cpumask_var(wbinvd_dirty_mask);
8212 }
8213
8214 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8215                                                 unsigned int id)
8216 {
8217         struct kvm_vcpu *vcpu;
8218
8219         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8220                 printk_once(KERN_WARNING
8221                 "kvm: SMP vm created on host with unstable TSC; "
8222                 "guest TSC will not be reliable\n");
8223
8224         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8225
8226         return vcpu;
8227 }
8228
8229 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8230 {
8231         kvm_vcpu_mtrr_init(vcpu);
8232         vcpu_load(vcpu);
8233         kvm_vcpu_reset(vcpu, false);
8234         kvm_mmu_setup(vcpu);
8235         vcpu_put(vcpu);
8236         return 0;
8237 }
8238
8239 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8240 {
8241         struct msr_data msr;
8242         struct kvm *kvm = vcpu->kvm;
8243
8244         kvm_hv_vcpu_postcreate(vcpu);
8245
8246         if (mutex_lock_killable(&vcpu->mutex))
8247                 return;
8248         vcpu_load(vcpu);
8249         msr.data = 0x0;
8250         msr.index = MSR_IA32_TSC;
8251         msr.host_initiated = true;
8252         kvm_write_tsc(vcpu, &msr);
8253         vcpu_put(vcpu);
8254         mutex_unlock(&vcpu->mutex);
8255
8256         if (!kvmclock_periodic_sync)
8257                 return;
8258
8259         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8260                                         KVMCLOCK_SYNC_PERIOD);
8261 }
8262
8263 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8264 {
8265         vcpu->arch.apf.msr_val = 0;
8266
8267         vcpu_load(vcpu);
8268         kvm_mmu_unload(vcpu);
8269         vcpu_put(vcpu);
8270
8271         kvm_x86_ops->vcpu_free(vcpu);
8272 }
8273
8274 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8275 {
8276         kvm_lapic_reset(vcpu, init_event);
8277
8278         vcpu->arch.hflags = 0;
8279
8280         vcpu->arch.smi_pending = 0;
8281         vcpu->arch.smi_count = 0;
8282         atomic_set(&vcpu->arch.nmi_queued, 0);
8283         vcpu->arch.nmi_pending = 0;
8284         vcpu->arch.nmi_injected = false;
8285         kvm_clear_interrupt_queue(vcpu);
8286         kvm_clear_exception_queue(vcpu);
8287         vcpu->arch.exception.pending = false;
8288
8289         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8290         kvm_update_dr0123(vcpu);
8291         vcpu->arch.dr6 = DR6_INIT;
8292         kvm_update_dr6(vcpu);
8293         vcpu->arch.dr7 = DR7_FIXED_1;
8294         kvm_update_dr7(vcpu);
8295
8296         vcpu->arch.cr2 = 0;
8297
8298         kvm_make_request(KVM_REQ_EVENT, vcpu);
8299         vcpu->arch.apf.msr_val = 0;
8300         vcpu->arch.st.msr_val = 0;
8301
8302         kvmclock_reset(vcpu);
8303
8304         kvm_clear_async_pf_completion_queue(vcpu);
8305         kvm_async_pf_hash_reset(vcpu);
8306         vcpu->arch.apf.halted = false;
8307
8308         if (kvm_mpx_supported()) {
8309                 void *mpx_state_buffer;
8310
8311                 /*
8312                  * To avoid have the INIT path from kvm_apic_has_events() that be
8313                  * called with loaded FPU and does not let userspace fix the state.
8314                  */
8315                 if (init_event)
8316                         kvm_put_guest_fpu(vcpu);
8317                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8318                                         XFEATURE_MASK_BNDREGS);
8319                 if (mpx_state_buffer)
8320                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8321                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8322                                         XFEATURE_MASK_BNDCSR);
8323                 if (mpx_state_buffer)
8324                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8325                 if (init_event)
8326                         kvm_load_guest_fpu(vcpu);
8327         }
8328
8329         if (!init_event) {
8330                 kvm_pmu_reset(vcpu);
8331                 vcpu->arch.smbase = 0x30000;
8332
8333                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8334                 vcpu->arch.msr_misc_features_enables = 0;
8335
8336                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8337         }
8338
8339         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8340         vcpu->arch.regs_avail = ~0;
8341         vcpu->arch.regs_dirty = ~0;
8342
8343         vcpu->arch.ia32_xss = 0;
8344
8345         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8346 }
8347
8348 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8349 {
8350         struct kvm_segment cs;
8351
8352         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8353         cs.selector = vector << 8;
8354         cs.base = vector << 12;
8355         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8356         kvm_rip_write(vcpu, 0);
8357 }
8358
8359 int kvm_arch_hardware_enable(void)
8360 {
8361         struct kvm *kvm;
8362         struct kvm_vcpu *vcpu;
8363         int i;
8364         int ret;
8365         u64 local_tsc;
8366         u64 max_tsc = 0;
8367         bool stable, backwards_tsc = false;
8368
8369         kvm_shared_msr_cpu_online();
8370         ret = kvm_x86_ops->hardware_enable();
8371         if (ret != 0)
8372                 return ret;
8373
8374         local_tsc = rdtsc();
8375         stable = !kvm_check_tsc_unstable();
8376         list_for_each_entry(kvm, &vm_list, vm_list) {
8377                 kvm_for_each_vcpu(i, vcpu, kvm) {
8378                         if (!stable && vcpu->cpu == smp_processor_id())
8379                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8380                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8381                                 backwards_tsc = true;
8382                                 if (vcpu->arch.last_host_tsc > max_tsc)
8383                                         max_tsc = vcpu->arch.last_host_tsc;
8384                         }
8385                 }
8386         }
8387
8388         /*
8389          * Sometimes, even reliable TSCs go backwards.  This happens on
8390          * platforms that reset TSC during suspend or hibernate actions, but
8391          * maintain synchronization.  We must compensate.  Fortunately, we can
8392          * detect that condition here, which happens early in CPU bringup,
8393          * before any KVM threads can be running.  Unfortunately, we can't
8394          * bring the TSCs fully up to date with real time, as we aren't yet far
8395          * enough into CPU bringup that we know how much real time has actually
8396          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8397          * variables that haven't been updated yet.
8398          *
8399          * So we simply find the maximum observed TSC above, then record the
8400          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8401          * the adjustment will be applied.  Note that we accumulate
8402          * adjustments, in case multiple suspend cycles happen before some VCPU
8403          * gets a chance to run again.  In the event that no KVM threads get a
8404          * chance to run, we will miss the entire elapsed period, as we'll have
8405          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8406          * loose cycle time.  This isn't too big a deal, since the loss will be
8407          * uniform across all VCPUs (not to mention the scenario is extremely
8408          * unlikely). It is possible that a second hibernate recovery happens
8409          * much faster than a first, causing the observed TSC here to be
8410          * smaller; this would require additional padding adjustment, which is
8411          * why we set last_host_tsc to the local tsc observed here.
8412          *
8413          * N.B. - this code below runs only on platforms with reliable TSC,
8414          * as that is the only way backwards_tsc is set above.  Also note
8415          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8416          * have the same delta_cyc adjustment applied if backwards_tsc
8417          * is detected.  Note further, this adjustment is only done once,
8418          * as we reset last_host_tsc on all VCPUs to stop this from being
8419          * called multiple times (one for each physical CPU bringup).
8420          *
8421          * Platforms with unreliable TSCs don't have to deal with this, they
8422          * will be compensated by the logic in vcpu_load, which sets the TSC to
8423          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8424          * guarantee that they stay in perfect synchronization.
8425          */
8426         if (backwards_tsc) {
8427                 u64 delta_cyc = max_tsc - local_tsc;
8428                 list_for_each_entry(kvm, &vm_list, vm_list) {
8429                         kvm->arch.backwards_tsc_observed = true;
8430                         kvm_for_each_vcpu(i, vcpu, kvm) {
8431                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8432                                 vcpu->arch.last_host_tsc = local_tsc;
8433                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8434                         }
8435
8436                         /*
8437                          * We have to disable TSC offset matching.. if you were
8438                          * booting a VM while issuing an S4 host suspend....
8439                          * you may have some problem.  Solving this issue is
8440                          * left as an exercise to the reader.
8441                          */
8442                         kvm->arch.last_tsc_nsec = 0;
8443                         kvm->arch.last_tsc_write = 0;
8444                 }
8445
8446         }
8447         return 0;
8448 }
8449
8450 void kvm_arch_hardware_disable(void)
8451 {
8452         kvm_x86_ops->hardware_disable();
8453         drop_user_return_notifiers();
8454 }
8455
8456 int kvm_arch_hardware_setup(void)
8457 {
8458         int r;
8459
8460         r = kvm_x86_ops->hardware_setup();
8461         if (r != 0)
8462                 return r;
8463
8464         if (kvm_has_tsc_control) {
8465                 /*
8466                  * Make sure the user can only configure tsc_khz values that
8467                  * fit into a signed integer.
8468                  * A min value is not calculated needed because it will always
8469                  * be 1 on all machines.
8470                  */
8471                 u64 max = min(0x7fffffffULL,
8472                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8473                 kvm_max_guest_tsc_khz = max;
8474
8475                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8476         }
8477
8478         kvm_init_msr_list();
8479         return 0;
8480 }
8481
8482 void kvm_arch_hardware_unsetup(void)
8483 {
8484         kvm_x86_ops->hardware_unsetup();
8485 }
8486
8487 void kvm_arch_check_processor_compat(void *rtn)
8488 {
8489         kvm_x86_ops->check_processor_compatibility(rtn);
8490 }
8491
8492 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8493 {
8494         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8495 }
8496 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8497
8498 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8499 {
8500         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8501 }
8502
8503 struct static_key kvm_no_apic_vcpu __read_mostly;
8504 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8505
8506 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8507 {
8508         struct page *page;
8509         int r;
8510
8511         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8512         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8513         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8514                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8515         else
8516                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8517
8518         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8519         if (!page) {
8520                 r = -ENOMEM;
8521                 goto fail;
8522         }
8523         vcpu->arch.pio_data = page_address(page);
8524
8525         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8526
8527         r = kvm_mmu_create(vcpu);
8528         if (r < 0)
8529                 goto fail_free_pio_data;
8530
8531         if (irqchip_in_kernel(vcpu->kvm)) {
8532                 r = kvm_create_lapic(vcpu);
8533                 if (r < 0)
8534                         goto fail_mmu_destroy;
8535         } else
8536                 static_key_slow_inc(&kvm_no_apic_vcpu);
8537
8538         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8539                                        GFP_KERNEL);
8540         if (!vcpu->arch.mce_banks) {
8541                 r = -ENOMEM;
8542                 goto fail_free_lapic;
8543         }
8544         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8545
8546         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8547                 r = -ENOMEM;
8548                 goto fail_free_mce_banks;
8549         }
8550
8551         fx_init(vcpu);
8552
8553         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8554
8555         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8556
8557         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8558
8559         kvm_async_pf_hash_reset(vcpu);
8560         kvm_pmu_init(vcpu);
8561
8562         vcpu->arch.pending_external_vector = -1;
8563         vcpu->arch.preempted_in_kernel = false;
8564
8565         kvm_hv_vcpu_init(vcpu);
8566
8567         return 0;
8568
8569 fail_free_mce_banks:
8570         kfree(vcpu->arch.mce_banks);
8571 fail_free_lapic:
8572         kvm_free_lapic(vcpu);
8573 fail_mmu_destroy:
8574         kvm_mmu_destroy(vcpu);
8575 fail_free_pio_data:
8576         free_page((unsigned long)vcpu->arch.pio_data);
8577 fail:
8578         return r;
8579 }
8580
8581 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8582 {
8583         int idx;
8584
8585         kvm_hv_vcpu_uninit(vcpu);
8586         kvm_pmu_destroy(vcpu);
8587         kfree(vcpu->arch.mce_banks);
8588         kvm_free_lapic(vcpu);
8589         idx = srcu_read_lock(&vcpu->kvm->srcu);
8590         kvm_mmu_destroy(vcpu);
8591         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8592         free_page((unsigned long)vcpu->arch.pio_data);
8593         if (!lapic_in_kernel(vcpu))
8594                 static_key_slow_dec(&kvm_no_apic_vcpu);
8595 }
8596
8597 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8598 {
8599         kvm_x86_ops->sched_in(vcpu, cpu);
8600 }
8601
8602 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8603 {
8604         if (type)
8605                 return -EINVAL;
8606
8607         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8608         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8609         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8610         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8611         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8612
8613         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8614         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8615         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8616         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8617                 &kvm->arch.irq_sources_bitmap);
8618
8619         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8620         mutex_init(&kvm->arch.apic_map_lock);
8621         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8622
8623         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8624         pvclock_update_vm_gtod_copy(kvm);
8625
8626         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8627         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8628
8629         kvm_hv_init_vm(kvm);
8630         kvm_page_track_init(kvm);
8631         kvm_mmu_init_vm(kvm);
8632
8633         if (kvm_x86_ops->vm_init)
8634                 return kvm_x86_ops->vm_init(kvm);
8635
8636         return 0;
8637 }
8638
8639 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8640 {
8641         vcpu_load(vcpu);
8642         kvm_mmu_unload(vcpu);
8643         vcpu_put(vcpu);
8644 }
8645
8646 static void kvm_free_vcpus(struct kvm *kvm)
8647 {
8648         unsigned int i;
8649         struct kvm_vcpu *vcpu;
8650
8651         /*
8652          * Unpin any mmu pages first.
8653          */
8654         kvm_for_each_vcpu(i, vcpu, kvm) {
8655                 kvm_clear_async_pf_completion_queue(vcpu);
8656                 kvm_unload_vcpu_mmu(vcpu);
8657         }
8658         kvm_for_each_vcpu(i, vcpu, kvm)
8659                 kvm_arch_vcpu_free(vcpu);
8660
8661         mutex_lock(&kvm->lock);
8662         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8663                 kvm->vcpus[i] = NULL;
8664
8665         atomic_set(&kvm->online_vcpus, 0);
8666         mutex_unlock(&kvm->lock);
8667 }
8668
8669 void kvm_arch_sync_events(struct kvm *kvm)
8670 {
8671         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8672         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8673         kvm_free_pit(kvm);
8674 }
8675
8676 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8677 {
8678         int i, r;
8679         unsigned long hva;
8680         struct kvm_memslots *slots = kvm_memslots(kvm);
8681         struct kvm_memory_slot *slot, old;
8682
8683         /* Called with kvm->slots_lock held.  */
8684         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8685                 return -EINVAL;
8686
8687         slot = id_to_memslot(slots, id);
8688         if (size) {
8689                 if (slot->npages)
8690                         return -EEXIST;
8691
8692                 /*
8693                  * MAP_SHARED to prevent internal slot pages from being moved
8694                  * by fork()/COW.
8695                  */
8696                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8697                               MAP_SHARED | MAP_ANONYMOUS, 0);
8698                 if (IS_ERR((void *)hva))
8699                         return PTR_ERR((void *)hva);
8700         } else {
8701                 if (!slot->npages)
8702                         return 0;
8703
8704                 hva = 0;
8705         }
8706
8707         old = *slot;
8708         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8709                 struct kvm_userspace_memory_region m;
8710
8711                 m.slot = id | (i << 16);
8712                 m.flags = 0;
8713                 m.guest_phys_addr = gpa;
8714                 m.userspace_addr = hva;
8715                 m.memory_size = size;
8716                 r = __kvm_set_memory_region(kvm, &m);
8717                 if (r < 0)
8718                         return r;
8719         }
8720
8721         if (!size)
8722                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8723
8724         return 0;
8725 }
8726 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8727
8728 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8729 {
8730         int r;
8731
8732         mutex_lock(&kvm->slots_lock);
8733         r = __x86_set_memory_region(kvm, id, gpa, size);
8734         mutex_unlock(&kvm->slots_lock);
8735
8736         return r;
8737 }
8738 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8739
8740 void kvm_arch_destroy_vm(struct kvm *kvm)
8741 {
8742         if (current->mm == kvm->mm) {
8743                 /*
8744                  * Free memory regions allocated on behalf of userspace,
8745                  * unless the the memory map has changed due to process exit
8746                  * or fd copying.
8747                  */
8748                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8749                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8750                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8751         }
8752         if (kvm_x86_ops->vm_destroy)
8753                 kvm_x86_ops->vm_destroy(kvm);
8754         kvm_pic_destroy(kvm);
8755         kvm_ioapic_destroy(kvm);
8756         kvm_free_vcpus(kvm);
8757         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8758         kvm_mmu_uninit_vm(kvm);
8759         kvm_page_track_cleanup(kvm);
8760         kvm_hv_destroy_vm(kvm);
8761 }
8762
8763 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8764                            struct kvm_memory_slot *dont)
8765 {
8766         int i;
8767
8768         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8769                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8770                         kvfree(free->arch.rmap[i]);
8771                         free->arch.rmap[i] = NULL;
8772                 }
8773                 if (i == 0)
8774                         continue;
8775
8776                 if (!dont || free->arch.lpage_info[i - 1] !=
8777                              dont->arch.lpage_info[i - 1]) {
8778                         kvfree(free->arch.lpage_info[i - 1]);
8779                         free->arch.lpage_info[i - 1] = NULL;
8780                 }
8781         }
8782
8783         kvm_page_track_free_memslot(free, dont);
8784 }
8785
8786 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8787                             unsigned long npages)
8788 {
8789         int i;
8790
8791         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8792                 struct kvm_lpage_info *linfo;
8793                 unsigned long ugfn;
8794                 int lpages;
8795                 int level = i + 1;
8796
8797                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8798                                       slot->base_gfn, level) + 1;
8799
8800                 slot->arch.rmap[i] =
8801                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8802                 if (!slot->arch.rmap[i])
8803                         goto out_free;
8804                 if (i == 0)
8805                         continue;
8806
8807                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8808                 if (!linfo)
8809                         goto out_free;
8810
8811                 slot->arch.lpage_info[i - 1] = linfo;
8812
8813                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8814                         linfo[0].disallow_lpage = 1;
8815                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8816                         linfo[lpages - 1].disallow_lpage = 1;
8817                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8818                 /*
8819                  * If the gfn and userspace address are not aligned wrt each
8820                  * other, or if explicitly asked to, disable large page
8821                  * support for this slot
8822                  */
8823                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8824                     !kvm_largepages_enabled()) {
8825                         unsigned long j;
8826
8827                         for (j = 0; j < lpages; ++j)
8828                                 linfo[j].disallow_lpage = 1;
8829                 }
8830         }
8831
8832         if (kvm_page_track_create_memslot(slot, npages))
8833                 goto out_free;
8834
8835         return 0;
8836
8837 out_free:
8838         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8839                 kvfree(slot->arch.rmap[i]);
8840                 slot->arch.rmap[i] = NULL;
8841                 if (i == 0)
8842                         continue;
8843
8844                 kvfree(slot->arch.lpage_info[i - 1]);
8845                 slot->arch.lpage_info[i - 1] = NULL;
8846         }
8847         return -ENOMEM;
8848 }
8849
8850 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8851 {
8852         /*
8853          * memslots->generation has been incremented.
8854          * mmio generation may have reached its maximum value.
8855          */
8856         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8857 }
8858
8859 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8860                                 struct kvm_memory_slot *memslot,
8861                                 const struct kvm_userspace_memory_region *mem,
8862                                 enum kvm_mr_change change)
8863 {
8864         return 0;
8865 }
8866
8867 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8868                                      struct kvm_memory_slot *new)
8869 {
8870         /* Still write protect RO slot */
8871         if (new->flags & KVM_MEM_READONLY) {
8872                 kvm_mmu_slot_remove_write_access(kvm, new);
8873                 return;
8874         }
8875
8876         /*
8877          * Call kvm_x86_ops dirty logging hooks when they are valid.
8878          *
8879          * kvm_x86_ops->slot_disable_log_dirty is called when:
8880          *
8881          *  - KVM_MR_CREATE with dirty logging is disabled
8882          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8883          *
8884          * The reason is, in case of PML, we need to set D-bit for any slots
8885          * with dirty logging disabled in order to eliminate unnecessary GPA
8886          * logging in PML buffer (and potential PML buffer full VMEXT). This
8887          * guarantees leaving PML enabled during guest's lifetime won't have
8888          * any additonal overhead from PML when guest is running with dirty
8889          * logging disabled for memory slots.
8890          *
8891          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8892          * to dirty logging mode.
8893          *
8894          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8895          *
8896          * In case of write protect:
8897          *
8898          * Write protect all pages for dirty logging.
8899          *
8900          * All the sptes including the large sptes which point to this
8901          * slot are set to readonly. We can not create any new large
8902          * spte on this slot until the end of the logging.
8903          *
8904          * See the comments in fast_page_fault().
8905          */
8906         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8907                 if (kvm_x86_ops->slot_enable_log_dirty)
8908                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8909                 else
8910                         kvm_mmu_slot_remove_write_access(kvm, new);
8911         } else {
8912                 if (kvm_x86_ops->slot_disable_log_dirty)
8913                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8914         }
8915 }
8916
8917 void kvm_arch_commit_memory_region(struct kvm *kvm,
8918                                 const struct kvm_userspace_memory_region *mem,
8919                                 const struct kvm_memory_slot *old,
8920                                 const struct kvm_memory_slot *new,
8921                                 enum kvm_mr_change change)
8922 {
8923         int nr_mmu_pages = 0;
8924
8925         if (!kvm->arch.n_requested_mmu_pages)
8926                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8927
8928         if (nr_mmu_pages)
8929                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8930
8931         /*
8932          * Dirty logging tracks sptes in 4k granularity, meaning that large
8933          * sptes have to be split.  If live migration is successful, the guest
8934          * in the source machine will be destroyed and large sptes will be
8935          * created in the destination. However, if the guest continues to run
8936          * in the source machine (for example if live migration fails), small
8937          * sptes will remain around and cause bad performance.
8938          *
8939          * Scan sptes if dirty logging has been stopped, dropping those
8940          * which can be collapsed into a single large-page spte.  Later
8941          * page faults will create the large-page sptes.
8942          */
8943         if ((change != KVM_MR_DELETE) &&
8944                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8945                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8946                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8947
8948         /*
8949          * Set up write protection and/or dirty logging for the new slot.
8950          *
8951          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8952          * been zapped so no dirty logging staff is needed for old slot. For
8953          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8954          * new and it's also covered when dealing with the new slot.
8955          *
8956          * FIXME: const-ify all uses of struct kvm_memory_slot.
8957          */
8958         if (change != KVM_MR_DELETE)
8959                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8960 }
8961
8962 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8963 {
8964         kvm_mmu_invalidate_zap_all_pages(kvm);
8965 }
8966
8967 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8968                                    struct kvm_memory_slot *slot)
8969 {
8970         kvm_page_track_flush_slot(kvm, slot);
8971 }
8972
8973 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8974 {
8975         if (!list_empty_careful(&vcpu->async_pf.done))
8976                 return true;
8977
8978         if (kvm_apic_has_events(vcpu))
8979                 return true;
8980
8981         if (vcpu->arch.pv.pv_unhalted)
8982                 return true;
8983
8984         if (vcpu->arch.exception.pending)
8985                 return true;
8986
8987         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8988             (vcpu->arch.nmi_pending &&
8989              kvm_x86_ops->nmi_allowed(vcpu)))
8990                 return true;
8991
8992         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8993             (vcpu->arch.smi_pending && !is_smm(vcpu)))
8994                 return true;
8995
8996         if (kvm_arch_interrupt_allowed(vcpu) &&
8997             kvm_cpu_has_interrupt(vcpu))
8998                 return true;
8999
9000         if (kvm_hv_has_stimer_pending(vcpu))
9001                 return true;
9002
9003         return false;
9004 }
9005
9006 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9007 {
9008         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9009 }
9010
9011 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9012 {
9013         return vcpu->arch.preempted_in_kernel;
9014 }
9015
9016 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9017 {
9018         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9019 }
9020
9021 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9022 {
9023         return kvm_x86_ops->interrupt_allowed(vcpu);
9024 }
9025
9026 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9027 {
9028         if (is_64_bit_mode(vcpu))
9029                 return kvm_rip_read(vcpu);
9030         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9031                      kvm_rip_read(vcpu));
9032 }
9033 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9034
9035 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9036 {
9037         return kvm_get_linear_rip(vcpu) == linear_rip;
9038 }
9039 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9040
9041 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9042 {
9043         unsigned long rflags;
9044
9045         rflags = kvm_x86_ops->get_rflags(vcpu);
9046         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9047                 rflags &= ~X86_EFLAGS_TF;
9048         return rflags;
9049 }
9050 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9051
9052 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9053 {
9054         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9055             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9056                 rflags |= X86_EFLAGS_TF;
9057         kvm_x86_ops->set_rflags(vcpu, rflags);
9058 }
9059
9060 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9061 {
9062         __kvm_set_rflags(vcpu, rflags);
9063         kvm_make_request(KVM_REQ_EVENT, vcpu);
9064 }
9065 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9066
9067 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9068 {
9069         int r;
9070
9071         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
9072               work->wakeup_all)
9073                 return;
9074
9075         r = kvm_mmu_reload(vcpu);
9076         if (unlikely(r))
9077                 return;
9078
9079         if (!vcpu->arch.mmu.direct_map &&
9080               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
9081                 return;
9082
9083         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
9084 }
9085
9086 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9087 {
9088         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9089 }
9090
9091 static inline u32 kvm_async_pf_next_probe(u32 key)
9092 {
9093         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9094 }
9095
9096 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9097 {
9098         u32 key = kvm_async_pf_hash_fn(gfn);
9099
9100         while (vcpu->arch.apf.gfns[key] != ~0)
9101                 key = kvm_async_pf_next_probe(key);
9102
9103         vcpu->arch.apf.gfns[key] = gfn;
9104 }
9105
9106 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9107 {
9108         int i;
9109         u32 key = kvm_async_pf_hash_fn(gfn);
9110
9111         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9112                      (vcpu->arch.apf.gfns[key] != gfn &&
9113                       vcpu->arch.apf.gfns[key] != ~0); i++)
9114                 key = kvm_async_pf_next_probe(key);
9115
9116         return key;
9117 }
9118
9119 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9120 {
9121         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9122 }
9123
9124 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9125 {
9126         u32 i, j, k;
9127
9128         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9129         while (true) {
9130                 vcpu->arch.apf.gfns[i] = ~0;
9131                 do {
9132                         j = kvm_async_pf_next_probe(j);
9133                         if (vcpu->arch.apf.gfns[j] == ~0)
9134                                 return;
9135                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9136                         /*
9137                          * k lies cyclically in ]i,j]
9138                          * |    i.k.j |
9139                          * |....j i.k.| or  |.k..j i...|
9140                          */
9141                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9142                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9143                 i = j;
9144         }
9145 }
9146
9147 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9148 {
9149
9150         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9151                                       sizeof(val));
9152 }
9153
9154 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9155 {
9156
9157         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9158                                       sizeof(u32));
9159 }
9160
9161 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9162                                      struct kvm_async_pf *work)
9163 {
9164         struct x86_exception fault;
9165
9166         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9167         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9168
9169         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9170             (vcpu->arch.apf.send_user_only &&
9171              kvm_x86_ops->get_cpl(vcpu) == 0))
9172                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9173         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9174                 fault.vector = PF_VECTOR;
9175                 fault.error_code_valid = true;
9176                 fault.error_code = 0;
9177                 fault.nested_page_fault = false;
9178                 fault.address = work->arch.token;
9179                 fault.async_page_fault = true;
9180                 kvm_inject_page_fault(vcpu, &fault);
9181         }
9182 }
9183
9184 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9185                                  struct kvm_async_pf *work)
9186 {
9187         struct x86_exception fault;
9188         u32 val;
9189
9190         if (work->wakeup_all)
9191                 work->arch.token = ~0; /* broadcast wakeup */
9192         else
9193                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9194         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9195
9196         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9197             !apf_get_user(vcpu, &val)) {
9198                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9199                     vcpu->arch.exception.pending &&
9200                     vcpu->arch.exception.nr == PF_VECTOR &&
9201                     !apf_put_user(vcpu, 0)) {
9202                         vcpu->arch.exception.injected = false;
9203                         vcpu->arch.exception.pending = false;
9204                         vcpu->arch.exception.nr = 0;
9205                         vcpu->arch.exception.has_error_code = false;
9206                         vcpu->arch.exception.error_code = 0;
9207                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9208                         fault.vector = PF_VECTOR;
9209                         fault.error_code_valid = true;
9210                         fault.error_code = 0;
9211                         fault.nested_page_fault = false;
9212                         fault.address = work->arch.token;
9213                         fault.async_page_fault = true;
9214                         kvm_inject_page_fault(vcpu, &fault);
9215                 }
9216         }
9217         vcpu->arch.apf.halted = false;
9218         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9219 }
9220
9221 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9222 {
9223         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9224                 return true;
9225         else
9226                 return kvm_can_do_async_pf(vcpu);
9227 }
9228
9229 void kvm_arch_start_assignment(struct kvm *kvm)
9230 {
9231         atomic_inc(&kvm->arch.assigned_device_count);
9232 }
9233 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9234
9235 void kvm_arch_end_assignment(struct kvm *kvm)
9236 {
9237         atomic_dec(&kvm->arch.assigned_device_count);
9238 }
9239 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9240
9241 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9242 {
9243         return atomic_read(&kvm->arch.assigned_device_count);
9244 }
9245 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9246
9247 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9248 {
9249         atomic_inc(&kvm->arch.noncoherent_dma_count);
9250 }
9251 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9252
9253 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9254 {
9255         atomic_dec(&kvm->arch.noncoherent_dma_count);
9256 }
9257 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9258
9259 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9260 {
9261         return atomic_read(&kvm->arch.noncoherent_dma_count);
9262 }
9263 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9264
9265 bool kvm_arch_has_irq_bypass(void)
9266 {
9267         return kvm_x86_ops->update_pi_irte != NULL;
9268 }
9269
9270 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9271                                       struct irq_bypass_producer *prod)
9272 {
9273         struct kvm_kernel_irqfd *irqfd =
9274                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9275
9276         irqfd->producer = prod;
9277
9278         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9279                                            prod->irq, irqfd->gsi, 1);
9280 }
9281
9282 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9283                                       struct irq_bypass_producer *prod)
9284 {
9285         int ret;
9286         struct kvm_kernel_irqfd *irqfd =
9287                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9288
9289         WARN_ON(irqfd->producer != prod);
9290         irqfd->producer = NULL;
9291
9292         /*
9293          * When producer of consumer is unregistered, we change back to
9294          * remapped mode, so we can re-use the current implementation
9295          * when the irq is masked/disabled or the consumer side (KVM
9296          * int this case doesn't want to receive the interrupts.
9297         */
9298         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9299         if (ret)
9300                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9301                        " fails: %d\n", irqfd->consumer.token, ret);
9302 }
9303
9304 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9305                                    uint32_t guest_irq, bool set)
9306 {
9307         if (!kvm_x86_ops->update_pi_irte)
9308                 return -EINVAL;
9309
9310         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9311 }
9312
9313 bool kvm_vector_hashing_enabled(void)
9314 {
9315         return vector_hashing;
9316 }
9317 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9318
9319 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9320 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9321 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9322 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9323 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9324 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9325 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9326 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9327 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9328 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9329 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9330 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9331 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9332 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9333 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9334 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9335 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9336 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9337 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);