arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define CREATE_TRACE_POINTS
  72 #include "trace.h"
  73
  74 #define MAX_IO_MSRS 256
  75 #define KVM_MAX_MCE_BANKS 32
  76 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  78
  79 #define emul_to_vcpu(ctxt) \
  80         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  81
  82 /* EFER defaults:
  83  * - enable syscall per default because its emulated by KVM
  84  * - enable LME and LMA per default on 64 bit KVM
  85  */
  86 #ifdef CONFIG_X86_64
  87 static
  88 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  89 #else
  90 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  91 #endif
  92
  93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  95
  96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  97                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  98
  99 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 100 static void process_nmi(struct kvm_vcpu *vcpu);
 101 static void enter_smm(struct kvm_vcpu *vcpu);
 102 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 103
 104 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 105 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 106
 107 static bool __read_mostly ignore_msrs = 0;
 108 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 109
 110 static bool __read_mostly report_ignored_msrs = true;
 111 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 112
 113 unsigned int min_timer_period_us = 500;
 114 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 115
 116 static bool __read_mostly kvmclock_periodic_sync = true;
 117 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 118
 119 bool __read_mostly kvm_has_tsc_control;
 120 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 121 u32  __read_mostly kvm_max_guest_tsc_khz;
 122 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 123 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 124 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 125 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 126 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 127 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 128 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 129
 130 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 131 static u32 __read_mostly tsc_tolerance_ppm = 250;
 132 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 133
 134 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 135 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 136 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 137
 138 static bool __read_mostly vector_hashing = true;
 139 module_param(vector_hashing, bool, S_IRUGO);
 140
 141 #define KVM_NR_SHARED_MSRS 16
 142
 143 struct kvm_shared_msrs_global {
 144         int nr;
 145         u32 msrs[KVM_NR_SHARED_MSRS];
 146 };
 147
 148 struct kvm_shared_msrs {
 149         struct user_return_notifier urn;
 150         bool registered;
 151         struct kvm_shared_msr_values {
 152                 u64 host;
 153                 u64 curr;
 154         } values[KVM_NR_SHARED_MSRS];
 155 };
 156
 157 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 158 static struct kvm_shared_msrs __percpu *shared_msrs;
 159
 160 struct kvm_stats_debugfs_item debugfs_entries[] = {
 161         { "pf_fixed", VCPU_STAT(pf_fixed) },
 162         { "pf_guest", VCPU_STAT(pf_guest) },
 163         { "tlb_flush", VCPU_STAT(tlb_flush) },
 164         { "invlpg", VCPU_STAT(invlpg) },
 165         { "exits", VCPU_STAT(exits) },
 166         { "io_exits", VCPU_STAT(io_exits) },
 167         { "mmio_exits", VCPU_STAT(mmio_exits) },
 168         { "signal_exits", VCPU_STAT(signal_exits) },
 169         { "irq_window", VCPU_STAT(irq_window_exits) },
 170         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 171         { "halt_exits", VCPU_STAT(halt_exits) },
 172         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 173         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 174         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 175         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 176         { "hypercalls", VCPU_STAT(hypercalls) },
 177         { "request_irq", VCPU_STAT(request_irq_exits) },
 178         { "irq_exits", VCPU_STAT(irq_exits) },
 179         { "host_state_reload", VCPU_STAT(host_state_reload) },
 180         { "efer_reload", VCPU_STAT(efer_reload) },
 181         { "fpu_reload", VCPU_STAT(fpu_reload) },
 182         { "insn_emulation", VCPU_STAT(insn_emulation) },
 183         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 184         { "irq_injections", VCPU_STAT(irq_injections) },
 185         { "nmi_injections", VCPU_STAT(nmi_injections) },
 186         { "req_event", VCPU_STAT(req_event) },
 187         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 188         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 189         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 190         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 191         { "mmu_flooded", VM_STAT(mmu_flooded) },
 192         { "mmu_recycled", VM_STAT(mmu_recycled) },
 193         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 194         { "mmu_unsync", VM_STAT(mmu_unsync) },
 195         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 196         { "largepages", VM_STAT(lpages) },
 197         { "max_mmu_page_hash_collisions",
 198                 VM_STAT(max_mmu_page_hash_collisions) },
 199         { NULL }
 200 };
 201
 202 u64 __read_mostly host_xcr0;
 203
 204 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 205
 206 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 207 {
 208         int i;
 209         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 210                 vcpu->arch.apf.gfns[i] = ~0;
 211 }
 212
 213 static void kvm_on_user_return(struct user_return_notifier *urn)
 214 {
 215         unsigned slot;
 216         struct kvm_shared_msrs *locals
 217                 = container_of(urn, struct kvm_shared_msrs, urn);
 218         struct kvm_shared_msr_values *values;
 219         unsigned long flags;
 220
 221         /*
 222          * Disabling irqs at this point since the following code could be
 223          * interrupted and executed through kvm_arch_hardware_disable()
 224          */
 225         local_irq_save(flags);
 226         if (locals->registered) {
 227                 locals->registered = false;
 228                 user_return_notifier_unregister(urn);
 229         }
 230         local_irq_restore(flags);
 231         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 232                 values = &locals->values[slot];
 233                 if (values->host != values->curr) {
 234                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 235                         values->curr = values->host;
 236                 }
 237         }
 238 }
 239
 240 static void shared_msr_update(unsigned slot, u32 msr)
 241 {
 242         u64 value;
 243         unsigned int cpu = smp_processor_id();
 244         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 245
 246         /* only read, and nobody should modify it at this time,
 247          * so don't need lock */
 248         if (slot >= shared_msrs_global.nr) {
 249                 printk(KERN_ERR "kvm: invalid MSR slot!");
 250                 return;
 251         }
 252         rdmsrl_safe(msr, &value);
 253         smsr->values[slot].host = value;
 254         smsr->values[slot].curr = value;
 255 }
 256
 257 void kvm_define_shared_msr(unsigned slot, u32 msr)
 258 {
 259         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 260         shared_msrs_global.msrs[slot] = msr;
 261         if (slot >= shared_msrs_global.nr)
 262                 shared_msrs_global.nr = slot + 1;
 263 }
 264 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 265
 266 static void kvm_shared_msr_cpu_online(void)
 267 {
 268         unsigned i;
 269
 270         for (i = 0; i < shared_msrs_global.nr; ++i)
 271                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 272 }
 273
 274 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 275 {
 276         unsigned int cpu = smp_processor_id();
 277         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 278         int err;
 279
 280         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 281                 return 0;
 282         smsr->values[slot].curr = value;
 283         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 284         if (err)
 285                 return 1;
 286
 287         if (!smsr->registered) {
 288                 smsr->urn.on_user_return = kvm_on_user_return;
 289                 user_return_notifier_register(&smsr->urn);
 290                 smsr->registered = true;
 291         }
 292         return 0;
 293 }
 294 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 295
 296 static void drop_user_return_notifiers(void)
 297 {
 298         unsigned int cpu = smp_processor_id();
 299         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 300
 301         if (smsr->registered)
 302                 kvm_on_user_return(&smsr->urn);
 303 }
 304
 305 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 306 {
 307         return vcpu->arch.apic_base;
 308 }
 309 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 310
 311 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 312 {
 313         u64 old_state = vcpu->arch.apic_base &
 314                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 315         u64 new_state = msr_info->data &
 316                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 317         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 318                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 319
 320         if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)
 321                 return 1;
 322         if (!msr_info->host_initiated &&
 323             ((new_state == MSR_IA32_APICBASE_ENABLE &&
 324               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 325              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 326               old_state == 0)))
 327                 return 1;
 328
 329         kvm_lapic_set_base(vcpu, msr_info->data);
 330         return 0;
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 333
 334 asmlinkage __visible void kvm_spurious_fault(void)
 335 {
 336         /* Fault while not rebooting.  We want the trace. */
 337         BUG();
 338 }
 339 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 340
 341 #define EXCPT_BENIGN            0
 342 #define EXCPT_CONTRIBUTORY      1
 343 #define EXCPT_PF                2
 344
 345 static int exception_class(int vector)
 346 {
 347         switch (vector) {
 348         case PF_VECTOR:
 349                 return EXCPT_PF;
 350         case DE_VECTOR:
 351         case TS_VECTOR:
 352         case NP_VECTOR:
 353         case SS_VECTOR:
 354         case GP_VECTOR:
 355                 return EXCPT_CONTRIBUTORY;
 356         default:
 357                 break;
 358         }
 359         return EXCPT_BENIGN;
 360 }
 361
 362 #define EXCPT_FAULT             0
 363 #define EXCPT_TRAP              1
 364 #define EXCPT_ABORT             2
 365 #define EXCPT_INTERRUPT         3
 366
 367 static int exception_type(int vector)
 368 {
 369         unsigned int mask;
 370
 371         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 372                 return EXCPT_INTERRUPT;
 373
 374         mask = 1 << vector;
 375
 376         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 377         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 378                 return EXCPT_TRAP;
 379
 380         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 381                 return EXCPT_ABORT;
 382
 383         /* Reserved exceptions will result in fault */
 384         return EXCPT_FAULT;
 385 }
 386
 387 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 388                 unsigned nr, bool has_error, u32 error_code,
 389                 bool reinject)
 390 {
 391         u32 prev_nr;
 392         int class1, class2;
 393
 394         kvm_make_request(KVM_REQ_EVENT, vcpu);
 395
 396         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 397         queue:
 398                 if (has_error && !is_protmode(vcpu))
 399                         has_error = false;
 400                 if (reinject) {
 401                         /*
 402                          * On vmentry, vcpu->arch.exception.pending is only
 403                          * true if an event injection was blocked by
 404                          * nested_run_pending.  In that case, however,
 405                          * vcpu_enter_guest requests an immediate exit,
 406                          * and the guest shouldn't proceed far enough to
 407                          * need reinjection.
 408                          */
 409                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 410                         vcpu->arch.exception.injected = true;
 411                 } else {
 412                         vcpu->arch.exception.pending = true;
 413                         vcpu->arch.exception.injected = false;
 414                 }
 415                 vcpu->arch.exception.has_error_code = has_error;
 416                 vcpu->arch.exception.nr = nr;
 417                 vcpu->arch.exception.error_code = error_code;
 418                 return;
 419         }
 420
 421         /* to check exception */
 422         prev_nr = vcpu->arch.exception.nr;
 423         if (prev_nr == DF_VECTOR) {
 424                 /* triple fault -> shutdown */
 425                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 426                 return;
 427         }
 428         class1 = exception_class(prev_nr);
 429         class2 = exception_class(nr);
 430         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 431                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 432                 /*
 433                  * Generate double fault per SDM Table 5-5.  Set
 434                  * exception.pending = true so that the double fault
 435                  * can trigger a nested vmexit.
 436                  */
 437                 vcpu->arch.exception.pending = true;
 438                 vcpu->arch.exception.injected = false;
 439                 vcpu->arch.exception.has_error_code = true;
 440                 vcpu->arch.exception.nr = DF_VECTOR;
 441                 vcpu->arch.exception.error_code = 0;
 442         } else
 443                 /* replace previous exception with a new one in a hope
 444                    that instruction re-execution will regenerate lost
 445                    exception */
 446                 goto queue;
 447 }
 448
 449 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 450 {
 451         kvm_multiple_exception(vcpu, nr, false, 0, false);
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 454
 455 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 456 {
 457         kvm_multiple_exception(vcpu, nr, false, 0, true);
 458 }
 459 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 460
 461 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 462 {
 463         if (err)
 464                 kvm_inject_gp(vcpu, 0);
 465         else
 466                 return kvm_skip_emulated_instruction(vcpu);
 467
 468         return 1;
 469 }
 470 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 471
 472 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 473 {
 474         ++vcpu->stat.pf_guest;
 475         vcpu->arch.exception.nested_apf =
 476                 is_guest_mode(vcpu) && fault->async_page_fault;
 477         if (vcpu->arch.exception.nested_apf)
 478                 vcpu->arch.apf.nested_apf_token = fault->address;
 479         else
 480                 vcpu->arch.cr2 = fault->address;
 481         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 482 }
 483 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 484
 485 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 486 {
 487         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 488                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 489         else
 490                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 491
 492         return fault->nested_page_fault;
 493 }
 494
 495 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 496 {
 497         atomic_inc(&vcpu->arch.nmi_queued);
 498         kvm_make_request(KVM_REQ_NMI, vcpu);
 499 }
 500 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 501
 502 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 503 {
 504         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 505 }
 506 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 507
 508 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 509 {
 510         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 511 }
 512 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 513
 514 /*
 515  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 516  * a #GP and return false.
 517  */
 518 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 519 {
 520         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 521                 return true;
 522         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 523         return false;
 524 }
 525 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 526
 527 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 528 {
 529         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 530                 return true;
 531
 532         kvm_queue_exception(vcpu, UD_VECTOR);
 533         return false;
 534 }
 535 EXPORT_SYMBOL_GPL(kvm_require_dr);
 536
 537 /*
 538  * This function will be used to read from the physical memory of the currently
 539  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 540  * can read from guest physical or from the guest's guest physical memory.
 541  */
 542 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 543                             gfn_t ngfn, void *data, int offset, int len,
 544                             u32 access)
 545 {
 546         struct x86_exception exception;
 547         gfn_t real_gfn;
 548         gpa_t ngpa;
 549
 550         ngpa     = gfn_to_gpa(ngfn);
 551         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 552         if (real_gfn == UNMAPPED_GVA)
 553                 return -EFAULT;
 554
 555         real_gfn = gpa_to_gfn(real_gfn);
 556
 557         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 558 }
 559 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 560
 561 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 562                                void *data, int offset, int len, u32 access)
 563 {
 564         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 565                                        data, offset, len, access);
 566 }
 567
 568 /*
 569  * Load the pae pdptrs.  Return true is they are all valid.
 570  */
 571 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 572 {
 573         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 574         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 575         int i;
 576         int ret;
 577         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 578
 579         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 580                                       offset * sizeof(u64), sizeof(pdpte),
 581                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 582         if (ret < 0) {
 583                 ret = 0;
 584                 goto out;
 585         }
 586         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 587                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 588                     (pdpte[i] &
 589                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 590                         ret = 0;
 591                         goto out;
 592                 }
 593         }
 594         ret = 1;
 595
 596         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 597         __set_bit(VCPU_EXREG_PDPTR,
 598                   (unsigned long *)&vcpu->arch.regs_avail);
 599         __set_bit(VCPU_EXREG_PDPTR,
 600                   (unsigned long *)&vcpu->arch.regs_dirty);
 601 out:
 602
 603         return ret;
 604 }
 605 EXPORT_SYMBOL_GPL(load_pdptrs);
 606
 607 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 608 {
 609         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 610         bool changed = true;
 611         int offset;
 612         gfn_t gfn;
 613         int r;
 614
 615         if (is_long_mode(vcpu) || !is_pae(vcpu))
 616                 return false;
 617
 618         if (!test_bit(VCPU_EXREG_PDPTR,
 619                       (unsigned long *)&vcpu->arch.regs_avail))
 620                 return true;
 621
 622         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 623         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 624         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 625                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 626         if (r < 0)
 627                 goto out;
 628         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 629 out:
 630
 631         return changed;
 632 }
 633 EXPORT_SYMBOL_GPL(pdptrs_changed);
 634
 635 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 636 {
 637         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 638         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 639
 640         cr0 |= X86_CR0_ET;
 641
 642 #ifdef CONFIG_X86_64
 643         if (cr0 & 0xffffffff00000000UL)
 644                 return 1;
 645 #endif
 646
 647         cr0 &= ~CR0_RESERVED_BITS;
 648
 649         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 650                 return 1;
 651
 652         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 653                 return 1;
 654
 655         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 656 #ifdef CONFIG_X86_64
 657                 if ((vcpu->arch.efer & EFER_LME)) {
 658                         int cs_db, cs_l;
 659
 660                         if (!is_pae(vcpu))
 661                                 return 1;
 662                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 663                         if (cs_l)
 664                                 return 1;
 665                 } else
 666 #endif
 667                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 668                                                  kvm_read_cr3(vcpu)))
 669                         return 1;
 670         }
 671
 672         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 673                 return 1;
 674
 675         kvm_x86_ops->set_cr0(vcpu, cr0);
 676
 677         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 678                 kvm_clear_async_pf_completion_queue(vcpu);
 679                 kvm_async_pf_hash_reset(vcpu);
 680         }
 681
 682         if ((cr0 ^ old_cr0) & update_bits)
 683                 kvm_mmu_reset_context(vcpu);
 684
 685         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 686             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 687             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 688                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 689
 690         return 0;
 691 }
 692 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 693
 694 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 695 {
 696         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_lmsw);
 699
 700 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 701 {
 702         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 703                         !vcpu->guest_xcr0_loaded) {
 704                 /* kvm_set_xcr() also depends on this */
 705                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 706                 vcpu->guest_xcr0_loaded = 1;
 707         }
 708 }
 709
 710 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 711 {
 712         if (vcpu->guest_xcr0_loaded) {
 713                 if (vcpu->arch.xcr0 != host_xcr0)
 714                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 715                 vcpu->guest_xcr0_loaded = 0;
 716         }
 717 }
 718
 719 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 720 {
 721         u64 xcr0 = xcr;
 722         u64 old_xcr0 = vcpu->arch.xcr0;
 723         u64 valid_bits;
 724
 725         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 726         if (index != XCR_XFEATURE_ENABLED_MASK)
 727                 return 1;
 728         if (!(xcr0 & XFEATURE_MASK_FP))
 729                 return 1;
 730         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 731                 return 1;
 732
 733         /*
 734          * Do not allow the guest to set bits that we do not support
 735          * saving.  However, xcr0 bit 0 is always set, even if the
 736          * emulated CPU does not support XSAVE (see fx_init).
 737          */
 738         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 739         if (xcr0 & ~valid_bits)
 740                 return 1;
 741
 742         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 743             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 744                 return 1;
 745
 746         if (xcr0 & XFEATURE_MASK_AVX512) {
 747                 if (!(xcr0 & XFEATURE_MASK_YMM))
 748                         return 1;
 749                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 750                         return 1;
 751         }
 752         vcpu->arch.xcr0 = xcr0;
 753
 754         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 755                 kvm_update_cpuid(vcpu);
 756         return 0;
 757 }
 758
 759 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 760 {
 761         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 762             __kvm_set_xcr(vcpu, index, xcr)) {
 763                 kvm_inject_gp(vcpu, 0);
 764                 return 1;
 765         }
 766         return 0;
 767 }
 768 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 769
 770 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 771 {
 772         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 773         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 774                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 775
 776         if (cr4 & CR4_RESERVED_BITS)
 777                 return 1;
 778
 779         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 780                 return 1;
 781
 782         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 783                 return 1;
 784
 785         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 786                 return 1;
 787
 788         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 789                 return 1;
 790
 791         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 792                 return 1;
 793
 794         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 795                 return 1;
 796
 797         if (is_long_mode(vcpu)) {
 798                 if (!(cr4 & X86_CR4_PAE))
 799                         return 1;
 800         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 801                    && ((cr4 ^ old_cr4) & pdptr_bits)
 802                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 803                                    kvm_read_cr3(vcpu)))
 804                 return 1;
 805
 806         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 807                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 808                         return 1;
 809
 810                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 811                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 812                         return 1;
 813         }
 814
 815         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 816                 return 1;
 817
 818         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 819             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 820                 kvm_mmu_reset_context(vcpu);
 821
 822         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 823                 kvm_update_cpuid(vcpu);
 824
 825         return 0;
 826 }
 827 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 828
 829 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 830 {
 831 #ifdef CONFIG_X86_64
 832         cr3 &= ~CR3_PCID_INVD;
 833 #endif
 834
 835         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 836                 kvm_mmu_sync_roots(vcpu);
 837                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 838                 return 0;
 839         }
 840
 841         if (is_long_mode(vcpu) &&
 842             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 62)))
 843                 return 1;
 844         else if (is_pae(vcpu) && is_paging(vcpu) &&
 845                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 846                 return 1;
 847
 848         vcpu->arch.cr3 = cr3;
 849         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 850         kvm_mmu_new_cr3(vcpu);
 851         return 0;
 852 }
 853 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 854
 855 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 856 {
 857         if (cr8 & CR8_RESERVED_BITS)
 858                 return 1;
 859         if (lapic_in_kernel(vcpu))
 860                 kvm_lapic_set_tpr(vcpu, cr8);
 861         else
 862                 vcpu->arch.cr8 = cr8;
 863         return 0;
 864 }
 865 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 866
 867 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 868 {
 869         if (lapic_in_kernel(vcpu))
 870                 return kvm_lapic_get_cr8(vcpu);
 871         else
 872                 return vcpu->arch.cr8;
 873 }
 874 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 875
 876 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 877 {
 878         int i;
 879
 880         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 881                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 882                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 883                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 884         }
 885 }
 886
 887 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 888 {
 889         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 890                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 891 }
 892
 893 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 894 {
 895         unsigned long dr7;
 896
 897         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 898                 dr7 = vcpu->arch.guest_debug_dr7;
 899         else
 900                 dr7 = vcpu->arch.dr7;
 901         kvm_x86_ops->set_dr7(vcpu, dr7);
 902         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 903         if (dr7 & DR7_BP_EN_MASK)
 904                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 905 }
 906
 907 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 908 {
 909         u64 fixed = DR6_FIXED_1;
 910
 911         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 912                 fixed |= DR6_RTM;
 913         return fixed;
 914 }
 915
 916 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 917 {
 918         switch (dr) {
 919         case 0 ... 3:
 920                 vcpu->arch.db[dr] = val;
 921                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 922                         vcpu->arch.eff_db[dr] = val;
 923                 break;
 924         case 4:
 925                 /* fall through */
 926         case 6:
 927                 if (val & 0xffffffff00000000ULL)
 928                         return -1; /* #GP */
 929                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 930                 kvm_update_dr6(vcpu);
 931                 break;
 932         case 5:
 933                 /* fall through */
 934         default: /* 7 */
 935                 if (val & 0xffffffff00000000ULL)
 936                         return -1; /* #GP */
 937                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 938                 kvm_update_dr7(vcpu);
 939                 break;
 940         }
 941
 942         return 0;
 943 }
 944
 945 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 946 {
 947         if (__kvm_set_dr(vcpu, dr, val)) {
 948                 kvm_inject_gp(vcpu, 0);
 949                 return 1;
 950         }
 951         return 0;
 952 }
 953 EXPORT_SYMBOL_GPL(kvm_set_dr);
 954
 955 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 956 {
 957         switch (dr) {
 958         case 0 ... 3:
 959                 *val = vcpu->arch.db[dr];
 960                 break;
 961         case 4:
 962                 /* fall through */
 963         case 6:
 964                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 965                         *val = vcpu->arch.dr6;
 966                 else
 967                         *val = kvm_x86_ops->get_dr6(vcpu);
 968                 break;
 969         case 5:
 970                 /* fall through */
 971         default: /* 7 */
 972                 *val = vcpu->arch.dr7;
 973                 break;
 974         }
 975         return 0;
 976 }
 977 EXPORT_SYMBOL_GPL(kvm_get_dr);
 978
 979 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 980 {
 981         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 982         u64 data;
 983         int err;
 984
 985         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 986         if (err)
 987                 return err;
 988         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 989         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 990         return err;
 991 }
 992 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 993
 994 /*
 995  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 996  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 997  *
 998  * This list is modified at module load time to reflect the
 999  * capabilities of the host cpu. This capabilities test skips MSRs that are
1000  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1001  * may depend on host virtualization features rather than host cpu features.
1002  */
1003
1004 static u32 msrs_to_save[] = {
1005         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1006         MSR_STAR,
1007 #ifdef CONFIG_X86_64
1008         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1009 #endif
1010         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1011         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1012 };
1013
1014 static unsigned num_msrs_to_save;
1015
1016 static u32 emulated_msrs[] = {
1017         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1018         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1019         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1020         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1021         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1022         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1023         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1024         HV_X64_MSR_RESET,
1025         HV_X64_MSR_VP_INDEX,
1026         HV_X64_MSR_VP_RUNTIME,
1027         HV_X64_MSR_SCONTROL,
1028         HV_X64_MSR_STIMER0_CONFIG,
1029         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1030         MSR_KVM_PV_EOI_EN,
1031
1032         MSR_IA32_TSC_ADJUST,
1033         MSR_IA32_TSCDEADLINE,
1034         MSR_IA32_MISC_ENABLE,
1035         MSR_IA32_MCG_STATUS,
1036         MSR_IA32_MCG_CTL,
1037         MSR_IA32_MCG_EXT_CTL,
1038         MSR_IA32_SMBASE,
1039         MSR_PLATFORM_INFO,
1040         MSR_MISC_FEATURES_ENABLES,
1041 };
1042
1043 static unsigned num_emulated_msrs;
1044
1045 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1046 {
1047         if (efer & efer_reserved_bits)
1048                 return false;
1049
1050         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1051                         return false;
1052
1053         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1054                         return false;
1055
1056         return true;
1057 }
1058 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1059
1060 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1061 {
1062         u64 old_efer = vcpu->arch.efer;
1063
1064         if (!kvm_valid_efer(vcpu, efer))
1065                 return 1;
1066
1067         if (is_paging(vcpu)
1068             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1069                 return 1;
1070
1071         efer &= ~EFER_LMA;
1072         efer |= vcpu->arch.efer & EFER_LMA;
1073
1074         kvm_x86_ops->set_efer(vcpu, efer);
1075
1076         /* Update reserved bits */
1077         if ((efer ^ old_efer) & EFER_NX)
1078                 kvm_mmu_reset_context(vcpu);
1079
1080         return 0;
1081 }
1082
1083 void kvm_enable_efer_bits(u64 mask)
1084 {
1085        efer_reserved_bits &= ~mask;
1086 }
1087 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1088
1089 /*
1090  * Writes msr value into into the appropriate "register".
1091  * Returns 0 on success, non-0 otherwise.
1092  * Assumes vcpu_load() was already called.
1093  */
1094 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1095 {
1096         switch (msr->index) {
1097         case MSR_FS_BASE:
1098         case MSR_GS_BASE:
1099         case MSR_KERNEL_GS_BASE:
1100         case MSR_CSTAR:
1101         case MSR_LSTAR:
1102                 if (is_noncanonical_address(msr->data, vcpu))
1103                         return 1;
1104                 break;
1105         case MSR_IA32_SYSENTER_EIP:
1106         case MSR_IA32_SYSENTER_ESP:
1107                 /*
1108                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1109                  * non-canonical address is written on Intel but not on
1110                  * AMD (which ignores the top 32-bits, because it does
1111                  * not implement 64-bit SYSENTER).
1112                  *
1113                  * 64-bit code should hence be able to write a non-canonical
1114                  * value on AMD.  Making the address canonical ensures that
1115                  * vmentry does not fail on Intel after writing a non-canonical
1116                  * value, and that something deterministic happens if the guest
1117                  * invokes 64-bit SYSENTER.
1118                  */
1119                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1120         }
1121         return kvm_x86_ops->set_msr(vcpu, msr);
1122 }
1123 EXPORT_SYMBOL_GPL(kvm_set_msr);
1124
1125 /*
1126  * Adapt set_msr() to msr_io()'s calling convention
1127  */
1128 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1129 {
1130         struct msr_data msr;
1131         int r;
1132
1133         msr.index = index;
1134         msr.host_initiated = true;
1135         r = kvm_get_msr(vcpu, &msr);
1136         if (r)
1137                 return r;
1138
1139         *data = msr.data;
1140         return 0;
1141 }
1142
1143 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1144 {
1145         struct msr_data msr;
1146
1147         msr.data = *data;
1148         msr.index = index;
1149         msr.host_initiated = true;
1150         return kvm_set_msr(vcpu, &msr);
1151 }
1152
1153 #ifdef CONFIG_X86_64
1154 struct pvclock_gtod_data {
1155         seqcount_t      seq;
1156
1157         struct { /* extract of a clocksource struct */
1158                 int vclock_mode;
1159                 u64     cycle_last;
1160                 u64     mask;
1161                 u32     mult;
1162                 u32     shift;
1163         } clock;
1164
1165         u64             boot_ns;
1166         u64             nsec_base;
1167         u64             wall_time_sec;
1168 };
1169
1170 static struct pvclock_gtod_data pvclock_gtod_data;
1171
1172 static void update_pvclock_gtod(struct timekeeper *tk)
1173 {
1174         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1175         u64 boot_ns;
1176
1177         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1178
1179         write_seqcount_begin(&vdata->seq);
1180
1181         /* copy pvclock gtod data */
1182         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1183         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1184         vdata->clock.mask               = tk->tkr_mono.mask;
1185         vdata->clock.mult               = tk->tkr_mono.mult;
1186         vdata->clock.shift              = tk->tkr_mono.shift;
1187
1188         vdata->boot_ns                  = boot_ns;
1189         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1190
1191         vdata->wall_time_sec            = tk->xtime_sec;
1192
1193         write_seqcount_end(&vdata->seq);
1194 }
1195 #endif
1196
1197 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1198 {
1199         /*
1200          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1201          * vcpu_enter_guest.  This function is only called from
1202          * the physical CPU that is running vcpu.
1203          */
1204         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1205 }
1206
1207 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1208 {
1209         int version;
1210         int r;
1211         struct pvclock_wall_clock wc;
1212         struct timespec64 boot;
1213
1214         if (!wall_clock)
1215                 return;
1216
1217         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1218         if (r)
1219                 return;
1220
1221         if (version & 1)
1222                 ++version;  /* first time write, random junk */
1223
1224         ++version;
1225
1226         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1227                 return;
1228
1229         /*
1230          * The guest calculates current wall clock time by adding
1231          * system time (updated by kvm_guest_time_update below) to the
1232          * wall clock specified here.  guest system time equals host
1233          * system time for us, thus we must fill in host boot time here.
1234          */
1235         getboottime64(&boot);
1236
1237         if (kvm->arch.kvmclock_offset) {
1238                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1239                 boot = timespec64_sub(boot, ts);
1240         }
1241         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1242         wc.nsec = boot.tv_nsec;
1243         wc.version = version;
1244
1245         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1246
1247         version++;
1248         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1249 }
1250
1251 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1252 {
1253         do_shl32_div32(dividend, divisor);
1254         return dividend;
1255 }
1256
1257 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1258                                s8 *pshift, u32 *pmultiplier)
1259 {
1260         uint64_t scaled64;
1261         int32_t  shift = 0;
1262         uint64_t tps64;
1263         uint32_t tps32;
1264
1265         tps64 = base_hz;
1266         scaled64 = scaled_hz;
1267         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1268                 tps64 >>= 1;
1269                 shift--;
1270         }
1271
1272         tps32 = (uint32_t)tps64;
1273         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1274                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1275                         scaled64 >>= 1;
1276                 else
1277                         tps32 <<= 1;
1278                 shift++;
1279         }
1280
1281         *pshift = shift;
1282         *pmultiplier = div_frac(scaled64, tps32);
1283
1284         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1285                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1286 }
1287
1288 #ifdef CONFIG_X86_64
1289 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1290 #endif
1291
1292 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1293 static unsigned long max_tsc_khz;
1294
1295 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1296 {
1297         u64 v = (u64)khz * (1000000 + ppm);
1298         do_div(v, 1000000);
1299         return v;
1300 }
1301
1302 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1303 {
1304         u64 ratio;
1305
1306         /* Guest TSC same frequency as host TSC? */
1307         if (!scale) {
1308                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1309                 return 0;
1310         }
1311
1312         /* TSC scaling supported? */
1313         if (!kvm_has_tsc_control) {
1314                 if (user_tsc_khz > tsc_khz) {
1315                         vcpu->arch.tsc_catchup = 1;
1316                         vcpu->arch.tsc_always_catchup = 1;
1317                         return 0;
1318                 } else {
1319                         WARN(1, "user requested TSC rate below hardware speed\n");
1320                         return -1;
1321                 }
1322         }
1323
1324         /* TSC scaling required  - calculate ratio */
1325         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1326                                 user_tsc_khz, tsc_khz);
1327
1328         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1329                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1330                           user_tsc_khz);
1331                 return -1;
1332         }
1333
1334         vcpu->arch.tsc_scaling_ratio = ratio;
1335         return 0;
1336 }
1337
1338 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1339 {
1340         u32 thresh_lo, thresh_hi;
1341         int use_scaling = 0;
1342
1343         /* tsc_khz can be zero if TSC calibration fails */
1344         if (user_tsc_khz == 0) {
1345                 /* set tsc_scaling_ratio to a safe value */
1346                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1347                 return -1;
1348         }
1349
1350         /* Compute a scale to convert nanoseconds in TSC cycles */
1351         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1352                            &vcpu->arch.virtual_tsc_shift,
1353                            &vcpu->arch.virtual_tsc_mult);
1354         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1355
1356         /*
1357          * Compute the variation in TSC rate which is acceptable
1358          * within the range of tolerance and decide if the
1359          * rate being applied is within that bounds of the hardware
1360          * rate.  If so, no scaling or compensation need be done.
1361          */
1362         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1363         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1364         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1365                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1366                 use_scaling = 1;
1367         }
1368         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1369 }
1370
1371 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1372 {
1373         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1374                                       vcpu->arch.virtual_tsc_mult,
1375                                       vcpu->arch.virtual_tsc_shift);
1376         tsc += vcpu->arch.this_tsc_write;
1377         return tsc;
1378 }
1379
1380 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1381 {
1382 #ifdef CONFIG_X86_64
1383         bool vcpus_matched;
1384         struct kvm_arch *ka = &vcpu->kvm->arch;
1385         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1386
1387         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1388                          atomic_read(&vcpu->kvm->online_vcpus));
1389
1390         /*
1391          * Once the masterclock is enabled, always perform request in
1392          * order to update it.
1393          *
1394          * In order to enable masterclock, the host clocksource must be TSC
1395          * and the vcpus need to have matched TSCs.  When that happens,
1396          * perform request to enable masterclock.
1397          */
1398         if (ka->use_master_clock ||
1399             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1400                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1401
1402         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1403                             atomic_read(&vcpu->kvm->online_vcpus),
1404                             ka->use_master_clock, gtod->clock.vclock_mode);
1405 #endif
1406 }
1407
1408 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1409 {
1410         u64 curr_offset = vcpu->arch.tsc_offset;
1411         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1412 }
1413
1414 /*
1415  * Multiply tsc by a fixed point number represented by ratio.
1416  *
1417  * The most significant 64-N bits (mult) of ratio represent the
1418  * integral part of the fixed point number; the remaining N bits
1419  * (frac) represent the fractional part, ie. ratio represents a fixed
1420  * point number (mult + frac * 2^(-N)).
1421  *
1422  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1423  */
1424 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1425 {
1426         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1427 }
1428
1429 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1430 {
1431         u64 _tsc = tsc;
1432         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1433
1434         if (ratio != kvm_default_tsc_scaling_ratio)
1435                 _tsc = __scale_tsc(ratio, tsc);
1436
1437         return _tsc;
1438 }
1439 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1440
1441 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1442 {
1443         u64 tsc;
1444
1445         tsc = kvm_scale_tsc(vcpu, rdtsc());
1446
1447         return target_tsc - tsc;
1448 }
1449
1450 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1451 {
1452         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1453 }
1454 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1455
1456 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1457 {
1458         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1459         vcpu->arch.tsc_offset = offset;
1460 }
1461
1462 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1463 {
1464         struct kvm *kvm = vcpu->kvm;
1465         u64 offset, ns, elapsed;
1466         unsigned long flags;
1467         bool matched;
1468         bool already_matched;
1469         u64 data = msr->data;
1470         bool synchronizing = false;
1471
1472         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1473         offset = kvm_compute_tsc_offset(vcpu, data);
1474         ns = ktime_get_boot_ns();
1475         elapsed = ns - kvm->arch.last_tsc_nsec;
1476
1477         if (vcpu->arch.virtual_tsc_khz) {
1478                 if (data == 0 && msr->host_initiated) {
1479                         /*
1480                          * detection of vcpu initialization -- need to sync
1481                          * with other vCPUs. This particularly helps to keep
1482                          * kvm_clock stable after CPU hotplug
1483                          */
1484                         synchronizing = true;
1485                 } else {
1486                         u64 tsc_exp = kvm->arch.last_tsc_write +
1487                                                 nsec_to_cycles(vcpu, elapsed);
1488                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1489                         /*
1490                          * Special case: TSC write with a small delta (1 second)
1491                          * of virtual cycle time against real time is
1492                          * interpreted as an attempt to synchronize the CPU.
1493                          */
1494                         synchronizing = data < tsc_exp + tsc_hz &&
1495                                         data + tsc_hz > tsc_exp;
1496                 }
1497         }
1498
1499         /*
1500          * For a reliable TSC, we can match TSC offsets, and for an unstable
1501          * TSC, we add elapsed time in this computation.  We could let the
1502          * compensation code attempt to catch up if we fall behind, but
1503          * it's better to try to match offsets from the beginning.
1504          */
1505         if (synchronizing &&
1506             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1507                 if (!check_tsc_unstable()) {
1508                         offset = kvm->arch.cur_tsc_offset;
1509                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1510                 } else {
1511                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1512                         data += delta;
1513                         offset = kvm_compute_tsc_offset(vcpu, data);
1514                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1515                 }
1516                 matched = true;
1517                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1518         } else {
1519                 /*
1520                  * We split periods of matched TSC writes into generations.
1521                  * For each generation, we track the original measured
1522                  * nanosecond time, offset, and write, so if TSCs are in
1523                  * sync, we can match exact offset, and if not, we can match
1524                  * exact software computation in compute_guest_tsc()
1525                  *
1526                  * These values are tracked in kvm->arch.cur_xxx variables.
1527                  */
1528                 kvm->arch.cur_tsc_generation++;
1529                 kvm->arch.cur_tsc_nsec = ns;
1530                 kvm->arch.cur_tsc_write = data;
1531                 kvm->arch.cur_tsc_offset = offset;
1532                 matched = false;
1533                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1534                          kvm->arch.cur_tsc_generation, data);
1535         }
1536
1537         /*
1538          * We also track th most recent recorded KHZ, write and time to
1539          * allow the matching interval to be extended at each write.
1540          */
1541         kvm->arch.last_tsc_nsec = ns;
1542         kvm->arch.last_tsc_write = data;
1543         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1544
1545         vcpu->arch.last_guest_tsc = data;
1546
1547         /* Keep track of which generation this VCPU has synchronized to */
1548         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1549         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1550         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1551
1552         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1553                 update_ia32_tsc_adjust_msr(vcpu, offset);
1554
1555         kvm_vcpu_write_tsc_offset(vcpu, offset);
1556         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1557
1558         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1559         if (!matched) {
1560                 kvm->arch.nr_vcpus_matched_tsc = 0;
1561         } else if (!already_matched) {
1562                 kvm->arch.nr_vcpus_matched_tsc++;
1563         }
1564
1565         kvm_track_tsc_matching(vcpu);
1566         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1567 }
1568
1569 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1570
1571 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1572                                            s64 adjustment)
1573 {
1574         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1575 }
1576
1577 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1578 {
1579         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1580                 WARN_ON(adjustment < 0);
1581         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1582         adjust_tsc_offset_guest(vcpu, adjustment);
1583 }
1584
1585 #ifdef CONFIG_X86_64
1586
1587 static u64 read_tsc(void)
1588 {
1589         u64 ret = (u64)rdtsc_ordered();
1590         u64 last = pvclock_gtod_data.clock.cycle_last;
1591
1592         if (likely(ret >= last))
1593                 return ret;
1594
1595         /*
1596          * GCC likes to generate cmov here, but this branch is extremely
1597          * predictable (it's just a function of time and the likely is
1598          * very likely) and there's a data dependence, so force GCC
1599          * to generate a branch instead.  I don't barrier() because
1600          * we don't actually need a barrier, and if this function
1601          * ever gets inlined it will generate worse code.
1602          */
1603         asm volatile ("");
1604         return last;
1605 }
1606
1607 static inline u64 vgettsc(u64 *cycle_now)
1608 {
1609         long v;
1610         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1611
1612         *cycle_now = read_tsc();
1613
1614         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1615         return v * gtod->clock.mult;
1616 }
1617
1618 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1619 {
1620         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1621         unsigned long seq;
1622         int mode;
1623         u64 ns;
1624
1625         do {
1626                 seq = read_seqcount_begin(&gtod->seq);
1627                 mode = gtod->clock.vclock_mode;
1628                 ns = gtod->nsec_base;
1629                 ns += vgettsc(cycle_now);
1630                 ns >>= gtod->clock.shift;
1631                 ns += gtod->boot_ns;
1632         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1633         *t = ns;
1634
1635         return mode;
1636 }
1637
1638 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1639 {
1640         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1641         unsigned long seq;
1642         int mode;
1643         u64 ns;
1644
1645         do {
1646                 seq = read_seqcount_begin(&gtod->seq);
1647                 mode = gtod->clock.vclock_mode;
1648                 ts->tv_sec = gtod->wall_time_sec;
1649                 ns = gtod->nsec_base;
1650                 ns += vgettsc(cycle_now);
1651                 ns >>= gtod->clock.shift;
1652         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1653
1654         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1655         ts->tv_nsec = ns;
1656
1657         return mode;
1658 }
1659
1660 /* returns true if host is using tsc clocksource */
1661 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1662 {
1663         /* checked again under seqlock below */
1664         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1665                 return false;
1666
1667         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1668 }
1669
1670 /* returns true if host is using tsc clocksource */
1671 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1672                                            u64 *cycle_now)
1673 {
1674         /* checked again under seqlock below */
1675         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1676                 return false;
1677
1678         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1679 }
1680 #endif
1681
1682 /*
1683  *
1684  * Assuming a stable TSC across physical CPUS, and a stable TSC
1685  * across virtual CPUs, the following condition is possible.
1686  * Each numbered line represents an event visible to both
1687  * CPUs at the next numbered event.
1688  *
1689  * "timespecX" represents host monotonic time. "tscX" represents
1690  * RDTSC value.
1691  *
1692  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1693  *
1694  * 1.  read timespec0,tsc0
1695  * 2.                                   | timespec1 = timespec0 + N
1696  *                                      | tsc1 = tsc0 + M
1697  * 3. transition to guest               | transition to guest
1698  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1699  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1700  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1701  *
1702  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1703  *
1704  *      - ret0 < ret1
1705  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1706  *              ...
1707  *      - 0 < N - M => M < N
1708  *
1709  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1710  * always the case (the difference between two distinct xtime instances
1711  * might be smaller then the difference between corresponding TSC reads,
1712  * when updating guest vcpus pvclock areas).
1713  *
1714  * To avoid that problem, do not allow visibility of distinct
1715  * system_timestamp/tsc_timestamp values simultaneously: use a master
1716  * copy of host monotonic time values. Update that master copy
1717  * in lockstep.
1718  *
1719  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1720  *
1721  */
1722
1723 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1724 {
1725 #ifdef CONFIG_X86_64
1726         struct kvm_arch *ka = &kvm->arch;
1727         int vclock_mode;
1728         bool host_tsc_clocksource, vcpus_matched;
1729
1730         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1731                         atomic_read(&kvm->online_vcpus));
1732
1733         /*
1734          * If the host uses TSC clock, then passthrough TSC as stable
1735          * to the guest.
1736          */
1737         host_tsc_clocksource = kvm_get_time_and_clockread(
1738                                         &ka->master_kernel_ns,
1739                                         &ka->master_cycle_now);
1740
1741         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1742                                 && !ka->backwards_tsc_observed
1743                                 && !ka->boot_vcpu_runs_old_kvmclock;
1744
1745         if (ka->use_master_clock)
1746                 atomic_set(&kvm_guest_has_master_clock, 1);
1747
1748         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1749         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1750                                         vcpus_matched);
1751 #endif
1752 }
1753
1754 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1755 {
1756         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1757 }
1758
1759 static void kvm_gen_update_masterclock(struct kvm *kvm)
1760 {
1761 #ifdef CONFIG_X86_64
1762         int i;
1763         struct kvm_vcpu *vcpu;
1764         struct kvm_arch *ka = &kvm->arch;
1765
1766         spin_lock(&ka->pvclock_gtod_sync_lock);
1767         kvm_make_mclock_inprogress_request(kvm);
1768         /* no guest entries from this point */
1769         pvclock_update_vm_gtod_copy(kvm);
1770
1771         kvm_for_each_vcpu(i, vcpu, kvm)
1772                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1773
1774         /* guest entries allowed */
1775         kvm_for_each_vcpu(i, vcpu, kvm)
1776                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1777
1778         spin_unlock(&ka->pvclock_gtod_sync_lock);
1779 #endif
1780 }
1781
1782 u64 get_kvmclock_ns(struct kvm *kvm)
1783 {
1784         struct kvm_arch *ka = &kvm->arch;
1785         struct pvclock_vcpu_time_info hv_clock;
1786         u64 ret;
1787
1788         spin_lock(&ka->pvclock_gtod_sync_lock);
1789         if (!ka->use_master_clock) {
1790                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1791                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1792         }
1793
1794         hv_clock.tsc_timestamp = ka->master_cycle_now;
1795         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1796         spin_unlock(&ka->pvclock_gtod_sync_lock);
1797
1798         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1799         get_cpu();
1800
1801         if (__this_cpu_read(cpu_tsc_khz)) {
1802                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1803                                    &hv_clock.tsc_shift,
1804                                    &hv_clock.tsc_to_system_mul);
1805                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1806         } else
1807                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1808
1809         put_cpu();
1810
1811         return ret;
1812 }
1813
1814 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1815 {
1816         struct kvm_vcpu_arch *vcpu = &v->arch;
1817         struct pvclock_vcpu_time_info guest_hv_clock;
1818
1819         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1820                 &guest_hv_clock, sizeof(guest_hv_clock))))
1821                 return;
1822
1823         /* This VCPU is paused, but it's legal for a guest to read another
1824          * VCPU's kvmclock, so we really have to follow the specification where
1825          * it says that version is odd if data is being modified, and even after
1826          * it is consistent.
1827          *
1828          * Version field updates must be kept separate.  This is because
1829          * kvm_write_guest_cached might use a "rep movs" instruction, and
1830          * writes within a string instruction are weakly ordered.  So there
1831          * are three writes overall.
1832          *
1833          * As a small optimization, only write the version field in the first
1834          * and third write.  The vcpu->pv_time cache is still valid, because the
1835          * version field is the first in the struct.
1836          */
1837         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1838
1839         if (guest_hv_clock.version & 1)
1840                 ++guest_hv_clock.version;  /* first time write, random junk */
1841
1842         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1843         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1844                                 &vcpu->hv_clock,
1845                                 sizeof(vcpu->hv_clock.version));
1846
1847         smp_wmb();
1848
1849         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1850         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1851
1852         if (vcpu->pvclock_set_guest_stopped_request) {
1853                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1854                 vcpu->pvclock_set_guest_stopped_request = false;
1855         }
1856
1857         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1858
1859         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1860                                 &vcpu->hv_clock,
1861                                 sizeof(vcpu->hv_clock));
1862
1863         smp_wmb();
1864
1865         vcpu->hv_clock.version++;
1866         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1867                                 &vcpu->hv_clock,
1868                                 sizeof(vcpu->hv_clock.version));
1869 }
1870
1871 static int kvm_guest_time_update(struct kvm_vcpu *v)
1872 {
1873         unsigned long flags, tgt_tsc_khz;
1874         struct kvm_vcpu_arch *vcpu = &v->arch;
1875         struct kvm_arch *ka = &v->kvm->arch;
1876         s64 kernel_ns;
1877         u64 tsc_timestamp, host_tsc;
1878         u8 pvclock_flags;
1879         bool use_master_clock;
1880
1881         kernel_ns = 0;
1882         host_tsc = 0;
1883
1884         /*
1885          * If the host uses TSC clock, then passthrough TSC as stable
1886          * to the guest.
1887          */
1888         spin_lock(&ka->pvclock_gtod_sync_lock);
1889         use_master_clock = ka->use_master_clock;
1890         if (use_master_clock) {
1891                 host_tsc = ka->master_cycle_now;
1892                 kernel_ns = ka->master_kernel_ns;
1893         }
1894         spin_unlock(&ka->pvclock_gtod_sync_lock);
1895
1896         /* Keep irq disabled to prevent changes to the clock */
1897         local_irq_save(flags);
1898         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1899         if (unlikely(tgt_tsc_khz == 0)) {
1900                 local_irq_restore(flags);
1901                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1902                 return 1;
1903         }
1904         if (!use_master_clock) {
1905                 host_tsc = rdtsc();
1906                 kernel_ns = ktime_get_boot_ns();
1907         }
1908
1909         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1910
1911         /*
1912          * We may have to catch up the TSC to match elapsed wall clock
1913          * time for two reasons, even if kvmclock is used.
1914          *   1) CPU could have been running below the maximum TSC rate
1915          *   2) Broken TSC compensation resets the base at each VCPU
1916          *      entry to avoid unknown leaps of TSC even when running
1917          *      again on the same CPU.  This may cause apparent elapsed
1918          *      time to disappear, and the guest to stand still or run
1919          *      very slowly.
1920          */
1921         if (vcpu->tsc_catchup) {
1922                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1923                 if (tsc > tsc_timestamp) {
1924                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1925                         tsc_timestamp = tsc;
1926                 }
1927         }
1928
1929         local_irq_restore(flags);
1930
1931         /* With all the info we got, fill in the values */
1932
1933         if (kvm_has_tsc_control)
1934                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1935
1936         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1937                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1938                                    &vcpu->hv_clock.tsc_shift,
1939                                    &vcpu->hv_clock.tsc_to_system_mul);
1940                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1941         }
1942
1943         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1944         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1945         vcpu->last_guest_tsc = tsc_timestamp;
1946
1947         /* If the host uses TSC clocksource, then it is stable */
1948         pvclock_flags = 0;
1949         if (use_master_clock)
1950                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1951
1952         vcpu->hv_clock.flags = pvclock_flags;
1953
1954         if (vcpu->pv_time_enabled)
1955                 kvm_setup_pvclock_page(v);
1956         if (v == kvm_get_vcpu(v->kvm, 0))
1957                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1958         return 0;
1959 }
1960
1961 /*
1962  * kvmclock updates which are isolated to a given vcpu, such as
1963  * vcpu->cpu migration, should not allow system_timestamp from
1964  * the rest of the vcpus to remain static. Otherwise ntp frequency
1965  * correction applies to one vcpu's system_timestamp but not
1966  * the others.
1967  *
1968  * So in those cases, request a kvmclock update for all vcpus.
1969  * We need to rate-limit these requests though, as they can
1970  * considerably slow guests that have a large number of vcpus.
1971  * The time for a remote vcpu to update its kvmclock is bound
1972  * by the delay we use to rate-limit the updates.
1973  */
1974
1975 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1976
1977 static void kvmclock_update_fn(struct work_struct *work)
1978 {
1979         int i;
1980         struct delayed_work *dwork = to_delayed_work(work);
1981         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1982                                            kvmclock_update_work);
1983         struct kvm *kvm = container_of(ka, struct kvm, arch);
1984         struct kvm_vcpu *vcpu;
1985
1986         kvm_for_each_vcpu(i, vcpu, kvm) {
1987                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1988                 kvm_vcpu_kick(vcpu);
1989         }
1990 }
1991
1992 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1993 {
1994         struct kvm *kvm = v->kvm;
1995
1996         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1997         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1998                                         KVMCLOCK_UPDATE_DELAY);
1999 }
2000
2001 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2002
2003 static void kvmclock_sync_fn(struct work_struct *work)
2004 {
2005         struct delayed_work *dwork = to_delayed_work(work);
2006         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2007                                            kvmclock_sync_work);
2008         struct kvm *kvm = container_of(ka, struct kvm, arch);
2009
2010         if (!kvmclock_periodic_sync)
2011                 return;
2012
2013         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2014         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2015                                         KVMCLOCK_SYNC_PERIOD);
2016 }
2017
2018 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2019 {
2020         u64 mcg_cap = vcpu->arch.mcg_cap;
2021         unsigned bank_num = mcg_cap & 0xff;
2022         u32 msr = msr_info->index;
2023         u64 data = msr_info->data;
2024
2025         switch (msr) {
2026         case MSR_IA32_MCG_STATUS:
2027                 vcpu->arch.mcg_status = data;
2028                 break;
2029         case MSR_IA32_MCG_CTL:
2030                 if (!(mcg_cap & MCG_CTL_P))
2031                         return 1;
2032                 if (data != 0 && data != ~(u64)0)
2033                         return -1;
2034                 vcpu->arch.mcg_ctl = data;
2035                 break;
2036         default:
2037                 if (msr >= MSR_IA32_MC0_CTL &&
2038                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2039                         u32 offset = msr - MSR_IA32_MC0_CTL;
2040                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2041                          * some Linux kernels though clear bit 10 in bank 4 to
2042                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2043                          * this to avoid an uncatched #GP in the guest
2044                          */
2045                         if ((offset & 0x3) == 0 &&
2046                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2047                                 return -1;
2048                         if (!msr_info->host_initiated &&
2049                                 (offset & 0x3) == 1 && data != 0)
2050                                 return -1;
2051                         vcpu->arch.mce_banks[offset] = data;
2052                         break;
2053                 }
2054                 return 1;
2055         }
2056         return 0;
2057 }
2058
2059 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2060 {
2061         struct kvm *kvm = vcpu->kvm;
2062         int lm = is_long_mode(vcpu);
2063         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2064                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2065         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2066                 : kvm->arch.xen_hvm_config.blob_size_32;
2067         u32 page_num = data & ~PAGE_MASK;
2068         u64 page_addr = data & PAGE_MASK;
2069         u8 *page;
2070         int r;
2071
2072         r = -E2BIG;
2073         if (page_num >= blob_size)
2074                 goto out;
2075         r = -ENOMEM;
2076         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2077         if (IS_ERR(page)) {
2078                 r = PTR_ERR(page);
2079                 goto out;
2080         }
2081         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2082                 goto out_free;
2083         r = 0;
2084 out_free:
2085         kfree(page);
2086 out:
2087         return r;
2088 }
2089
2090 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2091 {
2092         gpa_t gpa = data & ~0x3f;
2093
2094         /* Bits 3:5 are reserved, Should be zero */
2095         if (data & 0x38)
2096                 return 1;
2097
2098         vcpu->arch.apf.msr_val = data;
2099
2100         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2101                 kvm_clear_async_pf_completion_queue(vcpu);
2102                 kvm_async_pf_hash_reset(vcpu);
2103                 return 0;
2104         }
2105
2106         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2107                                         sizeof(u32)))
2108                 return 1;
2109
2110         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2111         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2112         kvm_async_pf_wakeup_all(vcpu);
2113         return 0;
2114 }
2115
2116 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2117 {
2118         vcpu->arch.pv_time_enabled = false;
2119 }
2120
2121 static void record_steal_time(struct kvm_vcpu *vcpu)
2122 {
2123         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2124                 return;
2125
2126         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2127                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2128                 return;
2129
2130         vcpu->arch.st.steal.preempted = 0;
2131
2132         if (vcpu->arch.st.steal.version & 1)
2133                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2134
2135         vcpu->arch.st.steal.version += 1;
2136
2137         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2138                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2139
2140         smp_wmb();
2141
2142         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2143                 vcpu->arch.st.last_steal;
2144         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2145
2146         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2147                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2148
2149         smp_wmb();
2150
2151         vcpu->arch.st.steal.version += 1;
2152
2153         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2154                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2155 }
2156
2157 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2158 {
2159         bool pr = false;
2160         u32 msr = msr_info->index;
2161         u64 data = msr_info->data;
2162
2163         switch (msr) {
2164         case MSR_AMD64_NB_CFG:
2165         case MSR_IA32_UCODE_REV:
2166         case MSR_IA32_UCODE_WRITE:
2167         case MSR_VM_HSAVE_PA:
2168         case MSR_AMD64_PATCH_LOADER:
2169         case MSR_AMD64_BU_CFG2:
2170         case MSR_AMD64_DC_CFG:
2171                 break;
2172
2173         case MSR_EFER:
2174                 return set_efer(vcpu, data);
2175         case MSR_K7_HWCR:
2176                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2177                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2178                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2179                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2180                 if (data != 0) {
2181                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2182                                     data);
2183                         return 1;
2184                 }
2185                 break;
2186         case MSR_FAM10H_MMIO_CONF_BASE:
2187                 if (data != 0) {
2188                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2189                                     "0x%llx\n", data);
2190                         return 1;
2191                 }
2192                 break;
2193         case MSR_IA32_DEBUGCTLMSR:
2194                 if (!data) {
2195                         /* We support the non-activated case already */
2196                         break;
2197                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2198                         /* Values other than LBR and BTF are vendor-specific,
2199                            thus reserved and should throw a #GP */
2200                         return 1;
2201                 }
2202                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2203                             __func__, data);
2204                 break;
2205         case 0x200 ... 0x2ff:
2206                 return kvm_mtrr_set_msr(vcpu, msr, data);
2207         case MSR_IA32_APICBASE:
2208                 return kvm_set_apic_base(vcpu, msr_info);
2209         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2210                 return kvm_x2apic_msr_write(vcpu, msr, data);
2211         case MSR_IA32_TSCDEADLINE:
2212                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2213                 break;
2214         case MSR_IA32_TSC_ADJUST:
2215                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2216                         if (!msr_info->host_initiated) {
2217                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2218                                 adjust_tsc_offset_guest(vcpu, adj);
2219                         }
2220                         vcpu->arch.ia32_tsc_adjust_msr = data;
2221                 }
2222                 break;
2223         case MSR_IA32_MISC_ENABLE:
2224                 vcpu->arch.ia32_misc_enable_msr = data;
2225                 break;
2226         case MSR_IA32_SMBASE:
2227                 if (!msr_info->host_initiated)
2228                         return 1;
2229                 vcpu->arch.smbase = data;
2230                 break;
2231         case MSR_KVM_WALL_CLOCK_NEW:
2232         case MSR_KVM_WALL_CLOCK:
2233                 vcpu->kvm->arch.wall_clock = data;
2234                 kvm_write_wall_clock(vcpu->kvm, data);
2235                 break;
2236         case MSR_KVM_SYSTEM_TIME_NEW:
2237         case MSR_KVM_SYSTEM_TIME: {
2238                 struct kvm_arch *ka = &vcpu->kvm->arch;
2239
2240                 kvmclock_reset(vcpu);
2241
2242                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2243                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2244
2245                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2246                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2247
2248                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2249                 }
2250
2251                 vcpu->arch.time = data;
2252                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2253
2254                 /* we verify if the enable bit is set... */
2255                 if (!(data & 1))
2256                         break;
2257
2258                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2259                      &vcpu->arch.pv_time, data & ~1ULL,
2260                      sizeof(struct pvclock_vcpu_time_info)))
2261                         vcpu->arch.pv_time_enabled = false;
2262                 else
2263                         vcpu->arch.pv_time_enabled = true;
2264
2265                 break;
2266         }
2267         case MSR_KVM_ASYNC_PF_EN:
2268                 if (kvm_pv_enable_async_pf(vcpu, data))
2269                         return 1;
2270                 break;
2271         case MSR_KVM_STEAL_TIME:
2272
2273                 if (unlikely(!sched_info_on()))
2274                         return 1;
2275
2276                 if (data & KVM_STEAL_RESERVED_MASK)
2277                         return 1;
2278
2279                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2280                                                 data & KVM_STEAL_VALID_BITS,
2281                                                 sizeof(struct kvm_steal_time)))
2282                         return 1;
2283
2284                 vcpu->arch.st.msr_val = data;
2285
2286                 if (!(data & KVM_MSR_ENABLED))
2287                         break;
2288
2289                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2290
2291                 break;
2292         case MSR_KVM_PV_EOI_EN:
2293                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2294                         return 1;
2295                 break;
2296
2297         case MSR_IA32_MCG_CTL:
2298         case MSR_IA32_MCG_STATUS:
2299         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2300                 return set_msr_mce(vcpu, msr_info);
2301
2302         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2303         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2304                 pr = true; /* fall through */
2305         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2306         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2307                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2308                         return kvm_pmu_set_msr(vcpu, msr_info);
2309
2310                 if (pr || data != 0)
2311                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2312                                     "0x%x data 0x%llx\n", msr, data);
2313                 break;
2314         case MSR_K7_CLK_CTL:
2315                 /*
2316                  * Ignore all writes to this no longer documented MSR.
2317                  * Writes are only relevant for old K7 processors,
2318                  * all pre-dating SVM, but a recommended workaround from
2319                  * AMD for these chips. It is possible to specify the
2320                  * affected processor models on the command line, hence
2321                  * the need to ignore the workaround.
2322                  */
2323                 break;
2324         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2325         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2326         case HV_X64_MSR_CRASH_CTL:
2327         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2328                 return kvm_hv_set_msr_common(vcpu, msr, data,
2329                                              msr_info->host_initiated);
2330         case MSR_IA32_BBL_CR_CTL3:
2331                 /* Drop writes to this legacy MSR -- see rdmsr
2332                  * counterpart for further detail.
2333                  */
2334                 if (report_ignored_msrs)
2335                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2336                                 msr, data);
2337                 break;
2338         case MSR_AMD64_OSVW_ID_LENGTH:
2339                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2340                         return 1;
2341                 vcpu->arch.osvw.length = data;
2342                 break;
2343         case MSR_AMD64_OSVW_STATUS:
2344                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2345                         return 1;
2346                 vcpu->arch.osvw.status = data;
2347                 break;
2348         case MSR_PLATFORM_INFO:
2349                 if (!msr_info->host_initiated ||
2350                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2351                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2352                      cpuid_fault_enabled(vcpu)))
2353                         return 1;
2354                 vcpu->arch.msr_platform_info = data;
2355                 break;
2356         case MSR_MISC_FEATURES_ENABLES:
2357                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2358                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2359                      !supports_cpuid_fault(vcpu)))
2360                         return 1;
2361                 vcpu->arch.msr_misc_features_enables = data;
2362                 break;
2363         default:
2364                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2365                         return xen_hvm_config(vcpu, data);
2366                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2367                         return kvm_pmu_set_msr(vcpu, msr_info);
2368                 if (!ignore_msrs) {
2369                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2370                                     msr, data);
2371                         return 1;
2372                 } else {
2373                         if (report_ignored_msrs)
2374                                 vcpu_unimpl(vcpu,
2375                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2376                                         msr, data);
2377                         break;
2378                 }
2379         }
2380         return 0;
2381 }
2382 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2383
2384
2385 /*
2386  * Reads an msr value (of 'msr_index') into 'pdata'.
2387  * Returns 0 on success, non-0 otherwise.
2388  * Assumes vcpu_load() was already called.
2389  */
2390 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2391 {
2392         return kvm_x86_ops->get_msr(vcpu, msr);
2393 }
2394 EXPORT_SYMBOL_GPL(kvm_get_msr);
2395
2396 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2397 {
2398         u64 data;
2399         u64 mcg_cap = vcpu->arch.mcg_cap;
2400         unsigned bank_num = mcg_cap & 0xff;
2401
2402         switch (msr) {
2403         case MSR_IA32_P5_MC_ADDR:
2404         case MSR_IA32_P5_MC_TYPE:
2405                 data = 0;
2406                 break;
2407         case MSR_IA32_MCG_CAP:
2408                 data = vcpu->arch.mcg_cap;
2409                 break;
2410         case MSR_IA32_MCG_CTL:
2411                 if (!(mcg_cap & MCG_CTL_P))
2412                         return 1;
2413                 data = vcpu->arch.mcg_ctl;
2414                 break;
2415         case MSR_IA32_MCG_STATUS:
2416                 data = vcpu->arch.mcg_status;
2417                 break;
2418         default:
2419                 if (msr >= MSR_IA32_MC0_CTL &&
2420                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2421                         u32 offset = msr - MSR_IA32_MC0_CTL;
2422                         data = vcpu->arch.mce_banks[offset];
2423                         break;
2424                 }
2425                 return 1;
2426         }
2427         *pdata = data;
2428         return 0;
2429 }
2430
2431 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2432 {
2433         switch (msr_info->index) {
2434         case MSR_IA32_PLATFORM_ID:
2435         case MSR_IA32_EBL_CR_POWERON:
2436         case MSR_IA32_DEBUGCTLMSR:
2437         case MSR_IA32_LASTBRANCHFROMIP:
2438         case MSR_IA32_LASTBRANCHTOIP:
2439         case MSR_IA32_LASTINTFROMIP:
2440         case MSR_IA32_LASTINTTOIP:
2441         case MSR_K8_SYSCFG:
2442         case MSR_K8_TSEG_ADDR:
2443         case MSR_K8_TSEG_MASK:
2444         case MSR_K7_HWCR:
2445         case MSR_VM_HSAVE_PA:
2446         case MSR_K8_INT_PENDING_MSG:
2447         case MSR_AMD64_NB_CFG:
2448         case MSR_FAM10H_MMIO_CONF_BASE:
2449         case MSR_AMD64_BU_CFG2:
2450         case MSR_IA32_PERF_CTL:
2451         case MSR_AMD64_DC_CFG:
2452                 msr_info->data = 0;
2453                 break;
2454         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2455         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2456         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2457         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2458                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2459                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2460                 msr_info->data = 0;
2461                 break;
2462         case MSR_IA32_UCODE_REV:
2463                 msr_info->data = 0x100000000ULL;
2464                 break;
2465         case MSR_MTRRcap:
2466         case 0x200 ... 0x2ff:
2467                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2468         case 0xcd: /* fsb frequency */
2469                 msr_info->data = 3;
2470                 break;
2471                 /*
2472                  * MSR_EBC_FREQUENCY_ID
2473                  * Conservative value valid for even the basic CPU models.
2474                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2475                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2476                  * and 266MHz for model 3, or 4. Set Core Clock
2477                  * Frequency to System Bus Frequency Ratio to 1 (bits
2478                  * 31:24) even though these are only valid for CPU
2479                  * models > 2, however guests may end up dividing or
2480                  * multiplying by zero otherwise.
2481                  */
2482         case MSR_EBC_FREQUENCY_ID:
2483                 msr_info->data = 1 << 24;
2484                 break;
2485         case MSR_IA32_APICBASE:
2486                 msr_info->data = kvm_get_apic_base(vcpu);
2487                 break;
2488         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2489                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2490                 break;
2491         case MSR_IA32_TSCDEADLINE:
2492                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2493                 break;
2494         case MSR_IA32_TSC_ADJUST:
2495                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2496                 break;
2497         case MSR_IA32_MISC_ENABLE:
2498                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2499                 break;
2500         case MSR_IA32_SMBASE:
2501                 if (!msr_info->host_initiated)
2502                         return 1;
2503                 msr_info->data = vcpu->arch.smbase;
2504                 break;
2505         case MSR_IA32_PERF_STATUS:
2506                 /* TSC increment by tick */
2507                 msr_info->data = 1000ULL;
2508                 /* CPU multiplier */
2509                 msr_info->data |= (((uint64_t)4ULL) << 40);
2510                 break;
2511         case MSR_EFER:
2512                 msr_info->data = vcpu->arch.efer;
2513                 break;
2514         case MSR_KVM_WALL_CLOCK:
2515         case MSR_KVM_WALL_CLOCK_NEW:
2516                 msr_info->data = vcpu->kvm->arch.wall_clock;
2517                 break;
2518         case MSR_KVM_SYSTEM_TIME:
2519         case MSR_KVM_SYSTEM_TIME_NEW:
2520                 msr_info->data = vcpu->arch.time;
2521                 break;
2522         case MSR_KVM_ASYNC_PF_EN:
2523                 msr_info->data = vcpu->arch.apf.msr_val;
2524                 break;
2525         case MSR_KVM_STEAL_TIME:
2526                 msr_info->data = vcpu->arch.st.msr_val;
2527                 break;
2528         case MSR_KVM_PV_EOI_EN:
2529                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2530                 break;
2531         case MSR_IA32_P5_MC_ADDR:
2532         case MSR_IA32_P5_MC_TYPE:
2533         case MSR_IA32_MCG_CAP:
2534         case MSR_IA32_MCG_CTL:
2535         case MSR_IA32_MCG_STATUS:
2536         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2537                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2538         case MSR_K7_CLK_CTL:
2539                 /*
2540                  * Provide expected ramp-up count for K7. All other
2541                  * are set to zero, indicating minimum divisors for
2542                  * every field.
2543                  *
2544                  * This prevents guest kernels on AMD host with CPU
2545                  * type 6, model 8 and higher from exploding due to
2546                  * the rdmsr failing.
2547                  */
2548                 msr_info->data = 0x20000000;
2549                 break;
2550         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2551         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2552         case HV_X64_MSR_CRASH_CTL:
2553         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2554                 return kvm_hv_get_msr_common(vcpu,
2555                                              msr_info->index, &msr_info->data);
2556                 break;
2557         case MSR_IA32_BBL_CR_CTL3:
2558                 /* This legacy MSR exists but isn't fully documented in current
2559                  * silicon.  It is however accessed by winxp in very narrow
2560                  * scenarios where it sets bit #19, itself documented as
2561                  * a "reserved" bit.  Best effort attempt to source coherent
2562                  * read data here should the balance of the register be
2563                  * interpreted by the guest:
2564                  *
2565                  * L2 cache control register 3: 64GB range, 256KB size,
2566                  * enabled, latency 0x1, configured
2567                  */
2568                 msr_info->data = 0xbe702111;
2569                 break;
2570         case MSR_AMD64_OSVW_ID_LENGTH:
2571                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2572                         return 1;
2573                 msr_info->data = vcpu->arch.osvw.length;
2574                 break;
2575         case MSR_AMD64_OSVW_STATUS:
2576                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2577                         return 1;
2578                 msr_info->data = vcpu->arch.osvw.status;
2579                 break;
2580         case MSR_PLATFORM_INFO:
2581                 msr_info->data = vcpu->arch.msr_platform_info;
2582                 break;
2583         case MSR_MISC_FEATURES_ENABLES:
2584                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2585                 break;
2586         default:
2587                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2588                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2589                 if (!ignore_msrs) {
2590                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2591                                                msr_info->index);
2592                         return 1;
2593                 } else {
2594                         if (report_ignored_msrs)
2595                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2596                                         msr_info->index);
2597                         msr_info->data = 0;
2598                 }
2599                 break;
2600         }
2601         return 0;
2602 }
2603 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2604
2605 /*
2606  * Read or write a bunch of msrs. All parameters are kernel addresses.
2607  *
2608  * @return number of msrs set successfully.
2609  */
2610 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2611                     struct kvm_msr_entry *entries,
2612                     int (*do_msr)(struct kvm_vcpu *vcpu,
2613                                   unsigned index, u64 *data))
2614 {
2615         int i, idx;
2616
2617         idx = srcu_read_lock(&vcpu->kvm->srcu);
2618         for (i = 0; i < msrs->nmsrs; ++i)
2619                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2620                         break;
2621         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2622
2623         return i;
2624 }
2625
2626 /*
2627  * Read or write a bunch of msrs. Parameters are user addresses.
2628  *
2629  * @return number of msrs set successfully.
2630  */
2631 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2632                   int (*do_msr)(struct kvm_vcpu *vcpu,
2633                                 unsigned index, u64 *data),
2634                   int writeback)
2635 {
2636         struct kvm_msrs msrs;
2637         struct kvm_msr_entry *entries;
2638         int r, n;
2639         unsigned size;
2640
2641         r = -EFAULT;
2642         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2643                 goto out;
2644
2645         r = -E2BIG;
2646         if (msrs.nmsrs >= MAX_IO_MSRS)
2647                 goto out;
2648
2649         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2650         entries = memdup_user(user_msrs->entries, size);
2651         if (IS_ERR(entries)) {
2652                 r = PTR_ERR(entries);
2653                 goto out;
2654         }
2655
2656         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2657         if (r < 0)
2658                 goto out_free;
2659
2660         r = -EFAULT;
2661         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2662                 goto out_free;
2663
2664         r = n;
2665
2666 out_free:
2667         kfree(entries);
2668 out:
2669         return r;
2670 }
2671
2672 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2673 {
2674         int r;
2675
2676         switch (ext) {
2677         case KVM_CAP_IRQCHIP:
2678         case KVM_CAP_HLT:
2679         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2680         case KVM_CAP_SET_TSS_ADDR:
2681         case KVM_CAP_EXT_CPUID:
2682         case KVM_CAP_EXT_EMUL_CPUID:
2683         case KVM_CAP_CLOCKSOURCE:
2684         case KVM_CAP_PIT:
2685         case KVM_CAP_NOP_IO_DELAY:
2686         case KVM_CAP_MP_STATE:
2687         case KVM_CAP_SYNC_MMU:
2688         case KVM_CAP_USER_NMI:
2689         case KVM_CAP_REINJECT_CONTROL:
2690         case KVM_CAP_IRQ_INJECT_STATUS:
2691         case KVM_CAP_IOEVENTFD:
2692         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2693         case KVM_CAP_PIT2:
2694         case KVM_CAP_PIT_STATE2:
2695         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2696         case KVM_CAP_XEN_HVM:
2697         case KVM_CAP_VCPU_EVENTS:
2698         case KVM_CAP_HYPERV:
2699         case KVM_CAP_HYPERV_VAPIC:
2700         case KVM_CAP_HYPERV_SPIN:
2701         case KVM_CAP_HYPERV_SYNIC:
2702         case KVM_CAP_HYPERV_SYNIC2:
2703         case KVM_CAP_HYPERV_VP_INDEX:
2704         case KVM_CAP_PCI_SEGMENT:
2705         case KVM_CAP_DEBUGREGS:
2706         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2707         case KVM_CAP_XSAVE:
2708         case KVM_CAP_ASYNC_PF:
2709         case KVM_CAP_GET_TSC_KHZ:
2710         case KVM_CAP_KVMCLOCK_CTRL:
2711         case KVM_CAP_READONLY_MEM:
2712         case KVM_CAP_HYPERV_TIME:
2713         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2714         case KVM_CAP_TSC_DEADLINE_TIMER:
2715         case KVM_CAP_ENABLE_CAP_VM:
2716         case KVM_CAP_DISABLE_QUIRKS:
2717         case KVM_CAP_SET_BOOT_CPU_ID:
2718         case KVM_CAP_SPLIT_IRQCHIP:
2719         case KVM_CAP_IMMEDIATE_EXIT:
2720                 r = 1;
2721                 break;
2722         case KVM_CAP_ADJUST_CLOCK:
2723                 r = KVM_CLOCK_TSC_STABLE;
2724                 break;
2725         case KVM_CAP_X86_GUEST_MWAIT:
2726                 r = kvm_mwait_in_guest();
2727                 break;
2728         case KVM_CAP_X86_SMM:
2729                 /* SMBASE is usually relocated above 1M on modern chipsets,
2730                  * and SMM handlers might indeed rely on 4G segment limits,
2731                  * so do not report SMM to be available if real mode is
2732                  * emulated via vm86 mode.  Still, do not go to great lengths
2733                  * to avoid userspace's usage of the feature, because it is a
2734                  * fringe case that is not enabled except via specific settings
2735                  * of the module parameters.
2736                  */
2737                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2738                 break;
2739         case KVM_CAP_VAPIC:
2740                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2741                 break;
2742         case KVM_CAP_NR_VCPUS:
2743                 r = KVM_SOFT_MAX_VCPUS;
2744                 break;
2745         case KVM_CAP_MAX_VCPUS:
2746                 r = KVM_MAX_VCPUS;
2747                 break;
2748         case KVM_CAP_NR_MEMSLOTS:
2749                 r = KVM_USER_MEM_SLOTS;
2750                 break;
2751         case KVM_CAP_PV_MMU:    /* obsolete */
2752                 r = 0;
2753                 break;
2754         case KVM_CAP_MCE:
2755                 r = KVM_MAX_MCE_BANKS;
2756                 break;
2757         case KVM_CAP_XCRS:
2758                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2759                 break;
2760         case KVM_CAP_TSC_CONTROL:
2761                 r = kvm_has_tsc_control;
2762                 break;
2763         case KVM_CAP_X2APIC_API:
2764                 r = KVM_X2APIC_API_VALID_FLAGS;
2765                 break;
2766         default:
2767                 r = 0;
2768                 break;
2769         }
2770         return r;
2771
2772 }
2773
2774 long kvm_arch_dev_ioctl(struct file *filp,
2775                         unsigned int ioctl, unsigned long arg)
2776 {
2777         void __user *argp = (void __user *)arg;
2778         long r;
2779
2780         switch (ioctl) {
2781         case KVM_GET_MSR_INDEX_LIST: {
2782                 struct kvm_msr_list __user *user_msr_list = argp;
2783                 struct kvm_msr_list msr_list;
2784                 unsigned n;
2785
2786                 r = -EFAULT;
2787                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2788                         goto out;
2789                 n = msr_list.nmsrs;
2790                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2791                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2792                         goto out;
2793                 r = -E2BIG;
2794                 if (n < msr_list.nmsrs)
2795                         goto out;
2796                 r = -EFAULT;
2797                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2798                                  num_msrs_to_save * sizeof(u32)))
2799                         goto out;
2800                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2801                                  &emulated_msrs,
2802                                  num_emulated_msrs * sizeof(u32)))
2803                         goto out;
2804                 r = 0;
2805                 break;
2806         }
2807         case KVM_GET_SUPPORTED_CPUID:
2808         case KVM_GET_EMULATED_CPUID: {
2809                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2810                 struct kvm_cpuid2 cpuid;
2811
2812                 r = -EFAULT;
2813                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2814                         goto out;
2815
2816                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2817                                             ioctl);
2818                 if (r)
2819                         goto out;
2820
2821                 r = -EFAULT;
2822                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2823                         goto out;
2824                 r = 0;
2825                 break;
2826         }
2827         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2828                 r = -EFAULT;
2829                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2830                                  sizeof(kvm_mce_cap_supported)))
2831                         goto out;
2832                 r = 0;
2833                 break;
2834         }
2835         default:
2836                 r = -EINVAL;
2837         }
2838 out:
2839         return r;
2840 }
2841
2842 static void wbinvd_ipi(void *garbage)
2843 {
2844         wbinvd();
2845 }
2846
2847 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2848 {
2849         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2850 }
2851
2852 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2853 {
2854         /* Address WBINVD may be executed by guest */
2855         if (need_emulate_wbinvd(vcpu)) {
2856                 if (kvm_x86_ops->has_wbinvd_exit())
2857                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2858                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2859                         smp_call_function_single(vcpu->cpu,
2860                                         wbinvd_ipi, NULL, 1);
2861         }
2862
2863         kvm_x86_ops->vcpu_load(vcpu, cpu);
2864
2865         /* Apply any externally detected TSC adjustments (due to suspend) */
2866         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2867                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2868                 vcpu->arch.tsc_offset_adjustment = 0;
2869                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2870         }
2871
2872         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2873                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2874                                 rdtsc() - vcpu->arch.last_host_tsc;
2875                 if (tsc_delta < 0)
2876                         mark_tsc_unstable("KVM discovered backwards TSC");
2877
2878                 if (check_tsc_unstable()) {
2879                         u64 offset = kvm_compute_tsc_offset(vcpu,
2880                                                 vcpu->arch.last_guest_tsc);
2881                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2882                         vcpu->arch.tsc_catchup = 1;
2883                 }
2884
2885                 if (kvm_lapic_hv_timer_in_use(vcpu))
2886                         kvm_lapic_restart_hv_timer(vcpu);
2887
2888                 /*
2889                  * On a host with synchronized TSC, there is no need to update
2890                  * kvmclock on vcpu->cpu migration
2891                  */
2892                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2893                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2894                 if (vcpu->cpu != cpu)
2895                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
2896                 vcpu->cpu = cpu;
2897         }
2898
2899         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2900 }
2901
2902 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2903 {
2904         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2905                 return;
2906
2907         vcpu->arch.st.steal.preempted = 1;
2908
2909         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2910                         &vcpu->arch.st.steal.preempted,
2911                         offsetof(struct kvm_steal_time, preempted),
2912                         sizeof(vcpu->arch.st.steal.preempted));
2913 }
2914
2915 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2916 {
2917         int idx;
2918
2919         if (vcpu->preempted)
2920                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
2921
2922         /*
2923          * Disable page faults because we're in atomic context here.
2924          * kvm_write_guest_offset_cached() would call might_fault()
2925          * that relies on pagefault_disable() to tell if there's a
2926          * bug. NOTE: the write to guest memory may not go through if
2927          * during postcopy live migration or if there's heavy guest
2928          * paging.
2929          */
2930         pagefault_disable();
2931         /*
2932          * kvm_memslots() will be called by
2933          * kvm_write_guest_offset_cached() so take the srcu lock.
2934          */
2935         idx = srcu_read_lock(&vcpu->kvm->srcu);
2936         kvm_steal_time_set_preempted(vcpu);
2937         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2938         pagefault_enable();
2939         kvm_x86_ops->vcpu_put(vcpu);
2940         vcpu->arch.last_host_tsc = rdtsc();
2941 }
2942
2943 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2944                                     struct kvm_lapic_state *s)
2945 {
2946         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2947                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2948
2949         return kvm_apic_get_state(vcpu, s);
2950 }
2951
2952 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2953                                     struct kvm_lapic_state *s)
2954 {
2955         int r;
2956
2957         r = kvm_apic_set_state(vcpu, s);
2958         if (r)
2959                 return r;
2960         update_cr8_intercept(vcpu);
2961
2962         return 0;
2963 }
2964
2965 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2966 {
2967         return (!lapic_in_kernel(vcpu) ||
2968                 kvm_apic_accept_pic_intr(vcpu));
2969 }
2970
2971 /*
2972  * if userspace requested an interrupt window, check that the
2973  * interrupt window is open.
2974  *
2975  * No need to exit to userspace if we already have an interrupt queued.
2976  */
2977 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2978 {
2979         return kvm_arch_interrupt_allowed(vcpu) &&
2980                 !kvm_cpu_has_interrupt(vcpu) &&
2981                 !kvm_event_needs_reinjection(vcpu) &&
2982                 kvm_cpu_accept_dm_intr(vcpu);
2983 }
2984
2985 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2986                                     struct kvm_interrupt *irq)
2987 {
2988         if (irq->irq >= KVM_NR_INTERRUPTS)
2989                 return -EINVAL;
2990
2991         if (!irqchip_in_kernel(vcpu->kvm)) {
2992                 kvm_queue_interrupt(vcpu, irq->irq, false);
2993                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2994                 return 0;
2995         }
2996
2997         /*
2998          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2999          * fail for in-kernel 8259.
3000          */
3001         if (pic_in_kernel(vcpu->kvm))
3002                 return -ENXIO;
3003
3004         if (vcpu->arch.pending_external_vector != -1)
3005                 return -EEXIST;
3006
3007         vcpu->arch.pending_external_vector = irq->irq;
3008         kvm_make_request(KVM_REQ_EVENT, vcpu);
3009         return 0;
3010 }
3011
3012 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3013 {
3014         kvm_inject_nmi(vcpu);
3015
3016         return 0;
3017 }
3018
3019 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3020 {
3021         kvm_make_request(KVM_REQ_SMI, vcpu);
3022
3023         return 0;
3024 }
3025
3026 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3027                                            struct kvm_tpr_access_ctl *tac)
3028 {
3029         if (tac->flags)
3030                 return -EINVAL;
3031         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3032         return 0;
3033 }
3034
3035 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3036                                         u64 mcg_cap)
3037 {
3038         int r;
3039         unsigned bank_num = mcg_cap & 0xff, bank;
3040
3041         r = -EINVAL;
3042         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3043                 goto out;
3044         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3045                 goto out;
3046         r = 0;
3047         vcpu->arch.mcg_cap = mcg_cap;
3048         /* Init IA32_MCG_CTL to all 1s */
3049         if (mcg_cap & MCG_CTL_P)
3050                 vcpu->arch.mcg_ctl = ~(u64)0;
3051         /* Init IA32_MCi_CTL to all 1s */
3052         for (bank = 0; bank < bank_num; bank++)
3053                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3054
3055         if (kvm_x86_ops->setup_mce)
3056                 kvm_x86_ops->setup_mce(vcpu);
3057 out:
3058         return r;
3059 }
3060
3061 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3062                                       struct kvm_x86_mce *mce)
3063 {
3064         u64 mcg_cap = vcpu->arch.mcg_cap;
3065         unsigned bank_num = mcg_cap & 0xff;
3066         u64 *banks = vcpu->arch.mce_banks;
3067
3068         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3069                 return -EINVAL;
3070         /*
3071          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3072          * reporting is disabled
3073          */
3074         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3075             vcpu->arch.mcg_ctl != ~(u64)0)
3076                 return 0;
3077         banks += 4 * mce->bank;
3078         /*
3079          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3080          * reporting is disabled for the bank
3081          */
3082         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3083                 return 0;
3084         if (mce->status & MCI_STATUS_UC) {
3085                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3086                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3087                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3088                         return 0;
3089                 }
3090                 if (banks[1] & MCI_STATUS_VAL)
3091                         mce->status |= MCI_STATUS_OVER;
3092                 banks[2] = mce->addr;
3093                 banks[3] = mce->misc;
3094                 vcpu->arch.mcg_status = mce->mcg_status;
3095                 banks[1] = mce->status;
3096                 kvm_queue_exception(vcpu, MC_VECTOR);
3097         } else if (!(banks[1] & MCI_STATUS_VAL)
3098                    || !(banks[1] & MCI_STATUS_UC)) {
3099                 if (banks[1] & MCI_STATUS_VAL)
3100                         mce->status |= MCI_STATUS_OVER;
3101                 banks[2] = mce->addr;
3102                 banks[3] = mce->misc;
3103                 banks[1] = mce->status;
3104         } else
3105                 banks[1] |= MCI_STATUS_OVER;
3106         return 0;
3107 }
3108
3109 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3110                                                struct kvm_vcpu_events *events)
3111 {
3112         process_nmi(vcpu);
3113         /*
3114          * FIXME: pass injected and pending separately.  This is only
3115          * needed for nested virtualization, whose state cannot be
3116          * migrated yet.  For now we can combine them.
3117          */
3118         events->exception.injected =
3119                 (vcpu->arch.exception.pending ||
3120                  vcpu->arch.exception.injected) &&
3121                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3122         events->exception.nr = vcpu->arch.exception.nr;
3123         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3124         events->exception.pad = 0;
3125         events->exception.error_code = vcpu->arch.exception.error_code;
3126
3127         events->interrupt.injected =
3128                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3129         events->interrupt.nr = vcpu->arch.interrupt.nr;
3130         events->interrupt.soft = 0;
3131         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3132
3133         events->nmi.injected = vcpu->arch.nmi_injected;
3134         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3135         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3136         events->nmi.pad = 0;
3137
3138         events->sipi_vector = 0; /* never valid when reporting to user space */
3139
3140         events->smi.smm = is_smm(vcpu);
3141         events->smi.pending = vcpu->arch.smi_pending;
3142         events->smi.smm_inside_nmi =
3143                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3144         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3145
3146         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3147                          | KVM_VCPUEVENT_VALID_SHADOW
3148                          | KVM_VCPUEVENT_VALID_SMM);
3149         memset(&events->reserved, 0, sizeof(events->reserved));
3150 }
3151
3152 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3153
3154 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3155                                               struct kvm_vcpu_events *events)
3156 {
3157         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3158                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3159                               | KVM_VCPUEVENT_VALID_SHADOW
3160                               | KVM_VCPUEVENT_VALID_SMM))
3161                 return -EINVAL;
3162
3163         if (events->exception.injected &&
3164             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3165              is_guest_mode(vcpu)))
3166                 return -EINVAL;
3167
3168         /* INITs are latched while in SMM */
3169         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3170             (events->smi.smm || events->smi.pending) &&
3171             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3172                 return -EINVAL;
3173
3174         process_nmi(vcpu);
3175         vcpu->arch.exception.injected = false;
3176         vcpu->arch.exception.pending = events->exception.injected;
3177         vcpu->arch.exception.nr = events->exception.nr;
3178         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3179         vcpu->arch.exception.error_code = events->exception.error_code;
3180
3181         vcpu->arch.interrupt.pending = events->interrupt.injected;
3182         vcpu->arch.interrupt.nr = events->interrupt.nr;
3183         vcpu->arch.interrupt.soft = events->interrupt.soft;
3184         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3185                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3186                                                   events->interrupt.shadow);
3187
3188         vcpu->arch.nmi_injected = events->nmi.injected;
3189         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3190                 vcpu->arch.nmi_pending = events->nmi.pending;
3191         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3192
3193         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3194             lapic_in_kernel(vcpu))
3195                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3196
3197         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3198                 u32 hflags = vcpu->arch.hflags;
3199                 if (events->smi.smm)
3200                         hflags |= HF_SMM_MASK;
3201                 else
3202                         hflags &= ~HF_SMM_MASK;
3203                 kvm_set_hflags(vcpu, hflags);
3204
3205                 vcpu->arch.smi_pending = events->smi.pending;
3206
3207                 if (events->smi.smm) {
3208                         if (events->smi.smm_inside_nmi)
3209                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3210                         else
3211                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3212                         if (lapic_in_kernel(vcpu)) {
3213                                 if (events->smi.latched_init)
3214                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3215                                 else
3216                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3217                         }
3218                 }
3219         }
3220
3221         kvm_make_request(KVM_REQ_EVENT, vcpu);
3222
3223         return 0;
3224 }
3225
3226 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3227                                              struct kvm_debugregs *dbgregs)
3228 {
3229         unsigned long val;
3230
3231         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3232         kvm_get_dr(vcpu, 6, &val);
3233         dbgregs->dr6 = val;
3234         dbgregs->dr7 = vcpu->arch.dr7;
3235         dbgregs->flags = 0;
3236         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3237 }
3238
3239 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3240                                             struct kvm_debugregs *dbgregs)
3241 {
3242         if (dbgregs->flags)
3243                 return -EINVAL;
3244
3245         if (dbgregs->dr6 & ~0xffffffffull)
3246                 return -EINVAL;
3247         if (dbgregs->dr7 & ~0xffffffffull)
3248                 return -EINVAL;
3249
3250         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3251         kvm_update_dr0123(vcpu);
3252         vcpu->arch.dr6 = dbgregs->dr6;
3253         kvm_update_dr6(vcpu);
3254         vcpu->arch.dr7 = dbgregs->dr7;
3255         kvm_update_dr7(vcpu);
3256
3257         return 0;
3258 }
3259
3260 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3261
3262 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3263 {
3264         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3265         u64 xstate_bv = xsave->header.xfeatures;
3266         u64 valid;
3267
3268         /*
3269          * Copy legacy XSAVE area, to avoid complications with CPUID
3270          * leaves 0 and 1 in the loop below.
3271          */
3272         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3273
3274         /* Set XSTATE_BV */
3275         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3276         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3277
3278         /*
3279          * Copy each region from the possibly compacted offset to the
3280          * non-compacted offset.
3281          */
3282         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3283         while (valid) {
3284                 u64 feature = valid & -valid;
3285                 int index = fls64(feature) - 1;
3286                 void *src = get_xsave_addr(xsave, feature);
3287
3288                 if (src) {
3289                         u32 size, offset, ecx, edx;
3290                         cpuid_count(XSTATE_CPUID, index,
3291                                     &size, &offset, &ecx, &edx);
3292                         if (feature == XFEATURE_MASK_PKRU)
3293                                 memcpy(dest + offset, &vcpu->arch.pkru,
3294                                        sizeof(vcpu->arch.pkru));
3295                         else
3296                                 memcpy(dest + offset, src, size);
3297
3298                 }
3299
3300                 valid -= feature;
3301         }
3302 }
3303
3304 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3305 {
3306         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3307         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3308         u64 valid;
3309
3310         /*
3311          * Copy legacy XSAVE area, to avoid complications with CPUID
3312          * leaves 0 and 1 in the loop below.
3313          */
3314         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3315
3316         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3317         xsave->header.xfeatures = xstate_bv;
3318         if (boot_cpu_has(X86_FEATURE_XSAVES))
3319                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3320
3321         /*
3322          * Copy each region from the non-compacted offset to the
3323          * possibly compacted offset.
3324          */
3325         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3326         while (valid) {
3327                 u64 feature = valid & -valid;
3328                 int index = fls64(feature) - 1;
3329                 void *dest = get_xsave_addr(xsave, feature);
3330
3331                 if (dest) {
3332                         u32 size, offset, ecx, edx;
3333                         cpuid_count(XSTATE_CPUID, index,
3334                                     &size, &offset, &ecx, &edx);
3335                         if (feature == XFEATURE_MASK_PKRU)
3336                                 memcpy(&vcpu->arch.pkru, src + offset,
3337                                        sizeof(vcpu->arch.pkru));
3338                         else
3339                                 memcpy(dest, src + offset, size);
3340                 }
3341
3342                 valid -= feature;
3343         }
3344 }
3345
3346 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3347                                          struct kvm_xsave *guest_xsave)
3348 {
3349         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3350                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3351                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3352         } else {
3353                 memcpy(guest_xsave->region,
3354                         &vcpu->arch.guest_fpu.state.fxsave,
3355                         sizeof(struct fxregs_state));
3356                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3357                         XFEATURE_MASK_FPSSE;
3358         }
3359 }
3360
3361 #define XSAVE_MXCSR_OFFSET 24
3362
3363 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3364                                         struct kvm_xsave *guest_xsave)
3365 {
3366         u64 xstate_bv =
3367                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3368         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3369
3370         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3371                 /*
3372                  * Here we allow setting states that are not present in
3373                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3374                  * with old userspace.
3375                  */
3376                 if (xstate_bv & ~kvm_supported_xcr0() ||
3377                         mxcsr & ~mxcsr_feature_mask)
3378                         return -EINVAL;
3379                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3380         } else {
3381                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3382                         mxcsr & ~mxcsr_feature_mask)
3383                         return -EINVAL;
3384                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3385                         guest_xsave->region, sizeof(struct fxregs_state));
3386         }
3387         return 0;
3388 }
3389
3390 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3391                                         struct kvm_xcrs *guest_xcrs)
3392 {
3393         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3394                 guest_xcrs->nr_xcrs = 0;
3395                 return;
3396         }
3397
3398         guest_xcrs->nr_xcrs = 1;
3399         guest_xcrs->flags = 0;
3400         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3401         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3402 }
3403
3404 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3405                                        struct kvm_xcrs *guest_xcrs)
3406 {
3407         int i, r = 0;
3408
3409         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3410                 return -EINVAL;
3411
3412         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3413                 return -EINVAL;
3414
3415         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3416                 /* Only support XCR0 currently */
3417                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3418                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3419                                 guest_xcrs->xcrs[i].value);
3420                         break;
3421                 }
3422         if (r)
3423                 r = -EINVAL;
3424         return r;
3425 }
3426
3427 /*
3428  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3429  * stopped by the hypervisor.  This function will be called from the host only.
3430  * EINVAL is returned when the host attempts to set the flag for a guest that
3431  * does not support pv clocks.
3432  */
3433 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3434 {
3435         if (!vcpu->arch.pv_time_enabled)
3436                 return -EINVAL;
3437         vcpu->arch.pvclock_set_guest_stopped_request = true;
3438         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3439         return 0;
3440 }
3441
3442 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3443                                      struct kvm_enable_cap *cap)
3444 {
3445         if (cap->flags)
3446                 return -EINVAL;
3447
3448         switch (cap->cap) {
3449         case KVM_CAP_HYPERV_SYNIC2:
3450                 if (cap->args[0])
3451                         return -EINVAL;
3452         case KVM_CAP_HYPERV_SYNIC:
3453                 if (!irqchip_in_kernel(vcpu->kvm))
3454                         return -EINVAL;
3455                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3456                                              KVM_CAP_HYPERV_SYNIC2);
3457         default:
3458                 return -EINVAL;
3459         }
3460 }
3461
3462 long kvm_arch_vcpu_ioctl(struct file *filp,
3463                          unsigned int ioctl, unsigned long arg)
3464 {
3465         struct kvm_vcpu *vcpu = filp->private_data;
3466         void __user *argp = (void __user *)arg;
3467         int r;
3468         union {
3469                 struct kvm_lapic_state *lapic;
3470                 struct kvm_xsave *xsave;
3471                 struct kvm_xcrs *xcrs;
3472                 void *buffer;
3473         } u;
3474
3475         u.buffer = NULL;
3476         switch (ioctl) {
3477         case KVM_GET_LAPIC: {
3478                 r = -EINVAL;
3479                 if (!lapic_in_kernel(vcpu))
3480                         goto out;
3481                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3482
3483                 r = -ENOMEM;
3484                 if (!u.lapic)
3485                         goto out;
3486                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3487                 if (r)
3488                         goto out;
3489                 r = -EFAULT;
3490                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3491                         goto out;
3492                 r = 0;
3493                 break;
3494         }
3495         case KVM_SET_LAPIC: {
3496                 r = -EINVAL;
3497                 if (!lapic_in_kernel(vcpu))
3498                         goto out;
3499                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3500                 if (IS_ERR(u.lapic))
3501                         return PTR_ERR(u.lapic);
3502
3503                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3504                 break;
3505         }
3506         case KVM_INTERRUPT: {
3507                 struct kvm_interrupt irq;
3508
3509                 r = -EFAULT;
3510                 if (copy_from_user(&irq, argp, sizeof irq))
3511                         goto out;
3512                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3513                 break;
3514         }
3515         case KVM_NMI: {
3516                 r = kvm_vcpu_ioctl_nmi(vcpu);
3517                 break;
3518         }
3519         case KVM_SMI: {
3520                 r = kvm_vcpu_ioctl_smi(vcpu);
3521                 break;
3522         }
3523         case KVM_SET_CPUID: {
3524                 struct kvm_cpuid __user *cpuid_arg = argp;
3525                 struct kvm_cpuid cpuid;
3526
3527                 r = -EFAULT;
3528                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3529                         goto out;
3530                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3531                 break;
3532         }
3533         case KVM_SET_CPUID2: {
3534                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3535                 struct kvm_cpuid2 cpuid;
3536
3537                 r = -EFAULT;
3538                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3539                         goto out;
3540                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3541                                               cpuid_arg->entries);
3542                 break;
3543         }
3544         case KVM_GET_CPUID2: {
3545                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3546                 struct kvm_cpuid2 cpuid;
3547
3548                 r = -EFAULT;
3549                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3550                         goto out;
3551                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3552                                               cpuid_arg->entries);
3553                 if (r)
3554                         goto out;
3555                 r = -EFAULT;
3556                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3557                         goto out;
3558                 r = 0;
3559                 break;
3560         }
3561         case KVM_GET_MSRS:
3562                 r = msr_io(vcpu, argp, do_get_msr, 1);
3563                 break;
3564         case KVM_SET_MSRS:
3565                 r = msr_io(vcpu, argp, do_set_msr, 0);
3566                 break;
3567         case KVM_TPR_ACCESS_REPORTING: {
3568                 struct kvm_tpr_access_ctl tac;
3569
3570                 r = -EFAULT;
3571                 if (copy_from_user(&tac, argp, sizeof tac))
3572                         goto out;
3573                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3574                 if (r)
3575                         goto out;
3576                 r = -EFAULT;
3577                 if (copy_to_user(argp, &tac, sizeof tac))
3578                         goto out;
3579                 r = 0;
3580                 break;
3581         };
3582         case KVM_SET_VAPIC_ADDR: {
3583                 struct kvm_vapic_addr va;
3584                 int idx;
3585
3586                 r = -EINVAL;
3587                 if (!lapic_in_kernel(vcpu))
3588                         goto out;
3589                 r = -EFAULT;
3590                 if (copy_from_user(&va, argp, sizeof va))
3591                         goto out;
3592                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3593                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3594                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3595                 break;
3596         }
3597         case KVM_X86_SETUP_MCE: {
3598                 u64 mcg_cap;
3599
3600                 r = -EFAULT;
3601                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3602                         goto out;
3603                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3604                 break;
3605         }
3606         case KVM_X86_SET_MCE: {
3607                 struct kvm_x86_mce mce;
3608
3609                 r = -EFAULT;
3610                 if (copy_from_user(&mce, argp, sizeof mce))
3611                         goto out;
3612                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3613                 break;
3614         }
3615         case KVM_GET_VCPU_EVENTS: {
3616                 struct kvm_vcpu_events events;
3617
3618                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3619
3620                 r = -EFAULT;
3621                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3622                         break;
3623                 r = 0;
3624                 break;
3625         }
3626         case KVM_SET_VCPU_EVENTS: {
3627                 struct kvm_vcpu_events events;
3628
3629                 r = -EFAULT;
3630                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3631                         break;
3632
3633                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3634                 break;
3635         }
3636         case KVM_GET_DEBUGREGS: {
3637                 struct kvm_debugregs dbgregs;
3638
3639                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3640
3641                 r = -EFAULT;
3642                 if (copy_to_user(argp, &dbgregs,
3643                                  sizeof(struct kvm_debugregs)))
3644                         break;
3645                 r = 0;
3646                 break;
3647         }
3648         case KVM_SET_DEBUGREGS: {
3649                 struct kvm_debugregs dbgregs;
3650
3651                 r = -EFAULT;
3652                 if (copy_from_user(&dbgregs, argp,
3653                                    sizeof(struct kvm_debugregs)))
3654                         break;
3655
3656                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3657                 break;
3658         }
3659         case KVM_GET_XSAVE: {
3660                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3661                 r = -ENOMEM;
3662                 if (!u.xsave)
3663                         break;
3664
3665                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3666
3667                 r = -EFAULT;
3668                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3669                         break;
3670                 r = 0;
3671                 break;
3672         }
3673         case KVM_SET_XSAVE: {
3674                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3675                 if (IS_ERR(u.xsave))
3676                         return PTR_ERR(u.xsave);
3677
3678                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3679                 break;
3680         }
3681         case KVM_GET_XCRS: {
3682                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3683                 r = -ENOMEM;
3684                 if (!u.xcrs)
3685                         break;
3686
3687                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3688
3689                 r = -EFAULT;
3690                 if (copy_to_user(argp, u.xcrs,
3691                                  sizeof(struct kvm_xcrs)))
3692                         break;
3693                 r = 0;
3694                 break;
3695         }
3696         case KVM_SET_XCRS: {
3697                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3698                 if (IS_ERR(u.xcrs))
3699                         return PTR_ERR(u.xcrs);
3700
3701                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3702                 break;
3703         }
3704         case KVM_SET_TSC_KHZ: {
3705                 u32 user_tsc_khz;
3706
3707                 r = -EINVAL;
3708                 user_tsc_khz = (u32)arg;
3709
3710                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3711                         goto out;
3712
3713                 if (user_tsc_khz == 0)
3714                         user_tsc_khz = tsc_khz;
3715
3716                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3717                         r = 0;
3718
3719                 goto out;
3720         }
3721         case KVM_GET_TSC_KHZ: {
3722                 r = vcpu->arch.virtual_tsc_khz;
3723                 goto out;
3724         }
3725         case KVM_KVMCLOCK_CTRL: {
3726                 r = kvm_set_guest_paused(vcpu);
3727                 goto out;
3728         }
3729         case KVM_ENABLE_CAP: {
3730                 struct kvm_enable_cap cap;
3731
3732                 r = -EFAULT;
3733                 if (copy_from_user(&cap, argp, sizeof(cap)))
3734                         goto out;
3735                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3736                 break;
3737         }
3738         default:
3739                 r = -EINVAL;
3740         }
3741 out:
3742         kfree(u.buffer);
3743         return r;
3744 }
3745
3746 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3747 {
3748         return VM_FAULT_SIGBUS;
3749 }
3750
3751 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3752 {
3753         int ret;
3754
3755         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3756                 return -EINVAL;
3757         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3758         return ret;
3759 }
3760
3761 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3762                                               u64 ident_addr)
3763 {
3764         kvm->arch.ept_identity_map_addr = ident_addr;
3765         return 0;
3766 }
3767
3768 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3769                                           u32 kvm_nr_mmu_pages)
3770 {
3771         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3772                 return -EINVAL;
3773
3774         mutex_lock(&kvm->slots_lock);
3775
3776         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3777         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3778
3779         mutex_unlock(&kvm->slots_lock);
3780         return 0;
3781 }
3782
3783 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3784 {
3785         return kvm->arch.n_max_mmu_pages;
3786 }
3787
3788 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3789 {
3790         struct kvm_pic *pic = kvm->arch.vpic;
3791         int r;
3792
3793         r = 0;
3794         switch (chip->chip_id) {
3795         case KVM_IRQCHIP_PIC_MASTER:
3796                 memcpy(&chip->chip.pic, &pic->pics[0],
3797                         sizeof(struct kvm_pic_state));
3798                 break;
3799         case KVM_IRQCHIP_PIC_SLAVE:
3800                 memcpy(&chip->chip.pic, &pic->pics[1],
3801                         sizeof(struct kvm_pic_state));
3802                 break;
3803         case KVM_IRQCHIP_IOAPIC:
3804                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3805                 break;
3806         default:
3807                 r = -EINVAL;
3808                 break;
3809         }
3810         return r;
3811 }
3812
3813 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3814 {
3815         struct kvm_pic *pic = kvm->arch.vpic;
3816         int r;
3817
3818         r = 0;
3819         switch (chip->chip_id) {
3820         case KVM_IRQCHIP_PIC_MASTER:
3821                 spin_lock(&pic->lock);
3822                 memcpy(&pic->pics[0], &chip->chip.pic,
3823                         sizeof(struct kvm_pic_state));
3824                 spin_unlock(&pic->lock);
3825                 break;
3826         case KVM_IRQCHIP_PIC_SLAVE:
3827                 spin_lock(&pic->lock);
3828                 memcpy(&pic->pics[1], &chip->chip.pic,
3829                         sizeof(struct kvm_pic_state));
3830                 spin_unlock(&pic->lock);
3831                 break;
3832         case KVM_IRQCHIP_IOAPIC:
3833                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
3834                 break;
3835         default:
3836                 r = -EINVAL;
3837                 break;
3838         }
3839         kvm_pic_update_irq(pic);
3840         return r;
3841 }
3842
3843 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3844 {
3845         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3846
3847         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3848
3849         mutex_lock(&kps->lock);
3850         memcpy(ps, &kps->channels, sizeof(*ps));
3851         mutex_unlock(&kps->lock);
3852         return 0;
3853 }
3854
3855 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3856 {
3857         int i;
3858         struct kvm_pit *pit = kvm->arch.vpit;
3859
3860         mutex_lock(&pit->pit_state.lock);
3861         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3862         for (i = 0; i < 3; i++)
3863                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3864         mutex_unlock(&pit->pit_state.lock);
3865         return 0;
3866 }
3867
3868 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3869 {
3870         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3871         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3872                 sizeof(ps->channels));
3873         ps->flags = kvm->arch.vpit->pit_state.flags;
3874         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3875         memset(&ps->reserved, 0, sizeof(ps->reserved));
3876         return 0;
3877 }
3878
3879 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3880 {
3881         int start = 0;
3882         int i;
3883         u32 prev_legacy, cur_legacy;
3884         struct kvm_pit *pit = kvm->arch.vpit;
3885
3886         mutex_lock(&pit->pit_state.lock);
3887         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3888         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3889         if (!prev_legacy && cur_legacy)
3890                 start = 1;
3891         memcpy(&pit->pit_state.channels, &ps->channels,
3892                sizeof(pit->pit_state.channels));
3893         pit->pit_state.flags = ps->flags;
3894         for (i = 0; i < 3; i++)
3895                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3896                                    start && i == 0);
3897         mutex_unlock(&pit->pit_state.lock);
3898         return 0;
3899 }
3900
3901 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3902                                  struct kvm_reinject_control *control)
3903 {
3904         struct kvm_pit *pit = kvm->arch.vpit;
3905
3906         if (!pit)
3907                 return -ENXIO;
3908
3909         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3910          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3911          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3912          */
3913         mutex_lock(&pit->pit_state.lock);
3914         kvm_pit_set_reinject(pit, control->pit_reinject);
3915         mutex_unlock(&pit->pit_state.lock);
3916
3917         return 0;
3918 }
3919
3920 /**
3921  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3922  * @kvm: kvm instance
3923  * @log: slot id and address to which we copy the log
3924  *
3925  * Steps 1-4 below provide general overview of dirty page logging. See
3926  * kvm_get_dirty_log_protect() function description for additional details.
3927  *
3928  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3929  * always flush the TLB (step 4) even if previous step failed  and the dirty
3930  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3931  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3932  * writes will be marked dirty for next log read.
3933  *
3934  *   1. Take a snapshot of the bit and clear it if needed.
3935  *   2. Write protect the corresponding page.
3936  *   3. Copy the snapshot to the userspace.
3937  *   4. Flush TLB's if needed.
3938  */
3939 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3940 {
3941         bool is_dirty = false;
3942         int r;
3943
3944         mutex_lock(&kvm->slots_lock);
3945
3946         /*
3947          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3948          */
3949         if (kvm_x86_ops->flush_log_dirty)
3950                 kvm_x86_ops->flush_log_dirty(kvm);
3951
3952         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3953
3954         /*
3955          * All the TLBs can be flushed out of mmu lock, see the comments in
3956          * kvm_mmu_slot_remove_write_access().
3957          */
3958         lockdep_assert_held(&kvm->slots_lock);
3959         if (is_dirty)
3960                 kvm_flush_remote_tlbs(kvm);
3961
3962         mutex_unlock(&kvm->slots_lock);
3963         return r;
3964 }
3965
3966 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3967                         bool line_status)
3968 {
3969         if (!irqchip_in_kernel(kvm))
3970                 return -ENXIO;
3971
3972         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3973                                         irq_event->irq, irq_event->level,
3974                                         line_status);
3975         return 0;
3976 }
3977
3978 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3979                                    struct kvm_enable_cap *cap)
3980 {
3981         int r;
3982
3983         if (cap->flags)
3984                 return -EINVAL;
3985
3986         switch (cap->cap) {
3987         case KVM_CAP_DISABLE_QUIRKS:
3988                 kvm->arch.disabled_quirks = cap->args[0];
3989                 r = 0;
3990                 break;
3991         case KVM_CAP_SPLIT_IRQCHIP: {
3992                 mutex_lock(&kvm->lock);
3993                 r = -EINVAL;
3994                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3995                         goto split_irqchip_unlock;
3996                 r = -EEXIST;
3997                 if (irqchip_in_kernel(kvm))
3998                         goto split_irqchip_unlock;
3999                 if (kvm->created_vcpus)
4000                         goto split_irqchip_unlock;
4001                 r = kvm_setup_empty_irq_routing(kvm);
4002                 if (r)
4003                         goto split_irqchip_unlock;
4004                 /* Pairs with irqchip_in_kernel. */
4005                 smp_wmb();
4006                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4007                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4008                 r = 0;
4009 split_irqchip_unlock:
4010                 mutex_unlock(&kvm->lock);
4011                 break;
4012         }
4013         case KVM_CAP_X2APIC_API:
4014                 r = -EINVAL;
4015                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4016                         break;
4017
4018                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4019                         kvm->arch.x2apic_format = true;
4020                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4021                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4022
4023                 r = 0;
4024                 break;
4025         default:
4026                 r = -EINVAL;
4027                 break;
4028         }
4029         return r;
4030 }
4031
4032 long kvm_arch_vm_ioctl(struct file *filp,
4033                        unsigned int ioctl, unsigned long arg)
4034 {
4035         struct kvm *kvm = filp->private_data;
4036         void __user *argp = (void __user *)arg;
4037         int r = -ENOTTY;
4038         /*
4039          * This union makes it completely explicit to gcc-3.x
4040          * that these two variables' stack usage should be
4041          * combined, not added together.
4042          */
4043         union {
4044                 struct kvm_pit_state ps;
4045                 struct kvm_pit_state2 ps2;
4046                 struct kvm_pit_config pit_config;
4047         } u;
4048
4049         switch (ioctl) {
4050         case KVM_SET_TSS_ADDR:
4051                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4052                 break;
4053         case KVM_SET_IDENTITY_MAP_ADDR: {
4054                 u64 ident_addr;
4055
4056                 mutex_lock(&kvm->lock);
4057                 r = -EINVAL;
4058                 if (kvm->created_vcpus)
4059                         goto set_identity_unlock;
4060                 r = -EFAULT;
4061                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4062                         goto set_identity_unlock;
4063                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4064 set_identity_unlock:
4065                 mutex_unlock(&kvm->lock);
4066                 break;
4067         }
4068         case KVM_SET_NR_MMU_PAGES:
4069                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4070                 break;
4071         case KVM_GET_NR_MMU_PAGES:
4072                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4073                 break;
4074         case KVM_CREATE_IRQCHIP: {
4075                 mutex_lock(&kvm->lock);
4076
4077                 r = -EEXIST;
4078                 if (irqchip_in_kernel(kvm))
4079                         goto create_irqchip_unlock;
4080
4081                 r = -EINVAL;
4082                 if (kvm->created_vcpus)
4083                         goto create_irqchip_unlock;
4084
4085                 r = kvm_pic_init(kvm);
4086                 if (r)
4087                         goto create_irqchip_unlock;
4088
4089                 r = kvm_ioapic_init(kvm);
4090                 if (r) {
4091                         kvm_pic_destroy(kvm);
4092                         goto create_irqchip_unlock;
4093                 }
4094
4095                 r = kvm_setup_default_irq_routing(kvm);
4096                 if (r) {
4097                         kvm_ioapic_destroy(kvm);
4098                         kvm_pic_destroy(kvm);
4099                         goto create_irqchip_unlock;
4100                 }
4101                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4102                 smp_wmb();
4103                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4104         create_irqchip_unlock:
4105                 mutex_unlock(&kvm->lock);
4106                 break;
4107         }
4108         case KVM_CREATE_PIT:
4109                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4110                 goto create_pit;
4111         case KVM_CREATE_PIT2:
4112                 r = -EFAULT;
4113                 if (copy_from_user(&u.pit_config, argp,
4114                                    sizeof(struct kvm_pit_config)))
4115                         goto out;
4116         create_pit:
4117                 mutex_lock(&kvm->lock);
4118                 r = -EEXIST;
4119                 if (kvm->arch.vpit)
4120                         goto create_pit_unlock;
4121                 r = -ENOMEM;
4122                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4123                 if (kvm->arch.vpit)
4124                         r = 0;
4125         create_pit_unlock:
4126                 mutex_unlock(&kvm->lock);
4127                 break;
4128         case KVM_GET_IRQCHIP: {
4129                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4130                 struct kvm_irqchip *chip;
4131
4132                 chip = memdup_user(argp, sizeof(*chip));
4133                 if (IS_ERR(chip)) {
4134                         r = PTR_ERR(chip);
4135                         goto out;
4136                 }
4137
4138                 r = -ENXIO;
4139                 if (!irqchip_kernel(kvm))
4140                         goto get_irqchip_out;
4141                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4142                 if (r)
4143                         goto get_irqchip_out;
4144                 r = -EFAULT;
4145                 if (copy_to_user(argp, chip, sizeof *chip))
4146                         goto get_irqchip_out;
4147                 r = 0;
4148         get_irqchip_out:
4149                 kfree(chip);
4150                 break;
4151         }
4152         case KVM_SET_IRQCHIP: {
4153                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4154                 struct kvm_irqchip *chip;
4155
4156                 chip = memdup_user(argp, sizeof(*chip));
4157                 if (IS_ERR(chip)) {
4158                         r = PTR_ERR(chip);
4159                         goto out;
4160                 }
4161
4162                 r = -ENXIO;
4163                 if (!irqchip_kernel(kvm))
4164                         goto set_irqchip_out;
4165                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4166                 if (r)
4167                         goto set_irqchip_out;
4168                 r = 0;
4169         set_irqchip_out:
4170                 kfree(chip);
4171                 break;
4172         }
4173         case KVM_GET_PIT: {
4174                 r = -EFAULT;
4175                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4176                         goto out;
4177                 r = -ENXIO;
4178                 if (!kvm->arch.vpit)
4179                         goto out;
4180                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4181                 if (r)
4182                         goto out;
4183                 r = -EFAULT;
4184                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4185                         goto out;
4186                 r = 0;
4187                 break;
4188         }
4189         case KVM_SET_PIT: {
4190                 r = -EFAULT;
4191                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4192                         goto out;
4193                 r = -ENXIO;
4194                 if (!kvm->arch.vpit)
4195                         goto out;
4196                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4197                 break;
4198         }
4199         case KVM_GET_PIT2: {
4200                 r = -ENXIO;
4201                 if (!kvm->arch.vpit)
4202                         goto out;
4203                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4204                 if (r)
4205                         goto out;
4206                 r = -EFAULT;
4207                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4208                         goto out;
4209                 r = 0;
4210                 break;
4211         }
4212         case KVM_SET_PIT2: {
4213                 r = -EFAULT;
4214                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4215                         goto out;
4216                 r = -ENXIO;
4217                 if (!kvm->arch.vpit)
4218                         goto out;
4219                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4220                 break;
4221         }
4222         case KVM_REINJECT_CONTROL: {
4223                 struct kvm_reinject_control control;
4224                 r =  -EFAULT;
4225                 if (copy_from_user(&control, argp, sizeof(control)))
4226                         goto out;
4227                 r = kvm_vm_ioctl_reinject(kvm, &control);
4228                 break;
4229         }
4230         case KVM_SET_BOOT_CPU_ID:
4231                 r = 0;
4232                 mutex_lock(&kvm->lock);
4233                 if (kvm->created_vcpus)
4234                         r = -EBUSY;
4235                 else
4236                         kvm->arch.bsp_vcpu_id = arg;
4237                 mutex_unlock(&kvm->lock);
4238                 break;
4239         case KVM_XEN_HVM_CONFIG: {
4240                 struct kvm_xen_hvm_config xhc;
4241                 r = -EFAULT;
4242                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4243                         goto out;
4244                 r = -EINVAL;
4245                 if (xhc.flags)
4246                         goto out;
4247                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4248                 r = 0;
4249                 break;
4250         }
4251         case KVM_SET_CLOCK: {
4252                 struct kvm_clock_data user_ns;
4253                 u64 now_ns;
4254
4255                 r = -EFAULT;
4256                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4257                         goto out;
4258
4259                 r = -EINVAL;
4260                 if (user_ns.flags)
4261                         goto out;
4262
4263                 r = 0;
4264                 /*
4265                  * TODO: userspace has to take care of races with VCPU_RUN, so
4266                  * kvm_gen_update_masterclock() can be cut down to locked
4267                  * pvclock_update_vm_gtod_copy().
4268                  */
4269                 kvm_gen_update_masterclock(kvm);
4270                 now_ns = get_kvmclock_ns(kvm);
4271                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4272                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4273                 break;
4274         }
4275         case KVM_GET_CLOCK: {
4276                 struct kvm_clock_data user_ns;
4277                 u64 now_ns;
4278
4279                 now_ns = get_kvmclock_ns(kvm);
4280                 user_ns.clock = now_ns;
4281                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4282                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4283
4284                 r = -EFAULT;
4285                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4286                         goto out;
4287                 r = 0;
4288                 break;
4289         }
4290         case KVM_ENABLE_CAP: {
4291                 struct kvm_enable_cap cap;
4292
4293                 r = -EFAULT;
4294                 if (copy_from_user(&cap, argp, sizeof(cap)))
4295                         goto out;
4296                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4297                 break;
4298         }
4299         default:
4300                 r = -ENOTTY;
4301         }
4302 out:
4303         return r;
4304 }
4305
4306 static void kvm_init_msr_list(void)
4307 {
4308         u32 dummy[2];
4309         unsigned i, j;
4310
4311         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4312                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4313                         continue;
4314
4315                 /*
4316                  * Even MSRs that are valid in the host may not be exposed
4317                  * to the guests in some cases.
4318                  */
4319                 switch (msrs_to_save[i]) {
4320                 case MSR_IA32_BNDCFGS:
4321                         if (!kvm_x86_ops->mpx_supported())
4322                                 continue;
4323                         break;
4324                 case MSR_TSC_AUX:
4325                         if (!kvm_x86_ops->rdtscp_supported())
4326                                 continue;
4327                         break;
4328                 default:
4329                         break;
4330                 }
4331
4332                 if (j < i)
4333                         msrs_to_save[j] = msrs_to_save[i];
4334                 j++;
4335         }
4336         num_msrs_to_save = j;
4337
4338         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4339                 switch (emulated_msrs[i]) {
4340                 case MSR_IA32_SMBASE:
4341                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4342                                 continue;
4343                         break;
4344                 default:
4345                         break;
4346                 }
4347
4348                 if (j < i)
4349                         emulated_msrs[j] = emulated_msrs[i];
4350                 j++;
4351         }
4352         num_emulated_msrs = j;
4353 }
4354
4355 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4356                            const void *v)
4357 {
4358         int handled = 0;
4359         int n;
4360
4361         do {
4362                 n = min(len, 8);
4363                 if (!(lapic_in_kernel(vcpu) &&
4364                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4365                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4366                         break;
4367                 handled += n;
4368                 addr += n;
4369                 len -= n;
4370                 v += n;
4371         } while (len);
4372
4373         return handled;
4374 }
4375
4376 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4377 {
4378         int handled = 0;
4379         int n;
4380
4381         do {
4382                 n = min(len, 8);
4383                 if (!(lapic_in_kernel(vcpu) &&
4384                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4385                                          addr, n, v))
4386                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4387                         break;
4388                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4389                 handled += n;
4390                 addr += n;
4391                 len -= n;
4392                 v += n;
4393         } while (len);
4394
4395         return handled;
4396 }
4397
4398 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4399                         struct kvm_segment *var, int seg)
4400 {
4401         kvm_x86_ops->set_segment(vcpu, var, seg);
4402 }
4403
4404 void kvm_get_segment(struct kvm_vcpu *vcpu,
4405                      struct kvm_segment *var, int seg)
4406 {
4407         kvm_x86_ops->get_segment(vcpu, var, seg);
4408 }
4409
4410 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4411                            struct x86_exception *exception)
4412 {
4413         gpa_t t_gpa;
4414
4415         BUG_ON(!mmu_is_nested(vcpu));
4416
4417         /* NPT walks are always user-walks */
4418         access |= PFERR_USER_MASK;
4419         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4420
4421         return t_gpa;
4422 }
4423
4424 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4425                               struct x86_exception *exception)
4426 {
4427         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4428         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4429 }
4430
4431  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4432                                 struct x86_exception *exception)
4433 {
4434         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4435         access |= PFERR_FETCH_MASK;
4436         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4437 }
4438
4439 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4440                                struct x86_exception *exception)
4441 {
4442         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4443         access |= PFERR_WRITE_MASK;
4444         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4445 }
4446
4447 /* uses this to access any guest's mapped memory without checking CPL */
4448 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4449                                 struct x86_exception *exception)
4450 {
4451         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4452 }
4453
4454 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4455                                       struct kvm_vcpu *vcpu, u32 access,
4456                                       struct x86_exception *exception)
4457 {
4458         void *data = val;
4459         int r = X86EMUL_CONTINUE;
4460
4461         while (bytes) {
4462                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4463                                                             exception);
4464                 unsigned offset = addr & (PAGE_SIZE-1);
4465                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4466                 int ret;
4467
4468                 if (gpa == UNMAPPED_GVA)
4469                         return X86EMUL_PROPAGATE_FAULT;
4470                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4471                                                offset, toread);
4472                 if (ret < 0) {
4473                         r = X86EMUL_IO_NEEDED;
4474                         goto out;
4475                 }
4476
4477                 bytes -= toread;
4478                 data += toread;
4479                 addr += toread;
4480         }
4481 out:
4482         return r;
4483 }
4484
4485 /* used for instruction fetching */
4486 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4487                                 gva_t addr, void *val, unsigned int bytes,
4488                                 struct x86_exception *exception)
4489 {
4490         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4491         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4492         unsigned offset;
4493         int ret;
4494
4495         /* Inline kvm_read_guest_virt_helper for speed.  */
4496         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4497                                                     exception);
4498         if (unlikely(gpa == UNMAPPED_GVA))
4499                 return X86EMUL_PROPAGATE_FAULT;
4500
4501         offset = addr & (PAGE_SIZE-1);
4502         if (WARN_ON(offset + bytes > PAGE_SIZE))
4503                 bytes = (unsigned)PAGE_SIZE - offset;
4504         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4505                                        offset, bytes);
4506         if (unlikely(ret < 0))
4507                 return X86EMUL_IO_NEEDED;
4508
4509         return X86EMUL_CONTINUE;
4510 }
4511
4512 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4513                                gva_t addr, void *val, unsigned int bytes,
4514                                struct x86_exception *exception)
4515 {
4516         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4517         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4518
4519         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4520                                           exception);
4521 }
4522 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4523
4524 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4525                                       gva_t addr, void *val, unsigned int bytes,
4526                                       struct x86_exception *exception)
4527 {
4528         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4529         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4530 }
4531
4532 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4533                 unsigned long addr, void *val, unsigned int bytes)
4534 {
4535         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4536         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4537
4538         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4539 }
4540
4541 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4542                                        gva_t addr, void *val,
4543                                        unsigned int bytes,
4544                                        struct x86_exception *exception)
4545 {
4546         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4547         void *data = val;
4548         int r = X86EMUL_CONTINUE;
4549
4550         while (bytes) {
4551                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4552                                                              PFERR_WRITE_MASK,
4553                                                              exception);
4554                 unsigned offset = addr & (PAGE_SIZE-1);
4555                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4556                 int ret;
4557
4558                 if (gpa == UNMAPPED_GVA)
4559                         return X86EMUL_PROPAGATE_FAULT;
4560                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4561                 if (ret < 0) {
4562                         r = X86EMUL_IO_NEEDED;
4563                         goto out;
4564                 }
4565
4566                 bytes -= towrite;
4567                 data += towrite;
4568                 addr += towrite;
4569         }
4570 out:
4571         return r;
4572 }
4573 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4574
4575 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4576                             gpa_t gpa, bool write)
4577 {
4578         /* For APIC access vmexit */
4579         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4580                 return 1;
4581
4582         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4583                 trace_vcpu_match_mmio(gva, gpa, write, true);
4584                 return 1;
4585         }
4586
4587         return 0;
4588 }
4589
4590 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4591                                 gpa_t *gpa, struct x86_exception *exception,
4592                                 bool write)
4593 {
4594         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4595                 | (write ? PFERR_WRITE_MASK : 0);
4596
4597         /*
4598          * currently PKRU is only applied to ept enabled guest so
4599          * there is no pkey in EPT page table for L1 guest or EPT
4600          * shadow page table for L2 guest.
4601          */
4602         if (vcpu_match_mmio_gva(vcpu, gva)
4603             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4604                                  vcpu->arch.access, 0, access)) {
4605                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4606                                         (gva & (PAGE_SIZE - 1));
4607                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4608                 return 1;
4609         }
4610
4611         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4612
4613         if (*gpa == UNMAPPED_GVA)
4614                 return -1;
4615
4616         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4617 }
4618
4619 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4620                         const void *val, int bytes)
4621 {
4622         int ret;
4623
4624         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4625         if (ret < 0)
4626                 return 0;
4627         kvm_page_track_write(vcpu, gpa, val, bytes);
4628         return 1;
4629 }
4630
4631 struct read_write_emulator_ops {
4632         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4633                                   int bytes);
4634         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4635                                   void *val, int bytes);
4636         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4637                                int bytes, void *val);
4638         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4639                                     void *val, int bytes);
4640         bool write;
4641 };
4642
4643 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4644 {
4645         if (vcpu->mmio_read_completed) {
4646                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4647                                vcpu->mmio_fragments[0].gpa, val);
4648                 vcpu->mmio_read_completed = 0;
4649                 return 1;
4650         }
4651
4652         return 0;
4653 }
4654
4655 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4656                         void *val, int bytes)
4657 {
4658         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4659 }
4660
4661 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4662                          void *val, int bytes)
4663 {
4664         return emulator_write_phys(vcpu, gpa, val, bytes);
4665 }
4666
4667 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4668 {
4669         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
4670         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4671 }
4672
4673 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4674                           void *val, int bytes)
4675 {
4676         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
4677         return X86EMUL_IO_NEEDED;
4678 }
4679
4680 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4681                            void *val, int bytes)
4682 {
4683         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4684
4685         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4686         return X86EMUL_CONTINUE;
4687 }
4688
4689 static const struct read_write_emulator_ops read_emultor = {
4690         .read_write_prepare = read_prepare,
4691         .read_write_emulate = read_emulate,
4692         .read_write_mmio = vcpu_mmio_read,
4693         .read_write_exit_mmio = read_exit_mmio,
4694 };
4695
4696 static const struct read_write_emulator_ops write_emultor = {
4697         .read_write_emulate = write_emulate,
4698         .read_write_mmio = write_mmio,
4699         .read_write_exit_mmio = write_exit_mmio,
4700         .write = true,
4701 };
4702
4703 static int emulator_read_write_onepage(unsigned long addr, void *val,
4704                                        unsigned int bytes,
4705                                        struct x86_exception *exception,
4706                                        struct kvm_vcpu *vcpu,
4707                                        const struct read_write_emulator_ops *ops)
4708 {
4709         gpa_t gpa;
4710         int handled, ret;
4711         bool write = ops->write;
4712         struct kvm_mmio_fragment *frag;
4713         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4714
4715         /*
4716          * If the exit was due to a NPF we may already have a GPA.
4717          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4718          * Note, this cannot be used on string operations since string
4719          * operation using rep will only have the initial GPA from the NPF
4720          * occurred.
4721          */
4722         if (vcpu->arch.gpa_available &&
4723             emulator_can_use_gpa(ctxt) &&
4724             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
4725                 gpa = vcpu->arch.gpa_val;
4726                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
4727         } else {
4728                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4729                 if (ret < 0)
4730                         return X86EMUL_PROPAGATE_FAULT;
4731         }
4732
4733         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
4734                 return X86EMUL_CONTINUE;
4735
4736         /*
4737          * Is this MMIO handled locally?
4738          */
4739         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4740         if (handled == bytes)
4741                 return X86EMUL_CONTINUE;
4742
4743         gpa += handled;
4744         bytes -= handled;
4745         val += handled;
4746
4747         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4748         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4749         frag->gpa = gpa;
4750         frag->data = val;
4751         frag->len = bytes;
4752         return X86EMUL_CONTINUE;
4753 }
4754
4755 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4756                         unsigned long addr,
4757                         void *val, unsigned int bytes,
4758                         struct x86_exception *exception,
4759                         const struct read_write_emulator_ops *ops)
4760 {
4761         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4762         gpa_t gpa;
4763         int rc;
4764
4765         if (ops->read_write_prepare &&
4766                   ops->read_write_prepare(vcpu, val, bytes))
4767                 return X86EMUL_CONTINUE;
4768
4769         vcpu->mmio_nr_fragments = 0;
4770
4771         /* Crossing a page boundary? */
4772         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4773                 int now;
4774
4775                 now = -addr & ~PAGE_MASK;
4776                 rc = emulator_read_write_onepage(addr, val, now, exception,
4777                                                  vcpu, ops);
4778
4779                 if (rc != X86EMUL_CONTINUE)
4780                         return rc;
4781                 addr += now;
4782                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4783                         addr = (u32)addr;
4784                 val += now;
4785                 bytes -= now;
4786         }
4787
4788         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4789                                          vcpu, ops);
4790         if (rc != X86EMUL_CONTINUE)
4791                 return rc;
4792
4793         if (!vcpu->mmio_nr_fragments)
4794                 return rc;
4795
4796         gpa = vcpu->mmio_fragments[0].gpa;
4797
4798         vcpu->mmio_needed = 1;
4799         vcpu->mmio_cur_fragment = 0;
4800
4801         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4802         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4803         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4804         vcpu->run->mmio.phys_addr = gpa;
4805
4806         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4807 }
4808
4809 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4810                                   unsigned long addr,
4811                                   void *val,
4812                                   unsigned int bytes,
4813                                   struct x86_exception *exception)
4814 {
4815         return emulator_read_write(ctxt, addr, val, bytes,
4816                                    exception, &read_emultor);
4817 }
4818
4819 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4820                             unsigned long addr,
4821                             const void *val,
4822                             unsigned int bytes,
4823                             struct x86_exception *exception)
4824 {
4825         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4826                                    exception, &write_emultor);
4827 }
4828
4829 #define CMPXCHG_TYPE(t, ptr, old, new) \
4830         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4831
4832 #ifdef CONFIG_X86_64
4833 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4834 #else
4835 #  define CMPXCHG64(ptr, old, new) \
4836         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4837 #endif
4838
4839 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4840                                      unsigned long addr,
4841                                      const void *old,
4842                                      const void *new,
4843                                      unsigned int bytes,
4844                                      struct x86_exception *exception)
4845 {
4846         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4847         gpa_t gpa;
4848         struct page *page;
4849         char *kaddr;
4850         bool exchanged;
4851
4852         /* guests cmpxchg8b have to be emulated atomically */
4853         if (bytes > 8 || (bytes & (bytes - 1)))
4854                 goto emul_write;
4855
4856         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4857
4858         if (gpa == UNMAPPED_GVA ||
4859             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4860                 goto emul_write;
4861
4862         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4863                 goto emul_write;
4864
4865         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4866         if (is_error_page(page))
4867                 goto emul_write;
4868
4869         kaddr = kmap_atomic(page);
4870         kaddr += offset_in_page(gpa);
4871         switch (bytes) {
4872         case 1:
4873                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4874                 break;
4875         case 2:
4876                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4877                 break;
4878         case 4:
4879                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4880                 break;
4881         case 8:
4882                 exchanged = CMPXCHG64(kaddr, old, new);
4883                 break;
4884         default:
4885                 BUG();
4886         }
4887         kunmap_atomic(kaddr);
4888         kvm_release_page_dirty(page);
4889
4890         if (!exchanged)
4891                 return X86EMUL_CMPXCHG_FAILED;
4892
4893         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4894         kvm_page_track_write(vcpu, gpa, new, bytes);
4895
4896         return X86EMUL_CONTINUE;
4897
4898 emul_write:
4899         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4900
4901         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4902 }
4903
4904 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4905 {
4906         int r = 0, i;
4907
4908         for (i = 0; i < vcpu->arch.pio.count; i++) {
4909                 if (vcpu->arch.pio.in)
4910                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4911                                             vcpu->arch.pio.size, pd);
4912                 else
4913                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4914                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
4915                                              pd);
4916                 if (r)
4917                         break;
4918                 pd += vcpu->arch.pio.size;
4919         }
4920         return r;
4921 }
4922
4923 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4924                                unsigned short port, void *val,
4925                                unsigned int count, bool in)
4926 {
4927         vcpu->arch.pio.port = port;
4928         vcpu->arch.pio.in = in;
4929         vcpu->arch.pio.count  = count;
4930         vcpu->arch.pio.size = size;
4931
4932         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4933                 vcpu->arch.pio.count = 0;
4934                 return 1;
4935         }
4936
4937         vcpu->run->exit_reason = KVM_EXIT_IO;
4938         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4939         vcpu->run->io.size = size;
4940         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4941         vcpu->run->io.count = count;
4942         vcpu->run->io.port = port;
4943
4944         return 0;
4945 }
4946
4947 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4948                                     int size, unsigned short port, void *val,
4949                                     unsigned int count)
4950 {
4951         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4952         int ret;
4953
4954         if (vcpu->arch.pio.count)
4955                 goto data_avail;
4956
4957         memset(vcpu->arch.pio_data, 0, size * count);
4958
4959         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4960         if (ret) {
4961 data_avail:
4962                 memcpy(val, vcpu->arch.pio_data, size * count);
4963                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4964                 vcpu->arch.pio.count = 0;
4965                 return 1;
4966         }
4967
4968         return 0;
4969 }
4970
4971 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4972                                      int size, unsigned short port,
4973                                      const void *val, unsigned int count)
4974 {
4975         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4976
4977         memcpy(vcpu->arch.pio_data, val, size * count);
4978         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4979         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4980 }
4981
4982 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4983 {
4984         return kvm_x86_ops->get_segment_base(vcpu, seg);
4985 }
4986
4987 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4988 {
4989         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4990 }
4991
4992 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4993 {
4994         if (!need_emulate_wbinvd(vcpu))
4995                 return X86EMUL_CONTINUE;
4996
4997         if (kvm_x86_ops->has_wbinvd_exit()) {
4998                 int cpu = get_cpu();
4999
5000                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5001                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5002                                 wbinvd_ipi, NULL, 1);
5003                 put_cpu();
5004                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5005         } else
5006                 wbinvd();
5007         return X86EMUL_CONTINUE;
5008 }
5009
5010 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5011 {
5012         kvm_emulate_wbinvd_noskip(vcpu);
5013         return kvm_skip_emulated_instruction(vcpu);
5014 }
5015 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5016
5017
5018
5019 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5020 {
5021         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5022 }
5023
5024 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5025                            unsigned long *dest)
5026 {
5027         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5028 }
5029
5030 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5031                            unsigned long value)
5032 {
5033
5034         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5035 }
5036
5037 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5038 {
5039         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5040 }
5041
5042 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5043 {
5044         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5045         unsigned long value;
5046
5047         switch (cr) {
5048         case 0:
5049                 value = kvm_read_cr0(vcpu);
5050                 break;
5051         case 2:
5052                 value = vcpu->arch.cr2;
5053                 break;
5054         case 3:
5055                 value = kvm_read_cr3(vcpu);
5056                 break;
5057         case 4:
5058                 value = kvm_read_cr4(vcpu);
5059                 break;
5060         case 8:
5061                 value = kvm_get_cr8(vcpu);
5062                 break;
5063         default:
5064                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5065                 return 0;
5066         }
5067
5068         return value;
5069 }
5070
5071 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5072 {
5073         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5074         int res = 0;
5075
5076         switch (cr) {
5077         case 0:
5078                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5079                 break;
5080         case 2:
5081                 vcpu->arch.cr2 = val;
5082                 break;
5083         case 3:
5084                 res = kvm_set_cr3(vcpu, val);
5085                 break;
5086         case 4:
5087                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5088                 break;
5089         case 8:
5090                 res = kvm_set_cr8(vcpu, val);
5091                 break;
5092         default:
5093                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5094                 res = -1;
5095         }
5096
5097         return res;
5098 }
5099
5100 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5101 {
5102         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5103 }
5104
5105 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5106 {
5107         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5108 }
5109
5110 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5111 {
5112         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5113 }
5114
5115 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5116 {
5117         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5118 }
5119
5120 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5121 {
5122         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5123 }
5124
5125 static unsigned long emulator_get_cached_segment_base(
5126         struct x86_emulate_ctxt *ctxt, int seg)
5127 {
5128         return get_segment_base(emul_to_vcpu(ctxt), seg);
5129 }
5130
5131 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5132                                  struct desc_struct *desc, u32 *base3,
5133                                  int seg)
5134 {
5135         struct kvm_segment var;
5136
5137         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5138         *selector = var.selector;
5139
5140         if (var.unusable) {
5141                 memset(desc, 0, sizeof(*desc));
5142                 if (base3)
5143                         *base3 = 0;
5144                 return false;
5145         }
5146
5147         if (var.g)
5148                 var.limit >>= 12;
5149         set_desc_limit(desc, var.limit);
5150         set_desc_base(desc, (unsigned long)var.base);
5151 #ifdef CONFIG_X86_64
5152         if (base3)
5153                 *base3 = var.base >> 32;
5154 #endif
5155         desc->type = var.type;
5156         desc->s = var.s;
5157         desc->dpl = var.dpl;
5158         desc->p = var.present;
5159         desc->avl = var.avl;
5160         desc->l = var.l;
5161         desc->d = var.db;
5162         desc->g = var.g;
5163
5164         return true;
5165 }
5166
5167 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5168                                  struct desc_struct *desc, u32 base3,
5169                                  int seg)
5170 {
5171         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5172         struct kvm_segment var;
5173
5174         var.selector = selector;
5175         var.base = get_desc_base(desc);
5176 #ifdef CONFIG_X86_64
5177         var.base |= ((u64)base3) << 32;
5178 #endif
5179         var.limit = get_desc_limit(desc);
5180         if (desc->g)
5181                 var.limit = (var.limit << 12) | 0xfff;
5182         var.type = desc->type;
5183         var.dpl = desc->dpl;
5184         var.db = desc->d;
5185         var.s = desc->s;
5186         var.l = desc->l;
5187         var.g = desc->g;
5188         var.avl = desc->avl;
5189         var.present = desc->p;
5190         var.unusable = !var.present;
5191         var.padding = 0;
5192
5193         kvm_set_segment(vcpu, &var, seg);
5194         return;
5195 }
5196
5197 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5198                             u32 msr_index, u64 *pdata)
5199 {
5200         struct msr_data msr;
5201         int r;
5202
5203         msr.index = msr_index;
5204         msr.host_initiated = false;
5205         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5206         if (r)
5207                 return r;
5208
5209         *pdata = msr.data;
5210         return 0;
5211 }
5212
5213 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5214                             u32 msr_index, u64 data)
5215 {
5216         struct msr_data msr;
5217
5218         msr.data = data;
5219         msr.index = msr_index;
5220         msr.host_initiated = false;
5221         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5222 }
5223
5224 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5225 {
5226         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5227
5228         return vcpu->arch.smbase;
5229 }
5230
5231 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5232 {
5233         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5234
5235         vcpu->arch.smbase = smbase;
5236 }
5237
5238 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5239                               u32 pmc)
5240 {
5241         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5242 }
5243
5244 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5245                              u32 pmc, u64 *pdata)
5246 {
5247         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5248 }
5249
5250 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5251 {
5252         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5253 }
5254
5255 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5256                               struct x86_instruction_info *info,
5257                               enum x86_intercept_stage stage)
5258 {
5259         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5260 }
5261
5262 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5263                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5264 {
5265         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5266 }
5267
5268 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5269 {
5270         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5271 }
5272
5273 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5274 {
5275         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5276 }
5277
5278 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5279 {
5280         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5281 }
5282
5283 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5284 {
5285         return emul_to_vcpu(ctxt)->arch.hflags;
5286 }
5287
5288 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5289 {
5290         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5291 }
5292
5293 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5294 {
5295         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5296 }
5297
5298 static const struct x86_emulate_ops emulate_ops = {
5299         .read_gpr            = emulator_read_gpr,
5300         .write_gpr           = emulator_write_gpr,
5301         .read_std            = kvm_read_guest_virt_system,
5302         .write_std           = kvm_write_guest_virt_system,
5303         .read_phys           = kvm_read_guest_phys_system,
5304         .fetch               = kvm_fetch_guest_virt,
5305         .read_emulated       = emulator_read_emulated,
5306         .write_emulated      = emulator_write_emulated,
5307         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5308         .invlpg              = emulator_invlpg,
5309         .pio_in_emulated     = emulator_pio_in_emulated,
5310         .pio_out_emulated    = emulator_pio_out_emulated,
5311         .get_segment         = emulator_get_segment,
5312         .set_segment         = emulator_set_segment,
5313         .get_cached_segment_base = emulator_get_cached_segment_base,
5314         .get_gdt             = emulator_get_gdt,
5315         .get_idt             = emulator_get_idt,
5316         .set_gdt             = emulator_set_gdt,
5317         .set_idt             = emulator_set_idt,
5318         .get_cr              = emulator_get_cr,
5319         .set_cr              = emulator_set_cr,
5320         .cpl                 = emulator_get_cpl,
5321         .get_dr              = emulator_get_dr,
5322         .set_dr              = emulator_set_dr,
5323         .get_smbase          = emulator_get_smbase,
5324         .set_smbase          = emulator_set_smbase,
5325         .set_msr             = emulator_set_msr,
5326         .get_msr             = emulator_get_msr,
5327         .check_pmc           = emulator_check_pmc,
5328         .read_pmc            = emulator_read_pmc,
5329         .halt                = emulator_halt,
5330         .wbinvd              = emulator_wbinvd,
5331         .fix_hypercall       = emulator_fix_hypercall,
5332         .intercept           = emulator_intercept,
5333         .get_cpuid           = emulator_get_cpuid,
5334         .set_nmi_mask        = emulator_set_nmi_mask,
5335         .get_hflags          = emulator_get_hflags,
5336         .set_hflags          = emulator_set_hflags,
5337         .pre_leave_smm       = emulator_pre_leave_smm,
5338 };
5339
5340 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5341 {
5342         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5343         /*
5344          * an sti; sti; sequence only disable interrupts for the first
5345          * instruction. So, if the last instruction, be it emulated or
5346          * not, left the system with the INT_STI flag enabled, it
5347          * means that the last instruction is an sti. We should not
5348          * leave the flag on in this case. The same goes for mov ss
5349          */
5350         if (int_shadow & mask)
5351                 mask = 0;
5352         if (unlikely(int_shadow || mask)) {
5353                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5354                 if (!mask)
5355                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5356         }
5357 }
5358
5359 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5360 {
5361         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5362         if (ctxt->exception.vector == PF_VECTOR)
5363                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5364
5365         if (ctxt->exception.error_code_valid)
5366                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5367                                       ctxt->exception.error_code);
5368         else
5369                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5370         return false;
5371 }
5372
5373 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5374 {
5375         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5376         int cs_db, cs_l;
5377
5378         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5379
5380         ctxt->eflags = kvm_get_rflags(vcpu);
5381         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5382
5383         ctxt->eip = kvm_rip_read(vcpu);
5384         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5385                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5386                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5387                      cs_db                              ? X86EMUL_MODE_PROT32 :
5388                                                           X86EMUL_MODE_PROT16;
5389         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5390         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5391         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5392
5393         init_decode_cache(ctxt);
5394         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5395 }
5396
5397 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5398 {
5399         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5400         int ret;
5401
5402         init_emulate_ctxt(vcpu);
5403
5404         ctxt->op_bytes = 2;
5405         ctxt->ad_bytes = 2;
5406         ctxt->_eip = ctxt->eip + inc_eip;
5407         ret = emulate_int_real(ctxt, irq);
5408
5409         if (ret != X86EMUL_CONTINUE)
5410                 return EMULATE_FAIL;
5411
5412         ctxt->eip = ctxt->_eip;
5413         kvm_rip_write(vcpu, ctxt->eip);
5414         kvm_set_rflags(vcpu, ctxt->eflags);
5415
5416         if (irq == NMI_VECTOR)
5417                 vcpu->arch.nmi_pending = 0;
5418         else
5419                 vcpu->arch.interrupt.pending = false;
5420
5421         return EMULATE_DONE;
5422 }
5423 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5424
5425 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5426 {
5427         int r = EMULATE_DONE;
5428
5429         ++vcpu->stat.insn_emulation_fail;
5430         trace_kvm_emulate_insn_failed(vcpu);
5431         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5432                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5433                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5434                 vcpu->run->internal.ndata = 0;
5435                 r = EMULATE_USER_EXIT;
5436         }
5437         kvm_queue_exception(vcpu, UD_VECTOR);
5438
5439         return r;
5440 }
5441
5442 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5443                                   bool write_fault_to_shadow_pgtable,
5444                                   int emulation_type)
5445 {
5446         gpa_t gpa = cr2;
5447         kvm_pfn_t pfn;
5448
5449         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5450                 return false;
5451
5452         if (!vcpu->arch.mmu.direct_map) {
5453                 /*
5454                  * Write permission should be allowed since only
5455                  * write access need to be emulated.
5456                  */
5457                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5458
5459                 /*
5460                  * If the mapping is invalid in guest, let cpu retry
5461                  * it to generate fault.
5462                  */
5463                 if (gpa == UNMAPPED_GVA)
5464                         return true;
5465         }
5466
5467         /*
5468          * Do not retry the unhandleable instruction if it faults on the
5469          * readonly host memory, otherwise it will goto a infinite loop:
5470          * retry instruction -> write #PF -> emulation fail -> retry
5471          * instruction -> ...
5472          */
5473         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5474
5475         /*
5476          * If the instruction failed on the error pfn, it can not be fixed,
5477          * report the error to userspace.
5478          */
5479         if (is_error_noslot_pfn(pfn))
5480                 return false;
5481
5482         kvm_release_pfn_clean(pfn);
5483
5484         /* The instructions are well-emulated on direct mmu. */
5485         if (vcpu->arch.mmu.direct_map) {
5486                 unsigned int indirect_shadow_pages;
5487
5488                 spin_lock(&vcpu->kvm->mmu_lock);
5489                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5490                 spin_unlock(&vcpu->kvm->mmu_lock);
5491
5492                 if (indirect_shadow_pages)
5493                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5494
5495                 return true;
5496         }
5497
5498         /*
5499          * if emulation was due to access to shadowed page table
5500          * and it failed try to unshadow page and re-enter the
5501          * guest to let CPU execute the instruction.
5502          */
5503         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5504
5505         /*
5506          * If the access faults on its page table, it can not
5507          * be fixed by unprotecting shadow page and it should
5508          * be reported to userspace.
5509          */
5510         return !write_fault_to_shadow_pgtable;
5511 }
5512
5513 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5514                               unsigned long cr2,  int emulation_type)
5515 {
5516         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5517         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5518
5519         last_retry_eip = vcpu->arch.last_retry_eip;
5520         last_retry_addr = vcpu->arch.last_retry_addr;
5521
5522         /*
5523          * If the emulation is caused by #PF and it is non-page_table
5524          * writing instruction, it means the VM-EXIT is caused by shadow
5525          * page protected, we can zap the shadow page and retry this
5526          * instruction directly.
5527          *
5528          * Note: if the guest uses a non-page-table modifying instruction
5529          * on the PDE that points to the instruction, then we will unmap
5530          * the instruction and go to an infinite loop. So, we cache the
5531          * last retried eip and the last fault address, if we meet the eip
5532          * and the address again, we can break out of the potential infinite
5533          * loop.
5534          */
5535         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5536
5537         if (!(emulation_type & EMULTYPE_RETRY))
5538                 return false;
5539
5540         if (x86_page_table_writing_insn(ctxt))
5541                 return false;
5542
5543         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5544                 return false;
5545
5546         vcpu->arch.last_retry_eip = ctxt->eip;
5547         vcpu->arch.last_retry_addr = cr2;
5548
5549         if (!vcpu->arch.mmu.direct_map)
5550                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5551
5552         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5553
5554         return true;
5555 }
5556
5557 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5558 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5559
5560 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5561 {
5562         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5563                 /* This is a good place to trace that we are exiting SMM.  */
5564                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5565
5566                 /* Process a latched INIT or SMI, if any.  */
5567                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5568         }
5569
5570         kvm_mmu_reset_context(vcpu);
5571 }
5572
5573 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5574 {
5575         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5576
5577         vcpu->arch.hflags = emul_flags;
5578
5579         if (changed & HF_SMM_MASK)
5580                 kvm_smm_changed(vcpu);
5581 }
5582
5583 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5584                                 unsigned long *db)
5585 {
5586         u32 dr6 = 0;
5587         int i;
5588         u32 enable, rwlen;
5589
5590         enable = dr7;
5591         rwlen = dr7 >> 16;
5592         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5593                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5594                         dr6 |= (1 << i);
5595         return dr6;
5596 }
5597
5598 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5599 {
5600         struct kvm_run *kvm_run = vcpu->run;
5601
5602         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5603                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5604                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5605                 kvm_run->debug.arch.exception = DB_VECTOR;
5606                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5607                 *r = EMULATE_USER_EXIT;
5608         } else {
5609                 /*
5610                  * "Certain debug exceptions may clear bit 0-3.  The
5611                  * remaining contents of the DR6 register are never
5612                  * cleared by the processor".
5613                  */
5614                 vcpu->arch.dr6 &= ~15;
5615                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5616                 kvm_queue_exception(vcpu, DB_VECTOR);
5617         }
5618 }
5619
5620 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5621 {
5622         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5623         int r = EMULATE_DONE;
5624
5625         kvm_x86_ops->skip_emulated_instruction(vcpu);
5626
5627         /*
5628          * rflags is the old, "raw" value of the flags.  The new value has
5629          * not been saved yet.
5630          *
5631          * This is correct even for TF set by the guest, because "the
5632          * processor will not generate this exception after the instruction
5633          * that sets the TF flag".
5634          */
5635         if (unlikely(rflags & X86_EFLAGS_TF))
5636                 kvm_vcpu_do_singlestep(vcpu, &r);
5637         return r == EMULATE_DONE;
5638 }
5639 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5640
5641 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5642 {
5643         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5644             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5645                 struct kvm_run *kvm_run = vcpu->run;
5646                 unsigned long eip = kvm_get_linear_rip(vcpu);
5647                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5648                                            vcpu->arch.guest_debug_dr7,
5649                                            vcpu->arch.eff_db);
5650
5651                 if (dr6 != 0) {
5652                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5653                         kvm_run->debug.arch.pc = eip;
5654                         kvm_run->debug.arch.exception = DB_VECTOR;
5655                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5656                         *r = EMULATE_USER_EXIT;
5657                         return true;
5658                 }
5659         }
5660
5661         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5662             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5663                 unsigned long eip = kvm_get_linear_rip(vcpu);
5664                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5665                                            vcpu->arch.dr7,
5666                                            vcpu->arch.db);
5667
5668                 if (dr6 != 0) {
5669                         vcpu->arch.dr6 &= ~15;
5670                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5671                         kvm_queue_exception(vcpu, DB_VECTOR);
5672                         *r = EMULATE_DONE;
5673                         return true;
5674                 }
5675         }
5676
5677         return false;
5678 }
5679
5680 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5681                             unsigned long cr2,
5682                             int emulation_type,
5683                             void *insn,
5684                             int insn_len)
5685 {
5686         int r;
5687         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5688         bool writeback = true;
5689         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5690
5691         /*
5692          * Clear write_fault_to_shadow_pgtable here to ensure it is
5693          * never reused.
5694          */
5695         vcpu->arch.write_fault_to_shadow_pgtable = false;
5696         kvm_clear_exception_queue(vcpu);
5697
5698         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5699                 init_emulate_ctxt(vcpu);
5700
5701                 /*
5702                  * We will reenter on the same instruction since
5703                  * we do not set complete_userspace_io.  This does not
5704                  * handle watchpoints yet, those would be handled in
5705                  * the emulate_ops.
5706                  */
5707                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5708                         return r;
5709
5710                 ctxt->interruptibility = 0;
5711                 ctxt->have_exception = false;
5712                 ctxt->exception.vector = -1;
5713                 ctxt->perm_ok = false;
5714
5715                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5716
5717                 r = x86_decode_insn(ctxt, insn, insn_len);
5718
5719                 trace_kvm_emulate_insn_start(vcpu);
5720                 ++vcpu->stat.insn_emulation;
5721                 if (r != EMULATION_OK)  {
5722                         if (emulation_type & EMULTYPE_TRAP_UD)
5723                                 return EMULATE_FAIL;
5724                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5725                                                 emulation_type))
5726                                 return EMULATE_DONE;
5727                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
5728                                 return EMULATE_DONE;
5729                         if (emulation_type & EMULTYPE_SKIP)
5730                                 return EMULATE_FAIL;
5731                         return handle_emulation_failure(vcpu);
5732                 }
5733         }
5734
5735         if (emulation_type & EMULTYPE_SKIP) {
5736                 kvm_rip_write(vcpu, ctxt->_eip);
5737                 if (ctxt->eflags & X86_EFLAGS_RF)
5738                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5739                 return EMULATE_DONE;
5740         }
5741
5742         if (retry_instruction(ctxt, cr2, emulation_type))
5743                 return EMULATE_DONE;
5744
5745         /* this is needed for vmware backdoor interface to work since it
5746            changes registers values  during IO operation */
5747         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5748                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5749                 emulator_invalidate_register_cache(ctxt);
5750         }
5751
5752 restart:
5753         /* Save the faulting GPA (cr2) in the address field */
5754         ctxt->exception.address = cr2;
5755
5756         r = x86_emulate_insn(ctxt);
5757
5758         if (r == EMULATION_INTERCEPTED)
5759                 return EMULATE_DONE;
5760
5761         if (r == EMULATION_FAILED) {
5762                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5763                                         emulation_type))
5764                         return EMULATE_DONE;
5765
5766                 return handle_emulation_failure(vcpu);
5767         }
5768
5769         if (ctxt->have_exception) {
5770                 r = EMULATE_DONE;
5771                 if (inject_emulated_exception(vcpu))
5772                         return r;
5773         } else if (vcpu->arch.pio.count) {
5774                 if (!vcpu->arch.pio.in) {
5775                         /* FIXME: return into emulator if single-stepping.  */
5776                         vcpu->arch.pio.count = 0;
5777                 } else {
5778                         writeback = false;
5779                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5780                 }
5781                 r = EMULATE_USER_EXIT;
5782         } else if (vcpu->mmio_needed) {
5783                 if (!vcpu->mmio_is_write)
5784                         writeback = false;
5785                 r = EMULATE_USER_EXIT;
5786                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5787         } else if (r == EMULATION_RESTART)
5788                 goto restart;
5789         else
5790                 r = EMULATE_DONE;
5791
5792         if (writeback) {
5793                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5794                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5795                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5796                 kvm_rip_write(vcpu, ctxt->eip);
5797                 if (r == EMULATE_DONE &&
5798                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
5799                         kvm_vcpu_do_singlestep(vcpu, &r);
5800                 if (!ctxt->have_exception ||
5801                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5802                         __kvm_set_rflags(vcpu, ctxt->eflags);
5803
5804                 /*
5805                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5806                  * do nothing, and it will be requested again as soon as
5807                  * the shadow expires.  But we still need to check here,
5808                  * because POPF has no interrupt shadow.
5809                  */
5810                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5811                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5812         } else
5813                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5814
5815         return r;
5816 }
5817 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5818
5819 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5820 {
5821         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5822         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5823                                             size, port, &val, 1);
5824         /* do not return to emulator after return from userspace */
5825         vcpu->arch.pio.count = 0;
5826         return ret;
5827 }
5828 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5829
5830 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5831 {
5832         unsigned long val;
5833
5834         /* We should only ever be called with arch.pio.count equal to 1 */
5835         BUG_ON(vcpu->arch.pio.count != 1);
5836
5837         /* For size less than 4 we merge, else we zero extend */
5838         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5839                                         : 0;
5840
5841         /*
5842          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5843          * the copy and tracing
5844          */
5845         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5846                                  vcpu->arch.pio.port, &val, 1);
5847         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5848
5849         return 1;
5850 }
5851
5852 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5853 {
5854         unsigned long val;
5855         int ret;
5856
5857         /* For size less than 4 we merge, else we zero extend */
5858         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5859
5860         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5861                                        &val, 1);
5862         if (ret) {
5863                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5864                 return ret;
5865         }
5866
5867         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5868
5869         return 0;
5870 }
5871 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5872
5873 static int kvmclock_cpu_down_prep(unsigned int cpu)
5874 {
5875         __this_cpu_write(cpu_tsc_khz, 0);
5876         return 0;
5877 }
5878
5879 static void tsc_khz_changed(void *data)
5880 {
5881         struct cpufreq_freqs *freq = data;
5882         unsigned long khz = 0;
5883
5884         if (data)
5885                 khz = freq->new;
5886         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5887                 khz = cpufreq_quick_get(raw_smp_processor_id());
5888         if (!khz)
5889                 khz = tsc_khz;
5890         __this_cpu_write(cpu_tsc_khz, khz);
5891 }
5892
5893 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5894                                      void *data)
5895 {
5896         struct cpufreq_freqs *freq = data;
5897         struct kvm *kvm;
5898         struct kvm_vcpu *vcpu;
5899         int i, send_ipi = 0;
5900
5901         /*
5902          * We allow guests to temporarily run on slowing clocks,
5903          * provided we notify them after, or to run on accelerating
5904          * clocks, provided we notify them before.  Thus time never
5905          * goes backwards.
5906          *
5907          * However, we have a problem.  We can't atomically update
5908          * the frequency of a given CPU from this function; it is
5909          * merely a notifier, which can be called from any CPU.
5910          * Changing the TSC frequency at arbitrary points in time
5911          * requires a recomputation of local variables related to
5912          * the TSC for each VCPU.  We must flag these local variables
5913          * to be updated and be sure the update takes place with the
5914          * new frequency before any guests proceed.
5915          *
5916          * Unfortunately, the combination of hotplug CPU and frequency
5917          * change creates an intractable locking scenario; the order
5918          * of when these callouts happen is undefined with respect to
5919          * CPU hotplug, and they can race with each other.  As such,
5920          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5921          * undefined; you can actually have a CPU frequency change take
5922          * place in between the computation of X and the setting of the
5923          * variable.  To protect against this problem, all updates of
5924          * the per_cpu tsc_khz variable are done in an interrupt
5925          * protected IPI, and all callers wishing to update the value
5926          * must wait for a synchronous IPI to complete (which is trivial
5927          * if the caller is on the CPU already).  This establishes the
5928          * necessary total order on variable updates.
5929          *
5930          * Note that because a guest time update may take place
5931          * anytime after the setting of the VCPU's request bit, the
5932          * correct TSC value must be set before the request.  However,
5933          * to ensure the update actually makes it to any guest which
5934          * starts running in hardware virtualization between the set
5935          * and the acquisition of the spinlock, we must also ping the
5936          * CPU after setting the request bit.
5937          *
5938          */
5939
5940         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5941                 return 0;
5942         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5943                 return 0;
5944
5945         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5946
5947         spin_lock(&kvm_lock);
5948         list_for_each_entry(kvm, &vm_list, vm_list) {
5949                 kvm_for_each_vcpu(i, vcpu, kvm) {
5950                         if (vcpu->cpu != freq->cpu)
5951                                 continue;
5952                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5953                         if (vcpu->cpu != smp_processor_id())
5954                                 send_ipi = 1;
5955                 }
5956         }
5957         spin_unlock(&kvm_lock);
5958
5959         if (freq->old < freq->new && send_ipi) {
5960                 /*
5961                  * We upscale the frequency.  Must make the guest
5962                  * doesn't see old kvmclock values while running with
5963                  * the new frequency, otherwise we risk the guest sees
5964                  * time go backwards.
5965                  *
5966                  * In case we update the frequency for another cpu
5967                  * (which might be in guest context) send an interrupt
5968                  * to kick the cpu out of guest context.  Next time
5969                  * guest context is entered kvmclock will be updated,
5970                  * so the guest will not see stale values.
5971                  */
5972                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5973         }
5974         return 0;
5975 }
5976
5977 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5978         .notifier_call  = kvmclock_cpufreq_notifier
5979 };
5980
5981 static int kvmclock_cpu_online(unsigned int cpu)
5982 {
5983         tsc_khz_changed(NULL);
5984         return 0;
5985 }
5986
5987 static void kvm_timer_init(void)
5988 {
5989         max_tsc_khz = tsc_khz;
5990
5991         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5992 #ifdef CONFIG_CPU_FREQ
5993                 struct cpufreq_policy policy;
5994                 int cpu;
5995
5996                 memset(&policy, 0, sizeof(policy));
5997                 cpu = get_cpu();
5998                 cpufreq_get_policy(&policy, cpu);
5999                 if (policy.cpuinfo.max_freq)
6000                         max_tsc_khz = policy.cpuinfo.max_freq;
6001                 put_cpu();
6002 #endif
6003                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6004                                           CPUFREQ_TRANSITION_NOTIFIER);
6005         }
6006         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6007
6008         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6009                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6010 }
6011
6012 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6013
6014 int kvm_is_in_guest(void)
6015 {
6016         return __this_cpu_read(current_vcpu) != NULL;
6017 }
6018
6019 static int kvm_is_user_mode(void)
6020 {
6021         int user_mode = 3;
6022
6023         if (__this_cpu_read(current_vcpu))
6024                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6025
6026         return user_mode != 0;
6027 }
6028
6029 static unsigned long kvm_get_guest_ip(void)
6030 {
6031         unsigned long ip = 0;
6032
6033         if (__this_cpu_read(current_vcpu))
6034                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6035
6036         return ip;
6037 }
6038
6039 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6040         .is_in_guest            = kvm_is_in_guest,
6041         .is_user_mode           = kvm_is_user_mode,
6042         .get_guest_ip           = kvm_get_guest_ip,
6043 };
6044
6045 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
6046 {
6047         __this_cpu_write(current_vcpu, vcpu);
6048 }
6049 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
6050
6051 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
6052 {
6053         __this_cpu_write(current_vcpu, NULL);
6054 }
6055 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
6056
6057 static void kvm_set_mmio_spte_mask(void)
6058 {
6059         u64 mask;
6060         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6061
6062         /*
6063          * Set the reserved bits and the present bit of an paging-structure
6064          * entry to generate page fault with PFER.RSV = 1.
6065          */
6066          /* Mask the reserved physical address bits. */
6067         mask = rsvd_bits(maxphyaddr, 51);
6068
6069         /* Set the present bit. */
6070         mask |= 1ull;
6071
6072 #ifdef CONFIG_X86_64
6073         /*
6074          * If reserved bit is not supported, clear the present bit to disable
6075          * mmio page fault.
6076          */
6077         if (maxphyaddr == 52)
6078                 mask &= ~1ull;
6079 #endif
6080
6081         kvm_mmu_set_mmio_spte_mask(mask, mask);
6082 }
6083
6084 #ifdef CONFIG_X86_64
6085 static void pvclock_gtod_update_fn(struct work_struct *work)
6086 {
6087         struct kvm *kvm;
6088
6089         struct kvm_vcpu *vcpu;
6090         int i;
6091
6092         spin_lock(&kvm_lock);
6093         list_for_each_entry(kvm, &vm_list, vm_list)
6094                 kvm_for_each_vcpu(i, vcpu, kvm)
6095                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6096         atomic_set(&kvm_guest_has_master_clock, 0);
6097         spin_unlock(&kvm_lock);
6098 }
6099
6100 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6101
6102 /*
6103  * Notification about pvclock gtod data update.
6104  */
6105 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6106                                void *priv)
6107 {
6108         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6109         struct timekeeper *tk = priv;
6110
6111         update_pvclock_gtod(tk);
6112
6113         /* disable master clock if host does not trust, or does not
6114          * use, TSC clocksource
6115          */
6116         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6117             atomic_read(&kvm_guest_has_master_clock) != 0)
6118                 queue_work(system_long_wq, &pvclock_gtod_work);
6119
6120         return 0;
6121 }
6122
6123 static struct notifier_block pvclock_gtod_notifier = {
6124         .notifier_call = pvclock_gtod_notify,
6125 };
6126 #endif
6127
6128 int kvm_arch_init(void *opaque)
6129 {
6130         int r;
6131         struct kvm_x86_ops *ops = opaque;
6132
6133         if (kvm_x86_ops) {
6134                 printk(KERN_ERR "kvm: already loaded the other module\n");
6135                 r = -EEXIST;
6136                 goto out;
6137         }
6138
6139         if (!ops->cpu_has_kvm_support()) {
6140                 printk(KERN_ERR "kvm: no hardware support\n");
6141                 r = -EOPNOTSUPP;
6142                 goto out;
6143         }
6144         if (ops->disabled_by_bios()) {
6145                 printk(KERN_ERR "kvm: disabled by bios\n");
6146                 r = -EOPNOTSUPP;
6147                 goto out;
6148         }
6149
6150         r = -ENOMEM;
6151         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6152         if (!shared_msrs) {
6153                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6154                 goto out;
6155         }
6156
6157         r = kvm_mmu_module_init();
6158         if (r)
6159                 goto out_free_percpu;
6160
6161         kvm_set_mmio_spte_mask();
6162
6163         kvm_x86_ops = ops;
6164
6165         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6166                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6167                         PT_PRESENT_MASK, 0, sme_me_mask);
6168         kvm_timer_init();
6169
6170         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6171
6172         if (boot_cpu_has(X86_FEATURE_XSAVE))
6173                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6174
6175         kvm_lapic_init();
6176 #ifdef CONFIG_X86_64
6177         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6178 #endif
6179
6180         return 0;
6181
6182 out_free_percpu:
6183         free_percpu(shared_msrs);
6184 out:
6185         return r;
6186 }
6187
6188 void kvm_arch_exit(void)
6189 {
6190         kvm_lapic_exit();
6191         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6192
6193         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6194                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6195                                             CPUFREQ_TRANSITION_NOTIFIER);
6196         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6197 #ifdef CONFIG_X86_64
6198         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6199 #endif
6200         kvm_x86_ops = NULL;
6201         kvm_mmu_module_exit();
6202         free_percpu(shared_msrs);
6203 }
6204
6205 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6206 {
6207         ++vcpu->stat.halt_exits;
6208         if (lapic_in_kernel(vcpu)) {
6209                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6210                 return 1;
6211         } else {
6212                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6213                 return 0;
6214         }
6215 }
6216 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6217
6218 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6219 {
6220         int ret = kvm_skip_emulated_instruction(vcpu);
6221         /*
6222          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6223          * KVM_EXIT_DEBUG here.
6224          */
6225         return kvm_vcpu_halt(vcpu) && ret;
6226 }
6227 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6228
6229 #ifdef CONFIG_X86_64
6230 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6231                                 unsigned long clock_type)
6232 {
6233         struct kvm_clock_pairing clock_pairing;
6234         struct timespec ts;
6235         u64 cycle;
6236         int ret;
6237
6238         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6239                 return -KVM_EOPNOTSUPP;
6240
6241         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6242                 return -KVM_EOPNOTSUPP;
6243
6244         clock_pairing.sec = ts.tv_sec;
6245         clock_pairing.nsec = ts.tv_nsec;
6246         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6247         clock_pairing.flags = 0;
6248
6249         ret = 0;
6250         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6251                             sizeof(struct kvm_clock_pairing)))
6252                 ret = -KVM_EFAULT;
6253
6254         return ret;
6255 }
6256 #endif
6257
6258 /*
6259  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6260  *
6261  * @apicid - apicid of vcpu to be kicked.
6262  */
6263 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6264 {
6265         struct kvm_lapic_irq lapic_irq;
6266
6267         lapic_irq.shorthand = 0;
6268         lapic_irq.dest_mode = 0;
6269         lapic_irq.level = 0;
6270         lapic_irq.dest_id = apicid;
6271         lapic_irq.msi_redir_hint = false;
6272
6273         lapic_irq.delivery_mode = APIC_DM_REMRD;
6274         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6275 }
6276
6277 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6278 {
6279         vcpu->arch.apicv_active = false;
6280         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6281 }
6282
6283 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6284 {
6285         unsigned long nr, a0, a1, a2, a3, ret;
6286         int op_64_bit, r;
6287
6288         r = kvm_skip_emulated_instruction(vcpu);
6289
6290         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6291                 return kvm_hv_hypercall(vcpu);
6292
6293         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6294         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6295         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6296         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6297         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6298
6299         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6300
6301         op_64_bit = is_64_bit_mode(vcpu);
6302         if (!op_64_bit) {
6303                 nr &= 0xFFFFFFFF;
6304                 a0 &= 0xFFFFFFFF;
6305                 a1 &= 0xFFFFFFFF;
6306                 a2 &= 0xFFFFFFFF;
6307                 a3 &= 0xFFFFFFFF;
6308         }
6309
6310         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6311                 ret = -KVM_EPERM;
6312                 goto out;
6313         }
6314
6315         switch (nr) {
6316         case KVM_HC_VAPIC_POLL_IRQ:
6317                 ret = 0;
6318                 break;
6319         case KVM_HC_KICK_CPU:
6320                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6321                 ret = 0;
6322                 break;
6323 #ifdef CONFIG_X86_64
6324         case KVM_HC_CLOCK_PAIRING:
6325                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6326                 break;
6327 #endif
6328         default:
6329                 ret = -KVM_ENOSYS;
6330                 break;
6331         }
6332 out:
6333         if (!op_64_bit)
6334                 ret = (u32)ret;
6335         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6336         ++vcpu->stat.hypercalls;
6337         return r;
6338 }
6339 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6340
6341 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6342 {
6343         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6344         char instruction[3];
6345         unsigned long rip = kvm_rip_read(vcpu);
6346
6347         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6348
6349         return emulator_write_emulated(ctxt, rip, instruction, 3,
6350                 &ctxt->exception);
6351 }
6352
6353 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6354 {
6355         return vcpu->run->request_interrupt_window &&
6356                 likely(!pic_in_kernel(vcpu->kvm));
6357 }
6358
6359 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6360 {
6361         struct kvm_run *kvm_run = vcpu->run;
6362
6363         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6364         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6365         kvm_run->cr8 = kvm_get_cr8(vcpu);
6366         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6367         kvm_run->ready_for_interrupt_injection =
6368                 pic_in_kernel(vcpu->kvm) ||
6369                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6370 }
6371
6372 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6373 {
6374         int max_irr, tpr;
6375
6376         if (!kvm_x86_ops->update_cr8_intercept)
6377                 return;
6378
6379         if (!lapic_in_kernel(vcpu))
6380                 return;
6381
6382         if (vcpu->arch.apicv_active)
6383                 return;
6384
6385         if (!vcpu->arch.apic->vapic_addr)
6386                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6387         else
6388                 max_irr = -1;
6389
6390         if (max_irr != -1)
6391                 max_irr >>= 4;
6392
6393         tpr = kvm_lapic_get_cr8(vcpu);
6394
6395         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6396 }
6397
6398 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6399 {
6400         int r;
6401
6402         /* try to reinject previous events if any */
6403         if (vcpu->arch.exception.injected) {
6404                 kvm_x86_ops->queue_exception(vcpu);
6405                 return 0;
6406         }
6407
6408         /*
6409          * Exceptions must be injected immediately, or the exception
6410          * frame will have the address of the NMI or interrupt handler.
6411          */
6412         if (!vcpu->arch.exception.pending) {
6413                 if (vcpu->arch.nmi_injected) {
6414                         kvm_x86_ops->set_nmi(vcpu);
6415                         return 0;
6416                 }
6417
6418                 if (vcpu->arch.interrupt.pending) {
6419                         kvm_x86_ops->set_irq(vcpu);
6420                         return 0;
6421                 }
6422         }
6423
6424         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6425                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6426                 if (r != 0)
6427                         return r;
6428         }
6429
6430         /* try to inject new event if pending */
6431         if (vcpu->arch.exception.pending) {
6432                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6433                                         vcpu->arch.exception.has_error_code,
6434                                         vcpu->arch.exception.error_code);
6435
6436                 vcpu->arch.exception.pending = false;
6437                 vcpu->arch.exception.injected = true;
6438
6439                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6440                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6441                                              X86_EFLAGS_RF);
6442
6443                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6444                     (vcpu->arch.dr7 & DR7_GD)) {
6445                         vcpu->arch.dr7 &= ~DR7_GD;
6446                         kvm_update_dr7(vcpu);
6447                 }
6448
6449                 kvm_x86_ops->queue_exception(vcpu);
6450         } else if (vcpu->arch.smi_pending && !is_smm(vcpu) && kvm_x86_ops->smi_allowed(vcpu)) {
6451                 vcpu->arch.smi_pending = false;
6452                 enter_smm(vcpu);
6453         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6454                 --vcpu->arch.nmi_pending;
6455                 vcpu->arch.nmi_injected = true;
6456                 kvm_x86_ops->set_nmi(vcpu);
6457         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6458                 /*
6459                  * Because interrupts can be injected asynchronously, we are
6460                  * calling check_nested_events again here to avoid a race condition.
6461                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6462                  * proposal and current concerns.  Perhaps we should be setting
6463                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6464                  */
6465                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6466                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6467                         if (r != 0)
6468                                 return r;
6469                 }
6470                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6471                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6472                                             false);
6473                         kvm_x86_ops->set_irq(vcpu);
6474                 }
6475         }
6476
6477         return 0;
6478 }
6479
6480 static void process_nmi(struct kvm_vcpu *vcpu)
6481 {
6482         unsigned limit = 2;
6483
6484         /*
6485          * x86 is limited to one NMI running, and one NMI pending after it.
6486          * If an NMI is already in progress, limit further NMIs to just one.
6487          * Otherwise, allow two (and we'll inject the first one immediately).
6488          */
6489         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6490                 limit = 1;
6491
6492         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6493         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6494         kvm_make_request(KVM_REQ_EVENT, vcpu);
6495 }
6496
6497 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6498 {
6499         u32 flags = 0;
6500         flags |= seg->g       << 23;
6501         flags |= seg->db      << 22;
6502         flags |= seg->l       << 21;
6503         flags |= seg->avl     << 20;
6504         flags |= seg->present << 15;
6505         flags |= seg->dpl     << 13;
6506         flags |= seg->s       << 12;
6507         flags |= seg->type    << 8;
6508         return flags;
6509 }
6510
6511 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6512 {
6513         struct kvm_segment seg;
6514         int offset;
6515
6516         kvm_get_segment(vcpu, &seg, n);
6517         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6518
6519         if (n < 3)
6520                 offset = 0x7f84 + n * 12;
6521         else
6522                 offset = 0x7f2c + (n - 3) * 12;
6523
6524         put_smstate(u32, buf, offset + 8, seg.base);
6525         put_smstate(u32, buf, offset + 4, seg.limit);
6526         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6527 }
6528
6529 #ifdef CONFIG_X86_64
6530 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6531 {
6532         struct kvm_segment seg;
6533         int offset;
6534         u16 flags;
6535
6536         kvm_get_segment(vcpu, &seg, n);
6537         offset = 0x7e00 + n * 16;
6538
6539         flags = enter_smm_get_segment_flags(&seg) >> 8;
6540         put_smstate(u16, buf, offset, seg.selector);
6541         put_smstate(u16, buf, offset + 2, flags);
6542         put_smstate(u32, buf, offset + 4, seg.limit);
6543         put_smstate(u64, buf, offset + 8, seg.base);
6544 }
6545 #endif
6546
6547 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6548 {
6549         struct desc_ptr dt;
6550         struct kvm_segment seg;
6551         unsigned long val;
6552         int i;
6553
6554         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6555         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6556         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6557         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6558
6559         for (i = 0; i < 8; i++)
6560                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6561
6562         kvm_get_dr(vcpu, 6, &val);
6563         put_smstate(u32, buf, 0x7fcc, (u32)val);
6564         kvm_get_dr(vcpu, 7, &val);
6565         put_smstate(u32, buf, 0x7fc8, (u32)val);
6566
6567         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6568         put_smstate(u32, buf, 0x7fc4, seg.selector);
6569         put_smstate(u32, buf, 0x7f64, seg.base);
6570         put_smstate(u32, buf, 0x7f60, seg.limit);
6571         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6572
6573         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6574         put_smstate(u32, buf, 0x7fc0, seg.selector);
6575         put_smstate(u32, buf, 0x7f80, seg.base);
6576         put_smstate(u32, buf, 0x7f7c, seg.limit);
6577         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6578
6579         kvm_x86_ops->get_gdt(vcpu, &dt);
6580         put_smstate(u32, buf, 0x7f74, dt.address);
6581         put_smstate(u32, buf, 0x7f70, dt.size);
6582
6583         kvm_x86_ops->get_idt(vcpu, &dt);
6584         put_smstate(u32, buf, 0x7f58, dt.address);
6585         put_smstate(u32, buf, 0x7f54, dt.size);
6586
6587         for (i = 0; i < 6; i++)
6588                 enter_smm_save_seg_32(vcpu, buf, i);
6589
6590         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6591
6592         /* revision id */
6593         put_smstate(u32, buf, 0x7efc, 0x00020000);
6594         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6595 }
6596
6597 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6598 {
6599 #ifdef CONFIG_X86_64
6600         struct desc_ptr dt;
6601         struct kvm_segment seg;
6602         unsigned long val;
6603         int i;
6604
6605         for (i = 0; i < 16; i++)
6606                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6607
6608         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6609         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6610
6611         kvm_get_dr(vcpu, 6, &val);
6612         put_smstate(u64, buf, 0x7f68, val);
6613         kvm_get_dr(vcpu, 7, &val);
6614         put_smstate(u64, buf, 0x7f60, val);
6615
6616         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6617         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6618         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6619
6620         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6621
6622         /* revision id */
6623         put_smstate(u32, buf, 0x7efc, 0x00020064);
6624
6625         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6626
6627         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6628         put_smstate(u16, buf, 0x7e90, seg.selector);
6629         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6630         put_smstate(u32, buf, 0x7e94, seg.limit);
6631         put_smstate(u64, buf, 0x7e98, seg.base);
6632
6633         kvm_x86_ops->get_idt(vcpu, &dt);
6634         put_smstate(u32, buf, 0x7e84, dt.size);
6635         put_smstate(u64, buf, 0x7e88, dt.address);
6636
6637         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6638         put_smstate(u16, buf, 0x7e70, seg.selector);
6639         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6640         put_smstate(u32, buf, 0x7e74, seg.limit);
6641         put_smstate(u64, buf, 0x7e78, seg.base);
6642
6643         kvm_x86_ops->get_gdt(vcpu, &dt);
6644         put_smstate(u32, buf, 0x7e64, dt.size);
6645         put_smstate(u64, buf, 0x7e68, dt.address);
6646
6647         for (i = 0; i < 6; i++)
6648                 enter_smm_save_seg_64(vcpu, buf, i);
6649 #else
6650         WARN_ON_ONCE(1);
6651 #endif
6652 }
6653
6654 static void enter_smm(struct kvm_vcpu *vcpu)
6655 {
6656         struct kvm_segment cs, ds;
6657         struct desc_ptr dt;
6658         char buf[512];
6659         u32 cr0;
6660
6661         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6662         memset(buf, 0, 512);
6663         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6664                 enter_smm_save_state_64(vcpu, buf);
6665         else
6666                 enter_smm_save_state_32(vcpu, buf);
6667
6668         /*
6669          * Give pre_enter_smm() a chance to make ISA-specific changes to the
6670          * vCPU state (e.g. leave guest mode) after we've saved the state into
6671          * the SMM state-save area.
6672          */
6673         kvm_x86_ops->pre_enter_smm(vcpu, buf);
6674
6675         vcpu->arch.hflags |= HF_SMM_MASK;
6676         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6677
6678         if (kvm_x86_ops->get_nmi_mask(vcpu))
6679                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6680         else
6681                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6682
6683         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6684         kvm_rip_write(vcpu, 0x8000);
6685
6686         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6687         kvm_x86_ops->set_cr0(vcpu, cr0);
6688         vcpu->arch.cr0 = cr0;
6689
6690         kvm_x86_ops->set_cr4(vcpu, 0);
6691
6692         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6693         dt.address = dt.size = 0;
6694         kvm_x86_ops->set_idt(vcpu, &dt);
6695
6696         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6697
6698         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6699         cs.base = vcpu->arch.smbase;
6700
6701         ds.selector = 0;
6702         ds.base = 0;
6703
6704         cs.limit    = ds.limit = 0xffffffff;
6705         cs.type     = ds.type = 0x3;
6706         cs.dpl      = ds.dpl = 0;
6707         cs.db       = ds.db = 0;
6708         cs.s        = ds.s = 1;
6709         cs.l        = ds.l = 0;
6710         cs.g        = ds.g = 1;
6711         cs.avl      = ds.avl = 0;
6712         cs.present  = ds.present = 1;
6713         cs.unusable = ds.unusable = 0;
6714         cs.padding  = ds.padding = 0;
6715
6716         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6717         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6718         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6719         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6720         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6721         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6722
6723         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6724                 kvm_x86_ops->set_efer(vcpu, 0);
6725
6726         kvm_update_cpuid(vcpu);
6727         kvm_mmu_reset_context(vcpu);
6728 }
6729
6730 static void process_smi(struct kvm_vcpu *vcpu)
6731 {
6732         vcpu->arch.smi_pending = true;
6733         kvm_make_request(KVM_REQ_EVENT, vcpu);
6734 }
6735
6736 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6737 {
6738         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6739 }
6740
6741 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6742 {
6743         u64 eoi_exit_bitmap[4];
6744
6745         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6746                 return;
6747
6748         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6749
6750         if (irqchip_split(vcpu->kvm))
6751                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6752         else {
6753                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6754                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6755                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6756         }
6757         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6758                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6759         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6760 }
6761
6762 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6763 {
6764         ++vcpu->stat.tlb_flush;
6765         kvm_x86_ops->tlb_flush(vcpu);
6766 }
6767
6768 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
6769                 unsigned long start, unsigned long end)
6770 {
6771         unsigned long apic_address;
6772
6773         /*
6774          * The physical address of apic access page is stored in the VMCS.
6775          * Update it when it becomes invalid.
6776          */
6777         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6778         if (start <= apic_address && apic_address < end)
6779                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6780 }
6781
6782 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6783 {
6784         struct page *page = NULL;
6785
6786         if (!lapic_in_kernel(vcpu))
6787                 return;
6788
6789         if (!kvm_x86_ops->set_apic_access_page_addr)
6790                 return;
6791
6792         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6793         if (is_error_page(page))
6794                 return;
6795         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6796
6797         /*
6798          * Do not pin apic access page in memory, the MMU notifier
6799          * will call us again if it is migrated or swapped out.
6800          */
6801         put_page(page);
6802 }
6803 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6804
6805 /*
6806  * Returns 1 to let vcpu_run() continue the guest execution loop without
6807  * exiting to the userspace.  Otherwise, the value will be returned to the
6808  * userspace.
6809  */
6810 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6811 {
6812         int r;
6813         bool req_int_win =
6814                 dm_request_for_irq_injection(vcpu) &&
6815                 kvm_cpu_accept_dm_intr(vcpu);
6816
6817         bool req_immediate_exit = false;
6818
6819         if (kvm_request_pending(vcpu)) {
6820                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6821                         kvm_mmu_unload(vcpu);
6822                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6823                         __kvm_migrate_timers(vcpu);
6824                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6825                         kvm_gen_update_masterclock(vcpu->kvm);
6826                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6827                         kvm_gen_kvmclock_update(vcpu);
6828                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6829                         r = kvm_guest_time_update(vcpu);
6830                         if (unlikely(r))
6831                                 goto out;
6832                 }
6833                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6834                         kvm_mmu_sync_roots(vcpu);
6835                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6836                         kvm_vcpu_flush_tlb(vcpu);
6837                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6838                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6839                         r = 0;
6840                         goto out;
6841                 }
6842                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6843                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6844                         vcpu->mmio_needed = 0;
6845                         r = 0;
6846                         goto out;
6847                 }
6848                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6849                         /* Page is swapped out. Do synthetic halt */
6850                         vcpu->arch.apf.halted = true;
6851                         r = 1;
6852                         goto out;
6853                 }
6854                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6855                         record_steal_time(vcpu);
6856                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6857                         process_smi(vcpu);
6858                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6859                         process_nmi(vcpu);
6860                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6861                         kvm_pmu_handle_event(vcpu);
6862                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6863                         kvm_pmu_deliver_pmi(vcpu);
6864                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6865                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6866                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6867                                      vcpu->arch.ioapic_handled_vectors)) {
6868                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6869                                 vcpu->run->eoi.vector =
6870                                                 vcpu->arch.pending_ioapic_eoi;
6871                                 r = 0;
6872                                 goto out;
6873                         }
6874                 }
6875                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6876                         vcpu_scan_ioapic(vcpu);
6877                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6878                         kvm_vcpu_reload_apic_access_page(vcpu);
6879                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6880                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6881                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6882                         r = 0;
6883                         goto out;
6884                 }
6885                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6886                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6887                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6888                         r = 0;
6889                         goto out;
6890                 }
6891                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6892                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6893                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6894                         r = 0;
6895                         goto out;
6896                 }
6897
6898                 /*
6899                  * KVM_REQ_HV_STIMER has to be processed after
6900                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6901                  * depend on the guest clock being up-to-date
6902                  */
6903                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6904                         kvm_hv_process_stimers(vcpu);
6905         }
6906
6907         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6908                 ++vcpu->stat.req_event;
6909                 kvm_apic_accept_events(vcpu);
6910                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6911                         r = 1;
6912                         goto out;
6913                 }
6914
6915                 if (inject_pending_event(vcpu, req_int_win) != 0)
6916                         req_immediate_exit = true;
6917                 else {
6918                         /* Enable SMI/NMI/IRQ window open exits if needed.
6919                          *
6920                          * SMIs have three cases:
6921                          * 1) They can be nested, and then there is nothing to
6922                          *    do here because RSM will cause a vmexit anyway.
6923                          * 2) There is an ISA-specific reason why SMI cannot be
6924                          *    injected, and the moment when this changes can be
6925                          *    intercepted.
6926                          * 3) Or the SMI can be pending because
6927                          *    inject_pending_event has completed the injection
6928                          *    of an IRQ or NMI from the previous vmexit, and
6929                          *    then we request an immediate exit to inject the
6930                          *    SMI.
6931                          */
6932                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6933                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
6934                                         req_immediate_exit = true;
6935                         if (vcpu->arch.nmi_pending)
6936                                 kvm_x86_ops->enable_nmi_window(vcpu);
6937                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6938                                 kvm_x86_ops->enable_irq_window(vcpu);
6939                         WARN_ON(vcpu->arch.exception.pending);
6940                 }
6941
6942                 if (kvm_lapic_enabled(vcpu)) {
6943                         update_cr8_intercept(vcpu);
6944                         kvm_lapic_sync_to_vapic(vcpu);
6945                 }
6946         }
6947
6948         r = kvm_mmu_reload(vcpu);
6949         if (unlikely(r)) {
6950                 goto cancel_injection;
6951         }
6952
6953         preempt_disable();
6954
6955         kvm_x86_ops->prepare_guest_switch(vcpu);
6956
6957         /*
6958          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
6959          * IPI are then delayed after guest entry, which ensures that they
6960          * result in virtual interrupt delivery.
6961          */
6962         local_irq_disable();
6963         vcpu->mode = IN_GUEST_MODE;
6964
6965         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6966
6967         /*
6968          * 1) We should set ->mode before checking ->requests.  Please see
6969          * the comment in kvm_vcpu_exiting_guest_mode().
6970          *
6971          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
6972          * pairs with the memory barrier implicit in pi_test_and_set_on
6973          * (see vmx_deliver_posted_interrupt).
6974          *
6975          * 3) This also orders the write to mode from any reads to the page
6976          * tables done while the VCPU is running.  Please see the comment
6977          * in kvm_flush_remote_tlbs.
6978          */
6979         smp_mb__after_srcu_read_unlock();
6980
6981         /*
6982          * This handles the case where a posted interrupt was
6983          * notified with kvm_vcpu_kick.
6984          */
6985         if (kvm_lapic_enabled(vcpu)) {
6986                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6987                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6988         }
6989
6990         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
6991             || need_resched() || signal_pending(current)) {
6992                 vcpu->mode = OUTSIDE_GUEST_MODE;
6993                 smp_wmb();
6994                 local_irq_enable();
6995                 preempt_enable();
6996                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6997                 r = 1;
6998                 goto cancel_injection;
6999         }
7000
7001         kvm_load_guest_xcr0(vcpu);
7002
7003         if (req_immediate_exit) {
7004                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7005                 smp_send_reschedule(vcpu->cpu);
7006         }
7007
7008         trace_kvm_entry(vcpu->vcpu_id);
7009         wait_lapic_expire(vcpu);
7010         guest_enter_irqoff();
7011
7012         if (unlikely(vcpu->arch.switch_db_regs)) {
7013                 set_debugreg(0, 7);
7014                 set_debugreg(vcpu->arch.eff_db[0], 0);
7015                 set_debugreg(vcpu->arch.eff_db[1], 1);
7016                 set_debugreg(vcpu->arch.eff_db[2], 2);
7017                 set_debugreg(vcpu->arch.eff_db[3], 3);
7018                 set_debugreg(vcpu->arch.dr6, 6);
7019                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7020         }
7021
7022         kvm_x86_ops->run(vcpu);
7023
7024         /*
7025          * Do this here before restoring debug registers on the host.  And
7026          * since we do this before handling the vmexit, a DR access vmexit
7027          * can (a) read the correct value of the debug registers, (b) set
7028          * KVM_DEBUGREG_WONT_EXIT again.
7029          */
7030         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7031                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7032                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7033                 kvm_update_dr0123(vcpu);
7034                 kvm_update_dr6(vcpu);
7035                 kvm_update_dr7(vcpu);
7036                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7037         }
7038
7039         /*
7040          * If the guest has used debug registers, at least dr7
7041          * will be disabled while returning to the host.
7042          * If we don't have active breakpoints in the host, we don't
7043          * care about the messed up debug address registers. But if
7044          * we have some of them active, restore the old state.
7045          */
7046         if (hw_breakpoint_active())
7047                 hw_breakpoint_restore();
7048
7049         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7050
7051         vcpu->mode = OUTSIDE_GUEST_MODE;
7052         smp_wmb();
7053
7054         kvm_put_guest_xcr0(vcpu);
7055
7056         kvm_x86_ops->handle_external_intr(vcpu);
7057
7058         ++vcpu->stat.exits;
7059
7060         guest_exit_irqoff();
7061
7062         local_irq_enable();
7063         preempt_enable();
7064
7065         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7066
7067         /*
7068          * Profile KVM exit RIPs:
7069          */
7070         if (unlikely(prof_on == KVM_PROFILING)) {
7071                 unsigned long rip = kvm_rip_read(vcpu);
7072                 profile_hit(KVM_PROFILING, (void *)rip);
7073         }
7074
7075         if (unlikely(vcpu->arch.tsc_always_catchup))
7076                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7077
7078         if (vcpu->arch.apic_attention)
7079                 kvm_lapic_sync_from_vapic(vcpu);
7080
7081         vcpu->arch.gpa_available = false;
7082         r = kvm_x86_ops->handle_exit(vcpu);
7083         return r;
7084
7085 cancel_injection:
7086         kvm_x86_ops->cancel_injection(vcpu);
7087         if (unlikely(vcpu->arch.apic_attention))
7088                 kvm_lapic_sync_from_vapic(vcpu);
7089 out:
7090         return r;
7091 }
7092
7093 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7094 {
7095         if (!kvm_arch_vcpu_runnable(vcpu) &&
7096             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7097                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7098                 kvm_vcpu_block(vcpu);
7099                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7100
7101                 if (kvm_x86_ops->post_block)
7102                         kvm_x86_ops->post_block(vcpu);
7103
7104                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7105                         return 1;
7106         }
7107
7108         kvm_apic_accept_events(vcpu);
7109         switch(vcpu->arch.mp_state) {
7110         case KVM_MP_STATE_HALTED:
7111                 vcpu->arch.pv.pv_unhalted = false;
7112                 vcpu->arch.mp_state =
7113                         KVM_MP_STATE_RUNNABLE;
7114         case KVM_MP_STATE_RUNNABLE:
7115                 vcpu->arch.apf.halted = false;
7116                 break;
7117         case KVM_MP_STATE_INIT_RECEIVED:
7118                 break;
7119         default:
7120                 return -EINTR;
7121                 break;
7122         }
7123         return 1;
7124 }
7125
7126 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7127 {
7128         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7129                 kvm_x86_ops->check_nested_events(vcpu, false);
7130
7131         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7132                 !vcpu->arch.apf.halted);
7133 }
7134
7135 static int vcpu_run(struct kvm_vcpu *vcpu)
7136 {
7137         int r;
7138         struct kvm *kvm = vcpu->kvm;
7139
7140         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7141
7142         for (;;) {
7143                 if (kvm_vcpu_running(vcpu)) {
7144                         r = vcpu_enter_guest(vcpu);
7145                 } else {
7146                         r = vcpu_block(kvm, vcpu);
7147                 }
7148
7149                 if (r <= 0)
7150                         break;
7151
7152                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7153                 if (kvm_cpu_has_pending_timer(vcpu))
7154                         kvm_inject_pending_timer_irqs(vcpu);
7155
7156                 if (dm_request_for_irq_injection(vcpu) &&
7157                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7158                         r = 0;
7159                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7160                         ++vcpu->stat.request_irq_exits;
7161                         break;
7162                 }
7163
7164                 kvm_check_async_pf_completion(vcpu);
7165
7166                 if (signal_pending(current)) {
7167                         r = -EINTR;
7168                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7169                         ++vcpu->stat.signal_exits;
7170                         break;
7171                 }
7172                 if (need_resched()) {
7173                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7174                         cond_resched();
7175                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7176                 }
7177         }
7178
7179         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7180
7181         return r;
7182 }
7183
7184 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7185 {
7186         int r;
7187         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7188         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7189         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7190         if (r != EMULATE_DONE)
7191                 return 0;
7192         return 1;
7193 }
7194
7195 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7196 {
7197         BUG_ON(!vcpu->arch.pio.count);
7198
7199         return complete_emulated_io(vcpu);
7200 }
7201
7202 /*
7203  * Implements the following, as a state machine:
7204  *
7205  * read:
7206  *   for each fragment
7207  *     for each mmio piece in the fragment
7208  *       write gpa, len
7209  *       exit
7210  *       copy data
7211  *   execute insn
7212  *
7213  * write:
7214  *   for each fragment
7215  *     for each mmio piece in the fragment
7216  *       write gpa, len
7217  *       copy data
7218  *       exit
7219  */
7220 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7221 {
7222         struct kvm_run *run = vcpu->run;
7223         struct kvm_mmio_fragment *frag;
7224         unsigned len;
7225
7226         BUG_ON(!vcpu->mmio_needed);
7227
7228         /* Complete previous fragment */
7229         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7230         len = min(8u, frag->len);
7231         if (!vcpu->mmio_is_write)
7232                 memcpy(frag->data, run->mmio.data, len);
7233
7234         if (frag->len <= 8) {
7235                 /* Switch to the next fragment. */
7236                 frag++;
7237                 vcpu->mmio_cur_fragment++;
7238         } else {
7239                 /* Go forward to the next mmio piece. */
7240                 frag->data += len;
7241                 frag->gpa += len;
7242                 frag->len -= len;
7243         }
7244
7245         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7246                 vcpu->mmio_needed = 0;
7247
7248                 /* FIXME: return into emulator if single-stepping.  */
7249                 if (vcpu->mmio_is_write)
7250                         return 1;
7251                 vcpu->mmio_read_completed = 1;
7252                 return complete_emulated_io(vcpu);
7253         }
7254
7255         run->exit_reason = KVM_EXIT_MMIO;
7256         run->mmio.phys_addr = frag->gpa;
7257         if (vcpu->mmio_is_write)
7258                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7259         run->mmio.len = min(8u, frag->len);
7260         run->mmio.is_write = vcpu->mmio_is_write;
7261         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7262         return 0;
7263 }
7264
7265
7266 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7267 {
7268         int r;
7269
7270         kvm_sigset_activate(vcpu);
7271
7272         kvm_load_guest_fpu(vcpu);
7273
7274         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7275                 if (kvm_run->immediate_exit) {
7276                         r = -EINTR;
7277                         goto out;
7278                 }
7279                 kvm_vcpu_block(vcpu);
7280                 kvm_apic_accept_events(vcpu);
7281                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7282                 r = -EAGAIN;
7283                 if (signal_pending(current)) {
7284                         r = -EINTR;
7285                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7286                         ++vcpu->stat.signal_exits;
7287                 }
7288                 goto out;
7289         }
7290
7291         /* re-sync apic's tpr */
7292         if (!lapic_in_kernel(vcpu)) {
7293                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7294                         r = -EINVAL;
7295                         goto out;
7296                 }
7297         }
7298
7299         if (unlikely(vcpu->arch.complete_userspace_io)) {
7300                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7301                 vcpu->arch.complete_userspace_io = NULL;
7302                 r = cui(vcpu);
7303                 if (r <= 0)
7304                         goto out;
7305         } else
7306                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7307
7308         if (kvm_run->immediate_exit)
7309                 r = -EINTR;
7310         else
7311                 r = vcpu_run(vcpu);
7312
7313 out:
7314         kvm_put_guest_fpu(vcpu);
7315         post_kvm_run_save(vcpu);
7316         kvm_sigset_deactivate(vcpu);
7317
7318         return r;
7319 }
7320
7321 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7322 {
7323         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7324                 /*
7325                  * We are here if userspace calls get_regs() in the middle of
7326                  * instruction emulation. Registers state needs to be copied
7327                  * back from emulation context to vcpu. Userspace shouldn't do
7328                  * that usually, but some bad designed PV devices (vmware
7329                  * backdoor interface) need this to work
7330                  */
7331                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7332                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7333         }
7334         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7335         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7336         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7337         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7338         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7339         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7340         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7341         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7342 #ifdef CONFIG_X86_64
7343         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7344         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7345         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7346         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7347         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7348         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7349         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7350         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7351 #endif
7352
7353         regs->rip = kvm_rip_read(vcpu);
7354         regs->rflags = kvm_get_rflags(vcpu);
7355
7356         return 0;
7357 }
7358
7359 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7360 {
7361         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7362         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7363
7364         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7365         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7366         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7367         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7368         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7369         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7370         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7371         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7372 #ifdef CONFIG_X86_64
7373         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7374         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7375         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7376         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7377         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7378         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7379         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7380         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7381 #endif
7382
7383         kvm_rip_write(vcpu, regs->rip);
7384         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7385
7386         vcpu->arch.exception.pending = false;
7387
7388         kvm_make_request(KVM_REQ_EVENT, vcpu);
7389
7390         return 0;
7391 }
7392
7393 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7394 {
7395         struct kvm_segment cs;
7396
7397         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7398         *db = cs.db;
7399         *l = cs.l;
7400 }
7401 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7402
7403 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7404                                   struct kvm_sregs *sregs)
7405 {
7406         struct desc_ptr dt;
7407
7408         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7409         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7410         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7411         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7412         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7413         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7414
7415         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7416         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7417
7418         kvm_x86_ops->get_idt(vcpu, &dt);
7419         sregs->idt.limit = dt.size;
7420         sregs->idt.base = dt.address;
7421         kvm_x86_ops->get_gdt(vcpu, &dt);
7422         sregs->gdt.limit = dt.size;
7423         sregs->gdt.base = dt.address;
7424
7425         sregs->cr0 = kvm_read_cr0(vcpu);
7426         sregs->cr2 = vcpu->arch.cr2;
7427         sregs->cr3 = kvm_read_cr3(vcpu);
7428         sregs->cr4 = kvm_read_cr4(vcpu);
7429         sregs->cr8 = kvm_get_cr8(vcpu);
7430         sregs->efer = vcpu->arch.efer;
7431         sregs->apic_base = kvm_get_apic_base(vcpu);
7432
7433         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7434
7435         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7436                 set_bit(vcpu->arch.interrupt.nr,
7437                         (unsigned long *)sregs->interrupt_bitmap);
7438
7439         return 0;
7440 }
7441
7442 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7443                                     struct kvm_mp_state *mp_state)
7444 {
7445         kvm_apic_accept_events(vcpu);
7446         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7447                                         vcpu->arch.pv.pv_unhalted)
7448                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7449         else
7450                 mp_state->mp_state = vcpu->arch.mp_state;
7451
7452         return 0;
7453 }
7454
7455 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7456                                     struct kvm_mp_state *mp_state)
7457 {
7458         if (!lapic_in_kernel(vcpu) &&
7459             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7460                 return -EINVAL;
7461
7462         /* INITs are latched while in SMM */
7463         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7464             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7465              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7466                 return -EINVAL;
7467
7468         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7469                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7470                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7471         } else
7472                 vcpu->arch.mp_state = mp_state->mp_state;
7473         kvm_make_request(KVM_REQ_EVENT, vcpu);
7474         return 0;
7475 }
7476
7477 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7478                     int reason, bool has_error_code, u32 error_code)
7479 {
7480         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7481         int ret;
7482
7483         init_emulate_ctxt(vcpu);
7484
7485         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7486                                    has_error_code, error_code);
7487
7488         if (ret)
7489                 return EMULATE_FAIL;
7490
7491         kvm_rip_write(vcpu, ctxt->eip);
7492         kvm_set_rflags(vcpu, ctxt->eflags);
7493         kvm_make_request(KVM_REQ_EVENT, vcpu);
7494         return EMULATE_DONE;
7495 }
7496 EXPORT_SYMBOL_GPL(kvm_task_switch);
7497
7498 int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7499 {
7500         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
7501                 /*
7502                  * When EFER.LME and CR0.PG are set, the processor is in
7503                  * 64-bit mode (though maybe in a 32-bit code segment).
7504                  * CR4.PAE and EFER.LMA must be set.
7505                  */
7506                 if (!(sregs->cr4 & X86_CR4_PAE)
7507                     || !(sregs->efer & EFER_LMA))
7508                         return -EINVAL;
7509         } else {
7510                 /*
7511                  * Not in 64-bit mode: EFER.LMA is clear and the code
7512                  * segment cannot be 64-bit.
7513                  */
7514                 if (sregs->efer & EFER_LMA || sregs->cs.l)
7515                         return -EINVAL;
7516         }
7517
7518         return 0;
7519 }
7520
7521 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7522                                   struct kvm_sregs *sregs)
7523 {
7524         struct msr_data apic_base_msr;
7525         int mmu_reset_needed = 0;
7526         int pending_vec, max_bits, idx;
7527         struct desc_ptr dt;
7528
7529         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7530                         (sregs->cr4 & X86_CR4_OSXSAVE))
7531                 return -EINVAL;
7532
7533         if (kvm_valid_sregs(vcpu, sregs))
7534                 return -EINVAL;
7535
7536         apic_base_msr.data = sregs->apic_base;
7537         apic_base_msr.host_initiated = true;
7538         if (kvm_set_apic_base(vcpu, &apic_base_msr))
7539                 return -EINVAL;
7540
7541         dt.size = sregs->idt.limit;
7542         dt.address = sregs->idt.base;
7543         kvm_x86_ops->set_idt(vcpu, &dt);
7544         dt.size = sregs->gdt.limit;
7545         dt.address = sregs->gdt.base;
7546         kvm_x86_ops->set_gdt(vcpu, &dt);
7547
7548         vcpu->arch.cr2 = sregs->cr2;
7549         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7550         vcpu->arch.cr3 = sregs->cr3;
7551         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7552
7553         kvm_set_cr8(vcpu, sregs->cr8);
7554
7555         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7556         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7557
7558         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7559         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7560         vcpu->arch.cr0 = sregs->cr0;
7561
7562         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7563         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7564         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7565                 kvm_update_cpuid(vcpu);
7566
7567         idx = srcu_read_lock(&vcpu->kvm->srcu);
7568         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7569                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7570                 mmu_reset_needed = 1;
7571         }
7572         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7573
7574         if (mmu_reset_needed)
7575                 kvm_mmu_reset_context(vcpu);
7576
7577         max_bits = KVM_NR_INTERRUPTS;
7578         pending_vec = find_first_bit(
7579                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7580         if (pending_vec < max_bits) {
7581                 kvm_queue_interrupt(vcpu, pending_vec, false);
7582                 pr_debug("Set back pending irq %d\n", pending_vec);
7583         }
7584
7585         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7586         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7587         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7588         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7589         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7590         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7591
7592         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7593         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7594
7595         update_cr8_intercept(vcpu);
7596
7597         /* Older userspace won't unhalt the vcpu on reset. */
7598         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7599             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7600             !is_protmode(vcpu))
7601                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7602
7603         kvm_make_request(KVM_REQ_EVENT, vcpu);
7604
7605         return 0;
7606 }
7607
7608 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7609                                         struct kvm_guest_debug *dbg)
7610 {
7611         unsigned long rflags;
7612         int i, r;
7613
7614         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7615                 r = -EBUSY;
7616                 if (vcpu->arch.exception.pending)
7617                         goto out;
7618                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7619                         kvm_queue_exception(vcpu, DB_VECTOR);
7620                 else
7621                         kvm_queue_exception(vcpu, BP_VECTOR);
7622         }
7623
7624         /*
7625          * Read rflags as long as potentially injected trace flags are still
7626          * filtered out.
7627          */
7628         rflags = kvm_get_rflags(vcpu);
7629
7630         vcpu->guest_debug = dbg->control;
7631         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7632                 vcpu->guest_debug = 0;
7633
7634         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7635                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7636                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7637                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7638         } else {
7639                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7640                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7641         }
7642         kvm_update_dr7(vcpu);
7643
7644         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7645                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7646                         get_segment_base(vcpu, VCPU_SREG_CS);
7647
7648         /*
7649          * Trigger an rflags update that will inject or remove the trace
7650          * flags.
7651          */
7652         kvm_set_rflags(vcpu, rflags);
7653
7654         kvm_x86_ops->update_bp_intercept(vcpu);
7655
7656         r = 0;
7657
7658 out:
7659
7660         return r;
7661 }
7662
7663 /*
7664  * Translate a guest virtual address to a guest physical address.
7665  */
7666 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7667                                     struct kvm_translation *tr)
7668 {
7669         unsigned long vaddr = tr->linear_address;
7670         gpa_t gpa;
7671         int idx;
7672
7673         idx = srcu_read_lock(&vcpu->kvm->srcu);
7674         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7675         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7676         tr->physical_address = gpa;
7677         tr->valid = gpa != UNMAPPED_GVA;
7678         tr->writeable = 1;
7679         tr->usermode = 0;
7680
7681         return 0;
7682 }
7683
7684 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7685 {
7686         struct fxregs_state *fxsave =
7687                         &vcpu->arch.guest_fpu.state.fxsave;
7688
7689         memcpy(fpu->fpr, fxsave->st_space, 128);
7690         fpu->fcw = fxsave->cwd;
7691         fpu->fsw = fxsave->swd;
7692         fpu->ftwx = fxsave->twd;
7693         fpu->last_opcode = fxsave->fop;
7694         fpu->last_ip = fxsave->rip;
7695         fpu->last_dp = fxsave->rdp;
7696         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7697
7698         return 0;
7699 }
7700
7701 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7702 {
7703         struct fxregs_state *fxsave =
7704                         &vcpu->arch.guest_fpu.state.fxsave;
7705
7706         memcpy(fxsave->st_space, fpu->fpr, 128);
7707         fxsave->cwd = fpu->fcw;
7708         fxsave->swd = fpu->fsw;
7709         fxsave->twd = fpu->ftwx;
7710         fxsave->fop = fpu->last_opcode;
7711         fxsave->rip = fpu->last_ip;
7712         fxsave->rdp = fpu->last_dp;
7713         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7714
7715         return 0;
7716 }
7717
7718 static void fx_init(struct kvm_vcpu *vcpu)
7719 {
7720         fpstate_init(&vcpu->arch.guest_fpu.state);
7721         if (boot_cpu_has(X86_FEATURE_XSAVES))
7722                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7723                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7724
7725         /*
7726          * Ensure guest xcr0 is valid for loading
7727          */
7728         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7729
7730         vcpu->arch.cr0 |= X86_CR0_ET;
7731 }
7732
7733 /* Swap (qemu) user FPU context for the guest FPU context. */
7734 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7735 {
7736         preempt_disable();
7737         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
7738         /* PKRU is separately restored in kvm_x86_ops->run.  */
7739         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
7740                                 ~XFEATURE_MASK_PKRU);
7741         preempt_enable();
7742         trace_kvm_fpu(1);
7743 }
7744
7745 /* When vcpu_run ends, restore user space FPU context. */
7746 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7747 {
7748         preempt_disable();
7749         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7750         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
7751         preempt_enable();
7752         ++vcpu->stat.fpu_reload;
7753         trace_kvm_fpu(0);
7754 }
7755
7756 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7757 {
7758         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7759
7760         kvmclock_reset(vcpu);
7761
7762         kvm_x86_ops->vcpu_free(vcpu);
7763         free_cpumask_var(wbinvd_dirty_mask);
7764 }
7765
7766 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7767                                                 unsigned int id)
7768 {
7769         struct kvm_vcpu *vcpu;
7770
7771         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7772                 printk_once(KERN_WARNING
7773                 "kvm: SMP vm created on host with unstable TSC; "
7774                 "guest TSC will not be reliable\n");
7775
7776         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7777
7778         return vcpu;
7779 }
7780
7781 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7782 {
7783         int r;
7784
7785         kvm_vcpu_mtrr_init(vcpu);
7786         r = vcpu_load(vcpu);
7787         if (r)
7788                 return r;
7789         kvm_vcpu_reset(vcpu, false);
7790         kvm_mmu_setup(vcpu);
7791         vcpu_put(vcpu);
7792         return r;
7793 }
7794
7795 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7796 {
7797         struct msr_data msr;
7798         struct kvm *kvm = vcpu->kvm;
7799
7800         kvm_hv_vcpu_postcreate(vcpu);
7801
7802         if (vcpu_load(vcpu))
7803                 return;
7804         msr.data = 0x0;
7805         msr.index = MSR_IA32_TSC;
7806         msr.host_initiated = true;
7807         kvm_write_tsc(vcpu, &msr);
7808         vcpu_put(vcpu);
7809
7810         if (!kvmclock_periodic_sync)
7811                 return;
7812
7813         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7814                                         KVMCLOCK_SYNC_PERIOD);
7815 }
7816
7817 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7818 {
7819         int r;
7820         vcpu->arch.apf.msr_val = 0;
7821
7822         r = vcpu_load(vcpu);
7823         BUG_ON(r);
7824         kvm_mmu_unload(vcpu);
7825         vcpu_put(vcpu);
7826
7827         kvm_x86_ops->vcpu_free(vcpu);
7828 }
7829
7830 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7831 {
7832         vcpu->arch.hflags = 0;
7833
7834         vcpu->arch.smi_pending = 0;
7835         atomic_set(&vcpu->arch.nmi_queued, 0);
7836         vcpu->arch.nmi_pending = 0;
7837         vcpu->arch.nmi_injected = false;
7838         kvm_clear_interrupt_queue(vcpu);
7839         kvm_clear_exception_queue(vcpu);
7840         vcpu->arch.exception.pending = false;
7841
7842         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7843         kvm_update_dr0123(vcpu);
7844         vcpu->arch.dr6 = DR6_INIT;
7845         kvm_update_dr6(vcpu);
7846         vcpu->arch.dr7 = DR7_FIXED_1;
7847         kvm_update_dr7(vcpu);
7848
7849         vcpu->arch.cr2 = 0;
7850
7851         kvm_make_request(KVM_REQ_EVENT, vcpu);
7852         vcpu->arch.apf.msr_val = 0;
7853         vcpu->arch.st.msr_val = 0;
7854
7855         kvmclock_reset(vcpu);
7856
7857         kvm_clear_async_pf_completion_queue(vcpu);
7858         kvm_async_pf_hash_reset(vcpu);
7859         vcpu->arch.apf.halted = false;
7860
7861         if (kvm_mpx_supported()) {
7862                 void *mpx_state_buffer;
7863
7864                 /*
7865                  * To avoid have the INIT path from kvm_apic_has_events() that be
7866                  * called with loaded FPU and does not let userspace fix the state.
7867                  */
7868                 if (init_event)
7869                         kvm_put_guest_fpu(vcpu);
7870                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
7871                                         XFEATURE_MASK_BNDREGS);
7872                 if (mpx_state_buffer)
7873                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
7874                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
7875                                         XFEATURE_MASK_BNDCSR);
7876                 if (mpx_state_buffer)
7877                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
7878                 if (init_event)
7879                         kvm_load_guest_fpu(vcpu);
7880         }
7881
7882         if (!init_event) {
7883                 kvm_pmu_reset(vcpu);
7884                 vcpu->arch.smbase = 0x30000;
7885
7886                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
7887                 vcpu->arch.msr_misc_features_enables = 0;
7888
7889                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7890         }
7891
7892         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7893         vcpu->arch.regs_avail = ~0;
7894         vcpu->arch.regs_dirty = ~0;
7895
7896         vcpu->arch.ia32_xss = 0;
7897
7898         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7899 }
7900
7901 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7902 {
7903         struct kvm_segment cs;
7904
7905         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7906         cs.selector = vector << 8;
7907         cs.base = vector << 12;
7908         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7909         kvm_rip_write(vcpu, 0);
7910 }
7911
7912 int kvm_arch_hardware_enable(void)
7913 {
7914         struct kvm *kvm;
7915         struct kvm_vcpu *vcpu;
7916         int i;
7917         int ret;
7918         u64 local_tsc;
7919         u64 max_tsc = 0;
7920         bool stable, backwards_tsc = false;
7921
7922         kvm_shared_msr_cpu_online();
7923         ret = kvm_x86_ops->hardware_enable();
7924         if (ret != 0)
7925                 return ret;
7926
7927         local_tsc = rdtsc();
7928         stable = !check_tsc_unstable();
7929         list_for_each_entry(kvm, &vm_list, vm_list) {
7930                 kvm_for_each_vcpu(i, vcpu, kvm) {
7931                         if (!stable && vcpu->cpu == smp_processor_id())
7932                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7933                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7934                                 backwards_tsc = true;
7935                                 if (vcpu->arch.last_host_tsc > max_tsc)
7936                                         max_tsc = vcpu->arch.last_host_tsc;
7937                         }
7938                 }
7939         }
7940
7941         /*
7942          * Sometimes, even reliable TSCs go backwards.  This happens on
7943          * platforms that reset TSC during suspend or hibernate actions, but
7944          * maintain synchronization.  We must compensate.  Fortunately, we can
7945          * detect that condition here, which happens early in CPU bringup,
7946          * before any KVM threads can be running.  Unfortunately, we can't
7947          * bring the TSCs fully up to date with real time, as we aren't yet far
7948          * enough into CPU bringup that we know how much real time has actually
7949          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7950          * variables that haven't been updated yet.
7951          *
7952          * So we simply find the maximum observed TSC above, then record the
7953          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7954          * the adjustment will be applied.  Note that we accumulate
7955          * adjustments, in case multiple suspend cycles happen before some VCPU
7956          * gets a chance to run again.  In the event that no KVM threads get a
7957          * chance to run, we will miss the entire elapsed period, as we'll have
7958          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7959          * loose cycle time.  This isn't too big a deal, since the loss will be
7960          * uniform across all VCPUs (not to mention the scenario is extremely
7961          * unlikely). It is possible that a second hibernate recovery happens
7962          * much faster than a first, causing the observed TSC here to be
7963          * smaller; this would require additional padding adjustment, which is
7964          * why we set last_host_tsc to the local tsc observed here.
7965          *
7966          * N.B. - this code below runs only on platforms with reliable TSC,
7967          * as that is the only way backwards_tsc is set above.  Also note
7968          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7969          * have the same delta_cyc adjustment applied if backwards_tsc
7970          * is detected.  Note further, this adjustment is only done once,
7971          * as we reset last_host_tsc on all VCPUs to stop this from being
7972          * called multiple times (one for each physical CPU bringup).
7973          *
7974          * Platforms with unreliable TSCs don't have to deal with this, they
7975          * will be compensated by the logic in vcpu_load, which sets the TSC to
7976          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7977          * guarantee that they stay in perfect synchronization.
7978          */
7979         if (backwards_tsc) {
7980                 u64 delta_cyc = max_tsc - local_tsc;
7981                 list_for_each_entry(kvm, &vm_list, vm_list) {
7982                         kvm->arch.backwards_tsc_observed = true;
7983                         kvm_for_each_vcpu(i, vcpu, kvm) {
7984                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7985                                 vcpu->arch.last_host_tsc = local_tsc;
7986                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7987                         }
7988
7989                         /*
7990                          * We have to disable TSC offset matching.. if you were
7991                          * booting a VM while issuing an S4 host suspend....
7992                          * you may have some problem.  Solving this issue is
7993                          * left as an exercise to the reader.
7994                          */
7995                         kvm->arch.last_tsc_nsec = 0;
7996                         kvm->arch.last_tsc_write = 0;
7997                 }
7998
7999         }
8000         return 0;
8001 }
8002
8003 void kvm_arch_hardware_disable(void)
8004 {
8005         kvm_x86_ops->hardware_disable();
8006         drop_user_return_notifiers();
8007 }
8008
8009 int kvm_arch_hardware_setup(void)
8010 {
8011         int r;
8012
8013         r = kvm_x86_ops->hardware_setup();
8014         if (r != 0)
8015                 return r;
8016
8017         if (kvm_has_tsc_control) {
8018                 /*
8019                  * Make sure the user can only configure tsc_khz values that
8020                  * fit into a signed integer.
8021                  * A min value is not calculated needed because it will always
8022                  * be 1 on all machines.
8023                  */
8024                 u64 max = min(0x7fffffffULL,
8025                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8026                 kvm_max_guest_tsc_khz = max;
8027
8028                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8029         }
8030
8031         kvm_init_msr_list();
8032         return 0;
8033 }
8034
8035 void kvm_arch_hardware_unsetup(void)
8036 {
8037         kvm_x86_ops->hardware_unsetup();
8038 }
8039
8040 void kvm_arch_check_processor_compat(void *rtn)
8041 {
8042         kvm_x86_ops->check_processor_compatibility(rtn);
8043 }
8044
8045 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8046 {
8047         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8048 }
8049 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8050
8051 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8052 {
8053         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8054 }
8055
8056 struct static_key kvm_no_apic_vcpu __read_mostly;
8057 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8058
8059 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8060 {
8061         struct page *page;
8062         int r;
8063
8064         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8065         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8066         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8067                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8068         else
8069                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8070
8071         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8072         if (!page) {
8073                 r = -ENOMEM;
8074                 goto fail;
8075         }
8076         vcpu->arch.pio_data = page_address(page);
8077
8078         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8079
8080         r = kvm_mmu_create(vcpu);
8081         if (r < 0)
8082                 goto fail_free_pio_data;
8083
8084         if (irqchip_in_kernel(vcpu->kvm)) {
8085                 r = kvm_create_lapic(vcpu);
8086                 if (r < 0)
8087                         goto fail_mmu_destroy;
8088         } else
8089                 static_key_slow_inc(&kvm_no_apic_vcpu);
8090
8091         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8092                                        GFP_KERNEL);
8093         if (!vcpu->arch.mce_banks) {
8094                 r = -ENOMEM;
8095                 goto fail_free_lapic;
8096         }
8097         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8098
8099         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8100                 r = -ENOMEM;
8101                 goto fail_free_mce_banks;
8102         }
8103
8104         fx_init(vcpu);
8105
8106         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8107
8108         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8109
8110         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8111
8112         kvm_async_pf_hash_reset(vcpu);
8113         kvm_pmu_init(vcpu);
8114
8115         vcpu->arch.pending_external_vector = -1;
8116         vcpu->arch.preempted_in_kernel = false;
8117
8118         kvm_hv_vcpu_init(vcpu);
8119
8120         return 0;
8121
8122 fail_free_mce_banks:
8123         kfree(vcpu->arch.mce_banks);
8124 fail_free_lapic:
8125         kvm_free_lapic(vcpu);
8126 fail_mmu_destroy:
8127         kvm_mmu_destroy(vcpu);
8128 fail_free_pio_data:
8129         free_page((unsigned long)vcpu->arch.pio_data);
8130 fail:
8131         return r;
8132 }
8133
8134 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8135 {
8136         int idx;
8137
8138         kvm_hv_vcpu_uninit(vcpu);
8139         kvm_pmu_destroy(vcpu);
8140         kfree(vcpu->arch.mce_banks);
8141         kvm_free_lapic(vcpu);
8142         idx = srcu_read_lock(&vcpu->kvm->srcu);
8143         kvm_mmu_destroy(vcpu);
8144         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8145         free_page((unsigned long)vcpu->arch.pio_data);
8146         if (!lapic_in_kernel(vcpu))
8147                 static_key_slow_dec(&kvm_no_apic_vcpu);
8148 }
8149
8150 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8151 {
8152         kvm_x86_ops->sched_in(vcpu, cpu);
8153 }
8154
8155 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8156 {
8157         if (type)
8158                 return -EINVAL;
8159
8160         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8161         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8162         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8163         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8164         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8165
8166         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8167         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8168         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8169         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8170                 &kvm->arch.irq_sources_bitmap);
8171
8172         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8173         mutex_init(&kvm->arch.apic_map_lock);
8174         mutex_init(&kvm->arch.hyperv.hv_lock);
8175         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8176
8177         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8178         pvclock_update_vm_gtod_copy(kvm);
8179
8180         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8181         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8182
8183         kvm_page_track_init(kvm);
8184         kvm_mmu_init_vm(kvm);
8185
8186         if (kvm_x86_ops->vm_init)
8187                 return kvm_x86_ops->vm_init(kvm);
8188
8189         return 0;
8190 }
8191
8192 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8193 {
8194         int r;
8195         r = vcpu_load(vcpu);
8196         BUG_ON(r);
8197         kvm_mmu_unload(vcpu);
8198         vcpu_put(vcpu);
8199 }
8200
8201 static void kvm_free_vcpus(struct kvm *kvm)
8202 {
8203         unsigned int i;
8204         struct kvm_vcpu *vcpu;
8205
8206         /*
8207          * Unpin any mmu pages first.
8208          */
8209         kvm_for_each_vcpu(i, vcpu, kvm) {
8210                 kvm_clear_async_pf_completion_queue(vcpu);
8211                 kvm_unload_vcpu_mmu(vcpu);
8212         }
8213         kvm_for_each_vcpu(i, vcpu, kvm)
8214                 kvm_arch_vcpu_free(vcpu);
8215
8216         mutex_lock(&kvm->lock);
8217         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8218                 kvm->vcpus[i] = NULL;
8219
8220         atomic_set(&kvm->online_vcpus, 0);
8221         mutex_unlock(&kvm->lock);
8222 }
8223
8224 void kvm_arch_sync_events(struct kvm *kvm)
8225 {
8226         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8227         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8228         kvm_free_pit(kvm);
8229 }
8230
8231 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8232 {
8233         int i, r;
8234         unsigned long hva;
8235         struct kvm_memslots *slots = kvm_memslots(kvm);
8236         struct kvm_memory_slot *slot, old;
8237
8238         /* Called with kvm->slots_lock held.  */
8239         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8240                 return -EINVAL;
8241
8242         slot = id_to_memslot(slots, id);
8243         if (size) {
8244                 if (slot->npages)
8245                         return -EEXIST;
8246
8247                 /*
8248                  * MAP_SHARED to prevent internal slot pages from being moved
8249                  * by fork()/COW.
8250                  */
8251                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8252                               MAP_SHARED | MAP_ANONYMOUS, 0);
8253                 if (IS_ERR((void *)hva))
8254                         return PTR_ERR((void *)hva);
8255         } else {
8256                 if (!slot->npages)
8257                         return 0;
8258
8259                 hva = 0;
8260         }
8261
8262         old = *slot;
8263         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8264                 struct kvm_userspace_memory_region m;
8265
8266                 m.slot = id | (i << 16);
8267                 m.flags = 0;
8268                 m.guest_phys_addr = gpa;
8269                 m.userspace_addr = hva;
8270                 m.memory_size = size;
8271                 r = __kvm_set_memory_region(kvm, &m);
8272                 if (r < 0)
8273                         return r;
8274         }
8275
8276         if (!size) {
8277                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8278                 WARN_ON(r < 0);
8279         }
8280
8281         return 0;
8282 }
8283 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8284
8285 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8286 {
8287         int r;
8288
8289         mutex_lock(&kvm->slots_lock);
8290         r = __x86_set_memory_region(kvm, id, gpa, size);
8291         mutex_unlock(&kvm->slots_lock);
8292
8293         return r;
8294 }
8295 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8296
8297 void kvm_arch_destroy_vm(struct kvm *kvm)
8298 {
8299         if (current->mm == kvm->mm) {
8300                 /*
8301                  * Free memory regions allocated on behalf of userspace,
8302                  * unless the the memory map has changed due to process exit
8303                  * or fd copying.
8304                  */
8305                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8306                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8307                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8308         }
8309         if (kvm_x86_ops->vm_destroy)
8310                 kvm_x86_ops->vm_destroy(kvm);
8311         kvm_pic_destroy(kvm);
8312         kvm_ioapic_destroy(kvm);
8313         kvm_free_vcpus(kvm);
8314         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8315         kvm_mmu_uninit_vm(kvm);
8316         kvm_page_track_cleanup(kvm);
8317 }
8318
8319 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8320                            struct kvm_memory_slot *dont)
8321 {
8322         int i;
8323
8324         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8325                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8326                         kvfree(free->arch.rmap[i]);
8327                         free->arch.rmap[i] = NULL;
8328                 }
8329                 if (i == 0)
8330                         continue;
8331
8332                 if (!dont || free->arch.lpage_info[i - 1] !=
8333                              dont->arch.lpage_info[i - 1]) {
8334                         kvfree(free->arch.lpage_info[i - 1]);
8335                         free->arch.lpage_info[i - 1] = NULL;
8336                 }
8337         }
8338
8339         kvm_page_track_free_memslot(free, dont);
8340 }
8341
8342 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8343                             unsigned long npages)
8344 {
8345         int i;
8346
8347         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8348                 struct kvm_lpage_info *linfo;
8349                 unsigned long ugfn;
8350                 int lpages;
8351                 int level = i + 1;
8352
8353                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8354                                       slot->base_gfn, level) + 1;
8355
8356                 slot->arch.rmap[i] =
8357                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8358                 if (!slot->arch.rmap[i])
8359                         goto out_free;
8360                 if (i == 0)
8361                         continue;
8362
8363                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8364                 if (!linfo)
8365                         goto out_free;
8366
8367                 slot->arch.lpage_info[i - 1] = linfo;
8368
8369                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8370                         linfo[0].disallow_lpage = 1;
8371                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8372                         linfo[lpages - 1].disallow_lpage = 1;
8373                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8374                 /*
8375                  * If the gfn and userspace address are not aligned wrt each
8376                  * other, or if explicitly asked to, disable large page
8377                  * support for this slot
8378                  */
8379                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8380                     !kvm_largepages_enabled()) {
8381                         unsigned long j;
8382
8383                         for (j = 0; j < lpages; ++j)
8384                                 linfo[j].disallow_lpage = 1;
8385                 }
8386         }
8387
8388         if (kvm_page_track_create_memslot(slot, npages))
8389                 goto out_free;
8390
8391         return 0;
8392
8393 out_free:
8394         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8395                 kvfree(slot->arch.rmap[i]);
8396                 slot->arch.rmap[i] = NULL;
8397                 if (i == 0)
8398                         continue;
8399
8400                 kvfree(slot->arch.lpage_info[i - 1]);
8401                 slot->arch.lpage_info[i - 1] = NULL;
8402         }
8403         return -ENOMEM;
8404 }
8405
8406 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8407 {
8408         /*
8409          * memslots->generation has been incremented.
8410          * mmio generation may have reached its maximum value.
8411          */
8412         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8413 }
8414
8415 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8416                                 struct kvm_memory_slot *memslot,
8417                                 const struct kvm_userspace_memory_region *mem,
8418                                 enum kvm_mr_change change)
8419 {
8420         return 0;
8421 }
8422
8423 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8424                                      struct kvm_memory_slot *new)
8425 {
8426         /* Still write protect RO slot */
8427         if (new->flags & KVM_MEM_READONLY) {
8428                 kvm_mmu_slot_remove_write_access(kvm, new);
8429                 return;
8430         }
8431
8432         /*
8433          * Call kvm_x86_ops dirty logging hooks when they are valid.
8434          *
8435          * kvm_x86_ops->slot_disable_log_dirty is called when:
8436          *
8437          *  - KVM_MR_CREATE with dirty logging is disabled
8438          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8439          *
8440          * The reason is, in case of PML, we need to set D-bit for any slots
8441          * with dirty logging disabled in order to eliminate unnecessary GPA
8442          * logging in PML buffer (and potential PML buffer full VMEXT). This
8443          * guarantees leaving PML enabled during guest's lifetime won't have
8444          * any additonal overhead from PML when guest is running with dirty
8445          * logging disabled for memory slots.
8446          *
8447          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8448          * to dirty logging mode.
8449          *
8450          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8451          *
8452          * In case of write protect:
8453          *
8454          * Write protect all pages for dirty logging.
8455          *
8456          * All the sptes including the large sptes which point to this
8457          * slot are set to readonly. We can not create any new large
8458          * spte on this slot until the end of the logging.
8459          *
8460          * See the comments in fast_page_fault().
8461          */
8462         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8463                 if (kvm_x86_ops->slot_enable_log_dirty)
8464                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8465                 else
8466                         kvm_mmu_slot_remove_write_access(kvm, new);
8467         } else {
8468                 if (kvm_x86_ops->slot_disable_log_dirty)
8469                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8470         }
8471 }
8472
8473 void kvm_arch_commit_memory_region(struct kvm *kvm,
8474                                 const struct kvm_userspace_memory_region *mem,
8475                                 const struct kvm_memory_slot *old,
8476                                 const struct kvm_memory_slot *new,
8477                                 enum kvm_mr_change change)
8478 {
8479         int nr_mmu_pages = 0;
8480
8481         if (!kvm->arch.n_requested_mmu_pages)
8482                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8483
8484         if (nr_mmu_pages)
8485                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8486
8487         /*
8488          * Dirty logging tracks sptes in 4k granularity, meaning that large
8489          * sptes have to be split.  If live migration is successful, the guest
8490          * in the source machine will be destroyed and large sptes will be
8491          * created in the destination. However, if the guest continues to run
8492          * in the source machine (for example if live migration fails), small
8493          * sptes will remain around and cause bad performance.
8494          *
8495          * Scan sptes if dirty logging has been stopped, dropping those
8496          * which can be collapsed into a single large-page spte.  Later
8497          * page faults will create the large-page sptes.
8498          */
8499         if ((change != KVM_MR_DELETE) &&
8500                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8501                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8502                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8503
8504         /*
8505          * Set up write protection and/or dirty logging for the new slot.
8506          *
8507          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8508          * been zapped so no dirty logging staff is needed for old slot. For
8509          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8510          * new and it's also covered when dealing with the new slot.
8511          *
8512          * FIXME: const-ify all uses of struct kvm_memory_slot.
8513          */
8514         if (change != KVM_MR_DELETE)
8515                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8516 }
8517
8518 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8519 {
8520         kvm_mmu_invalidate_zap_all_pages(kvm);
8521 }
8522
8523 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8524                                    struct kvm_memory_slot *slot)
8525 {
8526         kvm_page_track_flush_slot(kvm, slot);
8527 }
8528
8529 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8530 {
8531         if (!list_empty_careful(&vcpu->async_pf.done))
8532                 return true;
8533
8534         if (kvm_apic_has_events(vcpu))
8535                 return true;
8536
8537         if (vcpu->arch.pv.pv_unhalted)
8538                 return true;
8539
8540         if (vcpu->arch.exception.pending)
8541                 return true;
8542
8543         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8544             (vcpu->arch.nmi_pending &&
8545              kvm_x86_ops->nmi_allowed(vcpu)))
8546                 return true;
8547
8548         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8549             (vcpu->arch.smi_pending && !is_smm(vcpu)))
8550                 return true;
8551
8552         if (kvm_arch_interrupt_allowed(vcpu) &&
8553             kvm_cpu_has_interrupt(vcpu))
8554                 return true;
8555
8556         if (kvm_hv_has_stimer_pending(vcpu))
8557                 return true;
8558
8559         return false;
8560 }
8561
8562 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8563 {
8564         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8565 }
8566
8567 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
8568 {
8569         return vcpu->arch.preempted_in_kernel;
8570 }
8571
8572 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8573 {
8574         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8575 }
8576
8577 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8578 {
8579         return kvm_x86_ops->interrupt_allowed(vcpu);
8580 }
8581
8582 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8583 {
8584         if (is_64_bit_mode(vcpu))
8585                 return kvm_rip_read(vcpu);
8586         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8587                      kvm_rip_read(vcpu));
8588 }
8589 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8590
8591 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8592 {
8593         return kvm_get_linear_rip(vcpu) == linear_rip;
8594 }
8595 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8596
8597 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8598 {
8599         unsigned long rflags;
8600
8601         rflags = kvm_x86_ops->get_rflags(vcpu);
8602         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8603                 rflags &= ~X86_EFLAGS_TF;
8604         return rflags;
8605 }
8606 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8607
8608 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8609 {
8610         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8611             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8612                 rflags |= X86_EFLAGS_TF;
8613         kvm_x86_ops->set_rflags(vcpu, rflags);
8614 }
8615
8616 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8617 {
8618         __kvm_set_rflags(vcpu, rflags);
8619         kvm_make_request(KVM_REQ_EVENT, vcpu);
8620 }
8621 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8622
8623 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8624 {
8625         int r;
8626
8627         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8628               work->wakeup_all)
8629                 return;
8630
8631         r = kvm_mmu_reload(vcpu);
8632         if (unlikely(r))
8633                 return;
8634
8635         if (!vcpu->arch.mmu.direct_map &&
8636               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8637                 return;
8638
8639         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8640 }
8641
8642 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8643 {
8644         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8645 }
8646
8647 static inline u32 kvm_async_pf_next_probe(u32 key)
8648 {
8649         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8650 }
8651
8652 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8653 {
8654         u32 key = kvm_async_pf_hash_fn(gfn);
8655
8656         while (vcpu->arch.apf.gfns[key] != ~0)
8657                 key = kvm_async_pf_next_probe(key);
8658
8659         vcpu->arch.apf.gfns[key] = gfn;
8660 }
8661
8662 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8663 {
8664         int i;
8665         u32 key = kvm_async_pf_hash_fn(gfn);
8666
8667         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8668                      (vcpu->arch.apf.gfns[key] != gfn &&
8669                       vcpu->arch.apf.gfns[key] != ~0); i++)
8670                 key = kvm_async_pf_next_probe(key);
8671
8672         return key;
8673 }
8674
8675 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8676 {
8677         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8678 }
8679
8680 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8681 {
8682         u32 i, j, k;
8683
8684         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8685         while (true) {
8686                 vcpu->arch.apf.gfns[i] = ~0;
8687                 do {
8688                         j = kvm_async_pf_next_probe(j);
8689                         if (vcpu->arch.apf.gfns[j] == ~0)
8690                                 return;
8691                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8692                         /*
8693                          * k lies cyclically in ]i,j]
8694                          * |    i.k.j |
8695                          * |....j i.k.| or  |.k..j i...|
8696                          */
8697                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8698                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8699                 i = j;
8700         }
8701 }
8702
8703 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8704 {
8705
8706         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8707                                       sizeof(val));
8708 }
8709
8710 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
8711 {
8712
8713         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
8714                                       sizeof(u32));
8715 }
8716
8717 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8718                                      struct kvm_async_pf *work)
8719 {
8720         struct x86_exception fault;
8721
8722         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8723         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8724
8725         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8726             (vcpu->arch.apf.send_user_only &&
8727              kvm_x86_ops->get_cpl(vcpu) == 0))
8728                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8729         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8730                 fault.vector = PF_VECTOR;
8731                 fault.error_code_valid = true;
8732                 fault.error_code = 0;
8733                 fault.nested_page_fault = false;
8734                 fault.address = work->arch.token;
8735                 fault.async_page_fault = true;
8736                 kvm_inject_page_fault(vcpu, &fault);
8737         }
8738 }
8739
8740 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8741                                  struct kvm_async_pf *work)
8742 {
8743         struct x86_exception fault;
8744         u32 val;
8745
8746         if (work->wakeup_all)
8747                 work->arch.token = ~0; /* broadcast wakeup */
8748         else
8749                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8750         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8751
8752         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
8753             !apf_get_user(vcpu, &val)) {
8754                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
8755                     vcpu->arch.exception.pending &&
8756                     vcpu->arch.exception.nr == PF_VECTOR &&
8757                     !apf_put_user(vcpu, 0)) {
8758                         vcpu->arch.exception.injected = false;
8759                         vcpu->arch.exception.pending = false;
8760                         vcpu->arch.exception.nr = 0;
8761                         vcpu->arch.exception.has_error_code = false;
8762                         vcpu->arch.exception.error_code = 0;
8763                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8764                         fault.vector = PF_VECTOR;
8765                         fault.error_code_valid = true;
8766                         fault.error_code = 0;
8767                         fault.nested_page_fault = false;
8768                         fault.address = work->arch.token;
8769                         fault.async_page_fault = true;
8770                         kvm_inject_page_fault(vcpu, &fault);
8771                 }
8772         }
8773         vcpu->arch.apf.halted = false;
8774         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8775 }
8776
8777 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8778 {
8779         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8780                 return true;
8781         else
8782                 return kvm_can_do_async_pf(vcpu);
8783 }
8784
8785 void kvm_arch_start_assignment(struct kvm *kvm)
8786 {
8787         atomic_inc(&kvm->arch.assigned_device_count);
8788 }
8789 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8790
8791 void kvm_arch_end_assignment(struct kvm *kvm)
8792 {
8793         atomic_dec(&kvm->arch.assigned_device_count);
8794 }
8795 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8796
8797 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8798 {
8799         return atomic_read(&kvm->arch.assigned_device_count);
8800 }
8801 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8802
8803 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8804 {
8805         atomic_inc(&kvm->arch.noncoherent_dma_count);
8806 }
8807 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8808
8809 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8810 {
8811         atomic_dec(&kvm->arch.noncoherent_dma_count);
8812 }
8813 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8814
8815 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8816 {
8817         return atomic_read(&kvm->arch.noncoherent_dma_count);
8818 }
8819 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8820
8821 bool kvm_arch_has_irq_bypass(void)
8822 {
8823         return kvm_x86_ops->update_pi_irte != NULL;
8824 }
8825
8826 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8827                                       struct irq_bypass_producer *prod)
8828 {
8829         struct kvm_kernel_irqfd *irqfd =
8830                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8831
8832         irqfd->producer = prod;
8833
8834         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8835                                            prod->irq, irqfd->gsi, 1);
8836 }
8837
8838 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8839                                       struct irq_bypass_producer *prod)
8840 {
8841         int ret;
8842         struct kvm_kernel_irqfd *irqfd =
8843                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8844
8845         WARN_ON(irqfd->producer != prod);
8846         irqfd->producer = NULL;
8847
8848         /*
8849          * When producer of consumer is unregistered, we change back to
8850          * remapped mode, so we can re-use the current implementation
8851          * when the irq is masked/disabled or the consumer side (KVM
8852          * int this case doesn't want to receive the interrupts.
8853         */
8854         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8855         if (ret)
8856                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8857                        " fails: %d\n", irqfd->consumer.token, ret);
8858 }
8859
8860 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8861                                    uint32_t guest_irq, bool set)
8862 {
8863         if (!kvm_x86_ops->update_pi_irte)
8864                 return -EINVAL;
8865
8866         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8867 }
8868
8869 bool kvm_vector_hashing_enabled(void)
8870 {
8871         return vector_hashing;
8872 }
8873 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8874
8875 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8876 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8877 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8878 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8879 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8880 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8881 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8882 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8883 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8884 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8885 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8886 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8887 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8888 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8889 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8890 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8891 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8892 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8893 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);