2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <trace/events/kvm.h>
59 #include <asm/debugreg.h>
63 #include <linux/kernel_stat.h>
64 #include <asm/fpu/internal.h> /* Ugh! */
65 #include <asm/pvclock.h>
66 #include <asm/div64.h>
67 #include <asm/irq_remapping.h>
69 #define CREATE_TRACE_POINTS
72 #define MAX_IO_MSRS 256
73 #define KVM_MAX_MCE_BANKS 32
74 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
75 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
77 #define emul_to_vcpu(ctxt) \
78 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
81 * - enable syscall per default because its emulated by KVM
82 * - enable LME and LMA per default on 64 bit KVM
86 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
88 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
91 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
92 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
94 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
95 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
97 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
98 static void process_nmi(struct kvm_vcpu *vcpu);
99 static void enter_smm(struct kvm_vcpu *vcpu);
100 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
102 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
103 EXPORT_SYMBOL_GPL(kvm_x86_ops);
105 static bool __read_mostly ignore_msrs = 0;
106 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
108 unsigned int min_timer_period_us = 500;
109 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
111 static bool __read_mostly kvmclock_periodic_sync = true;
112 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
114 bool __read_mostly kvm_has_tsc_control;
115 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
116 u32 __read_mostly kvm_max_guest_tsc_khz;
117 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
118 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
119 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
120 u64 __read_mostly kvm_max_tsc_scaling_ratio;
121 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
122 u64 __read_mostly kvm_default_tsc_scaling_ratio;
123 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
125 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
126 static u32 __read_mostly tsc_tolerance_ppm = 250;
127 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
129 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
130 unsigned int __read_mostly lapic_timer_advance_ns = 0;
131 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
133 static bool __read_mostly vector_hashing = true;
134 module_param(vector_hashing, bool, S_IRUGO);
136 static bool __read_mostly backwards_tsc_observed = false;
138 #define KVM_NR_SHARED_MSRS 16
140 struct kvm_shared_msrs_global {
142 u32 msrs[KVM_NR_SHARED_MSRS];
145 struct kvm_shared_msrs {
146 struct user_return_notifier urn;
148 struct kvm_shared_msr_values {
151 } values[KVM_NR_SHARED_MSRS];
154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
155 static struct kvm_shared_msrs __percpu *shared_msrs;
157 struct kvm_stats_debugfs_item debugfs_entries[] = {
158 { "pf_fixed", VCPU_STAT(pf_fixed) },
159 { "pf_guest", VCPU_STAT(pf_guest) },
160 { "tlb_flush", VCPU_STAT(tlb_flush) },
161 { "invlpg", VCPU_STAT(invlpg) },
162 { "exits", VCPU_STAT(exits) },
163 { "io_exits", VCPU_STAT(io_exits) },
164 { "mmio_exits", VCPU_STAT(mmio_exits) },
165 { "signal_exits", VCPU_STAT(signal_exits) },
166 { "irq_window", VCPU_STAT(irq_window_exits) },
167 { "nmi_window", VCPU_STAT(nmi_window_exits) },
168 { "halt_exits", VCPU_STAT(halt_exits) },
169 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
170 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
171 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
172 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
173 { "hypercalls", VCPU_STAT(hypercalls) },
174 { "request_irq", VCPU_STAT(request_irq_exits) },
175 { "irq_exits", VCPU_STAT(irq_exits) },
176 { "host_state_reload", VCPU_STAT(host_state_reload) },
177 { "efer_reload", VCPU_STAT(efer_reload) },
178 { "fpu_reload", VCPU_STAT(fpu_reload) },
179 { "insn_emulation", VCPU_STAT(insn_emulation) },
180 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
181 { "irq_injections", VCPU_STAT(irq_injections) },
182 { "nmi_injections", VCPU_STAT(nmi_injections) },
183 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
184 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
185 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
186 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
187 { "mmu_flooded", VM_STAT(mmu_flooded) },
188 { "mmu_recycled", VM_STAT(mmu_recycled) },
189 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
190 { "mmu_unsync", VM_STAT(mmu_unsync) },
191 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
192 { "largepages", VM_STAT(lpages) },
196 u64 __read_mostly host_xcr0;
198 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
200 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
203 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
204 vcpu->arch.apf.gfns[i] = ~0;
207 static void kvm_on_user_return(struct user_return_notifier *urn)
210 struct kvm_shared_msrs *locals
211 = container_of(urn, struct kvm_shared_msrs, urn);
212 struct kvm_shared_msr_values *values;
216 * Disabling irqs at this point since the following code could be
217 * interrupted and executed through kvm_arch_hardware_disable()
219 local_irq_save(flags);
220 if (locals->registered) {
221 locals->registered = false;
222 user_return_notifier_unregister(urn);
224 local_irq_restore(flags);
225 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
226 values = &locals->values[slot];
227 if (values->host != values->curr) {
228 wrmsrl(shared_msrs_global.msrs[slot], values->host);
229 values->curr = values->host;
234 static void shared_msr_update(unsigned slot, u32 msr)
237 unsigned int cpu = smp_processor_id();
238 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
240 /* only read, and nobody should modify it at this time,
241 * so don't need lock */
242 if (slot >= shared_msrs_global.nr) {
243 printk(KERN_ERR "kvm: invalid MSR slot!");
246 rdmsrl_safe(msr, &value);
247 smsr->values[slot].host = value;
248 smsr->values[slot].curr = value;
251 void kvm_define_shared_msr(unsigned slot, u32 msr)
253 BUG_ON(slot >= KVM_NR_SHARED_MSRS);
254 shared_msrs_global.msrs[slot] = msr;
255 if (slot >= shared_msrs_global.nr)
256 shared_msrs_global.nr = slot + 1;
258 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
260 static void kvm_shared_msr_cpu_online(void)
264 for (i = 0; i < shared_msrs_global.nr; ++i)
265 shared_msr_update(i, shared_msrs_global.msrs[i]);
268 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
270 unsigned int cpu = smp_processor_id();
271 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
274 if (((value ^ smsr->values[slot].curr) & mask) == 0)
276 smsr->values[slot].curr = value;
277 err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
281 if (!smsr->registered) {
282 smsr->urn.on_user_return = kvm_on_user_return;
283 user_return_notifier_register(&smsr->urn);
284 smsr->registered = true;
288 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
290 static void drop_user_return_notifiers(void)
292 unsigned int cpu = smp_processor_id();
293 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
295 if (smsr->registered)
296 kvm_on_user_return(&smsr->urn);
299 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
301 return vcpu->arch.apic_base;
303 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
305 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
307 u64 old_state = vcpu->arch.apic_base &
308 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
309 u64 new_state = msr_info->data &
310 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
311 u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
312 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
314 if (!msr_info->host_initiated &&
315 ((msr_info->data & reserved_bits) != 0 ||
316 new_state == X2APIC_ENABLE ||
317 (new_state == MSR_IA32_APICBASE_ENABLE &&
318 old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
319 (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
323 kvm_lapic_set_base(vcpu, msr_info->data);
326 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
328 asmlinkage __visible void kvm_spurious_fault(void)
330 /* Fault while not rebooting. We want the trace. */
333 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
335 #define EXCPT_BENIGN 0
336 #define EXCPT_CONTRIBUTORY 1
339 static int exception_class(int vector)
349 return EXCPT_CONTRIBUTORY;
356 #define EXCPT_FAULT 0
358 #define EXCPT_ABORT 2
359 #define EXCPT_INTERRUPT 3
361 static int exception_type(int vector)
365 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
366 return EXCPT_INTERRUPT;
370 /* #DB is trap, as instruction watchpoints are handled elsewhere */
371 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
374 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
377 /* Reserved exceptions will result in fault */
381 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
382 unsigned nr, bool has_error, u32 error_code,
388 kvm_make_request(KVM_REQ_EVENT, vcpu);
390 if (!vcpu->arch.exception.pending) {
392 if (has_error && !is_protmode(vcpu))
394 vcpu->arch.exception.pending = true;
395 vcpu->arch.exception.has_error_code = has_error;
396 vcpu->arch.exception.nr = nr;
397 vcpu->arch.exception.error_code = error_code;
398 vcpu->arch.exception.reinject = reinject;
402 /* to check exception */
403 prev_nr = vcpu->arch.exception.nr;
404 if (prev_nr == DF_VECTOR) {
405 /* triple fault -> shutdown */
406 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
409 class1 = exception_class(prev_nr);
410 class2 = exception_class(nr);
411 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
412 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
413 /* generate double fault per SDM Table 5-5 */
414 vcpu->arch.exception.pending = true;
415 vcpu->arch.exception.has_error_code = true;
416 vcpu->arch.exception.nr = DF_VECTOR;
417 vcpu->arch.exception.error_code = 0;
419 /* replace previous exception with a new one in a hope
420 that instruction re-execution will regenerate lost
425 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
427 kvm_multiple_exception(vcpu, nr, false, 0, false);
429 EXPORT_SYMBOL_GPL(kvm_queue_exception);
431 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
433 kvm_multiple_exception(vcpu, nr, false, 0, true);
435 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
437 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
440 kvm_inject_gp(vcpu, 0);
442 return kvm_skip_emulated_instruction(vcpu);
446 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
448 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
450 ++vcpu->stat.pf_guest;
451 vcpu->arch.cr2 = fault->address;
452 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
454 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
456 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
458 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
459 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
461 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
463 return fault->nested_page_fault;
466 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
468 atomic_inc(&vcpu->arch.nmi_queued);
469 kvm_make_request(KVM_REQ_NMI, vcpu);
471 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
473 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
475 kvm_multiple_exception(vcpu, nr, true, error_code, false);
477 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
479 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
481 kvm_multiple_exception(vcpu, nr, true, error_code, true);
483 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
486 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
487 * a #GP and return false.
489 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
491 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
493 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
496 EXPORT_SYMBOL_GPL(kvm_require_cpl);
498 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
500 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
503 kvm_queue_exception(vcpu, UD_VECTOR);
506 EXPORT_SYMBOL_GPL(kvm_require_dr);
509 * This function will be used to read from the physical memory of the currently
510 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
511 * can read from guest physical or from the guest's guest physical memory.
513 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
514 gfn_t ngfn, void *data, int offset, int len,
517 struct x86_exception exception;
521 ngpa = gfn_to_gpa(ngfn);
522 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
523 if (real_gfn == UNMAPPED_GVA)
526 real_gfn = gpa_to_gfn(real_gfn);
528 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
530 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
532 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
533 void *data, int offset, int len, u32 access)
535 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
536 data, offset, len, access);
540 * Load the pae pdptrs. Return true is they are all valid.
542 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
544 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
545 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
548 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
550 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
551 offset * sizeof(u64), sizeof(pdpte),
552 PFERR_USER_MASK|PFERR_WRITE_MASK);
557 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
558 if ((pdpte[i] & PT_PRESENT_MASK) &&
560 vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
567 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
568 __set_bit(VCPU_EXREG_PDPTR,
569 (unsigned long *)&vcpu->arch.regs_avail);
570 __set_bit(VCPU_EXREG_PDPTR,
571 (unsigned long *)&vcpu->arch.regs_dirty);
576 EXPORT_SYMBOL_GPL(load_pdptrs);
578 bool pdptrs_changed(struct kvm_vcpu *vcpu)
580 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
586 if (is_long_mode(vcpu) || !is_pae(vcpu))
589 if (!test_bit(VCPU_EXREG_PDPTR,
590 (unsigned long *)&vcpu->arch.regs_avail))
593 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
594 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
595 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
596 PFERR_USER_MASK | PFERR_WRITE_MASK);
599 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
604 EXPORT_SYMBOL_GPL(pdptrs_changed);
606 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
608 unsigned long old_cr0 = kvm_read_cr0(vcpu);
609 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
614 if (cr0 & 0xffffffff00000000UL)
618 cr0 &= ~CR0_RESERVED_BITS;
620 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
623 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
626 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
628 if ((vcpu->arch.efer & EFER_LME)) {
633 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
638 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
643 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
646 kvm_x86_ops->set_cr0(vcpu, cr0);
648 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
649 kvm_clear_async_pf_completion_queue(vcpu);
650 kvm_async_pf_hash_reset(vcpu);
653 if ((cr0 ^ old_cr0) & update_bits)
654 kvm_mmu_reset_context(vcpu);
656 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
657 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
658 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
659 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
663 EXPORT_SYMBOL_GPL(kvm_set_cr0);
665 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
667 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
669 EXPORT_SYMBOL_GPL(kvm_lmsw);
671 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
673 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
674 !vcpu->guest_xcr0_loaded) {
675 /* kvm_set_xcr() also depends on this */
676 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
677 vcpu->guest_xcr0_loaded = 1;
681 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
683 if (vcpu->guest_xcr0_loaded) {
684 if (vcpu->arch.xcr0 != host_xcr0)
685 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
686 vcpu->guest_xcr0_loaded = 0;
690 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
693 u64 old_xcr0 = vcpu->arch.xcr0;
696 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
697 if (index != XCR_XFEATURE_ENABLED_MASK)
699 if (!(xcr0 & XFEATURE_MASK_FP))
701 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
705 * Do not allow the guest to set bits that we do not support
706 * saving. However, xcr0 bit 0 is always set, even if the
707 * emulated CPU does not support XSAVE (see fx_init).
709 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
710 if (xcr0 & ~valid_bits)
713 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
714 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
717 if (xcr0 & XFEATURE_MASK_AVX512) {
718 if (!(xcr0 & XFEATURE_MASK_YMM))
720 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
723 vcpu->arch.xcr0 = xcr0;
725 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
726 kvm_update_cpuid(vcpu);
730 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
732 if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
733 __kvm_set_xcr(vcpu, index, xcr)) {
734 kvm_inject_gp(vcpu, 0);
739 EXPORT_SYMBOL_GPL(kvm_set_xcr);
741 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
743 unsigned long old_cr4 = kvm_read_cr4(vcpu);
744 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
745 X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
747 if (cr4 & CR4_RESERVED_BITS)
750 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
753 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
756 if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
759 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
762 if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
765 if (is_long_mode(vcpu)) {
766 if (!(cr4 & X86_CR4_PAE))
768 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
769 && ((cr4 ^ old_cr4) & pdptr_bits)
770 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
774 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
775 if (!guest_cpuid_has_pcid(vcpu))
778 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
779 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
783 if (kvm_x86_ops->set_cr4(vcpu, cr4))
786 if (((cr4 ^ old_cr4) & pdptr_bits) ||
787 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
788 kvm_mmu_reset_context(vcpu);
790 if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
791 kvm_update_cpuid(vcpu);
795 EXPORT_SYMBOL_GPL(kvm_set_cr4);
797 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
800 cr3 &= ~CR3_PCID_INVD;
803 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
804 kvm_mmu_sync_roots(vcpu);
805 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
809 if (is_long_mode(vcpu)) {
810 if (cr3 & CR3_L_MODE_RESERVED_BITS)
812 } else if (is_pae(vcpu) && is_paging(vcpu) &&
813 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
816 vcpu->arch.cr3 = cr3;
817 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
818 kvm_mmu_new_cr3(vcpu);
821 EXPORT_SYMBOL_GPL(kvm_set_cr3);
823 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
825 if (cr8 & CR8_RESERVED_BITS)
827 if (lapic_in_kernel(vcpu))
828 kvm_lapic_set_tpr(vcpu, cr8);
830 vcpu->arch.cr8 = cr8;
833 EXPORT_SYMBOL_GPL(kvm_set_cr8);
835 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
837 if (lapic_in_kernel(vcpu))
838 return kvm_lapic_get_cr8(vcpu);
840 return vcpu->arch.cr8;
842 EXPORT_SYMBOL_GPL(kvm_get_cr8);
844 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
848 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
849 for (i = 0; i < KVM_NR_DB_REGS; i++)
850 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
851 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
855 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
857 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
858 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
861 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
865 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
866 dr7 = vcpu->arch.guest_debug_dr7;
868 dr7 = vcpu->arch.dr7;
869 kvm_x86_ops->set_dr7(vcpu, dr7);
870 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
871 if (dr7 & DR7_BP_EN_MASK)
872 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
875 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
877 u64 fixed = DR6_FIXED_1;
879 if (!guest_cpuid_has_rtm(vcpu))
884 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
888 vcpu->arch.db[dr] = val;
889 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
890 vcpu->arch.eff_db[dr] = val;
895 if (val & 0xffffffff00000000ULL)
897 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
898 kvm_update_dr6(vcpu);
903 if (val & 0xffffffff00000000ULL)
905 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
906 kvm_update_dr7(vcpu);
913 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
915 if (__kvm_set_dr(vcpu, dr, val)) {
916 kvm_inject_gp(vcpu, 0);
921 EXPORT_SYMBOL_GPL(kvm_set_dr);
923 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
927 *val = vcpu->arch.db[dr];
932 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
933 *val = vcpu->arch.dr6;
935 *val = kvm_x86_ops->get_dr6(vcpu);
940 *val = vcpu->arch.dr7;
945 EXPORT_SYMBOL_GPL(kvm_get_dr);
947 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
949 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
953 err = kvm_pmu_rdpmc(vcpu, ecx, &data);
956 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
957 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
960 EXPORT_SYMBOL_GPL(kvm_rdpmc);
963 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
964 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
966 * This list is modified at module load time to reflect the
967 * capabilities of the host cpu. This capabilities test skips MSRs that are
968 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
969 * may depend on host virtualization features rather than host cpu features.
972 static u32 msrs_to_save[] = {
973 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
976 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
978 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
979 MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
982 static unsigned num_msrs_to_save;
984 static u32 emulated_msrs[] = {
985 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
986 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
987 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
988 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
989 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
990 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
993 HV_X64_MSR_VP_RUNTIME,
995 HV_X64_MSR_STIMER0_CONFIG,
996 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1000 MSR_IA32_TSCDEADLINE,
1001 MSR_IA32_MISC_ENABLE,
1002 MSR_IA32_MCG_STATUS,
1004 MSR_IA32_MCG_EXT_CTL,
1008 static unsigned num_emulated_msrs;
1010 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1012 if (efer & efer_reserved_bits)
1015 if (efer & EFER_FFXSR) {
1016 struct kvm_cpuid_entry2 *feat;
1018 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1019 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1023 if (efer & EFER_SVME) {
1024 struct kvm_cpuid_entry2 *feat;
1026 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1027 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1033 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1035 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1037 u64 old_efer = vcpu->arch.efer;
1039 if (!kvm_valid_efer(vcpu, efer))
1043 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1047 efer |= vcpu->arch.efer & EFER_LMA;
1049 kvm_x86_ops->set_efer(vcpu, efer);
1051 /* Update reserved bits */
1052 if ((efer ^ old_efer) & EFER_NX)
1053 kvm_mmu_reset_context(vcpu);
1058 void kvm_enable_efer_bits(u64 mask)
1060 efer_reserved_bits &= ~mask;
1062 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1065 * Writes msr value into into the appropriate "register".
1066 * Returns 0 on success, non-0 otherwise.
1067 * Assumes vcpu_load() was already called.
1069 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1071 switch (msr->index) {
1074 case MSR_KERNEL_GS_BASE:
1077 if (is_noncanonical_address(msr->data))
1080 case MSR_IA32_SYSENTER_EIP:
1081 case MSR_IA32_SYSENTER_ESP:
1083 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1084 * non-canonical address is written on Intel but not on
1085 * AMD (which ignores the top 32-bits, because it does
1086 * not implement 64-bit SYSENTER).
1088 * 64-bit code should hence be able to write a non-canonical
1089 * value on AMD. Making the address canonical ensures that
1090 * vmentry does not fail on Intel after writing a non-canonical
1091 * value, and that something deterministic happens if the guest
1092 * invokes 64-bit SYSENTER.
1094 msr->data = get_canonical(msr->data);
1096 return kvm_x86_ops->set_msr(vcpu, msr);
1098 EXPORT_SYMBOL_GPL(kvm_set_msr);
1101 * Adapt set_msr() to msr_io()'s calling convention
1103 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1105 struct msr_data msr;
1109 msr.host_initiated = true;
1110 r = kvm_get_msr(vcpu, &msr);
1118 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1120 struct msr_data msr;
1124 msr.host_initiated = true;
1125 return kvm_set_msr(vcpu, &msr);
1128 #ifdef CONFIG_X86_64
1129 struct pvclock_gtod_data {
1132 struct { /* extract of a clocksource struct */
1144 static struct pvclock_gtod_data pvclock_gtod_data;
1146 static void update_pvclock_gtod(struct timekeeper *tk)
1148 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1151 boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1153 write_seqcount_begin(&vdata->seq);
1155 /* copy pvclock gtod data */
1156 vdata->clock.vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode;
1157 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
1158 vdata->clock.mask = tk->tkr_mono.mask;
1159 vdata->clock.mult = tk->tkr_mono.mult;
1160 vdata->clock.shift = tk->tkr_mono.shift;
1162 vdata->boot_ns = boot_ns;
1163 vdata->nsec_base = tk->tkr_mono.xtime_nsec;
1165 write_seqcount_end(&vdata->seq);
1169 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1172 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1173 * vcpu_enter_guest. This function is only called from
1174 * the physical CPU that is running vcpu.
1176 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1179 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1183 struct pvclock_wall_clock wc;
1184 struct timespec64 boot;
1189 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1194 ++version; /* first time write, random junk */
1198 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1202 * The guest calculates current wall clock time by adding
1203 * system time (updated by kvm_guest_time_update below) to the
1204 * wall clock specified here. guest system time equals host
1205 * system time for us, thus we must fill in host boot time here.
1207 getboottime64(&boot);
1209 if (kvm->arch.kvmclock_offset) {
1210 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1211 boot = timespec64_sub(boot, ts);
1213 wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1214 wc.nsec = boot.tv_nsec;
1215 wc.version = version;
1217 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1220 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1223 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1225 do_shl32_div32(dividend, divisor);
1229 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1230 s8 *pshift, u32 *pmultiplier)
1238 scaled64 = scaled_hz;
1239 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1244 tps32 = (uint32_t)tps64;
1245 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1246 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1254 *pmultiplier = div_frac(scaled64, tps32);
1256 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1257 __func__, base_hz, scaled_hz, shift, *pmultiplier);
1260 #ifdef CONFIG_X86_64
1261 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1264 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1265 static unsigned long max_tsc_khz;
1267 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1269 u64 v = (u64)khz * (1000000 + ppm);
1274 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1278 /* Guest TSC same frequency as host TSC? */
1280 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1284 /* TSC scaling supported? */
1285 if (!kvm_has_tsc_control) {
1286 if (user_tsc_khz > tsc_khz) {
1287 vcpu->arch.tsc_catchup = 1;
1288 vcpu->arch.tsc_always_catchup = 1;
1291 WARN(1, "user requested TSC rate below hardware speed\n");
1296 /* TSC scaling required - calculate ratio */
1297 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1298 user_tsc_khz, tsc_khz);
1300 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1301 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1306 vcpu->arch.tsc_scaling_ratio = ratio;
1310 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1312 u32 thresh_lo, thresh_hi;
1313 int use_scaling = 0;
1315 /* tsc_khz can be zero if TSC calibration fails */
1316 if (user_tsc_khz == 0) {
1317 /* set tsc_scaling_ratio to a safe value */
1318 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1322 /* Compute a scale to convert nanoseconds in TSC cycles */
1323 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1324 &vcpu->arch.virtual_tsc_shift,
1325 &vcpu->arch.virtual_tsc_mult);
1326 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1329 * Compute the variation in TSC rate which is acceptable
1330 * within the range of tolerance and decide if the
1331 * rate being applied is within that bounds of the hardware
1332 * rate. If so, no scaling or compensation need be done.
1334 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1335 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1336 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1337 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1340 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1343 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1345 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1346 vcpu->arch.virtual_tsc_mult,
1347 vcpu->arch.virtual_tsc_shift);
1348 tsc += vcpu->arch.this_tsc_write;
1352 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1354 #ifdef CONFIG_X86_64
1356 struct kvm_arch *ka = &vcpu->kvm->arch;
1357 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1359 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1360 atomic_read(&vcpu->kvm->online_vcpus));
1363 * Once the masterclock is enabled, always perform request in
1364 * order to update it.
1366 * In order to enable masterclock, the host clocksource must be TSC
1367 * and the vcpus need to have matched TSCs. When that happens,
1368 * perform request to enable masterclock.
1370 if (ka->use_master_clock ||
1371 (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1372 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1374 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1375 atomic_read(&vcpu->kvm->online_vcpus),
1376 ka->use_master_clock, gtod->clock.vclock_mode);
1380 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1382 u64 curr_offset = vcpu->arch.tsc_offset;
1383 vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1387 * Multiply tsc by a fixed point number represented by ratio.
1389 * The most significant 64-N bits (mult) of ratio represent the
1390 * integral part of the fixed point number; the remaining N bits
1391 * (frac) represent the fractional part, ie. ratio represents a fixed
1392 * point number (mult + frac * 2^(-N)).
1394 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1396 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1398 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1401 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1404 u64 ratio = vcpu->arch.tsc_scaling_ratio;
1406 if (ratio != kvm_default_tsc_scaling_ratio)
1407 _tsc = __scale_tsc(ratio, tsc);
1411 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1413 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1417 tsc = kvm_scale_tsc(vcpu, rdtsc());
1419 return target_tsc - tsc;
1422 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1424 return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1426 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1428 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1430 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1431 vcpu->arch.tsc_offset = offset;
1434 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1436 struct kvm *kvm = vcpu->kvm;
1437 u64 offset, ns, elapsed;
1438 unsigned long flags;
1441 bool already_matched;
1442 u64 data = msr->data;
1444 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1445 offset = kvm_compute_tsc_offset(vcpu, data);
1446 ns = ktime_get_boot_ns();
1447 elapsed = ns - kvm->arch.last_tsc_nsec;
1449 if (vcpu->arch.virtual_tsc_khz) {
1452 /* n.b - signed multiplication and division required */
1453 usdiff = data - kvm->arch.last_tsc_write;
1454 #ifdef CONFIG_X86_64
1455 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1457 /* do_div() only does unsigned */
1458 asm("1: idivl %[divisor]\n"
1459 "2: xor %%edx, %%edx\n"
1460 " movl $0, %[faulted]\n"
1462 ".section .fixup,\"ax\"\n"
1463 "4: movl $1, %[faulted]\n"
1467 _ASM_EXTABLE(1b, 4b)
1469 : "=A"(usdiff), [faulted] "=r" (faulted)
1470 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1473 do_div(elapsed, 1000);
1478 /* idivl overflow => difference is larger than USEC_PER_SEC */
1480 usdiff = USEC_PER_SEC;
1482 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1485 * Special case: TSC write with a small delta (1 second) of virtual
1486 * cycle time against real time is interpreted as an attempt to
1487 * synchronize the CPU.
1489 * For a reliable TSC, we can match TSC offsets, and for an unstable
1490 * TSC, we add elapsed time in this computation. We could let the
1491 * compensation code attempt to catch up if we fall behind, but
1492 * it's better to try to match offsets from the beginning.
1494 if (usdiff < USEC_PER_SEC &&
1495 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1496 if (!check_tsc_unstable()) {
1497 offset = kvm->arch.cur_tsc_offset;
1498 pr_debug("kvm: matched tsc offset for %llu\n", data);
1500 u64 delta = nsec_to_cycles(vcpu, elapsed);
1502 offset = kvm_compute_tsc_offset(vcpu, data);
1503 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1506 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1509 * We split periods of matched TSC writes into generations.
1510 * For each generation, we track the original measured
1511 * nanosecond time, offset, and write, so if TSCs are in
1512 * sync, we can match exact offset, and if not, we can match
1513 * exact software computation in compute_guest_tsc()
1515 * These values are tracked in kvm->arch.cur_xxx variables.
1517 kvm->arch.cur_tsc_generation++;
1518 kvm->arch.cur_tsc_nsec = ns;
1519 kvm->arch.cur_tsc_write = data;
1520 kvm->arch.cur_tsc_offset = offset;
1522 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1523 kvm->arch.cur_tsc_generation, data);
1527 * We also track th most recent recorded KHZ, write and time to
1528 * allow the matching interval to be extended at each write.
1530 kvm->arch.last_tsc_nsec = ns;
1531 kvm->arch.last_tsc_write = data;
1532 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1534 vcpu->arch.last_guest_tsc = data;
1536 /* Keep track of which generation this VCPU has synchronized to */
1537 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1538 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1539 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1541 if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1542 update_ia32_tsc_adjust_msr(vcpu, offset);
1543 kvm_vcpu_write_tsc_offset(vcpu, offset);
1544 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1546 spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1548 kvm->arch.nr_vcpus_matched_tsc = 0;
1549 } else if (!already_matched) {
1550 kvm->arch.nr_vcpus_matched_tsc++;
1553 kvm_track_tsc_matching(vcpu);
1554 spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1557 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1559 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1562 kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1565 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1567 if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1568 WARN_ON(adjustment < 0);
1569 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1570 adjust_tsc_offset_guest(vcpu, adjustment);
1573 #ifdef CONFIG_X86_64
1575 static u64 read_tsc(void)
1577 u64 ret = (u64)rdtsc_ordered();
1578 u64 last = pvclock_gtod_data.clock.cycle_last;
1580 if (likely(ret >= last))
1584 * GCC likes to generate cmov here, but this branch is extremely
1585 * predictable (it's just a function of time and the likely is
1586 * very likely) and there's a data dependence, so force GCC
1587 * to generate a branch instead. I don't barrier() because
1588 * we don't actually need a barrier, and if this function
1589 * ever gets inlined it will generate worse code.
1595 static inline u64 vgettsc(u64 *cycle_now)
1598 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1600 *cycle_now = read_tsc();
1602 v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1603 return v * gtod->clock.mult;
1606 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1608 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1614 seq = read_seqcount_begin(>od->seq);
1615 mode = gtod->clock.vclock_mode;
1616 ns = gtod->nsec_base;
1617 ns += vgettsc(cycle_now);
1618 ns >>= gtod->clock.shift;
1619 ns += gtod->boot_ns;
1620 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1626 /* returns true if host is using tsc clocksource */
1627 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1629 /* checked again under seqlock below */
1630 if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1633 return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1639 * Assuming a stable TSC across physical CPUS, and a stable TSC
1640 * across virtual CPUs, the following condition is possible.
1641 * Each numbered line represents an event visible to both
1642 * CPUs at the next numbered event.
1644 * "timespecX" represents host monotonic time. "tscX" represents
1647 * VCPU0 on CPU0 | VCPU1 on CPU1
1649 * 1. read timespec0,tsc0
1650 * 2. | timespec1 = timespec0 + N
1652 * 3. transition to guest | transition to guest
1653 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1654 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1655 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1657 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1660 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1662 * - 0 < N - M => M < N
1664 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1665 * always the case (the difference between two distinct xtime instances
1666 * might be smaller then the difference between corresponding TSC reads,
1667 * when updating guest vcpus pvclock areas).
1669 * To avoid that problem, do not allow visibility of distinct
1670 * system_timestamp/tsc_timestamp values simultaneously: use a master
1671 * copy of host monotonic time values. Update that master copy
1674 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1678 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1680 #ifdef CONFIG_X86_64
1681 struct kvm_arch *ka = &kvm->arch;
1683 bool host_tsc_clocksource, vcpus_matched;
1685 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1686 atomic_read(&kvm->online_vcpus));
1689 * If the host uses TSC clock, then passthrough TSC as stable
1692 host_tsc_clocksource = kvm_get_time_and_clockread(
1693 &ka->master_kernel_ns,
1694 &ka->master_cycle_now);
1696 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1697 && !backwards_tsc_observed
1698 && !ka->boot_vcpu_runs_old_kvmclock;
1700 if (ka->use_master_clock)
1701 atomic_set(&kvm_guest_has_master_clock, 1);
1703 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1704 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1709 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1711 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1714 static void kvm_gen_update_masterclock(struct kvm *kvm)
1716 #ifdef CONFIG_X86_64
1718 struct kvm_vcpu *vcpu;
1719 struct kvm_arch *ka = &kvm->arch;
1721 spin_lock(&ka->pvclock_gtod_sync_lock);
1722 kvm_make_mclock_inprogress_request(kvm);
1723 /* no guest entries from this point */
1724 pvclock_update_vm_gtod_copy(kvm);
1726 kvm_for_each_vcpu(i, vcpu, kvm)
1727 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1729 /* guest entries allowed */
1730 kvm_for_each_vcpu(i, vcpu, kvm)
1731 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1733 spin_unlock(&ka->pvclock_gtod_sync_lock);
1737 static u64 __get_kvmclock_ns(struct kvm *kvm)
1739 struct kvm_arch *ka = &kvm->arch;
1740 struct pvclock_vcpu_time_info hv_clock;
1742 spin_lock(&ka->pvclock_gtod_sync_lock);
1743 if (!ka->use_master_clock) {
1744 spin_unlock(&ka->pvclock_gtod_sync_lock);
1745 return ktime_get_boot_ns() + ka->kvmclock_offset;
1748 hv_clock.tsc_timestamp = ka->master_cycle_now;
1749 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1750 spin_unlock(&ka->pvclock_gtod_sync_lock);
1752 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1753 &hv_clock.tsc_shift,
1754 &hv_clock.tsc_to_system_mul);
1755 return __pvclock_read_cycles(&hv_clock, rdtsc());
1758 u64 get_kvmclock_ns(struct kvm *kvm)
1760 unsigned long flags;
1763 local_irq_save(flags);
1764 ns = __get_kvmclock_ns(kvm);
1765 local_irq_restore(flags);
1770 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1772 struct kvm_vcpu_arch *vcpu = &v->arch;
1773 struct pvclock_vcpu_time_info guest_hv_clock;
1775 if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1776 &guest_hv_clock, sizeof(guest_hv_clock))))
1779 /* This VCPU is paused, but it's legal for a guest to read another
1780 * VCPU's kvmclock, so we really have to follow the specification where
1781 * it says that version is odd if data is being modified, and even after
1784 * Version field updates must be kept separate. This is because
1785 * kvm_write_guest_cached might use a "rep movs" instruction, and
1786 * writes within a string instruction are weakly ordered. So there
1787 * are three writes overall.
1789 * As a small optimization, only write the version field in the first
1790 * and third write. The vcpu->pv_time cache is still valid, because the
1791 * version field is the first in the struct.
1793 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1795 vcpu->hv_clock.version = guest_hv_clock.version + 1;
1796 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1798 sizeof(vcpu->hv_clock.version));
1802 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1803 vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1805 if (vcpu->pvclock_set_guest_stopped_request) {
1806 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1807 vcpu->pvclock_set_guest_stopped_request = false;
1810 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1812 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1814 sizeof(vcpu->hv_clock));
1818 vcpu->hv_clock.version++;
1819 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1821 sizeof(vcpu->hv_clock.version));
1824 static int kvm_guest_time_update(struct kvm_vcpu *v)
1826 unsigned long flags, tgt_tsc_khz;
1827 struct kvm_vcpu_arch *vcpu = &v->arch;
1828 struct kvm_arch *ka = &v->kvm->arch;
1830 u64 tsc_timestamp, host_tsc;
1832 bool use_master_clock;
1838 * If the host uses TSC clock, then passthrough TSC as stable
1841 spin_lock(&ka->pvclock_gtod_sync_lock);
1842 use_master_clock = ka->use_master_clock;
1843 if (use_master_clock) {
1844 host_tsc = ka->master_cycle_now;
1845 kernel_ns = ka->master_kernel_ns;
1847 spin_unlock(&ka->pvclock_gtod_sync_lock);
1849 /* Keep irq disabled to prevent changes to the clock */
1850 local_irq_save(flags);
1851 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1852 if (unlikely(tgt_tsc_khz == 0)) {
1853 local_irq_restore(flags);
1854 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1857 if (!use_master_clock) {
1859 kernel_ns = ktime_get_boot_ns();
1862 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1865 * We may have to catch up the TSC to match elapsed wall clock
1866 * time for two reasons, even if kvmclock is used.
1867 * 1) CPU could have been running below the maximum TSC rate
1868 * 2) Broken TSC compensation resets the base at each VCPU
1869 * entry to avoid unknown leaps of TSC even when running
1870 * again on the same CPU. This may cause apparent elapsed
1871 * time to disappear, and the guest to stand still or run
1874 if (vcpu->tsc_catchup) {
1875 u64 tsc = compute_guest_tsc(v, kernel_ns);
1876 if (tsc > tsc_timestamp) {
1877 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1878 tsc_timestamp = tsc;
1882 local_irq_restore(flags);
1884 /* With all the info we got, fill in the values */
1886 if (kvm_has_tsc_control)
1887 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1889 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1890 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1891 &vcpu->hv_clock.tsc_shift,
1892 &vcpu->hv_clock.tsc_to_system_mul);
1893 vcpu->hw_tsc_khz = tgt_tsc_khz;
1896 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1897 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1898 vcpu->last_guest_tsc = tsc_timestamp;
1900 /* If the host uses TSC clocksource, then it is stable */
1902 if (use_master_clock)
1903 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1905 vcpu->hv_clock.flags = pvclock_flags;
1907 if (vcpu->pv_time_enabled)
1908 kvm_setup_pvclock_page(v);
1909 if (v == kvm_get_vcpu(v->kvm, 0))
1910 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1915 * kvmclock updates which are isolated to a given vcpu, such as
1916 * vcpu->cpu migration, should not allow system_timestamp from
1917 * the rest of the vcpus to remain static. Otherwise ntp frequency
1918 * correction applies to one vcpu's system_timestamp but not
1921 * So in those cases, request a kvmclock update for all vcpus.
1922 * We need to rate-limit these requests though, as they can
1923 * considerably slow guests that have a large number of vcpus.
1924 * The time for a remote vcpu to update its kvmclock is bound
1925 * by the delay we use to rate-limit the updates.
1928 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1930 static void kvmclock_update_fn(struct work_struct *work)
1933 struct delayed_work *dwork = to_delayed_work(work);
1934 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1935 kvmclock_update_work);
1936 struct kvm *kvm = container_of(ka, struct kvm, arch);
1937 struct kvm_vcpu *vcpu;
1939 kvm_for_each_vcpu(i, vcpu, kvm) {
1940 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1941 kvm_vcpu_kick(vcpu);
1945 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1947 struct kvm *kvm = v->kvm;
1949 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1950 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1951 KVMCLOCK_UPDATE_DELAY);
1954 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1956 static void kvmclock_sync_fn(struct work_struct *work)
1958 struct delayed_work *dwork = to_delayed_work(work);
1959 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1960 kvmclock_sync_work);
1961 struct kvm *kvm = container_of(ka, struct kvm, arch);
1963 if (!kvmclock_periodic_sync)
1966 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1967 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1968 KVMCLOCK_SYNC_PERIOD);
1971 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1973 u64 mcg_cap = vcpu->arch.mcg_cap;
1974 unsigned bank_num = mcg_cap & 0xff;
1977 case MSR_IA32_MCG_STATUS:
1978 vcpu->arch.mcg_status = data;
1980 case MSR_IA32_MCG_CTL:
1981 if (!(mcg_cap & MCG_CTL_P))
1983 if (data != 0 && data != ~(u64)0)
1985 vcpu->arch.mcg_ctl = data;
1988 if (msr >= MSR_IA32_MC0_CTL &&
1989 msr < MSR_IA32_MCx_CTL(bank_num)) {
1990 u32 offset = msr - MSR_IA32_MC0_CTL;
1991 /* only 0 or all 1s can be written to IA32_MCi_CTL
1992 * some Linux kernels though clear bit 10 in bank 4 to
1993 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1994 * this to avoid an uncatched #GP in the guest
1996 if ((offset & 0x3) == 0 &&
1997 data != 0 && (data | (1 << 10)) != ~(u64)0)
1999 vcpu->arch.mce_banks[offset] = data;
2007 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2009 struct kvm *kvm = vcpu->kvm;
2010 int lm = is_long_mode(vcpu);
2011 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2012 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2013 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2014 : kvm->arch.xen_hvm_config.blob_size_32;
2015 u32 page_num = data & ~PAGE_MASK;
2016 u64 page_addr = data & PAGE_MASK;
2021 if (page_num >= blob_size)
2024 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2029 if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2038 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2040 gpa_t gpa = data & ~0x3f;
2042 /* Bits 2:5 are reserved, Should be zero */
2046 vcpu->arch.apf.msr_val = data;
2048 if (!(data & KVM_ASYNC_PF_ENABLED)) {
2049 kvm_clear_async_pf_completion_queue(vcpu);
2050 kvm_async_pf_hash_reset(vcpu);
2054 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2058 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2059 kvm_async_pf_wakeup_all(vcpu);
2063 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2065 vcpu->arch.pv_time_enabled = false;
2068 static void record_steal_time(struct kvm_vcpu *vcpu)
2070 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2073 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2074 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2077 vcpu->arch.st.steal.preempted = 0;
2079 if (vcpu->arch.st.steal.version & 1)
2080 vcpu->arch.st.steal.version += 1; /* first time write, random junk */
2082 vcpu->arch.st.steal.version += 1;
2084 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2085 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2089 vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2090 vcpu->arch.st.last_steal;
2091 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2093 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2094 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2098 vcpu->arch.st.steal.version += 1;
2100 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2101 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2104 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2107 u32 msr = msr_info->index;
2108 u64 data = msr_info->data;
2111 case MSR_AMD64_NB_CFG:
2112 case MSR_IA32_UCODE_REV:
2113 case MSR_IA32_UCODE_WRITE:
2114 case MSR_VM_HSAVE_PA:
2115 case MSR_AMD64_PATCH_LOADER:
2116 case MSR_AMD64_BU_CFG2:
2120 return set_efer(vcpu, data);
2122 data &= ~(u64)0x40; /* ignore flush filter disable */
2123 data &= ~(u64)0x100; /* ignore ignne emulation enable */
2124 data &= ~(u64)0x8; /* ignore TLB cache disable */
2125 data &= ~(u64)0x40000; /* ignore Mc status write enable */
2127 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2132 case MSR_FAM10H_MMIO_CONF_BASE:
2134 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2139 case MSR_IA32_DEBUGCTLMSR:
2141 /* We support the non-activated case already */
2143 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2144 /* Values other than LBR and BTF are vendor-specific,
2145 thus reserved and should throw a #GP */
2148 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2151 case 0x200 ... 0x2ff:
2152 return kvm_mtrr_set_msr(vcpu, msr, data);
2153 case MSR_IA32_APICBASE:
2154 return kvm_set_apic_base(vcpu, msr_info);
2155 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2156 return kvm_x2apic_msr_write(vcpu, msr, data);
2157 case MSR_IA32_TSCDEADLINE:
2158 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2160 case MSR_IA32_TSC_ADJUST:
2161 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2162 if (!msr_info->host_initiated) {
2163 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2164 adjust_tsc_offset_guest(vcpu, adj);
2166 vcpu->arch.ia32_tsc_adjust_msr = data;
2169 case MSR_IA32_MISC_ENABLE:
2170 vcpu->arch.ia32_misc_enable_msr = data;
2172 case MSR_IA32_SMBASE:
2173 if (!msr_info->host_initiated)
2175 vcpu->arch.smbase = data;
2177 case MSR_KVM_WALL_CLOCK_NEW:
2178 case MSR_KVM_WALL_CLOCK:
2179 vcpu->kvm->arch.wall_clock = data;
2180 kvm_write_wall_clock(vcpu->kvm, data);
2182 case MSR_KVM_SYSTEM_TIME_NEW:
2183 case MSR_KVM_SYSTEM_TIME: {
2184 struct kvm_arch *ka = &vcpu->kvm->arch;
2186 kvmclock_reset(vcpu);
2188 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2189 bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2191 if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2192 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2195 ka->boot_vcpu_runs_old_kvmclock = tmp;
2198 vcpu->arch.time = data;
2199 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2201 /* we verify if the enable bit is set... */
2205 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2206 &vcpu->arch.pv_time, data & ~1ULL,
2207 sizeof(struct pvclock_vcpu_time_info)))
2208 vcpu->arch.pv_time_enabled = false;
2210 vcpu->arch.pv_time_enabled = true;
2214 case MSR_KVM_ASYNC_PF_EN:
2215 if (kvm_pv_enable_async_pf(vcpu, data))
2218 case MSR_KVM_STEAL_TIME:
2220 if (unlikely(!sched_info_on()))
2223 if (data & KVM_STEAL_RESERVED_MASK)
2226 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2227 data & KVM_STEAL_VALID_BITS,
2228 sizeof(struct kvm_steal_time)))
2231 vcpu->arch.st.msr_val = data;
2233 if (!(data & KVM_MSR_ENABLED))
2236 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2239 case MSR_KVM_PV_EOI_EN:
2240 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2244 case MSR_IA32_MCG_CTL:
2245 case MSR_IA32_MCG_STATUS:
2246 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2247 return set_msr_mce(vcpu, msr, data);
2249 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2250 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2251 pr = true; /* fall through */
2252 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2253 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2254 if (kvm_pmu_is_valid_msr(vcpu, msr))
2255 return kvm_pmu_set_msr(vcpu, msr_info);
2257 if (pr || data != 0)
2258 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2259 "0x%x data 0x%llx\n", msr, data);
2261 case MSR_K7_CLK_CTL:
2263 * Ignore all writes to this no longer documented MSR.
2264 * Writes are only relevant for old K7 processors,
2265 * all pre-dating SVM, but a recommended workaround from
2266 * AMD for these chips. It is possible to specify the
2267 * affected processor models on the command line, hence
2268 * the need to ignore the workaround.
2271 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2272 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2273 case HV_X64_MSR_CRASH_CTL:
2274 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2275 return kvm_hv_set_msr_common(vcpu, msr, data,
2276 msr_info->host_initiated);
2277 case MSR_IA32_BBL_CR_CTL3:
2278 /* Drop writes to this legacy MSR -- see rdmsr
2279 * counterpart for further detail.
2281 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2283 case MSR_AMD64_OSVW_ID_LENGTH:
2284 if (!guest_cpuid_has_osvw(vcpu))
2286 vcpu->arch.osvw.length = data;
2288 case MSR_AMD64_OSVW_STATUS:
2289 if (!guest_cpuid_has_osvw(vcpu))
2291 vcpu->arch.osvw.status = data;
2294 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2295 return xen_hvm_config(vcpu, data);
2296 if (kvm_pmu_is_valid_msr(vcpu, msr))
2297 return kvm_pmu_set_msr(vcpu, msr_info);
2299 vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2303 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2310 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2314 * Reads an msr value (of 'msr_index') into 'pdata'.
2315 * Returns 0 on success, non-0 otherwise.
2316 * Assumes vcpu_load() was already called.
2318 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2320 return kvm_x86_ops->get_msr(vcpu, msr);
2322 EXPORT_SYMBOL_GPL(kvm_get_msr);
2324 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2327 u64 mcg_cap = vcpu->arch.mcg_cap;
2328 unsigned bank_num = mcg_cap & 0xff;
2331 case MSR_IA32_P5_MC_ADDR:
2332 case MSR_IA32_P5_MC_TYPE:
2335 case MSR_IA32_MCG_CAP:
2336 data = vcpu->arch.mcg_cap;
2338 case MSR_IA32_MCG_CTL:
2339 if (!(mcg_cap & MCG_CTL_P))
2341 data = vcpu->arch.mcg_ctl;
2343 case MSR_IA32_MCG_STATUS:
2344 data = vcpu->arch.mcg_status;
2347 if (msr >= MSR_IA32_MC0_CTL &&
2348 msr < MSR_IA32_MCx_CTL(bank_num)) {
2349 u32 offset = msr - MSR_IA32_MC0_CTL;
2350 data = vcpu->arch.mce_banks[offset];
2359 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2361 switch (msr_info->index) {
2362 case MSR_IA32_PLATFORM_ID:
2363 case MSR_IA32_EBL_CR_POWERON:
2364 case MSR_IA32_DEBUGCTLMSR:
2365 case MSR_IA32_LASTBRANCHFROMIP:
2366 case MSR_IA32_LASTBRANCHTOIP:
2367 case MSR_IA32_LASTINTFROMIP:
2368 case MSR_IA32_LASTINTTOIP:
2370 case MSR_K8_TSEG_ADDR:
2371 case MSR_K8_TSEG_MASK:
2373 case MSR_VM_HSAVE_PA:
2374 case MSR_K8_INT_PENDING_MSG:
2375 case MSR_AMD64_NB_CFG:
2376 case MSR_FAM10H_MMIO_CONF_BASE:
2377 case MSR_AMD64_BU_CFG2:
2378 case MSR_IA32_PERF_CTL:
2381 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2382 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2383 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2384 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2385 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2386 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2389 case MSR_IA32_UCODE_REV:
2390 msr_info->data = 0x100000000ULL;
2393 case 0x200 ... 0x2ff:
2394 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2395 case 0xcd: /* fsb frequency */
2399 * MSR_EBC_FREQUENCY_ID
2400 * Conservative value valid for even the basic CPU models.
2401 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2402 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2403 * and 266MHz for model 3, or 4. Set Core Clock
2404 * Frequency to System Bus Frequency Ratio to 1 (bits
2405 * 31:24) even though these are only valid for CPU
2406 * models > 2, however guests may end up dividing or
2407 * multiplying by zero otherwise.
2409 case MSR_EBC_FREQUENCY_ID:
2410 msr_info->data = 1 << 24;
2412 case MSR_IA32_APICBASE:
2413 msr_info->data = kvm_get_apic_base(vcpu);
2415 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2416 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2418 case MSR_IA32_TSCDEADLINE:
2419 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2421 case MSR_IA32_TSC_ADJUST:
2422 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2424 case MSR_IA32_MISC_ENABLE:
2425 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2427 case MSR_IA32_SMBASE:
2428 if (!msr_info->host_initiated)
2430 msr_info->data = vcpu->arch.smbase;
2432 case MSR_IA32_PERF_STATUS:
2433 /* TSC increment by tick */
2434 msr_info->data = 1000ULL;
2435 /* CPU multiplier */
2436 msr_info->data |= (((uint64_t)4ULL) << 40);
2439 msr_info->data = vcpu->arch.efer;
2441 case MSR_KVM_WALL_CLOCK:
2442 case MSR_KVM_WALL_CLOCK_NEW:
2443 msr_info->data = vcpu->kvm->arch.wall_clock;
2445 case MSR_KVM_SYSTEM_TIME:
2446 case MSR_KVM_SYSTEM_TIME_NEW:
2447 msr_info->data = vcpu->arch.time;
2449 case MSR_KVM_ASYNC_PF_EN:
2450 msr_info->data = vcpu->arch.apf.msr_val;
2452 case MSR_KVM_STEAL_TIME:
2453 msr_info->data = vcpu->arch.st.msr_val;
2455 case MSR_KVM_PV_EOI_EN:
2456 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2458 case MSR_IA32_P5_MC_ADDR:
2459 case MSR_IA32_P5_MC_TYPE:
2460 case MSR_IA32_MCG_CAP:
2461 case MSR_IA32_MCG_CTL:
2462 case MSR_IA32_MCG_STATUS:
2463 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2464 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2465 case MSR_K7_CLK_CTL:
2467 * Provide expected ramp-up count for K7. All other
2468 * are set to zero, indicating minimum divisors for
2471 * This prevents guest kernels on AMD host with CPU
2472 * type 6, model 8 and higher from exploding due to
2473 * the rdmsr failing.
2475 msr_info->data = 0x20000000;
2477 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2478 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2479 case HV_X64_MSR_CRASH_CTL:
2480 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2481 return kvm_hv_get_msr_common(vcpu,
2482 msr_info->index, &msr_info->data);
2484 case MSR_IA32_BBL_CR_CTL3:
2485 /* This legacy MSR exists but isn't fully documented in current
2486 * silicon. It is however accessed by winxp in very narrow
2487 * scenarios where it sets bit #19, itself documented as
2488 * a "reserved" bit. Best effort attempt to source coherent
2489 * read data here should the balance of the register be
2490 * interpreted by the guest:
2492 * L2 cache control register 3: 64GB range, 256KB size,
2493 * enabled, latency 0x1, configured
2495 msr_info->data = 0xbe702111;
2497 case MSR_AMD64_OSVW_ID_LENGTH:
2498 if (!guest_cpuid_has_osvw(vcpu))
2500 msr_info->data = vcpu->arch.osvw.length;
2502 case MSR_AMD64_OSVW_STATUS:
2503 if (!guest_cpuid_has_osvw(vcpu))
2505 msr_info->data = vcpu->arch.osvw.status;
2508 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2509 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2511 vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2515 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2522 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2525 * Read or write a bunch of msrs. All parameters are kernel addresses.
2527 * @return number of msrs set successfully.
2529 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2530 struct kvm_msr_entry *entries,
2531 int (*do_msr)(struct kvm_vcpu *vcpu,
2532 unsigned index, u64 *data))
2536 idx = srcu_read_lock(&vcpu->kvm->srcu);
2537 for (i = 0; i < msrs->nmsrs; ++i)
2538 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2540 srcu_read_unlock(&vcpu->kvm->srcu, idx);
2546 * Read or write a bunch of msrs. Parameters are user addresses.
2548 * @return number of msrs set successfully.
2550 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2551 int (*do_msr)(struct kvm_vcpu *vcpu,
2552 unsigned index, u64 *data),
2555 struct kvm_msrs msrs;
2556 struct kvm_msr_entry *entries;
2561 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2565 if (msrs.nmsrs >= MAX_IO_MSRS)
2568 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2569 entries = memdup_user(user_msrs->entries, size);
2570 if (IS_ERR(entries)) {
2571 r = PTR_ERR(entries);
2575 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2580 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2591 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2596 case KVM_CAP_IRQCHIP:
2598 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2599 case KVM_CAP_SET_TSS_ADDR:
2600 case KVM_CAP_EXT_CPUID:
2601 case KVM_CAP_EXT_EMUL_CPUID:
2602 case KVM_CAP_CLOCKSOURCE:
2604 case KVM_CAP_NOP_IO_DELAY:
2605 case KVM_CAP_MP_STATE:
2606 case KVM_CAP_SYNC_MMU:
2607 case KVM_CAP_USER_NMI:
2608 case KVM_CAP_REINJECT_CONTROL:
2609 case KVM_CAP_IRQ_INJECT_STATUS:
2610 case KVM_CAP_IOEVENTFD:
2611 case KVM_CAP_IOEVENTFD_NO_LENGTH:
2613 case KVM_CAP_PIT_STATE2:
2614 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2615 case KVM_CAP_XEN_HVM:
2616 case KVM_CAP_VCPU_EVENTS:
2617 case KVM_CAP_HYPERV:
2618 case KVM_CAP_HYPERV_VAPIC:
2619 case KVM_CAP_HYPERV_SPIN:
2620 case KVM_CAP_HYPERV_SYNIC:
2621 case KVM_CAP_PCI_SEGMENT:
2622 case KVM_CAP_DEBUGREGS:
2623 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2625 case KVM_CAP_ASYNC_PF:
2626 case KVM_CAP_GET_TSC_KHZ:
2627 case KVM_CAP_KVMCLOCK_CTRL:
2628 case KVM_CAP_READONLY_MEM:
2629 case KVM_CAP_HYPERV_TIME:
2630 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2631 case KVM_CAP_TSC_DEADLINE_TIMER:
2632 case KVM_CAP_ENABLE_CAP_VM:
2633 case KVM_CAP_DISABLE_QUIRKS:
2634 case KVM_CAP_SET_BOOT_CPU_ID:
2635 case KVM_CAP_SPLIT_IRQCHIP:
2636 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2637 case KVM_CAP_ASSIGN_DEV_IRQ:
2638 case KVM_CAP_PCI_2_3:
2642 case KVM_CAP_ADJUST_CLOCK:
2643 r = KVM_CLOCK_TSC_STABLE;
2645 case KVM_CAP_X86_SMM:
2646 /* SMBASE is usually relocated above 1M on modern chipsets,
2647 * and SMM handlers might indeed rely on 4G segment limits,
2648 * so do not report SMM to be available if real mode is
2649 * emulated via vm86 mode. Still, do not go to great lengths
2650 * to avoid userspace's usage of the feature, because it is a
2651 * fringe case that is not enabled except via specific settings
2652 * of the module parameters.
2654 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2656 case KVM_CAP_COALESCED_MMIO:
2657 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2660 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2662 case KVM_CAP_NR_VCPUS:
2663 r = KVM_SOFT_MAX_VCPUS;
2665 case KVM_CAP_MAX_VCPUS:
2668 case KVM_CAP_NR_MEMSLOTS:
2669 r = KVM_USER_MEM_SLOTS;
2671 case KVM_CAP_PV_MMU: /* obsolete */
2674 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2676 r = iommu_present(&pci_bus_type);
2680 r = KVM_MAX_MCE_BANKS;
2683 r = boot_cpu_has(X86_FEATURE_XSAVE);
2685 case KVM_CAP_TSC_CONTROL:
2686 r = kvm_has_tsc_control;
2688 case KVM_CAP_X2APIC_API:
2689 r = KVM_X2APIC_API_VALID_FLAGS;
2699 long kvm_arch_dev_ioctl(struct file *filp,
2700 unsigned int ioctl, unsigned long arg)
2702 void __user *argp = (void __user *)arg;
2706 case KVM_GET_MSR_INDEX_LIST: {
2707 struct kvm_msr_list __user *user_msr_list = argp;
2708 struct kvm_msr_list msr_list;
2712 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2715 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2716 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2719 if (n < msr_list.nmsrs)
2722 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2723 num_msrs_to_save * sizeof(u32)))
2725 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2727 num_emulated_msrs * sizeof(u32)))
2732 case KVM_GET_SUPPORTED_CPUID:
2733 case KVM_GET_EMULATED_CPUID: {
2734 struct kvm_cpuid2 __user *cpuid_arg = argp;
2735 struct kvm_cpuid2 cpuid;
2738 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2741 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2747 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2752 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2754 if (copy_to_user(argp, &kvm_mce_cap_supported,
2755 sizeof(kvm_mce_cap_supported)))
2767 static void wbinvd_ipi(void *garbage)
2772 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2774 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2777 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2779 set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2782 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2784 /* Address WBINVD may be executed by guest */
2785 if (need_emulate_wbinvd(vcpu)) {
2786 if (kvm_x86_ops->has_wbinvd_exit())
2787 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2788 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2789 smp_call_function_single(vcpu->cpu,
2790 wbinvd_ipi, NULL, 1);
2793 kvm_x86_ops->vcpu_load(vcpu, cpu);
2795 /* Apply any externally detected TSC adjustments (due to suspend) */
2796 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2797 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2798 vcpu->arch.tsc_offset_adjustment = 0;
2799 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2802 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2803 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2804 rdtsc() - vcpu->arch.last_host_tsc;
2806 mark_tsc_unstable("KVM discovered backwards TSC");
2808 if (check_tsc_unstable()) {
2809 u64 offset = kvm_compute_tsc_offset(vcpu,
2810 vcpu->arch.last_guest_tsc);
2811 kvm_vcpu_write_tsc_offset(vcpu, offset);
2812 vcpu->arch.tsc_catchup = 1;
2814 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2815 kvm_x86_ops->set_hv_timer(vcpu,
2816 kvm_get_lapic_target_expiration_tsc(vcpu)))
2817 kvm_lapic_switch_to_sw_timer(vcpu);
2819 * On a host with synchronized TSC, there is no need to update
2820 * kvmclock on vcpu->cpu migration
2822 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2823 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2824 if (vcpu->cpu != cpu)
2825 kvm_migrate_timers(vcpu);
2829 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2832 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2834 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2837 vcpu->arch.st.steal.preempted = 1;
2839 kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2840 &vcpu->arch.st.steal.preempted,
2841 offsetof(struct kvm_steal_time, preempted),
2842 sizeof(vcpu->arch.st.steal.preempted));
2845 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2849 * Disable page faults because we're in atomic context here.
2850 * kvm_write_guest_offset_cached() would call might_fault()
2851 * that relies on pagefault_disable() to tell if there's a
2852 * bug. NOTE: the write to guest memory may not go through if
2853 * during postcopy live migration or if there's heavy guest
2856 pagefault_disable();
2858 * kvm_memslots() will be called by
2859 * kvm_write_guest_offset_cached() so take the srcu lock.
2861 idx = srcu_read_lock(&vcpu->kvm->srcu);
2862 kvm_steal_time_set_preempted(vcpu);
2863 srcu_read_unlock(&vcpu->kvm->srcu, idx);
2865 kvm_x86_ops->vcpu_put(vcpu);
2866 kvm_put_guest_fpu(vcpu);
2867 vcpu->arch.last_host_tsc = rdtsc();
2870 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2871 struct kvm_lapic_state *s)
2873 if (vcpu->arch.apicv_active)
2874 kvm_x86_ops->sync_pir_to_irr(vcpu);
2876 return kvm_apic_get_state(vcpu, s);
2879 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2880 struct kvm_lapic_state *s)
2884 r = kvm_apic_set_state(vcpu, s);
2887 update_cr8_intercept(vcpu);
2892 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2894 return (!lapic_in_kernel(vcpu) ||
2895 kvm_apic_accept_pic_intr(vcpu));
2899 * if userspace requested an interrupt window, check that the
2900 * interrupt window is open.
2902 * No need to exit to userspace if we already have an interrupt queued.
2904 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2906 return kvm_arch_interrupt_allowed(vcpu) &&
2907 !kvm_cpu_has_interrupt(vcpu) &&
2908 !kvm_event_needs_reinjection(vcpu) &&
2909 kvm_cpu_accept_dm_intr(vcpu);
2912 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2913 struct kvm_interrupt *irq)
2915 if (irq->irq >= KVM_NR_INTERRUPTS)
2918 if (!irqchip_in_kernel(vcpu->kvm)) {
2919 kvm_queue_interrupt(vcpu, irq->irq, false);
2920 kvm_make_request(KVM_REQ_EVENT, vcpu);
2925 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2926 * fail for in-kernel 8259.
2928 if (pic_in_kernel(vcpu->kvm))
2931 if (vcpu->arch.pending_external_vector != -1)
2934 vcpu->arch.pending_external_vector = irq->irq;
2935 kvm_make_request(KVM_REQ_EVENT, vcpu);
2939 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2941 kvm_inject_nmi(vcpu);
2946 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2948 kvm_make_request(KVM_REQ_SMI, vcpu);
2953 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2954 struct kvm_tpr_access_ctl *tac)
2958 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2962 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2966 unsigned bank_num = mcg_cap & 0xff, bank;
2969 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2971 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
2974 vcpu->arch.mcg_cap = mcg_cap;
2975 /* Init IA32_MCG_CTL to all 1s */
2976 if (mcg_cap & MCG_CTL_P)
2977 vcpu->arch.mcg_ctl = ~(u64)0;
2978 /* Init IA32_MCi_CTL to all 1s */
2979 for (bank = 0; bank < bank_num; bank++)
2980 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2982 if (kvm_x86_ops->setup_mce)
2983 kvm_x86_ops->setup_mce(vcpu);
2988 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2989 struct kvm_x86_mce *mce)
2991 u64 mcg_cap = vcpu->arch.mcg_cap;
2992 unsigned bank_num = mcg_cap & 0xff;
2993 u64 *banks = vcpu->arch.mce_banks;
2995 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2998 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2999 * reporting is disabled
3001 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3002 vcpu->arch.mcg_ctl != ~(u64)0)
3004 banks += 4 * mce->bank;
3006 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3007 * reporting is disabled for the bank
3009 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3011 if (mce->status & MCI_STATUS_UC) {
3012 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3013 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3014 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3017 if (banks[1] & MCI_STATUS_VAL)
3018 mce->status |= MCI_STATUS_OVER;
3019 banks[2] = mce->addr;
3020 banks[3] = mce->misc;
3021 vcpu->arch.mcg_status = mce->mcg_status;
3022 banks[1] = mce->status;
3023 kvm_queue_exception(vcpu, MC_VECTOR);
3024 } else if (!(banks[1] & MCI_STATUS_VAL)
3025 || !(banks[1] & MCI_STATUS_UC)) {
3026 if (banks[1] & MCI_STATUS_VAL)
3027 mce->status |= MCI_STATUS_OVER;
3028 banks[2] = mce->addr;
3029 banks[3] = mce->misc;
3030 banks[1] = mce->status;
3032 banks[1] |= MCI_STATUS_OVER;
3036 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3037 struct kvm_vcpu_events *events)
3040 events->exception.injected =
3041 vcpu->arch.exception.pending &&
3042 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3043 events->exception.nr = vcpu->arch.exception.nr;
3044 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3045 events->exception.pad = 0;
3046 events->exception.error_code = vcpu->arch.exception.error_code;
3048 events->interrupt.injected =
3049 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3050 events->interrupt.nr = vcpu->arch.interrupt.nr;
3051 events->interrupt.soft = 0;
3052 events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3054 events->nmi.injected = vcpu->arch.nmi_injected;
3055 events->nmi.pending = vcpu->arch.nmi_pending != 0;
3056 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3057 events->nmi.pad = 0;
3059 events->sipi_vector = 0; /* never valid when reporting to user space */
3061 events->smi.smm = is_smm(vcpu);
3062 events->smi.pending = vcpu->arch.smi_pending;
3063 events->smi.smm_inside_nmi =
3064 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3065 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3067 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3068 | KVM_VCPUEVENT_VALID_SHADOW
3069 | KVM_VCPUEVENT_VALID_SMM);
3070 memset(&events->reserved, 0, sizeof(events->reserved));
3073 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3075 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3076 struct kvm_vcpu_events *events)
3078 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3079 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3080 | KVM_VCPUEVENT_VALID_SHADOW
3081 | KVM_VCPUEVENT_VALID_SMM))
3084 if (events->exception.injected &&
3085 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3089 vcpu->arch.exception.pending = events->exception.injected;
3090 vcpu->arch.exception.nr = events->exception.nr;
3091 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3092 vcpu->arch.exception.error_code = events->exception.error_code;
3094 vcpu->arch.interrupt.pending = events->interrupt.injected;
3095 vcpu->arch.interrupt.nr = events->interrupt.nr;
3096 vcpu->arch.interrupt.soft = events->interrupt.soft;
3097 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3098 kvm_x86_ops->set_interrupt_shadow(vcpu,
3099 events->interrupt.shadow);
3101 vcpu->arch.nmi_injected = events->nmi.injected;
3102 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3103 vcpu->arch.nmi_pending = events->nmi.pending;
3104 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3106 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3107 lapic_in_kernel(vcpu))
3108 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3110 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3111 u32 hflags = vcpu->arch.hflags;
3112 if (events->smi.smm)
3113 hflags |= HF_SMM_MASK;
3115 hflags &= ~HF_SMM_MASK;
3116 kvm_set_hflags(vcpu, hflags);
3118 vcpu->arch.smi_pending = events->smi.pending;
3119 if (events->smi.smm_inside_nmi)
3120 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3122 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3123 if (lapic_in_kernel(vcpu)) {
3124 if (events->smi.latched_init)
3125 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3127 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3131 kvm_make_request(KVM_REQ_EVENT, vcpu);
3136 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3137 struct kvm_debugregs *dbgregs)
3141 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3142 kvm_get_dr(vcpu, 6, &val);
3144 dbgregs->dr7 = vcpu->arch.dr7;
3146 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3149 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3150 struct kvm_debugregs *dbgregs)
3155 if (dbgregs->dr6 & ~0xffffffffull)
3157 if (dbgregs->dr7 & ~0xffffffffull)
3160 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3161 kvm_update_dr0123(vcpu);
3162 vcpu->arch.dr6 = dbgregs->dr6;
3163 kvm_update_dr6(vcpu);
3164 vcpu->arch.dr7 = dbgregs->dr7;
3165 kvm_update_dr7(vcpu);
3170 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3172 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3174 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3175 u64 xstate_bv = xsave->header.xfeatures;
3179 * Copy legacy XSAVE area, to avoid complications with CPUID
3180 * leaves 0 and 1 in the loop below.
3182 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3185 xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3186 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3189 * Copy each region from the possibly compacted offset to the
3190 * non-compacted offset.
3192 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3194 u64 feature = valid & -valid;
3195 int index = fls64(feature) - 1;
3196 void *src = get_xsave_addr(xsave, feature);
3199 u32 size, offset, ecx, edx;
3200 cpuid_count(XSTATE_CPUID, index,
3201 &size, &offset, &ecx, &edx);
3202 memcpy(dest + offset, src, size);
3209 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3211 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3212 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3216 * Copy legacy XSAVE area, to avoid complications with CPUID
3217 * leaves 0 and 1 in the loop below.
3219 memcpy(xsave, src, XSAVE_HDR_OFFSET);
3221 /* Set XSTATE_BV and possibly XCOMP_BV. */
3222 xsave->header.xfeatures = xstate_bv;
3223 if (boot_cpu_has(X86_FEATURE_XSAVES))
3224 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3227 * Copy each region from the non-compacted offset to the
3228 * possibly compacted offset.
3230 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3232 u64 feature = valid & -valid;
3233 int index = fls64(feature) - 1;
3234 void *dest = get_xsave_addr(xsave, feature);
3237 u32 size, offset, ecx, edx;
3238 cpuid_count(XSTATE_CPUID, index,
3239 &size, &offset, &ecx, &edx);
3240 memcpy(dest, src + offset, size);
3247 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3248 struct kvm_xsave *guest_xsave)
3250 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3251 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3252 fill_xsave((u8 *) guest_xsave->region, vcpu);
3254 memcpy(guest_xsave->region,
3255 &vcpu->arch.guest_fpu.state.fxsave,
3256 sizeof(struct fxregs_state));
3257 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3258 XFEATURE_MASK_FPSSE;
3262 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3263 struct kvm_xsave *guest_xsave)
3266 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3268 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3270 * Here we allow setting states that are not present in
3271 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3272 * with old userspace.
3274 if (xstate_bv & ~kvm_supported_xcr0())
3276 load_xsave(vcpu, (u8 *)guest_xsave->region);
3278 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3280 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3281 guest_xsave->region, sizeof(struct fxregs_state));
3286 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3287 struct kvm_xcrs *guest_xcrs)
3289 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3290 guest_xcrs->nr_xcrs = 0;
3294 guest_xcrs->nr_xcrs = 1;
3295 guest_xcrs->flags = 0;
3296 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3297 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3300 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3301 struct kvm_xcrs *guest_xcrs)
3305 if (!boot_cpu_has(X86_FEATURE_XSAVE))
3308 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3311 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3312 /* Only support XCR0 currently */
3313 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3314 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3315 guest_xcrs->xcrs[i].value);
3324 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3325 * stopped by the hypervisor. This function will be called from the host only.
3326 * EINVAL is returned when the host attempts to set the flag for a guest that
3327 * does not support pv clocks.
3329 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3331 if (!vcpu->arch.pv_time_enabled)
3333 vcpu->arch.pvclock_set_guest_stopped_request = true;
3334 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3338 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3339 struct kvm_enable_cap *cap)
3345 case KVM_CAP_HYPERV_SYNIC:
3346 if (!irqchip_in_kernel(vcpu->kvm))
3348 return kvm_hv_activate_synic(vcpu);
3354 long kvm_arch_vcpu_ioctl(struct file *filp,
3355 unsigned int ioctl, unsigned long arg)
3357 struct kvm_vcpu *vcpu = filp->private_data;
3358 void __user *argp = (void __user *)arg;
3361 struct kvm_lapic_state *lapic;
3362 struct kvm_xsave *xsave;
3363 struct kvm_xcrs *xcrs;
3369 case KVM_GET_LAPIC: {
3371 if (!lapic_in_kernel(vcpu))
3373 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3378 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3382 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3387 case KVM_SET_LAPIC: {
3389 if (!lapic_in_kernel(vcpu))
3391 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3392 if (IS_ERR(u.lapic))
3393 return PTR_ERR(u.lapic);
3395 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3398 case KVM_INTERRUPT: {
3399 struct kvm_interrupt irq;
3402 if (copy_from_user(&irq, argp, sizeof irq))
3404 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3408 r = kvm_vcpu_ioctl_nmi(vcpu);
3412 r = kvm_vcpu_ioctl_smi(vcpu);
3415 case KVM_SET_CPUID: {
3416 struct kvm_cpuid __user *cpuid_arg = argp;
3417 struct kvm_cpuid cpuid;
3420 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3422 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3425 case KVM_SET_CPUID2: {
3426 struct kvm_cpuid2 __user *cpuid_arg = argp;
3427 struct kvm_cpuid2 cpuid;
3430 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3432 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3433 cpuid_arg->entries);
3436 case KVM_GET_CPUID2: {
3437 struct kvm_cpuid2 __user *cpuid_arg = argp;
3438 struct kvm_cpuid2 cpuid;
3441 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3443 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3444 cpuid_arg->entries);
3448 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3454 r = msr_io(vcpu, argp, do_get_msr, 1);
3457 r = msr_io(vcpu, argp, do_set_msr, 0);
3459 case KVM_TPR_ACCESS_REPORTING: {
3460 struct kvm_tpr_access_ctl tac;
3463 if (copy_from_user(&tac, argp, sizeof tac))
3465 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3469 if (copy_to_user(argp, &tac, sizeof tac))
3474 case KVM_SET_VAPIC_ADDR: {
3475 struct kvm_vapic_addr va;
3479 if (!lapic_in_kernel(vcpu))
3482 if (copy_from_user(&va, argp, sizeof va))
3484 idx = srcu_read_lock(&vcpu->kvm->srcu);
3485 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3486 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3489 case KVM_X86_SETUP_MCE: {
3493 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3495 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3498 case KVM_X86_SET_MCE: {
3499 struct kvm_x86_mce mce;
3502 if (copy_from_user(&mce, argp, sizeof mce))
3504 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3507 case KVM_GET_VCPU_EVENTS: {
3508 struct kvm_vcpu_events events;
3510 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3513 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3518 case KVM_SET_VCPU_EVENTS: {
3519 struct kvm_vcpu_events events;
3522 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3525 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3528 case KVM_GET_DEBUGREGS: {
3529 struct kvm_debugregs dbgregs;
3531 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3534 if (copy_to_user(argp, &dbgregs,
3535 sizeof(struct kvm_debugregs)))
3540 case KVM_SET_DEBUGREGS: {
3541 struct kvm_debugregs dbgregs;
3544 if (copy_from_user(&dbgregs, argp,
3545 sizeof(struct kvm_debugregs)))
3548 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3551 case KVM_GET_XSAVE: {
3552 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3557 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3560 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3565 case KVM_SET_XSAVE: {
3566 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3567 if (IS_ERR(u.xsave))
3568 return PTR_ERR(u.xsave);
3570 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3573 case KVM_GET_XCRS: {
3574 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3579 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3582 if (copy_to_user(argp, u.xcrs,
3583 sizeof(struct kvm_xcrs)))
3588 case KVM_SET_XCRS: {
3589 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3591 return PTR_ERR(u.xcrs);
3593 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3596 case KVM_SET_TSC_KHZ: {
3600 user_tsc_khz = (u32)arg;
3602 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3605 if (user_tsc_khz == 0)
3606 user_tsc_khz = tsc_khz;
3608 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3613 case KVM_GET_TSC_KHZ: {
3614 r = vcpu->arch.virtual_tsc_khz;
3617 case KVM_KVMCLOCK_CTRL: {
3618 r = kvm_set_guest_paused(vcpu);
3621 case KVM_ENABLE_CAP: {
3622 struct kvm_enable_cap cap;
3625 if (copy_from_user(&cap, argp, sizeof(cap)))
3627 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3638 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3640 return VM_FAULT_SIGBUS;
3643 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3647 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3649 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3653 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3656 kvm->arch.ept_identity_map_addr = ident_addr;
3660 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3661 u32 kvm_nr_mmu_pages)
3663 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3666 mutex_lock(&kvm->slots_lock);
3668 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3669 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3671 mutex_unlock(&kvm->slots_lock);
3675 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3677 return kvm->arch.n_max_mmu_pages;
3680 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3685 switch (chip->chip_id) {
3686 case KVM_IRQCHIP_PIC_MASTER:
3687 memcpy(&chip->chip.pic,
3688 &pic_irqchip(kvm)->pics[0],
3689 sizeof(struct kvm_pic_state));
3691 case KVM_IRQCHIP_PIC_SLAVE:
3692 memcpy(&chip->chip.pic,
3693 &pic_irqchip(kvm)->pics[1],
3694 sizeof(struct kvm_pic_state));
3696 case KVM_IRQCHIP_IOAPIC:
3697 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3706 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3711 switch (chip->chip_id) {
3712 case KVM_IRQCHIP_PIC_MASTER:
3713 spin_lock(&pic_irqchip(kvm)->lock);
3714 memcpy(&pic_irqchip(kvm)->pics[0],
3716 sizeof(struct kvm_pic_state));
3717 spin_unlock(&pic_irqchip(kvm)->lock);
3719 case KVM_IRQCHIP_PIC_SLAVE:
3720 spin_lock(&pic_irqchip(kvm)->lock);
3721 memcpy(&pic_irqchip(kvm)->pics[1],
3723 sizeof(struct kvm_pic_state));
3724 spin_unlock(&pic_irqchip(kvm)->lock);
3726 case KVM_IRQCHIP_IOAPIC:
3727 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3733 kvm_pic_update_irq(pic_irqchip(kvm));
3737 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3739 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3741 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3743 mutex_lock(&kps->lock);
3744 memcpy(ps, &kps->channels, sizeof(*ps));
3745 mutex_unlock(&kps->lock);
3749 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3752 struct kvm_pit *pit = kvm->arch.vpit;
3754 mutex_lock(&pit->pit_state.lock);
3755 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3756 for (i = 0; i < 3; i++)
3757 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3758 mutex_unlock(&pit->pit_state.lock);
3762 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3764 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3765 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3766 sizeof(ps->channels));
3767 ps->flags = kvm->arch.vpit->pit_state.flags;
3768 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3769 memset(&ps->reserved, 0, sizeof(ps->reserved));
3773 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3777 u32 prev_legacy, cur_legacy;
3778 struct kvm_pit *pit = kvm->arch.vpit;
3780 mutex_lock(&pit->pit_state.lock);
3781 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3782 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3783 if (!prev_legacy && cur_legacy)
3785 memcpy(&pit->pit_state.channels, &ps->channels,
3786 sizeof(pit->pit_state.channels));
3787 pit->pit_state.flags = ps->flags;
3788 for (i = 0; i < 3; i++)
3789 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3791 mutex_unlock(&pit->pit_state.lock);
3795 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3796 struct kvm_reinject_control *control)
3798 struct kvm_pit *pit = kvm->arch.vpit;
3803 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3804 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3805 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3807 mutex_lock(&pit->pit_state.lock);
3808 kvm_pit_set_reinject(pit, control->pit_reinject);
3809 mutex_unlock(&pit->pit_state.lock);
3815 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3816 * @kvm: kvm instance
3817 * @log: slot id and address to which we copy the log
3819 * Steps 1-4 below provide general overview of dirty page logging. See
3820 * kvm_get_dirty_log_protect() function description for additional details.
3822 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3823 * always flush the TLB (step 4) even if previous step failed and the dirty
3824 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3825 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3826 * writes will be marked dirty for next log read.
3828 * 1. Take a snapshot of the bit and clear it if needed.
3829 * 2. Write protect the corresponding page.
3830 * 3. Copy the snapshot to the userspace.
3831 * 4. Flush TLB's if needed.
3833 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3835 bool is_dirty = false;
3838 mutex_lock(&kvm->slots_lock);
3841 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3843 if (kvm_x86_ops->flush_log_dirty)
3844 kvm_x86_ops->flush_log_dirty(kvm);
3846 r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3849 * All the TLBs can be flushed out of mmu lock, see the comments in
3850 * kvm_mmu_slot_remove_write_access().
3852 lockdep_assert_held(&kvm->slots_lock);
3854 kvm_flush_remote_tlbs(kvm);
3856 mutex_unlock(&kvm->slots_lock);
3860 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3863 if (!irqchip_in_kernel(kvm))
3866 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3867 irq_event->irq, irq_event->level,
3872 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3873 struct kvm_enable_cap *cap)
3881 case KVM_CAP_DISABLE_QUIRKS:
3882 kvm->arch.disabled_quirks = cap->args[0];
3885 case KVM_CAP_SPLIT_IRQCHIP: {
3886 mutex_lock(&kvm->lock);
3888 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3889 goto split_irqchip_unlock;
3891 if (irqchip_in_kernel(kvm))
3892 goto split_irqchip_unlock;
3893 if (kvm->created_vcpus)
3894 goto split_irqchip_unlock;
3895 r = kvm_setup_empty_irq_routing(kvm);
3897 goto split_irqchip_unlock;
3898 /* Pairs with irqchip_in_kernel. */
3900 kvm->arch.irqchip_split = true;
3901 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3903 split_irqchip_unlock:
3904 mutex_unlock(&kvm->lock);
3907 case KVM_CAP_X2APIC_API:
3909 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3912 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3913 kvm->arch.x2apic_format = true;
3914 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3915 kvm->arch.x2apic_broadcast_quirk_disabled = true;
3926 long kvm_arch_vm_ioctl(struct file *filp,
3927 unsigned int ioctl, unsigned long arg)
3929 struct kvm *kvm = filp->private_data;
3930 void __user *argp = (void __user *)arg;
3933 * This union makes it completely explicit to gcc-3.x
3934 * that these two variables' stack usage should be
3935 * combined, not added together.
3938 struct kvm_pit_state ps;
3939 struct kvm_pit_state2 ps2;
3940 struct kvm_pit_config pit_config;
3944 case KVM_SET_TSS_ADDR:
3945 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3947 case KVM_SET_IDENTITY_MAP_ADDR: {
3951 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3953 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3956 case KVM_SET_NR_MMU_PAGES:
3957 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3959 case KVM_GET_NR_MMU_PAGES:
3960 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3962 case KVM_CREATE_IRQCHIP: {
3963 struct kvm_pic *vpic;
3965 mutex_lock(&kvm->lock);
3968 goto create_irqchip_unlock;
3970 if (kvm->created_vcpus)
3971 goto create_irqchip_unlock;
3973 vpic = kvm_create_pic(kvm);
3975 r = kvm_ioapic_init(kvm);
3977 mutex_lock(&kvm->slots_lock);
3978 kvm_destroy_pic(vpic);
3979 mutex_unlock(&kvm->slots_lock);
3980 goto create_irqchip_unlock;
3983 goto create_irqchip_unlock;
3984 r = kvm_setup_default_irq_routing(kvm);
3986 mutex_lock(&kvm->slots_lock);
3987 mutex_lock(&kvm->irq_lock);
3988 kvm_ioapic_destroy(kvm);
3989 kvm_destroy_pic(vpic);
3990 mutex_unlock(&kvm->irq_lock);
3991 mutex_unlock(&kvm->slots_lock);
3992 goto create_irqchip_unlock;
3994 /* Write kvm->irq_routing before kvm->arch.vpic. */
3996 kvm->arch.vpic = vpic;
3997 create_irqchip_unlock:
3998 mutex_unlock(&kvm->lock);
4001 case KVM_CREATE_PIT:
4002 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4004 case KVM_CREATE_PIT2:
4006 if (copy_from_user(&u.pit_config, argp,
4007 sizeof(struct kvm_pit_config)))
4010 mutex_lock(&kvm->lock);
4013 goto create_pit_unlock;
4015 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4019 mutex_unlock(&kvm->lock);
4021 case KVM_GET_IRQCHIP: {
4022 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4023 struct kvm_irqchip *chip;
4025 chip = memdup_user(argp, sizeof(*chip));
4032 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
4033 goto get_irqchip_out;
4034 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4036 goto get_irqchip_out;
4038 if (copy_to_user(argp, chip, sizeof *chip))
4039 goto get_irqchip_out;
4045 case KVM_SET_IRQCHIP: {
4046 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4047 struct kvm_irqchip *chip;
4049 chip = memdup_user(argp, sizeof(*chip));
4056 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
4057 goto set_irqchip_out;
4058 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4060 goto set_irqchip_out;
4068 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4071 if (!kvm->arch.vpit)
4073 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4077 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4084 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4087 if (!kvm->arch.vpit)
4089 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4092 case KVM_GET_PIT2: {
4094 if (!kvm->arch.vpit)
4096 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4100 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4105 case KVM_SET_PIT2: {
4107 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4110 if (!kvm->arch.vpit)
4112 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4115 case KVM_REINJECT_CONTROL: {
4116 struct kvm_reinject_control control;
4118 if (copy_from_user(&control, argp, sizeof(control)))
4120 r = kvm_vm_ioctl_reinject(kvm, &control);
4123 case KVM_SET_BOOT_CPU_ID:
4125 mutex_lock(&kvm->lock);
4126 if (kvm->created_vcpus)
4129 kvm->arch.bsp_vcpu_id = arg;
4130 mutex_unlock(&kvm->lock);
4132 case KVM_XEN_HVM_CONFIG: {
4134 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4135 sizeof(struct kvm_xen_hvm_config)))
4138 if (kvm->arch.xen_hvm_config.flags)
4143 case KVM_SET_CLOCK: {
4144 struct kvm_clock_data user_ns;
4148 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4156 local_irq_disable();
4157 now_ns = __get_kvmclock_ns(kvm);
4158 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4160 kvm_gen_update_masterclock(kvm);
4163 case KVM_GET_CLOCK: {
4164 struct kvm_clock_data user_ns;
4167 local_irq_disable();
4168 now_ns = __get_kvmclock_ns(kvm);
4169 user_ns.clock = now_ns;
4170 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4172 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4175 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4180 case KVM_ENABLE_CAP: {
4181 struct kvm_enable_cap cap;
4184 if (copy_from_user(&cap, argp, sizeof(cap)))
4186 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4190 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4196 static void kvm_init_msr_list(void)
4201 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4202 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4206 * Even MSRs that are valid in the host may not be exposed
4207 * to the guests in some cases.
4209 switch (msrs_to_save[i]) {
4210 case MSR_IA32_BNDCFGS:
4211 if (!kvm_x86_ops->mpx_supported())
4215 if (!kvm_x86_ops->rdtscp_supported())
4223 msrs_to_save[j] = msrs_to_save[i];
4226 num_msrs_to_save = j;
4228 for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4229 switch (emulated_msrs[i]) {
4230 case MSR_IA32_SMBASE:
4231 if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4239 emulated_msrs[j] = emulated_msrs[i];
4242 num_emulated_msrs = j;
4245 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4253 if (!(lapic_in_kernel(vcpu) &&
4254 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4255 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4266 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4273 if (!(lapic_in_kernel(vcpu) &&
4274 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4276 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4278 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4288 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4289 struct kvm_segment *var, int seg)
4291 kvm_x86_ops->set_segment(vcpu, var, seg);
4294 void kvm_get_segment(struct kvm_vcpu *vcpu,
4295 struct kvm_segment *var, int seg)
4297 kvm_x86_ops->get_segment(vcpu, var, seg);
4300 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4301 struct x86_exception *exception)
4305 BUG_ON(!mmu_is_nested(vcpu));
4307 /* NPT walks are always user-walks */
4308 access |= PFERR_USER_MASK;
4309 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4314 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4315 struct x86_exception *exception)
4317 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4318 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4321 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4322 struct x86_exception *exception)
4324 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4325 access |= PFERR_FETCH_MASK;
4326 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4329 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4330 struct x86_exception *exception)
4332 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4333 access |= PFERR_WRITE_MASK;
4334 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4337 /* uses this to access any guest's mapped memory without checking CPL */
4338 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4339 struct x86_exception *exception)
4341 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4344 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4345 struct kvm_vcpu *vcpu, u32 access,
4346 struct x86_exception *exception)
4349 int r = X86EMUL_CONTINUE;
4352 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4354 unsigned offset = addr & (PAGE_SIZE-1);
4355 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4358 if (gpa == UNMAPPED_GVA)
4359 return X86EMUL_PROPAGATE_FAULT;
4360 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4363 r = X86EMUL_IO_NEEDED;
4375 /* used for instruction fetching */
4376 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4377 gva_t addr, void *val, unsigned int bytes,
4378 struct x86_exception *exception)
4380 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4381 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4385 /* Inline kvm_read_guest_virt_helper for speed. */
4386 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4388 if (unlikely(gpa == UNMAPPED_GVA))
4389 return X86EMUL_PROPAGATE_FAULT;
4391 offset = addr & (PAGE_SIZE-1);
4392 if (WARN_ON(offset + bytes > PAGE_SIZE))
4393 bytes = (unsigned)PAGE_SIZE - offset;
4394 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4396 if (unlikely(ret < 0))
4397 return X86EMUL_IO_NEEDED;
4399 return X86EMUL_CONTINUE;
4402 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4403 gva_t addr, void *val, unsigned int bytes,
4404 struct x86_exception *exception)
4406 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4407 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4409 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4412 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4414 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4415 gva_t addr, void *val, unsigned int bytes,
4416 struct x86_exception *exception)
4418 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4419 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4422 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4423 unsigned long addr, void *val, unsigned int bytes)
4425 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4426 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4428 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4431 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4432 gva_t addr, void *val,
4434 struct x86_exception *exception)
4436 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4438 int r = X86EMUL_CONTINUE;
4441 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4444 unsigned offset = addr & (PAGE_SIZE-1);
4445 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4448 if (gpa == UNMAPPED_GVA)
4449 return X86EMUL_PROPAGATE_FAULT;
4450 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4452 r = X86EMUL_IO_NEEDED;
4463 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4465 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4466 gpa_t *gpa, struct x86_exception *exception,
4469 u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4470 | (write ? PFERR_WRITE_MASK : 0);
4473 * currently PKRU is only applied to ept enabled guest so
4474 * there is no pkey in EPT page table for L1 guest or EPT
4475 * shadow page table for L2 guest.
4477 if (vcpu_match_mmio_gva(vcpu, gva)
4478 && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4479 vcpu->arch.access, 0, access)) {
4480 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4481 (gva & (PAGE_SIZE - 1));
4482 trace_vcpu_match_mmio(gva, *gpa, write, false);
4486 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4488 if (*gpa == UNMAPPED_GVA)
4491 /* For APIC access vmexit */
4492 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4495 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4496 trace_vcpu_match_mmio(gva, *gpa, write, true);
4503 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4504 const void *val, int bytes)
4508 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4511 kvm_page_track_write(vcpu, gpa, val, bytes);
4515 struct read_write_emulator_ops {
4516 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4518 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4519 void *val, int bytes);
4520 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4521 int bytes, void *val);
4522 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4523 void *val, int bytes);
4527 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4529 if (vcpu->mmio_read_completed) {
4530 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4531 vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4532 vcpu->mmio_read_completed = 0;
4539 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4540 void *val, int bytes)
4542 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4545 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4546 void *val, int bytes)
4548 return emulator_write_phys(vcpu, gpa, val, bytes);
4551 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4553 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4554 return vcpu_mmio_write(vcpu, gpa, bytes, val);
4557 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4558 void *val, int bytes)
4560 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4561 return X86EMUL_IO_NEEDED;
4564 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4565 void *val, int bytes)
4567 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4569 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4570 return X86EMUL_CONTINUE;
4573 static const struct read_write_emulator_ops read_emultor = {
4574 .read_write_prepare = read_prepare,
4575 .read_write_emulate = read_emulate,
4576 .read_write_mmio = vcpu_mmio_read,
4577 .read_write_exit_mmio = read_exit_mmio,
4580 static const struct read_write_emulator_ops write_emultor = {
4581 .read_write_emulate = write_emulate,
4582 .read_write_mmio = write_mmio,
4583 .read_write_exit_mmio = write_exit_mmio,
4587 static int emulator_read_write_onepage(unsigned long addr, void *val,
4589 struct x86_exception *exception,
4590 struct kvm_vcpu *vcpu,
4591 const struct read_write_emulator_ops *ops)
4595 bool write = ops->write;
4596 struct kvm_mmio_fragment *frag;
4598 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4601 return X86EMUL_PROPAGATE_FAULT;
4603 /* For APIC access vmexit */
4607 if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4608 return X86EMUL_CONTINUE;
4612 * Is this MMIO handled locally?
4614 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4615 if (handled == bytes)
4616 return X86EMUL_CONTINUE;
4622 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4623 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4627 return X86EMUL_CONTINUE;
4630 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4632 void *val, unsigned int bytes,
4633 struct x86_exception *exception,
4634 const struct read_write_emulator_ops *ops)
4636 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4640 if (ops->read_write_prepare &&
4641 ops->read_write_prepare(vcpu, val, bytes))
4642 return X86EMUL_CONTINUE;
4644 vcpu->mmio_nr_fragments = 0;
4646 /* Crossing a page boundary? */
4647 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4650 now = -addr & ~PAGE_MASK;
4651 rc = emulator_read_write_onepage(addr, val, now, exception,
4654 if (rc != X86EMUL_CONTINUE)
4657 if (ctxt->mode != X86EMUL_MODE_PROT64)
4663 rc = emulator_read_write_onepage(addr, val, bytes, exception,
4665 if (rc != X86EMUL_CONTINUE)
4668 if (!vcpu->mmio_nr_fragments)
4671 gpa = vcpu->mmio_fragments[0].gpa;
4673 vcpu->mmio_needed = 1;
4674 vcpu->mmio_cur_fragment = 0;
4676 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4677 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4678 vcpu->run->exit_reason = KVM_EXIT_MMIO;
4679 vcpu->run->mmio.phys_addr = gpa;
4681 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4684 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4688 struct x86_exception *exception)
4690 return emulator_read_write(ctxt, addr, val, bytes,
4691 exception, &read_emultor);
4694 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4698 struct x86_exception *exception)
4700 return emulator_read_write(ctxt, addr, (void *)val, bytes,
4701 exception, &write_emultor);
4704 #define CMPXCHG_TYPE(t, ptr, old, new) \
4705 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4707 #ifdef CONFIG_X86_64
4708 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4710 # define CMPXCHG64(ptr, old, new) \
4711 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4714 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4719 struct x86_exception *exception)
4721 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4727 /* guests cmpxchg8b have to be emulated atomically */
4728 if (bytes > 8 || (bytes & (bytes - 1)))
4731 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4733 if (gpa == UNMAPPED_GVA ||
4734 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4737 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4740 page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4741 if (is_error_page(page))
4744 kaddr = kmap_atomic(page);
4745 kaddr += offset_in_page(gpa);
4748 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4751 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4754 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4757 exchanged = CMPXCHG64(kaddr, old, new);
4762 kunmap_atomic(kaddr);
4763 kvm_release_page_dirty(page);
4766 return X86EMUL_CMPXCHG_FAILED;
4768 kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4769 kvm_page_track_write(vcpu, gpa, new, bytes);
4771 return X86EMUL_CONTINUE;
4774 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4776 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4779 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4781 /* TODO: String I/O for in kernel device */
4784 if (vcpu->arch.pio.in)
4785 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4786 vcpu->arch.pio.size, pd);
4788 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4789 vcpu->arch.pio.port, vcpu->arch.pio.size,
4794 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4795 unsigned short port, void *val,
4796 unsigned int count, bool in)
4798 vcpu->arch.pio.port = port;
4799 vcpu->arch.pio.in = in;
4800 vcpu->arch.pio.count = count;
4801 vcpu->arch.pio.size = size;
4803 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4804 vcpu->arch.pio.count = 0;
4808 vcpu->run->exit_reason = KVM_EXIT_IO;
4809 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4810 vcpu->run->io.size = size;
4811 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4812 vcpu->run->io.count = count;
4813 vcpu->run->io.port = port;
4818 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4819 int size, unsigned short port, void *val,
4822 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4825 if (vcpu->arch.pio.count)
4828 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4831 memcpy(val, vcpu->arch.pio_data, size * count);
4832 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4833 vcpu->arch.pio.count = 0;
4840 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4841 int size, unsigned short port,
4842 const void *val, unsigned int count)
4844 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4846 memcpy(vcpu->arch.pio_data, val, size * count);
4847 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4848 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4851 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4853 return kvm_x86_ops->get_segment_base(vcpu, seg);
4856 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4858 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4861 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4863 if (!need_emulate_wbinvd(vcpu))
4864 return X86EMUL_CONTINUE;
4866 if (kvm_x86_ops->has_wbinvd_exit()) {
4867 int cpu = get_cpu();
4869 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4870 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4871 wbinvd_ipi, NULL, 1);
4873 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4876 return X86EMUL_CONTINUE;
4879 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4881 kvm_emulate_wbinvd_noskip(vcpu);
4882 return kvm_skip_emulated_instruction(vcpu);
4884 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4888 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4890 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4893 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4894 unsigned long *dest)
4896 return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4899 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4900 unsigned long value)
4903 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4906 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4908 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4911 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4913 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4914 unsigned long value;
4918 value = kvm_read_cr0(vcpu);
4921 value = vcpu->arch.cr2;
4924 value = kvm_read_cr3(vcpu);
4927 value = kvm_read_cr4(vcpu);
4930 value = kvm_get_cr8(vcpu);
4933 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4940 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4942 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4947 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4950 vcpu->arch.cr2 = val;
4953 res = kvm_set_cr3(vcpu, val);
4956 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4959 res = kvm_set_cr8(vcpu, val);
4962 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4969 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4971 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4974 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4976 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4979 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4981 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4984 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4986 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4989 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4991 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4994 static unsigned long emulator_get_cached_segment_base(
4995 struct x86_emulate_ctxt *ctxt, int seg)
4997 return get_segment_base(emul_to_vcpu(ctxt), seg);
5000 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5001 struct desc_struct *desc, u32 *base3,
5004 struct kvm_segment var;
5006 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5007 *selector = var.selector;
5010 memset(desc, 0, sizeof(*desc));
5016 set_desc_limit(desc, var.limit);
5017 set_desc_base(desc, (unsigned long)var.base);
5018 #ifdef CONFIG_X86_64
5020 *base3 = var.base >> 32;
5022 desc->type = var.type;
5024 desc->dpl = var.dpl;
5025 desc->p = var.present;
5026 desc->avl = var.avl;
5034 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5035 struct desc_struct *desc, u32 base3,
5038 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5039 struct kvm_segment var;
5041 var.selector = selector;
5042 var.base = get_desc_base(desc);
5043 #ifdef CONFIG_X86_64
5044 var.base |= ((u64)base3) << 32;
5046 var.limit = get_desc_limit(desc);
5048 var.limit = (var.limit << 12) | 0xfff;
5049 var.type = desc->type;
5050 var.dpl = desc->dpl;
5055 var.avl = desc->avl;
5056 var.present = desc->p;
5057 var.unusable = !var.present;
5060 kvm_set_segment(vcpu, &var, seg);
5064 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5065 u32 msr_index, u64 *pdata)
5067 struct msr_data msr;
5070 msr.index = msr_index;
5071 msr.host_initiated = false;
5072 r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5080 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5081 u32 msr_index, u64 data)
5083 struct msr_data msr;
5086 msr.index = msr_index;
5087 msr.host_initiated = false;
5088 return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5091 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5093 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5095 return vcpu->arch.smbase;
5098 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5100 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5102 vcpu->arch.smbase = smbase;
5105 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5108 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5111 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5112 u32 pmc, u64 *pdata)
5114 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5117 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5119 emul_to_vcpu(ctxt)->arch.halt_request = 1;
5122 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5125 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5128 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5133 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5134 struct x86_instruction_info *info,
5135 enum x86_intercept_stage stage)
5137 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5140 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5141 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5143 kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5146 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5148 return kvm_register_read(emul_to_vcpu(ctxt), reg);
5151 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5153 kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5156 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5158 kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5161 static const struct x86_emulate_ops emulate_ops = {
5162 .read_gpr = emulator_read_gpr,
5163 .write_gpr = emulator_write_gpr,
5164 .read_std = kvm_read_guest_virt_system,
5165 .write_std = kvm_write_guest_virt_system,
5166 .read_phys = kvm_read_guest_phys_system,
5167 .fetch = kvm_fetch_guest_virt,
5168 .read_emulated = emulator_read_emulated,
5169 .write_emulated = emulator_write_emulated,
5170 .cmpxchg_emulated = emulator_cmpxchg_emulated,
5171 .invlpg = emulator_invlpg,
5172 .pio_in_emulated = emulator_pio_in_emulated,
5173 .pio_out_emulated = emulator_pio_out_emulated,
5174 .get_segment = emulator_get_segment,
5175 .set_segment = emulator_set_segment,
5176 .get_cached_segment_base = emulator_get_cached_segment_base,
5177 .get_gdt = emulator_get_gdt,
5178 .get_idt = emulator_get_idt,
5179 .set_gdt = emulator_set_gdt,
5180 .set_idt = emulator_set_idt,
5181 .get_cr = emulator_get_cr,
5182 .set_cr = emulator_set_cr,
5183 .cpl = emulator_get_cpl,
5184 .get_dr = emulator_get_dr,
5185 .set_dr = emulator_set_dr,
5186 .get_smbase = emulator_get_smbase,
5187 .set_smbase = emulator_set_smbase,
5188 .set_msr = emulator_set_msr,
5189 .get_msr = emulator_get_msr,
5190 .check_pmc = emulator_check_pmc,
5191 .read_pmc = emulator_read_pmc,
5192 .halt = emulator_halt,
5193 .wbinvd = emulator_wbinvd,
5194 .fix_hypercall = emulator_fix_hypercall,
5195 .get_fpu = emulator_get_fpu,
5196 .put_fpu = emulator_put_fpu,
5197 .intercept = emulator_intercept,
5198 .get_cpuid = emulator_get_cpuid,
5199 .set_nmi_mask = emulator_set_nmi_mask,
5202 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5204 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5206 * an sti; sti; sequence only disable interrupts for the first
5207 * instruction. So, if the last instruction, be it emulated or
5208 * not, left the system with the INT_STI flag enabled, it
5209 * means that the last instruction is an sti. We should not
5210 * leave the flag on in this case. The same goes for mov ss
5212 if (int_shadow & mask)
5214 if (unlikely(int_shadow || mask)) {
5215 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5217 kvm_make_request(KVM_REQ_EVENT, vcpu);
5221 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5223 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5224 if (ctxt->exception.vector == PF_VECTOR)
5225 return kvm_propagate_fault(vcpu, &ctxt->exception);
5227 if (ctxt->exception.error_code_valid)
5228 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5229 ctxt->exception.error_code);
5231 kvm_queue_exception(vcpu, ctxt->exception.vector);
5235 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5237 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5240 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5242 ctxt->eflags = kvm_get_rflags(vcpu);
5243 ctxt->eip = kvm_rip_read(vcpu);
5244 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5245 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
5246 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
5247 cs_db ? X86EMUL_MODE_PROT32 :
5248 X86EMUL_MODE_PROT16;
5249 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5250 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5251 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5252 ctxt->emul_flags = vcpu->arch.hflags;
5254 init_decode_cache(ctxt);
5255 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5258 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5260 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5263 init_emulate_ctxt(vcpu);
5267 ctxt->_eip = ctxt->eip + inc_eip;
5268 ret = emulate_int_real(ctxt, irq);
5270 if (ret != X86EMUL_CONTINUE)
5271 return EMULATE_FAIL;
5273 ctxt->eip = ctxt->_eip;
5274 kvm_rip_write(vcpu, ctxt->eip);
5275 kvm_set_rflags(vcpu, ctxt->eflags);
5277 if (irq == NMI_VECTOR)
5278 vcpu->arch.nmi_pending = 0;
5280 vcpu->arch.interrupt.pending = false;
5282 return EMULATE_DONE;
5284 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5286 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5288 int r = EMULATE_DONE;
5290 ++vcpu->stat.insn_emulation_fail;
5291 trace_kvm_emulate_insn_failed(vcpu);
5292 if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5293 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5294 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5295 vcpu->run->internal.ndata = 0;
5298 kvm_queue_exception(vcpu, UD_VECTOR);
5303 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5304 bool write_fault_to_shadow_pgtable,
5310 if (emulation_type & EMULTYPE_NO_REEXECUTE)
5313 if (!vcpu->arch.mmu.direct_map) {
5315 * Write permission should be allowed since only
5316 * write access need to be emulated.
5318 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5321 * If the mapping is invalid in guest, let cpu retry
5322 * it to generate fault.
5324 if (gpa == UNMAPPED_GVA)
5329 * Do not retry the unhandleable instruction if it faults on the
5330 * readonly host memory, otherwise it will goto a infinite loop:
5331 * retry instruction -> write #PF -> emulation fail -> retry
5332 * instruction -> ...
5334 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5337 * If the instruction failed on the error pfn, it can not be fixed,
5338 * report the error to userspace.
5340 if (is_error_noslot_pfn(pfn))
5343 kvm_release_pfn_clean(pfn);
5345 /* The instructions are well-emulated on direct mmu. */
5346 if (vcpu->arch.mmu.direct_map) {
5347 unsigned int indirect_shadow_pages;
5349 spin_lock(&vcpu->kvm->mmu_lock);
5350 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5351 spin_unlock(&vcpu->kvm->mmu_lock);
5353 if (indirect_shadow_pages)
5354 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5360 * if emulation was due to access to shadowed page table
5361 * and it failed try to unshadow page and re-enter the
5362 * guest to let CPU execute the instruction.
5364 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5367 * If the access faults on its page table, it can not
5368 * be fixed by unprotecting shadow page and it should
5369 * be reported to userspace.
5371 return !write_fault_to_shadow_pgtable;
5374 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5375 unsigned long cr2, int emulation_type)
5377 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5378 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5380 last_retry_eip = vcpu->arch.last_retry_eip;
5381 last_retry_addr = vcpu->arch.last_retry_addr;
5384 * If the emulation is caused by #PF and it is non-page_table
5385 * writing instruction, it means the VM-EXIT is caused by shadow
5386 * page protected, we can zap the shadow page and retry this
5387 * instruction directly.
5389 * Note: if the guest uses a non-page-table modifying instruction
5390 * on the PDE that points to the instruction, then we will unmap
5391 * the instruction and go to an infinite loop. So, we cache the
5392 * last retried eip and the last fault address, if we meet the eip
5393 * and the address again, we can break out of the potential infinite
5396 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5398 if (!(emulation_type & EMULTYPE_RETRY))
5401 if (x86_page_table_writing_insn(ctxt))
5404 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5407 vcpu->arch.last_retry_eip = ctxt->eip;
5408 vcpu->arch.last_retry_addr = cr2;
5410 if (!vcpu->arch.mmu.direct_map)
5411 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5413 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5418 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5419 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5421 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5423 if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5424 /* This is a good place to trace that we are exiting SMM. */
5425 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5427 /* Process a latched INIT or SMI, if any. */
5428 kvm_make_request(KVM_REQ_EVENT, vcpu);
5431 kvm_mmu_reset_context(vcpu);
5434 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5436 unsigned changed = vcpu->arch.hflags ^ emul_flags;
5438 vcpu->arch.hflags = emul_flags;
5440 if (changed & HF_SMM_MASK)
5441 kvm_smm_changed(vcpu);
5444 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5453 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5454 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5459 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5461 struct kvm_run *kvm_run = vcpu->run;
5464 * rflags is the old, "raw" value of the flags. The new value has
5465 * not been saved yet.
5467 * This is correct even for TF set by the guest, because "the
5468 * processor will not generate this exception after the instruction
5469 * that sets the TF flag".
5471 if (unlikely(rflags & X86_EFLAGS_TF)) {
5472 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5473 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5475 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5476 kvm_run->debug.arch.exception = DB_VECTOR;
5477 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5478 *r = EMULATE_USER_EXIT;
5481 * "Certain debug exceptions may clear bit 0-3. The
5482 * remaining contents of the DR6 register are never
5483 * cleared by the processor".
5485 vcpu->arch.dr6 &= ~15;
5486 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5487 kvm_queue_exception(vcpu, DB_VECTOR);
5492 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5494 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5495 int r = EMULATE_DONE;
5497 kvm_x86_ops->skip_emulated_instruction(vcpu);
5498 kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5499 return r == EMULATE_DONE;
5501 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5503 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5505 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5506 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5507 struct kvm_run *kvm_run = vcpu->run;
5508 unsigned long eip = kvm_get_linear_rip(vcpu);
5509 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5510 vcpu->arch.guest_debug_dr7,
5514 kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5515 kvm_run->debug.arch.pc = eip;
5516 kvm_run->debug.arch.exception = DB_VECTOR;
5517 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5518 *r = EMULATE_USER_EXIT;
5523 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5524 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5525 unsigned long eip = kvm_get_linear_rip(vcpu);
5526 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5531 vcpu->arch.dr6 &= ~15;
5532 vcpu->arch.dr6 |= dr6 | DR6_RTM;
5533 kvm_queue_exception(vcpu, DB_VECTOR);
5542 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5549 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5550 bool writeback = true;
5551 bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5554 * Clear write_fault_to_shadow_pgtable here to ensure it is
5557 vcpu->arch.write_fault_to_shadow_pgtable = false;
5558 kvm_clear_exception_queue(vcpu);
5560 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5561 init_emulate_ctxt(vcpu);
5564 * We will reenter on the same instruction since
5565 * we do not set complete_userspace_io. This does not
5566 * handle watchpoints yet, those would be handled in
5569 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5572 ctxt->interruptibility = 0;
5573 ctxt->have_exception = false;
5574 ctxt->exception.vector = -1;
5575 ctxt->perm_ok = false;
5577 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5579 r = x86_decode_insn(ctxt, insn, insn_len);
5581 trace_kvm_emulate_insn_start(vcpu);
5582 ++vcpu->stat.insn_emulation;
5583 if (r != EMULATION_OK) {
5584 if (emulation_type & EMULTYPE_TRAP_UD)
5585 return EMULATE_FAIL;
5586 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5588 return EMULATE_DONE;
5589 if (emulation_type & EMULTYPE_SKIP)
5590 return EMULATE_FAIL;
5591 return handle_emulation_failure(vcpu);
5595 if (emulation_type & EMULTYPE_SKIP) {
5596 kvm_rip_write(vcpu, ctxt->_eip);
5597 if (ctxt->eflags & X86_EFLAGS_RF)
5598 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5599 return EMULATE_DONE;
5602 if (retry_instruction(ctxt, cr2, emulation_type))
5603 return EMULATE_DONE;
5605 /* this is needed for vmware backdoor interface to work since it
5606 changes registers values during IO operation */
5607 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5608 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5609 emulator_invalidate_register_cache(ctxt);
5613 r = x86_emulate_insn(ctxt);
5615 if (r == EMULATION_INTERCEPTED)
5616 return EMULATE_DONE;
5618 if (r == EMULATION_FAILED) {
5619 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5621 return EMULATE_DONE;
5623 return handle_emulation_failure(vcpu);
5626 if (ctxt->have_exception) {
5628 if (inject_emulated_exception(vcpu))
5630 } else if (vcpu->arch.pio.count) {
5631 if (!vcpu->arch.pio.in) {
5632 /* FIXME: return into emulator if single-stepping. */
5633 vcpu->arch.pio.count = 0;
5636 vcpu->arch.complete_userspace_io = complete_emulated_pio;
5638 r = EMULATE_USER_EXIT;
5639 } else if (vcpu->mmio_needed) {
5640 if (!vcpu->mmio_is_write)
5642 r = EMULATE_USER_EXIT;
5643 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5644 } else if (r == EMULATION_RESTART)
5650 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5651 toggle_interruptibility(vcpu, ctxt->interruptibility);
5652 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5653 if (vcpu->arch.hflags != ctxt->emul_flags)
5654 kvm_set_hflags(vcpu, ctxt->emul_flags);
5655 kvm_rip_write(vcpu, ctxt->eip);
5656 if (r == EMULATE_DONE)
5657 kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5658 if (!ctxt->have_exception ||
5659 exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5660 __kvm_set_rflags(vcpu, ctxt->eflags);
5663 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5664 * do nothing, and it will be requested again as soon as
5665 * the shadow expires. But we still need to check here,
5666 * because POPF has no interrupt shadow.
5668 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5669 kvm_make_request(KVM_REQ_EVENT, vcpu);
5671 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5675 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5677 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5679 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5680 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5681 size, port, &val, 1);
5682 /* do not return to emulator after return from userspace */
5683 vcpu->arch.pio.count = 0;
5686 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5688 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5692 /* We should only ever be called with arch.pio.count equal to 1 */
5693 BUG_ON(vcpu->arch.pio.count != 1);
5695 /* For size less than 4 we merge, else we zero extend */
5696 val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5700 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5701 * the copy and tracing
5703 emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5704 vcpu->arch.pio.port, &val, 1);
5705 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5710 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5715 /* For size less than 4 we merge, else we zero extend */
5716 val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5718 ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5721 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5725 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5729 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5731 static int kvmclock_cpu_down_prep(unsigned int cpu)
5733 __this_cpu_write(cpu_tsc_khz, 0);
5737 static void tsc_khz_changed(void *data)
5739 struct cpufreq_freqs *freq = data;
5740 unsigned long khz = 0;
5744 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5745 khz = cpufreq_quick_get(raw_smp_processor_id());
5748 __this_cpu_write(cpu_tsc_khz, khz);
5751 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5754 struct cpufreq_freqs *freq = data;
5756 struct kvm_vcpu *vcpu;
5757 int i, send_ipi = 0;
5760 * We allow guests to temporarily run on slowing clocks,
5761 * provided we notify them after, or to run on accelerating
5762 * clocks, provided we notify them before. Thus time never
5765 * However, we have a problem. We can't atomically update
5766 * the frequency of a given CPU from this function; it is
5767 * merely a notifier, which can be called from any CPU.
5768 * Changing the TSC frequency at arbitrary points in time
5769 * requires a recomputation of local variables related to
5770 * the TSC for each VCPU. We must flag these local variables
5771 * to be updated and be sure the update takes place with the
5772 * new frequency before any guests proceed.
5774 * Unfortunately, the combination of hotplug CPU and frequency
5775 * change creates an intractable locking scenario; the order
5776 * of when these callouts happen is undefined with respect to
5777 * CPU hotplug, and they can race with each other. As such,
5778 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5779 * undefined; you can actually have a CPU frequency change take
5780 * place in between the computation of X and the setting of the
5781 * variable. To protect against this problem, all updates of
5782 * the per_cpu tsc_khz variable are done in an interrupt
5783 * protected IPI, and all callers wishing to update the value
5784 * must wait for a synchronous IPI to complete (which is trivial
5785 * if the caller is on the CPU already). This establishes the
5786 * necessary total order on variable updates.
5788 * Note that because a guest time update may take place
5789 * anytime after the setting of the VCPU's request bit, the
5790 * correct TSC value must be set before the request. However,
5791 * to ensure the update actually makes it to any guest which
5792 * starts running in hardware virtualization between the set
5793 * and the acquisition of the spinlock, we must also ping the
5794 * CPU after setting the request bit.
5798 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5800 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5803 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5805 spin_lock(&kvm_lock);
5806 list_for_each_entry(kvm, &vm_list, vm_list) {
5807 kvm_for_each_vcpu(i, vcpu, kvm) {
5808 if (vcpu->cpu != freq->cpu)
5810 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5811 if (vcpu->cpu != smp_processor_id())
5815 spin_unlock(&kvm_lock);
5817 if (freq->old < freq->new && send_ipi) {
5819 * We upscale the frequency. Must make the guest
5820 * doesn't see old kvmclock values while running with
5821 * the new frequency, otherwise we risk the guest sees
5822 * time go backwards.
5824 * In case we update the frequency for another cpu
5825 * (which might be in guest context) send an interrupt
5826 * to kick the cpu out of guest context. Next time
5827 * guest context is entered kvmclock will be updated,
5828 * so the guest will not see stale values.
5830 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5835 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5836 .notifier_call = kvmclock_cpufreq_notifier
5839 static int kvmclock_cpu_online(unsigned int cpu)
5841 tsc_khz_changed(NULL);
5845 static void kvm_timer_init(void)
5847 max_tsc_khz = tsc_khz;
5849 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5850 #ifdef CONFIG_CPU_FREQ
5851 struct cpufreq_policy policy;
5854 memset(&policy, 0, sizeof(policy));
5856 cpufreq_get_policy(&policy, cpu);
5857 if (policy.cpuinfo.max_freq)
5858 max_tsc_khz = policy.cpuinfo.max_freq;
5861 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5862 CPUFREQ_TRANSITION_NOTIFIER);
5864 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5866 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
5867 kvmclock_cpu_online, kvmclock_cpu_down_prep);
5870 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5872 int kvm_is_in_guest(void)
5874 return __this_cpu_read(current_vcpu) != NULL;
5877 static int kvm_is_user_mode(void)
5881 if (__this_cpu_read(current_vcpu))
5882 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5884 return user_mode != 0;
5887 static unsigned long kvm_get_guest_ip(void)
5889 unsigned long ip = 0;
5891 if (__this_cpu_read(current_vcpu))
5892 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5897 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5898 .is_in_guest = kvm_is_in_guest,
5899 .is_user_mode = kvm_is_user_mode,
5900 .get_guest_ip = kvm_get_guest_ip,
5903 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5905 __this_cpu_write(current_vcpu, vcpu);
5907 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5909 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5911 __this_cpu_write(current_vcpu, NULL);
5913 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5915 static void kvm_set_mmio_spte_mask(void)
5918 int maxphyaddr = boot_cpu_data.x86_phys_bits;
5921 * Set the reserved bits and the present bit of an paging-structure
5922 * entry to generate page fault with PFER.RSV = 1.
5924 /* Mask the reserved physical address bits. */
5925 mask = rsvd_bits(maxphyaddr, 51);
5927 /* Bit 62 is always reserved for 32bit host. */
5928 mask |= 0x3ull << 62;
5930 /* Set the present bit. */
5933 #ifdef CONFIG_X86_64
5935 * If reserved bit is not supported, clear the present bit to disable
5938 if (maxphyaddr == 52)
5942 kvm_mmu_set_mmio_spte_mask(mask);
5945 #ifdef CONFIG_X86_64
5946 static void pvclock_gtod_update_fn(struct work_struct *work)
5950 struct kvm_vcpu *vcpu;
5953 spin_lock(&kvm_lock);
5954 list_for_each_entry(kvm, &vm_list, vm_list)
5955 kvm_for_each_vcpu(i, vcpu, kvm)
5956 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5957 atomic_set(&kvm_guest_has_master_clock, 0);
5958 spin_unlock(&kvm_lock);
5961 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5964 * Notification about pvclock gtod data update.
5966 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5969 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5970 struct timekeeper *tk = priv;
5972 update_pvclock_gtod(tk);
5974 /* disable master clock if host does not trust, or does not
5975 * use, TSC clocksource
5977 if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5978 atomic_read(&kvm_guest_has_master_clock) != 0)
5979 queue_work(system_long_wq, &pvclock_gtod_work);
5984 static struct notifier_block pvclock_gtod_notifier = {
5985 .notifier_call = pvclock_gtod_notify,
5989 int kvm_arch_init(void *opaque)
5992 struct kvm_x86_ops *ops = opaque;
5995 printk(KERN_ERR "kvm: already loaded the other module\n");
6000 if (!ops->cpu_has_kvm_support()) {
6001 printk(KERN_ERR "kvm: no hardware support\n");
6005 if (ops->disabled_by_bios()) {
6006 printk(KERN_ERR "kvm: disabled by bios\n");
6012 shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6014 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6018 r = kvm_mmu_module_init();
6020 goto out_free_percpu;
6022 kvm_set_mmio_spte_mask();
6026 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6027 PT_DIRTY_MASK, PT64_NX_MASK, 0,
6031 perf_register_guest_info_callbacks(&kvm_guest_cbs);
6033 if (boot_cpu_has(X86_FEATURE_XSAVE))
6034 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6037 #ifdef CONFIG_X86_64
6038 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6044 free_percpu(shared_msrs);
6049 void kvm_arch_exit(void)
6052 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6054 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6055 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6056 CPUFREQ_TRANSITION_NOTIFIER);
6057 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6058 #ifdef CONFIG_X86_64
6059 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6062 kvm_mmu_module_exit();
6063 free_percpu(shared_msrs);
6066 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6068 ++vcpu->stat.halt_exits;
6069 if (lapic_in_kernel(vcpu)) {
6070 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6073 vcpu->run->exit_reason = KVM_EXIT_HLT;
6077 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6079 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6081 int ret = kvm_skip_emulated_instruction(vcpu);
6083 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6084 * KVM_EXIT_DEBUG here.
6086 return kvm_vcpu_halt(vcpu) && ret;
6088 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6091 * kvm_pv_kick_cpu_op: Kick a vcpu.
6093 * @apicid - apicid of vcpu to be kicked.
6095 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6097 struct kvm_lapic_irq lapic_irq;
6099 lapic_irq.shorthand = 0;
6100 lapic_irq.dest_mode = 0;
6101 lapic_irq.dest_id = apicid;
6102 lapic_irq.msi_redir_hint = false;
6104 lapic_irq.delivery_mode = APIC_DM_REMRD;
6105 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6108 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6110 vcpu->arch.apicv_active = false;
6111 kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6114 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6116 unsigned long nr, a0, a1, a2, a3, ret;
6119 r = kvm_skip_emulated_instruction(vcpu);
6121 if (kvm_hv_hypercall_enabled(vcpu->kvm))
6122 return kvm_hv_hypercall(vcpu);
6124 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6125 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6126 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6127 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6128 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6130 trace_kvm_hypercall(nr, a0, a1, a2, a3);
6132 op_64_bit = is_64_bit_mode(vcpu);
6141 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6147 case KVM_HC_VAPIC_POLL_IRQ:
6150 case KVM_HC_KICK_CPU:
6151 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6161 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6162 ++vcpu->stat.hypercalls;
6165 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6167 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6169 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6170 char instruction[3];
6171 unsigned long rip = kvm_rip_read(vcpu);
6173 kvm_x86_ops->patch_hypercall(vcpu, instruction);
6175 return emulator_write_emulated(ctxt, rip, instruction, 3,
6179 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6181 return vcpu->run->request_interrupt_window &&
6182 likely(!pic_in_kernel(vcpu->kvm));
6185 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6187 struct kvm_run *kvm_run = vcpu->run;
6189 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6190 kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6191 kvm_run->cr8 = kvm_get_cr8(vcpu);
6192 kvm_run->apic_base = kvm_get_apic_base(vcpu);
6193 kvm_run->ready_for_interrupt_injection =
6194 pic_in_kernel(vcpu->kvm) ||
6195 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6198 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6202 if (!kvm_x86_ops->update_cr8_intercept)
6205 if (!lapic_in_kernel(vcpu))
6208 if (vcpu->arch.apicv_active)
6211 if (!vcpu->arch.apic->vapic_addr)
6212 max_irr = kvm_lapic_find_highest_irr(vcpu);
6219 tpr = kvm_lapic_get_cr8(vcpu);
6221 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6224 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6228 /* try to reinject previous events if any */
6229 if (vcpu->arch.exception.pending) {
6230 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6231 vcpu->arch.exception.has_error_code,
6232 vcpu->arch.exception.error_code);
6234 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6235 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6238 if (vcpu->arch.exception.nr == DB_VECTOR &&
6239 (vcpu->arch.dr7 & DR7_GD)) {
6240 vcpu->arch.dr7 &= ~DR7_GD;
6241 kvm_update_dr7(vcpu);
6244 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6245 vcpu->arch.exception.has_error_code,
6246 vcpu->arch.exception.error_code,
6247 vcpu->arch.exception.reinject);
6251 if (vcpu->arch.nmi_injected) {
6252 kvm_x86_ops->set_nmi(vcpu);
6256 if (vcpu->arch.interrupt.pending) {
6257 kvm_x86_ops->set_irq(vcpu);
6261 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6262 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6267 /* try to inject new event if pending */
6268 if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6269 vcpu->arch.smi_pending = false;
6271 } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6272 --vcpu->arch.nmi_pending;
6273 vcpu->arch.nmi_injected = true;
6274 kvm_x86_ops->set_nmi(vcpu);
6275 } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6277 * Because interrupts can be injected asynchronously, we are
6278 * calling check_nested_events again here to avoid a race condition.
6279 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6280 * proposal and current concerns. Perhaps we should be setting
6281 * KVM_REQ_EVENT only on certain events and not unconditionally?
6283 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6284 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6288 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6289 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6291 kvm_x86_ops->set_irq(vcpu);
6298 static void process_nmi(struct kvm_vcpu *vcpu)
6303 * x86 is limited to one NMI running, and one NMI pending after it.
6304 * If an NMI is already in progress, limit further NMIs to just one.
6305 * Otherwise, allow two (and we'll inject the first one immediately).
6307 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6310 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6311 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6312 kvm_make_request(KVM_REQ_EVENT, vcpu);
6315 #define put_smstate(type, buf, offset, val) \
6316 *(type *)((buf) + (offset) - 0x7e00) = val
6318 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6321 flags |= seg->g << 23;
6322 flags |= seg->db << 22;
6323 flags |= seg->l << 21;
6324 flags |= seg->avl << 20;
6325 flags |= seg->present << 15;
6326 flags |= seg->dpl << 13;
6327 flags |= seg->s << 12;
6328 flags |= seg->type << 8;
6332 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6334 struct kvm_segment seg;
6337 kvm_get_segment(vcpu, &seg, n);
6338 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6341 offset = 0x7f84 + n * 12;
6343 offset = 0x7f2c + (n - 3) * 12;
6345 put_smstate(u32, buf, offset + 8, seg.base);
6346 put_smstate(u32, buf, offset + 4, seg.limit);
6347 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6350 #ifdef CONFIG_X86_64
6351 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6353 struct kvm_segment seg;
6357 kvm_get_segment(vcpu, &seg, n);
6358 offset = 0x7e00 + n * 16;
6360 flags = enter_smm_get_segment_flags(&seg) >> 8;
6361 put_smstate(u16, buf, offset, seg.selector);
6362 put_smstate(u16, buf, offset + 2, flags);
6363 put_smstate(u32, buf, offset + 4, seg.limit);
6364 put_smstate(u64, buf, offset + 8, seg.base);
6368 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6371 struct kvm_segment seg;
6375 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6376 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6377 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6378 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6380 for (i = 0; i < 8; i++)
6381 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6383 kvm_get_dr(vcpu, 6, &val);
6384 put_smstate(u32, buf, 0x7fcc, (u32)val);
6385 kvm_get_dr(vcpu, 7, &val);
6386 put_smstate(u32, buf, 0x7fc8, (u32)val);
6388 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6389 put_smstate(u32, buf, 0x7fc4, seg.selector);
6390 put_smstate(u32, buf, 0x7f64, seg.base);
6391 put_smstate(u32, buf, 0x7f60, seg.limit);
6392 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6394 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6395 put_smstate(u32, buf, 0x7fc0, seg.selector);
6396 put_smstate(u32, buf, 0x7f80, seg.base);
6397 put_smstate(u32, buf, 0x7f7c, seg.limit);
6398 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6400 kvm_x86_ops->get_gdt(vcpu, &dt);
6401 put_smstate(u32, buf, 0x7f74, dt.address);
6402 put_smstate(u32, buf, 0x7f70, dt.size);
6404 kvm_x86_ops->get_idt(vcpu, &dt);
6405 put_smstate(u32, buf, 0x7f58, dt.address);
6406 put_smstate(u32, buf, 0x7f54, dt.size);
6408 for (i = 0; i < 6; i++)
6409 enter_smm_save_seg_32(vcpu, buf, i);
6411 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6414 put_smstate(u32, buf, 0x7efc, 0x00020000);
6415 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6418 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6420 #ifdef CONFIG_X86_64
6422 struct kvm_segment seg;
6426 for (i = 0; i < 16; i++)
6427 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6429 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6430 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6432 kvm_get_dr(vcpu, 6, &val);
6433 put_smstate(u64, buf, 0x7f68, val);
6434 kvm_get_dr(vcpu, 7, &val);
6435 put_smstate(u64, buf, 0x7f60, val);
6437 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6438 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6439 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6441 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6444 put_smstate(u32, buf, 0x7efc, 0x00020064);
6446 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6448 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6449 put_smstate(u16, buf, 0x7e90, seg.selector);
6450 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6451 put_smstate(u32, buf, 0x7e94, seg.limit);
6452 put_smstate(u64, buf, 0x7e98, seg.base);
6454 kvm_x86_ops->get_idt(vcpu, &dt);
6455 put_smstate(u32, buf, 0x7e84, dt.size);
6456 put_smstate(u64, buf, 0x7e88, dt.address);
6458 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6459 put_smstate(u16, buf, 0x7e70, seg.selector);
6460 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6461 put_smstate(u32, buf, 0x7e74, seg.limit);
6462 put_smstate(u64, buf, 0x7e78, seg.base);
6464 kvm_x86_ops->get_gdt(vcpu, &dt);
6465 put_smstate(u32, buf, 0x7e64, dt.size);
6466 put_smstate(u64, buf, 0x7e68, dt.address);
6468 for (i = 0; i < 6; i++)
6469 enter_smm_save_seg_64(vcpu, buf, i);
6475 static void enter_smm(struct kvm_vcpu *vcpu)
6477 struct kvm_segment cs, ds;
6482 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6483 vcpu->arch.hflags |= HF_SMM_MASK;
6484 memset(buf, 0, 512);
6485 if (guest_cpuid_has_longmode(vcpu))
6486 enter_smm_save_state_64(vcpu, buf);
6488 enter_smm_save_state_32(vcpu, buf);
6490 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6492 if (kvm_x86_ops->get_nmi_mask(vcpu))
6493 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6495 kvm_x86_ops->set_nmi_mask(vcpu, true);
6497 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6498 kvm_rip_write(vcpu, 0x8000);
6500 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6501 kvm_x86_ops->set_cr0(vcpu, cr0);
6502 vcpu->arch.cr0 = cr0;
6504 kvm_x86_ops->set_cr4(vcpu, 0);
6506 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6507 dt.address = dt.size = 0;
6508 kvm_x86_ops->set_idt(vcpu, &dt);
6510 __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6512 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6513 cs.base = vcpu->arch.smbase;
6518 cs.limit = ds.limit = 0xffffffff;
6519 cs.type = ds.type = 0x3;
6520 cs.dpl = ds.dpl = 0;
6525 cs.avl = ds.avl = 0;
6526 cs.present = ds.present = 1;
6527 cs.unusable = ds.unusable = 0;
6528 cs.padding = ds.padding = 0;
6530 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6531 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6532 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6533 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6534 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6535 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6537 if (guest_cpuid_has_longmode(vcpu))
6538 kvm_x86_ops->set_efer(vcpu, 0);
6540 kvm_update_cpuid(vcpu);
6541 kvm_mmu_reset_context(vcpu);
6544 static void process_smi(struct kvm_vcpu *vcpu)
6546 vcpu->arch.smi_pending = true;
6547 kvm_make_request(KVM_REQ_EVENT, vcpu);
6550 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6552 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6555 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6557 u64 eoi_exit_bitmap[4];
6559 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6562 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6564 if (irqchip_split(vcpu->kvm))
6565 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6567 if (vcpu->arch.apicv_active)
6568 kvm_x86_ops->sync_pir_to_irr(vcpu);
6569 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6571 bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6572 vcpu_to_synic(vcpu)->vec_bitmap, 256);
6573 kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6576 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6578 ++vcpu->stat.tlb_flush;
6579 kvm_x86_ops->tlb_flush(vcpu);
6582 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6584 struct page *page = NULL;
6586 if (!lapic_in_kernel(vcpu))
6589 if (!kvm_x86_ops->set_apic_access_page_addr)
6592 page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6593 if (is_error_page(page))
6595 kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6598 * Do not pin apic access page in memory, the MMU notifier
6599 * will call us again if it is migrated or swapped out.
6603 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6605 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6606 unsigned long address)
6609 * The physical address of apic access page is stored in the VMCS.
6610 * Update it when it becomes invalid.
6612 if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6613 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6617 * Returns 1 to let vcpu_run() continue the guest execution loop without
6618 * exiting to the userspace. Otherwise, the value will be returned to the
6621 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6625 dm_request_for_irq_injection(vcpu) &&
6626 kvm_cpu_accept_dm_intr(vcpu);
6628 bool req_immediate_exit = false;
6630 if (vcpu->requests) {
6631 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6632 kvm_mmu_unload(vcpu);
6633 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6634 __kvm_migrate_timers(vcpu);
6635 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6636 kvm_gen_update_masterclock(vcpu->kvm);
6637 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6638 kvm_gen_kvmclock_update(vcpu);
6639 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6640 r = kvm_guest_time_update(vcpu);
6644 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6645 kvm_mmu_sync_roots(vcpu);
6646 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6647 kvm_vcpu_flush_tlb(vcpu);
6648 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6649 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6653 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6654 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6658 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6659 vcpu->fpu_active = 0;
6660 kvm_x86_ops->fpu_deactivate(vcpu);
6662 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6663 /* Page is swapped out. Do synthetic halt */
6664 vcpu->arch.apf.halted = true;
6668 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6669 record_steal_time(vcpu);
6670 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6672 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6674 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6675 kvm_pmu_handle_event(vcpu);
6676 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6677 kvm_pmu_deliver_pmi(vcpu);
6678 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6679 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6680 if (test_bit(vcpu->arch.pending_ioapic_eoi,
6681 vcpu->arch.ioapic_handled_vectors)) {
6682 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6683 vcpu->run->eoi.vector =
6684 vcpu->arch.pending_ioapic_eoi;
6689 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6690 vcpu_scan_ioapic(vcpu);
6691 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6692 kvm_vcpu_reload_apic_access_page(vcpu);
6693 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6694 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6695 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6699 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6700 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6701 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6705 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6706 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6707 vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6713 * KVM_REQ_HV_STIMER has to be processed after
6714 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6715 * depend on the guest clock being up-to-date
6717 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6718 kvm_hv_process_stimers(vcpu);
6722 * KVM_REQ_EVENT is not set when posted interrupts are set by
6723 * VT-d hardware, so we have to update RVI unconditionally.
6725 if (kvm_lapic_enabled(vcpu)) {
6727 * Update architecture specific hints for APIC
6728 * virtual interrupt delivery.
6730 if (vcpu->arch.apicv_active)
6731 kvm_x86_ops->hwapic_irr_update(vcpu,
6732 kvm_lapic_find_highest_irr(vcpu));
6735 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6736 kvm_apic_accept_events(vcpu);
6737 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6742 if (inject_pending_event(vcpu, req_int_win) != 0)
6743 req_immediate_exit = true;
6745 /* Enable NMI/IRQ window open exits if needed.
6747 * SMIs have two cases: 1) they can be nested, and
6748 * then there is nothing to do here because RSM will
6749 * cause a vmexit anyway; 2) or the SMI can be pending
6750 * because inject_pending_event has completed the
6751 * injection of an IRQ or NMI from the previous vmexit,
6752 * and then we request an immediate exit to inject the SMI.
6754 if (vcpu->arch.smi_pending && !is_smm(vcpu))
6755 req_immediate_exit = true;
6756 if (vcpu->arch.nmi_pending)
6757 kvm_x86_ops->enable_nmi_window(vcpu);
6758 if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6759 kvm_x86_ops->enable_irq_window(vcpu);
6762 if (kvm_lapic_enabled(vcpu)) {
6763 update_cr8_intercept(vcpu);
6764 kvm_lapic_sync_to_vapic(vcpu);
6768 r = kvm_mmu_reload(vcpu);
6770 goto cancel_injection;
6775 kvm_x86_ops->prepare_guest_switch(vcpu);
6776 if (vcpu->fpu_active)
6777 kvm_load_guest_fpu(vcpu);
6778 vcpu->mode = IN_GUEST_MODE;
6780 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6783 * We should set ->mode before check ->requests,
6784 * Please see the comment in kvm_make_all_cpus_request.
6785 * This also orders the write to mode from any reads
6786 * to the page tables done while the VCPU is running.
6787 * Please see the comment in kvm_flush_remote_tlbs.
6789 smp_mb__after_srcu_read_unlock();
6791 local_irq_disable();
6793 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6794 || need_resched() || signal_pending(current)) {
6795 vcpu->mode = OUTSIDE_GUEST_MODE;
6799 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6801 goto cancel_injection;
6804 kvm_load_guest_xcr0(vcpu);
6806 if (req_immediate_exit) {
6807 kvm_make_request(KVM_REQ_EVENT, vcpu);
6808 smp_send_reschedule(vcpu->cpu);
6811 trace_kvm_entry(vcpu->vcpu_id);
6812 wait_lapic_expire(vcpu);
6813 guest_enter_irqoff();
6815 if (unlikely(vcpu->arch.switch_db_regs)) {
6817 set_debugreg(vcpu->arch.eff_db[0], 0);
6818 set_debugreg(vcpu->arch.eff_db[1], 1);
6819 set_debugreg(vcpu->arch.eff_db[2], 2);
6820 set_debugreg(vcpu->arch.eff_db[3], 3);
6821 set_debugreg(vcpu->arch.dr6, 6);
6822 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6825 kvm_x86_ops->run(vcpu);
6828 * Do this here before restoring debug registers on the host. And
6829 * since we do this before handling the vmexit, a DR access vmexit
6830 * can (a) read the correct value of the debug registers, (b) set
6831 * KVM_DEBUGREG_WONT_EXIT again.
6833 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6834 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6835 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6836 kvm_update_dr0123(vcpu);
6837 kvm_update_dr6(vcpu);
6838 kvm_update_dr7(vcpu);
6839 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6843 * If the guest has used debug registers, at least dr7
6844 * will be disabled while returning to the host.
6845 * If we don't have active breakpoints in the host, we don't
6846 * care about the messed up debug address registers. But if
6847 * we have some of them active, restore the old state.
6849 if (hw_breakpoint_active())
6850 hw_breakpoint_restore();
6852 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6854 vcpu->mode = OUTSIDE_GUEST_MODE;
6857 kvm_put_guest_xcr0(vcpu);
6859 kvm_x86_ops->handle_external_intr(vcpu);
6863 guest_exit_irqoff();
6868 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6871 * Profile KVM exit RIPs:
6873 if (unlikely(prof_on == KVM_PROFILING)) {
6874 unsigned long rip = kvm_rip_read(vcpu);
6875 profile_hit(KVM_PROFILING, (void *)rip);
6878 if (unlikely(vcpu->arch.tsc_always_catchup))
6879 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6881 if (vcpu->arch.apic_attention)
6882 kvm_lapic_sync_from_vapic(vcpu);
6884 r = kvm_x86_ops->handle_exit(vcpu);
6888 kvm_x86_ops->cancel_injection(vcpu);
6889 if (unlikely(vcpu->arch.apic_attention))
6890 kvm_lapic_sync_from_vapic(vcpu);
6895 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6897 if (!kvm_arch_vcpu_runnable(vcpu) &&
6898 (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6899 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6900 kvm_vcpu_block(vcpu);
6901 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6903 if (kvm_x86_ops->post_block)
6904 kvm_x86_ops->post_block(vcpu);
6906 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6910 kvm_apic_accept_events(vcpu);
6911 switch(vcpu->arch.mp_state) {
6912 case KVM_MP_STATE_HALTED:
6913 vcpu->arch.pv.pv_unhalted = false;
6914 vcpu->arch.mp_state =
6915 KVM_MP_STATE_RUNNABLE;
6916 case KVM_MP_STATE_RUNNABLE:
6917 vcpu->arch.apf.halted = false;
6919 case KVM_MP_STATE_INIT_RECEIVED:
6928 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6930 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6931 !vcpu->arch.apf.halted);
6934 static int vcpu_run(struct kvm_vcpu *vcpu)
6937 struct kvm *kvm = vcpu->kvm;
6939 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6942 if (kvm_vcpu_running(vcpu)) {
6943 r = vcpu_enter_guest(vcpu);
6945 r = vcpu_block(kvm, vcpu);
6951 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6952 if (kvm_cpu_has_pending_timer(vcpu))
6953 kvm_inject_pending_timer_irqs(vcpu);
6955 if (dm_request_for_irq_injection(vcpu) &&
6956 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6958 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6959 ++vcpu->stat.request_irq_exits;
6963 kvm_check_async_pf_completion(vcpu);
6965 if (signal_pending(current)) {
6967 vcpu->run->exit_reason = KVM_EXIT_INTR;
6968 ++vcpu->stat.signal_exits;
6971 if (need_resched()) {
6972 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6974 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6978 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6983 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6986 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6987 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6988 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6989 if (r != EMULATE_DONE)
6994 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6996 BUG_ON(!vcpu->arch.pio.count);
6998 return complete_emulated_io(vcpu);
7002 * Implements the following, as a state machine:
7006 * for each mmio piece in the fragment
7014 * for each mmio piece in the fragment
7019 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7021 struct kvm_run *run = vcpu->run;
7022 struct kvm_mmio_fragment *frag;
7025 BUG_ON(!vcpu->mmio_needed);
7027 /* Complete previous fragment */
7028 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7029 len = min(8u, frag->len);
7030 if (!vcpu->mmio_is_write)
7031 memcpy(frag->data, run->mmio.data, len);
7033 if (frag->len <= 8) {
7034 /* Switch to the next fragment. */
7036 vcpu->mmio_cur_fragment++;
7038 /* Go forward to the next mmio piece. */
7044 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7045 vcpu->mmio_needed = 0;
7047 /* FIXME: return into emulator if single-stepping. */
7048 if (vcpu->mmio_is_write)
7050 vcpu->mmio_read_completed = 1;
7051 return complete_emulated_io(vcpu);
7054 run->exit_reason = KVM_EXIT_MMIO;
7055 run->mmio.phys_addr = frag->gpa;
7056 if (vcpu->mmio_is_write)
7057 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7058 run->mmio.len = min(8u, frag->len);
7059 run->mmio.is_write = vcpu->mmio_is_write;
7060 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7065 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7067 struct fpu *fpu = ¤t->thread.fpu;
7071 fpu__activate_curr(fpu);
7073 if (vcpu->sigset_active)
7074 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7076 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7077 kvm_vcpu_block(vcpu);
7078 kvm_apic_accept_events(vcpu);
7079 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
7084 /* re-sync apic's tpr */
7085 if (!lapic_in_kernel(vcpu)) {
7086 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7092 if (unlikely(vcpu->arch.complete_userspace_io)) {
7093 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7094 vcpu->arch.complete_userspace_io = NULL;
7099 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7104 post_kvm_run_save(vcpu);
7105 if (vcpu->sigset_active)
7106 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7111 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7113 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7115 * We are here if userspace calls get_regs() in the middle of
7116 * instruction emulation. Registers state needs to be copied
7117 * back from emulation context to vcpu. Userspace shouldn't do
7118 * that usually, but some bad designed PV devices (vmware
7119 * backdoor interface) need this to work
7121 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7122 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7124 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7125 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7126 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7127 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7128 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7129 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7130 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7131 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7132 #ifdef CONFIG_X86_64
7133 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7134 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7135 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7136 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7137 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7138 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7139 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7140 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7143 regs->rip = kvm_rip_read(vcpu);
7144 regs->rflags = kvm_get_rflags(vcpu);
7149 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7151 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7152 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7154 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7155 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7156 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7157 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7158 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7159 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7160 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7161 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7162 #ifdef CONFIG_X86_64
7163 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7164 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7165 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7166 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7167 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7168 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7169 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7170 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7173 kvm_rip_write(vcpu, regs->rip);
7174 kvm_set_rflags(vcpu, regs->rflags);
7176 vcpu->arch.exception.pending = false;
7178 kvm_make_request(KVM_REQ_EVENT, vcpu);
7183 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7185 struct kvm_segment cs;
7187 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7191 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7193 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7194 struct kvm_sregs *sregs)
7198 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7199 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7200 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7201 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7202 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7203 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7205 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7206 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7208 kvm_x86_ops->get_idt(vcpu, &dt);
7209 sregs->idt.limit = dt.size;
7210 sregs->idt.base = dt.address;
7211 kvm_x86_ops->get_gdt(vcpu, &dt);
7212 sregs->gdt.limit = dt.size;
7213 sregs->gdt.base = dt.address;
7215 sregs->cr0 = kvm_read_cr0(vcpu);
7216 sregs->cr2 = vcpu->arch.cr2;
7217 sregs->cr3 = kvm_read_cr3(vcpu);
7218 sregs->cr4 = kvm_read_cr4(vcpu);
7219 sregs->cr8 = kvm_get_cr8(vcpu);
7220 sregs->efer = vcpu->arch.efer;
7221 sregs->apic_base = kvm_get_apic_base(vcpu);
7223 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7225 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7226 set_bit(vcpu->arch.interrupt.nr,
7227 (unsigned long *)sregs->interrupt_bitmap);
7232 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7233 struct kvm_mp_state *mp_state)
7235 kvm_apic_accept_events(vcpu);
7236 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7237 vcpu->arch.pv.pv_unhalted)
7238 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7240 mp_state->mp_state = vcpu->arch.mp_state;
7245 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7246 struct kvm_mp_state *mp_state)
7248 if (!lapic_in_kernel(vcpu) &&
7249 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7252 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7253 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7254 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7256 vcpu->arch.mp_state = mp_state->mp_state;
7257 kvm_make_request(KVM_REQ_EVENT, vcpu);
7261 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7262 int reason, bool has_error_code, u32 error_code)
7264 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7267 init_emulate_ctxt(vcpu);
7269 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7270 has_error_code, error_code);
7273 return EMULATE_FAIL;
7275 kvm_rip_write(vcpu, ctxt->eip);
7276 kvm_set_rflags(vcpu, ctxt->eflags);
7277 kvm_make_request(KVM_REQ_EVENT, vcpu);
7278 return EMULATE_DONE;
7280 EXPORT_SYMBOL_GPL(kvm_task_switch);
7282 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7283 struct kvm_sregs *sregs)
7285 struct msr_data apic_base_msr;
7286 int mmu_reset_needed = 0;
7287 int pending_vec, max_bits, idx;
7290 if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7293 dt.size = sregs->idt.limit;
7294 dt.address = sregs->idt.base;
7295 kvm_x86_ops->set_idt(vcpu, &dt);
7296 dt.size = sregs->gdt.limit;
7297 dt.address = sregs->gdt.base;
7298 kvm_x86_ops->set_gdt(vcpu, &dt);
7300 vcpu->arch.cr2 = sregs->cr2;
7301 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7302 vcpu->arch.cr3 = sregs->cr3;
7303 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7305 kvm_set_cr8(vcpu, sregs->cr8);
7307 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7308 kvm_x86_ops->set_efer(vcpu, sregs->efer);
7309 apic_base_msr.data = sregs->apic_base;
7310 apic_base_msr.host_initiated = true;
7311 kvm_set_apic_base(vcpu, &apic_base_msr);
7313 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7314 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7315 vcpu->arch.cr0 = sregs->cr0;
7317 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7318 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7319 if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7320 kvm_update_cpuid(vcpu);
7322 idx = srcu_read_lock(&vcpu->kvm->srcu);
7323 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7324 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7325 mmu_reset_needed = 1;
7327 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7329 if (mmu_reset_needed)
7330 kvm_mmu_reset_context(vcpu);
7332 max_bits = KVM_NR_INTERRUPTS;
7333 pending_vec = find_first_bit(
7334 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7335 if (pending_vec < max_bits) {
7336 kvm_queue_interrupt(vcpu, pending_vec, false);
7337 pr_debug("Set back pending irq %d\n", pending_vec);
7340 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7341 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7342 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7343 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7344 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7345 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7347 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7348 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7350 update_cr8_intercept(vcpu);
7352 /* Older userspace won't unhalt the vcpu on reset. */
7353 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7354 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7356 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7358 kvm_make_request(KVM_REQ_EVENT, vcpu);
7363 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7364 struct kvm_guest_debug *dbg)
7366 unsigned long rflags;
7369 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7371 if (vcpu->arch.exception.pending)
7373 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7374 kvm_queue_exception(vcpu, DB_VECTOR);
7376 kvm_queue_exception(vcpu, BP_VECTOR);
7380 * Read rflags as long as potentially injected trace flags are still
7383 rflags = kvm_get_rflags(vcpu);
7385 vcpu->guest_debug = dbg->control;
7386 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7387 vcpu->guest_debug = 0;
7389 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7390 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7391 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7392 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7394 for (i = 0; i < KVM_NR_DB_REGS; i++)
7395 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7397 kvm_update_dr7(vcpu);
7399 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7400 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7401 get_segment_base(vcpu, VCPU_SREG_CS);
7404 * Trigger an rflags update that will inject or remove the trace
7407 kvm_set_rflags(vcpu, rflags);
7409 kvm_x86_ops->update_bp_intercept(vcpu);
7419 * Translate a guest virtual address to a guest physical address.
7421 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7422 struct kvm_translation *tr)
7424 unsigned long vaddr = tr->linear_address;
7428 idx = srcu_read_lock(&vcpu->kvm->srcu);
7429 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7430 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7431 tr->physical_address = gpa;
7432 tr->valid = gpa != UNMAPPED_GVA;
7439 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7441 struct fxregs_state *fxsave =
7442 &vcpu->arch.guest_fpu.state.fxsave;
7444 memcpy(fpu->fpr, fxsave->st_space, 128);
7445 fpu->fcw = fxsave->cwd;
7446 fpu->fsw = fxsave->swd;
7447 fpu->ftwx = fxsave->twd;
7448 fpu->last_opcode = fxsave->fop;
7449 fpu->last_ip = fxsave->rip;
7450 fpu->last_dp = fxsave->rdp;
7451 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7456 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7458 struct fxregs_state *fxsave =
7459 &vcpu->arch.guest_fpu.state.fxsave;
7461 memcpy(fxsave->st_space, fpu->fpr, 128);
7462 fxsave->cwd = fpu->fcw;
7463 fxsave->swd = fpu->fsw;
7464 fxsave->twd = fpu->ftwx;
7465 fxsave->fop = fpu->last_opcode;
7466 fxsave->rip = fpu->last_ip;
7467 fxsave->rdp = fpu->last_dp;
7468 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7473 static void fx_init(struct kvm_vcpu *vcpu)
7475 fpstate_init(&vcpu->arch.guest_fpu.state);
7476 if (boot_cpu_has(X86_FEATURE_XSAVES))
7477 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7478 host_xcr0 | XSTATE_COMPACTION_ENABLED;
7481 * Ensure guest xcr0 is valid for loading
7483 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7485 vcpu->arch.cr0 |= X86_CR0_ET;
7488 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7490 if (vcpu->guest_fpu_loaded)
7494 * Restore all possible states in the guest,
7495 * and assume host would use all available bits.
7496 * Guest xcr0 would be loaded later.
7498 vcpu->guest_fpu_loaded = 1;
7499 __kernel_fpu_begin();
7500 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7504 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7506 if (!vcpu->guest_fpu_loaded)
7509 vcpu->guest_fpu_loaded = 0;
7510 copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7512 ++vcpu->stat.fpu_reload;
7516 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7518 void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7520 kvmclock_reset(vcpu);
7522 kvm_x86_ops->vcpu_free(vcpu);
7523 free_cpumask_var(wbinvd_dirty_mask);
7526 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7529 struct kvm_vcpu *vcpu;
7531 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7532 printk_once(KERN_WARNING
7533 "kvm: SMP vm created on host with unstable TSC; "
7534 "guest TSC will not be reliable\n");
7536 vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7541 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7545 kvm_vcpu_mtrr_init(vcpu);
7546 r = vcpu_load(vcpu);
7549 kvm_vcpu_reset(vcpu, false);
7550 kvm_mmu_setup(vcpu);
7555 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7557 struct msr_data msr;
7558 struct kvm *kvm = vcpu->kvm;
7560 if (vcpu_load(vcpu))
7563 msr.index = MSR_IA32_TSC;
7564 msr.host_initiated = true;
7565 kvm_write_tsc(vcpu, &msr);
7568 if (!kvmclock_periodic_sync)
7571 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7572 KVMCLOCK_SYNC_PERIOD);
7575 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7578 vcpu->arch.apf.msr_val = 0;
7580 r = vcpu_load(vcpu);
7582 kvm_mmu_unload(vcpu);
7585 kvm_x86_ops->vcpu_free(vcpu);
7588 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7590 vcpu->arch.hflags = 0;
7592 vcpu->arch.smi_pending = 0;
7593 atomic_set(&vcpu->arch.nmi_queued, 0);
7594 vcpu->arch.nmi_pending = 0;
7595 vcpu->arch.nmi_injected = false;
7596 kvm_clear_interrupt_queue(vcpu);
7597 kvm_clear_exception_queue(vcpu);
7599 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7600 kvm_update_dr0123(vcpu);
7601 vcpu->arch.dr6 = DR6_INIT;
7602 kvm_update_dr6(vcpu);
7603 vcpu->arch.dr7 = DR7_FIXED_1;
7604 kvm_update_dr7(vcpu);
7608 kvm_make_request(KVM_REQ_EVENT, vcpu);
7609 vcpu->arch.apf.msr_val = 0;
7610 vcpu->arch.st.msr_val = 0;
7612 kvmclock_reset(vcpu);
7614 kvm_clear_async_pf_completion_queue(vcpu);
7615 kvm_async_pf_hash_reset(vcpu);
7616 vcpu->arch.apf.halted = false;
7619 kvm_pmu_reset(vcpu);
7620 vcpu->arch.smbase = 0x30000;
7623 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7624 vcpu->arch.regs_avail = ~0;
7625 vcpu->arch.regs_dirty = ~0;
7627 kvm_x86_ops->vcpu_reset(vcpu, init_event);
7630 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7632 struct kvm_segment cs;
7634 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7635 cs.selector = vector << 8;
7636 cs.base = vector << 12;
7637 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7638 kvm_rip_write(vcpu, 0);
7641 int kvm_arch_hardware_enable(void)
7644 struct kvm_vcpu *vcpu;
7649 bool stable, backwards_tsc = false;
7651 kvm_shared_msr_cpu_online();
7652 ret = kvm_x86_ops->hardware_enable();
7656 local_tsc = rdtsc();
7657 stable = !check_tsc_unstable();
7658 list_for_each_entry(kvm, &vm_list, vm_list) {
7659 kvm_for_each_vcpu(i, vcpu, kvm) {
7660 if (!stable && vcpu->cpu == smp_processor_id())
7661 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7662 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7663 backwards_tsc = true;
7664 if (vcpu->arch.last_host_tsc > max_tsc)
7665 max_tsc = vcpu->arch.last_host_tsc;
7671 * Sometimes, even reliable TSCs go backwards. This happens on
7672 * platforms that reset TSC during suspend or hibernate actions, but
7673 * maintain synchronization. We must compensate. Fortunately, we can
7674 * detect that condition here, which happens early in CPU bringup,
7675 * before any KVM threads can be running. Unfortunately, we can't
7676 * bring the TSCs fully up to date with real time, as we aren't yet far
7677 * enough into CPU bringup that we know how much real time has actually
7678 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7679 * variables that haven't been updated yet.
7681 * So we simply find the maximum observed TSC above, then record the
7682 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7683 * the adjustment will be applied. Note that we accumulate
7684 * adjustments, in case multiple suspend cycles happen before some VCPU
7685 * gets a chance to run again. In the event that no KVM threads get a
7686 * chance to run, we will miss the entire elapsed period, as we'll have
7687 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7688 * loose cycle time. This isn't too big a deal, since the loss will be
7689 * uniform across all VCPUs (not to mention the scenario is extremely
7690 * unlikely). It is possible that a second hibernate recovery happens
7691 * much faster than a first, causing the observed TSC here to be
7692 * smaller; this would require additional padding adjustment, which is
7693 * why we set last_host_tsc to the local tsc observed here.
7695 * N.B. - this code below runs only on platforms with reliable TSC,
7696 * as that is the only way backwards_tsc is set above. Also note
7697 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7698 * have the same delta_cyc adjustment applied if backwards_tsc
7699 * is detected. Note further, this adjustment is only done once,
7700 * as we reset last_host_tsc on all VCPUs to stop this from being
7701 * called multiple times (one for each physical CPU bringup).
7703 * Platforms with unreliable TSCs don't have to deal with this, they
7704 * will be compensated by the logic in vcpu_load, which sets the TSC to
7705 * catchup mode. This will catchup all VCPUs to real time, but cannot
7706 * guarantee that they stay in perfect synchronization.
7708 if (backwards_tsc) {
7709 u64 delta_cyc = max_tsc - local_tsc;
7710 backwards_tsc_observed = true;
7711 list_for_each_entry(kvm, &vm_list, vm_list) {
7712 kvm_for_each_vcpu(i, vcpu, kvm) {
7713 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7714 vcpu->arch.last_host_tsc = local_tsc;
7715 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7719 * We have to disable TSC offset matching.. if you were
7720 * booting a VM while issuing an S4 host suspend....
7721 * you may have some problem. Solving this issue is
7722 * left as an exercise to the reader.
7724 kvm->arch.last_tsc_nsec = 0;
7725 kvm->arch.last_tsc_write = 0;
7732 void kvm_arch_hardware_disable(void)
7734 kvm_x86_ops->hardware_disable();
7735 drop_user_return_notifiers();
7738 int kvm_arch_hardware_setup(void)
7742 r = kvm_x86_ops->hardware_setup();
7746 if (kvm_has_tsc_control) {
7748 * Make sure the user can only configure tsc_khz values that
7749 * fit into a signed integer.
7750 * A min value is not calculated needed because it will always
7751 * be 1 on all machines.
7753 u64 max = min(0x7fffffffULL,
7754 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7755 kvm_max_guest_tsc_khz = max;
7757 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7760 kvm_init_msr_list();
7764 void kvm_arch_hardware_unsetup(void)
7766 kvm_x86_ops->hardware_unsetup();
7769 void kvm_arch_check_processor_compat(void *rtn)
7771 kvm_x86_ops->check_processor_compatibility(rtn);
7774 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7776 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7778 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7780 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7782 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7785 struct static_key kvm_no_apic_vcpu __read_mostly;
7786 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7788 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7794 BUG_ON(vcpu->kvm == NULL);
7797 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7798 vcpu->arch.pv.pv_unhalted = false;
7799 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7800 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7801 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7803 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7805 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7810 vcpu->arch.pio_data = page_address(page);
7812 kvm_set_tsc_khz(vcpu, max_tsc_khz);
7814 r = kvm_mmu_create(vcpu);
7816 goto fail_free_pio_data;
7818 if (irqchip_in_kernel(kvm)) {
7819 r = kvm_create_lapic(vcpu);
7821 goto fail_mmu_destroy;
7823 static_key_slow_inc(&kvm_no_apic_vcpu);
7825 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7827 if (!vcpu->arch.mce_banks) {
7829 goto fail_free_lapic;
7831 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7833 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7835 goto fail_free_mce_banks;
7840 vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7841 vcpu->arch.pv_time_enabled = false;
7843 vcpu->arch.guest_supported_xcr0 = 0;
7844 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7846 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7848 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7850 kvm_async_pf_hash_reset(vcpu);
7853 vcpu->arch.pending_external_vector = -1;
7855 kvm_hv_vcpu_init(vcpu);
7859 fail_free_mce_banks:
7860 kfree(vcpu->arch.mce_banks);
7862 kvm_free_lapic(vcpu);
7864 kvm_mmu_destroy(vcpu);
7866 free_page((unsigned long)vcpu->arch.pio_data);
7871 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7875 kvm_hv_vcpu_uninit(vcpu);
7876 kvm_pmu_destroy(vcpu);
7877 kfree(vcpu->arch.mce_banks);
7878 kvm_free_lapic(vcpu);
7879 idx = srcu_read_lock(&vcpu->kvm->srcu);
7880 kvm_mmu_destroy(vcpu);
7881 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7882 free_page((unsigned long)vcpu->arch.pio_data);
7883 if (!lapic_in_kernel(vcpu))
7884 static_key_slow_dec(&kvm_no_apic_vcpu);
7887 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7889 kvm_x86_ops->sched_in(vcpu, cpu);
7892 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7897 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7898 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7899 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7900 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7901 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7903 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7904 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7905 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7906 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7907 &kvm->arch.irq_sources_bitmap);
7909 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7910 mutex_init(&kvm->arch.apic_map_lock);
7911 mutex_init(&kvm->arch.hyperv.hv_lock);
7912 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7914 kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
7915 pvclock_update_vm_gtod_copy(kvm);
7917 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7918 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7920 kvm_page_track_init(kvm);
7921 kvm_mmu_init_vm(kvm);
7923 if (kvm_x86_ops->vm_init)
7924 return kvm_x86_ops->vm_init(kvm);
7929 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7932 r = vcpu_load(vcpu);
7934 kvm_mmu_unload(vcpu);
7938 static void kvm_free_vcpus(struct kvm *kvm)
7941 struct kvm_vcpu *vcpu;
7944 * Unpin any mmu pages first.
7946 kvm_for_each_vcpu(i, vcpu, kvm) {
7947 kvm_clear_async_pf_completion_queue(vcpu);
7948 kvm_unload_vcpu_mmu(vcpu);
7950 kvm_for_each_vcpu(i, vcpu, kvm)
7951 kvm_arch_vcpu_free(vcpu);
7953 mutex_lock(&kvm->lock);
7954 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7955 kvm->vcpus[i] = NULL;
7957 atomic_set(&kvm->online_vcpus, 0);
7958 mutex_unlock(&kvm->lock);
7961 void kvm_arch_sync_events(struct kvm *kvm)
7963 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7964 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7965 kvm_free_all_assigned_devices(kvm);
7969 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7973 struct kvm_memslots *slots = kvm_memslots(kvm);
7974 struct kvm_memory_slot *slot, old;
7976 /* Called with kvm->slots_lock held. */
7977 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7980 slot = id_to_memslot(slots, id);
7986 * MAP_SHARED to prevent internal slot pages from being moved
7989 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7990 MAP_SHARED | MAP_ANONYMOUS, 0);
7991 if (IS_ERR((void *)hva))
7992 return PTR_ERR((void *)hva);
8001 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8002 struct kvm_userspace_memory_region m;
8004 m.slot = id | (i << 16);
8006 m.guest_phys_addr = gpa;
8007 m.userspace_addr = hva;
8008 m.memory_size = size;
8009 r = __kvm_set_memory_region(kvm, &m);
8015 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8021 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8023 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8027 mutex_lock(&kvm->slots_lock);
8028 r = __x86_set_memory_region(kvm, id, gpa, size);
8029 mutex_unlock(&kvm->slots_lock);
8033 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8035 void kvm_arch_destroy_vm(struct kvm *kvm)
8037 if (current->mm == kvm->mm) {
8039 * Free memory regions allocated on behalf of userspace,
8040 * unless the the memory map has changed due to process exit
8043 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8044 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8045 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8047 if (kvm_x86_ops->vm_destroy)
8048 kvm_x86_ops->vm_destroy(kvm);
8049 kvm_iommu_unmap_guest(kvm);
8050 kfree(kvm->arch.vpic);
8051 kfree(kvm->arch.vioapic);
8052 kvm_free_vcpus(kvm);
8053 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8054 kvm_mmu_uninit_vm(kvm);
8057 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8058 struct kvm_memory_slot *dont)
8062 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8063 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8064 kvfree(free->arch.rmap[i]);
8065 free->arch.rmap[i] = NULL;
8070 if (!dont || free->arch.lpage_info[i - 1] !=
8071 dont->arch.lpage_info[i - 1]) {
8072 kvfree(free->arch.lpage_info[i - 1]);
8073 free->arch.lpage_info[i - 1] = NULL;
8077 kvm_page_track_free_memslot(free, dont);
8080 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8081 unsigned long npages)
8085 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8086 struct kvm_lpage_info *linfo;
8091 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8092 slot->base_gfn, level) + 1;
8094 slot->arch.rmap[i] =
8095 kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
8096 if (!slot->arch.rmap[i])
8101 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
8105 slot->arch.lpage_info[i - 1] = linfo;
8107 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8108 linfo[0].disallow_lpage = 1;
8109 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8110 linfo[lpages - 1].disallow_lpage = 1;
8111 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8113 * If the gfn and userspace address are not aligned wrt each
8114 * other, or if explicitly asked to, disable large page
8115 * support for this slot
8117 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8118 !kvm_largepages_enabled()) {
8121 for (j = 0; j < lpages; ++j)
8122 linfo[j].disallow_lpage = 1;
8126 if (kvm_page_track_create_memslot(slot, npages))
8132 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8133 kvfree(slot->arch.rmap[i]);
8134 slot->arch.rmap[i] = NULL;
8138 kvfree(slot->arch.lpage_info[i - 1]);
8139 slot->arch.lpage_info[i - 1] = NULL;
8144 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8147 * memslots->generation has been incremented.
8148 * mmio generation may have reached its maximum value.
8150 kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8153 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8154 struct kvm_memory_slot *memslot,
8155 const struct kvm_userspace_memory_region *mem,
8156 enum kvm_mr_change change)
8161 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8162 struct kvm_memory_slot *new)
8164 /* Still write protect RO slot */
8165 if (new->flags & KVM_MEM_READONLY) {
8166 kvm_mmu_slot_remove_write_access(kvm, new);
8171 * Call kvm_x86_ops dirty logging hooks when they are valid.
8173 * kvm_x86_ops->slot_disable_log_dirty is called when:
8175 * - KVM_MR_CREATE with dirty logging is disabled
8176 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8178 * The reason is, in case of PML, we need to set D-bit for any slots
8179 * with dirty logging disabled in order to eliminate unnecessary GPA
8180 * logging in PML buffer (and potential PML buffer full VMEXT). This
8181 * guarantees leaving PML enabled during guest's lifetime won't have
8182 * any additonal overhead from PML when guest is running with dirty
8183 * logging disabled for memory slots.
8185 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8186 * to dirty logging mode.
8188 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8190 * In case of write protect:
8192 * Write protect all pages for dirty logging.
8194 * All the sptes including the large sptes which point to this
8195 * slot are set to readonly. We can not create any new large
8196 * spte on this slot until the end of the logging.
8198 * See the comments in fast_page_fault().
8200 if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8201 if (kvm_x86_ops->slot_enable_log_dirty)
8202 kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8204 kvm_mmu_slot_remove_write_access(kvm, new);
8206 if (kvm_x86_ops->slot_disable_log_dirty)
8207 kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8211 void kvm_arch_commit_memory_region(struct kvm *kvm,
8212 const struct kvm_userspace_memory_region *mem,
8213 const struct kvm_memory_slot *old,
8214 const struct kvm_memory_slot *new,
8215 enum kvm_mr_change change)
8217 int nr_mmu_pages = 0;
8219 if (!kvm->arch.n_requested_mmu_pages)
8220 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8223 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8226 * Dirty logging tracks sptes in 4k granularity, meaning that large
8227 * sptes have to be split. If live migration is successful, the guest
8228 * in the source machine will be destroyed and large sptes will be
8229 * created in the destination. However, if the guest continues to run
8230 * in the source machine (for example if live migration fails), small
8231 * sptes will remain around and cause bad performance.
8233 * Scan sptes if dirty logging has been stopped, dropping those
8234 * which can be collapsed into a single large-page spte. Later
8235 * page faults will create the large-page sptes.
8237 if ((change != KVM_MR_DELETE) &&
8238 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8239 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8240 kvm_mmu_zap_collapsible_sptes(kvm, new);
8243 * Set up write protection and/or dirty logging for the new slot.
8245 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8246 * been zapped so no dirty logging staff is needed for old slot. For
8247 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8248 * new and it's also covered when dealing with the new slot.
8250 * FIXME: const-ify all uses of struct kvm_memory_slot.
8252 if (change != KVM_MR_DELETE)
8253 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8256 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8258 kvm_mmu_invalidate_zap_all_pages(kvm);
8261 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8262 struct kvm_memory_slot *slot)
8264 kvm_page_track_flush_slot(kvm, slot);
8267 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8269 if (!list_empty_careful(&vcpu->async_pf.done))
8272 if (kvm_apic_has_events(vcpu))
8275 if (vcpu->arch.pv.pv_unhalted)
8278 if (atomic_read(&vcpu->arch.nmi_queued))
8281 if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8284 if (kvm_arch_interrupt_allowed(vcpu) &&
8285 kvm_cpu_has_interrupt(vcpu))
8288 if (kvm_hv_has_stimer_pending(vcpu))
8294 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8296 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8297 kvm_x86_ops->check_nested_events(vcpu, false);
8299 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8302 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8304 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8307 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8309 return kvm_x86_ops->interrupt_allowed(vcpu);
8312 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8314 if (is_64_bit_mode(vcpu))
8315 return kvm_rip_read(vcpu);
8316 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8317 kvm_rip_read(vcpu));
8319 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8321 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8323 return kvm_get_linear_rip(vcpu) == linear_rip;
8325 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8327 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8329 unsigned long rflags;
8331 rflags = kvm_x86_ops->get_rflags(vcpu);
8332 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8333 rflags &= ~X86_EFLAGS_TF;
8336 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8338 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8340 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8341 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8342 rflags |= X86_EFLAGS_TF;
8343 kvm_x86_ops->set_rflags(vcpu, rflags);
8346 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8348 __kvm_set_rflags(vcpu, rflags);
8349 kvm_make_request(KVM_REQ_EVENT, vcpu);
8351 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8353 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8357 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8361 r = kvm_mmu_reload(vcpu);
8365 if (!vcpu->arch.mmu.direct_map &&
8366 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8369 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8372 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8374 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8377 static inline u32 kvm_async_pf_next_probe(u32 key)
8379 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8382 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8384 u32 key = kvm_async_pf_hash_fn(gfn);
8386 while (vcpu->arch.apf.gfns[key] != ~0)
8387 key = kvm_async_pf_next_probe(key);
8389 vcpu->arch.apf.gfns[key] = gfn;
8392 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8395 u32 key = kvm_async_pf_hash_fn(gfn);
8397 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8398 (vcpu->arch.apf.gfns[key] != gfn &&
8399 vcpu->arch.apf.gfns[key] != ~0); i++)
8400 key = kvm_async_pf_next_probe(key);
8405 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8407 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8410 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8414 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8416 vcpu->arch.apf.gfns[i] = ~0;
8418 j = kvm_async_pf_next_probe(j);
8419 if (vcpu->arch.apf.gfns[j] == ~0)
8421 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8423 * k lies cyclically in ]i,j]
8425 * |....j i.k.| or |.k..j i...|
8427 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8428 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8433 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8436 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8440 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8441 struct kvm_async_pf *work)
8443 struct x86_exception fault;
8445 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8446 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8448 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8449 (vcpu->arch.apf.send_user_only &&
8450 kvm_x86_ops->get_cpl(vcpu) == 0))
8451 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8452 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8453 fault.vector = PF_VECTOR;
8454 fault.error_code_valid = true;
8455 fault.error_code = 0;
8456 fault.nested_page_fault = false;
8457 fault.address = work->arch.token;
8458 kvm_inject_page_fault(vcpu, &fault);
8462 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8463 struct kvm_async_pf *work)
8465 struct x86_exception fault;
8467 trace_kvm_async_pf_ready(work->arch.token, work->gva);
8468 if (work->wakeup_all)
8469 work->arch.token = ~0; /* broadcast wakeup */
8471 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8473 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8474 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8475 fault.vector = PF_VECTOR;
8476 fault.error_code_valid = true;
8477 fault.error_code = 0;
8478 fault.nested_page_fault = false;
8479 fault.address = work->arch.token;
8480 kvm_inject_page_fault(vcpu, &fault);
8482 vcpu->arch.apf.halted = false;
8483 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8486 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8488 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8491 return !kvm_event_needs_reinjection(vcpu) &&
8492 kvm_x86_ops->interrupt_allowed(vcpu);
8495 void kvm_arch_start_assignment(struct kvm *kvm)
8497 atomic_inc(&kvm->arch.assigned_device_count);
8499 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8501 void kvm_arch_end_assignment(struct kvm *kvm)
8503 atomic_dec(&kvm->arch.assigned_device_count);
8505 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8507 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8509 return atomic_read(&kvm->arch.assigned_device_count);
8511 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8513 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8515 atomic_inc(&kvm->arch.noncoherent_dma_count);
8517 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8519 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8521 atomic_dec(&kvm->arch.noncoherent_dma_count);
8523 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8525 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8527 return atomic_read(&kvm->arch.noncoherent_dma_count);
8529 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8531 bool kvm_arch_has_irq_bypass(void)
8533 return kvm_x86_ops->update_pi_irte != NULL;
8536 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8537 struct irq_bypass_producer *prod)
8539 struct kvm_kernel_irqfd *irqfd =
8540 container_of(cons, struct kvm_kernel_irqfd, consumer);
8542 irqfd->producer = prod;
8544 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8545 prod->irq, irqfd->gsi, 1);
8548 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8549 struct irq_bypass_producer *prod)
8552 struct kvm_kernel_irqfd *irqfd =
8553 container_of(cons, struct kvm_kernel_irqfd, consumer);
8555 WARN_ON(irqfd->producer != prod);
8556 irqfd->producer = NULL;
8559 * When producer of consumer is unregistered, we change back to
8560 * remapped mode, so we can re-use the current implementation
8561 * when the irq is masked/disabled or the consumer side (KVM
8562 * int this case doesn't want to receive the interrupts.
8564 ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8566 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8567 " fails: %d\n", irqfd->consumer.token, ret);
8570 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8571 uint32_t guest_irq, bool set)
8573 if (!kvm_x86_ops->update_pi_irte)
8576 return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8579 bool kvm_vector_hashing_enabled(void)
8581 return vector_hashing;
8583 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8585 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8586 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8587 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8588 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8589 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8590 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8591 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8592 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8593 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8594 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8595 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8596 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8597 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8599 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8600 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8601 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8602 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8603 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);