2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
70 #include <asm/mshyperv.h>
71 #include <asm/hypervisor.h>
73 #define CREATE_TRACE_POINTS
76 #define MAX_IO_MSRS 256
77 #define KVM_MAX_MCE_BANKS 32
78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
81 #define emul_to_vcpu(ctxt) \
82 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
85 * - enable syscall per default because its emulated by KVM
86 * - enable LME and LMA per default on 64 bit KVM
90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
99 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
102 static void process_nmi(struct kvm_vcpu *vcpu);
103 static void enter_smm(struct kvm_vcpu *vcpu);
104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
105 static void store_regs(struct kvm_vcpu *vcpu);
106 static int sync_regs(struct kvm_vcpu *vcpu);
108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
111 static bool __read_mostly ignore_msrs = 0;
112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
114 static bool __read_mostly report_ignored_msrs = true;
115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
117 unsigned int min_timer_period_us = 200;
118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
120 static bool __read_mostly kvmclock_periodic_sync = true;
121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
123 bool __read_mostly kvm_has_tsc_control;
124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
125 u32 __read_mostly kvm_max_guest_tsc_khz;
126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
127 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
129 u64 __read_mostly kvm_max_tsc_scaling_ratio;
130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
135 static u32 __read_mostly tsc_tolerance_ppm = 250;
136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
139 unsigned int __read_mostly lapic_timer_advance_ns = 1000;
140 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
141 EXPORT_SYMBOL_GPL(lapic_timer_advance_ns);
143 static bool __read_mostly vector_hashing = true;
144 module_param(vector_hashing, bool, S_IRUGO);
146 bool __read_mostly enable_vmware_backdoor = false;
147 module_param(enable_vmware_backdoor, bool, S_IRUGO);
148 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
150 static bool __read_mostly force_emulation_prefix = false;
151 module_param(force_emulation_prefix, bool, S_IRUGO);
153 #define KVM_NR_SHARED_MSRS 16
155 struct kvm_shared_msrs_global {
157 u32 msrs[KVM_NR_SHARED_MSRS];
160 struct kvm_shared_msrs {
161 struct user_return_notifier urn;
163 struct kvm_shared_msr_values {
166 } values[KVM_NR_SHARED_MSRS];
169 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
170 static struct kvm_shared_msrs __percpu *shared_msrs;
172 struct kvm_stats_debugfs_item debugfs_entries[] = {
173 { "pf_fixed", VCPU_STAT(pf_fixed) },
174 { "pf_guest", VCPU_STAT(pf_guest) },
175 { "tlb_flush", VCPU_STAT(tlb_flush) },
176 { "invlpg", VCPU_STAT(invlpg) },
177 { "exits", VCPU_STAT(exits) },
178 { "io_exits", VCPU_STAT(io_exits) },
179 { "mmio_exits", VCPU_STAT(mmio_exits) },
180 { "signal_exits", VCPU_STAT(signal_exits) },
181 { "irq_window", VCPU_STAT(irq_window_exits) },
182 { "nmi_window", VCPU_STAT(nmi_window_exits) },
183 { "halt_exits", VCPU_STAT(halt_exits) },
184 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
185 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
186 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
187 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
188 { "hypercalls", VCPU_STAT(hypercalls) },
189 { "request_irq", VCPU_STAT(request_irq_exits) },
190 { "irq_exits", VCPU_STAT(irq_exits) },
191 { "host_state_reload", VCPU_STAT(host_state_reload) },
192 { "fpu_reload", VCPU_STAT(fpu_reload) },
193 { "insn_emulation", VCPU_STAT(insn_emulation) },
194 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
195 { "irq_injections", VCPU_STAT(irq_injections) },
196 { "nmi_injections", VCPU_STAT(nmi_injections) },
197 { "req_event", VCPU_STAT(req_event) },
198 { "l1d_flush", VCPU_STAT(l1d_flush) },
199 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
200 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
201 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
202 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
203 { "mmu_flooded", VM_STAT(mmu_flooded) },
204 { "mmu_recycled", VM_STAT(mmu_recycled) },
205 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
206 { "mmu_unsync", VM_STAT(mmu_unsync) },
207 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
208 { "largepages", VM_STAT(lpages) },
209 { "max_mmu_page_hash_collisions",
210 VM_STAT(max_mmu_page_hash_collisions) },
214 u64 __read_mostly host_xcr0;
216 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
218 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
221 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
222 vcpu->arch.apf.gfns[i] = ~0;
225 static void kvm_on_user_return(struct user_return_notifier *urn)
228 struct kvm_shared_msrs *locals
229 = container_of(urn, struct kvm_shared_msrs, urn);
230 struct kvm_shared_msr_values *values;
234 * Disabling irqs at this point since the following code could be
235 * interrupted and executed through kvm_arch_hardware_disable()
237 local_irq_save(flags);
238 if (locals->registered) {
239 locals->registered = false;
240 user_return_notifier_unregister(urn);
242 local_irq_restore(flags);
243 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
244 values = &locals->values[slot];
245 if (values->host != values->curr) {
246 wrmsrl(shared_msrs_global.msrs[slot], values->host);
247 values->curr = values->host;
252 static void shared_msr_update(unsigned slot, u32 msr)
255 unsigned int cpu = smp_processor_id();
256 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
258 /* only read, and nobody should modify it at this time,
259 * so don't need lock */
260 if (slot >= shared_msrs_global.nr) {
261 printk(KERN_ERR "kvm: invalid MSR slot!");
264 rdmsrl_safe(msr, &value);
265 smsr->values[slot].host = value;
266 smsr->values[slot].curr = value;
269 void kvm_define_shared_msr(unsigned slot, u32 msr)
271 BUG_ON(slot >= KVM_NR_SHARED_MSRS);
272 shared_msrs_global.msrs[slot] = msr;
273 if (slot >= shared_msrs_global.nr)
274 shared_msrs_global.nr = slot + 1;
276 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
278 static void kvm_shared_msr_cpu_online(void)
282 for (i = 0; i < shared_msrs_global.nr; ++i)
283 shared_msr_update(i, shared_msrs_global.msrs[i]);
286 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
288 unsigned int cpu = smp_processor_id();
289 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
292 if (((value ^ smsr->values[slot].curr) & mask) == 0)
294 smsr->values[slot].curr = value;
295 err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
299 if (!smsr->registered) {
300 smsr->urn.on_user_return = kvm_on_user_return;
301 user_return_notifier_register(&smsr->urn);
302 smsr->registered = true;
306 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
308 static void drop_user_return_notifiers(void)
310 unsigned int cpu = smp_processor_id();
311 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
313 if (smsr->registered)
314 kvm_on_user_return(&smsr->urn);
317 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
319 return vcpu->arch.apic_base;
321 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
323 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
325 return kvm_apic_mode(kvm_get_apic_base(vcpu));
327 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
329 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
331 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
332 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
333 u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
334 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
336 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
338 if (!msr_info->host_initiated) {
339 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
341 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
345 kvm_lapic_set_base(vcpu, msr_info->data);
348 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
350 asmlinkage __visible void kvm_spurious_fault(void)
352 /* Fault while not rebooting. We want the trace. */
355 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
357 #define EXCPT_BENIGN 0
358 #define EXCPT_CONTRIBUTORY 1
361 static int exception_class(int vector)
371 return EXCPT_CONTRIBUTORY;
378 #define EXCPT_FAULT 0
380 #define EXCPT_ABORT 2
381 #define EXCPT_INTERRUPT 3
383 static int exception_type(int vector)
387 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
388 return EXCPT_INTERRUPT;
392 /* #DB is trap, as instruction watchpoints are handled elsewhere */
393 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
396 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
399 /* Reserved exceptions will result in fault */
403 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
405 unsigned nr = vcpu->arch.exception.nr;
406 bool has_payload = vcpu->arch.exception.has_payload;
407 unsigned long payload = vcpu->arch.exception.payload;
415 * "Certain debug exceptions may clear bit 0-3. The
416 * remaining contents of the DR6 register are never
417 * cleared by the processor".
419 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
421 * DR6.RTM is set by all #DB exceptions that don't clear it.
423 vcpu->arch.dr6 |= DR6_RTM;
424 vcpu->arch.dr6 |= payload;
426 * Bit 16 should be set in the payload whenever the #DB
427 * exception should clear DR6.RTM. This makes the payload
428 * compatible with the pending debug exceptions under VMX.
429 * Though not currently documented in the SDM, this also
430 * makes the payload compatible with the exit qualification
431 * for #DB exceptions under VMX.
433 vcpu->arch.dr6 ^= payload & DR6_RTM;
436 vcpu->arch.cr2 = payload;
440 vcpu->arch.exception.has_payload = false;
441 vcpu->arch.exception.payload = 0;
443 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
445 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
446 unsigned nr, bool has_error, u32 error_code,
447 bool has_payload, unsigned long payload, bool reinject)
452 kvm_make_request(KVM_REQ_EVENT, vcpu);
454 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
456 if (has_error && !is_protmode(vcpu))
460 * On vmentry, vcpu->arch.exception.pending is only
461 * true if an event injection was blocked by
462 * nested_run_pending. In that case, however,
463 * vcpu_enter_guest requests an immediate exit,
464 * and the guest shouldn't proceed far enough to
467 WARN_ON_ONCE(vcpu->arch.exception.pending);
468 vcpu->arch.exception.injected = true;
469 if (WARN_ON_ONCE(has_payload)) {
471 * A reinjected event has already
472 * delivered its payload.
478 vcpu->arch.exception.pending = true;
479 vcpu->arch.exception.injected = false;
481 vcpu->arch.exception.has_error_code = has_error;
482 vcpu->arch.exception.nr = nr;
483 vcpu->arch.exception.error_code = error_code;
484 vcpu->arch.exception.has_payload = has_payload;
485 vcpu->arch.exception.payload = payload;
487 * In guest mode, payload delivery should be deferred,
488 * so that the L1 hypervisor can intercept #PF before
489 * CR2 is modified (or intercept #DB before DR6 is
490 * modified under nVMX). However, for ABI
491 * compatibility with KVM_GET_VCPU_EVENTS and
492 * KVM_SET_VCPU_EVENTS, we can't delay payload
493 * delivery unless userspace has enabled this
494 * functionality via the per-VM capability,
495 * KVM_CAP_EXCEPTION_PAYLOAD.
497 if (!vcpu->kvm->arch.exception_payload_enabled ||
498 !is_guest_mode(vcpu))
499 kvm_deliver_exception_payload(vcpu);
503 /* to check exception */
504 prev_nr = vcpu->arch.exception.nr;
505 if (prev_nr == DF_VECTOR) {
506 /* triple fault -> shutdown */
507 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
510 class1 = exception_class(prev_nr);
511 class2 = exception_class(nr);
512 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
513 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
515 * Generate double fault per SDM Table 5-5. Set
516 * exception.pending = true so that the double fault
517 * can trigger a nested vmexit.
519 vcpu->arch.exception.pending = true;
520 vcpu->arch.exception.injected = false;
521 vcpu->arch.exception.has_error_code = true;
522 vcpu->arch.exception.nr = DF_VECTOR;
523 vcpu->arch.exception.error_code = 0;
524 vcpu->arch.exception.has_payload = false;
525 vcpu->arch.exception.payload = 0;
527 /* replace previous exception with a new one in a hope
528 that instruction re-execution will regenerate lost
533 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
535 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
537 EXPORT_SYMBOL_GPL(kvm_queue_exception);
539 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
541 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
543 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
545 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
546 unsigned long payload)
548 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
551 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
552 u32 error_code, unsigned long payload)
554 kvm_multiple_exception(vcpu, nr, true, error_code,
555 true, payload, false);
558 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
561 kvm_inject_gp(vcpu, 0);
563 return kvm_skip_emulated_instruction(vcpu);
567 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
569 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
571 ++vcpu->stat.pf_guest;
572 vcpu->arch.exception.nested_apf =
573 is_guest_mode(vcpu) && fault->async_page_fault;
574 if (vcpu->arch.exception.nested_apf) {
575 vcpu->arch.apf.nested_apf_token = fault->address;
576 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
578 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
582 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
584 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
586 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
587 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
589 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
591 return fault->nested_page_fault;
594 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
596 atomic_inc(&vcpu->arch.nmi_queued);
597 kvm_make_request(KVM_REQ_NMI, vcpu);
599 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
601 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
603 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
605 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
607 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
609 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
611 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
614 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
615 * a #GP and return false.
617 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
619 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
621 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
624 EXPORT_SYMBOL_GPL(kvm_require_cpl);
626 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
628 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
631 kvm_queue_exception(vcpu, UD_VECTOR);
634 EXPORT_SYMBOL_GPL(kvm_require_dr);
637 * This function will be used to read from the physical memory of the currently
638 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
639 * can read from guest physical or from the guest's guest physical memory.
641 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
642 gfn_t ngfn, void *data, int offset, int len,
645 struct x86_exception exception;
649 ngpa = gfn_to_gpa(ngfn);
650 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
651 if (real_gfn == UNMAPPED_GVA)
654 real_gfn = gpa_to_gfn(real_gfn);
656 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
658 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
660 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
661 void *data, int offset, int len, u32 access)
663 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
664 data, offset, len, access);
668 * Load the pae pdptrs. Return true is they are all valid.
670 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
672 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
673 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
676 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
678 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
679 offset * sizeof(u64), sizeof(pdpte),
680 PFERR_USER_MASK|PFERR_WRITE_MASK);
685 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
686 if ((pdpte[i] & PT_PRESENT_MASK) &&
688 vcpu->arch.mmu->guest_rsvd_check.rsvd_bits_mask[0][2])) {
695 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
696 __set_bit(VCPU_EXREG_PDPTR,
697 (unsigned long *)&vcpu->arch.regs_avail);
698 __set_bit(VCPU_EXREG_PDPTR,
699 (unsigned long *)&vcpu->arch.regs_dirty);
704 EXPORT_SYMBOL_GPL(load_pdptrs);
706 bool pdptrs_changed(struct kvm_vcpu *vcpu)
708 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
714 if (is_long_mode(vcpu) || !is_pae(vcpu) || !is_paging(vcpu))
717 if (!test_bit(VCPU_EXREG_PDPTR,
718 (unsigned long *)&vcpu->arch.regs_avail))
721 gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
722 offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
723 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
724 PFERR_USER_MASK | PFERR_WRITE_MASK);
727 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
732 EXPORT_SYMBOL_GPL(pdptrs_changed);
734 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
736 unsigned long old_cr0 = kvm_read_cr0(vcpu);
737 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
742 if (cr0 & 0xffffffff00000000UL)
746 cr0 &= ~CR0_RESERVED_BITS;
748 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
751 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
754 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
756 if ((vcpu->arch.efer & EFER_LME)) {
761 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
766 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
771 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
774 kvm_x86_ops->set_cr0(vcpu, cr0);
776 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
777 kvm_clear_async_pf_completion_queue(vcpu);
778 kvm_async_pf_hash_reset(vcpu);
781 if ((cr0 ^ old_cr0) & update_bits)
782 kvm_mmu_reset_context(vcpu);
784 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
785 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
786 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
787 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
791 EXPORT_SYMBOL_GPL(kvm_set_cr0);
793 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
795 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
797 EXPORT_SYMBOL_GPL(kvm_lmsw);
799 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
801 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
802 !vcpu->guest_xcr0_loaded) {
803 /* kvm_set_xcr() also depends on this */
804 if (vcpu->arch.xcr0 != host_xcr0)
805 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
806 vcpu->guest_xcr0_loaded = 1;
810 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
812 if (vcpu->guest_xcr0_loaded) {
813 if (vcpu->arch.xcr0 != host_xcr0)
814 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
815 vcpu->guest_xcr0_loaded = 0;
819 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
822 u64 old_xcr0 = vcpu->arch.xcr0;
825 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
826 if (index != XCR_XFEATURE_ENABLED_MASK)
828 if (!(xcr0 & XFEATURE_MASK_FP))
830 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
834 * Do not allow the guest to set bits that we do not support
835 * saving. However, xcr0 bit 0 is always set, even if the
836 * emulated CPU does not support XSAVE (see fx_init).
838 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
839 if (xcr0 & ~valid_bits)
842 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
843 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
846 if (xcr0 & XFEATURE_MASK_AVX512) {
847 if (!(xcr0 & XFEATURE_MASK_YMM))
849 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
852 vcpu->arch.xcr0 = xcr0;
854 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
855 kvm_update_cpuid(vcpu);
859 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
861 if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
862 __kvm_set_xcr(vcpu, index, xcr)) {
863 kvm_inject_gp(vcpu, 0);
868 EXPORT_SYMBOL_GPL(kvm_set_xcr);
870 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
872 unsigned long old_cr4 = kvm_read_cr4(vcpu);
873 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
874 X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
876 if (cr4 & CR4_RESERVED_BITS)
879 if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
882 if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
885 if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
888 if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
891 if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
894 if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
897 if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
900 if (is_long_mode(vcpu)) {
901 if (!(cr4 & X86_CR4_PAE))
903 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
904 && ((cr4 ^ old_cr4) & pdptr_bits)
905 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
909 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
910 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
913 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
914 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
918 if (kvm_x86_ops->set_cr4(vcpu, cr4))
921 if (((cr4 ^ old_cr4) & pdptr_bits) ||
922 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
923 kvm_mmu_reset_context(vcpu);
925 if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
926 kvm_update_cpuid(vcpu);
930 EXPORT_SYMBOL_GPL(kvm_set_cr4);
932 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
934 bool skip_tlb_flush = false;
936 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
939 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
940 cr3 &= ~X86_CR3_PCID_NOFLUSH;
944 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
945 if (!skip_tlb_flush) {
946 kvm_mmu_sync_roots(vcpu);
947 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
952 if (is_long_mode(vcpu) &&
953 (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
955 else if (is_pae(vcpu) && is_paging(vcpu) &&
956 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
959 kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
960 vcpu->arch.cr3 = cr3;
961 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
965 EXPORT_SYMBOL_GPL(kvm_set_cr3);
967 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
969 if (cr8 & CR8_RESERVED_BITS)
971 if (lapic_in_kernel(vcpu))
972 kvm_lapic_set_tpr(vcpu, cr8);
974 vcpu->arch.cr8 = cr8;
977 EXPORT_SYMBOL_GPL(kvm_set_cr8);
979 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
981 if (lapic_in_kernel(vcpu))
982 return kvm_lapic_get_cr8(vcpu);
984 return vcpu->arch.cr8;
986 EXPORT_SYMBOL_GPL(kvm_get_cr8);
988 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
992 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
993 for (i = 0; i < KVM_NR_DB_REGS; i++)
994 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
995 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
999 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1001 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1002 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1005 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1009 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1010 dr7 = vcpu->arch.guest_debug_dr7;
1012 dr7 = vcpu->arch.dr7;
1013 kvm_x86_ops->set_dr7(vcpu, dr7);
1014 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1015 if (dr7 & DR7_BP_EN_MASK)
1016 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1019 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1021 u64 fixed = DR6_FIXED_1;
1023 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1028 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1032 vcpu->arch.db[dr] = val;
1033 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1034 vcpu->arch.eff_db[dr] = val;
1039 if (val & 0xffffffff00000000ULL)
1040 return -1; /* #GP */
1041 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1042 kvm_update_dr6(vcpu);
1047 if (val & 0xffffffff00000000ULL)
1048 return -1; /* #GP */
1049 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1050 kvm_update_dr7(vcpu);
1057 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1059 if (__kvm_set_dr(vcpu, dr, val)) {
1060 kvm_inject_gp(vcpu, 0);
1065 EXPORT_SYMBOL_GPL(kvm_set_dr);
1067 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1071 *val = vcpu->arch.db[dr];
1076 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1077 *val = vcpu->arch.dr6;
1079 *val = kvm_x86_ops->get_dr6(vcpu);
1084 *val = vcpu->arch.dr7;
1089 EXPORT_SYMBOL_GPL(kvm_get_dr);
1091 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1093 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
1097 err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1100 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
1101 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
1104 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1107 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1108 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1110 * This list is modified at module load time to reflect the
1111 * capabilities of the host cpu. This capabilities test skips MSRs that are
1112 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1113 * may depend on host virtualization features rather than host cpu features.
1116 static u32 msrs_to_save[] = {
1117 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1119 #ifdef CONFIG_X86_64
1120 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1122 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1123 MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1124 MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1127 static unsigned num_msrs_to_save;
1129 static u32 emulated_msrs[] = {
1130 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1131 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1132 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1133 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1134 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1135 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1136 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1138 HV_X64_MSR_VP_INDEX,
1139 HV_X64_MSR_VP_RUNTIME,
1140 HV_X64_MSR_SCONTROL,
1141 HV_X64_MSR_STIMER0_CONFIG,
1142 HV_X64_MSR_VP_ASSIST_PAGE,
1143 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1144 HV_X64_MSR_TSC_EMULATION_STATUS,
1146 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1149 MSR_IA32_TSC_ADJUST,
1150 MSR_IA32_TSCDEADLINE,
1151 MSR_IA32_MISC_ENABLE,
1152 MSR_IA32_MCG_STATUS,
1154 MSR_IA32_MCG_EXT_CTL,
1158 MSR_MISC_FEATURES_ENABLES,
1159 MSR_AMD64_VIRT_SPEC_CTRL,
1162 static unsigned num_emulated_msrs;
1165 * List of msr numbers which are used to expose MSR-based features that
1166 * can be used by a hypervisor to validate requested CPU features.
1168 static u32 msr_based_features[] = {
1170 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1171 MSR_IA32_VMX_PINBASED_CTLS,
1172 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1173 MSR_IA32_VMX_PROCBASED_CTLS,
1174 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1175 MSR_IA32_VMX_EXIT_CTLS,
1176 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1177 MSR_IA32_VMX_ENTRY_CTLS,
1179 MSR_IA32_VMX_CR0_FIXED0,
1180 MSR_IA32_VMX_CR0_FIXED1,
1181 MSR_IA32_VMX_CR4_FIXED0,
1182 MSR_IA32_VMX_CR4_FIXED1,
1183 MSR_IA32_VMX_VMCS_ENUM,
1184 MSR_IA32_VMX_PROCBASED_CTLS2,
1185 MSR_IA32_VMX_EPT_VPID_CAP,
1186 MSR_IA32_VMX_VMFUNC,
1190 MSR_IA32_ARCH_CAPABILITIES,
1193 static unsigned int num_msr_based_features;
1195 u64 kvm_get_arch_capabilities(void)
1199 rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES, &data);
1202 * If we're doing cache flushes (either "always" or "cond")
1203 * we will do one whenever the guest does a vmlaunch/vmresume.
1204 * If an outer hypervisor is doing the cache flush for us
1205 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1206 * capability to the guest too, and if EPT is disabled we're not
1207 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1208 * require a nested hypervisor to do a flush of its own.
1210 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1211 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1215 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities);
1217 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1219 switch (msr->index) {
1220 case MSR_IA32_ARCH_CAPABILITIES:
1221 msr->data = kvm_get_arch_capabilities();
1223 case MSR_IA32_UCODE_REV:
1224 rdmsrl_safe(msr->index, &msr->data);
1227 if (kvm_x86_ops->get_msr_feature(msr))
1233 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1235 struct kvm_msr_entry msr;
1239 r = kvm_get_msr_feature(&msr);
1248 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1250 if (efer & efer_reserved_bits)
1253 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1256 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1261 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1263 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1265 u64 old_efer = vcpu->arch.efer;
1267 if (!kvm_valid_efer(vcpu, efer))
1271 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1275 efer |= vcpu->arch.efer & EFER_LMA;
1277 kvm_x86_ops->set_efer(vcpu, efer);
1279 /* Update reserved bits */
1280 if ((efer ^ old_efer) & EFER_NX)
1281 kvm_mmu_reset_context(vcpu);
1286 void kvm_enable_efer_bits(u64 mask)
1288 efer_reserved_bits &= ~mask;
1290 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1293 * Writes msr value into into the appropriate "register".
1294 * Returns 0 on success, non-0 otherwise.
1295 * Assumes vcpu_load() was already called.
1297 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1299 switch (msr->index) {
1302 case MSR_KERNEL_GS_BASE:
1305 if (is_noncanonical_address(msr->data, vcpu))
1308 case MSR_IA32_SYSENTER_EIP:
1309 case MSR_IA32_SYSENTER_ESP:
1311 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1312 * non-canonical address is written on Intel but not on
1313 * AMD (which ignores the top 32-bits, because it does
1314 * not implement 64-bit SYSENTER).
1316 * 64-bit code should hence be able to write a non-canonical
1317 * value on AMD. Making the address canonical ensures that
1318 * vmentry does not fail on Intel after writing a non-canonical
1319 * value, and that something deterministic happens if the guest
1320 * invokes 64-bit SYSENTER.
1322 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1324 return kvm_x86_ops->set_msr(vcpu, msr);
1326 EXPORT_SYMBOL_GPL(kvm_set_msr);
1329 * Adapt set_msr() to msr_io()'s calling convention
1331 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1333 struct msr_data msr;
1337 msr.host_initiated = true;
1338 r = kvm_get_msr(vcpu, &msr);
1346 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1348 struct msr_data msr;
1352 msr.host_initiated = true;
1353 return kvm_set_msr(vcpu, &msr);
1356 #ifdef CONFIG_X86_64
1357 struct pvclock_gtod_data {
1360 struct { /* extract of a clocksource struct */
1373 static struct pvclock_gtod_data pvclock_gtod_data;
1375 static void update_pvclock_gtod(struct timekeeper *tk)
1377 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1380 boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1382 write_seqcount_begin(&vdata->seq);
1384 /* copy pvclock gtod data */
1385 vdata->clock.vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode;
1386 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
1387 vdata->clock.mask = tk->tkr_mono.mask;
1388 vdata->clock.mult = tk->tkr_mono.mult;
1389 vdata->clock.shift = tk->tkr_mono.shift;
1391 vdata->boot_ns = boot_ns;
1392 vdata->nsec_base = tk->tkr_mono.xtime_nsec;
1394 vdata->wall_time_sec = tk->xtime_sec;
1396 write_seqcount_end(&vdata->seq);
1400 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1403 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1404 * vcpu_enter_guest. This function is only called from
1405 * the physical CPU that is running vcpu.
1407 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1410 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1414 struct pvclock_wall_clock wc;
1415 struct timespec64 boot;
1420 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1425 ++version; /* first time write, random junk */
1429 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1433 * The guest calculates current wall clock time by adding
1434 * system time (updated by kvm_guest_time_update below) to the
1435 * wall clock specified here. guest system time equals host
1436 * system time for us, thus we must fill in host boot time here.
1438 getboottime64(&boot);
1440 if (kvm->arch.kvmclock_offset) {
1441 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1442 boot = timespec64_sub(boot, ts);
1444 wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1445 wc.nsec = boot.tv_nsec;
1446 wc.version = version;
1448 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1451 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1454 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1456 do_shl32_div32(dividend, divisor);
1460 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1461 s8 *pshift, u32 *pmultiplier)
1469 scaled64 = scaled_hz;
1470 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1475 tps32 = (uint32_t)tps64;
1476 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1477 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1485 *pmultiplier = div_frac(scaled64, tps32);
1487 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1488 __func__, base_hz, scaled_hz, shift, *pmultiplier);
1491 #ifdef CONFIG_X86_64
1492 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1495 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1496 static unsigned long max_tsc_khz;
1498 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1500 u64 v = (u64)khz * (1000000 + ppm);
1505 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1509 /* Guest TSC same frequency as host TSC? */
1511 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1515 /* TSC scaling supported? */
1516 if (!kvm_has_tsc_control) {
1517 if (user_tsc_khz > tsc_khz) {
1518 vcpu->arch.tsc_catchup = 1;
1519 vcpu->arch.tsc_always_catchup = 1;
1522 WARN(1, "user requested TSC rate below hardware speed\n");
1527 /* TSC scaling required - calculate ratio */
1528 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1529 user_tsc_khz, tsc_khz);
1531 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1532 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1537 vcpu->arch.tsc_scaling_ratio = ratio;
1541 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1543 u32 thresh_lo, thresh_hi;
1544 int use_scaling = 0;
1546 /* tsc_khz can be zero if TSC calibration fails */
1547 if (user_tsc_khz == 0) {
1548 /* set tsc_scaling_ratio to a safe value */
1549 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1553 /* Compute a scale to convert nanoseconds in TSC cycles */
1554 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1555 &vcpu->arch.virtual_tsc_shift,
1556 &vcpu->arch.virtual_tsc_mult);
1557 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1560 * Compute the variation in TSC rate which is acceptable
1561 * within the range of tolerance and decide if the
1562 * rate being applied is within that bounds of the hardware
1563 * rate. If so, no scaling or compensation need be done.
1565 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1566 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1567 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1568 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1571 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1574 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1576 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1577 vcpu->arch.virtual_tsc_mult,
1578 vcpu->arch.virtual_tsc_shift);
1579 tsc += vcpu->arch.this_tsc_write;
1583 static inline int gtod_is_based_on_tsc(int mode)
1585 return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1588 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1590 #ifdef CONFIG_X86_64
1592 struct kvm_arch *ka = &vcpu->kvm->arch;
1593 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1595 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1596 atomic_read(&vcpu->kvm->online_vcpus));
1599 * Once the masterclock is enabled, always perform request in
1600 * order to update it.
1602 * In order to enable masterclock, the host clocksource must be TSC
1603 * and the vcpus need to have matched TSCs. When that happens,
1604 * perform request to enable masterclock.
1606 if (ka->use_master_clock ||
1607 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1608 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1610 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1611 atomic_read(&vcpu->kvm->online_vcpus),
1612 ka->use_master_clock, gtod->clock.vclock_mode);
1616 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1618 u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1619 vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1623 * Multiply tsc by a fixed point number represented by ratio.
1625 * The most significant 64-N bits (mult) of ratio represent the
1626 * integral part of the fixed point number; the remaining N bits
1627 * (frac) represent the fractional part, ie. ratio represents a fixed
1628 * point number (mult + frac * 2^(-N)).
1630 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1632 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1634 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1637 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1640 u64 ratio = vcpu->arch.tsc_scaling_ratio;
1642 if (ratio != kvm_default_tsc_scaling_ratio)
1643 _tsc = __scale_tsc(ratio, tsc);
1647 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1649 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1653 tsc = kvm_scale_tsc(vcpu, rdtsc());
1655 return target_tsc - tsc;
1658 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1660 u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1662 return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1664 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1666 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1668 vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1671 static inline bool kvm_check_tsc_unstable(void)
1673 #ifdef CONFIG_X86_64
1675 * TSC is marked unstable when we're running on Hyper-V,
1676 * 'TSC page' clocksource is good.
1678 if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1681 return check_tsc_unstable();
1684 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1686 struct kvm *kvm = vcpu->kvm;
1687 u64 offset, ns, elapsed;
1688 unsigned long flags;
1690 bool already_matched;
1691 u64 data = msr->data;
1692 bool synchronizing = false;
1694 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1695 offset = kvm_compute_tsc_offset(vcpu, data);
1696 ns = ktime_get_boot_ns();
1697 elapsed = ns - kvm->arch.last_tsc_nsec;
1699 if (vcpu->arch.virtual_tsc_khz) {
1700 if (data == 0 && msr->host_initiated) {
1702 * detection of vcpu initialization -- need to sync
1703 * with other vCPUs. This particularly helps to keep
1704 * kvm_clock stable after CPU hotplug
1706 synchronizing = true;
1708 u64 tsc_exp = kvm->arch.last_tsc_write +
1709 nsec_to_cycles(vcpu, elapsed);
1710 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1712 * Special case: TSC write with a small delta (1 second)
1713 * of virtual cycle time against real time is
1714 * interpreted as an attempt to synchronize the CPU.
1716 synchronizing = data < tsc_exp + tsc_hz &&
1717 data + tsc_hz > tsc_exp;
1722 * For a reliable TSC, we can match TSC offsets, and for an unstable
1723 * TSC, we add elapsed time in this computation. We could let the
1724 * compensation code attempt to catch up if we fall behind, but
1725 * it's better to try to match offsets from the beginning.
1727 if (synchronizing &&
1728 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1729 if (!kvm_check_tsc_unstable()) {
1730 offset = kvm->arch.cur_tsc_offset;
1731 pr_debug("kvm: matched tsc offset for %llu\n", data);
1733 u64 delta = nsec_to_cycles(vcpu, elapsed);
1735 offset = kvm_compute_tsc_offset(vcpu, data);
1736 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1739 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1742 * We split periods of matched TSC writes into generations.
1743 * For each generation, we track the original measured
1744 * nanosecond time, offset, and write, so if TSCs are in
1745 * sync, we can match exact offset, and if not, we can match
1746 * exact software computation in compute_guest_tsc()
1748 * These values are tracked in kvm->arch.cur_xxx variables.
1750 kvm->arch.cur_tsc_generation++;
1751 kvm->arch.cur_tsc_nsec = ns;
1752 kvm->arch.cur_tsc_write = data;
1753 kvm->arch.cur_tsc_offset = offset;
1755 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1756 kvm->arch.cur_tsc_generation, data);
1760 * We also track th most recent recorded KHZ, write and time to
1761 * allow the matching interval to be extended at each write.
1763 kvm->arch.last_tsc_nsec = ns;
1764 kvm->arch.last_tsc_write = data;
1765 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1767 vcpu->arch.last_guest_tsc = data;
1769 /* Keep track of which generation this VCPU has synchronized to */
1770 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1771 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1772 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1774 if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1775 update_ia32_tsc_adjust_msr(vcpu, offset);
1777 kvm_vcpu_write_tsc_offset(vcpu, offset);
1778 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1780 spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1782 kvm->arch.nr_vcpus_matched_tsc = 0;
1783 } else if (!already_matched) {
1784 kvm->arch.nr_vcpus_matched_tsc++;
1787 kvm_track_tsc_matching(vcpu);
1788 spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1791 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1793 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1796 u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1797 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1800 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1802 if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1803 WARN_ON(adjustment < 0);
1804 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1805 adjust_tsc_offset_guest(vcpu, adjustment);
1808 #ifdef CONFIG_X86_64
1810 static u64 read_tsc(void)
1812 u64 ret = (u64)rdtsc_ordered();
1813 u64 last = pvclock_gtod_data.clock.cycle_last;
1815 if (likely(ret >= last))
1819 * GCC likes to generate cmov here, but this branch is extremely
1820 * predictable (it's just a function of time and the likely is
1821 * very likely) and there's a data dependence, so force GCC
1822 * to generate a branch instead. I don't barrier() because
1823 * we don't actually need a barrier, and if this function
1824 * ever gets inlined it will generate worse code.
1830 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1833 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1836 switch (gtod->clock.vclock_mode) {
1837 case VCLOCK_HVCLOCK:
1838 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1840 if (tsc_pg_val != U64_MAX) {
1841 /* TSC page valid */
1842 *mode = VCLOCK_HVCLOCK;
1843 v = (tsc_pg_val - gtod->clock.cycle_last) &
1846 /* TSC page invalid */
1847 *mode = VCLOCK_NONE;
1852 *tsc_timestamp = read_tsc();
1853 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1857 *mode = VCLOCK_NONE;
1860 if (*mode == VCLOCK_NONE)
1861 *tsc_timestamp = v = 0;
1863 return v * gtod->clock.mult;
1866 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1868 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1874 seq = read_seqcount_begin(>od->seq);
1875 ns = gtod->nsec_base;
1876 ns += vgettsc(tsc_timestamp, &mode);
1877 ns >>= gtod->clock.shift;
1878 ns += gtod->boot_ns;
1879 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1885 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1887 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1893 seq = read_seqcount_begin(>od->seq);
1894 ts->tv_sec = gtod->wall_time_sec;
1895 ns = gtod->nsec_base;
1896 ns += vgettsc(tsc_timestamp, &mode);
1897 ns >>= gtod->clock.shift;
1898 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1900 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1906 /* returns true if host is using TSC based clocksource */
1907 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1909 /* checked again under seqlock below */
1910 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1913 return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1917 /* returns true if host is using TSC based clocksource */
1918 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1921 /* checked again under seqlock below */
1922 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1925 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1931 * Assuming a stable TSC across physical CPUS, and a stable TSC
1932 * across virtual CPUs, the following condition is possible.
1933 * Each numbered line represents an event visible to both
1934 * CPUs at the next numbered event.
1936 * "timespecX" represents host monotonic time. "tscX" represents
1939 * VCPU0 on CPU0 | VCPU1 on CPU1
1941 * 1. read timespec0,tsc0
1942 * 2. | timespec1 = timespec0 + N
1944 * 3. transition to guest | transition to guest
1945 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1946 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1947 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1949 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1952 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1954 * - 0 < N - M => M < N
1956 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1957 * always the case (the difference between two distinct xtime instances
1958 * might be smaller then the difference between corresponding TSC reads,
1959 * when updating guest vcpus pvclock areas).
1961 * To avoid that problem, do not allow visibility of distinct
1962 * system_timestamp/tsc_timestamp values simultaneously: use a master
1963 * copy of host monotonic time values. Update that master copy
1966 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1970 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1972 #ifdef CONFIG_X86_64
1973 struct kvm_arch *ka = &kvm->arch;
1975 bool host_tsc_clocksource, vcpus_matched;
1977 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1978 atomic_read(&kvm->online_vcpus));
1981 * If the host uses TSC clock, then passthrough TSC as stable
1984 host_tsc_clocksource = kvm_get_time_and_clockread(
1985 &ka->master_kernel_ns,
1986 &ka->master_cycle_now);
1988 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1989 && !ka->backwards_tsc_observed
1990 && !ka->boot_vcpu_runs_old_kvmclock;
1992 if (ka->use_master_clock)
1993 atomic_set(&kvm_guest_has_master_clock, 1);
1995 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1996 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2001 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2003 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2006 static void kvm_gen_update_masterclock(struct kvm *kvm)
2008 #ifdef CONFIG_X86_64
2010 struct kvm_vcpu *vcpu;
2011 struct kvm_arch *ka = &kvm->arch;
2013 spin_lock(&ka->pvclock_gtod_sync_lock);
2014 kvm_make_mclock_inprogress_request(kvm);
2015 /* no guest entries from this point */
2016 pvclock_update_vm_gtod_copy(kvm);
2018 kvm_for_each_vcpu(i, vcpu, kvm)
2019 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2021 /* guest entries allowed */
2022 kvm_for_each_vcpu(i, vcpu, kvm)
2023 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2025 spin_unlock(&ka->pvclock_gtod_sync_lock);
2029 u64 get_kvmclock_ns(struct kvm *kvm)
2031 struct kvm_arch *ka = &kvm->arch;
2032 struct pvclock_vcpu_time_info hv_clock;
2035 spin_lock(&ka->pvclock_gtod_sync_lock);
2036 if (!ka->use_master_clock) {
2037 spin_unlock(&ka->pvclock_gtod_sync_lock);
2038 return ktime_get_boot_ns() + ka->kvmclock_offset;
2041 hv_clock.tsc_timestamp = ka->master_cycle_now;
2042 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2043 spin_unlock(&ka->pvclock_gtod_sync_lock);
2045 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2048 if (__this_cpu_read(cpu_tsc_khz)) {
2049 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2050 &hv_clock.tsc_shift,
2051 &hv_clock.tsc_to_system_mul);
2052 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2054 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
2061 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2063 struct kvm_vcpu_arch *vcpu = &v->arch;
2064 struct pvclock_vcpu_time_info guest_hv_clock;
2066 if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2067 &guest_hv_clock, sizeof(guest_hv_clock))))
2070 /* This VCPU is paused, but it's legal for a guest to read another
2071 * VCPU's kvmclock, so we really have to follow the specification where
2072 * it says that version is odd if data is being modified, and even after
2075 * Version field updates must be kept separate. This is because
2076 * kvm_write_guest_cached might use a "rep movs" instruction, and
2077 * writes within a string instruction are weakly ordered. So there
2078 * are three writes overall.
2080 * As a small optimization, only write the version field in the first
2081 * and third write. The vcpu->pv_time cache is still valid, because the
2082 * version field is the first in the struct.
2084 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2086 if (guest_hv_clock.version & 1)
2087 ++guest_hv_clock.version; /* first time write, random junk */
2089 vcpu->hv_clock.version = guest_hv_clock.version + 1;
2090 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2092 sizeof(vcpu->hv_clock.version));
2096 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2097 vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2099 if (vcpu->pvclock_set_guest_stopped_request) {
2100 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2101 vcpu->pvclock_set_guest_stopped_request = false;
2104 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2106 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2108 sizeof(vcpu->hv_clock));
2112 vcpu->hv_clock.version++;
2113 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2115 sizeof(vcpu->hv_clock.version));
2118 static int kvm_guest_time_update(struct kvm_vcpu *v)
2120 unsigned long flags, tgt_tsc_khz;
2121 struct kvm_vcpu_arch *vcpu = &v->arch;
2122 struct kvm_arch *ka = &v->kvm->arch;
2124 u64 tsc_timestamp, host_tsc;
2126 bool use_master_clock;
2132 * If the host uses TSC clock, then passthrough TSC as stable
2135 spin_lock(&ka->pvclock_gtod_sync_lock);
2136 use_master_clock = ka->use_master_clock;
2137 if (use_master_clock) {
2138 host_tsc = ka->master_cycle_now;
2139 kernel_ns = ka->master_kernel_ns;
2141 spin_unlock(&ka->pvclock_gtod_sync_lock);
2143 /* Keep irq disabled to prevent changes to the clock */
2144 local_irq_save(flags);
2145 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2146 if (unlikely(tgt_tsc_khz == 0)) {
2147 local_irq_restore(flags);
2148 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2151 if (!use_master_clock) {
2153 kernel_ns = ktime_get_boot_ns();
2156 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2159 * We may have to catch up the TSC to match elapsed wall clock
2160 * time for two reasons, even if kvmclock is used.
2161 * 1) CPU could have been running below the maximum TSC rate
2162 * 2) Broken TSC compensation resets the base at each VCPU
2163 * entry to avoid unknown leaps of TSC even when running
2164 * again on the same CPU. This may cause apparent elapsed
2165 * time to disappear, and the guest to stand still or run
2168 if (vcpu->tsc_catchup) {
2169 u64 tsc = compute_guest_tsc(v, kernel_ns);
2170 if (tsc > tsc_timestamp) {
2171 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2172 tsc_timestamp = tsc;
2176 local_irq_restore(flags);
2178 /* With all the info we got, fill in the values */
2180 if (kvm_has_tsc_control)
2181 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2183 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2184 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2185 &vcpu->hv_clock.tsc_shift,
2186 &vcpu->hv_clock.tsc_to_system_mul);
2187 vcpu->hw_tsc_khz = tgt_tsc_khz;
2190 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2191 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2192 vcpu->last_guest_tsc = tsc_timestamp;
2194 /* If the host uses TSC clocksource, then it is stable */
2196 if (use_master_clock)
2197 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2199 vcpu->hv_clock.flags = pvclock_flags;
2201 if (vcpu->pv_time_enabled)
2202 kvm_setup_pvclock_page(v);
2203 if (v == kvm_get_vcpu(v->kvm, 0))
2204 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2209 * kvmclock updates which are isolated to a given vcpu, such as
2210 * vcpu->cpu migration, should not allow system_timestamp from
2211 * the rest of the vcpus to remain static. Otherwise ntp frequency
2212 * correction applies to one vcpu's system_timestamp but not
2215 * So in those cases, request a kvmclock update for all vcpus.
2216 * We need to rate-limit these requests though, as they can
2217 * considerably slow guests that have a large number of vcpus.
2218 * The time for a remote vcpu to update its kvmclock is bound
2219 * by the delay we use to rate-limit the updates.
2222 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2224 static void kvmclock_update_fn(struct work_struct *work)
2227 struct delayed_work *dwork = to_delayed_work(work);
2228 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2229 kvmclock_update_work);
2230 struct kvm *kvm = container_of(ka, struct kvm, arch);
2231 struct kvm_vcpu *vcpu;
2233 kvm_for_each_vcpu(i, vcpu, kvm) {
2234 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2235 kvm_vcpu_kick(vcpu);
2239 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2241 struct kvm *kvm = v->kvm;
2243 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2244 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2245 KVMCLOCK_UPDATE_DELAY);
2248 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2250 static void kvmclock_sync_fn(struct work_struct *work)
2252 struct delayed_work *dwork = to_delayed_work(work);
2253 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2254 kvmclock_sync_work);
2255 struct kvm *kvm = container_of(ka, struct kvm, arch);
2257 if (!kvmclock_periodic_sync)
2260 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2261 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2262 KVMCLOCK_SYNC_PERIOD);
2265 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2267 u64 mcg_cap = vcpu->arch.mcg_cap;
2268 unsigned bank_num = mcg_cap & 0xff;
2269 u32 msr = msr_info->index;
2270 u64 data = msr_info->data;
2273 case MSR_IA32_MCG_STATUS:
2274 vcpu->arch.mcg_status = data;
2276 case MSR_IA32_MCG_CTL:
2277 if (!(mcg_cap & MCG_CTL_P) &&
2278 (data || !msr_info->host_initiated))
2280 if (data != 0 && data != ~(u64)0)
2282 vcpu->arch.mcg_ctl = data;
2285 if (msr >= MSR_IA32_MC0_CTL &&
2286 msr < MSR_IA32_MCx_CTL(bank_num)) {
2287 u32 offset = msr - MSR_IA32_MC0_CTL;
2288 /* only 0 or all 1s can be written to IA32_MCi_CTL
2289 * some Linux kernels though clear bit 10 in bank 4 to
2290 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2291 * this to avoid an uncatched #GP in the guest
2293 if ((offset & 0x3) == 0 &&
2294 data != 0 && (data | (1 << 10)) != ~(u64)0)
2296 if (!msr_info->host_initiated &&
2297 (offset & 0x3) == 1 && data != 0)
2299 vcpu->arch.mce_banks[offset] = data;
2307 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2309 struct kvm *kvm = vcpu->kvm;
2310 int lm = is_long_mode(vcpu);
2311 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2312 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2313 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2314 : kvm->arch.xen_hvm_config.blob_size_32;
2315 u32 page_num = data & ~PAGE_MASK;
2316 u64 page_addr = data & PAGE_MASK;
2321 if (page_num >= blob_size)
2324 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2329 if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2338 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2340 gpa_t gpa = data & ~0x3f;
2342 /* Bits 3:5 are reserved, Should be zero */
2346 vcpu->arch.apf.msr_val = data;
2348 if (!(data & KVM_ASYNC_PF_ENABLED)) {
2349 kvm_clear_async_pf_completion_queue(vcpu);
2350 kvm_async_pf_hash_reset(vcpu);
2354 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2358 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2359 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2360 kvm_async_pf_wakeup_all(vcpu);
2364 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2366 vcpu->arch.pv_time_enabled = false;
2369 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2371 ++vcpu->stat.tlb_flush;
2372 kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2375 static void record_steal_time(struct kvm_vcpu *vcpu)
2377 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2380 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2381 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2385 * Doing a TLB flush here, on the guest's behalf, can avoid
2388 if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2389 kvm_vcpu_flush_tlb(vcpu, false);
2391 if (vcpu->arch.st.steal.version & 1)
2392 vcpu->arch.st.steal.version += 1; /* first time write, random junk */
2394 vcpu->arch.st.steal.version += 1;
2396 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2397 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2401 vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2402 vcpu->arch.st.last_steal;
2403 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2405 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2406 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2410 vcpu->arch.st.steal.version += 1;
2412 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2413 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2416 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2419 u32 msr = msr_info->index;
2420 u64 data = msr_info->data;
2423 case MSR_AMD64_NB_CFG:
2424 case MSR_IA32_UCODE_WRITE:
2425 case MSR_VM_HSAVE_PA:
2426 case MSR_AMD64_PATCH_LOADER:
2427 case MSR_AMD64_BU_CFG2:
2428 case MSR_AMD64_DC_CFG:
2431 case MSR_IA32_UCODE_REV:
2432 if (msr_info->host_initiated)
2433 vcpu->arch.microcode_version = data;
2436 return set_efer(vcpu, data);
2438 data &= ~(u64)0x40; /* ignore flush filter disable */
2439 data &= ~(u64)0x100; /* ignore ignne emulation enable */
2440 data &= ~(u64)0x8; /* ignore TLB cache disable */
2441 data &= ~(u64)0x40000; /* ignore Mc status write enable */
2443 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2448 case MSR_FAM10H_MMIO_CONF_BASE:
2450 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2455 case MSR_IA32_DEBUGCTLMSR:
2457 /* We support the non-activated case already */
2459 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2460 /* Values other than LBR and BTF are vendor-specific,
2461 thus reserved and should throw a #GP */
2464 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2467 case 0x200 ... 0x2ff:
2468 return kvm_mtrr_set_msr(vcpu, msr, data);
2469 case MSR_IA32_APICBASE:
2470 return kvm_set_apic_base(vcpu, msr_info);
2471 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2472 return kvm_x2apic_msr_write(vcpu, msr, data);
2473 case MSR_IA32_TSCDEADLINE:
2474 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2476 case MSR_IA32_TSC_ADJUST:
2477 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2478 if (!msr_info->host_initiated) {
2479 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2480 adjust_tsc_offset_guest(vcpu, adj);
2482 vcpu->arch.ia32_tsc_adjust_msr = data;
2485 case MSR_IA32_MISC_ENABLE:
2486 vcpu->arch.ia32_misc_enable_msr = data;
2488 case MSR_IA32_SMBASE:
2489 if (!msr_info->host_initiated)
2491 vcpu->arch.smbase = data;
2494 kvm_write_tsc(vcpu, msr_info);
2497 if (!msr_info->host_initiated)
2499 vcpu->arch.smi_count = data;
2501 case MSR_KVM_WALL_CLOCK_NEW:
2502 case MSR_KVM_WALL_CLOCK:
2503 vcpu->kvm->arch.wall_clock = data;
2504 kvm_write_wall_clock(vcpu->kvm, data);
2506 case MSR_KVM_SYSTEM_TIME_NEW:
2507 case MSR_KVM_SYSTEM_TIME: {
2508 struct kvm_arch *ka = &vcpu->kvm->arch;
2510 kvmclock_reset(vcpu);
2512 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2513 bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2515 if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2516 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2518 ka->boot_vcpu_runs_old_kvmclock = tmp;
2521 vcpu->arch.time = data;
2522 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2524 /* we verify if the enable bit is set... */
2528 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2529 &vcpu->arch.pv_time, data & ~1ULL,
2530 sizeof(struct pvclock_vcpu_time_info)))
2531 vcpu->arch.pv_time_enabled = false;
2533 vcpu->arch.pv_time_enabled = true;
2537 case MSR_KVM_ASYNC_PF_EN:
2538 if (kvm_pv_enable_async_pf(vcpu, data))
2541 case MSR_KVM_STEAL_TIME:
2543 if (unlikely(!sched_info_on()))
2546 if (data & KVM_STEAL_RESERVED_MASK)
2549 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2550 data & KVM_STEAL_VALID_BITS,
2551 sizeof(struct kvm_steal_time)))
2554 vcpu->arch.st.msr_val = data;
2556 if (!(data & KVM_MSR_ENABLED))
2559 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2562 case MSR_KVM_PV_EOI_EN:
2563 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2567 case MSR_IA32_MCG_CTL:
2568 case MSR_IA32_MCG_STATUS:
2569 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2570 return set_msr_mce(vcpu, msr_info);
2572 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2573 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2574 pr = true; /* fall through */
2575 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2576 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2577 if (kvm_pmu_is_valid_msr(vcpu, msr))
2578 return kvm_pmu_set_msr(vcpu, msr_info);
2580 if (pr || data != 0)
2581 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2582 "0x%x data 0x%llx\n", msr, data);
2584 case MSR_K7_CLK_CTL:
2586 * Ignore all writes to this no longer documented MSR.
2587 * Writes are only relevant for old K7 processors,
2588 * all pre-dating SVM, but a recommended workaround from
2589 * AMD for these chips. It is possible to specify the
2590 * affected processor models on the command line, hence
2591 * the need to ignore the workaround.
2594 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2595 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2596 case HV_X64_MSR_CRASH_CTL:
2597 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2598 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2599 case HV_X64_MSR_TSC_EMULATION_CONTROL:
2600 case HV_X64_MSR_TSC_EMULATION_STATUS:
2601 return kvm_hv_set_msr_common(vcpu, msr, data,
2602 msr_info->host_initiated);
2603 case MSR_IA32_BBL_CR_CTL3:
2604 /* Drop writes to this legacy MSR -- see rdmsr
2605 * counterpart for further detail.
2607 if (report_ignored_msrs)
2608 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2611 case MSR_AMD64_OSVW_ID_LENGTH:
2612 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2614 vcpu->arch.osvw.length = data;
2616 case MSR_AMD64_OSVW_STATUS:
2617 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2619 vcpu->arch.osvw.status = data;
2621 case MSR_PLATFORM_INFO:
2622 if (!msr_info->host_initiated ||
2623 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2624 cpuid_fault_enabled(vcpu)))
2626 vcpu->arch.msr_platform_info = data;
2628 case MSR_MISC_FEATURES_ENABLES:
2629 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2630 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2631 !supports_cpuid_fault(vcpu)))
2633 vcpu->arch.msr_misc_features_enables = data;
2636 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2637 return xen_hvm_config(vcpu, data);
2638 if (kvm_pmu_is_valid_msr(vcpu, msr))
2639 return kvm_pmu_set_msr(vcpu, msr_info);
2641 vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2645 if (report_ignored_msrs)
2647 "ignored wrmsr: 0x%x data 0x%llx\n",
2654 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2658 * Reads an msr value (of 'msr_index') into 'pdata'.
2659 * Returns 0 on success, non-0 otherwise.
2660 * Assumes vcpu_load() was already called.
2662 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2664 return kvm_x86_ops->get_msr(vcpu, msr);
2666 EXPORT_SYMBOL_GPL(kvm_get_msr);
2668 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2671 u64 mcg_cap = vcpu->arch.mcg_cap;
2672 unsigned bank_num = mcg_cap & 0xff;
2675 case MSR_IA32_P5_MC_ADDR:
2676 case MSR_IA32_P5_MC_TYPE:
2679 case MSR_IA32_MCG_CAP:
2680 data = vcpu->arch.mcg_cap;
2682 case MSR_IA32_MCG_CTL:
2683 if (!(mcg_cap & MCG_CTL_P) && !host)
2685 data = vcpu->arch.mcg_ctl;
2687 case MSR_IA32_MCG_STATUS:
2688 data = vcpu->arch.mcg_status;
2691 if (msr >= MSR_IA32_MC0_CTL &&
2692 msr < MSR_IA32_MCx_CTL(bank_num)) {
2693 u32 offset = msr - MSR_IA32_MC0_CTL;
2694 data = vcpu->arch.mce_banks[offset];
2703 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2705 switch (msr_info->index) {
2706 case MSR_IA32_PLATFORM_ID:
2707 case MSR_IA32_EBL_CR_POWERON:
2708 case MSR_IA32_DEBUGCTLMSR:
2709 case MSR_IA32_LASTBRANCHFROMIP:
2710 case MSR_IA32_LASTBRANCHTOIP:
2711 case MSR_IA32_LASTINTFROMIP:
2712 case MSR_IA32_LASTINTTOIP:
2714 case MSR_K8_TSEG_ADDR:
2715 case MSR_K8_TSEG_MASK:
2717 case MSR_VM_HSAVE_PA:
2718 case MSR_K8_INT_PENDING_MSG:
2719 case MSR_AMD64_NB_CFG:
2720 case MSR_FAM10H_MMIO_CONF_BASE:
2721 case MSR_AMD64_BU_CFG2:
2722 case MSR_IA32_PERF_CTL:
2723 case MSR_AMD64_DC_CFG:
2726 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2727 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2728 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2729 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2730 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2731 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2732 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2735 case MSR_IA32_UCODE_REV:
2736 msr_info->data = vcpu->arch.microcode_version;
2739 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2742 case 0x200 ... 0x2ff:
2743 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2744 case 0xcd: /* fsb frequency */
2748 * MSR_EBC_FREQUENCY_ID
2749 * Conservative value valid for even the basic CPU models.
2750 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2751 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2752 * and 266MHz for model 3, or 4. Set Core Clock
2753 * Frequency to System Bus Frequency Ratio to 1 (bits
2754 * 31:24) even though these are only valid for CPU
2755 * models > 2, however guests may end up dividing or
2756 * multiplying by zero otherwise.
2758 case MSR_EBC_FREQUENCY_ID:
2759 msr_info->data = 1 << 24;
2761 case MSR_IA32_APICBASE:
2762 msr_info->data = kvm_get_apic_base(vcpu);
2764 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2765 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2767 case MSR_IA32_TSCDEADLINE:
2768 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2770 case MSR_IA32_TSC_ADJUST:
2771 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2773 case MSR_IA32_MISC_ENABLE:
2774 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2776 case MSR_IA32_SMBASE:
2777 if (!msr_info->host_initiated)
2779 msr_info->data = vcpu->arch.smbase;
2782 msr_info->data = vcpu->arch.smi_count;
2784 case MSR_IA32_PERF_STATUS:
2785 /* TSC increment by tick */
2786 msr_info->data = 1000ULL;
2787 /* CPU multiplier */
2788 msr_info->data |= (((uint64_t)4ULL) << 40);
2791 msr_info->data = vcpu->arch.efer;
2793 case MSR_KVM_WALL_CLOCK:
2794 case MSR_KVM_WALL_CLOCK_NEW:
2795 msr_info->data = vcpu->kvm->arch.wall_clock;
2797 case MSR_KVM_SYSTEM_TIME:
2798 case MSR_KVM_SYSTEM_TIME_NEW:
2799 msr_info->data = vcpu->arch.time;
2801 case MSR_KVM_ASYNC_PF_EN:
2802 msr_info->data = vcpu->arch.apf.msr_val;
2804 case MSR_KVM_STEAL_TIME:
2805 msr_info->data = vcpu->arch.st.msr_val;
2807 case MSR_KVM_PV_EOI_EN:
2808 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2810 case MSR_IA32_P5_MC_ADDR:
2811 case MSR_IA32_P5_MC_TYPE:
2812 case MSR_IA32_MCG_CAP:
2813 case MSR_IA32_MCG_CTL:
2814 case MSR_IA32_MCG_STATUS:
2815 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2816 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2817 msr_info->host_initiated);
2818 case MSR_K7_CLK_CTL:
2820 * Provide expected ramp-up count for K7. All other
2821 * are set to zero, indicating minimum divisors for
2824 * This prevents guest kernels on AMD host with CPU
2825 * type 6, model 8 and higher from exploding due to
2826 * the rdmsr failing.
2828 msr_info->data = 0x20000000;
2830 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2831 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2832 case HV_X64_MSR_CRASH_CTL:
2833 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2834 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2835 case HV_X64_MSR_TSC_EMULATION_CONTROL:
2836 case HV_X64_MSR_TSC_EMULATION_STATUS:
2837 return kvm_hv_get_msr_common(vcpu,
2838 msr_info->index, &msr_info->data,
2839 msr_info->host_initiated);
2841 case MSR_IA32_BBL_CR_CTL3:
2842 /* This legacy MSR exists but isn't fully documented in current
2843 * silicon. It is however accessed by winxp in very narrow
2844 * scenarios where it sets bit #19, itself documented as
2845 * a "reserved" bit. Best effort attempt to source coherent
2846 * read data here should the balance of the register be
2847 * interpreted by the guest:
2849 * L2 cache control register 3: 64GB range, 256KB size,
2850 * enabled, latency 0x1, configured
2852 msr_info->data = 0xbe702111;
2854 case MSR_AMD64_OSVW_ID_LENGTH:
2855 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2857 msr_info->data = vcpu->arch.osvw.length;
2859 case MSR_AMD64_OSVW_STATUS:
2860 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2862 msr_info->data = vcpu->arch.osvw.status;
2864 case MSR_PLATFORM_INFO:
2865 if (!msr_info->host_initiated &&
2866 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
2868 msr_info->data = vcpu->arch.msr_platform_info;
2870 case MSR_MISC_FEATURES_ENABLES:
2871 msr_info->data = vcpu->arch.msr_misc_features_enables;
2874 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2875 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2877 vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2881 if (report_ignored_msrs)
2882 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2890 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2893 * Read or write a bunch of msrs. All parameters are kernel addresses.
2895 * @return number of msrs set successfully.
2897 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2898 struct kvm_msr_entry *entries,
2899 int (*do_msr)(struct kvm_vcpu *vcpu,
2900 unsigned index, u64 *data))
2904 for (i = 0; i < msrs->nmsrs; ++i)
2905 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2912 * Read or write a bunch of msrs. Parameters are user addresses.
2914 * @return number of msrs set successfully.
2916 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2917 int (*do_msr)(struct kvm_vcpu *vcpu,
2918 unsigned index, u64 *data),
2921 struct kvm_msrs msrs;
2922 struct kvm_msr_entry *entries;
2927 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
2931 if (msrs.nmsrs >= MAX_IO_MSRS)
2934 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2935 entries = memdup_user(user_msrs->entries, size);
2936 if (IS_ERR(entries)) {
2937 r = PTR_ERR(entries);
2941 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2946 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2957 static inline bool kvm_can_mwait_in_guest(void)
2959 return boot_cpu_has(X86_FEATURE_MWAIT) &&
2960 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
2961 boot_cpu_has(X86_FEATURE_ARAT);
2964 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2969 case KVM_CAP_IRQCHIP:
2971 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2972 case KVM_CAP_SET_TSS_ADDR:
2973 case KVM_CAP_EXT_CPUID:
2974 case KVM_CAP_EXT_EMUL_CPUID:
2975 case KVM_CAP_CLOCKSOURCE:
2977 case KVM_CAP_NOP_IO_DELAY:
2978 case KVM_CAP_MP_STATE:
2979 case KVM_CAP_SYNC_MMU:
2980 case KVM_CAP_USER_NMI:
2981 case KVM_CAP_REINJECT_CONTROL:
2982 case KVM_CAP_IRQ_INJECT_STATUS:
2983 case KVM_CAP_IOEVENTFD:
2984 case KVM_CAP_IOEVENTFD_NO_LENGTH:
2986 case KVM_CAP_PIT_STATE2:
2987 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2988 case KVM_CAP_XEN_HVM:
2989 case KVM_CAP_VCPU_EVENTS:
2990 case KVM_CAP_HYPERV:
2991 case KVM_CAP_HYPERV_VAPIC:
2992 case KVM_CAP_HYPERV_SPIN:
2993 case KVM_CAP_HYPERV_SYNIC:
2994 case KVM_CAP_HYPERV_SYNIC2:
2995 case KVM_CAP_HYPERV_VP_INDEX:
2996 case KVM_CAP_HYPERV_EVENTFD:
2997 case KVM_CAP_HYPERV_TLBFLUSH:
2998 case KVM_CAP_HYPERV_SEND_IPI:
2999 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3000 case KVM_CAP_PCI_SEGMENT:
3001 case KVM_CAP_DEBUGREGS:
3002 case KVM_CAP_X86_ROBUST_SINGLESTEP:
3004 case KVM_CAP_ASYNC_PF:
3005 case KVM_CAP_GET_TSC_KHZ:
3006 case KVM_CAP_KVMCLOCK_CTRL:
3007 case KVM_CAP_READONLY_MEM:
3008 case KVM_CAP_HYPERV_TIME:
3009 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3010 case KVM_CAP_TSC_DEADLINE_TIMER:
3011 case KVM_CAP_DISABLE_QUIRKS:
3012 case KVM_CAP_SET_BOOT_CPU_ID:
3013 case KVM_CAP_SPLIT_IRQCHIP:
3014 case KVM_CAP_IMMEDIATE_EXIT:
3015 case KVM_CAP_GET_MSR_FEATURES:
3016 case KVM_CAP_MSR_PLATFORM_INFO:
3017 case KVM_CAP_EXCEPTION_PAYLOAD:
3020 case KVM_CAP_SYNC_REGS:
3021 r = KVM_SYNC_X86_VALID_FIELDS;
3023 case KVM_CAP_ADJUST_CLOCK:
3024 r = KVM_CLOCK_TSC_STABLE;
3026 case KVM_CAP_X86_DISABLE_EXITS:
3027 r |= KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE;
3028 if(kvm_can_mwait_in_guest())
3029 r |= KVM_X86_DISABLE_EXITS_MWAIT;
3031 case KVM_CAP_X86_SMM:
3032 /* SMBASE is usually relocated above 1M on modern chipsets,
3033 * and SMM handlers might indeed rely on 4G segment limits,
3034 * so do not report SMM to be available if real mode is
3035 * emulated via vm86 mode. Still, do not go to great lengths
3036 * to avoid userspace's usage of the feature, because it is a
3037 * fringe case that is not enabled except via specific settings
3038 * of the module parameters.
3040 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3043 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3045 case KVM_CAP_NR_VCPUS:
3046 r = KVM_SOFT_MAX_VCPUS;
3048 case KVM_CAP_MAX_VCPUS:
3051 case KVM_CAP_NR_MEMSLOTS:
3052 r = KVM_USER_MEM_SLOTS;
3054 case KVM_CAP_PV_MMU: /* obsolete */
3058 r = KVM_MAX_MCE_BANKS;
3061 r = boot_cpu_has(X86_FEATURE_XSAVE);
3063 case KVM_CAP_TSC_CONTROL:
3064 r = kvm_has_tsc_control;
3066 case KVM_CAP_X2APIC_API:
3067 r = KVM_X2APIC_API_VALID_FLAGS;
3069 case KVM_CAP_NESTED_STATE:
3070 r = kvm_x86_ops->get_nested_state ?
3071 kvm_x86_ops->get_nested_state(NULL, 0, 0) : 0;
3080 long kvm_arch_dev_ioctl(struct file *filp,
3081 unsigned int ioctl, unsigned long arg)
3083 void __user *argp = (void __user *)arg;
3087 case KVM_GET_MSR_INDEX_LIST: {
3088 struct kvm_msr_list __user *user_msr_list = argp;
3089 struct kvm_msr_list msr_list;
3093 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3096 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3097 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3100 if (n < msr_list.nmsrs)
3103 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3104 num_msrs_to_save * sizeof(u32)))
3106 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3108 num_emulated_msrs * sizeof(u32)))
3113 case KVM_GET_SUPPORTED_CPUID:
3114 case KVM_GET_EMULATED_CPUID: {
3115 struct kvm_cpuid2 __user *cpuid_arg = argp;
3116 struct kvm_cpuid2 cpuid;
3119 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3122 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3128 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3133 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3135 if (copy_to_user(argp, &kvm_mce_cap_supported,
3136 sizeof(kvm_mce_cap_supported)))
3140 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3141 struct kvm_msr_list __user *user_msr_list = argp;
3142 struct kvm_msr_list msr_list;
3146 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3149 msr_list.nmsrs = num_msr_based_features;
3150 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3153 if (n < msr_list.nmsrs)
3156 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3157 num_msr_based_features * sizeof(u32)))
3163 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3173 static void wbinvd_ipi(void *garbage)
3178 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3180 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3183 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3185 /* Address WBINVD may be executed by guest */
3186 if (need_emulate_wbinvd(vcpu)) {
3187 if (kvm_x86_ops->has_wbinvd_exit())
3188 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3189 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3190 smp_call_function_single(vcpu->cpu,
3191 wbinvd_ipi, NULL, 1);
3194 kvm_x86_ops->vcpu_load(vcpu, cpu);
3196 /* Apply any externally detected TSC adjustments (due to suspend) */
3197 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3198 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3199 vcpu->arch.tsc_offset_adjustment = 0;
3200 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3203 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3204 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3205 rdtsc() - vcpu->arch.last_host_tsc;
3207 mark_tsc_unstable("KVM discovered backwards TSC");
3209 if (kvm_check_tsc_unstable()) {
3210 u64 offset = kvm_compute_tsc_offset(vcpu,
3211 vcpu->arch.last_guest_tsc);
3212 kvm_vcpu_write_tsc_offset(vcpu, offset);
3213 vcpu->arch.tsc_catchup = 1;
3216 if (kvm_lapic_hv_timer_in_use(vcpu))
3217 kvm_lapic_restart_hv_timer(vcpu);
3220 * On a host with synchronized TSC, there is no need to update
3221 * kvmclock on vcpu->cpu migration
3223 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3224 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3225 if (vcpu->cpu != cpu)
3226 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3230 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3233 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3235 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3238 vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3240 kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3241 &vcpu->arch.st.steal.preempted,
3242 offsetof(struct kvm_steal_time, preempted),
3243 sizeof(vcpu->arch.st.steal.preempted));
3246 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3250 if (vcpu->preempted)
3251 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3254 * Disable page faults because we're in atomic context here.
3255 * kvm_write_guest_offset_cached() would call might_fault()
3256 * that relies on pagefault_disable() to tell if there's a
3257 * bug. NOTE: the write to guest memory may not go through if
3258 * during postcopy live migration or if there's heavy guest
3261 pagefault_disable();
3263 * kvm_memslots() will be called by
3264 * kvm_write_guest_offset_cached() so take the srcu lock.
3266 idx = srcu_read_lock(&vcpu->kvm->srcu);
3267 kvm_steal_time_set_preempted(vcpu);
3268 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3270 kvm_x86_ops->vcpu_put(vcpu);
3271 vcpu->arch.last_host_tsc = rdtsc();
3273 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3274 * on every vmexit, but if not, we might have a stale dr6 from the
3275 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3280 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3281 struct kvm_lapic_state *s)
3283 if (vcpu->arch.apicv_active)
3284 kvm_x86_ops->sync_pir_to_irr(vcpu);
3286 return kvm_apic_get_state(vcpu, s);
3289 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3290 struct kvm_lapic_state *s)
3294 r = kvm_apic_set_state(vcpu, s);
3297 update_cr8_intercept(vcpu);
3302 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3304 return (!lapic_in_kernel(vcpu) ||
3305 kvm_apic_accept_pic_intr(vcpu));
3309 * if userspace requested an interrupt window, check that the
3310 * interrupt window is open.
3312 * No need to exit to userspace if we already have an interrupt queued.
3314 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3316 return kvm_arch_interrupt_allowed(vcpu) &&
3317 !kvm_cpu_has_interrupt(vcpu) &&
3318 !kvm_event_needs_reinjection(vcpu) &&
3319 kvm_cpu_accept_dm_intr(vcpu);
3322 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3323 struct kvm_interrupt *irq)
3325 if (irq->irq >= KVM_NR_INTERRUPTS)
3328 if (!irqchip_in_kernel(vcpu->kvm)) {
3329 kvm_queue_interrupt(vcpu, irq->irq, false);
3330 kvm_make_request(KVM_REQ_EVENT, vcpu);
3335 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3336 * fail for in-kernel 8259.
3338 if (pic_in_kernel(vcpu->kvm))
3341 if (vcpu->arch.pending_external_vector != -1)
3344 vcpu->arch.pending_external_vector = irq->irq;
3345 kvm_make_request(KVM_REQ_EVENT, vcpu);
3349 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3351 kvm_inject_nmi(vcpu);
3356 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3358 kvm_make_request(KVM_REQ_SMI, vcpu);
3363 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3364 struct kvm_tpr_access_ctl *tac)
3368 vcpu->arch.tpr_access_reporting = !!tac->enabled;
3372 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3376 unsigned bank_num = mcg_cap & 0xff, bank;
3379 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3381 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3384 vcpu->arch.mcg_cap = mcg_cap;
3385 /* Init IA32_MCG_CTL to all 1s */
3386 if (mcg_cap & MCG_CTL_P)
3387 vcpu->arch.mcg_ctl = ~(u64)0;
3388 /* Init IA32_MCi_CTL to all 1s */
3389 for (bank = 0; bank < bank_num; bank++)
3390 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3392 if (kvm_x86_ops->setup_mce)
3393 kvm_x86_ops->setup_mce(vcpu);
3398 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3399 struct kvm_x86_mce *mce)
3401 u64 mcg_cap = vcpu->arch.mcg_cap;
3402 unsigned bank_num = mcg_cap & 0xff;
3403 u64 *banks = vcpu->arch.mce_banks;
3405 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3408 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3409 * reporting is disabled
3411 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3412 vcpu->arch.mcg_ctl != ~(u64)0)
3414 banks += 4 * mce->bank;
3416 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3417 * reporting is disabled for the bank
3419 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3421 if (mce->status & MCI_STATUS_UC) {
3422 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3423 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3424 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3427 if (banks[1] & MCI_STATUS_VAL)
3428 mce->status |= MCI_STATUS_OVER;
3429 banks[2] = mce->addr;
3430 banks[3] = mce->misc;
3431 vcpu->arch.mcg_status = mce->mcg_status;
3432 banks[1] = mce->status;
3433 kvm_queue_exception(vcpu, MC_VECTOR);
3434 } else if (!(banks[1] & MCI_STATUS_VAL)
3435 || !(banks[1] & MCI_STATUS_UC)) {
3436 if (banks[1] & MCI_STATUS_VAL)
3437 mce->status |= MCI_STATUS_OVER;
3438 banks[2] = mce->addr;
3439 banks[3] = mce->misc;
3440 banks[1] = mce->status;
3442 banks[1] |= MCI_STATUS_OVER;
3446 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3447 struct kvm_vcpu_events *events)
3452 * The API doesn't provide the instruction length for software
3453 * exceptions, so don't report them. As long as the guest RIP
3454 * isn't advanced, we should expect to encounter the exception
3457 if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3458 events->exception.injected = 0;
3459 events->exception.pending = 0;
3461 events->exception.injected = vcpu->arch.exception.injected;
3462 events->exception.pending = vcpu->arch.exception.pending;
3464 * For ABI compatibility, deliberately conflate
3465 * pending and injected exceptions when
3466 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3468 if (!vcpu->kvm->arch.exception_payload_enabled)
3469 events->exception.injected |=
3470 vcpu->arch.exception.pending;
3472 events->exception.nr = vcpu->arch.exception.nr;
3473 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3474 events->exception.error_code = vcpu->arch.exception.error_code;
3475 events->exception_has_payload = vcpu->arch.exception.has_payload;
3476 events->exception_payload = vcpu->arch.exception.payload;
3478 events->interrupt.injected =
3479 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3480 events->interrupt.nr = vcpu->arch.interrupt.nr;
3481 events->interrupt.soft = 0;
3482 events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3484 events->nmi.injected = vcpu->arch.nmi_injected;
3485 events->nmi.pending = vcpu->arch.nmi_pending != 0;
3486 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3487 events->nmi.pad = 0;
3489 events->sipi_vector = 0; /* never valid when reporting to user space */
3491 events->smi.smm = is_smm(vcpu);
3492 events->smi.pending = vcpu->arch.smi_pending;
3493 events->smi.smm_inside_nmi =
3494 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3495 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3497 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3498 | KVM_VCPUEVENT_VALID_SHADOW
3499 | KVM_VCPUEVENT_VALID_SMM);
3500 if (vcpu->kvm->arch.exception_payload_enabled)
3501 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3503 memset(&events->reserved, 0, sizeof(events->reserved));
3506 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3508 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3509 struct kvm_vcpu_events *events)
3511 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3512 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3513 | KVM_VCPUEVENT_VALID_SHADOW
3514 | KVM_VCPUEVENT_VALID_SMM
3515 | KVM_VCPUEVENT_VALID_PAYLOAD))
3518 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3519 if (!vcpu->kvm->arch.exception_payload_enabled)
3521 if (events->exception.pending)
3522 events->exception.injected = 0;
3524 events->exception_has_payload = 0;
3526 events->exception.pending = 0;
3527 events->exception_has_payload = 0;
3530 if ((events->exception.injected || events->exception.pending) &&
3531 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3534 /* INITs are latched while in SMM */
3535 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3536 (events->smi.smm || events->smi.pending) &&
3537 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3541 vcpu->arch.exception.injected = events->exception.injected;
3542 vcpu->arch.exception.pending = events->exception.pending;
3543 vcpu->arch.exception.nr = events->exception.nr;
3544 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3545 vcpu->arch.exception.error_code = events->exception.error_code;
3546 vcpu->arch.exception.has_payload = events->exception_has_payload;
3547 vcpu->arch.exception.payload = events->exception_payload;
3549 vcpu->arch.interrupt.injected = events->interrupt.injected;
3550 vcpu->arch.interrupt.nr = events->interrupt.nr;
3551 vcpu->arch.interrupt.soft = events->interrupt.soft;
3552 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3553 kvm_x86_ops->set_interrupt_shadow(vcpu,
3554 events->interrupt.shadow);
3556 vcpu->arch.nmi_injected = events->nmi.injected;
3557 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3558 vcpu->arch.nmi_pending = events->nmi.pending;
3559 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3561 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3562 lapic_in_kernel(vcpu))
3563 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3565 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3566 u32 hflags = vcpu->arch.hflags;
3567 if (events->smi.smm)
3568 hflags |= HF_SMM_MASK;
3570 hflags &= ~HF_SMM_MASK;
3571 kvm_set_hflags(vcpu, hflags);
3573 vcpu->arch.smi_pending = events->smi.pending;
3575 if (events->smi.smm) {
3576 if (events->smi.smm_inside_nmi)
3577 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3579 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3580 if (lapic_in_kernel(vcpu)) {
3581 if (events->smi.latched_init)
3582 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3584 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3589 kvm_make_request(KVM_REQ_EVENT, vcpu);
3594 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3595 struct kvm_debugregs *dbgregs)
3599 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3600 kvm_get_dr(vcpu, 6, &val);
3602 dbgregs->dr7 = vcpu->arch.dr7;
3604 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3607 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3608 struct kvm_debugregs *dbgregs)
3613 if (dbgregs->dr6 & ~0xffffffffull)
3615 if (dbgregs->dr7 & ~0xffffffffull)
3618 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3619 kvm_update_dr0123(vcpu);
3620 vcpu->arch.dr6 = dbgregs->dr6;
3621 kvm_update_dr6(vcpu);
3622 vcpu->arch.dr7 = dbgregs->dr7;
3623 kvm_update_dr7(vcpu);
3628 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3630 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3632 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3633 u64 xstate_bv = xsave->header.xfeatures;
3637 * Copy legacy XSAVE area, to avoid complications with CPUID
3638 * leaves 0 and 1 in the loop below.
3640 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3643 xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3644 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3647 * Copy each region from the possibly compacted offset to the
3648 * non-compacted offset.
3650 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3652 u64 feature = valid & -valid;
3653 int index = fls64(feature) - 1;
3654 void *src = get_xsave_addr(xsave, feature);
3657 u32 size, offset, ecx, edx;
3658 cpuid_count(XSTATE_CPUID, index,
3659 &size, &offset, &ecx, &edx);
3660 if (feature == XFEATURE_MASK_PKRU)
3661 memcpy(dest + offset, &vcpu->arch.pkru,
3662 sizeof(vcpu->arch.pkru));
3664 memcpy(dest + offset, src, size);
3672 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3674 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3675 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3679 * Copy legacy XSAVE area, to avoid complications with CPUID
3680 * leaves 0 and 1 in the loop below.
3682 memcpy(xsave, src, XSAVE_HDR_OFFSET);
3684 /* Set XSTATE_BV and possibly XCOMP_BV. */
3685 xsave->header.xfeatures = xstate_bv;
3686 if (boot_cpu_has(X86_FEATURE_XSAVES))
3687 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3690 * Copy each region from the non-compacted offset to the
3691 * possibly compacted offset.
3693 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3695 u64 feature = valid & -valid;
3696 int index = fls64(feature) - 1;
3697 void *dest = get_xsave_addr(xsave, feature);
3700 u32 size, offset, ecx, edx;
3701 cpuid_count(XSTATE_CPUID, index,
3702 &size, &offset, &ecx, &edx);
3703 if (feature == XFEATURE_MASK_PKRU)
3704 memcpy(&vcpu->arch.pkru, src + offset,
3705 sizeof(vcpu->arch.pkru));
3707 memcpy(dest, src + offset, size);
3714 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3715 struct kvm_xsave *guest_xsave)
3717 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3718 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3719 fill_xsave((u8 *) guest_xsave->region, vcpu);
3721 memcpy(guest_xsave->region,
3722 &vcpu->arch.guest_fpu.state.fxsave,
3723 sizeof(struct fxregs_state));
3724 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3725 XFEATURE_MASK_FPSSE;
3729 #define XSAVE_MXCSR_OFFSET 24
3731 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3732 struct kvm_xsave *guest_xsave)
3735 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3736 u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3738 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3740 * Here we allow setting states that are not present in
3741 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3742 * with old userspace.
3744 if (xstate_bv & ~kvm_supported_xcr0() ||
3745 mxcsr & ~mxcsr_feature_mask)
3747 load_xsave(vcpu, (u8 *)guest_xsave->region);
3749 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3750 mxcsr & ~mxcsr_feature_mask)
3752 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3753 guest_xsave->region, sizeof(struct fxregs_state));
3758 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3759 struct kvm_xcrs *guest_xcrs)
3761 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3762 guest_xcrs->nr_xcrs = 0;
3766 guest_xcrs->nr_xcrs = 1;
3767 guest_xcrs->flags = 0;
3768 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3769 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3772 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3773 struct kvm_xcrs *guest_xcrs)
3777 if (!boot_cpu_has(X86_FEATURE_XSAVE))
3780 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3783 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3784 /* Only support XCR0 currently */
3785 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3786 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3787 guest_xcrs->xcrs[i].value);
3796 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3797 * stopped by the hypervisor. This function will be called from the host only.
3798 * EINVAL is returned when the host attempts to set the flag for a guest that
3799 * does not support pv clocks.
3801 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3803 if (!vcpu->arch.pv_time_enabled)
3805 vcpu->arch.pvclock_set_guest_stopped_request = true;
3806 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3810 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3811 struct kvm_enable_cap *cap)
3814 uint16_t vmcs_version;
3815 void __user *user_ptr;
3821 case KVM_CAP_HYPERV_SYNIC2:
3824 case KVM_CAP_HYPERV_SYNIC:
3825 if (!irqchip_in_kernel(vcpu->kvm))
3827 return kvm_hv_activate_synic(vcpu, cap->cap ==
3828 KVM_CAP_HYPERV_SYNIC2);
3829 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3830 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
3832 user_ptr = (void __user *)(uintptr_t)cap->args[0];
3833 if (copy_to_user(user_ptr, &vmcs_version,
3834 sizeof(vmcs_version)))
3844 long kvm_arch_vcpu_ioctl(struct file *filp,
3845 unsigned int ioctl, unsigned long arg)
3847 struct kvm_vcpu *vcpu = filp->private_data;
3848 void __user *argp = (void __user *)arg;
3851 struct kvm_lapic_state *lapic;
3852 struct kvm_xsave *xsave;
3853 struct kvm_xcrs *xcrs;
3861 case KVM_GET_LAPIC: {
3863 if (!lapic_in_kernel(vcpu))
3865 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3870 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3874 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3879 case KVM_SET_LAPIC: {
3881 if (!lapic_in_kernel(vcpu))
3883 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3884 if (IS_ERR(u.lapic)) {
3885 r = PTR_ERR(u.lapic);
3889 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3892 case KVM_INTERRUPT: {
3893 struct kvm_interrupt irq;
3896 if (copy_from_user(&irq, argp, sizeof(irq)))
3898 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3902 r = kvm_vcpu_ioctl_nmi(vcpu);
3906 r = kvm_vcpu_ioctl_smi(vcpu);
3909 case KVM_SET_CPUID: {
3910 struct kvm_cpuid __user *cpuid_arg = argp;
3911 struct kvm_cpuid cpuid;
3914 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3916 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3919 case KVM_SET_CPUID2: {
3920 struct kvm_cpuid2 __user *cpuid_arg = argp;
3921 struct kvm_cpuid2 cpuid;
3924 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3926 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3927 cpuid_arg->entries);
3930 case KVM_GET_CPUID2: {
3931 struct kvm_cpuid2 __user *cpuid_arg = argp;
3932 struct kvm_cpuid2 cpuid;
3935 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3937 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3938 cpuid_arg->entries);
3942 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3947 case KVM_GET_MSRS: {
3948 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3949 r = msr_io(vcpu, argp, do_get_msr, 1);
3950 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3953 case KVM_SET_MSRS: {
3954 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3955 r = msr_io(vcpu, argp, do_set_msr, 0);
3956 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3959 case KVM_TPR_ACCESS_REPORTING: {
3960 struct kvm_tpr_access_ctl tac;
3963 if (copy_from_user(&tac, argp, sizeof(tac)))
3965 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3969 if (copy_to_user(argp, &tac, sizeof(tac)))
3974 case KVM_SET_VAPIC_ADDR: {
3975 struct kvm_vapic_addr va;
3979 if (!lapic_in_kernel(vcpu))
3982 if (copy_from_user(&va, argp, sizeof(va)))
3984 idx = srcu_read_lock(&vcpu->kvm->srcu);
3985 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3986 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3989 case KVM_X86_SETUP_MCE: {
3993 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
3995 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3998 case KVM_X86_SET_MCE: {
3999 struct kvm_x86_mce mce;
4002 if (copy_from_user(&mce, argp, sizeof(mce)))
4004 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4007 case KVM_GET_VCPU_EVENTS: {
4008 struct kvm_vcpu_events events;
4010 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4013 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4018 case KVM_SET_VCPU_EVENTS: {
4019 struct kvm_vcpu_events events;
4022 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4025 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4028 case KVM_GET_DEBUGREGS: {
4029 struct kvm_debugregs dbgregs;
4031 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4034 if (copy_to_user(argp, &dbgregs,
4035 sizeof(struct kvm_debugregs)))
4040 case KVM_SET_DEBUGREGS: {
4041 struct kvm_debugregs dbgregs;
4044 if (copy_from_user(&dbgregs, argp,
4045 sizeof(struct kvm_debugregs)))
4048 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4051 case KVM_GET_XSAVE: {
4052 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
4057 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4060 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4065 case KVM_SET_XSAVE: {
4066 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4067 if (IS_ERR(u.xsave)) {
4068 r = PTR_ERR(u.xsave);
4072 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4075 case KVM_GET_XCRS: {
4076 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
4081 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4084 if (copy_to_user(argp, u.xcrs,
4085 sizeof(struct kvm_xcrs)))
4090 case KVM_SET_XCRS: {
4091 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4092 if (IS_ERR(u.xcrs)) {
4093 r = PTR_ERR(u.xcrs);
4097 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4100 case KVM_SET_TSC_KHZ: {
4104 user_tsc_khz = (u32)arg;
4106 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4109 if (user_tsc_khz == 0)
4110 user_tsc_khz = tsc_khz;
4112 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4117 case KVM_GET_TSC_KHZ: {
4118 r = vcpu->arch.virtual_tsc_khz;
4121 case KVM_KVMCLOCK_CTRL: {
4122 r = kvm_set_guest_paused(vcpu);
4125 case KVM_ENABLE_CAP: {
4126 struct kvm_enable_cap cap;
4129 if (copy_from_user(&cap, argp, sizeof(cap)))
4131 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4134 case KVM_GET_NESTED_STATE: {
4135 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4139 if (!kvm_x86_ops->get_nested_state)
4142 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4144 if (get_user(user_data_size, &user_kvm_nested_state->size))
4147 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4152 if (r > user_data_size) {
4153 if (put_user(r, &user_kvm_nested_state->size))
4163 case KVM_SET_NESTED_STATE: {
4164 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4165 struct kvm_nested_state kvm_state;
4168 if (!kvm_x86_ops->set_nested_state)
4172 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4176 if (kvm_state.size < sizeof(kvm_state))
4179 if (kvm_state.flags &
4180 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4181 | KVM_STATE_NESTED_EVMCS))
4184 /* nested_run_pending implies guest_mode. */
4185 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4186 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4189 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4202 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4204 return VM_FAULT_SIGBUS;
4207 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4211 if (addr > (unsigned int)(-3 * PAGE_SIZE))
4213 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4217 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4220 return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4223 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4224 u32 kvm_nr_mmu_pages)
4226 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4229 mutex_lock(&kvm->slots_lock);
4231 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4232 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4234 mutex_unlock(&kvm->slots_lock);
4238 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4240 return kvm->arch.n_max_mmu_pages;
4243 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4245 struct kvm_pic *pic = kvm->arch.vpic;
4249 switch (chip->chip_id) {
4250 case KVM_IRQCHIP_PIC_MASTER:
4251 memcpy(&chip->chip.pic, &pic->pics[0],
4252 sizeof(struct kvm_pic_state));
4254 case KVM_IRQCHIP_PIC_SLAVE:
4255 memcpy(&chip->chip.pic, &pic->pics[1],
4256 sizeof(struct kvm_pic_state));
4258 case KVM_IRQCHIP_IOAPIC:
4259 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4268 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4270 struct kvm_pic *pic = kvm->arch.vpic;
4274 switch (chip->chip_id) {
4275 case KVM_IRQCHIP_PIC_MASTER:
4276 spin_lock(&pic->lock);
4277 memcpy(&pic->pics[0], &chip->chip.pic,
4278 sizeof(struct kvm_pic_state));
4279 spin_unlock(&pic->lock);
4281 case KVM_IRQCHIP_PIC_SLAVE:
4282 spin_lock(&pic->lock);
4283 memcpy(&pic->pics[1], &chip->chip.pic,
4284 sizeof(struct kvm_pic_state));
4285 spin_unlock(&pic->lock);
4287 case KVM_IRQCHIP_IOAPIC:
4288 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4294 kvm_pic_update_irq(pic);
4298 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4300 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4302 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4304 mutex_lock(&kps->lock);
4305 memcpy(ps, &kps->channels, sizeof(*ps));
4306 mutex_unlock(&kps->lock);
4310 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4313 struct kvm_pit *pit = kvm->arch.vpit;
4315 mutex_lock(&pit->pit_state.lock);
4316 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4317 for (i = 0; i < 3; i++)
4318 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4319 mutex_unlock(&pit->pit_state.lock);
4323 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4325 mutex_lock(&kvm->arch.vpit->pit_state.lock);
4326 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4327 sizeof(ps->channels));
4328 ps->flags = kvm->arch.vpit->pit_state.flags;
4329 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4330 memset(&ps->reserved, 0, sizeof(ps->reserved));
4334 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4338 u32 prev_legacy, cur_legacy;
4339 struct kvm_pit *pit = kvm->arch.vpit;
4341 mutex_lock(&pit->pit_state.lock);
4342 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4343 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4344 if (!prev_legacy && cur_legacy)
4346 memcpy(&pit->pit_state.channels, &ps->channels,
4347 sizeof(pit->pit_state.channels));
4348 pit->pit_state.flags = ps->flags;
4349 for (i = 0; i < 3; i++)
4350 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4352 mutex_unlock(&pit->pit_state.lock);
4356 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4357 struct kvm_reinject_control *control)
4359 struct kvm_pit *pit = kvm->arch.vpit;
4364 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4365 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4366 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4368 mutex_lock(&pit->pit_state.lock);
4369 kvm_pit_set_reinject(pit, control->pit_reinject);
4370 mutex_unlock(&pit->pit_state.lock);
4376 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4377 * @kvm: kvm instance
4378 * @log: slot id and address to which we copy the log
4380 * Steps 1-4 below provide general overview of dirty page logging. See
4381 * kvm_get_dirty_log_protect() function description for additional details.
4383 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4384 * always flush the TLB (step 4) even if previous step failed and the dirty
4385 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4386 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4387 * writes will be marked dirty for next log read.
4389 * 1. Take a snapshot of the bit and clear it if needed.
4390 * 2. Write protect the corresponding page.
4391 * 3. Copy the snapshot to the userspace.
4392 * 4. Flush TLB's if needed.
4394 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4399 mutex_lock(&kvm->slots_lock);
4402 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4404 if (kvm_x86_ops->flush_log_dirty)
4405 kvm_x86_ops->flush_log_dirty(kvm);
4407 r = kvm_get_dirty_log_protect(kvm, log, &flush);
4410 * All the TLBs can be flushed out of mmu lock, see the comments in
4411 * kvm_mmu_slot_remove_write_access().
4413 lockdep_assert_held(&kvm->slots_lock);
4415 kvm_flush_remote_tlbs(kvm);
4417 mutex_unlock(&kvm->slots_lock);
4421 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4424 if (!irqchip_in_kernel(kvm))
4427 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4428 irq_event->irq, irq_event->level,
4433 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4434 struct kvm_enable_cap *cap)
4442 case KVM_CAP_DISABLE_QUIRKS:
4443 kvm->arch.disabled_quirks = cap->args[0];
4446 case KVM_CAP_SPLIT_IRQCHIP: {
4447 mutex_lock(&kvm->lock);
4449 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4450 goto split_irqchip_unlock;
4452 if (irqchip_in_kernel(kvm))
4453 goto split_irqchip_unlock;
4454 if (kvm->created_vcpus)
4455 goto split_irqchip_unlock;
4456 r = kvm_setup_empty_irq_routing(kvm);
4458 goto split_irqchip_unlock;
4459 /* Pairs with irqchip_in_kernel. */
4461 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4462 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4464 split_irqchip_unlock:
4465 mutex_unlock(&kvm->lock);
4468 case KVM_CAP_X2APIC_API:
4470 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4473 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4474 kvm->arch.x2apic_format = true;
4475 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4476 kvm->arch.x2apic_broadcast_quirk_disabled = true;
4480 case KVM_CAP_X86_DISABLE_EXITS:
4482 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4485 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4486 kvm_can_mwait_in_guest())
4487 kvm->arch.mwait_in_guest = true;
4488 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4489 kvm->arch.hlt_in_guest = true;
4490 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4491 kvm->arch.pause_in_guest = true;
4494 case KVM_CAP_MSR_PLATFORM_INFO:
4495 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4498 case KVM_CAP_EXCEPTION_PAYLOAD:
4499 kvm->arch.exception_payload_enabled = cap->args[0];
4509 long kvm_arch_vm_ioctl(struct file *filp,
4510 unsigned int ioctl, unsigned long arg)
4512 struct kvm *kvm = filp->private_data;
4513 void __user *argp = (void __user *)arg;
4516 * This union makes it completely explicit to gcc-3.x
4517 * that these two variables' stack usage should be
4518 * combined, not added together.
4521 struct kvm_pit_state ps;
4522 struct kvm_pit_state2 ps2;
4523 struct kvm_pit_config pit_config;
4527 case KVM_SET_TSS_ADDR:
4528 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4530 case KVM_SET_IDENTITY_MAP_ADDR: {
4533 mutex_lock(&kvm->lock);
4535 if (kvm->created_vcpus)
4536 goto set_identity_unlock;
4538 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4539 goto set_identity_unlock;
4540 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4541 set_identity_unlock:
4542 mutex_unlock(&kvm->lock);
4545 case KVM_SET_NR_MMU_PAGES:
4546 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4548 case KVM_GET_NR_MMU_PAGES:
4549 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4551 case KVM_CREATE_IRQCHIP: {
4552 mutex_lock(&kvm->lock);
4555 if (irqchip_in_kernel(kvm))
4556 goto create_irqchip_unlock;
4559 if (kvm->created_vcpus)
4560 goto create_irqchip_unlock;
4562 r = kvm_pic_init(kvm);
4564 goto create_irqchip_unlock;
4566 r = kvm_ioapic_init(kvm);
4568 kvm_pic_destroy(kvm);
4569 goto create_irqchip_unlock;
4572 r = kvm_setup_default_irq_routing(kvm);
4574 kvm_ioapic_destroy(kvm);
4575 kvm_pic_destroy(kvm);
4576 goto create_irqchip_unlock;
4578 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4580 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4581 create_irqchip_unlock:
4582 mutex_unlock(&kvm->lock);
4585 case KVM_CREATE_PIT:
4586 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4588 case KVM_CREATE_PIT2:
4590 if (copy_from_user(&u.pit_config, argp,
4591 sizeof(struct kvm_pit_config)))
4594 mutex_lock(&kvm->lock);
4597 goto create_pit_unlock;
4599 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4603 mutex_unlock(&kvm->lock);
4605 case KVM_GET_IRQCHIP: {
4606 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4607 struct kvm_irqchip *chip;
4609 chip = memdup_user(argp, sizeof(*chip));
4616 if (!irqchip_kernel(kvm))
4617 goto get_irqchip_out;
4618 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4620 goto get_irqchip_out;
4622 if (copy_to_user(argp, chip, sizeof(*chip)))
4623 goto get_irqchip_out;
4629 case KVM_SET_IRQCHIP: {
4630 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4631 struct kvm_irqchip *chip;
4633 chip = memdup_user(argp, sizeof(*chip));
4640 if (!irqchip_kernel(kvm))
4641 goto set_irqchip_out;
4642 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4644 goto set_irqchip_out;
4652 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4655 if (!kvm->arch.vpit)
4657 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4661 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4668 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4671 if (!kvm->arch.vpit)
4673 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4676 case KVM_GET_PIT2: {
4678 if (!kvm->arch.vpit)
4680 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4684 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4689 case KVM_SET_PIT2: {
4691 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4694 if (!kvm->arch.vpit)
4696 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4699 case KVM_REINJECT_CONTROL: {
4700 struct kvm_reinject_control control;
4702 if (copy_from_user(&control, argp, sizeof(control)))
4704 r = kvm_vm_ioctl_reinject(kvm, &control);
4707 case KVM_SET_BOOT_CPU_ID:
4709 mutex_lock(&kvm->lock);
4710 if (kvm->created_vcpus)
4713 kvm->arch.bsp_vcpu_id = arg;
4714 mutex_unlock(&kvm->lock);
4716 case KVM_XEN_HVM_CONFIG: {
4717 struct kvm_xen_hvm_config xhc;
4719 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4724 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4728 case KVM_SET_CLOCK: {
4729 struct kvm_clock_data user_ns;
4733 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4742 * TODO: userspace has to take care of races with VCPU_RUN, so
4743 * kvm_gen_update_masterclock() can be cut down to locked
4744 * pvclock_update_vm_gtod_copy().
4746 kvm_gen_update_masterclock(kvm);
4747 now_ns = get_kvmclock_ns(kvm);
4748 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4749 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4752 case KVM_GET_CLOCK: {
4753 struct kvm_clock_data user_ns;
4756 now_ns = get_kvmclock_ns(kvm);
4757 user_ns.clock = now_ns;
4758 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4759 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4762 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4767 case KVM_MEMORY_ENCRYPT_OP: {
4769 if (kvm_x86_ops->mem_enc_op)
4770 r = kvm_x86_ops->mem_enc_op(kvm, argp);
4773 case KVM_MEMORY_ENCRYPT_REG_REGION: {
4774 struct kvm_enc_region region;
4777 if (copy_from_user(®ion, argp, sizeof(region)))
4781 if (kvm_x86_ops->mem_enc_reg_region)
4782 r = kvm_x86_ops->mem_enc_reg_region(kvm, ®ion);
4785 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4786 struct kvm_enc_region region;
4789 if (copy_from_user(®ion, argp, sizeof(region)))
4793 if (kvm_x86_ops->mem_enc_unreg_region)
4794 r = kvm_x86_ops->mem_enc_unreg_region(kvm, ®ion);
4797 case KVM_HYPERV_EVENTFD: {
4798 struct kvm_hyperv_eventfd hvevfd;
4801 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4803 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4813 static void kvm_init_msr_list(void)
4818 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4819 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4823 * Even MSRs that are valid in the host may not be exposed
4824 * to the guests in some cases.
4826 switch (msrs_to_save[i]) {
4827 case MSR_IA32_BNDCFGS:
4828 if (!kvm_mpx_supported())
4832 if (!kvm_x86_ops->rdtscp_supported())
4840 msrs_to_save[j] = msrs_to_save[i];
4843 num_msrs_to_save = j;
4845 for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4846 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
4850 emulated_msrs[j] = emulated_msrs[i];
4853 num_emulated_msrs = j;
4855 for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4856 struct kvm_msr_entry msr;
4858 msr.index = msr_based_features[i];
4859 if (kvm_get_msr_feature(&msr))
4863 msr_based_features[j] = msr_based_features[i];
4866 num_msr_based_features = j;
4869 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4877 if (!(lapic_in_kernel(vcpu) &&
4878 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4879 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4890 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4897 if (!(lapic_in_kernel(vcpu) &&
4898 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4900 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4902 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4912 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4913 struct kvm_segment *var, int seg)
4915 kvm_x86_ops->set_segment(vcpu, var, seg);
4918 void kvm_get_segment(struct kvm_vcpu *vcpu,
4919 struct kvm_segment *var, int seg)
4921 kvm_x86_ops->get_segment(vcpu, var, seg);
4924 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4925 struct x86_exception *exception)
4929 BUG_ON(!mmu_is_nested(vcpu));
4931 /* NPT walks are always user-walks */
4932 access |= PFERR_USER_MASK;
4933 t_gpa = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
4938 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4939 struct x86_exception *exception)
4941 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4942 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4945 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4946 struct x86_exception *exception)
4948 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4949 access |= PFERR_FETCH_MASK;
4950 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4953 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4954 struct x86_exception *exception)
4956 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4957 access |= PFERR_WRITE_MASK;
4958 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4961 /* uses this to access any guest's mapped memory without checking CPL */
4962 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4963 struct x86_exception *exception)
4965 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4968 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4969 struct kvm_vcpu *vcpu, u32 access,
4970 struct x86_exception *exception)
4973 int r = X86EMUL_CONTINUE;
4976 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4978 unsigned offset = addr & (PAGE_SIZE-1);
4979 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4982 if (gpa == UNMAPPED_GVA)
4983 return X86EMUL_PROPAGATE_FAULT;
4984 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4987 r = X86EMUL_IO_NEEDED;
4999 /* used for instruction fetching */
5000 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5001 gva_t addr, void *val, unsigned int bytes,
5002 struct x86_exception *exception)
5004 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5005 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5009 /* Inline kvm_read_guest_virt_helper for speed. */
5010 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5012 if (unlikely(gpa == UNMAPPED_GVA))
5013 return X86EMUL_PROPAGATE_FAULT;
5015 offset = addr & (PAGE_SIZE-1);
5016 if (WARN_ON(offset + bytes > PAGE_SIZE))
5017 bytes = (unsigned)PAGE_SIZE - offset;
5018 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5020 if (unlikely(ret < 0))
5021 return X86EMUL_IO_NEEDED;
5023 return X86EMUL_CONTINUE;
5026 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5027 gva_t addr, void *val, unsigned int bytes,
5028 struct x86_exception *exception)
5030 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5032 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5035 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5037 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5038 gva_t addr, void *val, unsigned int bytes,
5039 struct x86_exception *exception, bool system)
5041 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5044 if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5045 access |= PFERR_USER_MASK;
5047 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5050 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5051 unsigned long addr, void *val, unsigned int bytes)
5053 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5054 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5056 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5059 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5060 struct kvm_vcpu *vcpu, u32 access,
5061 struct x86_exception *exception)
5064 int r = X86EMUL_CONTINUE;
5067 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5070 unsigned offset = addr & (PAGE_SIZE-1);
5071 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5074 if (gpa == UNMAPPED_GVA)
5075 return X86EMUL_PROPAGATE_FAULT;
5076 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5078 r = X86EMUL_IO_NEEDED;
5090 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5091 unsigned int bytes, struct x86_exception *exception,
5094 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5095 u32 access = PFERR_WRITE_MASK;
5097 if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5098 access |= PFERR_USER_MASK;
5100 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5104 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5105 unsigned int bytes, struct x86_exception *exception)
5107 /* kvm_write_guest_virt_system can pull in tons of pages. */
5108 vcpu->arch.l1tf_flush_l1d = true;
5110 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5111 PFERR_WRITE_MASK, exception);
5113 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5115 int handle_ud(struct kvm_vcpu *vcpu)
5117 int emul_type = EMULTYPE_TRAP_UD;
5118 enum emulation_result er;
5119 char sig[5]; /* ud2; .ascii "kvm" */
5120 struct x86_exception e;
5122 if (force_emulation_prefix &&
5123 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5124 sig, sizeof(sig), &e) == 0 &&
5125 memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5126 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5130 er = kvm_emulate_instruction(vcpu, emul_type);
5131 if (er == EMULATE_USER_EXIT)
5133 if (er != EMULATE_DONE)
5134 kvm_queue_exception(vcpu, UD_VECTOR);
5137 EXPORT_SYMBOL_GPL(handle_ud);
5139 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5140 gpa_t gpa, bool write)
5142 /* For APIC access vmexit */
5143 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5146 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5147 trace_vcpu_match_mmio(gva, gpa, write, true);
5154 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5155 gpa_t *gpa, struct x86_exception *exception,
5158 u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5159 | (write ? PFERR_WRITE_MASK : 0);
5162 * currently PKRU is only applied to ept enabled guest so
5163 * there is no pkey in EPT page table for L1 guest or EPT
5164 * shadow page table for L2 guest.
5166 if (vcpu_match_mmio_gva(vcpu, gva)
5167 && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5168 vcpu->arch.access, 0, access)) {
5169 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5170 (gva & (PAGE_SIZE - 1));
5171 trace_vcpu_match_mmio(gva, *gpa, write, false);
5175 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5177 if (*gpa == UNMAPPED_GVA)
5180 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5183 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5184 const void *val, int bytes)
5188 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5191 kvm_page_track_write(vcpu, gpa, val, bytes);
5195 struct read_write_emulator_ops {
5196 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5198 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5199 void *val, int bytes);
5200 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5201 int bytes, void *val);
5202 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5203 void *val, int bytes);
5207 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5209 if (vcpu->mmio_read_completed) {
5210 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5211 vcpu->mmio_fragments[0].gpa, val);
5212 vcpu->mmio_read_completed = 0;
5219 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5220 void *val, int bytes)
5222 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5225 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5226 void *val, int bytes)
5228 return emulator_write_phys(vcpu, gpa, val, bytes);
5231 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5233 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5234 return vcpu_mmio_write(vcpu, gpa, bytes, val);
5237 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5238 void *val, int bytes)
5240 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5241 return X86EMUL_IO_NEEDED;
5244 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5245 void *val, int bytes)
5247 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5249 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5250 return X86EMUL_CONTINUE;
5253 static const struct read_write_emulator_ops read_emultor = {
5254 .read_write_prepare = read_prepare,
5255 .read_write_emulate = read_emulate,
5256 .read_write_mmio = vcpu_mmio_read,
5257 .read_write_exit_mmio = read_exit_mmio,
5260 static const struct read_write_emulator_ops write_emultor = {
5261 .read_write_emulate = write_emulate,
5262 .read_write_mmio = write_mmio,
5263 .read_write_exit_mmio = write_exit_mmio,
5267 static int emulator_read_write_onepage(unsigned long addr, void *val,
5269 struct x86_exception *exception,
5270 struct kvm_vcpu *vcpu,
5271 const struct read_write_emulator_ops *ops)
5275 bool write = ops->write;
5276 struct kvm_mmio_fragment *frag;
5277 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5280 * If the exit was due to a NPF we may already have a GPA.
5281 * If the GPA is present, use it to avoid the GVA to GPA table walk.
5282 * Note, this cannot be used on string operations since string
5283 * operation using rep will only have the initial GPA from the NPF
5286 if (vcpu->arch.gpa_available &&
5287 emulator_can_use_gpa(ctxt) &&
5288 (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5289 gpa = vcpu->arch.gpa_val;
5290 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5292 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5294 return X86EMUL_PROPAGATE_FAULT;
5297 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5298 return X86EMUL_CONTINUE;
5301 * Is this MMIO handled locally?
5303 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5304 if (handled == bytes)
5305 return X86EMUL_CONTINUE;
5311 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5312 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5316 return X86EMUL_CONTINUE;
5319 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5321 void *val, unsigned int bytes,
5322 struct x86_exception *exception,
5323 const struct read_write_emulator_ops *ops)
5325 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5329 if (ops->read_write_prepare &&
5330 ops->read_write_prepare(vcpu, val, bytes))
5331 return X86EMUL_CONTINUE;
5333 vcpu->mmio_nr_fragments = 0;
5335 /* Crossing a page boundary? */
5336 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5339 now = -addr & ~PAGE_MASK;
5340 rc = emulator_read_write_onepage(addr, val, now, exception,
5343 if (rc != X86EMUL_CONTINUE)
5346 if (ctxt->mode != X86EMUL_MODE_PROT64)
5352 rc = emulator_read_write_onepage(addr, val, bytes, exception,
5354 if (rc != X86EMUL_CONTINUE)
5357 if (!vcpu->mmio_nr_fragments)
5360 gpa = vcpu->mmio_fragments[0].gpa;
5362 vcpu->mmio_needed = 1;
5363 vcpu->mmio_cur_fragment = 0;
5365 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5366 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5367 vcpu->run->exit_reason = KVM_EXIT_MMIO;
5368 vcpu->run->mmio.phys_addr = gpa;
5370 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5373 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5377 struct x86_exception *exception)
5379 return emulator_read_write(ctxt, addr, val, bytes,
5380 exception, &read_emultor);
5383 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5387 struct x86_exception *exception)
5389 return emulator_read_write(ctxt, addr, (void *)val, bytes,
5390 exception, &write_emultor);
5393 #define CMPXCHG_TYPE(t, ptr, old, new) \
5394 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5396 #ifdef CONFIG_X86_64
5397 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5399 # define CMPXCHG64(ptr, old, new) \
5400 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5403 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5408 struct x86_exception *exception)
5410 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5416 /* guests cmpxchg8b have to be emulated atomically */
5417 if (bytes > 8 || (bytes & (bytes - 1)))
5420 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5422 if (gpa == UNMAPPED_GVA ||
5423 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5426 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5429 page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5430 if (is_error_page(page))
5433 kaddr = kmap_atomic(page);
5434 kaddr += offset_in_page(gpa);
5437 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5440 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5443 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5446 exchanged = CMPXCHG64(kaddr, old, new);
5451 kunmap_atomic(kaddr);
5452 kvm_release_page_dirty(page);
5455 return X86EMUL_CMPXCHG_FAILED;
5457 kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5458 kvm_page_track_write(vcpu, gpa, new, bytes);
5460 return X86EMUL_CONTINUE;
5463 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5465 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5468 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5472 for (i = 0; i < vcpu->arch.pio.count; i++) {
5473 if (vcpu->arch.pio.in)
5474 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5475 vcpu->arch.pio.size, pd);
5477 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5478 vcpu->arch.pio.port, vcpu->arch.pio.size,
5482 pd += vcpu->arch.pio.size;
5487 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5488 unsigned short port, void *val,
5489 unsigned int count, bool in)
5491 vcpu->arch.pio.port = port;
5492 vcpu->arch.pio.in = in;
5493 vcpu->arch.pio.count = count;
5494 vcpu->arch.pio.size = size;
5496 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5497 vcpu->arch.pio.count = 0;
5501 vcpu->run->exit_reason = KVM_EXIT_IO;
5502 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5503 vcpu->run->io.size = size;
5504 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5505 vcpu->run->io.count = count;
5506 vcpu->run->io.port = port;
5511 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5512 int size, unsigned short port, void *val,
5515 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5518 if (vcpu->arch.pio.count)
5521 memset(vcpu->arch.pio_data, 0, size * count);
5523 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5526 memcpy(val, vcpu->arch.pio_data, size * count);
5527 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5528 vcpu->arch.pio.count = 0;
5535 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5536 int size, unsigned short port,
5537 const void *val, unsigned int count)
5539 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5541 memcpy(vcpu->arch.pio_data, val, size * count);
5542 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5543 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5546 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5548 return kvm_x86_ops->get_segment_base(vcpu, seg);
5551 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5553 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5556 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5558 if (!need_emulate_wbinvd(vcpu))
5559 return X86EMUL_CONTINUE;
5561 if (kvm_x86_ops->has_wbinvd_exit()) {
5562 int cpu = get_cpu();
5564 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5565 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5566 wbinvd_ipi, NULL, 1);
5568 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5571 return X86EMUL_CONTINUE;
5574 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5576 kvm_emulate_wbinvd_noskip(vcpu);
5577 return kvm_skip_emulated_instruction(vcpu);
5579 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5583 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5585 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5588 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5589 unsigned long *dest)
5591 return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5594 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5595 unsigned long value)
5598 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5601 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5603 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5606 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5608 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5609 unsigned long value;
5613 value = kvm_read_cr0(vcpu);
5616 value = vcpu->arch.cr2;
5619 value = kvm_read_cr3(vcpu);
5622 value = kvm_read_cr4(vcpu);
5625 value = kvm_get_cr8(vcpu);
5628 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5635 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5637 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5642 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5645 vcpu->arch.cr2 = val;
5648 res = kvm_set_cr3(vcpu, val);
5651 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5654 res = kvm_set_cr8(vcpu, val);
5657 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5664 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5666 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5669 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5671 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5674 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5676 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5679 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5681 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5684 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5686 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5689 static unsigned long emulator_get_cached_segment_base(
5690 struct x86_emulate_ctxt *ctxt, int seg)
5692 return get_segment_base(emul_to_vcpu(ctxt), seg);
5695 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5696 struct desc_struct *desc, u32 *base3,
5699 struct kvm_segment var;
5701 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5702 *selector = var.selector;
5705 memset(desc, 0, sizeof(*desc));
5713 set_desc_limit(desc, var.limit);
5714 set_desc_base(desc, (unsigned long)var.base);
5715 #ifdef CONFIG_X86_64
5717 *base3 = var.base >> 32;
5719 desc->type = var.type;
5721 desc->dpl = var.dpl;
5722 desc->p = var.present;
5723 desc->avl = var.avl;
5731 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5732 struct desc_struct *desc, u32 base3,
5735 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5736 struct kvm_segment var;
5738 var.selector = selector;
5739 var.base = get_desc_base(desc);
5740 #ifdef CONFIG_X86_64
5741 var.base |= ((u64)base3) << 32;
5743 var.limit = get_desc_limit(desc);
5745 var.limit = (var.limit << 12) | 0xfff;
5746 var.type = desc->type;
5747 var.dpl = desc->dpl;
5752 var.avl = desc->avl;
5753 var.present = desc->p;
5754 var.unusable = !var.present;
5757 kvm_set_segment(vcpu, &var, seg);
5761 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5762 u32 msr_index, u64 *pdata)
5764 struct msr_data msr;
5767 msr.index = msr_index;
5768 msr.host_initiated = false;
5769 r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5777 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5778 u32 msr_index, u64 data)
5780 struct msr_data msr;
5783 msr.index = msr_index;
5784 msr.host_initiated = false;
5785 return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5788 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5790 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5792 return vcpu->arch.smbase;
5795 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5797 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5799 vcpu->arch.smbase = smbase;
5802 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5805 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5808 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5809 u32 pmc, u64 *pdata)
5811 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5814 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5816 emul_to_vcpu(ctxt)->arch.halt_request = 1;
5819 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5820 struct x86_instruction_info *info,
5821 enum x86_intercept_stage stage)
5823 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5826 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5827 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5829 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5832 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5834 return kvm_register_read(emul_to_vcpu(ctxt), reg);
5837 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5839 kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5842 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5844 kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5847 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5849 return emul_to_vcpu(ctxt)->arch.hflags;
5852 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5854 kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5857 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5859 return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5862 static const struct x86_emulate_ops emulate_ops = {
5863 .read_gpr = emulator_read_gpr,
5864 .write_gpr = emulator_write_gpr,
5865 .read_std = emulator_read_std,
5866 .write_std = emulator_write_std,
5867 .read_phys = kvm_read_guest_phys_system,
5868 .fetch = kvm_fetch_guest_virt,
5869 .read_emulated = emulator_read_emulated,
5870 .write_emulated = emulator_write_emulated,
5871 .cmpxchg_emulated = emulator_cmpxchg_emulated,
5872 .invlpg = emulator_invlpg,
5873 .pio_in_emulated = emulator_pio_in_emulated,
5874 .pio_out_emulated = emulator_pio_out_emulated,
5875 .get_segment = emulator_get_segment,
5876 .set_segment = emulator_set_segment,
5877 .get_cached_segment_base = emulator_get_cached_segment_base,
5878 .get_gdt = emulator_get_gdt,
5879 .get_idt = emulator_get_idt,
5880 .set_gdt = emulator_set_gdt,
5881 .set_idt = emulator_set_idt,
5882 .get_cr = emulator_get_cr,
5883 .set_cr = emulator_set_cr,
5884 .cpl = emulator_get_cpl,
5885 .get_dr = emulator_get_dr,
5886 .set_dr = emulator_set_dr,
5887 .get_smbase = emulator_get_smbase,
5888 .set_smbase = emulator_set_smbase,
5889 .set_msr = emulator_set_msr,
5890 .get_msr = emulator_get_msr,
5891 .check_pmc = emulator_check_pmc,
5892 .read_pmc = emulator_read_pmc,
5893 .halt = emulator_halt,
5894 .wbinvd = emulator_wbinvd,
5895 .fix_hypercall = emulator_fix_hypercall,
5896 .intercept = emulator_intercept,
5897 .get_cpuid = emulator_get_cpuid,
5898 .set_nmi_mask = emulator_set_nmi_mask,
5899 .get_hflags = emulator_get_hflags,
5900 .set_hflags = emulator_set_hflags,
5901 .pre_leave_smm = emulator_pre_leave_smm,
5904 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5906 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5908 * an sti; sti; sequence only disable interrupts for the first
5909 * instruction. So, if the last instruction, be it emulated or
5910 * not, left the system with the INT_STI flag enabled, it
5911 * means that the last instruction is an sti. We should not
5912 * leave the flag on in this case. The same goes for mov ss
5914 if (int_shadow & mask)
5916 if (unlikely(int_shadow || mask)) {
5917 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5919 kvm_make_request(KVM_REQ_EVENT, vcpu);
5923 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5925 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5926 if (ctxt->exception.vector == PF_VECTOR)
5927 return kvm_propagate_fault(vcpu, &ctxt->exception);
5929 if (ctxt->exception.error_code_valid)
5930 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5931 ctxt->exception.error_code);
5933 kvm_queue_exception(vcpu, ctxt->exception.vector);
5937 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5939 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5942 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5944 ctxt->eflags = kvm_get_rflags(vcpu);
5945 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5947 ctxt->eip = kvm_rip_read(vcpu);
5948 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5949 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
5950 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
5951 cs_db ? X86EMUL_MODE_PROT32 :
5952 X86EMUL_MODE_PROT16;
5953 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5954 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5955 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5957 init_decode_cache(ctxt);
5958 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5961 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5963 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5966 init_emulate_ctxt(vcpu);
5970 ctxt->_eip = ctxt->eip + inc_eip;
5971 ret = emulate_int_real(ctxt, irq);
5973 if (ret != X86EMUL_CONTINUE)
5974 return EMULATE_FAIL;
5976 ctxt->eip = ctxt->_eip;
5977 kvm_rip_write(vcpu, ctxt->eip);
5978 kvm_set_rflags(vcpu, ctxt->eflags);
5980 return EMULATE_DONE;
5982 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5984 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
5986 int r = EMULATE_DONE;
5988 ++vcpu->stat.insn_emulation_fail;
5989 trace_kvm_emulate_insn_failed(vcpu);
5991 if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
5992 return EMULATE_FAIL;
5994 if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5995 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5996 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5997 vcpu->run->internal.ndata = 0;
5998 r = EMULATE_USER_EXIT;
6001 kvm_queue_exception(vcpu, UD_VECTOR);
6006 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6007 bool write_fault_to_shadow_pgtable,
6013 if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6016 if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6019 if (!vcpu->arch.mmu->direct_map) {
6021 * Write permission should be allowed since only
6022 * write access need to be emulated.
6024 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6027 * If the mapping is invalid in guest, let cpu retry
6028 * it to generate fault.
6030 if (gpa == UNMAPPED_GVA)
6035 * Do not retry the unhandleable instruction if it faults on the
6036 * readonly host memory, otherwise it will goto a infinite loop:
6037 * retry instruction -> write #PF -> emulation fail -> retry
6038 * instruction -> ...
6040 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6043 * If the instruction failed on the error pfn, it can not be fixed,
6044 * report the error to userspace.
6046 if (is_error_noslot_pfn(pfn))
6049 kvm_release_pfn_clean(pfn);
6051 /* The instructions are well-emulated on direct mmu. */
6052 if (vcpu->arch.mmu->direct_map) {
6053 unsigned int indirect_shadow_pages;
6055 spin_lock(&vcpu->kvm->mmu_lock);
6056 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6057 spin_unlock(&vcpu->kvm->mmu_lock);
6059 if (indirect_shadow_pages)
6060 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6066 * if emulation was due to access to shadowed page table
6067 * and it failed try to unshadow page and re-enter the
6068 * guest to let CPU execute the instruction.
6070 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6073 * If the access faults on its page table, it can not
6074 * be fixed by unprotecting shadow page and it should
6075 * be reported to userspace.
6077 return !write_fault_to_shadow_pgtable;
6080 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6081 unsigned long cr2, int emulation_type)
6083 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6084 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6086 last_retry_eip = vcpu->arch.last_retry_eip;
6087 last_retry_addr = vcpu->arch.last_retry_addr;
6090 * If the emulation is caused by #PF and it is non-page_table
6091 * writing instruction, it means the VM-EXIT is caused by shadow
6092 * page protected, we can zap the shadow page and retry this
6093 * instruction directly.
6095 * Note: if the guest uses a non-page-table modifying instruction
6096 * on the PDE that points to the instruction, then we will unmap
6097 * the instruction and go to an infinite loop. So, we cache the
6098 * last retried eip and the last fault address, if we meet the eip
6099 * and the address again, we can break out of the potential infinite
6102 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6104 if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6107 if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6110 if (x86_page_table_writing_insn(ctxt))
6113 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6116 vcpu->arch.last_retry_eip = ctxt->eip;
6117 vcpu->arch.last_retry_addr = cr2;
6119 if (!vcpu->arch.mmu->direct_map)
6120 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6122 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6127 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6128 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6130 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6132 if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6133 /* This is a good place to trace that we are exiting SMM. */
6134 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6136 /* Process a latched INIT or SMI, if any. */
6137 kvm_make_request(KVM_REQ_EVENT, vcpu);
6140 kvm_mmu_reset_context(vcpu);
6143 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
6145 unsigned changed = vcpu->arch.hflags ^ emul_flags;
6147 vcpu->arch.hflags = emul_flags;
6149 if (changed & HF_SMM_MASK)
6150 kvm_smm_changed(vcpu);
6153 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6162 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6163 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6168 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6170 struct kvm_run *kvm_run = vcpu->run;
6172 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6173 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6174 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6175 kvm_run->debug.arch.exception = DB_VECTOR;
6176 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6177 *r = EMULATE_USER_EXIT;
6179 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6183 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6185 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6186 int r = EMULATE_DONE;
6188 kvm_x86_ops->skip_emulated_instruction(vcpu);
6191 * rflags is the old, "raw" value of the flags. The new value has
6192 * not been saved yet.
6194 * This is correct even for TF set by the guest, because "the
6195 * processor will not generate this exception after the instruction
6196 * that sets the TF flag".
6198 if (unlikely(rflags & X86_EFLAGS_TF))
6199 kvm_vcpu_do_singlestep(vcpu, &r);
6200 return r == EMULATE_DONE;
6202 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6204 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6206 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6207 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6208 struct kvm_run *kvm_run = vcpu->run;
6209 unsigned long eip = kvm_get_linear_rip(vcpu);
6210 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6211 vcpu->arch.guest_debug_dr7,
6215 kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6216 kvm_run->debug.arch.pc = eip;
6217 kvm_run->debug.arch.exception = DB_VECTOR;
6218 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6219 *r = EMULATE_USER_EXIT;
6224 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6225 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6226 unsigned long eip = kvm_get_linear_rip(vcpu);
6227 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6232 vcpu->arch.dr6 &= ~15;
6233 vcpu->arch.dr6 |= dr6 | DR6_RTM;
6234 kvm_queue_exception(vcpu, DB_VECTOR);
6243 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6245 switch (ctxt->opcode_len) {
6252 case 0xe6: /* OUT */
6256 case 0x6c: /* INS */
6258 case 0x6e: /* OUTS */
6265 case 0x33: /* RDPMC */
6274 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6281 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6282 bool writeback = true;
6283 bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6285 vcpu->arch.l1tf_flush_l1d = true;
6288 * Clear write_fault_to_shadow_pgtable here to ensure it is
6291 vcpu->arch.write_fault_to_shadow_pgtable = false;
6292 kvm_clear_exception_queue(vcpu);
6294 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6295 init_emulate_ctxt(vcpu);
6298 * We will reenter on the same instruction since
6299 * we do not set complete_userspace_io. This does not
6300 * handle watchpoints yet, those would be handled in
6303 if (!(emulation_type & EMULTYPE_SKIP) &&
6304 kvm_vcpu_check_breakpoint(vcpu, &r))
6307 ctxt->interruptibility = 0;
6308 ctxt->have_exception = false;
6309 ctxt->exception.vector = -1;
6310 ctxt->perm_ok = false;
6312 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6314 r = x86_decode_insn(ctxt, insn, insn_len);
6316 trace_kvm_emulate_insn_start(vcpu);
6317 ++vcpu->stat.insn_emulation;
6318 if (r != EMULATION_OK) {
6319 if (emulation_type & EMULTYPE_TRAP_UD)
6320 return EMULATE_FAIL;
6321 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6323 return EMULATE_DONE;
6324 if (ctxt->have_exception && inject_emulated_exception(vcpu))
6325 return EMULATE_DONE;
6326 if (emulation_type & EMULTYPE_SKIP)
6327 return EMULATE_FAIL;
6328 return handle_emulation_failure(vcpu, emulation_type);
6332 if ((emulation_type & EMULTYPE_VMWARE) &&
6333 !is_vmware_backdoor_opcode(ctxt))
6334 return EMULATE_FAIL;
6336 if (emulation_type & EMULTYPE_SKIP) {
6337 kvm_rip_write(vcpu, ctxt->_eip);
6338 if (ctxt->eflags & X86_EFLAGS_RF)
6339 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6340 return EMULATE_DONE;
6343 if (retry_instruction(ctxt, cr2, emulation_type))
6344 return EMULATE_DONE;
6346 /* this is needed for vmware backdoor interface to work since it
6347 changes registers values during IO operation */
6348 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6349 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6350 emulator_invalidate_register_cache(ctxt);
6354 /* Save the faulting GPA (cr2) in the address field */
6355 ctxt->exception.address = cr2;
6357 r = x86_emulate_insn(ctxt);
6359 if (r == EMULATION_INTERCEPTED)
6360 return EMULATE_DONE;
6362 if (r == EMULATION_FAILED) {
6363 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6365 return EMULATE_DONE;
6367 return handle_emulation_failure(vcpu, emulation_type);
6370 if (ctxt->have_exception) {
6372 if (inject_emulated_exception(vcpu))
6374 } else if (vcpu->arch.pio.count) {
6375 if (!vcpu->arch.pio.in) {
6376 /* FIXME: return into emulator if single-stepping. */
6377 vcpu->arch.pio.count = 0;
6380 vcpu->arch.complete_userspace_io = complete_emulated_pio;
6382 r = EMULATE_USER_EXIT;
6383 } else if (vcpu->mmio_needed) {
6384 if (!vcpu->mmio_is_write)
6386 r = EMULATE_USER_EXIT;
6387 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6388 } else if (r == EMULATION_RESTART)
6394 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6395 toggle_interruptibility(vcpu, ctxt->interruptibility);
6396 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6397 kvm_rip_write(vcpu, ctxt->eip);
6398 if (r == EMULATE_DONE &&
6399 (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6400 kvm_vcpu_do_singlestep(vcpu, &r);
6401 if (!ctxt->have_exception ||
6402 exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6403 __kvm_set_rflags(vcpu, ctxt->eflags);
6406 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6407 * do nothing, and it will be requested again as soon as
6408 * the shadow expires. But we still need to check here,
6409 * because POPF has no interrupt shadow.
6411 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6412 kvm_make_request(KVM_REQ_EVENT, vcpu);
6414 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6419 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6421 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6423 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6425 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6426 void *insn, int insn_len)
6428 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6430 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6432 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6433 unsigned short port)
6435 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6436 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6437 size, port, &val, 1);
6438 /* do not return to emulator after return from userspace */
6439 vcpu->arch.pio.count = 0;
6443 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6447 /* We should only ever be called with arch.pio.count equal to 1 */
6448 BUG_ON(vcpu->arch.pio.count != 1);
6450 /* For size less than 4 we merge, else we zero extend */
6451 val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6455 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6456 * the copy and tracing
6458 emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6459 vcpu->arch.pio.port, &val, 1);
6460 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6465 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6466 unsigned short port)
6471 /* For size less than 4 we merge, else we zero extend */
6472 val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6474 ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6477 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6481 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6486 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6488 int ret = kvm_skip_emulated_instruction(vcpu);
6491 * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
6492 * KVM_EXIT_DEBUG here.
6495 return kvm_fast_pio_in(vcpu, size, port) && ret;
6497 return kvm_fast_pio_out(vcpu, size, port) && ret;
6499 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6501 static int kvmclock_cpu_down_prep(unsigned int cpu)
6503 __this_cpu_write(cpu_tsc_khz, 0);
6507 static void tsc_khz_changed(void *data)
6509 struct cpufreq_freqs *freq = data;
6510 unsigned long khz = 0;
6514 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6515 khz = cpufreq_quick_get(raw_smp_processor_id());
6518 __this_cpu_write(cpu_tsc_khz, khz);
6521 #ifdef CONFIG_X86_64
6522 static void kvm_hyperv_tsc_notifier(void)
6525 struct kvm_vcpu *vcpu;
6528 spin_lock(&kvm_lock);
6529 list_for_each_entry(kvm, &vm_list, vm_list)
6530 kvm_make_mclock_inprogress_request(kvm);
6532 hyperv_stop_tsc_emulation();
6534 /* TSC frequency always matches when on Hyper-V */
6535 for_each_present_cpu(cpu)
6536 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6537 kvm_max_guest_tsc_khz = tsc_khz;
6539 list_for_each_entry(kvm, &vm_list, vm_list) {
6540 struct kvm_arch *ka = &kvm->arch;
6542 spin_lock(&ka->pvclock_gtod_sync_lock);
6544 pvclock_update_vm_gtod_copy(kvm);
6546 kvm_for_each_vcpu(cpu, vcpu, kvm)
6547 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6549 kvm_for_each_vcpu(cpu, vcpu, kvm)
6550 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6552 spin_unlock(&ka->pvclock_gtod_sync_lock);
6554 spin_unlock(&kvm_lock);
6558 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6561 struct cpufreq_freqs *freq = data;
6563 struct kvm_vcpu *vcpu;
6564 int i, send_ipi = 0;
6567 * We allow guests to temporarily run on slowing clocks,
6568 * provided we notify them after, or to run on accelerating
6569 * clocks, provided we notify them before. Thus time never
6572 * However, we have a problem. We can't atomically update
6573 * the frequency of a given CPU from this function; it is
6574 * merely a notifier, which can be called from any CPU.
6575 * Changing the TSC frequency at arbitrary points in time
6576 * requires a recomputation of local variables related to
6577 * the TSC for each VCPU. We must flag these local variables
6578 * to be updated and be sure the update takes place with the
6579 * new frequency before any guests proceed.
6581 * Unfortunately, the combination of hotplug CPU and frequency
6582 * change creates an intractable locking scenario; the order
6583 * of when these callouts happen is undefined with respect to
6584 * CPU hotplug, and they can race with each other. As such,
6585 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6586 * undefined; you can actually have a CPU frequency change take
6587 * place in between the computation of X and the setting of the
6588 * variable. To protect against this problem, all updates of
6589 * the per_cpu tsc_khz variable are done in an interrupt
6590 * protected IPI, and all callers wishing to update the value
6591 * must wait for a synchronous IPI to complete (which is trivial
6592 * if the caller is on the CPU already). This establishes the
6593 * necessary total order on variable updates.
6595 * Note that because a guest time update may take place
6596 * anytime after the setting of the VCPU's request bit, the
6597 * correct TSC value must be set before the request. However,
6598 * to ensure the update actually makes it to any guest which
6599 * starts running in hardware virtualization between the set
6600 * and the acquisition of the spinlock, we must also ping the
6601 * CPU after setting the request bit.
6605 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6607 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6610 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6612 spin_lock(&kvm_lock);
6613 list_for_each_entry(kvm, &vm_list, vm_list) {
6614 kvm_for_each_vcpu(i, vcpu, kvm) {
6615 if (vcpu->cpu != freq->cpu)
6617 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6618 if (vcpu->cpu != smp_processor_id())
6622 spin_unlock(&kvm_lock);
6624 if (freq->old < freq->new && send_ipi) {
6626 * We upscale the frequency. Must make the guest
6627 * doesn't see old kvmclock values while running with
6628 * the new frequency, otherwise we risk the guest sees
6629 * time go backwards.
6631 * In case we update the frequency for another cpu
6632 * (which might be in guest context) send an interrupt
6633 * to kick the cpu out of guest context. Next time
6634 * guest context is entered kvmclock will be updated,
6635 * so the guest will not see stale values.
6637 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6642 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6643 .notifier_call = kvmclock_cpufreq_notifier
6646 static int kvmclock_cpu_online(unsigned int cpu)
6648 tsc_khz_changed(NULL);
6652 static void kvm_timer_init(void)
6654 max_tsc_khz = tsc_khz;
6656 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6657 #ifdef CONFIG_CPU_FREQ
6658 struct cpufreq_policy policy;
6661 memset(&policy, 0, sizeof(policy));
6663 cpufreq_get_policy(&policy, cpu);
6664 if (policy.cpuinfo.max_freq)
6665 max_tsc_khz = policy.cpuinfo.max_freq;
6668 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6669 CPUFREQ_TRANSITION_NOTIFIER);
6671 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6673 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6674 kvmclock_cpu_online, kvmclock_cpu_down_prep);
6677 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6678 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6680 int kvm_is_in_guest(void)
6682 return __this_cpu_read(current_vcpu) != NULL;
6685 static int kvm_is_user_mode(void)
6689 if (__this_cpu_read(current_vcpu))
6690 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6692 return user_mode != 0;
6695 static unsigned long kvm_get_guest_ip(void)
6697 unsigned long ip = 0;
6699 if (__this_cpu_read(current_vcpu))
6700 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6705 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6706 .is_in_guest = kvm_is_in_guest,
6707 .is_user_mode = kvm_is_user_mode,
6708 .get_guest_ip = kvm_get_guest_ip,
6711 static void kvm_set_mmio_spte_mask(void)
6714 int maxphyaddr = boot_cpu_data.x86_phys_bits;
6717 * Set the reserved bits and the present bit of an paging-structure
6718 * entry to generate page fault with PFER.RSV = 1.
6722 * Mask the uppermost physical address bit, which would be reserved as
6723 * long as the supported physical address width is less than 52.
6727 /* Set the present bit. */
6731 * If reserved bit is not supported, clear the present bit to disable
6734 if (IS_ENABLED(CONFIG_X86_64) && maxphyaddr == 52)
6737 kvm_mmu_set_mmio_spte_mask(mask, mask);
6740 #ifdef CONFIG_X86_64
6741 static void pvclock_gtod_update_fn(struct work_struct *work)
6745 struct kvm_vcpu *vcpu;
6748 spin_lock(&kvm_lock);
6749 list_for_each_entry(kvm, &vm_list, vm_list)
6750 kvm_for_each_vcpu(i, vcpu, kvm)
6751 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6752 atomic_set(&kvm_guest_has_master_clock, 0);
6753 spin_unlock(&kvm_lock);
6756 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6759 * Notification about pvclock gtod data update.
6761 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6764 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6765 struct timekeeper *tk = priv;
6767 update_pvclock_gtod(tk);
6769 /* disable master clock if host does not trust, or does not
6770 * use, TSC based clocksource.
6772 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6773 atomic_read(&kvm_guest_has_master_clock) != 0)
6774 queue_work(system_long_wq, &pvclock_gtod_work);
6779 static struct notifier_block pvclock_gtod_notifier = {
6780 .notifier_call = pvclock_gtod_notify,
6784 int kvm_arch_init(void *opaque)
6787 struct kvm_x86_ops *ops = opaque;
6790 printk(KERN_ERR "kvm: already loaded the other module\n");
6795 if (!ops->cpu_has_kvm_support()) {
6796 printk(KERN_ERR "kvm: no hardware support\n");
6800 if (ops->disabled_by_bios()) {
6801 printk(KERN_ERR "kvm: disabled by bios\n");
6807 shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6809 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6813 r = kvm_mmu_module_init();
6815 goto out_free_percpu;
6817 kvm_set_mmio_spte_mask();
6821 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6822 PT_DIRTY_MASK, PT64_NX_MASK, 0,
6823 PT_PRESENT_MASK, 0, sme_me_mask);
6826 perf_register_guest_info_callbacks(&kvm_guest_cbs);
6828 if (boot_cpu_has(X86_FEATURE_XSAVE))
6829 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6832 #ifdef CONFIG_X86_64
6833 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6835 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6836 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6842 free_percpu(shared_msrs);
6847 void kvm_arch_exit(void)
6849 #ifdef CONFIG_X86_64
6850 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6851 clear_hv_tscchange_cb();
6854 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6856 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6857 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6858 CPUFREQ_TRANSITION_NOTIFIER);
6859 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6860 #ifdef CONFIG_X86_64
6861 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6864 kvm_mmu_module_exit();
6865 free_percpu(shared_msrs);
6868 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6870 ++vcpu->stat.halt_exits;
6871 if (lapic_in_kernel(vcpu)) {
6872 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6875 vcpu->run->exit_reason = KVM_EXIT_HLT;
6879 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6881 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6883 int ret = kvm_skip_emulated_instruction(vcpu);
6885 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6886 * KVM_EXIT_DEBUG here.
6888 return kvm_vcpu_halt(vcpu) && ret;
6890 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6892 #ifdef CONFIG_X86_64
6893 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6894 unsigned long clock_type)
6896 struct kvm_clock_pairing clock_pairing;
6897 struct timespec64 ts;
6901 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6902 return -KVM_EOPNOTSUPP;
6904 if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6905 return -KVM_EOPNOTSUPP;
6907 clock_pairing.sec = ts.tv_sec;
6908 clock_pairing.nsec = ts.tv_nsec;
6909 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6910 clock_pairing.flags = 0;
6911 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
6914 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6915 sizeof(struct kvm_clock_pairing)))
6923 * kvm_pv_kick_cpu_op: Kick a vcpu.
6925 * @apicid - apicid of vcpu to be kicked.
6927 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6929 struct kvm_lapic_irq lapic_irq;
6931 lapic_irq.shorthand = 0;
6932 lapic_irq.dest_mode = 0;
6933 lapic_irq.level = 0;
6934 lapic_irq.dest_id = apicid;
6935 lapic_irq.msi_redir_hint = false;
6937 lapic_irq.delivery_mode = APIC_DM_REMRD;
6938 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6941 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6943 vcpu->arch.apicv_active = false;
6944 kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6947 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6949 unsigned long nr, a0, a1, a2, a3, ret;
6952 if (kvm_hv_hypercall_enabled(vcpu->kvm))
6953 return kvm_hv_hypercall(vcpu);
6955 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6956 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6957 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6958 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6959 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6961 trace_kvm_hypercall(nr, a0, a1, a2, a3);
6963 op_64_bit = is_64_bit_mode(vcpu);
6972 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6978 case KVM_HC_VAPIC_POLL_IRQ:
6981 case KVM_HC_KICK_CPU:
6982 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6985 #ifdef CONFIG_X86_64
6986 case KVM_HC_CLOCK_PAIRING:
6987 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6989 case KVM_HC_SEND_IPI:
6990 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7000 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
7002 ++vcpu->stat.hypercalls;
7003 return kvm_skip_emulated_instruction(vcpu);
7005 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7007 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7009 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7010 char instruction[3];
7011 unsigned long rip = kvm_rip_read(vcpu);
7013 kvm_x86_ops->patch_hypercall(vcpu, instruction);
7015 return emulator_write_emulated(ctxt, rip, instruction, 3,
7019 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7021 return vcpu->run->request_interrupt_window &&
7022 likely(!pic_in_kernel(vcpu->kvm));
7025 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7027 struct kvm_run *kvm_run = vcpu->run;
7029 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7030 kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7031 kvm_run->cr8 = kvm_get_cr8(vcpu);
7032 kvm_run->apic_base = kvm_get_apic_base(vcpu);
7033 kvm_run->ready_for_interrupt_injection =
7034 pic_in_kernel(vcpu->kvm) ||
7035 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7038 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7042 if (!kvm_x86_ops->update_cr8_intercept)
7045 if (!lapic_in_kernel(vcpu))
7048 if (vcpu->arch.apicv_active)
7051 if (!vcpu->arch.apic->vapic_addr)
7052 max_irr = kvm_lapic_find_highest_irr(vcpu);
7059 tpr = kvm_lapic_get_cr8(vcpu);
7061 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7064 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7068 /* try to reinject previous events if any */
7070 if (vcpu->arch.exception.injected)
7071 kvm_x86_ops->queue_exception(vcpu);
7073 * Do not inject an NMI or interrupt if there is a pending
7074 * exception. Exceptions and interrupts are recognized at
7075 * instruction boundaries, i.e. the start of an instruction.
7076 * Trap-like exceptions, e.g. #DB, have higher priority than
7077 * NMIs and interrupts, i.e. traps are recognized before an
7078 * NMI/interrupt that's pending on the same instruction.
7079 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7080 * priority, but are only generated (pended) during instruction
7081 * execution, i.e. a pending fault-like exception means the
7082 * fault occurred on the *previous* instruction and must be
7083 * serviced prior to recognizing any new events in order to
7084 * fully complete the previous instruction.
7086 else if (!vcpu->arch.exception.pending) {
7087 if (vcpu->arch.nmi_injected)
7088 kvm_x86_ops->set_nmi(vcpu);
7089 else if (vcpu->arch.interrupt.injected)
7090 kvm_x86_ops->set_irq(vcpu);
7094 * Call check_nested_events() even if we reinjected a previous event
7095 * in order for caller to determine if it should require immediate-exit
7096 * from L2 to L1 due to pending L1 events which require exit
7099 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7100 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7105 /* try to inject new event if pending */
7106 if (vcpu->arch.exception.pending) {
7107 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7108 vcpu->arch.exception.has_error_code,
7109 vcpu->arch.exception.error_code);
7111 WARN_ON_ONCE(vcpu->arch.exception.injected);
7112 vcpu->arch.exception.pending = false;
7113 vcpu->arch.exception.injected = true;
7115 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7116 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7119 if (vcpu->arch.exception.nr == DB_VECTOR) {
7121 * This code assumes that nSVM doesn't use
7122 * check_nested_events(). If it does, the
7123 * DR6/DR7 changes should happen before L1
7124 * gets a #VMEXIT for an intercepted #DB in
7125 * L2. (Under VMX, on the other hand, the
7126 * DR6/DR7 changes should not happen in the
7127 * event of a VM-exit to L1 for an intercepted
7130 kvm_deliver_exception_payload(vcpu);
7131 if (vcpu->arch.dr7 & DR7_GD) {
7132 vcpu->arch.dr7 &= ~DR7_GD;
7133 kvm_update_dr7(vcpu);
7137 kvm_x86_ops->queue_exception(vcpu);
7140 /* Don't consider new event if we re-injected an event */
7141 if (kvm_event_needs_reinjection(vcpu))
7144 if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7145 kvm_x86_ops->smi_allowed(vcpu)) {
7146 vcpu->arch.smi_pending = false;
7147 ++vcpu->arch.smi_count;
7149 } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7150 --vcpu->arch.nmi_pending;
7151 vcpu->arch.nmi_injected = true;
7152 kvm_x86_ops->set_nmi(vcpu);
7153 } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7155 * Because interrupts can be injected asynchronously, we are
7156 * calling check_nested_events again here to avoid a race condition.
7157 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7158 * proposal and current concerns. Perhaps we should be setting
7159 * KVM_REQ_EVENT only on certain events and not unconditionally?
7161 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7162 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7166 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7167 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7169 kvm_x86_ops->set_irq(vcpu);
7176 static void process_nmi(struct kvm_vcpu *vcpu)
7181 * x86 is limited to one NMI running, and one NMI pending after it.
7182 * If an NMI is already in progress, limit further NMIs to just one.
7183 * Otherwise, allow two (and we'll inject the first one immediately).
7185 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7188 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7189 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7190 kvm_make_request(KVM_REQ_EVENT, vcpu);
7193 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7196 flags |= seg->g << 23;
7197 flags |= seg->db << 22;
7198 flags |= seg->l << 21;
7199 flags |= seg->avl << 20;
7200 flags |= seg->present << 15;
7201 flags |= seg->dpl << 13;
7202 flags |= seg->s << 12;
7203 flags |= seg->type << 8;
7207 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7209 struct kvm_segment seg;
7212 kvm_get_segment(vcpu, &seg, n);
7213 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7216 offset = 0x7f84 + n * 12;
7218 offset = 0x7f2c + (n - 3) * 12;
7220 put_smstate(u32, buf, offset + 8, seg.base);
7221 put_smstate(u32, buf, offset + 4, seg.limit);
7222 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7225 #ifdef CONFIG_X86_64
7226 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7228 struct kvm_segment seg;
7232 kvm_get_segment(vcpu, &seg, n);
7233 offset = 0x7e00 + n * 16;
7235 flags = enter_smm_get_segment_flags(&seg) >> 8;
7236 put_smstate(u16, buf, offset, seg.selector);
7237 put_smstate(u16, buf, offset + 2, flags);
7238 put_smstate(u32, buf, offset + 4, seg.limit);
7239 put_smstate(u64, buf, offset + 8, seg.base);
7243 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7246 struct kvm_segment seg;
7250 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7251 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7252 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7253 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7255 for (i = 0; i < 8; i++)
7256 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7258 kvm_get_dr(vcpu, 6, &val);
7259 put_smstate(u32, buf, 0x7fcc, (u32)val);
7260 kvm_get_dr(vcpu, 7, &val);
7261 put_smstate(u32, buf, 0x7fc8, (u32)val);
7263 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7264 put_smstate(u32, buf, 0x7fc4, seg.selector);
7265 put_smstate(u32, buf, 0x7f64, seg.base);
7266 put_smstate(u32, buf, 0x7f60, seg.limit);
7267 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7269 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7270 put_smstate(u32, buf, 0x7fc0, seg.selector);
7271 put_smstate(u32, buf, 0x7f80, seg.base);
7272 put_smstate(u32, buf, 0x7f7c, seg.limit);
7273 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7275 kvm_x86_ops->get_gdt(vcpu, &dt);
7276 put_smstate(u32, buf, 0x7f74, dt.address);
7277 put_smstate(u32, buf, 0x7f70, dt.size);
7279 kvm_x86_ops->get_idt(vcpu, &dt);
7280 put_smstate(u32, buf, 0x7f58, dt.address);
7281 put_smstate(u32, buf, 0x7f54, dt.size);
7283 for (i = 0; i < 6; i++)
7284 enter_smm_save_seg_32(vcpu, buf, i);
7286 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7289 put_smstate(u32, buf, 0x7efc, 0x00020000);
7290 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7293 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7295 #ifdef CONFIG_X86_64
7297 struct kvm_segment seg;
7301 for (i = 0; i < 16; i++)
7302 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7304 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7305 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7307 kvm_get_dr(vcpu, 6, &val);
7308 put_smstate(u64, buf, 0x7f68, val);
7309 kvm_get_dr(vcpu, 7, &val);
7310 put_smstate(u64, buf, 0x7f60, val);
7312 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7313 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7314 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7316 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7319 put_smstate(u32, buf, 0x7efc, 0x00020064);
7321 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7323 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7324 put_smstate(u16, buf, 0x7e90, seg.selector);
7325 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7326 put_smstate(u32, buf, 0x7e94, seg.limit);
7327 put_smstate(u64, buf, 0x7e98, seg.base);
7329 kvm_x86_ops->get_idt(vcpu, &dt);
7330 put_smstate(u32, buf, 0x7e84, dt.size);
7331 put_smstate(u64, buf, 0x7e88, dt.address);
7333 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7334 put_smstate(u16, buf, 0x7e70, seg.selector);
7335 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7336 put_smstate(u32, buf, 0x7e74, seg.limit);
7337 put_smstate(u64, buf, 0x7e78, seg.base);
7339 kvm_x86_ops->get_gdt(vcpu, &dt);
7340 put_smstate(u32, buf, 0x7e64, dt.size);
7341 put_smstate(u64, buf, 0x7e68, dt.address);
7343 for (i = 0; i < 6; i++)
7344 enter_smm_save_seg_64(vcpu, buf, i);
7350 static void enter_smm(struct kvm_vcpu *vcpu)
7352 struct kvm_segment cs, ds;
7357 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7358 memset(buf, 0, 512);
7359 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7360 enter_smm_save_state_64(vcpu, buf);
7362 enter_smm_save_state_32(vcpu, buf);
7365 * Give pre_enter_smm() a chance to make ISA-specific changes to the
7366 * vCPU state (e.g. leave guest mode) after we've saved the state into
7367 * the SMM state-save area.
7369 kvm_x86_ops->pre_enter_smm(vcpu, buf);
7371 vcpu->arch.hflags |= HF_SMM_MASK;
7372 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7374 if (kvm_x86_ops->get_nmi_mask(vcpu))
7375 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7377 kvm_x86_ops->set_nmi_mask(vcpu, true);
7379 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7380 kvm_rip_write(vcpu, 0x8000);
7382 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7383 kvm_x86_ops->set_cr0(vcpu, cr0);
7384 vcpu->arch.cr0 = cr0;
7386 kvm_x86_ops->set_cr4(vcpu, 0);
7388 /* Undocumented: IDT limit is set to zero on entry to SMM. */
7389 dt.address = dt.size = 0;
7390 kvm_x86_ops->set_idt(vcpu, &dt);
7392 __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7394 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7395 cs.base = vcpu->arch.smbase;
7400 cs.limit = ds.limit = 0xffffffff;
7401 cs.type = ds.type = 0x3;
7402 cs.dpl = ds.dpl = 0;
7407 cs.avl = ds.avl = 0;
7408 cs.present = ds.present = 1;
7409 cs.unusable = ds.unusable = 0;
7410 cs.padding = ds.padding = 0;
7412 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7413 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7414 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7415 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7416 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7417 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7419 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7420 kvm_x86_ops->set_efer(vcpu, 0);
7422 kvm_update_cpuid(vcpu);
7423 kvm_mmu_reset_context(vcpu);
7426 static void process_smi(struct kvm_vcpu *vcpu)
7428 vcpu->arch.smi_pending = true;
7429 kvm_make_request(KVM_REQ_EVENT, vcpu);
7432 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7434 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7437 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7439 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7442 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7444 if (irqchip_split(vcpu->kvm))
7445 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7447 if (vcpu->arch.apicv_active)
7448 kvm_x86_ops->sync_pir_to_irr(vcpu);
7449 if (ioapic_in_kernel(vcpu->kvm))
7450 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7453 if (is_guest_mode(vcpu))
7454 vcpu->arch.load_eoi_exitmap_pending = true;
7456 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7459 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7461 u64 eoi_exit_bitmap[4];
7463 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7466 bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7467 vcpu_to_synic(vcpu)->vec_bitmap, 256);
7468 kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7471 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7472 unsigned long start, unsigned long end,
7475 unsigned long apic_address;
7478 * The physical address of apic access page is stored in the VMCS.
7479 * Update it when it becomes invalid.
7481 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7482 if (start <= apic_address && apic_address < end)
7483 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7488 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7490 struct page *page = NULL;
7492 if (!lapic_in_kernel(vcpu))
7495 if (!kvm_x86_ops->set_apic_access_page_addr)
7498 page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7499 if (is_error_page(page))
7501 kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7504 * Do not pin apic access page in memory, the MMU notifier
7505 * will call us again if it is migrated or swapped out.
7509 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7511 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7513 smp_send_reschedule(vcpu->cpu);
7515 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7518 * Returns 1 to let vcpu_run() continue the guest execution loop without
7519 * exiting to the userspace. Otherwise, the value will be returned to the
7522 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7526 dm_request_for_irq_injection(vcpu) &&
7527 kvm_cpu_accept_dm_intr(vcpu);
7529 bool req_immediate_exit = false;
7531 if (kvm_request_pending(vcpu)) {
7532 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7533 kvm_x86_ops->get_vmcs12_pages(vcpu);
7534 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7535 kvm_mmu_unload(vcpu);
7536 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7537 __kvm_migrate_timers(vcpu);
7538 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7539 kvm_gen_update_masterclock(vcpu->kvm);
7540 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7541 kvm_gen_kvmclock_update(vcpu);
7542 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7543 r = kvm_guest_time_update(vcpu);
7547 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7548 kvm_mmu_sync_roots(vcpu);
7549 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7550 kvm_mmu_load_cr3(vcpu);
7551 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7552 kvm_vcpu_flush_tlb(vcpu, true);
7553 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7554 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7558 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7559 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7560 vcpu->mmio_needed = 0;
7564 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7565 /* Page is swapped out. Do synthetic halt */
7566 vcpu->arch.apf.halted = true;
7570 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7571 record_steal_time(vcpu);
7572 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7574 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7576 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7577 kvm_pmu_handle_event(vcpu);
7578 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7579 kvm_pmu_deliver_pmi(vcpu);
7580 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7581 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7582 if (test_bit(vcpu->arch.pending_ioapic_eoi,
7583 vcpu->arch.ioapic_handled_vectors)) {
7584 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7585 vcpu->run->eoi.vector =
7586 vcpu->arch.pending_ioapic_eoi;
7591 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7592 vcpu_scan_ioapic(vcpu);
7593 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7594 vcpu_load_eoi_exitmap(vcpu);
7595 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7596 kvm_vcpu_reload_apic_access_page(vcpu);
7597 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7598 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7599 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7603 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7604 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7605 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7609 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7610 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7611 vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7617 * KVM_REQ_HV_STIMER has to be processed after
7618 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7619 * depend on the guest clock being up-to-date
7621 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7622 kvm_hv_process_stimers(vcpu);
7625 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7626 ++vcpu->stat.req_event;
7627 kvm_apic_accept_events(vcpu);
7628 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7633 if (inject_pending_event(vcpu, req_int_win) != 0)
7634 req_immediate_exit = true;
7636 /* Enable SMI/NMI/IRQ window open exits if needed.
7638 * SMIs have three cases:
7639 * 1) They can be nested, and then there is nothing to
7640 * do here because RSM will cause a vmexit anyway.
7641 * 2) There is an ISA-specific reason why SMI cannot be
7642 * injected, and the moment when this changes can be
7644 * 3) Or the SMI can be pending because
7645 * inject_pending_event has completed the injection
7646 * of an IRQ or NMI from the previous vmexit, and
7647 * then we request an immediate exit to inject the
7650 if (vcpu->arch.smi_pending && !is_smm(vcpu))
7651 if (!kvm_x86_ops->enable_smi_window(vcpu))
7652 req_immediate_exit = true;
7653 if (vcpu->arch.nmi_pending)
7654 kvm_x86_ops->enable_nmi_window(vcpu);
7655 if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7656 kvm_x86_ops->enable_irq_window(vcpu);
7657 WARN_ON(vcpu->arch.exception.pending);
7660 if (kvm_lapic_enabled(vcpu)) {
7661 update_cr8_intercept(vcpu);
7662 kvm_lapic_sync_to_vapic(vcpu);
7666 r = kvm_mmu_reload(vcpu);
7668 goto cancel_injection;
7673 kvm_x86_ops->prepare_guest_switch(vcpu);
7676 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7677 * IPI are then delayed after guest entry, which ensures that they
7678 * result in virtual interrupt delivery.
7680 local_irq_disable();
7681 vcpu->mode = IN_GUEST_MODE;
7683 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7686 * 1) We should set ->mode before checking ->requests. Please see
7687 * the comment in kvm_vcpu_exiting_guest_mode().
7689 * 2) For APICv, we should set ->mode before checking PIR.ON. This
7690 * pairs with the memory barrier implicit in pi_test_and_set_on
7691 * (see vmx_deliver_posted_interrupt).
7693 * 3) This also orders the write to mode from any reads to the page
7694 * tables done while the VCPU is running. Please see the comment
7695 * in kvm_flush_remote_tlbs.
7697 smp_mb__after_srcu_read_unlock();
7700 * This handles the case where a posted interrupt was
7701 * notified with kvm_vcpu_kick.
7703 if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7704 kvm_x86_ops->sync_pir_to_irr(vcpu);
7706 if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7707 || need_resched() || signal_pending(current)) {
7708 vcpu->mode = OUTSIDE_GUEST_MODE;
7712 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7714 goto cancel_injection;
7717 kvm_load_guest_xcr0(vcpu);
7719 if (req_immediate_exit) {
7720 kvm_make_request(KVM_REQ_EVENT, vcpu);
7721 kvm_x86_ops->request_immediate_exit(vcpu);
7724 trace_kvm_entry(vcpu->vcpu_id);
7725 if (lapic_timer_advance_ns)
7726 wait_lapic_expire(vcpu);
7727 guest_enter_irqoff();
7729 if (unlikely(vcpu->arch.switch_db_regs)) {
7731 set_debugreg(vcpu->arch.eff_db[0], 0);
7732 set_debugreg(vcpu->arch.eff_db[1], 1);
7733 set_debugreg(vcpu->arch.eff_db[2], 2);
7734 set_debugreg(vcpu->arch.eff_db[3], 3);
7735 set_debugreg(vcpu->arch.dr6, 6);
7736 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7739 kvm_x86_ops->run(vcpu);
7742 * Do this here before restoring debug registers on the host. And
7743 * since we do this before handling the vmexit, a DR access vmexit
7744 * can (a) read the correct value of the debug registers, (b) set
7745 * KVM_DEBUGREG_WONT_EXIT again.
7747 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7748 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7749 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7750 kvm_update_dr0123(vcpu);
7751 kvm_update_dr6(vcpu);
7752 kvm_update_dr7(vcpu);
7753 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7757 * If the guest has used debug registers, at least dr7
7758 * will be disabled while returning to the host.
7759 * If we don't have active breakpoints in the host, we don't
7760 * care about the messed up debug address registers. But if
7761 * we have some of them active, restore the old state.
7763 if (hw_breakpoint_active())
7764 hw_breakpoint_restore();
7766 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7768 vcpu->mode = OUTSIDE_GUEST_MODE;
7771 kvm_put_guest_xcr0(vcpu);
7773 kvm_before_interrupt(vcpu);
7774 kvm_x86_ops->handle_external_intr(vcpu);
7775 kvm_after_interrupt(vcpu);
7779 guest_exit_irqoff();
7784 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7787 * Profile KVM exit RIPs:
7789 if (unlikely(prof_on == KVM_PROFILING)) {
7790 unsigned long rip = kvm_rip_read(vcpu);
7791 profile_hit(KVM_PROFILING, (void *)rip);
7794 if (unlikely(vcpu->arch.tsc_always_catchup))
7795 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7797 if (vcpu->arch.apic_attention)
7798 kvm_lapic_sync_from_vapic(vcpu);
7800 vcpu->arch.gpa_available = false;
7801 r = kvm_x86_ops->handle_exit(vcpu);
7805 kvm_x86_ops->cancel_injection(vcpu);
7806 if (unlikely(vcpu->arch.apic_attention))
7807 kvm_lapic_sync_from_vapic(vcpu);
7812 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7814 if (!kvm_arch_vcpu_runnable(vcpu) &&
7815 (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7816 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7817 kvm_vcpu_block(vcpu);
7818 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7820 if (kvm_x86_ops->post_block)
7821 kvm_x86_ops->post_block(vcpu);
7823 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7827 kvm_apic_accept_events(vcpu);
7828 switch(vcpu->arch.mp_state) {
7829 case KVM_MP_STATE_HALTED:
7830 vcpu->arch.pv.pv_unhalted = false;
7831 vcpu->arch.mp_state =
7832 KVM_MP_STATE_RUNNABLE;
7833 case KVM_MP_STATE_RUNNABLE:
7834 vcpu->arch.apf.halted = false;
7836 case KVM_MP_STATE_INIT_RECEIVED:
7845 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7847 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7848 kvm_x86_ops->check_nested_events(vcpu, false);
7850 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7851 !vcpu->arch.apf.halted);
7854 static int vcpu_run(struct kvm_vcpu *vcpu)
7857 struct kvm *kvm = vcpu->kvm;
7859 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7860 vcpu->arch.l1tf_flush_l1d = true;
7863 if (kvm_vcpu_running(vcpu)) {
7864 r = vcpu_enter_guest(vcpu);
7866 r = vcpu_block(kvm, vcpu);
7872 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7873 if (kvm_cpu_has_pending_timer(vcpu))
7874 kvm_inject_pending_timer_irqs(vcpu);
7876 if (dm_request_for_irq_injection(vcpu) &&
7877 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7879 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7880 ++vcpu->stat.request_irq_exits;
7884 kvm_check_async_pf_completion(vcpu);
7886 if (signal_pending(current)) {
7888 vcpu->run->exit_reason = KVM_EXIT_INTR;
7889 ++vcpu->stat.signal_exits;
7892 if (need_resched()) {
7893 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7895 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7899 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7904 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7907 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7908 r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7909 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7910 if (r != EMULATE_DONE)
7915 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7917 BUG_ON(!vcpu->arch.pio.count);
7919 return complete_emulated_io(vcpu);
7923 * Implements the following, as a state machine:
7927 * for each mmio piece in the fragment
7935 * for each mmio piece in the fragment
7940 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7942 struct kvm_run *run = vcpu->run;
7943 struct kvm_mmio_fragment *frag;
7946 BUG_ON(!vcpu->mmio_needed);
7948 /* Complete previous fragment */
7949 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7950 len = min(8u, frag->len);
7951 if (!vcpu->mmio_is_write)
7952 memcpy(frag->data, run->mmio.data, len);
7954 if (frag->len <= 8) {
7955 /* Switch to the next fragment. */
7957 vcpu->mmio_cur_fragment++;
7959 /* Go forward to the next mmio piece. */
7965 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7966 vcpu->mmio_needed = 0;
7968 /* FIXME: return into emulator if single-stepping. */
7969 if (vcpu->mmio_is_write)
7971 vcpu->mmio_read_completed = 1;
7972 return complete_emulated_io(vcpu);
7975 run->exit_reason = KVM_EXIT_MMIO;
7976 run->mmio.phys_addr = frag->gpa;
7977 if (vcpu->mmio_is_write)
7978 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7979 run->mmio.len = min(8u, frag->len);
7980 run->mmio.is_write = vcpu->mmio_is_write;
7981 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7985 /* Swap (qemu) user FPU context for the guest FPU context. */
7986 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7989 copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
7990 /* PKRU is separately restored in kvm_x86_ops->run. */
7991 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
7992 ~XFEATURE_MASK_PKRU);
7997 /* When vcpu_run ends, restore user space FPU context. */
7998 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8001 copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8002 copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8004 ++vcpu->stat.fpu_reload;
8008 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8013 kvm_sigset_activate(vcpu);
8014 kvm_load_guest_fpu(vcpu);
8016 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8017 if (kvm_run->immediate_exit) {
8021 kvm_vcpu_block(vcpu);
8022 kvm_apic_accept_events(vcpu);
8023 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8025 if (signal_pending(current)) {
8027 vcpu->run->exit_reason = KVM_EXIT_INTR;
8028 ++vcpu->stat.signal_exits;
8033 if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8038 if (vcpu->run->kvm_dirty_regs) {
8039 r = sync_regs(vcpu);
8044 /* re-sync apic's tpr */
8045 if (!lapic_in_kernel(vcpu)) {
8046 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8052 if (unlikely(vcpu->arch.complete_userspace_io)) {
8053 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8054 vcpu->arch.complete_userspace_io = NULL;
8059 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8061 if (kvm_run->immediate_exit)
8067 kvm_put_guest_fpu(vcpu);
8068 if (vcpu->run->kvm_valid_regs)
8070 post_kvm_run_save(vcpu);
8071 kvm_sigset_deactivate(vcpu);
8077 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8079 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8081 * We are here if userspace calls get_regs() in the middle of
8082 * instruction emulation. Registers state needs to be copied
8083 * back from emulation context to vcpu. Userspace shouldn't do
8084 * that usually, but some bad designed PV devices (vmware
8085 * backdoor interface) need this to work
8087 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8088 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8090 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
8091 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
8092 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
8093 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
8094 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
8095 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
8096 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
8097 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
8098 #ifdef CONFIG_X86_64
8099 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
8100 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
8101 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
8102 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
8103 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
8104 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
8105 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
8106 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
8109 regs->rip = kvm_rip_read(vcpu);
8110 regs->rflags = kvm_get_rflags(vcpu);
8113 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8116 __get_regs(vcpu, regs);
8121 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8123 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8124 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8126 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
8127 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
8128 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
8129 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
8130 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
8131 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
8132 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
8133 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
8134 #ifdef CONFIG_X86_64
8135 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
8136 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
8137 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
8138 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
8139 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
8140 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
8141 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
8142 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
8145 kvm_rip_write(vcpu, regs->rip);
8146 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8148 vcpu->arch.exception.pending = false;
8150 kvm_make_request(KVM_REQ_EVENT, vcpu);
8153 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8156 __set_regs(vcpu, regs);
8161 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8163 struct kvm_segment cs;
8165 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8169 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8171 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8175 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8176 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8177 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8178 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8179 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8180 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8182 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8183 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8185 kvm_x86_ops->get_idt(vcpu, &dt);
8186 sregs->idt.limit = dt.size;
8187 sregs->idt.base = dt.address;
8188 kvm_x86_ops->get_gdt(vcpu, &dt);
8189 sregs->gdt.limit = dt.size;
8190 sregs->gdt.base = dt.address;
8192 sregs->cr0 = kvm_read_cr0(vcpu);
8193 sregs->cr2 = vcpu->arch.cr2;
8194 sregs->cr3 = kvm_read_cr3(vcpu);
8195 sregs->cr4 = kvm_read_cr4(vcpu);
8196 sregs->cr8 = kvm_get_cr8(vcpu);
8197 sregs->efer = vcpu->arch.efer;
8198 sregs->apic_base = kvm_get_apic_base(vcpu);
8200 memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8202 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8203 set_bit(vcpu->arch.interrupt.nr,
8204 (unsigned long *)sregs->interrupt_bitmap);
8207 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8208 struct kvm_sregs *sregs)
8211 __get_sregs(vcpu, sregs);
8216 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8217 struct kvm_mp_state *mp_state)
8221 kvm_apic_accept_events(vcpu);
8222 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8223 vcpu->arch.pv.pv_unhalted)
8224 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8226 mp_state->mp_state = vcpu->arch.mp_state;
8232 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8233 struct kvm_mp_state *mp_state)
8239 if (!lapic_in_kernel(vcpu) &&
8240 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8243 /* INITs are latched while in SMM */
8244 if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8245 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8246 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8249 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8250 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8251 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8253 vcpu->arch.mp_state = mp_state->mp_state;
8254 kvm_make_request(KVM_REQ_EVENT, vcpu);
8262 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8263 int reason, bool has_error_code, u32 error_code)
8265 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8268 init_emulate_ctxt(vcpu);
8270 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8271 has_error_code, error_code);
8274 return EMULATE_FAIL;
8276 kvm_rip_write(vcpu, ctxt->eip);
8277 kvm_set_rflags(vcpu, ctxt->eflags);
8278 kvm_make_request(KVM_REQ_EVENT, vcpu);
8279 return EMULATE_DONE;
8281 EXPORT_SYMBOL_GPL(kvm_task_switch);
8283 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8285 if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8286 (sregs->cr4 & X86_CR4_OSXSAVE))
8289 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8291 * When EFER.LME and CR0.PG are set, the processor is in
8292 * 64-bit mode (though maybe in a 32-bit code segment).
8293 * CR4.PAE and EFER.LMA must be set.
8295 if (!(sregs->cr4 & X86_CR4_PAE)
8296 || !(sregs->efer & EFER_LMA))
8300 * Not in 64-bit mode: EFER.LMA is clear and the code
8301 * segment cannot be 64-bit.
8303 if (sregs->efer & EFER_LMA || sregs->cs.l)
8310 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8312 struct msr_data apic_base_msr;
8313 int mmu_reset_needed = 0;
8314 int cpuid_update_needed = 0;
8315 int pending_vec, max_bits, idx;
8319 if (kvm_valid_sregs(vcpu, sregs))
8322 apic_base_msr.data = sregs->apic_base;
8323 apic_base_msr.host_initiated = true;
8324 if (kvm_set_apic_base(vcpu, &apic_base_msr))
8327 dt.size = sregs->idt.limit;
8328 dt.address = sregs->idt.base;
8329 kvm_x86_ops->set_idt(vcpu, &dt);
8330 dt.size = sregs->gdt.limit;
8331 dt.address = sregs->gdt.base;
8332 kvm_x86_ops->set_gdt(vcpu, &dt);
8334 vcpu->arch.cr2 = sregs->cr2;
8335 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8336 vcpu->arch.cr3 = sregs->cr3;
8337 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8339 kvm_set_cr8(vcpu, sregs->cr8);
8341 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8342 kvm_x86_ops->set_efer(vcpu, sregs->efer);
8344 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8345 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8346 vcpu->arch.cr0 = sregs->cr0;
8348 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8349 cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8350 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8351 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8352 if (cpuid_update_needed)
8353 kvm_update_cpuid(vcpu);
8355 idx = srcu_read_lock(&vcpu->kvm->srcu);
8356 if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu)) {
8357 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8358 mmu_reset_needed = 1;
8360 srcu_read_unlock(&vcpu->kvm->srcu, idx);
8362 if (mmu_reset_needed)
8363 kvm_mmu_reset_context(vcpu);
8365 max_bits = KVM_NR_INTERRUPTS;
8366 pending_vec = find_first_bit(
8367 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8368 if (pending_vec < max_bits) {
8369 kvm_queue_interrupt(vcpu, pending_vec, false);
8370 pr_debug("Set back pending irq %d\n", pending_vec);
8373 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8374 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8375 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8376 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8377 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8378 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8380 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8381 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8383 update_cr8_intercept(vcpu);
8385 /* Older userspace won't unhalt the vcpu on reset. */
8386 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8387 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8389 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8391 kvm_make_request(KVM_REQ_EVENT, vcpu);
8398 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8399 struct kvm_sregs *sregs)
8404 ret = __set_sregs(vcpu, sregs);
8409 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8410 struct kvm_guest_debug *dbg)
8412 unsigned long rflags;
8417 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8419 if (vcpu->arch.exception.pending)
8421 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8422 kvm_queue_exception(vcpu, DB_VECTOR);
8424 kvm_queue_exception(vcpu, BP_VECTOR);
8428 * Read rflags as long as potentially injected trace flags are still
8431 rflags = kvm_get_rflags(vcpu);
8433 vcpu->guest_debug = dbg->control;
8434 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8435 vcpu->guest_debug = 0;
8437 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8438 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8439 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8440 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8442 for (i = 0; i < KVM_NR_DB_REGS; i++)
8443 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8445 kvm_update_dr7(vcpu);
8447 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8448 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8449 get_segment_base(vcpu, VCPU_SREG_CS);
8452 * Trigger an rflags update that will inject or remove the trace
8455 kvm_set_rflags(vcpu, rflags);
8457 kvm_x86_ops->update_bp_intercept(vcpu);
8467 * Translate a guest virtual address to a guest physical address.
8469 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8470 struct kvm_translation *tr)
8472 unsigned long vaddr = tr->linear_address;
8478 idx = srcu_read_lock(&vcpu->kvm->srcu);
8479 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8480 srcu_read_unlock(&vcpu->kvm->srcu, idx);
8481 tr->physical_address = gpa;
8482 tr->valid = gpa != UNMAPPED_GVA;
8490 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8492 struct fxregs_state *fxsave;
8496 fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8497 memcpy(fpu->fpr, fxsave->st_space, 128);
8498 fpu->fcw = fxsave->cwd;
8499 fpu->fsw = fxsave->swd;
8500 fpu->ftwx = fxsave->twd;
8501 fpu->last_opcode = fxsave->fop;
8502 fpu->last_ip = fxsave->rip;
8503 fpu->last_dp = fxsave->rdp;
8504 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8510 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8512 struct fxregs_state *fxsave;
8516 fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8518 memcpy(fxsave->st_space, fpu->fpr, 128);
8519 fxsave->cwd = fpu->fcw;
8520 fxsave->swd = fpu->fsw;
8521 fxsave->twd = fpu->ftwx;
8522 fxsave->fop = fpu->last_opcode;
8523 fxsave->rip = fpu->last_ip;
8524 fxsave->rdp = fpu->last_dp;
8525 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8531 static void store_regs(struct kvm_vcpu *vcpu)
8533 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8535 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8536 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8538 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8539 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8541 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8542 kvm_vcpu_ioctl_x86_get_vcpu_events(
8543 vcpu, &vcpu->run->s.regs.events);
8546 static int sync_regs(struct kvm_vcpu *vcpu)
8548 if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8551 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8552 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8553 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8555 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8556 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8558 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8560 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8561 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8562 vcpu, &vcpu->run->s.regs.events))
8564 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8570 static void fx_init(struct kvm_vcpu *vcpu)
8572 fpstate_init(&vcpu->arch.guest_fpu.state);
8573 if (boot_cpu_has(X86_FEATURE_XSAVES))
8574 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8575 host_xcr0 | XSTATE_COMPACTION_ENABLED;
8578 * Ensure guest xcr0 is valid for loading
8580 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8582 vcpu->arch.cr0 |= X86_CR0_ET;
8585 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8587 void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8589 kvmclock_reset(vcpu);
8591 kvm_x86_ops->vcpu_free(vcpu);
8592 free_cpumask_var(wbinvd_dirty_mask);
8595 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8598 struct kvm_vcpu *vcpu;
8600 if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8601 printk_once(KERN_WARNING
8602 "kvm: SMP vm created on host with unstable TSC; "
8603 "guest TSC will not be reliable\n");
8605 vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8610 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8612 kvm_vcpu_mtrr_init(vcpu);
8614 kvm_vcpu_reset(vcpu, false);
8615 kvm_init_mmu(vcpu, false);
8620 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8622 struct msr_data msr;
8623 struct kvm *kvm = vcpu->kvm;
8625 kvm_hv_vcpu_postcreate(vcpu);
8627 if (mutex_lock_killable(&vcpu->mutex))
8631 msr.index = MSR_IA32_TSC;
8632 msr.host_initiated = true;
8633 kvm_write_tsc(vcpu, &msr);
8635 mutex_unlock(&vcpu->mutex);
8637 if (!kvmclock_periodic_sync)
8640 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8641 KVMCLOCK_SYNC_PERIOD);
8644 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8646 vcpu->arch.apf.msr_val = 0;
8649 kvm_mmu_unload(vcpu);
8652 kvm_x86_ops->vcpu_free(vcpu);
8655 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8657 kvm_lapic_reset(vcpu, init_event);
8659 vcpu->arch.hflags = 0;
8661 vcpu->arch.smi_pending = 0;
8662 vcpu->arch.smi_count = 0;
8663 atomic_set(&vcpu->arch.nmi_queued, 0);
8664 vcpu->arch.nmi_pending = 0;
8665 vcpu->arch.nmi_injected = false;
8666 kvm_clear_interrupt_queue(vcpu);
8667 kvm_clear_exception_queue(vcpu);
8668 vcpu->arch.exception.pending = false;
8670 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8671 kvm_update_dr0123(vcpu);
8672 vcpu->arch.dr6 = DR6_INIT;
8673 kvm_update_dr6(vcpu);
8674 vcpu->arch.dr7 = DR7_FIXED_1;
8675 kvm_update_dr7(vcpu);
8679 kvm_make_request(KVM_REQ_EVENT, vcpu);
8680 vcpu->arch.apf.msr_val = 0;
8681 vcpu->arch.st.msr_val = 0;
8683 kvmclock_reset(vcpu);
8685 kvm_clear_async_pf_completion_queue(vcpu);
8686 kvm_async_pf_hash_reset(vcpu);
8687 vcpu->arch.apf.halted = false;
8689 if (kvm_mpx_supported()) {
8690 void *mpx_state_buffer;
8693 * To avoid have the INIT path from kvm_apic_has_events() that be
8694 * called with loaded FPU and does not let userspace fix the state.
8697 kvm_put_guest_fpu(vcpu);
8698 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8699 XFEATURE_MASK_BNDREGS);
8700 if (mpx_state_buffer)
8701 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8702 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8703 XFEATURE_MASK_BNDCSR);
8704 if (mpx_state_buffer)
8705 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8707 kvm_load_guest_fpu(vcpu);
8711 kvm_pmu_reset(vcpu);
8712 vcpu->arch.smbase = 0x30000;
8714 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8715 vcpu->arch.msr_misc_features_enables = 0;
8717 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8720 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8721 vcpu->arch.regs_avail = ~0;
8722 vcpu->arch.regs_dirty = ~0;
8724 vcpu->arch.ia32_xss = 0;
8726 kvm_x86_ops->vcpu_reset(vcpu, init_event);
8729 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8731 struct kvm_segment cs;
8733 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8734 cs.selector = vector << 8;
8735 cs.base = vector << 12;
8736 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8737 kvm_rip_write(vcpu, 0);
8740 int kvm_arch_hardware_enable(void)
8743 struct kvm_vcpu *vcpu;
8748 bool stable, backwards_tsc = false;
8750 kvm_shared_msr_cpu_online();
8751 ret = kvm_x86_ops->hardware_enable();
8755 local_tsc = rdtsc();
8756 stable = !kvm_check_tsc_unstable();
8757 list_for_each_entry(kvm, &vm_list, vm_list) {
8758 kvm_for_each_vcpu(i, vcpu, kvm) {
8759 if (!stable && vcpu->cpu == smp_processor_id())
8760 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8761 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8762 backwards_tsc = true;
8763 if (vcpu->arch.last_host_tsc > max_tsc)
8764 max_tsc = vcpu->arch.last_host_tsc;
8770 * Sometimes, even reliable TSCs go backwards. This happens on
8771 * platforms that reset TSC during suspend or hibernate actions, but
8772 * maintain synchronization. We must compensate. Fortunately, we can
8773 * detect that condition here, which happens early in CPU bringup,
8774 * before any KVM threads can be running. Unfortunately, we can't
8775 * bring the TSCs fully up to date with real time, as we aren't yet far
8776 * enough into CPU bringup that we know how much real time has actually
8777 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8778 * variables that haven't been updated yet.
8780 * So we simply find the maximum observed TSC above, then record the
8781 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
8782 * the adjustment will be applied. Note that we accumulate
8783 * adjustments, in case multiple suspend cycles happen before some VCPU
8784 * gets a chance to run again. In the event that no KVM threads get a
8785 * chance to run, we will miss the entire elapsed period, as we'll have
8786 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8787 * loose cycle time. This isn't too big a deal, since the loss will be
8788 * uniform across all VCPUs (not to mention the scenario is extremely
8789 * unlikely). It is possible that a second hibernate recovery happens
8790 * much faster than a first, causing the observed TSC here to be
8791 * smaller; this would require additional padding adjustment, which is
8792 * why we set last_host_tsc to the local tsc observed here.
8794 * N.B. - this code below runs only on platforms with reliable TSC,
8795 * as that is the only way backwards_tsc is set above. Also note
8796 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8797 * have the same delta_cyc adjustment applied if backwards_tsc
8798 * is detected. Note further, this adjustment is only done once,
8799 * as we reset last_host_tsc on all VCPUs to stop this from being
8800 * called multiple times (one for each physical CPU bringup).
8802 * Platforms with unreliable TSCs don't have to deal with this, they
8803 * will be compensated by the logic in vcpu_load, which sets the TSC to
8804 * catchup mode. This will catchup all VCPUs to real time, but cannot
8805 * guarantee that they stay in perfect synchronization.
8807 if (backwards_tsc) {
8808 u64 delta_cyc = max_tsc - local_tsc;
8809 list_for_each_entry(kvm, &vm_list, vm_list) {
8810 kvm->arch.backwards_tsc_observed = true;
8811 kvm_for_each_vcpu(i, vcpu, kvm) {
8812 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8813 vcpu->arch.last_host_tsc = local_tsc;
8814 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8818 * We have to disable TSC offset matching.. if you were
8819 * booting a VM while issuing an S4 host suspend....
8820 * you may have some problem. Solving this issue is
8821 * left as an exercise to the reader.
8823 kvm->arch.last_tsc_nsec = 0;
8824 kvm->arch.last_tsc_write = 0;
8831 void kvm_arch_hardware_disable(void)
8833 kvm_x86_ops->hardware_disable();
8834 drop_user_return_notifiers();
8837 int kvm_arch_hardware_setup(void)
8841 r = kvm_x86_ops->hardware_setup();
8845 if (kvm_has_tsc_control) {
8847 * Make sure the user can only configure tsc_khz values that
8848 * fit into a signed integer.
8849 * A min value is not calculated because it will always
8850 * be 1 on all machines.
8852 u64 max = min(0x7fffffffULL,
8853 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8854 kvm_max_guest_tsc_khz = max;
8856 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8859 kvm_init_msr_list();
8863 void kvm_arch_hardware_unsetup(void)
8865 kvm_x86_ops->hardware_unsetup();
8868 void kvm_arch_check_processor_compat(void *rtn)
8870 kvm_x86_ops->check_processor_compatibility(rtn);
8873 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8875 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8877 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8879 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8881 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8884 struct static_key kvm_no_apic_vcpu __read_mostly;
8885 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8887 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8892 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8893 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8894 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8895 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8897 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8899 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8904 vcpu->arch.pio_data = page_address(page);
8906 kvm_set_tsc_khz(vcpu, max_tsc_khz);
8908 r = kvm_mmu_create(vcpu);
8910 goto fail_free_pio_data;
8912 if (irqchip_in_kernel(vcpu->kvm)) {
8913 r = kvm_create_lapic(vcpu);
8915 goto fail_mmu_destroy;
8917 static_key_slow_inc(&kvm_no_apic_vcpu);
8919 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8921 if (!vcpu->arch.mce_banks) {
8923 goto fail_free_lapic;
8925 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8927 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8929 goto fail_free_mce_banks;
8934 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8936 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8938 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8940 kvm_async_pf_hash_reset(vcpu);
8943 vcpu->arch.pending_external_vector = -1;
8944 vcpu->arch.preempted_in_kernel = false;
8946 kvm_hv_vcpu_init(vcpu);
8950 fail_free_mce_banks:
8951 kfree(vcpu->arch.mce_banks);
8953 kvm_free_lapic(vcpu);
8955 kvm_mmu_destroy(vcpu);
8957 free_page((unsigned long)vcpu->arch.pio_data);
8962 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8966 kvm_hv_vcpu_uninit(vcpu);
8967 kvm_pmu_destroy(vcpu);
8968 kfree(vcpu->arch.mce_banks);
8969 kvm_free_lapic(vcpu);
8970 idx = srcu_read_lock(&vcpu->kvm->srcu);
8971 kvm_mmu_destroy(vcpu);
8972 srcu_read_unlock(&vcpu->kvm->srcu, idx);
8973 free_page((unsigned long)vcpu->arch.pio_data);
8974 if (!lapic_in_kernel(vcpu))
8975 static_key_slow_dec(&kvm_no_apic_vcpu);
8978 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8980 vcpu->arch.l1tf_flush_l1d = true;
8981 kvm_x86_ops->sched_in(vcpu, cpu);
8984 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8989 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8990 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8991 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8992 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8993 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8995 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8996 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8997 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8998 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8999 &kvm->arch.irq_sources_bitmap);
9001 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9002 mutex_init(&kvm->arch.apic_map_lock);
9003 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9005 kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
9006 pvclock_update_vm_gtod_copy(kvm);
9008 kvm->arch.guest_can_read_msr_platform_info = true;
9010 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9011 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9013 kvm_hv_init_vm(kvm);
9014 kvm_page_track_init(kvm);
9015 kvm_mmu_init_vm(kvm);
9017 if (kvm_x86_ops->vm_init)
9018 return kvm_x86_ops->vm_init(kvm);
9023 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9026 kvm_mmu_unload(vcpu);
9030 static void kvm_free_vcpus(struct kvm *kvm)
9033 struct kvm_vcpu *vcpu;
9036 * Unpin any mmu pages first.
9038 kvm_for_each_vcpu(i, vcpu, kvm) {
9039 kvm_clear_async_pf_completion_queue(vcpu);
9040 kvm_unload_vcpu_mmu(vcpu);
9042 kvm_for_each_vcpu(i, vcpu, kvm)
9043 kvm_arch_vcpu_free(vcpu);
9045 mutex_lock(&kvm->lock);
9046 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9047 kvm->vcpus[i] = NULL;
9049 atomic_set(&kvm->online_vcpus, 0);
9050 mutex_unlock(&kvm->lock);
9053 void kvm_arch_sync_events(struct kvm *kvm)
9055 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9056 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9060 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9064 struct kvm_memslots *slots = kvm_memslots(kvm);
9065 struct kvm_memory_slot *slot, old;
9067 /* Called with kvm->slots_lock held. */
9068 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9071 slot = id_to_memslot(slots, id);
9077 * MAP_SHARED to prevent internal slot pages from being moved
9080 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9081 MAP_SHARED | MAP_ANONYMOUS, 0);
9082 if (IS_ERR((void *)hva))
9083 return PTR_ERR((void *)hva);
9092 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9093 struct kvm_userspace_memory_region m;
9095 m.slot = id | (i << 16);
9097 m.guest_phys_addr = gpa;
9098 m.userspace_addr = hva;
9099 m.memory_size = size;
9100 r = __kvm_set_memory_region(kvm, &m);
9106 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9110 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9112 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9116 mutex_lock(&kvm->slots_lock);
9117 r = __x86_set_memory_region(kvm, id, gpa, size);
9118 mutex_unlock(&kvm->slots_lock);
9122 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9124 void kvm_arch_destroy_vm(struct kvm *kvm)
9126 if (current->mm == kvm->mm) {
9128 * Free memory regions allocated on behalf of userspace,
9129 * unless the the memory map has changed due to process exit
9132 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9133 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9134 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9136 if (kvm_x86_ops->vm_destroy)
9137 kvm_x86_ops->vm_destroy(kvm);
9138 kvm_pic_destroy(kvm);
9139 kvm_ioapic_destroy(kvm);
9140 kvm_free_vcpus(kvm);
9141 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9142 kvm_mmu_uninit_vm(kvm);
9143 kvm_page_track_cleanup(kvm);
9144 kvm_hv_destroy_vm(kvm);
9147 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9148 struct kvm_memory_slot *dont)
9152 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9153 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9154 kvfree(free->arch.rmap[i]);
9155 free->arch.rmap[i] = NULL;
9160 if (!dont || free->arch.lpage_info[i - 1] !=
9161 dont->arch.lpage_info[i - 1]) {
9162 kvfree(free->arch.lpage_info[i - 1]);
9163 free->arch.lpage_info[i - 1] = NULL;
9167 kvm_page_track_free_memslot(free, dont);
9170 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9171 unsigned long npages)
9175 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9176 struct kvm_lpage_info *linfo;
9181 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9182 slot->base_gfn, level) + 1;
9184 slot->arch.rmap[i] =
9185 kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9187 if (!slot->arch.rmap[i])
9192 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL);
9196 slot->arch.lpage_info[i - 1] = linfo;
9198 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9199 linfo[0].disallow_lpage = 1;
9200 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9201 linfo[lpages - 1].disallow_lpage = 1;
9202 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9204 * If the gfn and userspace address are not aligned wrt each
9205 * other, or if explicitly asked to, disable large page
9206 * support for this slot
9208 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9209 !kvm_largepages_enabled()) {
9212 for (j = 0; j < lpages; ++j)
9213 linfo[j].disallow_lpage = 1;
9217 if (kvm_page_track_create_memslot(slot, npages))
9223 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9224 kvfree(slot->arch.rmap[i]);
9225 slot->arch.rmap[i] = NULL;
9229 kvfree(slot->arch.lpage_info[i - 1]);
9230 slot->arch.lpage_info[i - 1] = NULL;
9235 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
9238 * memslots->generation has been incremented.
9239 * mmio generation may have reached its maximum value.
9241 kvm_mmu_invalidate_mmio_sptes(kvm, slots);
9244 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9245 struct kvm_memory_slot *memslot,
9246 const struct kvm_userspace_memory_region *mem,
9247 enum kvm_mr_change change)
9252 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9253 struct kvm_memory_slot *new)
9255 /* Still write protect RO slot */
9256 if (new->flags & KVM_MEM_READONLY) {
9257 kvm_mmu_slot_remove_write_access(kvm, new);
9262 * Call kvm_x86_ops dirty logging hooks when they are valid.
9264 * kvm_x86_ops->slot_disable_log_dirty is called when:
9266 * - KVM_MR_CREATE with dirty logging is disabled
9267 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9269 * The reason is, in case of PML, we need to set D-bit for any slots
9270 * with dirty logging disabled in order to eliminate unnecessary GPA
9271 * logging in PML buffer (and potential PML buffer full VMEXT). This
9272 * guarantees leaving PML enabled during guest's lifetime won't have
9273 * any additonal overhead from PML when guest is running with dirty
9274 * logging disabled for memory slots.
9276 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9277 * to dirty logging mode.
9279 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9281 * In case of write protect:
9283 * Write protect all pages for dirty logging.
9285 * All the sptes including the large sptes which point to this
9286 * slot are set to readonly. We can not create any new large
9287 * spte on this slot until the end of the logging.
9289 * See the comments in fast_page_fault().
9291 if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9292 if (kvm_x86_ops->slot_enable_log_dirty)
9293 kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9295 kvm_mmu_slot_remove_write_access(kvm, new);
9297 if (kvm_x86_ops->slot_disable_log_dirty)
9298 kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9302 void kvm_arch_commit_memory_region(struct kvm *kvm,
9303 const struct kvm_userspace_memory_region *mem,
9304 const struct kvm_memory_slot *old,
9305 const struct kvm_memory_slot *new,
9306 enum kvm_mr_change change)
9308 int nr_mmu_pages = 0;
9310 if (!kvm->arch.n_requested_mmu_pages)
9311 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
9314 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
9317 * Dirty logging tracks sptes in 4k granularity, meaning that large
9318 * sptes have to be split. If live migration is successful, the guest
9319 * in the source machine will be destroyed and large sptes will be
9320 * created in the destination. However, if the guest continues to run
9321 * in the source machine (for example if live migration fails), small
9322 * sptes will remain around and cause bad performance.
9324 * Scan sptes if dirty logging has been stopped, dropping those
9325 * which can be collapsed into a single large-page spte. Later
9326 * page faults will create the large-page sptes.
9328 if ((change != KVM_MR_DELETE) &&
9329 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9330 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9331 kvm_mmu_zap_collapsible_sptes(kvm, new);
9334 * Set up write protection and/or dirty logging for the new slot.
9336 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9337 * been zapped so no dirty logging staff is needed for old slot. For
9338 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9339 * new and it's also covered when dealing with the new slot.
9341 * FIXME: const-ify all uses of struct kvm_memory_slot.
9343 if (change != KVM_MR_DELETE)
9344 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9347 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9349 kvm_mmu_invalidate_zap_all_pages(kvm);
9352 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9353 struct kvm_memory_slot *slot)
9355 kvm_page_track_flush_slot(kvm, slot);
9358 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9360 return (is_guest_mode(vcpu) &&
9361 kvm_x86_ops->guest_apic_has_interrupt &&
9362 kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9365 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9367 if (!list_empty_careful(&vcpu->async_pf.done))
9370 if (kvm_apic_has_events(vcpu))
9373 if (vcpu->arch.pv.pv_unhalted)
9376 if (vcpu->arch.exception.pending)
9379 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9380 (vcpu->arch.nmi_pending &&
9381 kvm_x86_ops->nmi_allowed(vcpu)))
9384 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9385 (vcpu->arch.smi_pending && !is_smm(vcpu)))
9388 if (kvm_arch_interrupt_allowed(vcpu) &&
9389 (kvm_cpu_has_interrupt(vcpu) ||
9390 kvm_guest_apic_has_interrupt(vcpu)))
9393 if (kvm_hv_has_stimer_pending(vcpu))
9399 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9401 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9404 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9406 return vcpu->arch.preempted_in_kernel;
9409 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9411 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9414 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9416 return kvm_x86_ops->interrupt_allowed(vcpu);
9419 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9421 if (is_64_bit_mode(vcpu))
9422 return kvm_rip_read(vcpu);
9423 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9424 kvm_rip_read(vcpu));
9426 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9428 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9430 return kvm_get_linear_rip(vcpu) == linear_rip;
9432 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9434 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9436 unsigned long rflags;
9438 rflags = kvm_x86_ops->get_rflags(vcpu);
9439 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9440 rflags &= ~X86_EFLAGS_TF;
9443 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9445 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9447 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9448 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9449 rflags |= X86_EFLAGS_TF;
9450 kvm_x86_ops->set_rflags(vcpu, rflags);
9453 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9455 __kvm_set_rflags(vcpu, rflags);
9456 kvm_make_request(KVM_REQ_EVENT, vcpu);
9458 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9460 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9464 if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9468 r = kvm_mmu_reload(vcpu);
9472 if (!vcpu->arch.mmu->direct_map &&
9473 work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9476 vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9479 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9481 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9484 static inline u32 kvm_async_pf_next_probe(u32 key)
9486 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9489 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9491 u32 key = kvm_async_pf_hash_fn(gfn);
9493 while (vcpu->arch.apf.gfns[key] != ~0)
9494 key = kvm_async_pf_next_probe(key);
9496 vcpu->arch.apf.gfns[key] = gfn;
9499 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9502 u32 key = kvm_async_pf_hash_fn(gfn);
9504 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9505 (vcpu->arch.apf.gfns[key] != gfn &&
9506 vcpu->arch.apf.gfns[key] != ~0); i++)
9507 key = kvm_async_pf_next_probe(key);
9512 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9514 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9517 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9521 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9523 vcpu->arch.apf.gfns[i] = ~0;
9525 j = kvm_async_pf_next_probe(j);
9526 if (vcpu->arch.apf.gfns[j] == ~0)
9528 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9530 * k lies cyclically in ]i,j]
9532 * |....j i.k.| or |.k..j i...|
9534 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9535 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9540 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9543 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9547 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9550 return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9554 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9555 struct kvm_async_pf *work)
9557 struct x86_exception fault;
9559 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9560 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9562 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9563 (vcpu->arch.apf.send_user_only &&
9564 kvm_x86_ops->get_cpl(vcpu) == 0))
9565 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9566 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9567 fault.vector = PF_VECTOR;
9568 fault.error_code_valid = true;
9569 fault.error_code = 0;
9570 fault.nested_page_fault = false;
9571 fault.address = work->arch.token;
9572 fault.async_page_fault = true;
9573 kvm_inject_page_fault(vcpu, &fault);
9577 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9578 struct kvm_async_pf *work)
9580 struct x86_exception fault;
9583 if (work->wakeup_all)
9584 work->arch.token = ~0; /* broadcast wakeup */
9586 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9587 trace_kvm_async_pf_ready(work->arch.token, work->gva);
9589 if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9590 !apf_get_user(vcpu, &val)) {
9591 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9592 vcpu->arch.exception.pending &&
9593 vcpu->arch.exception.nr == PF_VECTOR &&
9594 !apf_put_user(vcpu, 0)) {
9595 vcpu->arch.exception.injected = false;
9596 vcpu->arch.exception.pending = false;
9597 vcpu->arch.exception.nr = 0;
9598 vcpu->arch.exception.has_error_code = false;
9599 vcpu->arch.exception.error_code = 0;
9600 vcpu->arch.exception.has_payload = false;
9601 vcpu->arch.exception.payload = 0;
9602 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9603 fault.vector = PF_VECTOR;
9604 fault.error_code_valid = true;
9605 fault.error_code = 0;
9606 fault.nested_page_fault = false;
9607 fault.address = work->arch.token;
9608 fault.async_page_fault = true;
9609 kvm_inject_page_fault(vcpu, &fault);
9612 vcpu->arch.apf.halted = false;
9613 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9616 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9618 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9621 return kvm_can_do_async_pf(vcpu);
9624 void kvm_arch_start_assignment(struct kvm *kvm)
9626 atomic_inc(&kvm->arch.assigned_device_count);
9628 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9630 void kvm_arch_end_assignment(struct kvm *kvm)
9632 atomic_dec(&kvm->arch.assigned_device_count);
9634 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9636 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9638 return atomic_read(&kvm->arch.assigned_device_count);
9640 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9642 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9644 atomic_inc(&kvm->arch.noncoherent_dma_count);
9646 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9648 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9650 atomic_dec(&kvm->arch.noncoherent_dma_count);
9652 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9654 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9656 return atomic_read(&kvm->arch.noncoherent_dma_count);
9658 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9660 bool kvm_arch_has_irq_bypass(void)
9662 return kvm_x86_ops->update_pi_irte != NULL;
9665 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9666 struct irq_bypass_producer *prod)
9668 struct kvm_kernel_irqfd *irqfd =
9669 container_of(cons, struct kvm_kernel_irqfd, consumer);
9671 irqfd->producer = prod;
9673 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9674 prod->irq, irqfd->gsi, 1);
9677 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9678 struct irq_bypass_producer *prod)
9681 struct kvm_kernel_irqfd *irqfd =
9682 container_of(cons, struct kvm_kernel_irqfd, consumer);
9684 WARN_ON(irqfd->producer != prod);
9685 irqfd->producer = NULL;
9688 * When producer of consumer is unregistered, we change back to
9689 * remapped mode, so we can re-use the current implementation
9690 * when the irq is masked/disabled or the consumer side (KVM
9691 * int this case doesn't want to receive the interrupts.
9693 ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9695 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9696 " fails: %d\n", irqfd->consumer.token, ret);
9699 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9700 uint32_t guest_irq, bool set)
9702 if (!kvm_x86_ops->update_pi_irte)
9705 return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9708 bool kvm_vector_hashing_enabled(void)
9710 return vector_hashing;
9712 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9714 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9715 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9716 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9717 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9718 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9719 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9720 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9721 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9722 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9723 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9724 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9725 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9726 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9727 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9728 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9730 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9731 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9732 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);