arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 139 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 140 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 141
 142 static bool __read_mostly vector_hashing = true;
 143 module_param(vector_hashing, bool, S_IRUGO);
 144
 145 bool __read_mostly enable_vmware_backdoor = false;
 146 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 147 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 148
 149 static bool __read_mostly force_emulation_prefix = false;
 150 module_param(force_emulation_prefix, bool, S_IRUGO);
 151
 152 #define KVM_NR_SHARED_MSRS 16
 153
 154 struct kvm_shared_msrs_global {
 155         int nr;
 156         u32 msrs[KVM_NR_SHARED_MSRS];
 157 };
 158
 159 struct kvm_shared_msrs {
 160         struct user_return_notifier urn;
 161         bool registered;
 162         struct kvm_shared_msr_values {
 163                 u64 host;
 164                 u64 curr;
 165         } values[KVM_NR_SHARED_MSRS];
 166 };
 167
 168 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 169 static struct kvm_shared_msrs __percpu *shared_msrs;
 170
 171 struct kvm_stats_debugfs_item debugfs_entries[] = {
 172         { "pf_fixed", VCPU_STAT(pf_fixed) },
 173         { "pf_guest", VCPU_STAT(pf_guest) },
 174         { "tlb_flush", VCPU_STAT(tlb_flush) },
 175         { "invlpg", VCPU_STAT(invlpg) },
 176         { "exits", VCPU_STAT(exits) },
 177         { "io_exits", VCPU_STAT(io_exits) },
 178         { "mmio_exits", VCPU_STAT(mmio_exits) },
 179         { "signal_exits", VCPU_STAT(signal_exits) },
 180         { "irq_window", VCPU_STAT(irq_window_exits) },
 181         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 182         { "halt_exits", VCPU_STAT(halt_exits) },
 183         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 184         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 185         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 186         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 187         { "hypercalls", VCPU_STAT(hypercalls) },
 188         { "request_irq", VCPU_STAT(request_irq_exits) },
 189         { "irq_exits", VCPU_STAT(irq_exits) },
 190         { "host_state_reload", VCPU_STAT(host_state_reload) },
 191         { "fpu_reload", VCPU_STAT(fpu_reload) },
 192         { "insn_emulation", VCPU_STAT(insn_emulation) },
 193         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 194         { "irq_injections", VCPU_STAT(irq_injections) },
 195         { "nmi_injections", VCPU_STAT(nmi_injections) },
 196         { "req_event", VCPU_STAT(req_event) },
 197         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 198         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 199         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 200         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 201         { "mmu_flooded", VM_STAT(mmu_flooded) },
 202         { "mmu_recycled", VM_STAT(mmu_recycled) },
 203         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 204         { "mmu_unsync", VM_STAT(mmu_unsync) },
 205         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 206         { "largepages", VM_STAT(lpages) },
 207         { "max_mmu_page_hash_collisions",
 208                 VM_STAT(max_mmu_page_hash_collisions) },
 209         { NULL }
 210 };
 211
 212 u64 __read_mostly host_xcr0;
 213
 214 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 215
 216 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 217 {
 218         int i;
 219         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 220                 vcpu->arch.apf.gfns[i] = ~0;
 221 }
 222
 223 static void kvm_on_user_return(struct user_return_notifier *urn)
 224 {
 225         unsigned slot;
 226         struct kvm_shared_msrs *locals
 227                 = container_of(urn, struct kvm_shared_msrs, urn);
 228         struct kvm_shared_msr_values *values;
 229         unsigned long flags;
 230
 231         /*
 232          * Disabling irqs at this point since the following code could be
 233          * interrupted and executed through kvm_arch_hardware_disable()
 234          */
 235         local_irq_save(flags);
 236         if (locals->registered) {
 237                 locals->registered = false;
 238                 user_return_notifier_unregister(urn);
 239         }
 240         local_irq_restore(flags);
 241         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 242                 values = &locals->values[slot];
 243                 if (values->host != values->curr) {
 244                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 245                         values->curr = values->host;
 246                 }
 247         }
 248 }
 249
 250 static void shared_msr_update(unsigned slot, u32 msr)
 251 {
 252         u64 value;
 253         unsigned int cpu = smp_processor_id();
 254         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 255
 256         /* only read, and nobody should modify it at this time,
 257          * so don't need lock */
 258         if (slot >= shared_msrs_global.nr) {
 259                 printk(KERN_ERR "kvm: invalid MSR slot!");
 260                 return;
 261         }
 262         rdmsrl_safe(msr, &value);
 263         smsr->values[slot].host = value;
 264         smsr->values[slot].curr = value;
 265 }
 266
 267 void kvm_define_shared_msr(unsigned slot, u32 msr)
 268 {
 269         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 270         shared_msrs_global.msrs[slot] = msr;
 271         if (slot >= shared_msrs_global.nr)
 272                 shared_msrs_global.nr = slot + 1;
 273 }
 274 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 275
 276 static void kvm_shared_msr_cpu_online(void)
 277 {
 278         unsigned i;
 279
 280         for (i = 0; i < shared_msrs_global.nr; ++i)
 281                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 282 }
 283
 284 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 285 {
 286         unsigned int cpu = smp_processor_id();
 287         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 288         int err;
 289
 290         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 291                 return 0;
 292         smsr->values[slot].curr = value;
 293         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 294         if (err)
 295                 return 1;
 296
 297         if (!smsr->registered) {
 298                 smsr->urn.on_user_return = kvm_on_user_return;
 299                 user_return_notifier_register(&smsr->urn);
 300                 smsr->registered = true;
 301         }
 302         return 0;
 303 }
 304 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 305
 306 static void drop_user_return_notifiers(void)
 307 {
 308         unsigned int cpu = smp_processor_id();
 309         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 310
 311         if (smsr->registered)
 312                 kvm_on_user_return(&smsr->urn);
 313 }
 314
 315 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 316 {
 317         return vcpu->arch.apic_base;
 318 }
 319 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 320
 321 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 322 {
 323         u64 old_state = vcpu->arch.apic_base &
 324                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 325         u64 new_state = msr_info->data &
 326                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 327         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 328                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 329
 330         if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)
 331                 return 1;
 332         if (!msr_info->host_initiated &&
 333             ((new_state == MSR_IA32_APICBASE_ENABLE &&
 334               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 335              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 336               old_state == 0)))
 337                 return 1;
 338
 339         kvm_lapic_set_base(vcpu, msr_info->data);
 340         return 0;
 341 }
 342 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 343
 344 asmlinkage __visible void kvm_spurious_fault(void)
 345 {
 346         /* Fault while not rebooting.  We want the trace. */
 347         BUG();
 348 }
 349 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 350
 351 #define EXCPT_BENIGN            0
 352 #define EXCPT_CONTRIBUTORY      1
 353 #define EXCPT_PF                2
 354
 355 static int exception_class(int vector)
 356 {
 357         switch (vector) {
 358         case PF_VECTOR:
 359                 return EXCPT_PF;
 360         case DE_VECTOR:
 361         case TS_VECTOR:
 362         case NP_VECTOR:
 363         case SS_VECTOR:
 364         case GP_VECTOR:
 365                 return EXCPT_CONTRIBUTORY;
 366         default:
 367                 break;
 368         }
 369         return EXCPT_BENIGN;
 370 }
 371
 372 #define EXCPT_FAULT             0
 373 #define EXCPT_TRAP              1
 374 #define EXCPT_ABORT             2
 375 #define EXCPT_INTERRUPT         3
 376
 377 static int exception_type(int vector)
 378 {
 379         unsigned int mask;
 380
 381         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 382                 return EXCPT_INTERRUPT;
 383
 384         mask = 1 << vector;
 385
 386         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 387         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 388                 return EXCPT_TRAP;
 389
 390         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 391                 return EXCPT_ABORT;
 392
 393         /* Reserved exceptions will result in fault */
 394         return EXCPT_FAULT;
 395 }
 396
 397 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 398                 unsigned nr, bool has_error, u32 error_code,
 399                 bool reinject)
 400 {
 401         u32 prev_nr;
 402         int class1, class2;
 403
 404         kvm_make_request(KVM_REQ_EVENT, vcpu);
 405
 406         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 407         queue:
 408                 if (has_error && !is_protmode(vcpu))
 409                         has_error = false;
 410                 if (reinject) {
 411                         /*
 412                          * On vmentry, vcpu->arch.exception.pending is only
 413                          * true if an event injection was blocked by
 414                          * nested_run_pending.  In that case, however,
 415                          * vcpu_enter_guest requests an immediate exit,
 416                          * and the guest shouldn't proceed far enough to
 417                          * need reinjection.
 418                          */
 419                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 420                         vcpu->arch.exception.injected = true;
 421                 } else {
 422                         vcpu->arch.exception.pending = true;
 423                         vcpu->arch.exception.injected = false;
 424                 }
 425                 vcpu->arch.exception.has_error_code = has_error;
 426                 vcpu->arch.exception.nr = nr;
 427                 vcpu->arch.exception.error_code = error_code;
 428                 return;
 429         }
 430
 431         /* to check exception */
 432         prev_nr = vcpu->arch.exception.nr;
 433         if (prev_nr == DF_VECTOR) {
 434                 /* triple fault -> shutdown */
 435                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 436                 return;
 437         }
 438         class1 = exception_class(prev_nr);
 439         class2 = exception_class(nr);
 440         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 441                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 442                 /*
 443                  * Generate double fault per SDM Table 5-5.  Set
 444                  * exception.pending = true so that the double fault
 445                  * can trigger a nested vmexit.
 446                  */
 447                 vcpu->arch.exception.pending = true;
 448                 vcpu->arch.exception.injected = false;
 449                 vcpu->arch.exception.has_error_code = true;
 450                 vcpu->arch.exception.nr = DF_VECTOR;
 451                 vcpu->arch.exception.error_code = 0;
 452         } else
 453                 /* replace previous exception with a new one in a hope
 454                    that instruction re-execution will regenerate lost
 455                    exception */
 456                 goto queue;
 457 }
 458
 459 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 460 {
 461         kvm_multiple_exception(vcpu, nr, false, 0, false);
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 464
 465 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 466 {
 467         kvm_multiple_exception(vcpu, nr, false, 0, true);
 468 }
 469 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 470
 471 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 472 {
 473         if (err)
 474                 kvm_inject_gp(vcpu, 0);
 475         else
 476                 return kvm_skip_emulated_instruction(vcpu);
 477
 478         return 1;
 479 }
 480 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 481
 482 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 483 {
 484         ++vcpu->stat.pf_guest;
 485         vcpu->arch.exception.nested_apf =
 486                 is_guest_mode(vcpu) && fault->async_page_fault;
 487         if (vcpu->arch.exception.nested_apf)
 488                 vcpu->arch.apf.nested_apf_token = fault->address;
 489         else
 490                 vcpu->arch.cr2 = fault->address;
 491         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 492 }
 493 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 494
 495 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 496 {
 497         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 498                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 499         else
 500                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 501
 502         return fault->nested_page_fault;
 503 }
 504
 505 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 506 {
 507         atomic_inc(&vcpu->arch.nmi_queued);
 508         kvm_make_request(KVM_REQ_NMI, vcpu);
 509 }
 510 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 511
 512 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 513 {
 514         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 515 }
 516 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 517
 518 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 519 {
 520         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 521 }
 522 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 523
 524 /*
 525  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 526  * a #GP and return false.
 527  */
 528 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 529 {
 530         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 531                 return true;
 532         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 533         return false;
 534 }
 535 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 536
 537 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 538 {
 539         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 540                 return true;
 541
 542         kvm_queue_exception(vcpu, UD_VECTOR);
 543         return false;
 544 }
 545 EXPORT_SYMBOL_GPL(kvm_require_dr);
 546
 547 /*
 548  * This function will be used to read from the physical memory of the currently
 549  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 550  * can read from guest physical or from the guest's guest physical memory.
 551  */
 552 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 553                             gfn_t ngfn, void *data, int offset, int len,
 554                             u32 access)
 555 {
 556         struct x86_exception exception;
 557         gfn_t real_gfn;
 558         gpa_t ngpa;
 559
 560         ngpa     = gfn_to_gpa(ngfn);
 561         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 562         if (real_gfn == UNMAPPED_GVA)
 563                 return -EFAULT;
 564
 565         real_gfn = gpa_to_gfn(real_gfn);
 566
 567         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 568 }
 569 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 570
 571 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 572                                void *data, int offset, int len, u32 access)
 573 {
 574         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 575                                        data, offset, len, access);
 576 }
 577
 578 /*
 579  * Load the pae pdptrs.  Return true is they are all valid.
 580  */
 581 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 582 {
 583         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 584         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 585         int i;
 586         int ret;
 587         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 588
 589         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 590                                       offset * sizeof(u64), sizeof(pdpte),
 591                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 592         if (ret < 0) {
 593                 ret = 0;
 594                 goto out;
 595         }
 596         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 597                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 598                     (pdpte[i] &
 599                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 600                         ret = 0;
 601                         goto out;
 602                 }
 603         }
 604         ret = 1;
 605
 606         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 607         __set_bit(VCPU_EXREG_PDPTR,
 608                   (unsigned long *)&vcpu->arch.regs_avail);
 609         __set_bit(VCPU_EXREG_PDPTR,
 610                   (unsigned long *)&vcpu->arch.regs_dirty);
 611 out:
 612
 613         return ret;
 614 }
 615 EXPORT_SYMBOL_GPL(load_pdptrs);
 616
 617 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 618 {
 619         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 620         bool changed = true;
 621         int offset;
 622         gfn_t gfn;
 623         int r;
 624
 625         if (is_long_mode(vcpu) || !is_pae(vcpu))
 626                 return false;
 627
 628         if (!test_bit(VCPU_EXREG_PDPTR,
 629                       (unsigned long *)&vcpu->arch.regs_avail))
 630                 return true;
 631
 632         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 633         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 634         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 635                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 636         if (r < 0)
 637                 goto out;
 638         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 639 out:
 640
 641         return changed;
 642 }
 643 EXPORT_SYMBOL_GPL(pdptrs_changed);
 644
 645 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 646 {
 647         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 648         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 649
 650         cr0 |= X86_CR0_ET;
 651
 652 #ifdef CONFIG_X86_64
 653         if (cr0 & 0xffffffff00000000UL)
 654                 return 1;
 655 #endif
 656
 657         cr0 &= ~CR0_RESERVED_BITS;
 658
 659         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 660                 return 1;
 661
 662         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 663                 return 1;
 664
 665         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 666 #ifdef CONFIG_X86_64
 667                 if ((vcpu->arch.efer & EFER_LME)) {
 668                         int cs_db, cs_l;
 669
 670                         if (!is_pae(vcpu))
 671                                 return 1;
 672                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 673                         if (cs_l)
 674                                 return 1;
 675                 } else
 676 #endif
 677                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 678                                                  kvm_read_cr3(vcpu)))
 679                         return 1;
 680         }
 681
 682         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 683                 return 1;
 684
 685         kvm_x86_ops->set_cr0(vcpu, cr0);
 686
 687         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 688                 kvm_clear_async_pf_completion_queue(vcpu);
 689                 kvm_async_pf_hash_reset(vcpu);
 690         }
 691
 692         if ((cr0 ^ old_cr0) & update_bits)
 693                 kvm_mmu_reset_context(vcpu);
 694
 695         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 696             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 697             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 698                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 699
 700         return 0;
 701 }
 702 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 703
 704 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 705 {
 706         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 707 }
 708 EXPORT_SYMBOL_GPL(kvm_lmsw);
 709
 710 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 711 {
 712         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 713                         !vcpu->guest_xcr0_loaded) {
 714                 /* kvm_set_xcr() also depends on this */
 715                 if (vcpu->arch.xcr0 != host_xcr0)
 716                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 717                 vcpu->guest_xcr0_loaded = 1;
 718         }
 719 }
 720
 721 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 722 {
 723         if (vcpu->guest_xcr0_loaded) {
 724                 if (vcpu->arch.xcr0 != host_xcr0)
 725                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 726                 vcpu->guest_xcr0_loaded = 0;
 727         }
 728 }
 729
 730 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 731 {
 732         u64 xcr0 = xcr;
 733         u64 old_xcr0 = vcpu->arch.xcr0;
 734         u64 valid_bits;
 735
 736         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 737         if (index != XCR_XFEATURE_ENABLED_MASK)
 738                 return 1;
 739         if (!(xcr0 & XFEATURE_MASK_FP))
 740                 return 1;
 741         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 742                 return 1;
 743
 744         /*
 745          * Do not allow the guest to set bits that we do not support
 746          * saving.  However, xcr0 bit 0 is always set, even if the
 747          * emulated CPU does not support XSAVE (see fx_init).
 748          */
 749         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 750         if (xcr0 & ~valid_bits)
 751                 return 1;
 752
 753         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 754             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 755                 return 1;
 756
 757         if (xcr0 & XFEATURE_MASK_AVX512) {
 758                 if (!(xcr0 & XFEATURE_MASK_YMM))
 759                         return 1;
 760                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 761                         return 1;
 762         }
 763         vcpu->arch.xcr0 = xcr0;
 764
 765         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 766                 kvm_update_cpuid(vcpu);
 767         return 0;
 768 }
 769
 770 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 771 {
 772         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 773             __kvm_set_xcr(vcpu, index, xcr)) {
 774                 kvm_inject_gp(vcpu, 0);
 775                 return 1;
 776         }
 777         return 0;
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 780
 781 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 782 {
 783         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 784         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 785                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 786
 787         if (cr4 & CR4_RESERVED_BITS)
 788                 return 1;
 789
 790         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 791                 return 1;
 792
 793         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 794                 return 1;
 795
 796         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 797                 return 1;
 798
 799         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 800                 return 1;
 801
 802         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 803                 return 1;
 804
 805         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 806                 return 1;
 807
 808         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 809                 return 1;
 810
 811         if (is_long_mode(vcpu)) {
 812                 if (!(cr4 & X86_CR4_PAE))
 813                         return 1;
 814         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 815                    && ((cr4 ^ old_cr4) & pdptr_bits)
 816                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 817                                    kvm_read_cr3(vcpu)))
 818                 return 1;
 819
 820         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 821                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 822                         return 1;
 823
 824                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 825                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 826                         return 1;
 827         }
 828
 829         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 830                 return 1;
 831
 832         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 833             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 834                 kvm_mmu_reset_context(vcpu);
 835
 836         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 837                 kvm_update_cpuid(vcpu);
 838
 839         return 0;
 840 }
 841 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 842
 843 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 844 {
 845 #ifdef CONFIG_X86_64
 846         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 847
 848         if (pcid_enabled)
 849                 cr3 &= ~CR3_PCID_INVD;
 850 #endif
 851
 852         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 853                 kvm_mmu_sync_roots(vcpu);
 854                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 855                 return 0;
 856         }
 857
 858         if (is_long_mode(vcpu) &&
 859             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 62)))
 860                 return 1;
 861         else if (is_pae(vcpu) && is_paging(vcpu) &&
 862                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 863                 return 1;
 864
 865         vcpu->arch.cr3 = cr3;
 866         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 867         kvm_mmu_new_cr3(vcpu);
 868         return 0;
 869 }
 870 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 871
 872 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 873 {
 874         if (cr8 & CR8_RESERVED_BITS)
 875                 return 1;
 876         if (lapic_in_kernel(vcpu))
 877                 kvm_lapic_set_tpr(vcpu, cr8);
 878         else
 879                 vcpu->arch.cr8 = cr8;
 880         return 0;
 881 }
 882 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 883
 884 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 885 {
 886         if (lapic_in_kernel(vcpu))
 887                 return kvm_lapic_get_cr8(vcpu);
 888         else
 889                 return vcpu->arch.cr8;
 890 }
 891 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 892
 893 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 894 {
 895         int i;
 896
 897         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 898                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 899                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 900                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 901         }
 902 }
 903
 904 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 905 {
 906         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 907                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 908 }
 909
 910 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 911 {
 912         unsigned long dr7;
 913
 914         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 915                 dr7 = vcpu->arch.guest_debug_dr7;
 916         else
 917                 dr7 = vcpu->arch.dr7;
 918         kvm_x86_ops->set_dr7(vcpu, dr7);
 919         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 920         if (dr7 & DR7_BP_EN_MASK)
 921                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 922 }
 923
 924 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 925 {
 926         u64 fixed = DR6_FIXED_1;
 927
 928         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 929                 fixed |= DR6_RTM;
 930         return fixed;
 931 }
 932
 933 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 934 {
 935         switch (dr) {
 936         case 0 ... 3:
 937                 vcpu->arch.db[dr] = val;
 938                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 939                         vcpu->arch.eff_db[dr] = val;
 940                 break;
 941         case 4:
 942                 /* fall through */
 943         case 6:
 944                 if (val & 0xffffffff00000000ULL)
 945                         return -1; /* #GP */
 946                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 947                 kvm_update_dr6(vcpu);
 948                 break;
 949         case 5:
 950                 /* fall through */
 951         default: /* 7 */
 952                 if (val & 0xffffffff00000000ULL)
 953                         return -1; /* #GP */
 954                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 955                 kvm_update_dr7(vcpu);
 956                 break;
 957         }
 958
 959         return 0;
 960 }
 961
 962 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 963 {
 964         if (__kvm_set_dr(vcpu, dr, val)) {
 965                 kvm_inject_gp(vcpu, 0);
 966                 return 1;
 967         }
 968         return 0;
 969 }
 970 EXPORT_SYMBOL_GPL(kvm_set_dr);
 971
 972 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 973 {
 974         switch (dr) {
 975         case 0 ... 3:
 976                 *val = vcpu->arch.db[dr];
 977                 break;
 978         case 4:
 979                 /* fall through */
 980         case 6:
 981                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 982                         *val = vcpu->arch.dr6;
 983                 else
 984                         *val = kvm_x86_ops->get_dr6(vcpu);
 985                 break;
 986         case 5:
 987                 /* fall through */
 988         default: /* 7 */
 989                 *val = vcpu->arch.dr7;
 990                 break;
 991         }
 992         return 0;
 993 }
 994 EXPORT_SYMBOL_GPL(kvm_get_dr);
 995
 996 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 997 {
 998         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 999         u64 data;
1000         int err;
1001
1002         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1003         if (err)
1004                 return err;
1005         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
1006         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
1007         return err;
1008 }
1009 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1010
1011 /*
1012  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1013  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1014  *
1015  * This list is modified at module load time to reflect the
1016  * capabilities of the host cpu. This capabilities test skips MSRs that are
1017  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1018  * may depend on host virtualization features rather than host cpu features.
1019  */
1020
1021 static u32 msrs_to_save[] = {
1022         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1023         MSR_STAR,
1024 #ifdef CONFIG_X86_64
1025         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1026 #endif
1027         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1028         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1029         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1030 };
1031
1032 static unsigned num_msrs_to_save;
1033
1034 static u32 emulated_msrs[] = {
1035         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1036         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1037         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1038         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1039         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1040         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1041         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1042         HV_X64_MSR_RESET,
1043         HV_X64_MSR_VP_INDEX,
1044         HV_X64_MSR_VP_RUNTIME,
1045         HV_X64_MSR_SCONTROL,
1046         HV_X64_MSR_STIMER0_CONFIG,
1047         HV_X64_MSR_VP_ASSIST_PAGE,
1048         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1049         HV_X64_MSR_TSC_EMULATION_STATUS,
1050
1051         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1052         MSR_KVM_PV_EOI_EN,
1053
1054         MSR_IA32_TSC_ADJUST,
1055         MSR_IA32_TSCDEADLINE,
1056         MSR_IA32_MISC_ENABLE,
1057         MSR_IA32_MCG_STATUS,
1058         MSR_IA32_MCG_CTL,
1059         MSR_IA32_MCG_EXT_CTL,
1060         MSR_IA32_SMBASE,
1061         MSR_SMI_COUNT,
1062         MSR_PLATFORM_INFO,
1063         MSR_MISC_FEATURES_ENABLES,
1064         MSR_AMD64_VIRT_SPEC_CTRL,
1065 };
1066
1067 static unsigned num_emulated_msrs;
1068
1069 /*
1070  * List of msr numbers which are used to expose MSR-based features that
1071  * can be used by a hypervisor to validate requested CPU features.
1072  */
1073 static u32 msr_based_features[] = {
1074         MSR_IA32_VMX_BASIC,
1075         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1076         MSR_IA32_VMX_PINBASED_CTLS,
1077         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1078         MSR_IA32_VMX_PROCBASED_CTLS,
1079         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1080         MSR_IA32_VMX_EXIT_CTLS,
1081         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1082         MSR_IA32_VMX_ENTRY_CTLS,
1083         MSR_IA32_VMX_MISC,
1084         MSR_IA32_VMX_CR0_FIXED0,
1085         MSR_IA32_VMX_CR0_FIXED1,
1086         MSR_IA32_VMX_CR4_FIXED0,
1087         MSR_IA32_VMX_CR4_FIXED1,
1088         MSR_IA32_VMX_VMCS_ENUM,
1089         MSR_IA32_VMX_PROCBASED_CTLS2,
1090         MSR_IA32_VMX_EPT_VPID_CAP,
1091         MSR_IA32_VMX_VMFUNC,
1092
1093         MSR_F10H_DECFG,
1094         MSR_IA32_UCODE_REV,
1095         MSR_IA32_ARCH_CAPABILITIES,
1096 };
1097
1098 static unsigned int num_msr_based_features;
1099
1100 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1101 {
1102         switch (msr->index) {
1103         case MSR_IA32_UCODE_REV:
1104         case MSR_IA32_ARCH_CAPABILITIES:
1105                 rdmsrl_safe(msr->index, &msr->data);
1106                 break;
1107         default:
1108                 if (kvm_x86_ops->get_msr_feature(msr))
1109                         return 1;
1110         }
1111         return 0;
1112 }
1113
1114 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1115 {
1116         struct kvm_msr_entry msr;
1117         int r;
1118
1119         msr.index = index;
1120         r = kvm_get_msr_feature(&msr);
1121         if (r)
1122                 return r;
1123
1124         *data = msr.data;
1125
1126         return 0;
1127 }
1128
1129 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1130 {
1131         if (efer & efer_reserved_bits)
1132                 return false;
1133
1134         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1135                         return false;
1136
1137         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1138                         return false;
1139
1140         return true;
1141 }
1142 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1143
1144 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1145 {
1146         u64 old_efer = vcpu->arch.efer;
1147
1148         if (!kvm_valid_efer(vcpu, efer))
1149                 return 1;
1150
1151         if (is_paging(vcpu)
1152             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1153                 return 1;
1154
1155         efer &= ~EFER_LMA;
1156         efer |= vcpu->arch.efer & EFER_LMA;
1157
1158         kvm_x86_ops->set_efer(vcpu, efer);
1159
1160         /* Update reserved bits */
1161         if ((efer ^ old_efer) & EFER_NX)
1162                 kvm_mmu_reset_context(vcpu);
1163
1164         return 0;
1165 }
1166
1167 void kvm_enable_efer_bits(u64 mask)
1168 {
1169        efer_reserved_bits &= ~mask;
1170 }
1171 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1172
1173 /*
1174  * Writes msr value into into the appropriate "register".
1175  * Returns 0 on success, non-0 otherwise.
1176  * Assumes vcpu_load() was already called.
1177  */
1178 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1179 {
1180         switch (msr->index) {
1181         case MSR_FS_BASE:
1182         case MSR_GS_BASE:
1183         case MSR_KERNEL_GS_BASE:
1184         case MSR_CSTAR:
1185         case MSR_LSTAR:
1186                 if (is_noncanonical_address(msr->data, vcpu))
1187                         return 1;
1188                 break;
1189         case MSR_IA32_SYSENTER_EIP:
1190         case MSR_IA32_SYSENTER_ESP:
1191                 /*
1192                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1193                  * non-canonical address is written on Intel but not on
1194                  * AMD (which ignores the top 32-bits, because it does
1195                  * not implement 64-bit SYSENTER).
1196                  *
1197                  * 64-bit code should hence be able to write a non-canonical
1198                  * value on AMD.  Making the address canonical ensures that
1199                  * vmentry does not fail on Intel after writing a non-canonical
1200                  * value, and that something deterministic happens if the guest
1201                  * invokes 64-bit SYSENTER.
1202                  */
1203                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1204         }
1205         return kvm_x86_ops->set_msr(vcpu, msr);
1206 }
1207 EXPORT_SYMBOL_GPL(kvm_set_msr);
1208
1209 /*
1210  * Adapt set_msr() to msr_io()'s calling convention
1211  */
1212 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1213 {
1214         struct msr_data msr;
1215         int r;
1216
1217         msr.index = index;
1218         msr.host_initiated = true;
1219         r = kvm_get_msr(vcpu, &msr);
1220         if (r)
1221                 return r;
1222
1223         *data = msr.data;
1224         return 0;
1225 }
1226
1227 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1228 {
1229         struct msr_data msr;
1230
1231         msr.data = *data;
1232         msr.index = index;
1233         msr.host_initiated = true;
1234         return kvm_set_msr(vcpu, &msr);
1235 }
1236
1237 #ifdef CONFIG_X86_64
1238 struct pvclock_gtod_data {
1239         seqcount_t      seq;
1240
1241         struct { /* extract of a clocksource struct */
1242                 int vclock_mode;
1243                 u64     cycle_last;
1244                 u64     mask;
1245                 u32     mult;
1246                 u32     shift;
1247         } clock;
1248
1249         u64             boot_ns;
1250         u64             nsec_base;
1251         u64             wall_time_sec;
1252 };
1253
1254 static struct pvclock_gtod_data pvclock_gtod_data;
1255
1256 static void update_pvclock_gtod(struct timekeeper *tk)
1257 {
1258         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1259         u64 boot_ns;
1260
1261         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1262
1263         write_seqcount_begin(&vdata->seq);
1264
1265         /* copy pvclock gtod data */
1266         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1267         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1268         vdata->clock.mask               = tk->tkr_mono.mask;
1269         vdata->clock.mult               = tk->tkr_mono.mult;
1270         vdata->clock.shift              = tk->tkr_mono.shift;
1271
1272         vdata->boot_ns                  = boot_ns;
1273         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1274
1275         vdata->wall_time_sec            = tk->xtime_sec;
1276
1277         write_seqcount_end(&vdata->seq);
1278 }
1279 #endif
1280
1281 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1282 {
1283         /*
1284          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1285          * vcpu_enter_guest.  This function is only called from
1286          * the physical CPU that is running vcpu.
1287          */
1288         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1289 }
1290
1291 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1292 {
1293         int version;
1294         int r;
1295         struct pvclock_wall_clock wc;
1296         struct timespec64 boot;
1297
1298         if (!wall_clock)
1299                 return;
1300
1301         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1302         if (r)
1303                 return;
1304
1305         if (version & 1)
1306                 ++version;  /* first time write, random junk */
1307
1308         ++version;
1309
1310         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1311                 return;
1312
1313         /*
1314          * The guest calculates current wall clock time by adding
1315          * system time (updated by kvm_guest_time_update below) to the
1316          * wall clock specified here.  guest system time equals host
1317          * system time for us, thus we must fill in host boot time here.
1318          */
1319         getboottime64(&boot);
1320
1321         if (kvm->arch.kvmclock_offset) {
1322                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1323                 boot = timespec64_sub(boot, ts);
1324         }
1325         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1326         wc.nsec = boot.tv_nsec;
1327         wc.version = version;
1328
1329         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1330
1331         version++;
1332         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1333 }
1334
1335 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1336 {
1337         do_shl32_div32(dividend, divisor);
1338         return dividend;
1339 }
1340
1341 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1342                                s8 *pshift, u32 *pmultiplier)
1343 {
1344         uint64_t scaled64;
1345         int32_t  shift = 0;
1346         uint64_t tps64;
1347         uint32_t tps32;
1348
1349         tps64 = base_hz;
1350         scaled64 = scaled_hz;
1351         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1352                 tps64 >>= 1;
1353                 shift--;
1354         }
1355
1356         tps32 = (uint32_t)tps64;
1357         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1358                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1359                         scaled64 >>= 1;
1360                 else
1361                         tps32 <<= 1;
1362                 shift++;
1363         }
1364
1365         *pshift = shift;
1366         *pmultiplier = div_frac(scaled64, tps32);
1367
1368         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1369                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1370 }
1371
1372 #ifdef CONFIG_X86_64
1373 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1374 #endif
1375
1376 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1377 static unsigned long max_tsc_khz;
1378
1379 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1380 {
1381         u64 v = (u64)khz * (1000000 + ppm);
1382         do_div(v, 1000000);
1383         return v;
1384 }
1385
1386 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1387 {
1388         u64 ratio;
1389
1390         /* Guest TSC same frequency as host TSC? */
1391         if (!scale) {
1392                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1393                 return 0;
1394         }
1395
1396         /* TSC scaling supported? */
1397         if (!kvm_has_tsc_control) {
1398                 if (user_tsc_khz > tsc_khz) {
1399                         vcpu->arch.tsc_catchup = 1;
1400                         vcpu->arch.tsc_always_catchup = 1;
1401                         return 0;
1402                 } else {
1403                         WARN(1, "user requested TSC rate below hardware speed\n");
1404                         return -1;
1405                 }
1406         }
1407
1408         /* TSC scaling required  - calculate ratio */
1409         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1410                                 user_tsc_khz, tsc_khz);
1411
1412         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1413                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1414                           user_tsc_khz);
1415                 return -1;
1416         }
1417
1418         vcpu->arch.tsc_scaling_ratio = ratio;
1419         return 0;
1420 }
1421
1422 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1423 {
1424         u32 thresh_lo, thresh_hi;
1425         int use_scaling = 0;
1426
1427         /* tsc_khz can be zero if TSC calibration fails */
1428         if (user_tsc_khz == 0) {
1429                 /* set tsc_scaling_ratio to a safe value */
1430                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1431                 return -1;
1432         }
1433
1434         /* Compute a scale to convert nanoseconds in TSC cycles */
1435         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1436                            &vcpu->arch.virtual_tsc_shift,
1437                            &vcpu->arch.virtual_tsc_mult);
1438         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1439
1440         /*
1441          * Compute the variation in TSC rate which is acceptable
1442          * within the range of tolerance and decide if the
1443          * rate being applied is within that bounds of the hardware
1444          * rate.  If so, no scaling or compensation need be done.
1445          */
1446         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1447         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1448         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1449                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1450                 use_scaling = 1;
1451         }
1452         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1453 }
1454
1455 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1456 {
1457         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1458                                       vcpu->arch.virtual_tsc_mult,
1459                                       vcpu->arch.virtual_tsc_shift);
1460         tsc += vcpu->arch.this_tsc_write;
1461         return tsc;
1462 }
1463
1464 static inline int gtod_is_based_on_tsc(int mode)
1465 {
1466         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1467 }
1468
1469 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1470 {
1471 #ifdef CONFIG_X86_64
1472         bool vcpus_matched;
1473         struct kvm_arch *ka = &vcpu->kvm->arch;
1474         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1475
1476         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1477                          atomic_read(&vcpu->kvm->online_vcpus));
1478
1479         /*
1480          * Once the masterclock is enabled, always perform request in
1481          * order to update it.
1482          *
1483          * In order to enable masterclock, the host clocksource must be TSC
1484          * and the vcpus need to have matched TSCs.  When that happens,
1485          * perform request to enable masterclock.
1486          */
1487         if (ka->use_master_clock ||
1488             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1489                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1490
1491         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1492                             atomic_read(&vcpu->kvm->online_vcpus),
1493                             ka->use_master_clock, gtod->clock.vclock_mode);
1494 #endif
1495 }
1496
1497 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1498 {
1499         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1500         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1501 }
1502
1503 /*
1504  * Multiply tsc by a fixed point number represented by ratio.
1505  *
1506  * The most significant 64-N bits (mult) of ratio represent the
1507  * integral part of the fixed point number; the remaining N bits
1508  * (frac) represent the fractional part, ie. ratio represents a fixed
1509  * point number (mult + frac * 2^(-N)).
1510  *
1511  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1512  */
1513 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1514 {
1515         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1516 }
1517
1518 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1519 {
1520         u64 _tsc = tsc;
1521         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1522
1523         if (ratio != kvm_default_tsc_scaling_ratio)
1524                 _tsc = __scale_tsc(ratio, tsc);
1525
1526         return _tsc;
1527 }
1528 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1529
1530 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1531 {
1532         u64 tsc;
1533
1534         tsc = kvm_scale_tsc(vcpu, rdtsc());
1535
1536         return target_tsc - tsc;
1537 }
1538
1539 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1540 {
1541         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1542
1543         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1544 }
1545 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1546
1547 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1548 {
1549         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1550         vcpu->arch.tsc_offset = offset;
1551 }
1552
1553 static inline bool kvm_check_tsc_unstable(void)
1554 {
1555 #ifdef CONFIG_X86_64
1556         /*
1557          * TSC is marked unstable when we're running on Hyper-V,
1558          * 'TSC page' clocksource is good.
1559          */
1560         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1561                 return false;
1562 #endif
1563         return check_tsc_unstable();
1564 }
1565
1566 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1567 {
1568         struct kvm *kvm = vcpu->kvm;
1569         u64 offset, ns, elapsed;
1570         unsigned long flags;
1571         bool matched;
1572         bool already_matched;
1573         u64 data = msr->data;
1574         bool synchronizing = false;
1575
1576         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1577         offset = kvm_compute_tsc_offset(vcpu, data);
1578         ns = ktime_get_boot_ns();
1579         elapsed = ns - kvm->arch.last_tsc_nsec;
1580
1581         if (vcpu->arch.virtual_tsc_khz) {
1582                 if (data == 0 && msr->host_initiated) {
1583                         /*
1584                          * detection of vcpu initialization -- need to sync
1585                          * with other vCPUs. This particularly helps to keep
1586                          * kvm_clock stable after CPU hotplug
1587                          */
1588                         synchronizing = true;
1589                 } else {
1590                         u64 tsc_exp = kvm->arch.last_tsc_write +
1591                                                 nsec_to_cycles(vcpu, elapsed);
1592                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1593                         /*
1594                          * Special case: TSC write with a small delta (1 second)
1595                          * of virtual cycle time against real time is
1596                          * interpreted as an attempt to synchronize the CPU.
1597                          */
1598                         synchronizing = data < tsc_exp + tsc_hz &&
1599                                         data + tsc_hz > tsc_exp;
1600                 }
1601         }
1602
1603         /*
1604          * For a reliable TSC, we can match TSC offsets, and for an unstable
1605          * TSC, we add elapsed time in this computation.  We could let the
1606          * compensation code attempt to catch up if we fall behind, but
1607          * it's better to try to match offsets from the beginning.
1608          */
1609         if (synchronizing &&
1610             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1611                 if (!kvm_check_tsc_unstable()) {
1612                         offset = kvm->arch.cur_tsc_offset;
1613                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1614                 } else {
1615                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1616                         data += delta;
1617                         offset = kvm_compute_tsc_offset(vcpu, data);
1618                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1619                 }
1620                 matched = true;
1621                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1622         } else {
1623                 /*
1624                  * We split periods of matched TSC writes into generations.
1625                  * For each generation, we track the original measured
1626                  * nanosecond time, offset, and write, so if TSCs are in
1627                  * sync, we can match exact offset, and if not, we can match
1628                  * exact software computation in compute_guest_tsc()
1629                  *
1630                  * These values are tracked in kvm->arch.cur_xxx variables.
1631                  */
1632                 kvm->arch.cur_tsc_generation++;
1633                 kvm->arch.cur_tsc_nsec = ns;
1634                 kvm->arch.cur_tsc_write = data;
1635                 kvm->arch.cur_tsc_offset = offset;
1636                 matched = false;
1637                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1638                          kvm->arch.cur_tsc_generation, data);
1639         }
1640
1641         /*
1642          * We also track th most recent recorded KHZ, write and time to
1643          * allow the matching interval to be extended at each write.
1644          */
1645         kvm->arch.last_tsc_nsec = ns;
1646         kvm->arch.last_tsc_write = data;
1647         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1648
1649         vcpu->arch.last_guest_tsc = data;
1650
1651         /* Keep track of which generation this VCPU has synchronized to */
1652         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1653         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1654         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1655
1656         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1657                 update_ia32_tsc_adjust_msr(vcpu, offset);
1658
1659         kvm_vcpu_write_tsc_offset(vcpu, offset);
1660         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1661
1662         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1663         if (!matched) {
1664                 kvm->arch.nr_vcpus_matched_tsc = 0;
1665         } else if (!already_matched) {
1666                 kvm->arch.nr_vcpus_matched_tsc++;
1667         }
1668
1669         kvm_track_tsc_matching(vcpu);
1670         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1671 }
1672
1673 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1674
1675 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1676                                            s64 adjustment)
1677 {
1678         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1679 }
1680
1681 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1682 {
1683         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1684                 WARN_ON(adjustment < 0);
1685         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1686         adjust_tsc_offset_guest(vcpu, adjustment);
1687 }
1688
1689 #ifdef CONFIG_X86_64
1690
1691 static u64 read_tsc(void)
1692 {
1693         u64 ret = (u64)rdtsc_ordered();
1694         u64 last = pvclock_gtod_data.clock.cycle_last;
1695
1696         if (likely(ret >= last))
1697                 return ret;
1698
1699         /*
1700          * GCC likes to generate cmov here, but this branch is extremely
1701          * predictable (it's just a function of time and the likely is
1702          * very likely) and there's a data dependence, so force GCC
1703          * to generate a branch instead.  I don't barrier() because
1704          * we don't actually need a barrier, and if this function
1705          * ever gets inlined it will generate worse code.
1706          */
1707         asm volatile ("");
1708         return last;
1709 }
1710
1711 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1712 {
1713         long v;
1714         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1715         u64 tsc_pg_val;
1716
1717         switch (gtod->clock.vclock_mode) {
1718         case VCLOCK_HVCLOCK:
1719                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1720                                                   tsc_timestamp);
1721                 if (tsc_pg_val != U64_MAX) {
1722                         /* TSC page valid */
1723                         *mode = VCLOCK_HVCLOCK;
1724                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1725                                 gtod->clock.mask;
1726                 } else {
1727                         /* TSC page invalid */
1728                         *mode = VCLOCK_NONE;
1729                 }
1730                 break;
1731         case VCLOCK_TSC:
1732                 *mode = VCLOCK_TSC;
1733                 *tsc_timestamp = read_tsc();
1734                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1735                         gtod->clock.mask;
1736                 break;
1737         default:
1738                 *mode = VCLOCK_NONE;
1739         }
1740
1741         if (*mode == VCLOCK_NONE)
1742                 *tsc_timestamp = v = 0;
1743
1744         return v * gtod->clock.mult;
1745 }
1746
1747 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1748 {
1749         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1750         unsigned long seq;
1751         int mode;
1752         u64 ns;
1753
1754         do {
1755                 seq = read_seqcount_begin(&gtod->seq);
1756                 ns = gtod->nsec_base;
1757                 ns += vgettsc(tsc_timestamp, &mode);
1758                 ns >>= gtod->clock.shift;
1759                 ns += gtod->boot_ns;
1760         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1761         *t = ns;
1762
1763         return mode;
1764 }
1765
1766 static int do_realtime(struct timespec *ts, u64 *tsc_timestamp)
1767 {
1768         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1769         unsigned long seq;
1770         int mode;
1771         u64 ns;
1772
1773         do {
1774                 seq = read_seqcount_begin(&gtod->seq);
1775                 ts->tv_sec = gtod->wall_time_sec;
1776                 ns = gtod->nsec_base;
1777                 ns += vgettsc(tsc_timestamp, &mode);
1778                 ns >>= gtod->clock.shift;
1779         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1780
1781         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1782         ts->tv_nsec = ns;
1783
1784         return mode;
1785 }
1786
1787 /* returns true if host is using TSC based clocksource */
1788 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1789 {
1790         /* checked again under seqlock below */
1791         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1792                 return false;
1793
1794         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1795                                                       tsc_timestamp));
1796 }
1797
1798 /* returns true if host is using TSC based clocksource */
1799 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1800                                            u64 *tsc_timestamp)
1801 {
1802         /* checked again under seqlock below */
1803         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1804                 return false;
1805
1806         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1807 }
1808 #endif
1809
1810 /*
1811  *
1812  * Assuming a stable TSC across physical CPUS, and a stable TSC
1813  * across virtual CPUs, the following condition is possible.
1814  * Each numbered line represents an event visible to both
1815  * CPUs at the next numbered event.
1816  *
1817  * "timespecX" represents host monotonic time. "tscX" represents
1818  * RDTSC value.
1819  *
1820  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1821  *
1822  * 1.  read timespec0,tsc0
1823  * 2.                                   | timespec1 = timespec0 + N
1824  *                                      | tsc1 = tsc0 + M
1825  * 3. transition to guest               | transition to guest
1826  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1827  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1828  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1829  *
1830  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1831  *
1832  *      - ret0 < ret1
1833  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1834  *              ...
1835  *      - 0 < N - M => M < N
1836  *
1837  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1838  * always the case (the difference between two distinct xtime instances
1839  * might be smaller then the difference between corresponding TSC reads,
1840  * when updating guest vcpus pvclock areas).
1841  *
1842  * To avoid that problem, do not allow visibility of distinct
1843  * system_timestamp/tsc_timestamp values simultaneously: use a master
1844  * copy of host monotonic time values. Update that master copy
1845  * in lockstep.
1846  *
1847  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1848  *
1849  */
1850
1851 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1852 {
1853 #ifdef CONFIG_X86_64
1854         struct kvm_arch *ka = &kvm->arch;
1855         int vclock_mode;
1856         bool host_tsc_clocksource, vcpus_matched;
1857
1858         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1859                         atomic_read(&kvm->online_vcpus));
1860
1861         /*
1862          * If the host uses TSC clock, then passthrough TSC as stable
1863          * to the guest.
1864          */
1865         host_tsc_clocksource = kvm_get_time_and_clockread(
1866                                         &ka->master_kernel_ns,
1867                                         &ka->master_cycle_now);
1868
1869         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1870                                 && !ka->backwards_tsc_observed
1871                                 && !ka->boot_vcpu_runs_old_kvmclock;
1872
1873         if (ka->use_master_clock)
1874                 atomic_set(&kvm_guest_has_master_clock, 1);
1875
1876         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1877         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1878                                         vcpus_matched);
1879 #endif
1880 }
1881
1882 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1883 {
1884         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1885 }
1886
1887 static void kvm_gen_update_masterclock(struct kvm *kvm)
1888 {
1889 #ifdef CONFIG_X86_64
1890         int i;
1891         struct kvm_vcpu *vcpu;
1892         struct kvm_arch *ka = &kvm->arch;
1893
1894         spin_lock(&ka->pvclock_gtod_sync_lock);
1895         kvm_make_mclock_inprogress_request(kvm);
1896         /* no guest entries from this point */
1897         pvclock_update_vm_gtod_copy(kvm);
1898
1899         kvm_for_each_vcpu(i, vcpu, kvm)
1900                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1901
1902         /* guest entries allowed */
1903         kvm_for_each_vcpu(i, vcpu, kvm)
1904                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1905
1906         spin_unlock(&ka->pvclock_gtod_sync_lock);
1907 #endif
1908 }
1909
1910 u64 get_kvmclock_ns(struct kvm *kvm)
1911 {
1912         struct kvm_arch *ka = &kvm->arch;
1913         struct pvclock_vcpu_time_info hv_clock;
1914         u64 ret;
1915
1916         spin_lock(&ka->pvclock_gtod_sync_lock);
1917         if (!ka->use_master_clock) {
1918                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1919                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1920         }
1921
1922         hv_clock.tsc_timestamp = ka->master_cycle_now;
1923         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1924         spin_unlock(&ka->pvclock_gtod_sync_lock);
1925
1926         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1927         get_cpu();
1928
1929         if (__this_cpu_read(cpu_tsc_khz)) {
1930                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1931                                    &hv_clock.tsc_shift,
1932                                    &hv_clock.tsc_to_system_mul);
1933                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1934         } else
1935                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1936
1937         put_cpu();
1938
1939         return ret;
1940 }
1941
1942 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1943 {
1944         struct kvm_vcpu_arch *vcpu = &v->arch;
1945         struct pvclock_vcpu_time_info guest_hv_clock;
1946
1947         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1948                 &guest_hv_clock, sizeof(guest_hv_clock))))
1949                 return;
1950
1951         /* This VCPU is paused, but it's legal for a guest to read another
1952          * VCPU's kvmclock, so we really have to follow the specification where
1953          * it says that version is odd if data is being modified, and even after
1954          * it is consistent.
1955          *
1956          * Version field updates must be kept separate.  This is because
1957          * kvm_write_guest_cached might use a "rep movs" instruction, and
1958          * writes within a string instruction are weakly ordered.  So there
1959          * are three writes overall.
1960          *
1961          * As a small optimization, only write the version field in the first
1962          * and third write.  The vcpu->pv_time cache is still valid, because the
1963          * version field is the first in the struct.
1964          */
1965         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1966
1967         if (guest_hv_clock.version & 1)
1968                 ++guest_hv_clock.version;  /* first time write, random junk */
1969
1970         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1971         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1972                                 &vcpu->hv_clock,
1973                                 sizeof(vcpu->hv_clock.version));
1974
1975         smp_wmb();
1976
1977         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1978         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1979
1980         if (vcpu->pvclock_set_guest_stopped_request) {
1981                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1982                 vcpu->pvclock_set_guest_stopped_request = false;
1983         }
1984
1985         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1986
1987         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1988                                 &vcpu->hv_clock,
1989                                 sizeof(vcpu->hv_clock));
1990
1991         smp_wmb();
1992
1993         vcpu->hv_clock.version++;
1994         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1995                                 &vcpu->hv_clock,
1996                                 sizeof(vcpu->hv_clock.version));
1997 }
1998
1999 static int kvm_guest_time_update(struct kvm_vcpu *v)
2000 {
2001         unsigned long flags, tgt_tsc_khz;
2002         struct kvm_vcpu_arch *vcpu = &v->arch;
2003         struct kvm_arch *ka = &v->kvm->arch;
2004         s64 kernel_ns;
2005         u64 tsc_timestamp, host_tsc;
2006         u8 pvclock_flags;
2007         bool use_master_clock;
2008
2009         kernel_ns = 0;
2010         host_tsc = 0;
2011
2012         /*
2013          * If the host uses TSC clock, then passthrough TSC as stable
2014          * to the guest.
2015          */
2016         spin_lock(&ka->pvclock_gtod_sync_lock);
2017         use_master_clock = ka->use_master_clock;
2018         if (use_master_clock) {
2019                 host_tsc = ka->master_cycle_now;
2020                 kernel_ns = ka->master_kernel_ns;
2021         }
2022         spin_unlock(&ka->pvclock_gtod_sync_lock);
2023
2024         /* Keep irq disabled to prevent changes to the clock */
2025         local_irq_save(flags);
2026         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2027         if (unlikely(tgt_tsc_khz == 0)) {
2028                 local_irq_restore(flags);
2029                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2030                 return 1;
2031         }
2032         if (!use_master_clock) {
2033                 host_tsc = rdtsc();
2034                 kernel_ns = ktime_get_boot_ns();
2035         }
2036
2037         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2038
2039         /*
2040          * We may have to catch up the TSC to match elapsed wall clock
2041          * time for two reasons, even if kvmclock is used.
2042          *   1) CPU could have been running below the maximum TSC rate
2043          *   2) Broken TSC compensation resets the base at each VCPU
2044          *      entry to avoid unknown leaps of TSC even when running
2045          *      again on the same CPU.  This may cause apparent elapsed
2046          *      time to disappear, and the guest to stand still or run
2047          *      very slowly.
2048          */
2049         if (vcpu->tsc_catchup) {
2050                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2051                 if (tsc > tsc_timestamp) {
2052                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2053                         tsc_timestamp = tsc;
2054                 }
2055         }
2056
2057         local_irq_restore(flags);
2058
2059         /* With all the info we got, fill in the values */
2060
2061         if (kvm_has_tsc_control)
2062                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2063
2064         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2065                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2066                                    &vcpu->hv_clock.tsc_shift,
2067                                    &vcpu->hv_clock.tsc_to_system_mul);
2068                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2069         }
2070
2071         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2072         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2073         vcpu->last_guest_tsc = tsc_timestamp;
2074
2075         /* If the host uses TSC clocksource, then it is stable */
2076         pvclock_flags = 0;
2077         if (use_master_clock)
2078                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2079
2080         vcpu->hv_clock.flags = pvclock_flags;
2081
2082         if (vcpu->pv_time_enabled)
2083                 kvm_setup_pvclock_page(v);
2084         if (v == kvm_get_vcpu(v->kvm, 0))
2085                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2086         return 0;
2087 }
2088
2089 /*
2090  * kvmclock updates which are isolated to a given vcpu, such as
2091  * vcpu->cpu migration, should not allow system_timestamp from
2092  * the rest of the vcpus to remain static. Otherwise ntp frequency
2093  * correction applies to one vcpu's system_timestamp but not
2094  * the others.
2095  *
2096  * So in those cases, request a kvmclock update for all vcpus.
2097  * We need to rate-limit these requests though, as they can
2098  * considerably slow guests that have a large number of vcpus.
2099  * The time for a remote vcpu to update its kvmclock is bound
2100  * by the delay we use to rate-limit the updates.
2101  */
2102
2103 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2104
2105 static void kvmclock_update_fn(struct work_struct *work)
2106 {
2107         int i;
2108         struct delayed_work *dwork = to_delayed_work(work);
2109         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2110                                            kvmclock_update_work);
2111         struct kvm *kvm = container_of(ka, struct kvm, arch);
2112         struct kvm_vcpu *vcpu;
2113
2114         kvm_for_each_vcpu(i, vcpu, kvm) {
2115                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2116                 kvm_vcpu_kick(vcpu);
2117         }
2118 }
2119
2120 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2121 {
2122         struct kvm *kvm = v->kvm;
2123
2124         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2125         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2126                                         KVMCLOCK_UPDATE_DELAY);
2127 }
2128
2129 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2130
2131 static void kvmclock_sync_fn(struct work_struct *work)
2132 {
2133         struct delayed_work *dwork = to_delayed_work(work);
2134         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2135                                            kvmclock_sync_work);
2136         struct kvm *kvm = container_of(ka, struct kvm, arch);
2137
2138         if (!kvmclock_periodic_sync)
2139                 return;
2140
2141         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2142         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2143                                         KVMCLOCK_SYNC_PERIOD);
2144 }
2145
2146 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2147 {
2148         u64 mcg_cap = vcpu->arch.mcg_cap;
2149         unsigned bank_num = mcg_cap & 0xff;
2150         u32 msr = msr_info->index;
2151         u64 data = msr_info->data;
2152
2153         switch (msr) {
2154         case MSR_IA32_MCG_STATUS:
2155                 vcpu->arch.mcg_status = data;
2156                 break;
2157         case MSR_IA32_MCG_CTL:
2158                 if (!(mcg_cap & MCG_CTL_P))
2159                         return 1;
2160                 if (data != 0 && data != ~(u64)0)
2161                         return -1;
2162                 vcpu->arch.mcg_ctl = data;
2163                 break;
2164         default:
2165                 if (msr >= MSR_IA32_MC0_CTL &&
2166                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2167                         u32 offset = msr - MSR_IA32_MC0_CTL;
2168                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2169                          * some Linux kernels though clear bit 10 in bank 4 to
2170                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2171                          * this to avoid an uncatched #GP in the guest
2172                          */
2173                         if ((offset & 0x3) == 0 &&
2174                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2175                                 return -1;
2176                         if (!msr_info->host_initiated &&
2177                                 (offset & 0x3) == 1 && data != 0)
2178                                 return -1;
2179                         vcpu->arch.mce_banks[offset] = data;
2180                         break;
2181                 }
2182                 return 1;
2183         }
2184         return 0;
2185 }
2186
2187 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2188 {
2189         struct kvm *kvm = vcpu->kvm;
2190         int lm = is_long_mode(vcpu);
2191         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2192                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2193         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2194                 : kvm->arch.xen_hvm_config.blob_size_32;
2195         u32 page_num = data & ~PAGE_MASK;
2196         u64 page_addr = data & PAGE_MASK;
2197         u8 *page;
2198         int r;
2199
2200         r = -E2BIG;
2201         if (page_num >= blob_size)
2202                 goto out;
2203         r = -ENOMEM;
2204         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2205         if (IS_ERR(page)) {
2206                 r = PTR_ERR(page);
2207                 goto out;
2208         }
2209         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2210                 goto out_free;
2211         r = 0;
2212 out_free:
2213         kfree(page);
2214 out:
2215         return r;
2216 }
2217
2218 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2219 {
2220         gpa_t gpa = data & ~0x3f;
2221
2222         /* Bits 3:5 are reserved, Should be zero */
2223         if (data & 0x38)
2224                 return 1;
2225
2226         vcpu->arch.apf.msr_val = data;
2227
2228         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2229                 kvm_clear_async_pf_completion_queue(vcpu);
2230                 kvm_async_pf_hash_reset(vcpu);
2231                 return 0;
2232         }
2233
2234         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2235                                         sizeof(u32)))
2236                 return 1;
2237
2238         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2239         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2240         kvm_async_pf_wakeup_all(vcpu);
2241         return 0;
2242 }
2243
2244 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2245 {
2246         vcpu->arch.pv_time_enabled = false;
2247 }
2248
2249 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2250 {
2251         ++vcpu->stat.tlb_flush;
2252         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2253 }
2254
2255 static void record_steal_time(struct kvm_vcpu *vcpu)
2256 {
2257         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2258                 return;
2259
2260         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2261                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2262                 return;
2263
2264         /*
2265          * Doing a TLB flush here, on the guest's behalf, can avoid
2266          * expensive IPIs.
2267          */
2268         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2269                 kvm_vcpu_flush_tlb(vcpu, false);
2270
2271         if (vcpu->arch.st.steal.version & 1)
2272                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2273
2274         vcpu->arch.st.steal.version += 1;
2275
2276         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2277                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2278
2279         smp_wmb();
2280
2281         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2282                 vcpu->arch.st.last_steal;
2283         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2284
2285         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2286                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2287
2288         smp_wmb();
2289
2290         vcpu->arch.st.steal.version += 1;
2291
2292         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2293                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2294 }
2295
2296 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2297 {
2298         bool pr = false;
2299         u32 msr = msr_info->index;
2300         u64 data = msr_info->data;
2301
2302         switch (msr) {
2303         case MSR_AMD64_NB_CFG:
2304         case MSR_IA32_UCODE_WRITE:
2305         case MSR_VM_HSAVE_PA:
2306         case MSR_AMD64_PATCH_LOADER:
2307         case MSR_AMD64_BU_CFG2:
2308         case MSR_AMD64_DC_CFG:
2309                 break;
2310
2311         case MSR_IA32_UCODE_REV:
2312                 if (msr_info->host_initiated)
2313                         vcpu->arch.microcode_version = data;
2314                 break;
2315         case MSR_EFER:
2316                 return set_efer(vcpu, data);
2317         case MSR_K7_HWCR:
2318                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2319                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2320                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2321                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2322                 if (data != 0) {
2323                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2324                                     data);
2325                         return 1;
2326                 }
2327                 break;
2328         case MSR_FAM10H_MMIO_CONF_BASE:
2329                 if (data != 0) {
2330                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2331                                     "0x%llx\n", data);
2332                         return 1;
2333                 }
2334                 break;
2335         case MSR_IA32_DEBUGCTLMSR:
2336                 if (!data) {
2337                         /* We support the non-activated case already */
2338                         break;
2339                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2340                         /* Values other than LBR and BTF are vendor-specific,
2341                            thus reserved and should throw a #GP */
2342                         return 1;
2343                 }
2344                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2345                             __func__, data);
2346                 break;
2347         case 0x200 ... 0x2ff:
2348                 return kvm_mtrr_set_msr(vcpu, msr, data);
2349         case MSR_IA32_APICBASE:
2350                 return kvm_set_apic_base(vcpu, msr_info);
2351         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2352                 return kvm_x2apic_msr_write(vcpu, msr, data);
2353         case MSR_IA32_TSCDEADLINE:
2354                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2355                 break;
2356         case MSR_IA32_TSC_ADJUST:
2357                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2358                         if (!msr_info->host_initiated) {
2359                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2360                                 adjust_tsc_offset_guest(vcpu, adj);
2361                         }
2362                         vcpu->arch.ia32_tsc_adjust_msr = data;
2363                 }
2364                 break;
2365         case MSR_IA32_MISC_ENABLE:
2366                 vcpu->arch.ia32_misc_enable_msr = data;
2367                 break;
2368         case MSR_IA32_SMBASE:
2369                 if (!msr_info->host_initiated)
2370                         return 1;
2371                 vcpu->arch.smbase = data;
2372                 break;
2373         case MSR_IA32_TSC:
2374                 kvm_write_tsc(vcpu, msr_info);
2375                 break;
2376         case MSR_SMI_COUNT:
2377                 if (!msr_info->host_initiated)
2378                         return 1;
2379                 vcpu->arch.smi_count = data;
2380                 break;
2381         case MSR_KVM_WALL_CLOCK_NEW:
2382         case MSR_KVM_WALL_CLOCK:
2383                 vcpu->kvm->arch.wall_clock = data;
2384                 kvm_write_wall_clock(vcpu->kvm, data);
2385                 break;
2386         case MSR_KVM_SYSTEM_TIME_NEW:
2387         case MSR_KVM_SYSTEM_TIME: {
2388                 struct kvm_arch *ka = &vcpu->kvm->arch;
2389
2390                 kvmclock_reset(vcpu);
2391
2392                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2393                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2394
2395                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2396                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2397
2398                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2399                 }
2400
2401                 vcpu->arch.time = data;
2402                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2403
2404                 /* we verify if the enable bit is set... */
2405                 if (!(data & 1))
2406                         break;
2407
2408                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2409                      &vcpu->arch.pv_time, data & ~1ULL,
2410                      sizeof(struct pvclock_vcpu_time_info)))
2411                         vcpu->arch.pv_time_enabled = false;
2412                 else
2413                         vcpu->arch.pv_time_enabled = true;
2414
2415                 break;
2416         }
2417         case MSR_KVM_ASYNC_PF_EN:
2418                 if (kvm_pv_enable_async_pf(vcpu, data))
2419                         return 1;
2420                 break;
2421         case MSR_KVM_STEAL_TIME:
2422
2423                 if (unlikely(!sched_info_on()))
2424                         return 1;
2425
2426                 if (data & KVM_STEAL_RESERVED_MASK)
2427                         return 1;
2428
2429                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2430                                                 data & KVM_STEAL_VALID_BITS,
2431                                                 sizeof(struct kvm_steal_time)))
2432                         return 1;
2433
2434                 vcpu->arch.st.msr_val = data;
2435
2436                 if (!(data & KVM_MSR_ENABLED))
2437                         break;
2438
2439                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2440
2441                 break;
2442         case MSR_KVM_PV_EOI_EN:
2443                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2444                         return 1;
2445                 break;
2446
2447         case MSR_IA32_MCG_CTL:
2448         case MSR_IA32_MCG_STATUS:
2449         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2450                 return set_msr_mce(vcpu, msr_info);
2451
2452         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2453         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2454                 pr = true; /* fall through */
2455         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2456         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2457                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2458                         return kvm_pmu_set_msr(vcpu, msr_info);
2459
2460                 if (pr || data != 0)
2461                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2462                                     "0x%x data 0x%llx\n", msr, data);
2463                 break;
2464         case MSR_K7_CLK_CTL:
2465                 /*
2466                  * Ignore all writes to this no longer documented MSR.
2467                  * Writes are only relevant for old K7 processors,
2468                  * all pre-dating SVM, but a recommended workaround from
2469                  * AMD for these chips. It is possible to specify the
2470                  * affected processor models on the command line, hence
2471                  * the need to ignore the workaround.
2472                  */
2473                 break;
2474         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2475         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2476         case HV_X64_MSR_CRASH_CTL:
2477         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2478         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2479         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2480         case HV_X64_MSR_TSC_EMULATION_STATUS:
2481                 return kvm_hv_set_msr_common(vcpu, msr, data,
2482                                              msr_info->host_initiated);
2483         case MSR_IA32_BBL_CR_CTL3:
2484                 /* Drop writes to this legacy MSR -- see rdmsr
2485                  * counterpart for further detail.
2486                  */
2487                 if (report_ignored_msrs)
2488                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2489                                 msr, data);
2490                 break;
2491         case MSR_AMD64_OSVW_ID_LENGTH:
2492                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2493                         return 1;
2494                 vcpu->arch.osvw.length = data;
2495                 break;
2496         case MSR_AMD64_OSVW_STATUS:
2497                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2498                         return 1;
2499                 vcpu->arch.osvw.status = data;
2500                 break;
2501         case MSR_PLATFORM_INFO:
2502                 if (!msr_info->host_initiated ||
2503                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2504                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2505                      cpuid_fault_enabled(vcpu)))
2506                         return 1;
2507                 vcpu->arch.msr_platform_info = data;
2508                 break;
2509         case MSR_MISC_FEATURES_ENABLES:
2510                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2511                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2512                      !supports_cpuid_fault(vcpu)))
2513                         return 1;
2514                 vcpu->arch.msr_misc_features_enables = data;
2515                 break;
2516         default:
2517                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2518                         return xen_hvm_config(vcpu, data);
2519                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2520                         return kvm_pmu_set_msr(vcpu, msr_info);
2521                 if (!ignore_msrs) {
2522                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2523                                     msr, data);
2524                         return 1;
2525                 } else {
2526                         if (report_ignored_msrs)
2527                                 vcpu_unimpl(vcpu,
2528                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2529                                         msr, data);
2530                         break;
2531                 }
2532         }
2533         return 0;
2534 }
2535 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2536
2537
2538 /*
2539  * Reads an msr value (of 'msr_index') into 'pdata'.
2540  * Returns 0 on success, non-0 otherwise.
2541  * Assumes vcpu_load() was already called.
2542  */
2543 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2544 {
2545         return kvm_x86_ops->get_msr(vcpu, msr);
2546 }
2547 EXPORT_SYMBOL_GPL(kvm_get_msr);
2548
2549 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2550 {
2551         u64 data;
2552         u64 mcg_cap = vcpu->arch.mcg_cap;
2553         unsigned bank_num = mcg_cap & 0xff;
2554
2555         switch (msr) {
2556         case MSR_IA32_P5_MC_ADDR:
2557         case MSR_IA32_P5_MC_TYPE:
2558                 data = 0;
2559                 break;
2560         case MSR_IA32_MCG_CAP:
2561                 data = vcpu->arch.mcg_cap;
2562                 break;
2563         case MSR_IA32_MCG_CTL:
2564                 if (!(mcg_cap & MCG_CTL_P))
2565                         return 1;
2566                 data = vcpu->arch.mcg_ctl;
2567                 break;
2568         case MSR_IA32_MCG_STATUS:
2569                 data = vcpu->arch.mcg_status;
2570                 break;
2571         default:
2572                 if (msr >= MSR_IA32_MC0_CTL &&
2573                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2574                         u32 offset = msr - MSR_IA32_MC0_CTL;
2575                         data = vcpu->arch.mce_banks[offset];
2576                         break;
2577                 }
2578                 return 1;
2579         }
2580         *pdata = data;
2581         return 0;
2582 }
2583
2584 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2585 {
2586         switch (msr_info->index) {
2587         case MSR_IA32_PLATFORM_ID:
2588         case MSR_IA32_EBL_CR_POWERON:
2589         case MSR_IA32_DEBUGCTLMSR:
2590         case MSR_IA32_LASTBRANCHFROMIP:
2591         case MSR_IA32_LASTBRANCHTOIP:
2592         case MSR_IA32_LASTINTFROMIP:
2593         case MSR_IA32_LASTINTTOIP:
2594         case MSR_K8_SYSCFG:
2595         case MSR_K8_TSEG_ADDR:
2596         case MSR_K8_TSEG_MASK:
2597         case MSR_K7_HWCR:
2598         case MSR_VM_HSAVE_PA:
2599         case MSR_K8_INT_PENDING_MSG:
2600         case MSR_AMD64_NB_CFG:
2601         case MSR_FAM10H_MMIO_CONF_BASE:
2602         case MSR_AMD64_BU_CFG2:
2603         case MSR_IA32_PERF_CTL:
2604         case MSR_AMD64_DC_CFG:
2605                 msr_info->data = 0;
2606                 break;
2607         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2608         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2609         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2610         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2611         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2612                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2613                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2614                 msr_info->data = 0;
2615                 break;
2616         case MSR_IA32_UCODE_REV:
2617                 msr_info->data = vcpu->arch.microcode_version;
2618                 break;
2619         case MSR_IA32_TSC:
2620                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2621                 break;
2622         case MSR_MTRRcap:
2623         case 0x200 ... 0x2ff:
2624                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2625         case 0xcd: /* fsb frequency */
2626                 msr_info->data = 3;
2627                 break;
2628                 /*
2629                  * MSR_EBC_FREQUENCY_ID
2630                  * Conservative value valid for even the basic CPU models.
2631                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2632                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2633                  * and 266MHz for model 3, or 4. Set Core Clock
2634                  * Frequency to System Bus Frequency Ratio to 1 (bits
2635                  * 31:24) even though these are only valid for CPU
2636                  * models > 2, however guests may end up dividing or
2637                  * multiplying by zero otherwise.
2638                  */
2639         case MSR_EBC_FREQUENCY_ID:
2640                 msr_info->data = 1 << 24;
2641                 break;
2642         case MSR_IA32_APICBASE:
2643                 msr_info->data = kvm_get_apic_base(vcpu);
2644                 break;
2645         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2646                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2647                 break;
2648         case MSR_IA32_TSCDEADLINE:
2649                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2650                 break;
2651         case MSR_IA32_TSC_ADJUST:
2652                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2653                 break;
2654         case MSR_IA32_MISC_ENABLE:
2655                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2656                 break;
2657         case MSR_IA32_SMBASE:
2658                 if (!msr_info->host_initiated)
2659                         return 1;
2660                 msr_info->data = vcpu->arch.smbase;
2661                 break;
2662         case MSR_SMI_COUNT:
2663                 msr_info->data = vcpu->arch.smi_count;
2664                 break;
2665         case MSR_IA32_PERF_STATUS:
2666                 /* TSC increment by tick */
2667                 msr_info->data = 1000ULL;
2668                 /* CPU multiplier */
2669                 msr_info->data |= (((uint64_t)4ULL) << 40);
2670                 break;
2671         case MSR_EFER:
2672                 msr_info->data = vcpu->arch.efer;
2673                 break;
2674         case MSR_KVM_WALL_CLOCK:
2675         case MSR_KVM_WALL_CLOCK_NEW:
2676                 msr_info->data = vcpu->kvm->arch.wall_clock;
2677                 break;
2678         case MSR_KVM_SYSTEM_TIME:
2679         case MSR_KVM_SYSTEM_TIME_NEW:
2680                 msr_info->data = vcpu->arch.time;
2681                 break;
2682         case MSR_KVM_ASYNC_PF_EN:
2683                 msr_info->data = vcpu->arch.apf.msr_val;
2684                 break;
2685         case MSR_KVM_STEAL_TIME:
2686                 msr_info->data = vcpu->arch.st.msr_val;
2687                 break;
2688         case MSR_KVM_PV_EOI_EN:
2689                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2690                 break;
2691         case MSR_IA32_P5_MC_ADDR:
2692         case MSR_IA32_P5_MC_TYPE:
2693         case MSR_IA32_MCG_CAP:
2694         case MSR_IA32_MCG_CTL:
2695         case MSR_IA32_MCG_STATUS:
2696         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2697                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2698         case MSR_K7_CLK_CTL:
2699                 /*
2700                  * Provide expected ramp-up count for K7. All other
2701                  * are set to zero, indicating minimum divisors for
2702                  * every field.
2703                  *
2704                  * This prevents guest kernels on AMD host with CPU
2705                  * type 6, model 8 and higher from exploding due to
2706                  * the rdmsr failing.
2707                  */
2708                 msr_info->data = 0x20000000;
2709                 break;
2710         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2711         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2712         case HV_X64_MSR_CRASH_CTL:
2713         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2714         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2715         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2716         case HV_X64_MSR_TSC_EMULATION_STATUS:
2717                 return kvm_hv_get_msr_common(vcpu,
2718                                              msr_info->index, &msr_info->data);
2719                 break;
2720         case MSR_IA32_BBL_CR_CTL3:
2721                 /* This legacy MSR exists but isn't fully documented in current
2722                  * silicon.  It is however accessed by winxp in very narrow
2723                  * scenarios where it sets bit #19, itself documented as
2724                  * a "reserved" bit.  Best effort attempt to source coherent
2725                  * read data here should the balance of the register be
2726                  * interpreted by the guest:
2727                  *
2728                  * L2 cache control register 3: 64GB range, 256KB size,
2729                  * enabled, latency 0x1, configured
2730                  */
2731                 msr_info->data = 0xbe702111;
2732                 break;
2733         case MSR_AMD64_OSVW_ID_LENGTH:
2734                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2735                         return 1;
2736                 msr_info->data = vcpu->arch.osvw.length;
2737                 break;
2738         case MSR_AMD64_OSVW_STATUS:
2739                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2740                         return 1;
2741                 msr_info->data = vcpu->arch.osvw.status;
2742                 break;
2743         case MSR_PLATFORM_INFO:
2744                 msr_info->data = vcpu->arch.msr_platform_info;
2745                 break;
2746         case MSR_MISC_FEATURES_ENABLES:
2747                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2748                 break;
2749         default:
2750                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2751                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2752                 if (!ignore_msrs) {
2753                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2754                                                msr_info->index);
2755                         return 1;
2756                 } else {
2757                         if (report_ignored_msrs)
2758                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2759                                         msr_info->index);
2760                         msr_info->data = 0;
2761                 }
2762                 break;
2763         }
2764         return 0;
2765 }
2766 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2767
2768 /*
2769  * Read or write a bunch of msrs. All parameters are kernel addresses.
2770  *
2771  * @return number of msrs set successfully.
2772  */
2773 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2774                     struct kvm_msr_entry *entries,
2775                     int (*do_msr)(struct kvm_vcpu *vcpu,
2776                                   unsigned index, u64 *data))
2777 {
2778         int i;
2779
2780         for (i = 0; i < msrs->nmsrs; ++i)
2781                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2782                         break;
2783
2784         return i;
2785 }
2786
2787 /*
2788  * Read or write a bunch of msrs. Parameters are user addresses.
2789  *
2790  * @return number of msrs set successfully.
2791  */
2792 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2793                   int (*do_msr)(struct kvm_vcpu *vcpu,
2794                                 unsigned index, u64 *data),
2795                   int writeback)
2796 {
2797         struct kvm_msrs msrs;
2798         struct kvm_msr_entry *entries;
2799         int r, n;
2800         unsigned size;
2801
2802         r = -EFAULT;
2803         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2804                 goto out;
2805
2806         r = -E2BIG;
2807         if (msrs.nmsrs >= MAX_IO_MSRS)
2808                 goto out;
2809
2810         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2811         entries = memdup_user(user_msrs->entries, size);
2812         if (IS_ERR(entries)) {
2813                 r = PTR_ERR(entries);
2814                 goto out;
2815         }
2816
2817         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2818         if (r < 0)
2819                 goto out_free;
2820
2821         r = -EFAULT;
2822         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2823                 goto out_free;
2824
2825         r = n;
2826
2827 out_free:
2828         kfree(entries);
2829 out:
2830         return r;
2831 }
2832
2833 static inline bool kvm_can_mwait_in_guest(void)
2834 {
2835         return boot_cpu_has(X86_FEATURE_MWAIT) &&
2836                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
2837                 boot_cpu_has(X86_FEATURE_ARAT);
2838 }
2839
2840 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2841 {
2842         int r = 0;
2843
2844         switch (ext) {
2845         case KVM_CAP_IRQCHIP:
2846         case KVM_CAP_HLT:
2847         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2848         case KVM_CAP_SET_TSS_ADDR:
2849         case KVM_CAP_EXT_CPUID:
2850         case KVM_CAP_EXT_EMUL_CPUID:
2851         case KVM_CAP_CLOCKSOURCE:
2852         case KVM_CAP_PIT:
2853         case KVM_CAP_NOP_IO_DELAY:
2854         case KVM_CAP_MP_STATE:
2855         case KVM_CAP_SYNC_MMU:
2856         case KVM_CAP_USER_NMI:
2857         case KVM_CAP_REINJECT_CONTROL:
2858         case KVM_CAP_IRQ_INJECT_STATUS:
2859         case KVM_CAP_IOEVENTFD:
2860         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2861         case KVM_CAP_PIT2:
2862         case KVM_CAP_PIT_STATE2:
2863         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2864         case KVM_CAP_XEN_HVM:
2865         case KVM_CAP_VCPU_EVENTS:
2866         case KVM_CAP_HYPERV:
2867         case KVM_CAP_HYPERV_VAPIC:
2868         case KVM_CAP_HYPERV_SPIN:
2869         case KVM_CAP_HYPERV_SYNIC:
2870         case KVM_CAP_HYPERV_SYNIC2:
2871         case KVM_CAP_HYPERV_VP_INDEX:
2872         case KVM_CAP_HYPERV_EVENTFD:
2873         case KVM_CAP_PCI_SEGMENT:
2874         case KVM_CAP_DEBUGREGS:
2875         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2876         case KVM_CAP_XSAVE:
2877         case KVM_CAP_ASYNC_PF:
2878         case KVM_CAP_GET_TSC_KHZ:
2879         case KVM_CAP_KVMCLOCK_CTRL:
2880         case KVM_CAP_READONLY_MEM:
2881         case KVM_CAP_HYPERV_TIME:
2882         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2883         case KVM_CAP_TSC_DEADLINE_TIMER:
2884         case KVM_CAP_ENABLE_CAP_VM:
2885         case KVM_CAP_DISABLE_QUIRKS:
2886         case KVM_CAP_SET_BOOT_CPU_ID:
2887         case KVM_CAP_SPLIT_IRQCHIP:
2888         case KVM_CAP_IMMEDIATE_EXIT:
2889         case KVM_CAP_GET_MSR_FEATURES:
2890                 r = 1;
2891                 break;
2892         case KVM_CAP_SYNC_REGS:
2893                 r = KVM_SYNC_X86_VALID_FIELDS;
2894                 break;
2895         case KVM_CAP_ADJUST_CLOCK:
2896                 r = KVM_CLOCK_TSC_STABLE;
2897                 break;
2898         case KVM_CAP_X86_DISABLE_EXITS:
2899                 r |=  KVM_X86_DISABLE_EXITS_HTL | KVM_X86_DISABLE_EXITS_PAUSE;
2900                 if(kvm_can_mwait_in_guest())
2901                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
2902                 break;
2903         case KVM_CAP_X86_SMM:
2904                 /* SMBASE is usually relocated above 1M on modern chipsets,
2905                  * and SMM handlers might indeed rely on 4G segment limits,
2906                  * so do not report SMM to be available if real mode is
2907                  * emulated via vm86 mode.  Still, do not go to great lengths
2908                  * to avoid userspace's usage of the feature, because it is a
2909                  * fringe case that is not enabled except via specific settings
2910                  * of the module parameters.
2911                  */
2912                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
2913                 break;
2914         case KVM_CAP_VAPIC:
2915                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2916                 break;
2917         case KVM_CAP_NR_VCPUS:
2918                 r = KVM_SOFT_MAX_VCPUS;
2919                 break;
2920         case KVM_CAP_MAX_VCPUS:
2921                 r = KVM_MAX_VCPUS;
2922                 break;
2923         case KVM_CAP_NR_MEMSLOTS:
2924                 r = KVM_USER_MEM_SLOTS;
2925                 break;
2926         case KVM_CAP_PV_MMU:    /* obsolete */
2927                 r = 0;
2928                 break;
2929         case KVM_CAP_MCE:
2930                 r = KVM_MAX_MCE_BANKS;
2931                 break;
2932         case KVM_CAP_XCRS:
2933                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2934                 break;
2935         case KVM_CAP_TSC_CONTROL:
2936                 r = kvm_has_tsc_control;
2937                 break;
2938         case KVM_CAP_X2APIC_API:
2939                 r = KVM_X2APIC_API_VALID_FLAGS;
2940                 break;
2941         default:
2942                 break;
2943         }
2944         return r;
2945
2946 }
2947
2948 long kvm_arch_dev_ioctl(struct file *filp,
2949                         unsigned int ioctl, unsigned long arg)
2950 {
2951         void __user *argp = (void __user *)arg;
2952         long r;
2953
2954         switch (ioctl) {
2955         case KVM_GET_MSR_INDEX_LIST: {
2956                 struct kvm_msr_list __user *user_msr_list = argp;
2957                 struct kvm_msr_list msr_list;
2958                 unsigned n;
2959
2960                 r = -EFAULT;
2961                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2962                         goto out;
2963                 n = msr_list.nmsrs;
2964                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2965                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2966                         goto out;
2967                 r = -E2BIG;
2968                 if (n < msr_list.nmsrs)
2969                         goto out;
2970                 r = -EFAULT;
2971                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2972                                  num_msrs_to_save * sizeof(u32)))
2973                         goto out;
2974                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2975                                  &emulated_msrs,
2976                                  num_emulated_msrs * sizeof(u32)))
2977                         goto out;
2978                 r = 0;
2979                 break;
2980         }
2981         case KVM_GET_SUPPORTED_CPUID:
2982         case KVM_GET_EMULATED_CPUID: {
2983                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2984                 struct kvm_cpuid2 cpuid;
2985
2986                 r = -EFAULT;
2987                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2988                         goto out;
2989
2990                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2991                                             ioctl);
2992                 if (r)
2993                         goto out;
2994
2995                 r = -EFAULT;
2996                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2997                         goto out;
2998                 r = 0;
2999                 break;
3000         }
3001         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3002                 r = -EFAULT;
3003                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3004                                  sizeof(kvm_mce_cap_supported)))
3005                         goto out;
3006                 r = 0;
3007                 break;
3008         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3009                 struct kvm_msr_list __user *user_msr_list = argp;
3010                 struct kvm_msr_list msr_list;
3011                 unsigned int n;
3012
3013                 r = -EFAULT;
3014                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3015                         goto out;
3016                 n = msr_list.nmsrs;
3017                 msr_list.nmsrs = num_msr_based_features;
3018                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3019                         goto out;
3020                 r = -E2BIG;
3021                 if (n < msr_list.nmsrs)
3022                         goto out;
3023                 r = -EFAULT;
3024                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3025                                  num_msr_based_features * sizeof(u32)))
3026                         goto out;
3027                 r = 0;
3028                 break;
3029         }
3030         case KVM_GET_MSRS:
3031                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3032                 break;
3033         }
3034         default:
3035                 r = -EINVAL;
3036         }
3037 out:
3038         return r;
3039 }
3040
3041 static void wbinvd_ipi(void *garbage)
3042 {
3043         wbinvd();
3044 }
3045
3046 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3047 {
3048         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3049 }
3050
3051 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3052 {
3053         /* Address WBINVD may be executed by guest */
3054         if (need_emulate_wbinvd(vcpu)) {
3055                 if (kvm_x86_ops->has_wbinvd_exit())
3056                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3057                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3058                         smp_call_function_single(vcpu->cpu,
3059                                         wbinvd_ipi, NULL, 1);
3060         }
3061
3062         kvm_x86_ops->vcpu_load(vcpu, cpu);
3063
3064         /* Apply any externally detected TSC adjustments (due to suspend) */
3065         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3066                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3067                 vcpu->arch.tsc_offset_adjustment = 0;
3068                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3069         }
3070
3071         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3072                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3073                                 rdtsc() - vcpu->arch.last_host_tsc;
3074                 if (tsc_delta < 0)
3075                         mark_tsc_unstable("KVM discovered backwards TSC");
3076
3077                 if (kvm_check_tsc_unstable()) {
3078                         u64 offset = kvm_compute_tsc_offset(vcpu,
3079                                                 vcpu->arch.last_guest_tsc);
3080                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3081                         vcpu->arch.tsc_catchup = 1;
3082                 }
3083
3084                 if (kvm_lapic_hv_timer_in_use(vcpu))
3085                         kvm_lapic_restart_hv_timer(vcpu);
3086
3087                 /*
3088                  * On a host with synchronized TSC, there is no need to update
3089                  * kvmclock on vcpu->cpu migration
3090                  */
3091                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3092                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3093                 if (vcpu->cpu != cpu)
3094                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3095                 vcpu->cpu = cpu;
3096         }
3097
3098         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3099 }
3100
3101 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3102 {
3103         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3104                 return;
3105
3106         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3107
3108         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3109                         &vcpu->arch.st.steal.preempted,
3110                         offsetof(struct kvm_steal_time, preempted),
3111                         sizeof(vcpu->arch.st.steal.preempted));
3112 }
3113
3114 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3115 {
3116         int idx;
3117
3118         if (vcpu->preempted)
3119                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3120
3121         /*
3122          * Disable page faults because we're in atomic context here.
3123          * kvm_write_guest_offset_cached() would call might_fault()
3124          * that relies on pagefault_disable() to tell if there's a
3125          * bug. NOTE: the write to guest memory may not go through if
3126          * during postcopy live migration or if there's heavy guest
3127          * paging.
3128          */
3129         pagefault_disable();
3130         /*
3131          * kvm_memslots() will be called by
3132          * kvm_write_guest_offset_cached() so take the srcu lock.
3133          */
3134         idx = srcu_read_lock(&vcpu->kvm->srcu);
3135         kvm_steal_time_set_preempted(vcpu);
3136         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3137         pagefault_enable();
3138         kvm_x86_ops->vcpu_put(vcpu);
3139         vcpu->arch.last_host_tsc = rdtsc();
3140         /*
3141          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3142          * on every vmexit, but if not, we might have a stale dr6 from the
3143          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3144          */
3145         set_debugreg(0, 6);
3146 }
3147
3148 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3149                                     struct kvm_lapic_state *s)
3150 {
3151         if (vcpu->arch.apicv_active)
3152                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3153
3154         return kvm_apic_get_state(vcpu, s);
3155 }
3156
3157 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3158                                     struct kvm_lapic_state *s)
3159 {
3160         int r;
3161
3162         r = kvm_apic_set_state(vcpu, s);
3163         if (r)
3164                 return r;
3165         update_cr8_intercept(vcpu);
3166
3167         return 0;
3168 }
3169
3170 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3171 {
3172         return (!lapic_in_kernel(vcpu) ||
3173                 kvm_apic_accept_pic_intr(vcpu));
3174 }
3175
3176 /*
3177  * if userspace requested an interrupt window, check that the
3178  * interrupt window is open.
3179  *
3180  * No need to exit to userspace if we already have an interrupt queued.
3181  */
3182 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3183 {
3184         return kvm_arch_interrupt_allowed(vcpu) &&
3185                 !kvm_cpu_has_interrupt(vcpu) &&
3186                 !kvm_event_needs_reinjection(vcpu) &&
3187                 kvm_cpu_accept_dm_intr(vcpu);
3188 }
3189
3190 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3191                                     struct kvm_interrupt *irq)
3192 {
3193         if (irq->irq >= KVM_NR_INTERRUPTS)
3194                 return -EINVAL;
3195
3196         if (!irqchip_in_kernel(vcpu->kvm)) {
3197                 kvm_queue_interrupt(vcpu, irq->irq, false);
3198                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3199                 return 0;
3200         }
3201
3202         /*
3203          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3204          * fail for in-kernel 8259.
3205          */
3206         if (pic_in_kernel(vcpu->kvm))
3207                 return -ENXIO;
3208
3209         if (vcpu->arch.pending_external_vector != -1)
3210                 return -EEXIST;
3211
3212         vcpu->arch.pending_external_vector = irq->irq;
3213         kvm_make_request(KVM_REQ_EVENT, vcpu);
3214         return 0;
3215 }
3216
3217 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3218 {
3219         kvm_inject_nmi(vcpu);
3220
3221         return 0;
3222 }
3223
3224 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3225 {
3226         kvm_make_request(KVM_REQ_SMI, vcpu);
3227
3228         return 0;
3229 }
3230
3231 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3232                                            struct kvm_tpr_access_ctl *tac)
3233 {
3234         if (tac->flags)
3235                 return -EINVAL;
3236         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3237         return 0;
3238 }
3239
3240 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3241                                         u64 mcg_cap)
3242 {
3243         int r;
3244         unsigned bank_num = mcg_cap & 0xff, bank;
3245
3246         r = -EINVAL;
3247         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3248                 goto out;
3249         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3250                 goto out;
3251         r = 0;
3252         vcpu->arch.mcg_cap = mcg_cap;
3253         /* Init IA32_MCG_CTL to all 1s */
3254         if (mcg_cap & MCG_CTL_P)
3255                 vcpu->arch.mcg_ctl = ~(u64)0;
3256         /* Init IA32_MCi_CTL to all 1s */
3257         for (bank = 0; bank < bank_num; bank++)
3258                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3259
3260         if (kvm_x86_ops->setup_mce)
3261                 kvm_x86_ops->setup_mce(vcpu);
3262 out:
3263         return r;
3264 }
3265
3266 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3267                                       struct kvm_x86_mce *mce)
3268 {
3269         u64 mcg_cap = vcpu->arch.mcg_cap;
3270         unsigned bank_num = mcg_cap & 0xff;
3271         u64 *banks = vcpu->arch.mce_banks;
3272
3273         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3274                 return -EINVAL;
3275         /*
3276          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3277          * reporting is disabled
3278          */
3279         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3280             vcpu->arch.mcg_ctl != ~(u64)0)
3281                 return 0;
3282         banks += 4 * mce->bank;
3283         /*
3284          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3285          * reporting is disabled for the bank
3286          */
3287         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3288                 return 0;
3289         if (mce->status & MCI_STATUS_UC) {
3290                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3291                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3292                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3293                         return 0;
3294                 }
3295                 if (banks[1] & MCI_STATUS_VAL)
3296                         mce->status |= MCI_STATUS_OVER;
3297                 banks[2] = mce->addr;
3298                 banks[3] = mce->misc;
3299                 vcpu->arch.mcg_status = mce->mcg_status;
3300                 banks[1] = mce->status;
3301                 kvm_queue_exception(vcpu, MC_VECTOR);
3302         } else if (!(banks[1] & MCI_STATUS_VAL)
3303                    || !(banks[1] & MCI_STATUS_UC)) {
3304                 if (banks[1] & MCI_STATUS_VAL)
3305                         mce->status |= MCI_STATUS_OVER;
3306                 banks[2] = mce->addr;
3307                 banks[3] = mce->misc;
3308                 banks[1] = mce->status;
3309         } else
3310                 banks[1] |= MCI_STATUS_OVER;
3311         return 0;
3312 }
3313
3314 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3315                                                struct kvm_vcpu_events *events)
3316 {
3317         process_nmi(vcpu);
3318         /*
3319          * FIXME: pass injected and pending separately.  This is only
3320          * needed for nested virtualization, whose state cannot be
3321          * migrated yet.  For now we can combine them.
3322          */
3323         events->exception.injected =
3324                 (vcpu->arch.exception.pending ||
3325                  vcpu->arch.exception.injected) &&
3326                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3327         events->exception.nr = vcpu->arch.exception.nr;
3328         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3329         events->exception.pad = 0;
3330         events->exception.error_code = vcpu->arch.exception.error_code;
3331
3332         events->interrupt.injected =
3333                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3334         events->interrupt.nr = vcpu->arch.interrupt.nr;
3335         events->interrupt.soft = 0;
3336         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3337
3338         events->nmi.injected = vcpu->arch.nmi_injected;
3339         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3340         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3341         events->nmi.pad = 0;
3342
3343         events->sipi_vector = 0; /* never valid when reporting to user space */
3344
3345         events->smi.smm = is_smm(vcpu);
3346         events->smi.pending = vcpu->arch.smi_pending;
3347         events->smi.smm_inside_nmi =
3348                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3349         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3350
3351         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3352                          | KVM_VCPUEVENT_VALID_SHADOW
3353                          | KVM_VCPUEVENT_VALID_SMM);
3354         memset(&events->reserved, 0, sizeof(events->reserved));
3355 }
3356
3357 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3358
3359 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3360                                               struct kvm_vcpu_events *events)
3361 {
3362         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3363                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3364                               | KVM_VCPUEVENT_VALID_SHADOW
3365                               | KVM_VCPUEVENT_VALID_SMM))
3366                 return -EINVAL;
3367
3368         if (events->exception.injected &&
3369             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3370              is_guest_mode(vcpu)))
3371                 return -EINVAL;
3372
3373         /* INITs are latched while in SMM */
3374         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3375             (events->smi.smm || events->smi.pending) &&
3376             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3377                 return -EINVAL;
3378
3379         process_nmi(vcpu);
3380         vcpu->arch.exception.injected = false;
3381         vcpu->arch.exception.pending = events->exception.injected;
3382         vcpu->arch.exception.nr = events->exception.nr;
3383         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3384         vcpu->arch.exception.error_code = events->exception.error_code;
3385
3386         vcpu->arch.interrupt.injected = events->interrupt.injected;
3387         vcpu->arch.interrupt.nr = events->interrupt.nr;
3388         vcpu->arch.interrupt.soft = events->interrupt.soft;
3389         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3390                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3391                                                   events->interrupt.shadow);
3392
3393         vcpu->arch.nmi_injected = events->nmi.injected;
3394         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3395                 vcpu->arch.nmi_pending = events->nmi.pending;
3396         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3397
3398         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3399             lapic_in_kernel(vcpu))
3400                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3401
3402         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3403                 u32 hflags = vcpu->arch.hflags;
3404                 if (events->smi.smm)
3405                         hflags |= HF_SMM_MASK;
3406                 else
3407                         hflags &= ~HF_SMM_MASK;
3408                 kvm_set_hflags(vcpu, hflags);
3409
3410                 vcpu->arch.smi_pending = events->smi.pending;
3411
3412                 if (events->smi.smm) {
3413                         if (events->smi.smm_inside_nmi)
3414                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3415                         else
3416                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3417                         if (lapic_in_kernel(vcpu)) {
3418                                 if (events->smi.latched_init)
3419                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3420                                 else
3421                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3422                         }
3423                 }
3424         }
3425
3426         kvm_make_request(KVM_REQ_EVENT, vcpu);
3427
3428         return 0;
3429 }
3430
3431 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3432                                              struct kvm_debugregs *dbgregs)
3433 {
3434         unsigned long val;
3435
3436         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3437         kvm_get_dr(vcpu, 6, &val);
3438         dbgregs->dr6 = val;
3439         dbgregs->dr7 = vcpu->arch.dr7;
3440         dbgregs->flags = 0;
3441         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3442 }
3443
3444 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3445                                             struct kvm_debugregs *dbgregs)
3446 {
3447         if (dbgregs->flags)
3448                 return -EINVAL;
3449
3450         if (dbgregs->dr6 & ~0xffffffffull)
3451                 return -EINVAL;
3452         if (dbgregs->dr7 & ~0xffffffffull)
3453                 return -EINVAL;
3454
3455         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3456         kvm_update_dr0123(vcpu);
3457         vcpu->arch.dr6 = dbgregs->dr6;
3458         kvm_update_dr6(vcpu);
3459         vcpu->arch.dr7 = dbgregs->dr7;
3460         kvm_update_dr7(vcpu);
3461
3462         return 0;
3463 }
3464
3465 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3466
3467 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3468 {
3469         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3470         u64 xstate_bv = xsave->header.xfeatures;
3471         u64 valid;
3472
3473         /*
3474          * Copy legacy XSAVE area, to avoid complications with CPUID
3475          * leaves 0 and 1 in the loop below.
3476          */
3477         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3478
3479         /* Set XSTATE_BV */
3480         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3481         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3482
3483         /*
3484          * Copy each region from the possibly compacted offset to the
3485          * non-compacted offset.
3486          */
3487         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3488         while (valid) {
3489                 u64 feature = valid & -valid;
3490                 int index = fls64(feature) - 1;
3491                 void *src = get_xsave_addr(xsave, feature);
3492
3493                 if (src) {
3494                         u32 size, offset, ecx, edx;
3495                         cpuid_count(XSTATE_CPUID, index,
3496                                     &size, &offset, &ecx, &edx);
3497                         if (feature == XFEATURE_MASK_PKRU)
3498                                 memcpy(dest + offset, &vcpu->arch.pkru,
3499                                        sizeof(vcpu->arch.pkru));
3500                         else
3501                                 memcpy(dest + offset, src, size);
3502
3503                 }
3504
3505                 valid -= feature;
3506         }
3507 }
3508
3509 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3510 {
3511         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3512         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3513         u64 valid;
3514
3515         /*
3516          * Copy legacy XSAVE area, to avoid complications with CPUID
3517          * leaves 0 and 1 in the loop below.
3518          */
3519         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3520
3521         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3522         xsave->header.xfeatures = xstate_bv;
3523         if (boot_cpu_has(X86_FEATURE_XSAVES))
3524                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3525
3526         /*
3527          * Copy each region from the non-compacted offset to the
3528          * possibly compacted offset.
3529          */
3530         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3531         while (valid) {
3532                 u64 feature = valid & -valid;
3533                 int index = fls64(feature) - 1;
3534                 void *dest = get_xsave_addr(xsave, feature);
3535
3536                 if (dest) {
3537                         u32 size, offset, ecx, edx;
3538                         cpuid_count(XSTATE_CPUID, index,
3539                                     &size, &offset, &ecx, &edx);
3540                         if (feature == XFEATURE_MASK_PKRU)
3541                                 memcpy(&vcpu->arch.pkru, src + offset,
3542                                        sizeof(vcpu->arch.pkru));
3543                         else
3544                                 memcpy(dest, src + offset, size);
3545                 }
3546
3547                 valid -= feature;
3548         }
3549 }
3550
3551 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3552                                          struct kvm_xsave *guest_xsave)
3553 {
3554         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3555                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3556                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3557         } else {
3558                 memcpy(guest_xsave->region,
3559                         &vcpu->arch.guest_fpu.state.fxsave,
3560                         sizeof(struct fxregs_state));
3561                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3562                         XFEATURE_MASK_FPSSE;
3563         }
3564 }
3565
3566 #define XSAVE_MXCSR_OFFSET 24
3567
3568 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3569                                         struct kvm_xsave *guest_xsave)
3570 {
3571         u64 xstate_bv =
3572                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3573         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3574
3575         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3576                 /*
3577                  * Here we allow setting states that are not present in
3578                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3579                  * with old userspace.
3580                  */
3581                 if (xstate_bv & ~kvm_supported_xcr0() ||
3582                         mxcsr & ~mxcsr_feature_mask)
3583                         return -EINVAL;
3584                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3585         } else {
3586                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3587                         mxcsr & ~mxcsr_feature_mask)
3588                         return -EINVAL;
3589                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3590                         guest_xsave->region, sizeof(struct fxregs_state));
3591         }
3592         return 0;
3593 }
3594
3595 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3596                                         struct kvm_xcrs *guest_xcrs)
3597 {
3598         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3599                 guest_xcrs->nr_xcrs = 0;
3600                 return;
3601         }
3602
3603         guest_xcrs->nr_xcrs = 1;
3604         guest_xcrs->flags = 0;
3605         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3606         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3607 }
3608
3609 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3610                                        struct kvm_xcrs *guest_xcrs)
3611 {
3612         int i, r = 0;
3613
3614         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3615                 return -EINVAL;
3616
3617         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3618                 return -EINVAL;
3619
3620         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3621                 /* Only support XCR0 currently */
3622                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3623                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3624                                 guest_xcrs->xcrs[i].value);
3625                         break;
3626                 }
3627         if (r)
3628                 r = -EINVAL;
3629         return r;
3630 }
3631
3632 /*
3633  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3634  * stopped by the hypervisor.  This function will be called from the host only.
3635  * EINVAL is returned when the host attempts to set the flag for a guest that
3636  * does not support pv clocks.
3637  */
3638 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3639 {
3640         if (!vcpu->arch.pv_time_enabled)
3641                 return -EINVAL;
3642         vcpu->arch.pvclock_set_guest_stopped_request = true;
3643         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3644         return 0;
3645 }
3646
3647 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3648                                      struct kvm_enable_cap *cap)
3649 {
3650         if (cap->flags)
3651                 return -EINVAL;
3652
3653         switch (cap->cap) {
3654         case KVM_CAP_HYPERV_SYNIC2:
3655                 if (cap->args[0])
3656                         return -EINVAL;
3657         case KVM_CAP_HYPERV_SYNIC:
3658                 if (!irqchip_in_kernel(vcpu->kvm))
3659                         return -EINVAL;
3660                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3661                                              KVM_CAP_HYPERV_SYNIC2);
3662         default:
3663                 return -EINVAL;
3664         }
3665 }
3666
3667 long kvm_arch_vcpu_ioctl(struct file *filp,
3668                          unsigned int ioctl, unsigned long arg)
3669 {
3670         struct kvm_vcpu *vcpu = filp->private_data;
3671         void __user *argp = (void __user *)arg;
3672         int r;
3673         union {
3674                 struct kvm_lapic_state *lapic;
3675                 struct kvm_xsave *xsave;
3676                 struct kvm_xcrs *xcrs;
3677                 void *buffer;
3678         } u;
3679
3680         vcpu_load(vcpu);
3681
3682         u.buffer = NULL;
3683         switch (ioctl) {
3684         case KVM_GET_LAPIC: {
3685                 r = -EINVAL;
3686                 if (!lapic_in_kernel(vcpu))
3687                         goto out;
3688                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3689
3690                 r = -ENOMEM;
3691                 if (!u.lapic)
3692                         goto out;
3693                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3694                 if (r)
3695                         goto out;
3696                 r = -EFAULT;
3697                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3698                         goto out;
3699                 r = 0;
3700                 break;
3701         }
3702         case KVM_SET_LAPIC: {
3703                 r = -EINVAL;
3704                 if (!lapic_in_kernel(vcpu))
3705                         goto out;
3706                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3707                 if (IS_ERR(u.lapic)) {
3708                         r = PTR_ERR(u.lapic);
3709                         goto out_nofree;
3710                 }
3711
3712                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3713                 break;
3714         }
3715         case KVM_INTERRUPT: {
3716                 struct kvm_interrupt irq;
3717
3718                 r = -EFAULT;
3719                 if (copy_from_user(&irq, argp, sizeof irq))
3720                         goto out;
3721                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3722                 break;
3723         }
3724         case KVM_NMI: {
3725                 r = kvm_vcpu_ioctl_nmi(vcpu);
3726                 break;
3727         }
3728         case KVM_SMI: {
3729                 r = kvm_vcpu_ioctl_smi(vcpu);
3730                 break;
3731         }
3732         case KVM_SET_CPUID: {
3733                 struct kvm_cpuid __user *cpuid_arg = argp;
3734                 struct kvm_cpuid cpuid;
3735
3736                 r = -EFAULT;
3737                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3738                         goto out;
3739                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3740                 break;
3741         }
3742         case KVM_SET_CPUID2: {
3743                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3744                 struct kvm_cpuid2 cpuid;
3745
3746                 r = -EFAULT;
3747                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3748                         goto out;
3749                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3750                                               cpuid_arg->entries);
3751                 break;
3752         }
3753         case KVM_GET_CPUID2: {
3754                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3755                 struct kvm_cpuid2 cpuid;
3756
3757                 r = -EFAULT;
3758                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3759                         goto out;
3760                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3761                                               cpuid_arg->entries);
3762                 if (r)
3763                         goto out;
3764                 r = -EFAULT;
3765                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3766                         goto out;
3767                 r = 0;
3768                 break;
3769         }
3770         case KVM_GET_MSRS: {
3771                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3772                 r = msr_io(vcpu, argp, do_get_msr, 1);
3773                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3774                 break;
3775         }
3776         case KVM_SET_MSRS: {
3777                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3778                 r = msr_io(vcpu, argp, do_set_msr, 0);
3779                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3780                 break;
3781         }
3782         case KVM_TPR_ACCESS_REPORTING: {
3783                 struct kvm_tpr_access_ctl tac;
3784
3785                 r = -EFAULT;
3786                 if (copy_from_user(&tac, argp, sizeof tac))
3787                         goto out;
3788                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3789                 if (r)
3790                         goto out;
3791                 r = -EFAULT;
3792                 if (copy_to_user(argp, &tac, sizeof tac))
3793                         goto out;
3794                 r = 0;
3795                 break;
3796         };
3797         case KVM_SET_VAPIC_ADDR: {
3798                 struct kvm_vapic_addr va;
3799                 int idx;
3800
3801                 r = -EINVAL;
3802                 if (!lapic_in_kernel(vcpu))
3803                         goto out;
3804                 r = -EFAULT;
3805                 if (copy_from_user(&va, argp, sizeof va))
3806                         goto out;
3807                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3808                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3809                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3810                 break;
3811         }
3812         case KVM_X86_SETUP_MCE: {
3813                 u64 mcg_cap;
3814
3815                 r = -EFAULT;
3816                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3817                         goto out;
3818                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3819                 break;
3820         }
3821         case KVM_X86_SET_MCE: {
3822                 struct kvm_x86_mce mce;
3823
3824                 r = -EFAULT;
3825                 if (copy_from_user(&mce, argp, sizeof mce))
3826                         goto out;
3827                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3828                 break;
3829         }
3830         case KVM_GET_VCPU_EVENTS: {
3831                 struct kvm_vcpu_events events;
3832
3833                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3834
3835                 r = -EFAULT;
3836                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3837                         break;
3838                 r = 0;
3839                 break;
3840         }
3841         case KVM_SET_VCPU_EVENTS: {
3842                 struct kvm_vcpu_events events;
3843
3844                 r = -EFAULT;
3845                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3846                         break;
3847
3848                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3849                 break;
3850         }
3851         case KVM_GET_DEBUGREGS: {
3852                 struct kvm_debugregs dbgregs;
3853
3854                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3855
3856                 r = -EFAULT;
3857                 if (copy_to_user(argp, &dbgregs,
3858                                  sizeof(struct kvm_debugregs)))
3859                         break;
3860                 r = 0;
3861                 break;
3862         }
3863         case KVM_SET_DEBUGREGS: {
3864                 struct kvm_debugregs dbgregs;
3865
3866                 r = -EFAULT;
3867                 if (copy_from_user(&dbgregs, argp,
3868                                    sizeof(struct kvm_debugregs)))
3869                         break;
3870
3871                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3872                 break;
3873         }
3874         case KVM_GET_XSAVE: {
3875                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3876                 r = -ENOMEM;
3877                 if (!u.xsave)
3878                         break;
3879
3880                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3881
3882                 r = -EFAULT;
3883                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3884                         break;
3885                 r = 0;
3886                 break;
3887         }
3888         case KVM_SET_XSAVE: {
3889                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3890                 if (IS_ERR(u.xsave)) {
3891                         r = PTR_ERR(u.xsave);
3892                         goto out_nofree;
3893                 }
3894
3895                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3896                 break;
3897         }
3898         case KVM_GET_XCRS: {
3899                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3900                 r = -ENOMEM;
3901                 if (!u.xcrs)
3902                         break;
3903
3904                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3905
3906                 r = -EFAULT;
3907                 if (copy_to_user(argp, u.xcrs,
3908                                  sizeof(struct kvm_xcrs)))
3909                         break;
3910                 r = 0;
3911                 break;
3912         }
3913         case KVM_SET_XCRS: {
3914                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3915                 if (IS_ERR(u.xcrs)) {
3916                         r = PTR_ERR(u.xcrs);
3917                         goto out_nofree;
3918                 }
3919
3920                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3921                 break;
3922         }
3923         case KVM_SET_TSC_KHZ: {
3924                 u32 user_tsc_khz;
3925
3926                 r = -EINVAL;
3927                 user_tsc_khz = (u32)arg;
3928
3929                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3930                         goto out;
3931
3932                 if (user_tsc_khz == 0)
3933                         user_tsc_khz = tsc_khz;
3934
3935                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3936                         r = 0;
3937
3938                 goto out;
3939         }
3940         case KVM_GET_TSC_KHZ: {
3941                 r = vcpu->arch.virtual_tsc_khz;
3942                 goto out;
3943         }
3944         case KVM_KVMCLOCK_CTRL: {
3945                 r = kvm_set_guest_paused(vcpu);
3946                 goto out;
3947         }
3948         case KVM_ENABLE_CAP: {
3949                 struct kvm_enable_cap cap;
3950
3951                 r = -EFAULT;
3952                 if (copy_from_user(&cap, argp, sizeof(cap)))
3953                         goto out;
3954                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3955                 break;
3956         }
3957         default:
3958                 r = -EINVAL;
3959         }
3960 out:
3961         kfree(u.buffer);
3962 out_nofree:
3963         vcpu_put(vcpu);
3964         return r;
3965 }
3966
3967 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3968 {
3969         return VM_FAULT_SIGBUS;
3970 }
3971
3972 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3973 {
3974         int ret;
3975
3976         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3977                 return -EINVAL;
3978         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3979         return ret;
3980 }
3981
3982 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3983                                               u64 ident_addr)
3984 {
3985         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
3986 }
3987
3988 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3989                                           u32 kvm_nr_mmu_pages)
3990 {
3991         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3992                 return -EINVAL;
3993
3994         mutex_lock(&kvm->slots_lock);
3995
3996         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3997         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3998
3999         mutex_unlock(&kvm->slots_lock);
4000         return 0;
4001 }
4002
4003 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4004 {
4005         return kvm->arch.n_max_mmu_pages;
4006 }
4007
4008 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4009 {
4010         struct kvm_pic *pic = kvm->arch.vpic;
4011         int r;
4012
4013         r = 0;
4014         switch (chip->chip_id) {
4015         case KVM_IRQCHIP_PIC_MASTER:
4016                 memcpy(&chip->chip.pic, &pic->pics[0],
4017                         sizeof(struct kvm_pic_state));
4018                 break;
4019         case KVM_IRQCHIP_PIC_SLAVE:
4020                 memcpy(&chip->chip.pic, &pic->pics[1],
4021                         sizeof(struct kvm_pic_state));
4022                 break;
4023         case KVM_IRQCHIP_IOAPIC:
4024                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4025                 break;
4026         default:
4027                 r = -EINVAL;
4028                 break;
4029         }
4030         return r;
4031 }
4032
4033 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4034 {
4035         struct kvm_pic *pic = kvm->arch.vpic;
4036         int r;
4037
4038         r = 0;
4039         switch (chip->chip_id) {
4040         case KVM_IRQCHIP_PIC_MASTER:
4041                 spin_lock(&pic->lock);
4042                 memcpy(&pic->pics[0], &chip->chip.pic,
4043                         sizeof(struct kvm_pic_state));
4044                 spin_unlock(&pic->lock);
4045                 break;
4046         case KVM_IRQCHIP_PIC_SLAVE:
4047                 spin_lock(&pic->lock);
4048                 memcpy(&pic->pics[1], &chip->chip.pic,
4049                         sizeof(struct kvm_pic_state));
4050                 spin_unlock(&pic->lock);
4051                 break;
4052         case KVM_IRQCHIP_IOAPIC:
4053                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4054                 break;
4055         default:
4056                 r = -EINVAL;
4057                 break;
4058         }
4059         kvm_pic_update_irq(pic);
4060         return r;
4061 }
4062
4063 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4064 {
4065         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4066
4067         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4068
4069         mutex_lock(&kps->lock);
4070         memcpy(ps, &kps->channels, sizeof(*ps));
4071         mutex_unlock(&kps->lock);
4072         return 0;
4073 }
4074
4075 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4076 {
4077         int i;
4078         struct kvm_pit *pit = kvm->arch.vpit;
4079
4080         mutex_lock(&pit->pit_state.lock);
4081         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4082         for (i = 0; i < 3; i++)
4083                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4084         mutex_unlock(&pit->pit_state.lock);
4085         return 0;
4086 }
4087
4088 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4089 {
4090         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4091         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4092                 sizeof(ps->channels));
4093         ps->flags = kvm->arch.vpit->pit_state.flags;
4094         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4095         memset(&ps->reserved, 0, sizeof(ps->reserved));
4096         return 0;
4097 }
4098
4099 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4100 {
4101         int start = 0;
4102         int i;
4103         u32 prev_legacy, cur_legacy;
4104         struct kvm_pit *pit = kvm->arch.vpit;
4105
4106         mutex_lock(&pit->pit_state.lock);
4107         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4108         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4109         if (!prev_legacy && cur_legacy)
4110                 start = 1;
4111         memcpy(&pit->pit_state.channels, &ps->channels,
4112                sizeof(pit->pit_state.channels));
4113         pit->pit_state.flags = ps->flags;
4114         for (i = 0; i < 3; i++)
4115                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4116                                    start && i == 0);
4117         mutex_unlock(&pit->pit_state.lock);
4118         return 0;
4119 }
4120
4121 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4122                                  struct kvm_reinject_control *control)
4123 {
4124         struct kvm_pit *pit = kvm->arch.vpit;
4125
4126         if (!pit)
4127                 return -ENXIO;
4128
4129         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4130          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4131          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4132          */
4133         mutex_lock(&pit->pit_state.lock);
4134         kvm_pit_set_reinject(pit, control->pit_reinject);
4135         mutex_unlock(&pit->pit_state.lock);
4136
4137         return 0;
4138 }
4139
4140 /**
4141  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4142  * @kvm: kvm instance
4143  * @log: slot id and address to which we copy the log
4144  *
4145  * Steps 1-4 below provide general overview of dirty page logging. See
4146  * kvm_get_dirty_log_protect() function description for additional details.
4147  *
4148  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4149  * always flush the TLB (step 4) even if previous step failed  and the dirty
4150  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4151  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4152  * writes will be marked dirty for next log read.
4153  *
4154  *   1. Take a snapshot of the bit and clear it if needed.
4155  *   2. Write protect the corresponding page.
4156  *   3. Copy the snapshot to the userspace.
4157  *   4. Flush TLB's if needed.
4158  */
4159 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4160 {
4161         bool is_dirty = false;
4162         int r;
4163
4164         mutex_lock(&kvm->slots_lock);
4165
4166         /*
4167          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4168          */
4169         if (kvm_x86_ops->flush_log_dirty)
4170                 kvm_x86_ops->flush_log_dirty(kvm);
4171
4172         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4173
4174         /*
4175          * All the TLBs can be flushed out of mmu lock, see the comments in
4176          * kvm_mmu_slot_remove_write_access().
4177          */
4178         lockdep_assert_held(&kvm->slots_lock);
4179         if (is_dirty)
4180                 kvm_flush_remote_tlbs(kvm);
4181
4182         mutex_unlock(&kvm->slots_lock);
4183         return r;
4184 }
4185
4186 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4187                         bool line_status)
4188 {
4189         if (!irqchip_in_kernel(kvm))
4190                 return -ENXIO;
4191
4192         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4193                                         irq_event->irq, irq_event->level,
4194                                         line_status);
4195         return 0;
4196 }
4197
4198 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4199                                    struct kvm_enable_cap *cap)
4200 {
4201         int r;
4202
4203         if (cap->flags)
4204                 return -EINVAL;
4205
4206         switch (cap->cap) {
4207         case KVM_CAP_DISABLE_QUIRKS:
4208                 kvm->arch.disabled_quirks = cap->args[0];
4209                 r = 0;
4210                 break;
4211         case KVM_CAP_SPLIT_IRQCHIP: {
4212                 mutex_lock(&kvm->lock);
4213                 r = -EINVAL;
4214                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4215                         goto split_irqchip_unlock;
4216                 r = -EEXIST;
4217                 if (irqchip_in_kernel(kvm))
4218                         goto split_irqchip_unlock;
4219                 if (kvm->created_vcpus)
4220                         goto split_irqchip_unlock;
4221                 r = kvm_setup_empty_irq_routing(kvm);
4222                 if (r)
4223                         goto split_irqchip_unlock;
4224                 /* Pairs with irqchip_in_kernel. */
4225                 smp_wmb();
4226                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4227                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4228                 r = 0;
4229 split_irqchip_unlock:
4230                 mutex_unlock(&kvm->lock);
4231                 break;
4232         }
4233         case KVM_CAP_X2APIC_API:
4234                 r = -EINVAL;
4235                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4236                         break;
4237
4238                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4239                         kvm->arch.x2apic_format = true;
4240                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4241                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4242
4243                 r = 0;
4244                 break;
4245         case KVM_CAP_X86_DISABLE_EXITS:
4246                 r = -EINVAL;
4247                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4248                         break;
4249
4250                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4251                         kvm_can_mwait_in_guest())
4252                         kvm->arch.mwait_in_guest = true;
4253                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HTL)
4254                         kvm->arch.hlt_in_guest = true;
4255                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4256                         kvm->arch.pause_in_guest = true;
4257                 r = 0;
4258                 break;
4259         default:
4260                 r = -EINVAL;
4261                 break;
4262         }
4263         return r;
4264 }
4265
4266 long kvm_arch_vm_ioctl(struct file *filp,
4267                        unsigned int ioctl, unsigned long arg)
4268 {
4269         struct kvm *kvm = filp->private_data;
4270         void __user *argp = (void __user *)arg;
4271         int r = -ENOTTY;
4272         /*
4273          * This union makes it completely explicit to gcc-3.x
4274          * that these two variables' stack usage should be
4275          * combined, not added together.
4276          */
4277         union {
4278                 struct kvm_pit_state ps;
4279                 struct kvm_pit_state2 ps2;
4280                 struct kvm_pit_config pit_config;
4281         } u;
4282
4283         switch (ioctl) {
4284         case KVM_SET_TSS_ADDR:
4285                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4286                 break;
4287         case KVM_SET_IDENTITY_MAP_ADDR: {
4288                 u64 ident_addr;
4289
4290                 mutex_lock(&kvm->lock);
4291                 r = -EINVAL;
4292                 if (kvm->created_vcpus)
4293                         goto set_identity_unlock;
4294                 r = -EFAULT;
4295                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4296                         goto set_identity_unlock;
4297                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4298 set_identity_unlock:
4299                 mutex_unlock(&kvm->lock);
4300                 break;
4301         }
4302         case KVM_SET_NR_MMU_PAGES:
4303                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4304                 break;
4305         case KVM_GET_NR_MMU_PAGES:
4306                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4307                 break;
4308         case KVM_CREATE_IRQCHIP: {
4309                 mutex_lock(&kvm->lock);
4310
4311                 r = -EEXIST;
4312                 if (irqchip_in_kernel(kvm))
4313                         goto create_irqchip_unlock;
4314
4315                 r = -EINVAL;
4316                 if (kvm->created_vcpus)
4317                         goto create_irqchip_unlock;
4318
4319                 r = kvm_pic_init(kvm);
4320                 if (r)
4321                         goto create_irqchip_unlock;
4322
4323                 r = kvm_ioapic_init(kvm);
4324                 if (r) {
4325                         kvm_pic_destroy(kvm);
4326                         goto create_irqchip_unlock;
4327                 }
4328
4329                 r = kvm_setup_default_irq_routing(kvm);
4330                 if (r) {
4331                         kvm_ioapic_destroy(kvm);
4332                         kvm_pic_destroy(kvm);
4333                         goto create_irqchip_unlock;
4334                 }
4335                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4336                 smp_wmb();
4337                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4338         create_irqchip_unlock:
4339                 mutex_unlock(&kvm->lock);
4340                 break;
4341         }
4342         case KVM_CREATE_PIT:
4343                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4344                 goto create_pit;
4345         case KVM_CREATE_PIT2:
4346                 r = -EFAULT;
4347                 if (copy_from_user(&u.pit_config, argp,
4348                                    sizeof(struct kvm_pit_config)))
4349                         goto out;
4350         create_pit:
4351                 mutex_lock(&kvm->lock);
4352                 r = -EEXIST;
4353                 if (kvm->arch.vpit)
4354                         goto create_pit_unlock;
4355                 r = -ENOMEM;
4356                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4357                 if (kvm->arch.vpit)
4358                         r = 0;
4359         create_pit_unlock:
4360                 mutex_unlock(&kvm->lock);
4361                 break;
4362         case KVM_GET_IRQCHIP: {
4363                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4364                 struct kvm_irqchip *chip;
4365
4366                 chip = memdup_user(argp, sizeof(*chip));
4367                 if (IS_ERR(chip)) {
4368                         r = PTR_ERR(chip);
4369                         goto out;
4370                 }
4371
4372                 r = -ENXIO;
4373                 if (!irqchip_kernel(kvm))
4374                         goto get_irqchip_out;
4375                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4376                 if (r)
4377                         goto get_irqchip_out;
4378                 r = -EFAULT;
4379                 if (copy_to_user(argp, chip, sizeof *chip))
4380                         goto get_irqchip_out;
4381                 r = 0;
4382         get_irqchip_out:
4383                 kfree(chip);
4384                 break;
4385         }
4386         case KVM_SET_IRQCHIP: {
4387                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4388                 struct kvm_irqchip *chip;
4389
4390                 chip = memdup_user(argp, sizeof(*chip));
4391                 if (IS_ERR(chip)) {
4392                         r = PTR_ERR(chip);
4393                         goto out;
4394                 }
4395
4396                 r = -ENXIO;
4397                 if (!irqchip_kernel(kvm))
4398                         goto set_irqchip_out;
4399                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4400                 if (r)
4401                         goto set_irqchip_out;
4402                 r = 0;
4403         set_irqchip_out:
4404                 kfree(chip);
4405                 break;
4406         }
4407         case KVM_GET_PIT: {
4408                 r = -EFAULT;
4409                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4410                         goto out;
4411                 r = -ENXIO;
4412                 if (!kvm->arch.vpit)
4413                         goto out;
4414                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4415                 if (r)
4416                         goto out;
4417                 r = -EFAULT;
4418                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4419                         goto out;
4420                 r = 0;
4421                 break;
4422         }
4423         case KVM_SET_PIT: {
4424                 r = -EFAULT;
4425                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4426                         goto out;
4427                 r = -ENXIO;
4428                 if (!kvm->arch.vpit)
4429                         goto out;
4430                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4431                 break;
4432         }
4433         case KVM_GET_PIT2: {
4434                 r = -ENXIO;
4435                 if (!kvm->arch.vpit)
4436                         goto out;
4437                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4438                 if (r)
4439                         goto out;
4440                 r = -EFAULT;
4441                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4442                         goto out;
4443                 r = 0;
4444                 break;
4445         }
4446         case KVM_SET_PIT2: {
4447                 r = -EFAULT;
4448                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4449                         goto out;
4450                 r = -ENXIO;
4451                 if (!kvm->arch.vpit)
4452                         goto out;
4453                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4454                 break;
4455         }
4456         case KVM_REINJECT_CONTROL: {
4457                 struct kvm_reinject_control control;
4458                 r =  -EFAULT;
4459                 if (copy_from_user(&control, argp, sizeof(control)))
4460                         goto out;
4461                 r = kvm_vm_ioctl_reinject(kvm, &control);
4462                 break;
4463         }
4464         case KVM_SET_BOOT_CPU_ID:
4465                 r = 0;
4466                 mutex_lock(&kvm->lock);
4467                 if (kvm->created_vcpus)
4468                         r = -EBUSY;
4469                 else
4470                         kvm->arch.bsp_vcpu_id = arg;
4471                 mutex_unlock(&kvm->lock);
4472                 break;
4473         case KVM_XEN_HVM_CONFIG: {
4474                 struct kvm_xen_hvm_config xhc;
4475                 r = -EFAULT;
4476                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4477                         goto out;
4478                 r = -EINVAL;
4479                 if (xhc.flags)
4480                         goto out;
4481                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4482                 r = 0;
4483                 break;
4484         }
4485         case KVM_SET_CLOCK: {
4486                 struct kvm_clock_data user_ns;
4487                 u64 now_ns;
4488
4489                 r = -EFAULT;
4490                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4491                         goto out;
4492
4493                 r = -EINVAL;
4494                 if (user_ns.flags)
4495                         goto out;
4496
4497                 r = 0;
4498                 /*
4499                  * TODO: userspace has to take care of races with VCPU_RUN, so
4500                  * kvm_gen_update_masterclock() can be cut down to locked
4501                  * pvclock_update_vm_gtod_copy().
4502                  */
4503                 kvm_gen_update_masterclock(kvm);
4504                 now_ns = get_kvmclock_ns(kvm);
4505                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4506                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4507                 break;
4508         }
4509         case KVM_GET_CLOCK: {
4510                 struct kvm_clock_data user_ns;
4511                 u64 now_ns;
4512
4513                 now_ns = get_kvmclock_ns(kvm);
4514                 user_ns.clock = now_ns;
4515                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4516                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4517
4518                 r = -EFAULT;
4519                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4520                         goto out;
4521                 r = 0;
4522                 break;
4523         }
4524         case KVM_ENABLE_CAP: {
4525                 struct kvm_enable_cap cap;
4526
4527                 r = -EFAULT;
4528                 if (copy_from_user(&cap, argp, sizeof(cap)))
4529                         goto out;
4530                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4531                 break;
4532         }
4533         case KVM_MEMORY_ENCRYPT_OP: {
4534                 r = -ENOTTY;
4535                 if (kvm_x86_ops->mem_enc_op)
4536                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4537                 break;
4538         }
4539         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4540                 struct kvm_enc_region region;
4541
4542                 r = -EFAULT;
4543                 if (copy_from_user(&region, argp, sizeof(region)))
4544                         goto out;
4545
4546                 r = -ENOTTY;
4547                 if (kvm_x86_ops->mem_enc_reg_region)
4548                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4549                 break;
4550         }
4551         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4552                 struct kvm_enc_region region;
4553
4554                 r = -EFAULT;
4555                 if (copy_from_user(&region, argp, sizeof(region)))
4556                         goto out;
4557
4558                 r = -ENOTTY;
4559                 if (kvm_x86_ops->mem_enc_unreg_region)
4560                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4561                 break;
4562         }
4563         case KVM_HYPERV_EVENTFD: {
4564                 struct kvm_hyperv_eventfd hvevfd;
4565
4566                 r = -EFAULT;
4567                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4568                         goto out;
4569                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4570                 break;
4571         }
4572         default:
4573                 r = -ENOTTY;
4574         }
4575 out:
4576         return r;
4577 }
4578
4579 static void kvm_init_msr_list(void)
4580 {
4581         u32 dummy[2];
4582         unsigned i, j;
4583
4584         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4585                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4586                         continue;
4587
4588                 /*
4589                  * Even MSRs that are valid in the host may not be exposed
4590                  * to the guests in some cases.
4591                  */
4592                 switch (msrs_to_save[i]) {
4593                 case MSR_IA32_BNDCFGS:
4594                         if (!kvm_x86_ops->mpx_supported())
4595                                 continue;
4596                         break;
4597                 case MSR_TSC_AUX:
4598                         if (!kvm_x86_ops->rdtscp_supported())
4599                                 continue;
4600                         break;
4601                 default:
4602                         break;
4603                 }
4604
4605                 if (j < i)
4606                         msrs_to_save[j] = msrs_to_save[i];
4607                 j++;
4608         }
4609         num_msrs_to_save = j;
4610
4611         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4612                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
4613                         continue;
4614
4615                 if (j < i)
4616                         emulated_msrs[j] = emulated_msrs[i];
4617                 j++;
4618         }
4619         num_emulated_msrs = j;
4620
4621         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4622                 struct kvm_msr_entry msr;
4623
4624                 msr.index = msr_based_features[i];
4625                 if (kvm_get_msr_feature(&msr))
4626                         continue;
4627
4628                 if (j < i)
4629                         msr_based_features[j] = msr_based_features[i];
4630                 j++;
4631         }
4632         num_msr_based_features = j;
4633 }
4634
4635 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4636                            const void *v)
4637 {
4638         int handled = 0;
4639         int n;
4640
4641         do {
4642                 n = min(len, 8);
4643                 if (!(lapic_in_kernel(vcpu) &&
4644                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4645                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4646                         break;
4647                 handled += n;
4648                 addr += n;
4649                 len -= n;
4650                 v += n;
4651         } while (len);
4652
4653         return handled;
4654 }
4655
4656 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4657 {
4658         int handled = 0;
4659         int n;
4660
4661         do {
4662                 n = min(len, 8);
4663                 if (!(lapic_in_kernel(vcpu) &&
4664                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4665                                          addr, n, v))
4666                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4667                         break;
4668                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4669                 handled += n;
4670                 addr += n;
4671                 len -= n;
4672                 v += n;
4673         } while (len);
4674
4675         return handled;
4676 }
4677
4678 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4679                         struct kvm_segment *var, int seg)
4680 {
4681         kvm_x86_ops->set_segment(vcpu, var, seg);
4682 }
4683
4684 void kvm_get_segment(struct kvm_vcpu *vcpu,
4685                      struct kvm_segment *var, int seg)
4686 {
4687         kvm_x86_ops->get_segment(vcpu, var, seg);
4688 }
4689
4690 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4691                            struct x86_exception *exception)
4692 {
4693         gpa_t t_gpa;
4694
4695         BUG_ON(!mmu_is_nested(vcpu));
4696
4697         /* NPT walks are always user-walks */
4698         access |= PFERR_USER_MASK;
4699         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4700
4701         return t_gpa;
4702 }
4703
4704 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4705                               struct x86_exception *exception)
4706 {
4707         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4708         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4709 }
4710
4711  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4712                                 struct x86_exception *exception)
4713 {
4714         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4715         access |= PFERR_FETCH_MASK;
4716         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4717 }
4718
4719 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4720                                struct x86_exception *exception)
4721 {
4722         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4723         access |= PFERR_WRITE_MASK;
4724         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4725 }
4726
4727 /* uses this to access any guest's mapped memory without checking CPL */
4728 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4729                                 struct x86_exception *exception)
4730 {
4731         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4732 }
4733
4734 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4735                                       struct kvm_vcpu *vcpu, u32 access,
4736                                       struct x86_exception *exception)
4737 {
4738         void *data = val;
4739         int r = X86EMUL_CONTINUE;
4740
4741         while (bytes) {
4742                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4743                                                             exception);
4744                 unsigned offset = addr & (PAGE_SIZE-1);
4745                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4746                 int ret;
4747
4748                 if (gpa == UNMAPPED_GVA)
4749                         return X86EMUL_PROPAGATE_FAULT;
4750                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4751                                                offset, toread);
4752                 if (ret < 0) {
4753                         r = X86EMUL_IO_NEEDED;
4754                         goto out;
4755                 }
4756
4757                 bytes -= toread;
4758                 data += toread;
4759                 addr += toread;
4760         }
4761 out:
4762         return r;
4763 }
4764
4765 /* used for instruction fetching */
4766 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4767                                 gva_t addr, void *val, unsigned int bytes,
4768                                 struct x86_exception *exception)
4769 {
4770         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4771         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4772         unsigned offset;
4773         int ret;
4774
4775         /* Inline kvm_read_guest_virt_helper for speed.  */
4776         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4777                                                     exception);
4778         if (unlikely(gpa == UNMAPPED_GVA))
4779                 return X86EMUL_PROPAGATE_FAULT;
4780
4781         offset = addr & (PAGE_SIZE-1);
4782         if (WARN_ON(offset + bytes > PAGE_SIZE))
4783                 bytes = (unsigned)PAGE_SIZE - offset;
4784         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4785                                        offset, bytes);
4786         if (unlikely(ret < 0))
4787                 return X86EMUL_IO_NEEDED;
4788
4789         return X86EMUL_CONTINUE;
4790 }
4791
4792 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4793                                gva_t addr, void *val, unsigned int bytes,
4794                                struct x86_exception *exception)
4795 {
4796         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4797         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4798
4799         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4800                                           exception);
4801 }
4802 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4803
4804 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4805                                       gva_t addr, void *val, unsigned int bytes,
4806                                       struct x86_exception *exception)
4807 {
4808         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4809         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4810 }
4811
4812 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4813                 unsigned long addr, void *val, unsigned int bytes)
4814 {
4815         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4816         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4817
4818         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4819 }
4820
4821 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4822                                        gva_t addr, void *val,
4823                                        unsigned int bytes,
4824                                        struct x86_exception *exception)
4825 {
4826         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4827         void *data = val;
4828         int r = X86EMUL_CONTINUE;
4829
4830         while (bytes) {
4831                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4832                                                              PFERR_WRITE_MASK,
4833                                                              exception);
4834                 unsigned offset = addr & (PAGE_SIZE-1);
4835                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4836                 int ret;
4837
4838                 if (gpa == UNMAPPED_GVA)
4839                         return X86EMUL_PROPAGATE_FAULT;
4840                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4841                 if (ret < 0) {
4842                         r = X86EMUL_IO_NEEDED;
4843                         goto out;
4844                 }
4845
4846                 bytes -= towrite;
4847                 data += towrite;
4848                 addr += towrite;
4849         }
4850 out:
4851         return r;
4852 }
4853 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4854
4855 int handle_ud(struct kvm_vcpu *vcpu)
4856 {
4857         int emul_type = EMULTYPE_TRAP_UD;
4858         enum emulation_result er;
4859         char sig[5]; /* ud2; .ascii "kvm" */
4860         struct x86_exception e;
4861
4862         if (force_emulation_prefix &&
4863             kvm_read_guest_virt(&vcpu->arch.emulate_ctxt,
4864                                 kvm_get_linear_rip(vcpu), sig, sizeof(sig), &e) == 0 &&
4865             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
4866                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
4867                 emul_type = 0;
4868         }
4869
4870         er = emulate_instruction(vcpu, emul_type);
4871         if (er == EMULATE_USER_EXIT)
4872                 return 0;
4873         if (er != EMULATE_DONE)
4874                 kvm_queue_exception(vcpu, UD_VECTOR);
4875         return 1;
4876 }
4877 EXPORT_SYMBOL_GPL(handle_ud);
4878
4879 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4880                             gpa_t gpa, bool write)
4881 {
4882         /* For APIC access vmexit */
4883         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4884                 return 1;
4885
4886         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4887                 trace_vcpu_match_mmio(gva, gpa, write, true);
4888                 return 1;
4889         }
4890
4891         return 0;
4892 }
4893
4894 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4895                                 gpa_t *gpa, struct x86_exception *exception,
4896                                 bool write)
4897 {
4898         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4899                 | (write ? PFERR_WRITE_MASK : 0);
4900
4901         /*
4902          * currently PKRU is only applied to ept enabled guest so
4903          * there is no pkey in EPT page table for L1 guest or EPT
4904          * shadow page table for L2 guest.
4905          */
4906         if (vcpu_match_mmio_gva(vcpu, gva)
4907             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4908                                  vcpu->arch.access, 0, access)) {
4909                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4910                                         (gva & (PAGE_SIZE - 1));
4911                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4912                 return 1;
4913         }
4914
4915         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4916
4917         if (*gpa == UNMAPPED_GVA)
4918                 return -1;
4919
4920         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4921 }
4922
4923 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4924                         const void *val, int bytes)
4925 {
4926         int ret;
4927
4928         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4929         if (ret < 0)
4930                 return 0;
4931         kvm_page_track_write(vcpu, gpa, val, bytes);
4932         return 1;
4933 }
4934
4935 struct read_write_emulator_ops {
4936         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4937                                   int bytes);
4938         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4939                                   void *val, int bytes);
4940         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4941                                int bytes, void *val);
4942         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4943                                     void *val, int bytes);
4944         bool write;
4945 };
4946
4947 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4948 {
4949         if (vcpu->mmio_read_completed) {
4950                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4951                                vcpu->mmio_fragments[0].gpa, val);
4952                 vcpu->mmio_read_completed = 0;
4953                 return 1;
4954         }
4955
4956         return 0;
4957 }
4958
4959 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4960                         void *val, int bytes)
4961 {
4962         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4963 }
4964
4965 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4966                          void *val, int bytes)
4967 {
4968         return emulator_write_phys(vcpu, gpa, val, bytes);
4969 }
4970
4971 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4972 {
4973         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
4974         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4975 }
4976
4977 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4978                           void *val, int bytes)
4979 {
4980         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
4981         return X86EMUL_IO_NEEDED;
4982 }
4983
4984 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4985                            void *val, int bytes)
4986 {
4987         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4988
4989         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4990         return X86EMUL_CONTINUE;
4991 }
4992
4993 static const struct read_write_emulator_ops read_emultor = {
4994         .read_write_prepare = read_prepare,
4995         .read_write_emulate = read_emulate,
4996         .read_write_mmio = vcpu_mmio_read,
4997         .read_write_exit_mmio = read_exit_mmio,
4998 };
4999
5000 static const struct read_write_emulator_ops write_emultor = {
5001         .read_write_emulate = write_emulate,
5002         .read_write_mmio = write_mmio,
5003         .read_write_exit_mmio = write_exit_mmio,
5004         .write = true,
5005 };
5006
5007 static int emulator_read_write_onepage(unsigned long addr, void *val,
5008                                        unsigned int bytes,
5009                                        struct x86_exception *exception,
5010                                        struct kvm_vcpu *vcpu,
5011                                        const struct read_write_emulator_ops *ops)
5012 {
5013         gpa_t gpa;
5014         int handled, ret;
5015         bool write = ops->write;
5016         struct kvm_mmio_fragment *frag;
5017         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5018
5019         /*
5020          * If the exit was due to a NPF we may already have a GPA.
5021          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5022          * Note, this cannot be used on string operations since string
5023          * operation using rep will only have the initial GPA from the NPF
5024          * occurred.
5025          */
5026         if (vcpu->arch.gpa_available &&
5027             emulator_can_use_gpa(ctxt) &&
5028             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5029                 gpa = vcpu->arch.gpa_val;
5030                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5031         } else {
5032                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5033                 if (ret < 0)
5034                         return X86EMUL_PROPAGATE_FAULT;
5035         }
5036
5037         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5038                 return X86EMUL_CONTINUE;
5039
5040         /*
5041          * Is this MMIO handled locally?
5042          */
5043         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5044         if (handled == bytes)
5045                 return X86EMUL_CONTINUE;
5046
5047         gpa += handled;
5048         bytes -= handled;
5049         val += handled;
5050
5051         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5052         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5053         frag->gpa = gpa;
5054         frag->data = val;
5055         frag->len = bytes;
5056         return X86EMUL_CONTINUE;
5057 }
5058
5059 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5060                         unsigned long addr,
5061                         void *val, unsigned int bytes,
5062                         struct x86_exception *exception,
5063                         const struct read_write_emulator_ops *ops)
5064 {
5065         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5066         gpa_t gpa;
5067         int rc;
5068
5069         if (ops->read_write_prepare &&
5070                   ops->read_write_prepare(vcpu, val, bytes))
5071                 return X86EMUL_CONTINUE;
5072
5073         vcpu->mmio_nr_fragments = 0;
5074
5075         /* Crossing a page boundary? */
5076         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5077                 int now;
5078
5079                 now = -addr & ~PAGE_MASK;
5080                 rc = emulator_read_write_onepage(addr, val, now, exception,
5081                                                  vcpu, ops);
5082
5083                 if (rc != X86EMUL_CONTINUE)
5084                         return rc;
5085                 addr += now;
5086                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5087                         addr = (u32)addr;
5088                 val += now;
5089                 bytes -= now;
5090         }
5091
5092         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5093                                          vcpu, ops);
5094         if (rc != X86EMUL_CONTINUE)
5095                 return rc;
5096
5097         if (!vcpu->mmio_nr_fragments)
5098                 return rc;
5099
5100         gpa = vcpu->mmio_fragments[0].gpa;
5101
5102         vcpu->mmio_needed = 1;
5103         vcpu->mmio_cur_fragment = 0;
5104
5105         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5106         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5107         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5108         vcpu->run->mmio.phys_addr = gpa;
5109
5110         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5111 }
5112
5113 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5114                                   unsigned long addr,
5115                                   void *val,
5116                                   unsigned int bytes,
5117                                   struct x86_exception *exception)
5118 {
5119         return emulator_read_write(ctxt, addr, val, bytes,
5120                                    exception, &read_emultor);
5121 }
5122
5123 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5124                             unsigned long addr,
5125                             const void *val,
5126                             unsigned int bytes,
5127                             struct x86_exception *exception)
5128 {
5129         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5130                                    exception, &write_emultor);
5131 }
5132
5133 #define CMPXCHG_TYPE(t, ptr, old, new) \
5134         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5135
5136 #ifdef CONFIG_X86_64
5137 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5138 #else
5139 #  define CMPXCHG64(ptr, old, new) \
5140         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5141 #endif
5142
5143 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5144                                      unsigned long addr,
5145                                      const void *old,
5146                                      const void *new,
5147                                      unsigned int bytes,
5148                                      struct x86_exception *exception)
5149 {
5150         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5151         gpa_t gpa;
5152         struct page *page;
5153         char *kaddr;
5154         bool exchanged;
5155
5156         /* guests cmpxchg8b have to be emulated atomically */
5157         if (bytes > 8 || (bytes & (bytes - 1)))
5158                 goto emul_write;
5159
5160         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5161
5162         if (gpa == UNMAPPED_GVA ||
5163             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5164                 goto emul_write;
5165
5166         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5167                 goto emul_write;
5168
5169         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5170         if (is_error_page(page))
5171                 goto emul_write;
5172
5173         kaddr = kmap_atomic(page);
5174         kaddr += offset_in_page(gpa);
5175         switch (bytes) {
5176         case 1:
5177                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5178                 break;
5179         case 2:
5180                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5181                 break;
5182         case 4:
5183                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5184                 break;
5185         case 8:
5186                 exchanged = CMPXCHG64(kaddr, old, new);
5187                 break;
5188         default:
5189                 BUG();
5190         }
5191         kunmap_atomic(kaddr);
5192         kvm_release_page_dirty(page);
5193
5194         if (!exchanged)
5195                 return X86EMUL_CMPXCHG_FAILED;
5196
5197         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5198         kvm_page_track_write(vcpu, gpa, new, bytes);
5199
5200         return X86EMUL_CONTINUE;
5201
5202 emul_write:
5203         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5204
5205         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5206 }
5207
5208 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5209 {
5210         int r = 0, i;
5211
5212         for (i = 0; i < vcpu->arch.pio.count; i++) {
5213                 if (vcpu->arch.pio.in)
5214                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5215                                             vcpu->arch.pio.size, pd);
5216                 else
5217                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5218                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5219                                              pd);
5220                 if (r)
5221                         break;
5222                 pd += vcpu->arch.pio.size;
5223         }
5224         return r;
5225 }
5226
5227 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5228                                unsigned short port, void *val,
5229                                unsigned int count, bool in)
5230 {
5231         vcpu->arch.pio.port = port;
5232         vcpu->arch.pio.in = in;
5233         vcpu->arch.pio.count  = count;
5234         vcpu->arch.pio.size = size;
5235
5236         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5237                 vcpu->arch.pio.count = 0;
5238                 return 1;
5239         }
5240
5241         vcpu->run->exit_reason = KVM_EXIT_IO;
5242         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5243         vcpu->run->io.size = size;
5244         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5245         vcpu->run->io.count = count;
5246         vcpu->run->io.port = port;
5247
5248         return 0;
5249 }
5250
5251 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5252                                     int size, unsigned short port, void *val,
5253                                     unsigned int count)
5254 {
5255         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5256         int ret;
5257
5258         if (vcpu->arch.pio.count)
5259                 goto data_avail;
5260
5261         memset(vcpu->arch.pio_data, 0, size * count);
5262
5263         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5264         if (ret) {
5265 data_avail:
5266                 memcpy(val, vcpu->arch.pio_data, size * count);
5267                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5268                 vcpu->arch.pio.count = 0;
5269                 return 1;
5270         }
5271
5272         return 0;
5273 }
5274
5275 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5276                                      int size, unsigned short port,
5277                                      const void *val, unsigned int count)
5278 {
5279         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5280
5281         memcpy(vcpu->arch.pio_data, val, size * count);
5282         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5283         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5284 }
5285
5286 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5287 {
5288         return kvm_x86_ops->get_segment_base(vcpu, seg);
5289 }
5290
5291 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5292 {
5293         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5294 }
5295
5296 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5297 {
5298         if (!need_emulate_wbinvd(vcpu))
5299                 return X86EMUL_CONTINUE;
5300
5301         if (kvm_x86_ops->has_wbinvd_exit()) {
5302                 int cpu = get_cpu();
5303
5304                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5305                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5306                                 wbinvd_ipi, NULL, 1);
5307                 put_cpu();
5308                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5309         } else
5310                 wbinvd();
5311         return X86EMUL_CONTINUE;
5312 }
5313
5314 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5315 {
5316         kvm_emulate_wbinvd_noskip(vcpu);
5317         return kvm_skip_emulated_instruction(vcpu);
5318 }
5319 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5320
5321
5322
5323 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5324 {
5325         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5326 }
5327
5328 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5329                            unsigned long *dest)
5330 {
5331         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5332 }
5333
5334 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5335                            unsigned long value)
5336 {
5337
5338         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5339 }
5340
5341 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5342 {
5343         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5344 }
5345
5346 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5347 {
5348         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5349         unsigned long value;
5350
5351         switch (cr) {
5352         case 0:
5353                 value = kvm_read_cr0(vcpu);
5354                 break;
5355         case 2:
5356                 value = vcpu->arch.cr2;
5357                 break;
5358         case 3:
5359                 value = kvm_read_cr3(vcpu);
5360                 break;
5361         case 4:
5362                 value = kvm_read_cr4(vcpu);
5363                 break;
5364         case 8:
5365                 value = kvm_get_cr8(vcpu);
5366                 break;
5367         default:
5368                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5369                 return 0;
5370         }
5371
5372         return value;
5373 }
5374
5375 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5376 {
5377         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5378         int res = 0;
5379
5380         switch (cr) {
5381         case 0:
5382                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5383                 break;
5384         case 2:
5385                 vcpu->arch.cr2 = val;
5386                 break;
5387         case 3:
5388                 res = kvm_set_cr3(vcpu, val);
5389                 break;
5390         case 4:
5391                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5392                 break;
5393         case 8:
5394                 res = kvm_set_cr8(vcpu, val);
5395                 break;
5396         default:
5397                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5398                 res = -1;
5399         }
5400
5401         return res;
5402 }
5403
5404 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5405 {
5406         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5407 }
5408
5409 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5410 {
5411         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5412 }
5413
5414 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5415 {
5416         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5417 }
5418
5419 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5420 {
5421         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5422 }
5423
5424 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5425 {
5426         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5427 }
5428
5429 static unsigned long emulator_get_cached_segment_base(
5430         struct x86_emulate_ctxt *ctxt, int seg)
5431 {
5432         return get_segment_base(emul_to_vcpu(ctxt), seg);
5433 }
5434
5435 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5436                                  struct desc_struct *desc, u32 *base3,
5437                                  int seg)
5438 {
5439         struct kvm_segment var;
5440
5441         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5442         *selector = var.selector;
5443
5444         if (var.unusable) {
5445                 memset(desc, 0, sizeof(*desc));
5446                 if (base3)
5447                         *base3 = 0;
5448                 return false;
5449         }
5450
5451         if (var.g)
5452                 var.limit >>= 12;
5453         set_desc_limit(desc, var.limit);
5454         set_desc_base(desc, (unsigned long)var.base);
5455 #ifdef CONFIG_X86_64
5456         if (base3)
5457                 *base3 = var.base >> 32;
5458 #endif
5459         desc->type = var.type;
5460         desc->s = var.s;
5461         desc->dpl = var.dpl;
5462         desc->p = var.present;
5463         desc->avl = var.avl;
5464         desc->l = var.l;
5465         desc->d = var.db;
5466         desc->g = var.g;
5467
5468         return true;
5469 }
5470
5471 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5472                                  struct desc_struct *desc, u32 base3,
5473                                  int seg)
5474 {
5475         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5476         struct kvm_segment var;
5477
5478         var.selector = selector;
5479         var.base = get_desc_base(desc);
5480 #ifdef CONFIG_X86_64
5481         var.base |= ((u64)base3) << 32;
5482 #endif
5483         var.limit = get_desc_limit(desc);
5484         if (desc->g)
5485                 var.limit = (var.limit << 12) | 0xfff;
5486         var.type = desc->type;
5487         var.dpl = desc->dpl;
5488         var.db = desc->d;
5489         var.s = desc->s;
5490         var.l = desc->l;
5491         var.g = desc->g;
5492         var.avl = desc->avl;
5493         var.present = desc->p;
5494         var.unusable = !var.present;
5495         var.padding = 0;
5496
5497         kvm_set_segment(vcpu, &var, seg);
5498         return;
5499 }
5500
5501 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5502                             u32 msr_index, u64 *pdata)
5503 {
5504         struct msr_data msr;
5505         int r;
5506
5507         msr.index = msr_index;
5508         msr.host_initiated = false;
5509         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5510         if (r)
5511                 return r;
5512
5513         *pdata = msr.data;
5514         return 0;
5515 }
5516
5517 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5518                             u32 msr_index, u64 data)
5519 {
5520         struct msr_data msr;
5521
5522         msr.data = data;
5523         msr.index = msr_index;
5524         msr.host_initiated = false;
5525         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5526 }
5527
5528 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5529 {
5530         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5531
5532         return vcpu->arch.smbase;
5533 }
5534
5535 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5536 {
5537         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5538
5539         vcpu->arch.smbase = smbase;
5540 }
5541
5542 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5543                               u32 pmc)
5544 {
5545         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5546 }
5547
5548 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5549                              u32 pmc, u64 *pdata)
5550 {
5551         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5552 }
5553
5554 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5555 {
5556         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5557 }
5558
5559 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5560                               struct x86_instruction_info *info,
5561                               enum x86_intercept_stage stage)
5562 {
5563         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5564 }
5565
5566 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5567                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5568 {
5569         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5570 }
5571
5572 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5573 {
5574         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5575 }
5576
5577 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5578 {
5579         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5580 }
5581
5582 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5583 {
5584         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5585 }
5586
5587 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5588 {
5589         return emul_to_vcpu(ctxt)->arch.hflags;
5590 }
5591
5592 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5593 {
5594         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5595 }
5596
5597 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5598 {
5599         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5600 }
5601
5602 static const struct x86_emulate_ops emulate_ops = {
5603         .read_gpr            = emulator_read_gpr,
5604         .write_gpr           = emulator_write_gpr,
5605         .read_std            = kvm_read_guest_virt_system,
5606         .write_std           = kvm_write_guest_virt_system,
5607         .read_phys           = kvm_read_guest_phys_system,
5608         .fetch               = kvm_fetch_guest_virt,
5609         .read_emulated       = emulator_read_emulated,
5610         .write_emulated      = emulator_write_emulated,
5611         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5612         .invlpg              = emulator_invlpg,
5613         .pio_in_emulated     = emulator_pio_in_emulated,
5614         .pio_out_emulated    = emulator_pio_out_emulated,
5615         .get_segment         = emulator_get_segment,
5616         .set_segment         = emulator_set_segment,
5617         .get_cached_segment_base = emulator_get_cached_segment_base,
5618         .get_gdt             = emulator_get_gdt,
5619         .get_idt             = emulator_get_idt,
5620         .set_gdt             = emulator_set_gdt,
5621         .set_idt             = emulator_set_idt,
5622         .get_cr              = emulator_get_cr,
5623         .set_cr              = emulator_set_cr,
5624         .cpl                 = emulator_get_cpl,
5625         .get_dr              = emulator_get_dr,
5626         .set_dr              = emulator_set_dr,
5627         .get_smbase          = emulator_get_smbase,
5628         .set_smbase          = emulator_set_smbase,
5629         .set_msr             = emulator_set_msr,
5630         .get_msr             = emulator_get_msr,
5631         .check_pmc           = emulator_check_pmc,
5632         .read_pmc            = emulator_read_pmc,
5633         .halt                = emulator_halt,
5634         .wbinvd              = emulator_wbinvd,
5635         .fix_hypercall       = emulator_fix_hypercall,
5636         .intercept           = emulator_intercept,
5637         .get_cpuid           = emulator_get_cpuid,
5638         .set_nmi_mask        = emulator_set_nmi_mask,
5639         .get_hflags          = emulator_get_hflags,
5640         .set_hflags          = emulator_set_hflags,
5641         .pre_leave_smm       = emulator_pre_leave_smm,
5642 };
5643
5644 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5645 {
5646         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5647         /*
5648          * an sti; sti; sequence only disable interrupts for the first
5649          * instruction. So, if the last instruction, be it emulated or
5650          * not, left the system with the INT_STI flag enabled, it
5651          * means that the last instruction is an sti. We should not
5652          * leave the flag on in this case. The same goes for mov ss
5653          */
5654         if (int_shadow & mask)
5655                 mask = 0;
5656         if (unlikely(int_shadow || mask)) {
5657                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5658                 if (!mask)
5659                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5660         }
5661 }
5662
5663 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5664 {
5665         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5666         if (ctxt->exception.vector == PF_VECTOR)
5667                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5668
5669         if (ctxt->exception.error_code_valid)
5670                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5671                                       ctxt->exception.error_code);
5672         else
5673                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5674         return false;
5675 }
5676
5677 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5678 {
5679         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5680         int cs_db, cs_l;
5681
5682         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5683
5684         ctxt->eflags = kvm_get_rflags(vcpu);
5685         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5686
5687         ctxt->eip = kvm_rip_read(vcpu);
5688         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5689                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5690                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5691                      cs_db                              ? X86EMUL_MODE_PROT32 :
5692                                                           X86EMUL_MODE_PROT16;
5693         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5694         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5695         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5696
5697         init_decode_cache(ctxt);
5698         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5699 }
5700
5701 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5702 {
5703         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5704         int ret;
5705
5706         init_emulate_ctxt(vcpu);
5707
5708         ctxt->op_bytes = 2;
5709         ctxt->ad_bytes = 2;
5710         ctxt->_eip = ctxt->eip + inc_eip;
5711         ret = emulate_int_real(ctxt, irq);
5712
5713         if (ret != X86EMUL_CONTINUE)
5714                 return EMULATE_FAIL;
5715
5716         ctxt->eip = ctxt->_eip;
5717         kvm_rip_write(vcpu, ctxt->eip);
5718         kvm_set_rflags(vcpu, ctxt->eflags);
5719
5720         return EMULATE_DONE;
5721 }
5722 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5723
5724 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
5725 {
5726         int r = EMULATE_DONE;
5727
5728         ++vcpu->stat.insn_emulation_fail;
5729         trace_kvm_emulate_insn_failed(vcpu);
5730
5731         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
5732                 return EMULATE_FAIL;
5733
5734         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5735                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5736                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5737                 vcpu->run->internal.ndata = 0;
5738                 r = EMULATE_USER_EXIT;
5739         }
5740
5741         kvm_queue_exception(vcpu, UD_VECTOR);
5742
5743         return r;
5744 }
5745
5746 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5747                                   bool write_fault_to_shadow_pgtable,
5748                                   int emulation_type)
5749 {
5750         gpa_t gpa = cr2;
5751         kvm_pfn_t pfn;
5752
5753         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5754                 return false;
5755
5756         if (!vcpu->arch.mmu.direct_map) {
5757                 /*
5758                  * Write permission should be allowed since only
5759                  * write access need to be emulated.
5760                  */
5761                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5762
5763                 /*
5764                  * If the mapping is invalid in guest, let cpu retry
5765                  * it to generate fault.
5766                  */
5767                 if (gpa == UNMAPPED_GVA)
5768                         return true;
5769         }
5770
5771         /*
5772          * Do not retry the unhandleable instruction if it faults on the
5773          * readonly host memory, otherwise it will goto a infinite loop:
5774          * retry instruction -> write #PF -> emulation fail -> retry
5775          * instruction -> ...
5776          */
5777         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5778
5779         /*
5780          * If the instruction failed on the error pfn, it can not be fixed,
5781          * report the error to userspace.
5782          */
5783         if (is_error_noslot_pfn(pfn))
5784                 return false;
5785
5786         kvm_release_pfn_clean(pfn);
5787
5788         /* The instructions are well-emulated on direct mmu. */
5789         if (vcpu->arch.mmu.direct_map) {
5790                 unsigned int indirect_shadow_pages;
5791
5792                 spin_lock(&vcpu->kvm->mmu_lock);
5793                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5794                 spin_unlock(&vcpu->kvm->mmu_lock);
5795
5796                 if (indirect_shadow_pages)
5797                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5798
5799                 return true;
5800         }
5801
5802         /*
5803          * if emulation was due to access to shadowed page table
5804          * and it failed try to unshadow page and re-enter the
5805          * guest to let CPU execute the instruction.
5806          */
5807         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5808
5809         /*
5810          * If the access faults on its page table, it can not
5811          * be fixed by unprotecting shadow page and it should
5812          * be reported to userspace.
5813          */
5814         return !write_fault_to_shadow_pgtable;
5815 }
5816
5817 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5818                               unsigned long cr2,  int emulation_type)
5819 {
5820         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5821         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5822
5823         last_retry_eip = vcpu->arch.last_retry_eip;
5824         last_retry_addr = vcpu->arch.last_retry_addr;
5825
5826         /*
5827          * If the emulation is caused by #PF and it is non-page_table
5828          * writing instruction, it means the VM-EXIT is caused by shadow
5829          * page protected, we can zap the shadow page and retry this
5830          * instruction directly.
5831          *
5832          * Note: if the guest uses a non-page-table modifying instruction
5833          * on the PDE that points to the instruction, then we will unmap
5834          * the instruction and go to an infinite loop. So, we cache the
5835          * last retried eip and the last fault address, if we meet the eip
5836          * and the address again, we can break out of the potential infinite
5837          * loop.
5838          */
5839         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5840
5841         if (!(emulation_type & EMULTYPE_RETRY))
5842                 return false;
5843
5844         if (x86_page_table_writing_insn(ctxt))
5845                 return false;
5846
5847         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5848                 return false;
5849
5850         vcpu->arch.last_retry_eip = ctxt->eip;
5851         vcpu->arch.last_retry_addr = cr2;
5852
5853         if (!vcpu->arch.mmu.direct_map)
5854                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5855
5856         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5857
5858         return true;
5859 }
5860
5861 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5862 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5863
5864 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5865 {
5866         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5867                 /* This is a good place to trace that we are exiting SMM.  */
5868                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5869
5870                 /* Process a latched INIT or SMI, if any.  */
5871                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5872         }
5873
5874         kvm_mmu_reset_context(vcpu);
5875 }
5876
5877 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5878 {
5879         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5880
5881         vcpu->arch.hflags = emul_flags;
5882
5883         if (changed & HF_SMM_MASK)
5884                 kvm_smm_changed(vcpu);
5885 }
5886
5887 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5888                                 unsigned long *db)
5889 {
5890         u32 dr6 = 0;
5891         int i;
5892         u32 enable, rwlen;
5893
5894         enable = dr7;
5895         rwlen = dr7 >> 16;
5896         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5897                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5898                         dr6 |= (1 << i);
5899         return dr6;
5900 }
5901
5902 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5903 {
5904         struct kvm_run *kvm_run = vcpu->run;
5905
5906         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5907                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5908                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5909                 kvm_run->debug.arch.exception = DB_VECTOR;
5910                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5911                 *r = EMULATE_USER_EXIT;
5912         } else {
5913                 /*
5914                  * "Certain debug exceptions may clear bit 0-3.  The
5915                  * remaining contents of the DR6 register are never
5916                  * cleared by the processor".
5917                  */
5918                 vcpu->arch.dr6 &= ~15;
5919                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5920                 kvm_queue_exception(vcpu, DB_VECTOR);
5921         }
5922 }
5923
5924 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5925 {
5926         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5927         int r = EMULATE_DONE;
5928
5929         kvm_x86_ops->skip_emulated_instruction(vcpu);
5930
5931         /*
5932          * rflags is the old, "raw" value of the flags.  The new value has
5933          * not been saved yet.
5934          *
5935          * This is correct even for TF set by the guest, because "the
5936          * processor will not generate this exception after the instruction
5937          * that sets the TF flag".
5938          */
5939         if (unlikely(rflags & X86_EFLAGS_TF))
5940                 kvm_vcpu_do_singlestep(vcpu, &r);
5941         return r == EMULATE_DONE;
5942 }
5943 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5944
5945 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5946 {
5947         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5948             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5949                 struct kvm_run *kvm_run = vcpu->run;
5950                 unsigned long eip = kvm_get_linear_rip(vcpu);
5951                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5952                                            vcpu->arch.guest_debug_dr7,
5953                                            vcpu->arch.eff_db);
5954
5955                 if (dr6 != 0) {
5956                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5957                         kvm_run->debug.arch.pc = eip;
5958                         kvm_run->debug.arch.exception = DB_VECTOR;
5959                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5960                         *r = EMULATE_USER_EXIT;
5961                         return true;
5962                 }
5963         }
5964
5965         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5966             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5967                 unsigned long eip = kvm_get_linear_rip(vcpu);
5968                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5969                                            vcpu->arch.dr7,
5970                                            vcpu->arch.db);
5971
5972                 if (dr6 != 0) {
5973                         vcpu->arch.dr6 &= ~15;
5974                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5975                         kvm_queue_exception(vcpu, DB_VECTOR);
5976                         *r = EMULATE_DONE;
5977                         return true;
5978                 }
5979         }
5980
5981         return false;
5982 }
5983
5984 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
5985 {
5986         switch (ctxt->opcode_len) {
5987         case 1:
5988                 switch (ctxt->b) {
5989                 case 0xe4:      /* IN */
5990                 case 0xe5:
5991                 case 0xec:
5992                 case 0xed:
5993                 case 0xe6:      /* OUT */
5994                 case 0xe7:
5995                 case 0xee:
5996                 case 0xef:
5997                 case 0x6c:      /* INS */
5998                 case 0x6d:
5999                 case 0x6e:      /* OUTS */
6000                 case 0x6f:
6001                         return true;
6002                 }
6003                 break;
6004         case 2:
6005                 switch (ctxt->b) {
6006                 case 0x33:      /* RDPMC */
6007                         return true;
6008                 }
6009                 break;
6010         }
6011
6012         return false;
6013 }
6014
6015 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6016                             unsigned long cr2,
6017                             int emulation_type,
6018                             void *insn,
6019                             int insn_len)
6020 {
6021         int r;
6022         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6023         bool writeback = true;
6024         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6025
6026         /*
6027          * Clear write_fault_to_shadow_pgtable here to ensure it is
6028          * never reused.
6029          */
6030         vcpu->arch.write_fault_to_shadow_pgtable = false;
6031         kvm_clear_exception_queue(vcpu);
6032
6033         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6034                 init_emulate_ctxt(vcpu);
6035
6036                 /*
6037                  * We will reenter on the same instruction since
6038                  * we do not set complete_userspace_io.  This does not
6039                  * handle watchpoints yet, those would be handled in
6040                  * the emulate_ops.
6041                  */
6042                 if (!(emulation_type & EMULTYPE_SKIP) &&
6043                     kvm_vcpu_check_breakpoint(vcpu, &r))
6044                         return r;
6045
6046                 ctxt->interruptibility = 0;
6047                 ctxt->have_exception = false;
6048                 ctxt->exception.vector = -1;
6049                 ctxt->perm_ok = false;
6050
6051                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6052
6053                 r = x86_decode_insn(ctxt, insn, insn_len);
6054
6055                 trace_kvm_emulate_insn_start(vcpu);
6056                 ++vcpu->stat.insn_emulation;
6057                 if (r != EMULATION_OK)  {
6058                         if (emulation_type & EMULTYPE_TRAP_UD)
6059                                 return EMULATE_FAIL;
6060                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6061                                                 emulation_type))
6062                                 return EMULATE_DONE;
6063                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6064                                 return EMULATE_DONE;
6065                         if (emulation_type & EMULTYPE_SKIP)
6066                                 return EMULATE_FAIL;
6067                         return handle_emulation_failure(vcpu, emulation_type);
6068                 }
6069         }
6070
6071         if ((emulation_type & EMULTYPE_VMWARE) &&
6072             !is_vmware_backdoor_opcode(ctxt))
6073                 return EMULATE_FAIL;
6074
6075         if (emulation_type & EMULTYPE_SKIP) {
6076                 kvm_rip_write(vcpu, ctxt->_eip);
6077                 if (ctxt->eflags & X86_EFLAGS_RF)
6078                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6079                 return EMULATE_DONE;
6080         }
6081
6082         if (retry_instruction(ctxt, cr2, emulation_type))
6083                 return EMULATE_DONE;
6084
6085         /* this is needed for vmware backdoor interface to work since it
6086            changes registers values  during IO operation */
6087         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6088                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6089                 emulator_invalidate_register_cache(ctxt);
6090         }
6091
6092 restart:
6093         /* Save the faulting GPA (cr2) in the address field */
6094         ctxt->exception.address = cr2;
6095
6096         r = x86_emulate_insn(ctxt);
6097
6098         if (r == EMULATION_INTERCEPTED)
6099                 return EMULATE_DONE;
6100
6101         if (r == EMULATION_FAILED) {
6102                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6103                                         emulation_type))
6104                         return EMULATE_DONE;
6105
6106                 return handle_emulation_failure(vcpu, emulation_type);
6107         }
6108
6109         if (ctxt->have_exception) {
6110                 r = EMULATE_DONE;
6111                 if (inject_emulated_exception(vcpu))
6112                         return r;
6113         } else if (vcpu->arch.pio.count) {
6114                 if (!vcpu->arch.pio.in) {
6115                         /* FIXME: return into emulator if single-stepping.  */
6116                         vcpu->arch.pio.count = 0;
6117                 } else {
6118                         writeback = false;
6119                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6120                 }
6121                 r = EMULATE_USER_EXIT;
6122         } else if (vcpu->mmio_needed) {
6123                 if (!vcpu->mmio_is_write)
6124                         writeback = false;
6125                 r = EMULATE_USER_EXIT;
6126                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6127         } else if (r == EMULATION_RESTART)
6128                 goto restart;
6129         else
6130                 r = EMULATE_DONE;
6131
6132         if (writeback) {
6133                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6134                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6135                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6136                 kvm_rip_write(vcpu, ctxt->eip);
6137                 if (r == EMULATE_DONE &&
6138                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6139                         kvm_vcpu_do_singlestep(vcpu, &r);
6140                 if (!ctxt->have_exception ||
6141                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6142                         __kvm_set_rflags(vcpu, ctxt->eflags);
6143
6144                 /*
6145                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6146                  * do nothing, and it will be requested again as soon as
6147                  * the shadow expires.  But we still need to check here,
6148                  * because POPF has no interrupt shadow.
6149                  */
6150                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6151                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6152         } else
6153                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6154
6155         return r;
6156 }
6157 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
6158
6159 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6160                             unsigned short port)
6161 {
6162         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6163         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6164                                             size, port, &val, 1);
6165         /* do not return to emulator after return from userspace */
6166         vcpu->arch.pio.count = 0;
6167         return ret;
6168 }
6169
6170 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6171 {
6172         unsigned long val;
6173
6174         /* We should only ever be called with arch.pio.count equal to 1 */
6175         BUG_ON(vcpu->arch.pio.count != 1);
6176
6177         /* For size less than 4 we merge, else we zero extend */
6178         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6179                                         : 0;
6180
6181         /*
6182          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6183          * the copy and tracing
6184          */
6185         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6186                                  vcpu->arch.pio.port, &val, 1);
6187         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6188
6189         return 1;
6190 }
6191
6192 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6193                            unsigned short port)
6194 {
6195         unsigned long val;
6196         int ret;
6197
6198         /* For size less than 4 we merge, else we zero extend */
6199         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6200
6201         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6202                                        &val, 1);
6203         if (ret) {
6204                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6205                 return ret;
6206         }
6207
6208         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6209
6210         return 0;
6211 }
6212
6213 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6214 {
6215         int ret = kvm_skip_emulated_instruction(vcpu);
6216
6217         /*
6218          * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
6219          * KVM_EXIT_DEBUG here.
6220          */
6221         if (in)
6222                 return kvm_fast_pio_in(vcpu, size, port) && ret;
6223         else
6224                 return kvm_fast_pio_out(vcpu, size, port) && ret;
6225 }
6226 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6227
6228 static int kvmclock_cpu_down_prep(unsigned int cpu)
6229 {
6230         __this_cpu_write(cpu_tsc_khz, 0);
6231         return 0;
6232 }
6233
6234 static void tsc_khz_changed(void *data)
6235 {
6236         struct cpufreq_freqs *freq = data;
6237         unsigned long khz = 0;
6238
6239         if (data)
6240                 khz = freq->new;
6241         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6242                 khz = cpufreq_quick_get(raw_smp_processor_id());
6243         if (!khz)
6244                 khz = tsc_khz;
6245         __this_cpu_write(cpu_tsc_khz, khz);
6246 }
6247
6248 #ifdef CONFIG_X86_64
6249 static void kvm_hyperv_tsc_notifier(void)
6250 {
6251         struct kvm *kvm;
6252         struct kvm_vcpu *vcpu;
6253         int cpu;
6254
6255         spin_lock(&kvm_lock);
6256         list_for_each_entry(kvm, &vm_list, vm_list)
6257                 kvm_make_mclock_inprogress_request(kvm);
6258
6259         hyperv_stop_tsc_emulation();
6260
6261         /* TSC frequency always matches when on Hyper-V */
6262         for_each_present_cpu(cpu)
6263                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6264         kvm_max_guest_tsc_khz = tsc_khz;
6265
6266         list_for_each_entry(kvm, &vm_list, vm_list) {
6267                 struct kvm_arch *ka = &kvm->arch;
6268
6269                 spin_lock(&ka->pvclock_gtod_sync_lock);
6270
6271                 pvclock_update_vm_gtod_copy(kvm);
6272
6273                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6274                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6275
6276                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6277                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6278
6279                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6280         }
6281         spin_unlock(&kvm_lock);
6282 }
6283 #endif
6284
6285 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6286                                      void *data)
6287 {
6288         struct cpufreq_freqs *freq = data;
6289         struct kvm *kvm;
6290         struct kvm_vcpu *vcpu;
6291         int i, send_ipi = 0;
6292
6293         /*
6294          * We allow guests to temporarily run on slowing clocks,
6295          * provided we notify them after, or to run on accelerating
6296          * clocks, provided we notify them before.  Thus time never
6297          * goes backwards.
6298          *
6299          * However, we have a problem.  We can't atomically update
6300          * the frequency of a given CPU from this function; it is
6301          * merely a notifier, which can be called from any CPU.
6302          * Changing the TSC frequency at arbitrary points in time
6303          * requires a recomputation of local variables related to
6304          * the TSC for each VCPU.  We must flag these local variables
6305          * to be updated and be sure the update takes place with the
6306          * new frequency before any guests proceed.
6307          *
6308          * Unfortunately, the combination of hotplug CPU and frequency
6309          * change creates an intractable locking scenario; the order
6310          * of when these callouts happen is undefined with respect to
6311          * CPU hotplug, and they can race with each other.  As such,
6312          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6313          * undefined; you can actually have a CPU frequency change take
6314          * place in between the computation of X and the setting of the
6315          * variable.  To protect against this problem, all updates of
6316          * the per_cpu tsc_khz variable are done in an interrupt
6317          * protected IPI, and all callers wishing to update the value
6318          * must wait for a synchronous IPI to complete (which is trivial
6319          * if the caller is on the CPU already).  This establishes the
6320          * necessary total order on variable updates.
6321          *
6322          * Note that because a guest time update may take place
6323          * anytime after the setting of the VCPU's request bit, the
6324          * correct TSC value must be set before the request.  However,
6325          * to ensure the update actually makes it to any guest which
6326          * starts running in hardware virtualization between the set
6327          * and the acquisition of the spinlock, we must also ping the
6328          * CPU after setting the request bit.
6329          *
6330          */
6331
6332         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6333                 return 0;
6334         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6335                 return 0;
6336
6337         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6338
6339         spin_lock(&kvm_lock);
6340         list_for_each_entry(kvm, &vm_list, vm_list) {
6341                 kvm_for_each_vcpu(i, vcpu, kvm) {
6342                         if (vcpu->cpu != freq->cpu)
6343                                 continue;
6344                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6345                         if (vcpu->cpu != smp_processor_id())
6346                                 send_ipi = 1;
6347                 }
6348         }
6349         spin_unlock(&kvm_lock);
6350
6351         if (freq->old < freq->new && send_ipi) {
6352                 /*
6353                  * We upscale the frequency.  Must make the guest
6354                  * doesn't see old kvmclock values while running with
6355                  * the new frequency, otherwise we risk the guest sees
6356                  * time go backwards.
6357                  *
6358                  * In case we update the frequency for another cpu
6359                  * (which might be in guest context) send an interrupt
6360                  * to kick the cpu out of guest context.  Next time
6361                  * guest context is entered kvmclock will be updated,
6362                  * so the guest will not see stale values.
6363                  */
6364                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6365         }
6366         return 0;
6367 }
6368
6369 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6370         .notifier_call  = kvmclock_cpufreq_notifier
6371 };
6372
6373 static int kvmclock_cpu_online(unsigned int cpu)
6374 {
6375         tsc_khz_changed(NULL);
6376         return 0;
6377 }
6378
6379 static void kvm_timer_init(void)
6380 {
6381         max_tsc_khz = tsc_khz;
6382
6383         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6384 #ifdef CONFIG_CPU_FREQ
6385                 struct cpufreq_policy policy;
6386                 int cpu;
6387
6388                 memset(&policy, 0, sizeof(policy));
6389                 cpu = get_cpu();
6390                 cpufreq_get_policy(&policy, cpu);
6391                 if (policy.cpuinfo.max_freq)
6392                         max_tsc_khz = policy.cpuinfo.max_freq;
6393                 put_cpu();
6394 #endif
6395                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6396                                           CPUFREQ_TRANSITION_NOTIFIER);
6397         }
6398         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6399
6400         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6401                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6402 }
6403
6404 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6405 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6406
6407 int kvm_is_in_guest(void)
6408 {
6409         return __this_cpu_read(current_vcpu) != NULL;
6410 }
6411
6412 static int kvm_is_user_mode(void)
6413 {
6414         int user_mode = 3;
6415
6416         if (__this_cpu_read(current_vcpu))
6417                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6418
6419         return user_mode != 0;
6420 }
6421
6422 static unsigned long kvm_get_guest_ip(void)
6423 {
6424         unsigned long ip = 0;
6425
6426         if (__this_cpu_read(current_vcpu))
6427                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6428
6429         return ip;
6430 }
6431
6432 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6433         .is_in_guest            = kvm_is_in_guest,
6434         .is_user_mode           = kvm_is_user_mode,
6435         .get_guest_ip           = kvm_get_guest_ip,
6436 };
6437
6438 static void kvm_set_mmio_spte_mask(void)
6439 {
6440         u64 mask;
6441         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6442
6443         /*
6444          * Set the reserved bits and the present bit of an paging-structure
6445          * entry to generate page fault with PFER.RSV = 1.
6446          */
6447          /* Mask the reserved physical address bits. */
6448         mask = rsvd_bits(maxphyaddr, 51);
6449
6450         /* Set the present bit. */
6451         mask |= 1ull;
6452
6453 #ifdef CONFIG_X86_64
6454         /*
6455          * If reserved bit is not supported, clear the present bit to disable
6456          * mmio page fault.
6457          */
6458         if (maxphyaddr == 52)
6459                 mask &= ~1ull;
6460 #endif
6461
6462         kvm_mmu_set_mmio_spte_mask(mask, mask);
6463 }
6464
6465 #ifdef CONFIG_X86_64
6466 static void pvclock_gtod_update_fn(struct work_struct *work)
6467 {
6468         struct kvm *kvm;
6469
6470         struct kvm_vcpu *vcpu;
6471         int i;
6472
6473         spin_lock(&kvm_lock);
6474         list_for_each_entry(kvm, &vm_list, vm_list)
6475                 kvm_for_each_vcpu(i, vcpu, kvm)
6476                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6477         atomic_set(&kvm_guest_has_master_clock, 0);
6478         spin_unlock(&kvm_lock);
6479 }
6480
6481 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6482
6483 /*
6484  * Notification about pvclock gtod data update.
6485  */
6486 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6487                                void *priv)
6488 {
6489         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6490         struct timekeeper *tk = priv;
6491
6492         update_pvclock_gtod(tk);
6493
6494         /* disable master clock if host does not trust, or does not
6495          * use, TSC based clocksource.
6496          */
6497         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6498             atomic_read(&kvm_guest_has_master_clock) != 0)
6499                 queue_work(system_long_wq, &pvclock_gtod_work);
6500
6501         return 0;
6502 }
6503
6504 static struct notifier_block pvclock_gtod_notifier = {
6505         .notifier_call = pvclock_gtod_notify,
6506 };
6507 #endif
6508
6509 int kvm_arch_init(void *opaque)
6510 {
6511         int r;
6512         struct kvm_x86_ops *ops = opaque;
6513
6514         if (kvm_x86_ops) {
6515                 printk(KERN_ERR "kvm: already loaded the other module\n");
6516                 r = -EEXIST;
6517                 goto out;
6518         }
6519
6520         if (!ops->cpu_has_kvm_support()) {
6521                 printk(KERN_ERR "kvm: no hardware support\n");
6522                 r = -EOPNOTSUPP;
6523                 goto out;
6524         }
6525         if (ops->disabled_by_bios()) {
6526                 printk(KERN_ERR "kvm: disabled by bios\n");
6527                 r = -EOPNOTSUPP;
6528                 goto out;
6529         }
6530
6531         r = -ENOMEM;
6532         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6533         if (!shared_msrs) {
6534                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6535                 goto out;
6536         }
6537
6538         r = kvm_mmu_module_init();
6539         if (r)
6540                 goto out_free_percpu;
6541
6542         kvm_set_mmio_spte_mask();
6543
6544         kvm_x86_ops = ops;
6545
6546         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6547                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6548                         PT_PRESENT_MASK, 0, sme_me_mask);
6549         kvm_timer_init();
6550
6551         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6552
6553         if (boot_cpu_has(X86_FEATURE_XSAVE))
6554                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6555
6556         kvm_lapic_init();
6557 #ifdef CONFIG_X86_64
6558         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6559
6560         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6561                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6562 #endif
6563
6564         return 0;
6565
6566 out_free_percpu:
6567         free_percpu(shared_msrs);
6568 out:
6569         return r;
6570 }
6571
6572 void kvm_arch_exit(void)
6573 {
6574 #ifdef CONFIG_X86_64
6575         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6576                 clear_hv_tscchange_cb();
6577 #endif
6578         kvm_lapic_exit();
6579         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6580
6581         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6582                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6583                                             CPUFREQ_TRANSITION_NOTIFIER);
6584         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6585 #ifdef CONFIG_X86_64
6586         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6587 #endif
6588         kvm_x86_ops = NULL;
6589         kvm_mmu_module_exit();
6590         free_percpu(shared_msrs);
6591 }
6592
6593 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6594 {
6595         ++vcpu->stat.halt_exits;
6596         if (lapic_in_kernel(vcpu)) {
6597                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6598                 return 1;
6599         } else {
6600                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6601                 return 0;
6602         }
6603 }
6604 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6605
6606 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6607 {
6608         int ret = kvm_skip_emulated_instruction(vcpu);
6609         /*
6610          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6611          * KVM_EXIT_DEBUG here.
6612          */
6613         return kvm_vcpu_halt(vcpu) && ret;
6614 }
6615 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6616
6617 #ifdef CONFIG_X86_64
6618 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6619                                 unsigned long clock_type)
6620 {
6621         struct kvm_clock_pairing clock_pairing;
6622         struct timespec ts;
6623         u64 cycle;
6624         int ret;
6625
6626         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6627                 return -KVM_EOPNOTSUPP;
6628
6629         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6630                 return -KVM_EOPNOTSUPP;
6631
6632         clock_pairing.sec = ts.tv_sec;
6633         clock_pairing.nsec = ts.tv_nsec;
6634         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6635         clock_pairing.flags = 0;
6636
6637         ret = 0;
6638         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6639                             sizeof(struct kvm_clock_pairing)))
6640                 ret = -KVM_EFAULT;
6641
6642         return ret;
6643 }
6644 #endif
6645
6646 /*
6647  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6648  *
6649  * @apicid - apicid of vcpu to be kicked.
6650  */
6651 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6652 {
6653         struct kvm_lapic_irq lapic_irq;
6654
6655         lapic_irq.shorthand = 0;
6656         lapic_irq.dest_mode = 0;
6657         lapic_irq.level = 0;
6658         lapic_irq.dest_id = apicid;
6659         lapic_irq.msi_redir_hint = false;
6660
6661         lapic_irq.delivery_mode = APIC_DM_REMRD;
6662         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6663 }
6664
6665 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6666 {
6667         vcpu->arch.apicv_active = false;
6668         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6669 }
6670
6671 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6672 {
6673         unsigned long nr, a0, a1, a2, a3, ret;
6674         int op_64_bit;
6675
6676         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6677                 return kvm_hv_hypercall(vcpu);
6678
6679         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6680         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6681         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6682         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6683         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6684
6685         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6686
6687         op_64_bit = is_64_bit_mode(vcpu);
6688         if (!op_64_bit) {
6689                 nr &= 0xFFFFFFFF;
6690                 a0 &= 0xFFFFFFFF;
6691                 a1 &= 0xFFFFFFFF;
6692                 a2 &= 0xFFFFFFFF;
6693                 a3 &= 0xFFFFFFFF;
6694         }
6695
6696         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6697                 ret = -KVM_EPERM;
6698                 goto out;
6699         }
6700
6701         switch (nr) {
6702         case KVM_HC_VAPIC_POLL_IRQ:
6703                 ret = 0;
6704                 break;
6705         case KVM_HC_KICK_CPU:
6706                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6707                 ret = 0;
6708                 break;
6709 #ifdef CONFIG_X86_64
6710         case KVM_HC_CLOCK_PAIRING:
6711                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6712                 break;
6713 #endif
6714         default:
6715                 ret = -KVM_ENOSYS;
6716                 break;
6717         }
6718 out:
6719         if (!op_64_bit)
6720                 ret = (u32)ret;
6721         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6722
6723         ++vcpu->stat.hypercalls;
6724         return kvm_skip_emulated_instruction(vcpu);
6725 }
6726 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6727
6728 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6729 {
6730         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6731         char instruction[3];
6732         unsigned long rip = kvm_rip_read(vcpu);
6733
6734         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6735
6736         return emulator_write_emulated(ctxt, rip, instruction, 3,
6737                 &ctxt->exception);
6738 }
6739
6740 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6741 {
6742         return vcpu->run->request_interrupt_window &&
6743                 likely(!pic_in_kernel(vcpu->kvm));
6744 }
6745
6746 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6747 {
6748         struct kvm_run *kvm_run = vcpu->run;
6749
6750         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6751         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6752         kvm_run->cr8 = kvm_get_cr8(vcpu);
6753         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6754         kvm_run->ready_for_interrupt_injection =
6755                 pic_in_kernel(vcpu->kvm) ||
6756                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6757 }
6758
6759 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6760 {
6761         int max_irr, tpr;
6762
6763         if (!kvm_x86_ops->update_cr8_intercept)
6764                 return;
6765
6766         if (!lapic_in_kernel(vcpu))
6767                 return;
6768
6769         if (vcpu->arch.apicv_active)
6770                 return;
6771
6772         if (!vcpu->arch.apic->vapic_addr)
6773                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6774         else
6775                 max_irr = -1;
6776
6777         if (max_irr != -1)
6778                 max_irr >>= 4;
6779
6780         tpr = kvm_lapic_get_cr8(vcpu);
6781
6782         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6783 }
6784
6785 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6786 {
6787         int r;
6788
6789         /* try to reinject previous events if any */
6790
6791         if (vcpu->arch.exception.injected)
6792                 kvm_x86_ops->queue_exception(vcpu);
6793         /*
6794          * Do not inject an NMI or interrupt if there is a pending
6795          * exception.  Exceptions and interrupts are recognized at
6796          * instruction boundaries, i.e. the start of an instruction.
6797          * Trap-like exceptions, e.g. #DB, have higher priority than
6798          * NMIs and interrupts, i.e. traps are recognized before an
6799          * NMI/interrupt that's pending on the same instruction.
6800          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
6801          * priority, but are only generated (pended) during instruction
6802          * execution, i.e. a pending fault-like exception means the
6803          * fault occurred on the *previous* instruction and must be
6804          * serviced prior to recognizing any new events in order to
6805          * fully complete the previous instruction.
6806          */
6807         else if (!vcpu->arch.exception.pending) {
6808                 if (vcpu->arch.nmi_injected)
6809                         kvm_x86_ops->set_nmi(vcpu);
6810                 else if (vcpu->arch.interrupt.injected)
6811                         kvm_x86_ops->set_irq(vcpu);
6812         }
6813
6814         /*
6815          * Call check_nested_events() even if we reinjected a previous event
6816          * in order for caller to determine if it should require immediate-exit
6817          * from L2 to L1 due to pending L1 events which require exit
6818          * from L2 to L1.
6819          */
6820         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6821                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6822                 if (r != 0)
6823                         return r;
6824         }
6825
6826         /* try to inject new event if pending */
6827         if (vcpu->arch.exception.pending) {
6828                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6829                                         vcpu->arch.exception.has_error_code,
6830                                         vcpu->arch.exception.error_code);
6831
6832                 WARN_ON_ONCE(vcpu->arch.exception.injected);
6833                 vcpu->arch.exception.pending = false;
6834                 vcpu->arch.exception.injected = true;
6835
6836                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6837                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6838                                              X86_EFLAGS_RF);
6839
6840                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6841                     (vcpu->arch.dr7 & DR7_GD)) {
6842                         vcpu->arch.dr7 &= ~DR7_GD;
6843                         kvm_update_dr7(vcpu);
6844                 }
6845
6846                 kvm_x86_ops->queue_exception(vcpu);
6847         }
6848
6849         /* Don't consider new event if we re-injected an event */
6850         if (kvm_event_needs_reinjection(vcpu))
6851                 return 0;
6852
6853         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
6854             kvm_x86_ops->smi_allowed(vcpu)) {
6855                 vcpu->arch.smi_pending = false;
6856                 ++vcpu->arch.smi_count;
6857                 enter_smm(vcpu);
6858         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6859                 --vcpu->arch.nmi_pending;
6860                 vcpu->arch.nmi_injected = true;
6861                 kvm_x86_ops->set_nmi(vcpu);
6862         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6863                 /*
6864                  * Because interrupts can be injected asynchronously, we are
6865                  * calling check_nested_events again here to avoid a race condition.
6866                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6867                  * proposal and current concerns.  Perhaps we should be setting
6868                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6869                  */
6870                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6871                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6872                         if (r != 0)
6873                                 return r;
6874                 }
6875                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6876                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6877                                             false);
6878                         kvm_x86_ops->set_irq(vcpu);
6879                 }
6880         }
6881
6882         return 0;
6883 }
6884
6885 static void process_nmi(struct kvm_vcpu *vcpu)
6886 {
6887         unsigned limit = 2;
6888
6889         /*
6890          * x86 is limited to one NMI running, and one NMI pending after it.
6891          * If an NMI is already in progress, limit further NMIs to just one.
6892          * Otherwise, allow two (and we'll inject the first one immediately).
6893          */
6894         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6895                 limit = 1;
6896
6897         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6898         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6899         kvm_make_request(KVM_REQ_EVENT, vcpu);
6900 }
6901
6902 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6903 {
6904         u32 flags = 0;
6905         flags |= seg->g       << 23;
6906         flags |= seg->db      << 22;
6907         flags |= seg->l       << 21;
6908         flags |= seg->avl     << 20;
6909         flags |= seg->present << 15;
6910         flags |= seg->dpl     << 13;
6911         flags |= seg->s       << 12;
6912         flags |= seg->type    << 8;
6913         return flags;
6914 }
6915
6916 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6917 {
6918         struct kvm_segment seg;
6919         int offset;
6920
6921         kvm_get_segment(vcpu, &seg, n);
6922         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6923
6924         if (n < 3)
6925                 offset = 0x7f84 + n * 12;
6926         else
6927                 offset = 0x7f2c + (n - 3) * 12;
6928
6929         put_smstate(u32, buf, offset + 8, seg.base);
6930         put_smstate(u32, buf, offset + 4, seg.limit);
6931         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6932 }
6933
6934 #ifdef CONFIG_X86_64
6935 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6936 {
6937         struct kvm_segment seg;
6938         int offset;
6939         u16 flags;
6940
6941         kvm_get_segment(vcpu, &seg, n);
6942         offset = 0x7e00 + n * 16;
6943
6944         flags = enter_smm_get_segment_flags(&seg) >> 8;
6945         put_smstate(u16, buf, offset, seg.selector);
6946         put_smstate(u16, buf, offset + 2, flags);
6947         put_smstate(u32, buf, offset + 4, seg.limit);
6948         put_smstate(u64, buf, offset + 8, seg.base);
6949 }
6950 #endif
6951
6952 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6953 {
6954         struct desc_ptr dt;
6955         struct kvm_segment seg;
6956         unsigned long val;
6957         int i;
6958
6959         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6960         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6961         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6962         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6963
6964         for (i = 0; i < 8; i++)
6965                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6966
6967         kvm_get_dr(vcpu, 6, &val);
6968         put_smstate(u32, buf, 0x7fcc, (u32)val);
6969         kvm_get_dr(vcpu, 7, &val);
6970         put_smstate(u32, buf, 0x7fc8, (u32)val);
6971
6972         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6973         put_smstate(u32, buf, 0x7fc4, seg.selector);
6974         put_smstate(u32, buf, 0x7f64, seg.base);
6975         put_smstate(u32, buf, 0x7f60, seg.limit);
6976         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6977
6978         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6979         put_smstate(u32, buf, 0x7fc0, seg.selector);
6980         put_smstate(u32, buf, 0x7f80, seg.base);
6981         put_smstate(u32, buf, 0x7f7c, seg.limit);
6982         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6983
6984         kvm_x86_ops->get_gdt(vcpu, &dt);
6985         put_smstate(u32, buf, 0x7f74, dt.address);
6986         put_smstate(u32, buf, 0x7f70, dt.size);
6987
6988         kvm_x86_ops->get_idt(vcpu, &dt);
6989         put_smstate(u32, buf, 0x7f58, dt.address);
6990         put_smstate(u32, buf, 0x7f54, dt.size);
6991
6992         for (i = 0; i < 6; i++)
6993                 enter_smm_save_seg_32(vcpu, buf, i);
6994
6995         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6996
6997         /* revision id */
6998         put_smstate(u32, buf, 0x7efc, 0x00020000);
6999         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7000 }
7001
7002 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7003 {
7004 #ifdef CONFIG_X86_64
7005         struct desc_ptr dt;
7006         struct kvm_segment seg;
7007         unsigned long val;
7008         int i;
7009
7010         for (i = 0; i < 16; i++)
7011                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7012
7013         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7014         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7015
7016         kvm_get_dr(vcpu, 6, &val);
7017         put_smstate(u64, buf, 0x7f68, val);
7018         kvm_get_dr(vcpu, 7, &val);
7019         put_smstate(u64, buf, 0x7f60, val);
7020
7021         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7022         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7023         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7024
7025         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7026
7027         /* revision id */
7028         put_smstate(u32, buf, 0x7efc, 0x00020064);
7029
7030         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7031
7032         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7033         put_smstate(u16, buf, 0x7e90, seg.selector);
7034         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7035         put_smstate(u32, buf, 0x7e94, seg.limit);
7036         put_smstate(u64, buf, 0x7e98, seg.base);
7037
7038         kvm_x86_ops->get_idt(vcpu, &dt);
7039         put_smstate(u32, buf, 0x7e84, dt.size);
7040         put_smstate(u64, buf, 0x7e88, dt.address);
7041
7042         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7043         put_smstate(u16, buf, 0x7e70, seg.selector);
7044         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7045         put_smstate(u32, buf, 0x7e74, seg.limit);
7046         put_smstate(u64, buf, 0x7e78, seg.base);
7047
7048         kvm_x86_ops->get_gdt(vcpu, &dt);
7049         put_smstate(u32, buf, 0x7e64, dt.size);
7050         put_smstate(u64, buf, 0x7e68, dt.address);
7051
7052         for (i = 0; i < 6; i++)
7053                 enter_smm_save_seg_64(vcpu, buf, i);
7054 #else
7055         WARN_ON_ONCE(1);
7056 #endif
7057 }
7058
7059 static void enter_smm(struct kvm_vcpu *vcpu)
7060 {
7061         struct kvm_segment cs, ds;
7062         struct desc_ptr dt;
7063         char buf[512];
7064         u32 cr0;
7065
7066         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7067         memset(buf, 0, 512);
7068         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7069                 enter_smm_save_state_64(vcpu, buf);
7070         else
7071                 enter_smm_save_state_32(vcpu, buf);
7072
7073         /*
7074          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7075          * vCPU state (e.g. leave guest mode) after we've saved the state into
7076          * the SMM state-save area.
7077          */
7078         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7079
7080         vcpu->arch.hflags |= HF_SMM_MASK;
7081         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7082
7083         if (kvm_x86_ops->get_nmi_mask(vcpu))
7084                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7085         else
7086                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7087
7088         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7089         kvm_rip_write(vcpu, 0x8000);
7090
7091         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7092         kvm_x86_ops->set_cr0(vcpu, cr0);
7093         vcpu->arch.cr0 = cr0;
7094
7095         kvm_x86_ops->set_cr4(vcpu, 0);
7096
7097         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7098         dt.address = dt.size = 0;
7099         kvm_x86_ops->set_idt(vcpu, &dt);
7100
7101         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7102
7103         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7104         cs.base = vcpu->arch.smbase;
7105
7106         ds.selector = 0;
7107         ds.base = 0;
7108
7109         cs.limit    = ds.limit = 0xffffffff;
7110         cs.type     = ds.type = 0x3;
7111         cs.dpl      = ds.dpl = 0;
7112         cs.db       = ds.db = 0;
7113         cs.s        = ds.s = 1;
7114         cs.l        = ds.l = 0;
7115         cs.g        = ds.g = 1;
7116         cs.avl      = ds.avl = 0;
7117         cs.present  = ds.present = 1;
7118         cs.unusable = ds.unusable = 0;
7119         cs.padding  = ds.padding = 0;
7120
7121         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7122         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7123         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7124         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7125         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7126         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7127
7128         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7129                 kvm_x86_ops->set_efer(vcpu, 0);
7130
7131         kvm_update_cpuid(vcpu);
7132         kvm_mmu_reset_context(vcpu);
7133 }
7134
7135 static void process_smi(struct kvm_vcpu *vcpu)
7136 {
7137         vcpu->arch.smi_pending = true;
7138         kvm_make_request(KVM_REQ_EVENT, vcpu);
7139 }
7140
7141 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7142 {
7143         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7144 }
7145
7146 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7147 {
7148         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7149                 return;
7150
7151         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7152
7153         if (irqchip_split(vcpu->kvm))
7154                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7155         else {
7156                 if (vcpu->arch.apicv_active)
7157                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7158                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7159         }
7160
7161         if (is_guest_mode(vcpu))
7162                 vcpu->arch.load_eoi_exitmap_pending = true;
7163         else
7164                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7165 }
7166
7167 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7168 {
7169         u64 eoi_exit_bitmap[4];
7170
7171         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7172                 return;
7173
7174         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7175                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7176         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7177 }
7178
7179 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7180                 unsigned long start, unsigned long end)
7181 {
7182         unsigned long apic_address;
7183
7184         /*
7185          * The physical address of apic access page is stored in the VMCS.
7186          * Update it when it becomes invalid.
7187          */
7188         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7189         if (start <= apic_address && apic_address < end)
7190                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7191 }
7192
7193 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7194 {
7195         struct page *page = NULL;
7196
7197         if (!lapic_in_kernel(vcpu))
7198                 return;
7199
7200         if (!kvm_x86_ops->set_apic_access_page_addr)
7201                 return;
7202
7203         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7204         if (is_error_page(page))
7205                 return;
7206         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7207
7208         /*
7209          * Do not pin apic access page in memory, the MMU notifier
7210          * will call us again if it is migrated or swapped out.
7211          */
7212         put_page(page);
7213 }
7214 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7215
7216 /*
7217  * Returns 1 to let vcpu_run() continue the guest execution loop without
7218  * exiting to the userspace.  Otherwise, the value will be returned to the
7219  * userspace.
7220  */
7221 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7222 {
7223         int r;
7224         bool req_int_win =
7225                 dm_request_for_irq_injection(vcpu) &&
7226                 kvm_cpu_accept_dm_intr(vcpu);
7227
7228         bool req_immediate_exit = false;
7229
7230         if (kvm_request_pending(vcpu)) {
7231                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7232                         kvm_mmu_unload(vcpu);
7233                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7234                         __kvm_migrate_timers(vcpu);
7235                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7236                         kvm_gen_update_masterclock(vcpu->kvm);
7237                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7238                         kvm_gen_kvmclock_update(vcpu);
7239                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7240                         r = kvm_guest_time_update(vcpu);
7241                         if (unlikely(r))
7242                                 goto out;
7243                 }
7244                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7245                         kvm_mmu_sync_roots(vcpu);
7246                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7247                         kvm_vcpu_flush_tlb(vcpu, true);
7248                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7249                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7250                         r = 0;
7251                         goto out;
7252                 }
7253                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7254                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7255                         vcpu->mmio_needed = 0;
7256                         r = 0;
7257                         goto out;
7258                 }
7259                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7260                         /* Page is swapped out. Do synthetic halt */
7261                         vcpu->arch.apf.halted = true;
7262                         r = 1;
7263                         goto out;
7264                 }
7265                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7266                         record_steal_time(vcpu);
7267                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7268                         process_smi(vcpu);
7269                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7270                         process_nmi(vcpu);
7271                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7272                         kvm_pmu_handle_event(vcpu);
7273                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7274                         kvm_pmu_deliver_pmi(vcpu);
7275                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7276                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7277                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7278                                      vcpu->arch.ioapic_handled_vectors)) {
7279                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7280                                 vcpu->run->eoi.vector =
7281                                                 vcpu->arch.pending_ioapic_eoi;
7282                                 r = 0;
7283                                 goto out;
7284                         }
7285                 }
7286                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7287                         vcpu_scan_ioapic(vcpu);
7288                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7289                         vcpu_load_eoi_exitmap(vcpu);
7290                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7291                         kvm_vcpu_reload_apic_access_page(vcpu);
7292                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7293                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7294                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7295                         r = 0;
7296                         goto out;
7297                 }
7298                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7299                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7300                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7301                         r = 0;
7302                         goto out;
7303                 }
7304                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7305                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7306                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7307                         r = 0;
7308                         goto out;
7309                 }
7310
7311                 /*
7312                  * KVM_REQ_HV_STIMER has to be processed after
7313                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7314                  * depend on the guest clock being up-to-date
7315                  */
7316                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7317                         kvm_hv_process_stimers(vcpu);
7318         }
7319
7320         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7321                 ++vcpu->stat.req_event;
7322                 kvm_apic_accept_events(vcpu);
7323                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7324                         r = 1;
7325                         goto out;
7326                 }
7327
7328                 if (inject_pending_event(vcpu, req_int_win) != 0)
7329                         req_immediate_exit = true;
7330                 else {
7331                         /* Enable SMI/NMI/IRQ window open exits if needed.
7332                          *
7333                          * SMIs have three cases:
7334                          * 1) They can be nested, and then there is nothing to
7335                          *    do here because RSM will cause a vmexit anyway.
7336                          * 2) There is an ISA-specific reason why SMI cannot be
7337                          *    injected, and the moment when this changes can be
7338                          *    intercepted.
7339                          * 3) Or the SMI can be pending because
7340                          *    inject_pending_event has completed the injection
7341                          *    of an IRQ or NMI from the previous vmexit, and
7342                          *    then we request an immediate exit to inject the
7343                          *    SMI.
7344                          */
7345                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7346                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7347                                         req_immediate_exit = true;
7348                         if (vcpu->arch.nmi_pending)
7349                                 kvm_x86_ops->enable_nmi_window(vcpu);
7350                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7351                                 kvm_x86_ops->enable_irq_window(vcpu);
7352                         WARN_ON(vcpu->arch.exception.pending);
7353                 }
7354
7355                 if (kvm_lapic_enabled(vcpu)) {
7356                         update_cr8_intercept(vcpu);
7357                         kvm_lapic_sync_to_vapic(vcpu);
7358                 }
7359         }
7360
7361         r = kvm_mmu_reload(vcpu);
7362         if (unlikely(r)) {
7363                 goto cancel_injection;
7364         }
7365
7366         preempt_disable();
7367
7368         kvm_x86_ops->prepare_guest_switch(vcpu);
7369
7370         /*
7371          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7372          * IPI are then delayed after guest entry, which ensures that they
7373          * result in virtual interrupt delivery.
7374          */
7375         local_irq_disable();
7376         vcpu->mode = IN_GUEST_MODE;
7377
7378         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7379
7380         /*
7381          * 1) We should set ->mode before checking ->requests.  Please see
7382          * the comment in kvm_vcpu_exiting_guest_mode().
7383          *
7384          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7385          * pairs with the memory barrier implicit in pi_test_and_set_on
7386          * (see vmx_deliver_posted_interrupt).
7387          *
7388          * 3) This also orders the write to mode from any reads to the page
7389          * tables done while the VCPU is running.  Please see the comment
7390          * in kvm_flush_remote_tlbs.
7391          */
7392         smp_mb__after_srcu_read_unlock();
7393
7394         /*
7395          * This handles the case where a posted interrupt was
7396          * notified with kvm_vcpu_kick.
7397          */
7398         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7399                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7400
7401         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7402             || need_resched() || signal_pending(current)) {
7403                 vcpu->mode = OUTSIDE_GUEST_MODE;
7404                 smp_wmb();
7405                 local_irq_enable();
7406                 preempt_enable();
7407                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7408                 r = 1;
7409                 goto cancel_injection;
7410         }
7411
7412         kvm_load_guest_xcr0(vcpu);
7413
7414         if (req_immediate_exit) {
7415                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7416                 smp_send_reschedule(vcpu->cpu);
7417         }
7418
7419         trace_kvm_entry(vcpu->vcpu_id);
7420         if (lapic_timer_advance_ns)
7421                 wait_lapic_expire(vcpu);
7422         guest_enter_irqoff();
7423
7424         if (unlikely(vcpu->arch.switch_db_regs)) {
7425                 set_debugreg(0, 7);
7426                 set_debugreg(vcpu->arch.eff_db[0], 0);
7427                 set_debugreg(vcpu->arch.eff_db[1], 1);
7428                 set_debugreg(vcpu->arch.eff_db[2], 2);
7429                 set_debugreg(vcpu->arch.eff_db[3], 3);
7430                 set_debugreg(vcpu->arch.dr6, 6);
7431                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7432         }
7433
7434         kvm_x86_ops->run(vcpu);
7435
7436         /*
7437          * Do this here before restoring debug registers on the host.  And
7438          * since we do this before handling the vmexit, a DR access vmexit
7439          * can (a) read the correct value of the debug registers, (b) set
7440          * KVM_DEBUGREG_WONT_EXIT again.
7441          */
7442         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7443                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7444                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7445                 kvm_update_dr0123(vcpu);
7446                 kvm_update_dr6(vcpu);
7447                 kvm_update_dr7(vcpu);
7448                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7449         }
7450
7451         /*
7452          * If the guest has used debug registers, at least dr7
7453          * will be disabled while returning to the host.
7454          * If we don't have active breakpoints in the host, we don't
7455          * care about the messed up debug address registers. But if
7456          * we have some of them active, restore the old state.
7457          */
7458         if (hw_breakpoint_active())
7459                 hw_breakpoint_restore();
7460
7461         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7462
7463         vcpu->mode = OUTSIDE_GUEST_MODE;
7464         smp_wmb();
7465
7466         kvm_put_guest_xcr0(vcpu);
7467
7468         kvm_before_interrupt(vcpu);
7469         kvm_x86_ops->handle_external_intr(vcpu);
7470         kvm_after_interrupt(vcpu);
7471
7472         ++vcpu->stat.exits;
7473
7474         guest_exit_irqoff();
7475
7476         local_irq_enable();
7477         preempt_enable();
7478
7479         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7480
7481         /*
7482          * Profile KVM exit RIPs:
7483          */
7484         if (unlikely(prof_on == KVM_PROFILING)) {
7485                 unsigned long rip = kvm_rip_read(vcpu);
7486                 profile_hit(KVM_PROFILING, (void *)rip);
7487         }
7488
7489         if (unlikely(vcpu->arch.tsc_always_catchup))
7490                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7491
7492         if (vcpu->arch.apic_attention)
7493                 kvm_lapic_sync_from_vapic(vcpu);
7494
7495         vcpu->arch.gpa_available = false;
7496         r = kvm_x86_ops->handle_exit(vcpu);
7497         return r;
7498
7499 cancel_injection:
7500         kvm_x86_ops->cancel_injection(vcpu);
7501         if (unlikely(vcpu->arch.apic_attention))
7502                 kvm_lapic_sync_from_vapic(vcpu);
7503 out:
7504         return r;
7505 }
7506
7507 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7508 {
7509         if (!kvm_arch_vcpu_runnable(vcpu) &&
7510             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7511                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7512                 kvm_vcpu_block(vcpu);
7513                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7514
7515                 if (kvm_x86_ops->post_block)
7516                         kvm_x86_ops->post_block(vcpu);
7517
7518                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7519                         return 1;
7520         }
7521
7522         kvm_apic_accept_events(vcpu);
7523         switch(vcpu->arch.mp_state) {
7524         case KVM_MP_STATE_HALTED:
7525                 vcpu->arch.pv.pv_unhalted = false;
7526                 vcpu->arch.mp_state =
7527                         KVM_MP_STATE_RUNNABLE;
7528         case KVM_MP_STATE_RUNNABLE:
7529                 vcpu->arch.apf.halted = false;
7530                 break;
7531         case KVM_MP_STATE_INIT_RECEIVED:
7532                 break;
7533         default:
7534                 return -EINTR;
7535                 break;
7536         }
7537         return 1;
7538 }
7539
7540 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7541 {
7542         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7543                 kvm_x86_ops->check_nested_events(vcpu, false);
7544
7545         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7546                 !vcpu->arch.apf.halted);
7547 }
7548
7549 static int vcpu_run(struct kvm_vcpu *vcpu)
7550 {
7551         int r;
7552         struct kvm *kvm = vcpu->kvm;
7553
7554         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7555
7556         for (;;) {
7557                 if (kvm_vcpu_running(vcpu)) {
7558                         r = vcpu_enter_guest(vcpu);
7559                 } else {
7560                         r = vcpu_block(kvm, vcpu);
7561                 }
7562
7563                 if (r <= 0)
7564                         break;
7565
7566                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7567                 if (kvm_cpu_has_pending_timer(vcpu))
7568                         kvm_inject_pending_timer_irqs(vcpu);
7569
7570                 if (dm_request_for_irq_injection(vcpu) &&
7571                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7572                         r = 0;
7573                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7574                         ++vcpu->stat.request_irq_exits;
7575                         break;
7576                 }
7577
7578                 kvm_check_async_pf_completion(vcpu);
7579
7580                 if (signal_pending(current)) {
7581                         r = -EINTR;
7582                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7583                         ++vcpu->stat.signal_exits;
7584                         break;
7585                 }
7586                 if (need_resched()) {
7587                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7588                         cond_resched();
7589                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7590                 }
7591         }
7592
7593         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7594
7595         return r;
7596 }
7597
7598 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7599 {
7600         int r;
7601         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7602         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7603         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7604         if (r != EMULATE_DONE)
7605                 return 0;
7606         return 1;
7607 }
7608
7609 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7610 {
7611         BUG_ON(!vcpu->arch.pio.count);
7612
7613         return complete_emulated_io(vcpu);
7614 }
7615
7616 /*
7617  * Implements the following, as a state machine:
7618  *
7619  * read:
7620  *   for each fragment
7621  *     for each mmio piece in the fragment
7622  *       write gpa, len
7623  *       exit
7624  *       copy data
7625  *   execute insn
7626  *
7627  * write:
7628  *   for each fragment
7629  *     for each mmio piece in the fragment
7630  *       write gpa, len
7631  *       copy data
7632  *       exit
7633  */
7634 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7635 {
7636         struct kvm_run *run = vcpu->run;
7637         struct kvm_mmio_fragment *frag;
7638         unsigned len;
7639
7640         BUG_ON(!vcpu->mmio_needed);
7641
7642         /* Complete previous fragment */
7643         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7644         len = min(8u, frag->len);
7645         if (!vcpu->mmio_is_write)
7646                 memcpy(frag->data, run->mmio.data, len);
7647
7648         if (frag->len <= 8) {
7649                 /* Switch to the next fragment. */
7650                 frag++;
7651                 vcpu->mmio_cur_fragment++;
7652         } else {
7653                 /* Go forward to the next mmio piece. */
7654                 frag->data += len;
7655                 frag->gpa += len;
7656                 frag->len -= len;
7657         }
7658
7659         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7660                 vcpu->mmio_needed = 0;
7661
7662                 /* FIXME: return into emulator if single-stepping.  */
7663                 if (vcpu->mmio_is_write)
7664                         return 1;
7665                 vcpu->mmio_read_completed = 1;
7666                 return complete_emulated_io(vcpu);
7667         }
7668
7669         run->exit_reason = KVM_EXIT_MMIO;
7670         run->mmio.phys_addr = frag->gpa;
7671         if (vcpu->mmio_is_write)
7672                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7673         run->mmio.len = min(8u, frag->len);
7674         run->mmio.is_write = vcpu->mmio_is_write;
7675         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7676         return 0;
7677 }
7678
7679 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7680 {
7681         int r;
7682
7683         vcpu_load(vcpu);
7684         kvm_sigset_activate(vcpu);
7685         kvm_load_guest_fpu(vcpu);
7686
7687         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7688                 if (kvm_run->immediate_exit) {
7689                         r = -EINTR;
7690                         goto out;
7691                 }
7692                 kvm_vcpu_block(vcpu);
7693                 kvm_apic_accept_events(vcpu);
7694                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7695                 r = -EAGAIN;
7696                 if (signal_pending(current)) {
7697                         r = -EINTR;
7698                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7699                         ++vcpu->stat.signal_exits;
7700                 }
7701                 goto out;
7702         }
7703
7704         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
7705                 r = -EINVAL;
7706                 goto out;
7707         }
7708
7709         if (vcpu->run->kvm_dirty_regs) {
7710                 r = sync_regs(vcpu);
7711                 if (r != 0)
7712                         goto out;
7713         }
7714
7715         /* re-sync apic's tpr */
7716         if (!lapic_in_kernel(vcpu)) {
7717                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7718                         r = -EINVAL;
7719                         goto out;
7720                 }
7721         }
7722
7723         if (unlikely(vcpu->arch.complete_userspace_io)) {
7724                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7725                 vcpu->arch.complete_userspace_io = NULL;
7726                 r = cui(vcpu);
7727                 if (r <= 0)
7728                         goto out;
7729         } else
7730                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7731
7732         if (kvm_run->immediate_exit)
7733                 r = -EINTR;
7734         else
7735                 r = vcpu_run(vcpu);
7736
7737 out:
7738         kvm_put_guest_fpu(vcpu);
7739         if (vcpu->run->kvm_valid_regs)
7740                 store_regs(vcpu);
7741         post_kvm_run_save(vcpu);
7742         kvm_sigset_deactivate(vcpu);
7743
7744         vcpu_put(vcpu);
7745         return r;
7746 }
7747
7748 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7749 {
7750         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7751                 /*
7752                  * We are here if userspace calls get_regs() in the middle of
7753                  * instruction emulation. Registers state needs to be copied
7754                  * back from emulation context to vcpu. Userspace shouldn't do
7755                  * that usually, but some bad designed PV devices (vmware
7756                  * backdoor interface) need this to work
7757                  */
7758                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7759                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7760         }
7761         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7762         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7763         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7764         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7765         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7766         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7767         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7768         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7769 #ifdef CONFIG_X86_64
7770         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7771         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7772         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7773         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7774         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7775         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7776         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7777         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7778 #endif
7779
7780         regs->rip = kvm_rip_read(vcpu);
7781         regs->rflags = kvm_get_rflags(vcpu);
7782 }
7783
7784 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7785 {
7786         vcpu_load(vcpu);
7787         __get_regs(vcpu, regs);
7788         vcpu_put(vcpu);
7789         return 0;
7790 }
7791
7792 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7793 {
7794         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7795         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7796
7797         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7798         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7799         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7800         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7801         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7802         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7803         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7804         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7805 #ifdef CONFIG_X86_64
7806         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7807         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7808         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7809         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7810         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7811         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7812         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7813         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7814 #endif
7815
7816         kvm_rip_write(vcpu, regs->rip);
7817         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7818
7819         vcpu->arch.exception.pending = false;
7820
7821         kvm_make_request(KVM_REQ_EVENT, vcpu);
7822 }
7823
7824 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7825 {
7826         vcpu_load(vcpu);
7827         __set_regs(vcpu, regs);
7828         vcpu_put(vcpu);
7829         return 0;
7830 }
7831
7832 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7833 {
7834         struct kvm_segment cs;
7835
7836         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7837         *db = cs.db;
7838         *l = cs.l;
7839 }
7840 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7841
7842 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7843 {
7844         struct desc_ptr dt;
7845
7846         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7847         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7848         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7849         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7850         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7851         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7852
7853         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7854         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7855
7856         kvm_x86_ops->get_idt(vcpu, &dt);
7857         sregs->idt.limit = dt.size;
7858         sregs->idt.base = dt.address;
7859         kvm_x86_ops->get_gdt(vcpu, &dt);
7860         sregs->gdt.limit = dt.size;
7861         sregs->gdt.base = dt.address;
7862
7863         sregs->cr0 = kvm_read_cr0(vcpu);
7864         sregs->cr2 = vcpu->arch.cr2;
7865         sregs->cr3 = kvm_read_cr3(vcpu);
7866         sregs->cr4 = kvm_read_cr4(vcpu);
7867         sregs->cr8 = kvm_get_cr8(vcpu);
7868         sregs->efer = vcpu->arch.efer;
7869         sregs->apic_base = kvm_get_apic_base(vcpu);
7870
7871         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7872
7873         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
7874                 set_bit(vcpu->arch.interrupt.nr,
7875                         (unsigned long *)sregs->interrupt_bitmap);
7876 }
7877
7878 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7879                                   struct kvm_sregs *sregs)
7880 {
7881         vcpu_load(vcpu);
7882         __get_sregs(vcpu, sregs);
7883         vcpu_put(vcpu);
7884         return 0;
7885 }
7886
7887 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7888                                     struct kvm_mp_state *mp_state)
7889 {
7890         vcpu_load(vcpu);
7891
7892         kvm_apic_accept_events(vcpu);
7893         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7894                                         vcpu->arch.pv.pv_unhalted)
7895                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7896         else
7897                 mp_state->mp_state = vcpu->arch.mp_state;
7898
7899         vcpu_put(vcpu);
7900         return 0;
7901 }
7902
7903 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7904                                     struct kvm_mp_state *mp_state)
7905 {
7906         int ret = -EINVAL;
7907
7908         vcpu_load(vcpu);
7909
7910         if (!lapic_in_kernel(vcpu) &&
7911             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7912                 goto out;
7913
7914         /* INITs are latched while in SMM */
7915         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7916             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7917              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7918                 goto out;
7919
7920         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7921                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7922                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7923         } else
7924                 vcpu->arch.mp_state = mp_state->mp_state;
7925         kvm_make_request(KVM_REQ_EVENT, vcpu);
7926
7927         ret = 0;
7928 out:
7929         vcpu_put(vcpu);
7930         return ret;
7931 }
7932
7933 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7934                     int reason, bool has_error_code, u32 error_code)
7935 {
7936         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7937         int ret;
7938
7939         init_emulate_ctxt(vcpu);
7940
7941         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7942                                    has_error_code, error_code);
7943
7944         if (ret)
7945                 return EMULATE_FAIL;
7946
7947         kvm_rip_write(vcpu, ctxt->eip);
7948         kvm_set_rflags(vcpu, ctxt->eflags);
7949         kvm_make_request(KVM_REQ_EVENT, vcpu);
7950         return EMULATE_DONE;
7951 }
7952 EXPORT_SYMBOL_GPL(kvm_task_switch);
7953
7954 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7955 {
7956         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
7957                 /*
7958                  * When EFER.LME and CR0.PG are set, the processor is in
7959                  * 64-bit mode (though maybe in a 32-bit code segment).
7960                  * CR4.PAE and EFER.LMA must be set.
7961                  */
7962                 if (!(sregs->cr4 & X86_CR4_PAE)
7963                     || !(sregs->efer & EFER_LMA))
7964                         return -EINVAL;
7965         } else {
7966                 /*
7967                  * Not in 64-bit mode: EFER.LMA is clear and the code
7968                  * segment cannot be 64-bit.
7969                  */
7970                 if (sregs->efer & EFER_LMA || sregs->cs.l)
7971                         return -EINVAL;
7972         }
7973
7974         return 0;
7975 }
7976
7977 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7978 {
7979         struct msr_data apic_base_msr;
7980         int mmu_reset_needed = 0;
7981         int cpuid_update_needed = 0;
7982         int pending_vec, max_bits, idx;
7983         struct desc_ptr dt;
7984         int ret = -EINVAL;
7985
7986         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7987                         (sregs->cr4 & X86_CR4_OSXSAVE))
7988                 goto out;
7989
7990         if (kvm_valid_sregs(vcpu, sregs))
7991                 goto out;
7992
7993         apic_base_msr.data = sregs->apic_base;
7994         apic_base_msr.host_initiated = true;
7995         if (kvm_set_apic_base(vcpu, &apic_base_msr))
7996                 goto out;
7997
7998         dt.size = sregs->idt.limit;
7999         dt.address = sregs->idt.base;
8000         kvm_x86_ops->set_idt(vcpu, &dt);
8001         dt.size = sregs->gdt.limit;
8002         dt.address = sregs->gdt.base;
8003         kvm_x86_ops->set_gdt(vcpu, &dt);
8004
8005         vcpu->arch.cr2 = sregs->cr2;
8006         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8007         vcpu->arch.cr3 = sregs->cr3;
8008         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8009
8010         kvm_set_cr8(vcpu, sregs->cr8);
8011
8012         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8013         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8014
8015         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8016         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8017         vcpu->arch.cr0 = sregs->cr0;
8018
8019         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8020         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8021                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8022         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8023         if (cpuid_update_needed)
8024                 kvm_update_cpuid(vcpu);
8025
8026         idx = srcu_read_lock(&vcpu->kvm->srcu);
8027         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
8028                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8029                 mmu_reset_needed = 1;
8030         }
8031         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8032
8033         if (mmu_reset_needed)
8034                 kvm_mmu_reset_context(vcpu);
8035
8036         max_bits = KVM_NR_INTERRUPTS;
8037         pending_vec = find_first_bit(
8038                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8039         if (pending_vec < max_bits) {
8040                 kvm_queue_interrupt(vcpu, pending_vec, false);
8041                 pr_debug("Set back pending irq %d\n", pending_vec);
8042         }
8043
8044         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8045         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8046         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8047         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8048         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8049         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8050
8051         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8052         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8053
8054         update_cr8_intercept(vcpu);
8055
8056         /* Older userspace won't unhalt the vcpu on reset. */
8057         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8058             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8059             !is_protmode(vcpu))
8060                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8061
8062         kvm_make_request(KVM_REQ_EVENT, vcpu);
8063
8064         ret = 0;
8065 out:
8066         return ret;
8067 }
8068
8069 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8070                                   struct kvm_sregs *sregs)
8071 {
8072         int ret;
8073
8074         vcpu_load(vcpu);
8075         ret = __set_sregs(vcpu, sregs);
8076         vcpu_put(vcpu);
8077         return ret;
8078 }
8079
8080 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8081                                         struct kvm_guest_debug *dbg)
8082 {
8083         unsigned long rflags;
8084         int i, r;
8085
8086         vcpu_load(vcpu);
8087
8088         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8089                 r = -EBUSY;
8090                 if (vcpu->arch.exception.pending)
8091                         goto out;
8092                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8093                         kvm_queue_exception(vcpu, DB_VECTOR);
8094                 else
8095                         kvm_queue_exception(vcpu, BP_VECTOR);
8096         }
8097
8098         /*
8099          * Read rflags as long as potentially injected trace flags are still
8100          * filtered out.
8101          */
8102         rflags = kvm_get_rflags(vcpu);
8103
8104         vcpu->guest_debug = dbg->control;
8105         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8106                 vcpu->guest_debug = 0;
8107
8108         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8109                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8110                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8111                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8112         } else {
8113                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8114                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8115         }
8116         kvm_update_dr7(vcpu);
8117
8118         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8119                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8120                         get_segment_base(vcpu, VCPU_SREG_CS);
8121
8122         /*
8123          * Trigger an rflags update that will inject or remove the trace
8124          * flags.
8125          */
8126         kvm_set_rflags(vcpu, rflags);
8127
8128         kvm_x86_ops->update_bp_intercept(vcpu);
8129
8130         r = 0;
8131
8132 out:
8133         vcpu_put(vcpu);
8134         return r;
8135 }
8136
8137 /*
8138  * Translate a guest virtual address to a guest physical address.
8139  */
8140 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8141                                     struct kvm_translation *tr)
8142 {
8143         unsigned long vaddr = tr->linear_address;
8144         gpa_t gpa;
8145         int idx;
8146
8147         vcpu_load(vcpu);
8148
8149         idx = srcu_read_lock(&vcpu->kvm->srcu);
8150         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8151         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8152         tr->physical_address = gpa;
8153         tr->valid = gpa != UNMAPPED_GVA;
8154         tr->writeable = 1;
8155         tr->usermode = 0;
8156
8157         vcpu_put(vcpu);
8158         return 0;
8159 }
8160
8161 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8162 {
8163         struct fxregs_state *fxsave;
8164
8165         vcpu_load(vcpu);
8166
8167         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8168         memcpy(fpu->fpr, fxsave->st_space, 128);
8169         fpu->fcw = fxsave->cwd;
8170         fpu->fsw = fxsave->swd;
8171         fpu->ftwx = fxsave->twd;
8172         fpu->last_opcode = fxsave->fop;
8173         fpu->last_ip = fxsave->rip;
8174         fpu->last_dp = fxsave->rdp;
8175         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
8176
8177         vcpu_put(vcpu);
8178         return 0;
8179 }
8180
8181 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8182 {
8183         struct fxregs_state *fxsave;
8184
8185         vcpu_load(vcpu);
8186
8187         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8188
8189         memcpy(fxsave->st_space, fpu->fpr, 128);
8190         fxsave->cwd = fpu->fcw;
8191         fxsave->swd = fpu->fsw;
8192         fxsave->twd = fpu->ftwx;
8193         fxsave->fop = fpu->last_opcode;
8194         fxsave->rip = fpu->last_ip;
8195         fxsave->rdp = fpu->last_dp;
8196         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
8197
8198         vcpu_put(vcpu);
8199         return 0;
8200 }
8201
8202 static void store_regs(struct kvm_vcpu *vcpu)
8203 {
8204         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8205
8206         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8207                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8208
8209         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8210                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8211
8212         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8213                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8214                                 vcpu, &vcpu->run->s.regs.events);
8215 }
8216
8217 static int sync_regs(struct kvm_vcpu *vcpu)
8218 {
8219         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8220                 return -EINVAL;
8221
8222         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8223                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8224                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8225         }
8226         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8227                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8228                         return -EINVAL;
8229                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8230         }
8231         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8232                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8233                                 vcpu, &vcpu->run->s.regs.events))
8234                         return -EINVAL;
8235                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8236         }
8237
8238         return 0;
8239 }
8240
8241 static void fx_init(struct kvm_vcpu *vcpu)
8242 {
8243         fpstate_init(&vcpu->arch.guest_fpu.state);
8244         if (boot_cpu_has(X86_FEATURE_XSAVES))
8245                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8246                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8247
8248         /*
8249          * Ensure guest xcr0 is valid for loading
8250          */
8251         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8252
8253         vcpu->arch.cr0 |= X86_CR0_ET;
8254 }
8255
8256 /* Swap (qemu) user FPU context for the guest FPU context. */
8257 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8258 {
8259         preempt_disable();
8260         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8261         /* PKRU is separately restored in kvm_x86_ops->run.  */
8262         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8263                                 ~XFEATURE_MASK_PKRU);
8264         preempt_enable();
8265         trace_kvm_fpu(1);
8266 }
8267
8268 /* When vcpu_run ends, restore user space FPU context. */
8269 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8270 {
8271         preempt_disable();
8272         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8273         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8274         preempt_enable();
8275         ++vcpu->stat.fpu_reload;
8276         trace_kvm_fpu(0);
8277 }
8278
8279 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8280 {
8281         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8282
8283         kvmclock_reset(vcpu);
8284
8285         kvm_x86_ops->vcpu_free(vcpu);
8286         free_cpumask_var(wbinvd_dirty_mask);
8287 }
8288
8289 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8290                                                 unsigned int id)
8291 {
8292         struct kvm_vcpu *vcpu;
8293
8294         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8295                 printk_once(KERN_WARNING
8296                 "kvm: SMP vm created on host with unstable TSC; "
8297                 "guest TSC will not be reliable\n");
8298
8299         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8300
8301         return vcpu;
8302 }
8303
8304 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8305 {
8306         kvm_vcpu_mtrr_init(vcpu);
8307         vcpu_load(vcpu);
8308         kvm_vcpu_reset(vcpu, false);
8309         kvm_mmu_setup(vcpu);
8310         vcpu_put(vcpu);
8311         return 0;
8312 }
8313
8314 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8315 {
8316         struct msr_data msr;
8317         struct kvm *kvm = vcpu->kvm;
8318
8319         kvm_hv_vcpu_postcreate(vcpu);
8320
8321         if (mutex_lock_killable(&vcpu->mutex))
8322                 return;
8323         vcpu_load(vcpu);
8324         msr.data = 0x0;
8325         msr.index = MSR_IA32_TSC;
8326         msr.host_initiated = true;
8327         kvm_write_tsc(vcpu, &msr);
8328         vcpu_put(vcpu);
8329         mutex_unlock(&vcpu->mutex);
8330
8331         if (!kvmclock_periodic_sync)
8332                 return;
8333
8334         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8335                                         KVMCLOCK_SYNC_PERIOD);
8336 }
8337
8338 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8339 {
8340         vcpu->arch.apf.msr_val = 0;
8341
8342         vcpu_load(vcpu);
8343         kvm_mmu_unload(vcpu);
8344         vcpu_put(vcpu);
8345
8346         kvm_x86_ops->vcpu_free(vcpu);
8347 }
8348
8349 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8350 {
8351         kvm_lapic_reset(vcpu, init_event);
8352
8353         vcpu->arch.hflags = 0;
8354
8355         vcpu->arch.smi_pending = 0;
8356         vcpu->arch.smi_count = 0;
8357         atomic_set(&vcpu->arch.nmi_queued, 0);
8358         vcpu->arch.nmi_pending = 0;
8359         vcpu->arch.nmi_injected = false;
8360         kvm_clear_interrupt_queue(vcpu);
8361         kvm_clear_exception_queue(vcpu);
8362         vcpu->arch.exception.pending = false;
8363
8364         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8365         kvm_update_dr0123(vcpu);
8366         vcpu->arch.dr6 = DR6_INIT;
8367         kvm_update_dr6(vcpu);
8368         vcpu->arch.dr7 = DR7_FIXED_1;
8369         kvm_update_dr7(vcpu);
8370
8371         vcpu->arch.cr2 = 0;
8372
8373         kvm_make_request(KVM_REQ_EVENT, vcpu);
8374         vcpu->arch.apf.msr_val = 0;
8375         vcpu->arch.st.msr_val = 0;
8376
8377         kvmclock_reset(vcpu);
8378
8379         kvm_clear_async_pf_completion_queue(vcpu);
8380         kvm_async_pf_hash_reset(vcpu);
8381         vcpu->arch.apf.halted = false;
8382
8383         if (kvm_mpx_supported()) {
8384                 void *mpx_state_buffer;
8385
8386                 /*
8387                  * To avoid have the INIT path from kvm_apic_has_events() that be
8388                  * called with loaded FPU and does not let userspace fix the state.
8389                  */
8390                 if (init_event)
8391                         kvm_put_guest_fpu(vcpu);
8392                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8393                                         XFEATURE_MASK_BNDREGS);
8394                 if (mpx_state_buffer)
8395                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8396                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8397                                         XFEATURE_MASK_BNDCSR);
8398                 if (mpx_state_buffer)
8399                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8400                 if (init_event)
8401                         kvm_load_guest_fpu(vcpu);
8402         }
8403
8404         if (!init_event) {
8405                 kvm_pmu_reset(vcpu);
8406                 vcpu->arch.smbase = 0x30000;
8407
8408                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8409                 vcpu->arch.msr_misc_features_enables = 0;
8410
8411                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8412         }
8413
8414         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8415         vcpu->arch.regs_avail = ~0;
8416         vcpu->arch.regs_dirty = ~0;
8417
8418         vcpu->arch.ia32_xss = 0;
8419
8420         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8421 }
8422
8423 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8424 {
8425         struct kvm_segment cs;
8426
8427         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8428         cs.selector = vector << 8;
8429         cs.base = vector << 12;
8430         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8431         kvm_rip_write(vcpu, 0);
8432 }
8433
8434 int kvm_arch_hardware_enable(void)
8435 {
8436         struct kvm *kvm;
8437         struct kvm_vcpu *vcpu;
8438         int i;
8439         int ret;
8440         u64 local_tsc;
8441         u64 max_tsc = 0;
8442         bool stable, backwards_tsc = false;
8443
8444         kvm_shared_msr_cpu_online();
8445         ret = kvm_x86_ops->hardware_enable();
8446         if (ret != 0)
8447                 return ret;
8448
8449         local_tsc = rdtsc();
8450         stable = !kvm_check_tsc_unstable();
8451         list_for_each_entry(kvm, &vm_list, vm_list) {
8452                 kvm_for_each_vcpu(i, vcpu, kvm) {
8453                         if (!stable && vcpu->cpu == smp_processor_id())
8454                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8455                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8456                                 backwards_tsc = true;
8457                                 if (vcpu->arch.last_host_tsc > max_tsc)
8458                                         max_tsc = vcpu->arch.last_host_tsc;
8459                         }
8460                 }
8461         }
8462
8463         /*
8464          * Sometimes, even reliable TSCs go backwards.  This happens on
8465          * platforms that reset TSC during suspend or hibernate actions, but
8466          * maintain synchronization.  We must compensate.  Fortunately, we can
8467          * detect that condition here, which happens early in CPU bringup,
8468          * before any KVM threads can be running.  Unfortunately, we can't
8469          * bring the TSCs fully up to date with real time, as we aren't yet far
8470          * enough into CPU bringup that we know how much real time has actually
8471          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8472          * variables that haven't been updated yet.
8473          *
8474          * So we simply find the maximum observed TSC above, then record the
8475          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8476          * the adjustment will be applied.  Note that we accumulate
8477          * adjustments, in case multiple suspend cycles happen before some VCPU
8478          * gets a chance to run again.  In the event that no KVM threads get a
8479          * chance to run, we will miss the entire elapsed period, as we'll have
8480          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8481          * loose cycle time.  This isn't too big a deal, since the loss will be
8482          * uniform across all VCPUs (not to mention the scenario is extremely
8483          * unlikely). It is possible that a second hibernate recovery happens
8484          * much faster than a first, causing the observed TSC here to be
8485          * smaller; this would require additional padding adjustment, which is
8486          * why we set last_host_tsc to the local tsc observed here.
8487          *
8488          * N.B. - this code below runs only on platforms with reliable TSC,
8489          * as that is the only way backwards_tsc is set above.  Also note
8490          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8491          * have the same delta_cyc adjustment applied if backwards_tsc
8492          * is detected.  Note further, this adjustment is only done once,
8493          * as we reset last_host_tsc on all VCPUs to stop this from being
8494          * called multiple times (one for each physical CPU bringup).
8495          *
8496          * Platforms with unreliable TSCs don't have to deal with this, they
8497          * will be compensated by the logic in vcpu_load, which sets the TSC to
8498          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8499          * guarantee that they stay in perfect synchronization.
8500          */
8501         if (backwards_tsc) {
8502                 u64 delta_cyc = max_tsc - local_tsc;
8503                 list_for_each_entry(kvm, &vm_list, vm_list) {
8504                         kvm->arch.backwards_tsc_observed = true;
8505                         kvm_for_each_vcpu(i, vcpu, kvm) {
8506                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8507                                 vcpu->arch.last_host_tsc = local_tsc;
8508                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8509                         }
8510
8511                         /*
8512                          * We have to disable TSC offset matching.. if you were
8513                          * booting a VM while issuing an S4 host suspend....
8514                          * you may have some problem.  Solving this issue is
8515                          * left as an exercise to the reader.
8516                          */
8517                         kvm->arch.last_tsc_nsec = 0;
8518                         kvm->arch.last_tsc_write = 0;
8519                 }
8520
8521         }
8522         return 0;
8523 }
8524
8525 void kvm_arch_hardware_disable(void)
8526 {
8527         kvm_x86_ops->hardware_disable();
8528         drop_user_return_notifiers();
8529 }
8530
8531 int kvm_arch_hardware_setup(void)
8532 {
8533         int r;
8534
8535         r = kvm_x86_ops->hardware_setup();
8536         if (r != 0)
8537                 return r;
8538
8539         if (kvm_has_tsc_control) {
8540                 /*
8541                  * Make sure the user can only configure tsc_khz values that
8542                  * fit into a signed integer.
8543                  * A min value is not calculated needed because it will always
8544                  * be 1 on all machines.
8545                  */
8546                 u64 max = min(0x7fffffffULL,
8547                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8548                 kvm_max_guest_tsc_khz = max;
8549
8550                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8551         }
8552
8553         kvm_init_msr_list();
8554         return 0;
8555 }
8556
8557 void kvm_arch_hardware_unsetup(void)
8558 {
8559         kvm_x86_ops->hardware_unsetup();
8560 }
8561
8562 void kvm_arch_check_processor_compat(void *rtn)
8563 {
8564         kvm_x86_ops->check_processor_compatibility(rtn);
8565 }
8566
8567 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8568 {
8569         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8570 }
8571 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8572
8573 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8574 {
8575         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8576 }
8577
8578 struct static_key kvm_no_apic_vcpu __read_mostly;
8579 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8580
8581 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8582 {
8583         struct page *page;
8584         int r;
8585
8586         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8587         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8588         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8589                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8590         else
8591                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8592
8593         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8594         if (!page) {
8595                 r = -ENOMEM;
8596                 goto fail;
8597         }
8598         vcpu->arch.pio_data = page_address(page);
8599
8600         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8601
8602         r = kvm_mmu_create(vcpu);
8603         if (r < 0)
8604                 goto fail_free_pio_data;
8605
8606         if (irqchip_in_kernel(vcpu->kvm)) {
8607                 r = kvm_create_lapic(vcpu);
8608                 if (r < 0)
8609                         goto fail_mmu_destroy;
8610         } else
8611                 static_key_slow_inc(&kvm_no_apic_vcpu);
8612
8613         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8614                                        GFP_KERNEL);
8615         if (!vcpu->arch.mce_banks) {
8616                 r = -ENOMEM;
8617                 goto fail_free_lapic;
8618         }
8619         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8620
8621         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8622                 r = -ENOMEM;
8623                 goto fail_free_mce_banks;
8624         }
8625
8626         fx_init(vcpu);
8627
8628         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8629
8630         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8631
8632         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8633
8634         kvm_async_pf_hash_reset(vcpu);
8635         kvm_pmu_init(vcpu);
8636
8637         vcpu->arch.pending_external_vector = -1;
8638         vcpu->arch.preempted_in_kernel = false;
8639
8640         kvm_hv_vcpu_init(vcpu);
8641
8642         return 0;
8643
8644 fail_free_mce_banks:
8645         kfree(vcpu->arch.mce_banks);
8646 fail_free_lapic:
8647         kvm_free_lapic(vcpu);
8648 fail_mmu_destroy:
8649         kvm_mmu_destroy(vcpu);
8650 fail_free_pio_data:
8651         free_page((unsigned long)vcpu->arch.pio_data);
8652 fail:
8653         return r;
8654 }
8655
8656 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8657 {
8658         int idx;
8659
8660         kvm_hv_vcpu_uninit(vcpu);
8661         kvm_pmu_destroy(vcpu);
8662         kfree(vcpu->arch.mce_banks);
8663         kvm_free_lapic(vcpu);
8664         idx = srcu_read_lock(&vcpu->kvm->srcu);
8665         kvm_mmu_destroy(vcpu);
8666         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8667         free_page((unsigned long)vcpu->arch.pio_data);
8668         if (!lapic_in_kernel(vcpu))
8669                 static_key_slow_dec(&kvm_no_apic_vcpu);
8670 }
8671
8672 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8673 {
8674         kvm_x86_ops->sched_in(vcpu, cpu);
8675 }
8676
8677 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8678 {
8679         if (type)
8680                 return -EINVAL;
8681
8682         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8683         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8684         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8685         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8686         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8687
8688         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8689         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8690         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8691         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8692                 &kvm->arch.irq_sources_bitmap);
8693
8694         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8695         mutex_init(&kvm->arch.apic_map_lock);
8696         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8697
8698         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8699         pvclock_update_vm_gtod_copy(kvm);
8700
8701         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8702         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8703
8704         kvm_hv_init_vm(kvm);
8705         kvm_page_track_init(kvm);
8706         kvm_mmu_init_vm(kvm);
8707
8708         if (kvm_x86_ops->vm_init)
8709                 return kvm_x86_ops->vm_init(kvm);
8710
8711         return 0;
8712 }
8713
8714 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8715 {
8716         vcpu_load(vcpu);
8717         kvm_mmu_unload(vcpu);
8718         vcpu_put(vcpu);
8719 }
8720
8721 static void kvm_free_vcpus(struct kvm *kvm)
8722 {
8723         unsigned int i;
8724         struct kvm_vcpu *vcpu;
8725
8726         /*
8727          * Unpin any mmu pages first.
8728          */
8729         kvm_for_each_vcpu(i, vcpu, kvm) {
8730                 kvm_clear_async_pf_completion_queue(vcpu);
8731                 kvm_unload_vcpu_mmu(vcpu);
8732         }
8733         kvm_for_each_vcpu(i, vcpu, kvm)
8734                 kvm_arch_vcpu_free(vcpu);
8735
8736         mutex_lock(&kvm->lock);
8737         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8738                 kvm->vcpus[i] = NULL;
8739
8740         atomic_set(&kvm->online_vcpus, 0);
8741         mutex_unlock(&kvm->lock);
8742 }
8743
8744 void kvm_arch_sync_events(struct kvm *kvm)
8745 {
8746         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8747         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8748         kvm_free_pit(kvm);
8749 }
8750
8751 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8752 {
8753         int i, r;
8754         unsigned long hva;
8755         struct kvm_memslots *slots = kvm_memslots(kvm);
8756         struct kvm_memory_slot *slot, old;
8757
8758         /* Called with kvm->slots_lock held.  */
8759         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8760                 return -EINVAL;
8761
8762         slot = id_to_memslot(slots, id);
8763         if (size) {
8764                 if (slot->npages)
8765                         return -EEXIST;
8766
8767                 /*
8768                  * MAP_SHARED to prevent internal slot pages from being moved
8769                  * by fork()/COW.
8770                  */
8771                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8772                               MAP_SHARED | MAP_ANONYMOUS, 0);
8773                 if (IS_ERR((void *)hva))
8774                         return PTR_ERR((void *)hva);
8775         } else {
8776                 if (!slot->npages)
8777                         return 0;
8778
8779                 hva = 0;
8780         }
8781
8782         old = *slot;
8783         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8784                 struct kvm_userspace_memory_region m;
8785
8786                 m.slot = id | (i << 16);
8787                 m.flags = 0;
8788                 m.guest_phys_addr = gpa;
8789                 m.userspace_addr = hva;
8790                 m.memory_size = size;
8791                 r = __kvm_set_memory_region(kvm, &m);
8792                 if (r < 0)
8793                         return r;
8794         }
8795
8796         if (!size)
8797                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8798
8799         return 0;
8800 }
8801 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8802
8803 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8804 {
8805         int r;
8806
8807         mutex_lock(&kvm->slots_lock);
8808         r = __x86_set_memory_region(kvm, id, gpa, size);
8809         mutex_unlock(&kvm->slots_lock);
8810
8811         return r;
8812 }
8813 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8814
8815 void kvm_arch_destroy_vm(struct kvm *kvm)
8816 {
8817         if (current->mm == kvm->mm) {
8818                 /*
8819                  * Free memory regions allocated on behalf of userspace,
8820                  * unless the the memory map has changed due to process exit
8821                  * or fd copying.
8822                  */
8823                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8824                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8825                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8826         }
8827         if (kvm_x86_ops->vm_destroy)
8828                 kvm_x86_ops->vm_destroy(kvm);
8829         kvm_pic_destroy(kvm);
8830         kvm_ioapic_destroy(kvm);
8831         kvm_free_vcpus(kvm);
8832         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8833         kvm_mmu_uninit_vm(kvm);
8834         kvm_page_track_cleanup(kvm);
8835         kvm_hv_destroy_vm(kvm);
8836 }
8837
8838 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8839                            struct kvm_memory_slot *dont)
8840 {
8841         int i;
8842
8843         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8844                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8845                         kvfree(free->arch.rmap[i]);
8846                         free->arch.rmap[i] = NULL;
8847                 }
8848                 if (i == 0)
8849                         continue;
8850
8851                 if (!dont || free->arch.lpage_info[i - 1] !=
8852                              dont->arch.lpage_info[i - 1]) {
8853                         kvfree(free->arch.lpage_info[i - 1]);
8854                         free->arch.lpage_info[i - 1] = NULL;
8855                 }
8856         }
8857
8858         kvm_page_track_free_memslot(free, dont);
8859 }
8860
8861 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8862                             unsigned long npages)
8863 {
8864         int i;
8865
8866         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8867                 struct kvm_lpage_info *linfo;
8868                 unsigned long ugfn;
8869                 int lpages;
8870                 int level = i + 1;
8871
8872                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8873                                       slot->base_gfn, level) + 1;
8874
8875                 slot->arch.rmap[i] =
8876                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8877                 if (!slot->arch.rmap[i])
8878                         goto out_free;
8879                 if (i == 0)
8880                         continue;
8881
8882                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8883                 if (!linfo)
8884                         goto out_free;
8885
8886                 slot->arch.lpage_info[i - 1] = linfo;
8887
8888                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8889                         linfo[0].disallow_lpage = 1;
8890                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8891                         linfo[lpages - 1].disallow_lpage = 1;
8892                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8893                 /*
8894                  * If the gfn and userspace address are not aligned wrt each
8895                  * other, or if explicitly asked to, disable large page
8896                  * support for this slot
8897                  */
8898                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8899                     !kvm_largepages_enabled()) {
8900                         unsigned long j;
8901
8902                         for (j = 0; j < lpages; ++j)
8903                                 linfo[j].disallow_lpage = 1;
8904                 }
8905         }
8906
8907         if (kvm_page_track_create_memslot(slot, npages))
8908                 goto out_free;
8909
8910         return 0;
8911
8912 out_free:
8913         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8914                 kvfree(slot->arch.rmap[i]);
8915                 slot->arch.rmap[i] = NULL;
8916                 if (i == 0)
8917                         continue;
8918
8919                 kvfree(slot->arch.lpage_info[i - 1]);
8920                 slot->arch.lpage_info[i - 1] = NULL;
8921         }
8922         return -ENOMEM;
8923 }
8924
8925 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8926 {
8927         /*
8928          * memslots->generation has been incremented.
8929          * mmio generation may have reached its maximum value.
8930          */
8931         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8932 }
8933
8934 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8935                                 struct kvm_memory_slot *memslot,
8936                                 const struct kvm_userspace_memory_region *mem,
8937                                 enum kvm_mr_change change)
8938 {
8939         return 0;
8940 }
8941
8942 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8943                                      struct kvm_memory_slot *new)
8944 {
8945         /* Still write protect RO slot */
8946         if (new->flags & KVM_MEM_READONLY) {
8947                 kvm_mmu_slot_remove_write_access(kvm, new);
8948                 return;
8949         }
8950
8951         /*
8952          * Call kvm_x86_ops dirty logging hooks when they are valid.
8953          *
8954          * kvm_x86_ops->slot_disable_log_dirty is called when:
8955          *
8956          *  - KVM_MR_CREATE with dirty logging is disabled
8957          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8958          *
8959          * The reason is, in case of PML, we need to set D-bit for any slots
8960          * with dirty logging disabled in order to eliminate unnecessary GPA
8961          * logging in PML buffer (and potential PML buffer full VMEXT). This
8962          * guarantees leaving PML enabled during guest's lifetime won't have
8963          * any additonal overhead from PML when guest is running with dirty
8964          * logging disabled for memory slots.
8965          *
8966          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8967          * to dirty logging mode.
8968          *
8969          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8970          *
8971          * In case of write protect:
8972          *
8973          * Write protect all pages for dirty logging.
8974          *
8975          * All the sptes including the large sptes which point to this
8976          * slot are set to readonly. We can not create any new large
8977          * spte on this slot until the end of the logging.
8978          *
8979          * See the comments in fast_page_fault().
8980          */
8981         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8982                 if (kvm_x86_ops->slot_enable_log_dirty)
8983                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8984                 else
8985                         kvm_mmu_slot_remove_write_access(kvm, new);
8986         } else {
8987                 if (kvm_x86_ops->slot_disable_log_dirty)
8988                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8989         }
8990 }
8991
8992 void kvm_arch_commit_memory_region(struct kvm *kvm,
8993                                 const struct kvm_userspace_memory_region *mem,
8994                                 const struct kvm_memory_slot *old,
8995                                 const struct kvm_memory_slot *new,
8996                                 enum kvm_mr_change change)
8997 {
8998         int nr_mmu_pages = 0;
8999
9000         if (!kvm->arch.n_requested_mmu_pages)
9001                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
9002
9003         if (nr_mmu_pages)
9004                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
9005
9006         /*
9007          * Dirty logging tracks sptes in 4k granularity, meaning that large
9008          * sptes have to be split.  If live migration is successful, the guest
9009          * in the source machine will be destroyed and large sptes will be
9010          * created in the destination. However, if the guest continues to run
9011          * in the source machine (for example if live migration fails), small
9012          * sptes will remain around and cause bad performance.
9013          *
9014          * Scan sptes if dirty logging has been stopped, dropping those
9015          * which can be collapsed into a single large-page spte.  Later
9016          * page faults will create the large-page sptes.
9017          */
9018         if ((change != KVM_MR_DELETE) &&
9019                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9020                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9021                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9022
9023         /*
9024          * Set up write protection and/or dirty logging for the new slot.
9025          *
9026          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9027          * been zapped so no dirty logging staff is needed for old slot. For
9028          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9029          * new and it's also covered when dealing with the new slot.
9030          *
9031          * FIXME: const-ify all uses of struct kvm_memory_slot.
9032          */
9033         if (change != KVM_MR_DELETE)
9034                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9035 }
9036
9037 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9038 {
9039         kvm_mmu_invalidate_zap_all_pages(kvm);
9040 }
9041
9042 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9043                                    struct kvm_memory_slot *slot)
9044 {
9045         kvm_page_track_flush_slot(kvm, slot);
9046 }
9047
9048 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9049 {
9050         if (!list_empty_careful(&vcpu->async_pf.done))
9051                 return true;
9052
9053         if (kvm_apic_has_events(vcpu))
9054                 return true;
9055
9056         if (vcpu->arch.pv.pv_unhalted)
9057                 return true;
9058
9059         if (vcpu->arch.exception.pending)
9060                 return true;
9061
9062         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9063             (vcpu->arch.nmi_pending &&
9064              kvm_x86_ops->nmi_allowed(vcpu)))
9065                 return true;
9066
9067         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9068             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9069                 return true;
9070
9071         if (kvm_arch_interrupt_allowed(vcpu) &&
9072             kvm_cpu_has_interrupt(vcpu))
9073                 return true;
9074
9075         if (kvm_hv_has_stimer_pending(vcpu))
9076                 return true;
9077
9078         return false;
9079 }
9080
9081 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9082 {
9083         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9084 }
9085
9086 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9087 {
9088         return vcpu->arch.preempted_in_kernel;
9089 }
9090
9091 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9092 {
9093         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9094 }
9095
9096 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9097 {
9098         return kvm_x86_ops->interrupt_allowed(vcpu);
9099 }
9100
9101 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9102 {
9103         if (is_64_bit_mode(vcpu))
9104                 return kvm_rip_read(vcpu);
9105         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9106                      kvm_rip_read(vcpu));
9107 }
9108 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9109
9110 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9111 {
9112         return kvm_get_linear_rip(vcpu) == linear_rip;
9113 }
9114 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9115
9116 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9117 {
9118         unsigned long rflags;
9119
9120         rflags = kvm_x86_ops->get_rflags(vcpu);
9121         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9122                 rflags &= ~X86_EFLAGS_TF;
9123         return rflags;
9124 }
9125 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9126
9127 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9128 {
9129         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9130             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9131                 rflags |= X86_EFLAGS_TF;
9132         kvm_x86_ops->set_rflags(vcpu, rflags);
9133 }
9134
9135 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9136 {
9137         __kvm_set_rflags(vcpu, rflags);
9138         kvm_make_request(KVM_REQ_EVENT, vcpu);
9139 }
9140 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9141
9142 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9143 {
9144         int r;
9145
9146         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
9147               work->wakeup_all)
9148                 return;
9149
9150         r = kvm_mmu_reload(vcpu);
9151         if (unlikely(r))
9152                 return;
9153
9154         if (!vcpu->arch.mmu.direct_map &&
9155               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
9156                 return;
9157
9158         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
9159 }
9160
9161 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9162 {
9163         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9164 }
9165
9166 static inline u32 kvm_async_pf_next_probe(u32 key)
9167 {
9168         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9169 }
9170
9171 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9172 {
9173         u32 key = kvm_async_pf_hash_fn(gfn);
9174
9175         while (vcpu->arch.apf.gfns[key] != ~0)
9176                 key = kvm_async_pf_next_probe(key);
9177
9178         vcpu->arch.apf.gfns[key] = gfn;
9179 }
9180
9181 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9182 {
9183         int i;
9184         u32 key = kvm_async_pf_hash_fn(gfn);
9185
9186         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9187                      (vcpu->arch.apf.gfns[key] != gfn &&
9188                       vcpu->arch.apf.gfns[key] != ~0); i++)
9189                 key = kvm_async_pf_next_probe(key);
9190
9191         return key;
9192 }
9193
9194 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9195 {
9196         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9197 }
9198
9199 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9200 {
9201         u32 i, j, k;
9202
9203         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9204         while (true) {
9205                 vcpu->arch.apf.gfns[i] = ~0;
9206                 do {
9207                         j = kvm_async_pf_next_probe(j);
9208                         if (vcpu->arch.apf.gfns[j] == ~0)
9209                                 return;
9210                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9211                         /*
9212                          * k lies cyclically in ]i,j]
9213                          * |    i.k.j |
9214                          * |....j i.k.| or  |.k..j i...|
9215                          */
9216                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9217                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9218                 i = j;
9219         }
9220 }
9221
9222 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9223 {
9224
9225         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9226                                       sizeof(val));
9227 }
9228
9229 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9230 {
9231
9232         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9233                                       sizeof(u32));
9234 }
9235
9236 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9237                                      struct kvm_async_pf *work)
9238 {
9239         struct x86_exception fault;
9240
9241         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9242         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9243
9244         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9245             (vcpu->arch.apf.send_user_only &&
9246              kvm_x86_ops->get_cpl(vcpu) == 0))
9247                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9248         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9249                 fault.vector = PF_VECTOR;
9250                 fault.error_code_valid = true;
9251                 fault.error_code = 0;
9252                 fault.nested_page_fault = false;
9253                 fault.address = work->arch.token;
9254                 fault.async_page_fault = true;
9255                 kvm_inject_page_fault(vcpu, &fault);
9256         }
9257 }
9258
9259 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9260                                  struct kvm_async_pf *work)
9261 {
9262         struct x86_exception fault;
9263         u32 val;
9264
9265         if (work->wakeup_all)
9266                 work->arch.token = ~0; /* broadcast wakeup */
9267         else
9268                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9269         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9270
9271         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9272             !apf_get_user(vcpu, &val)) {
9273                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9274                     vcpu->arch.exception.pending &&
9275                     vcpu->arch.exception.nr == PF_VECTOR &&
9276                     !apf_put_user(vcpu, 0)) {
9277                         vcpu->arch.exception.injected = false;
9278                         vcpu->arch.exception.pending = false;
9279                         vcpu->arch.exception.nr = 0;
9280                         vcpu->arch.exception.has_error_code = false;
9281                         vcpu->arch.exception.error_code = 0;
9282                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9283                         fault.vector = PF_VECTOR;
9284                         fault.error_code_valid = true;
9285                         fault.error_code = 0;
9286                         fault.nested_page_fault = false;
9287                         fault.address = work->arch.token;
9288                         fault.async_page_fault = true;
9289                         kvm_inject_page_fault(vcpu, &fault);
9290                 }
9291         }
9292         vcpu->arch.apf.halted = false;
9293         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9294 }
9295
9296 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9297 {
9298         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9299                 return true;
9300         else
9301                 return kvm_can_do_async_pf(vcpu);
9302 }
9303
9304 void kvm_arch_start_assignment(struct kvm *kvm)
9305 {
9306         atomic_inc(&kvm->arch.assigned_device_count);
9307 }
9308 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9309
9310 void kvm_arch_end_assignment(struct kvm *kvm)
9311 {
9312         atomic_dec(&kvm->arch.assigned_device_count);
9313 }
9314 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9315
9316 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9317 {
9318         return atomic_read(&kvm->arch.assigned_device_count);
9319 }
9320 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9321
9322 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9323 {
9324         atomic_inc(&kvm->arch.noncoherent_dma_count);
9325 }
9326 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9327
9328 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9329 {
9330         atomic_dec(&kvm->arch.noncoherent_dma_count);
9331 }
9332 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9333
9334 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9335 {
9336         return atomic_read(&kvm->arch.noncoherent_dma_count);
9337 }
9338 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9339
9340 bool kvm_arch_has_irq_bypass(void)
9341 {
9342         return kvm_x86_ops->update_pi_irte != NULL;
9343 }
9344
9345 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9346                                       struct irq_bypass_producer *prod)
9347 {
9348         struct kvm_kernel_irqfd *irqfd =
9349                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9350
9351         irqfd->producer = prod;
9352
9353         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9354                                            prod->irq, irqfd->gsi, 1);
9355 }
9356
9357 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9358                                       struct irq_bypass_producer *prod)
9359 {
9360         int ret;
9361         struct kvm_kernel_irqfd *irqfd =
9362                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9363
9364         WARN_ON(irqfd->producer != prod);
9365         irqfd->producer = NULL;
9366
9367         /*
9368          * When producer of consumer is unregistered, we change back to
9369          * remapped mode, so we can re-use the current implementation
9370          * when the irq is masked/disabled or the consumer side (KVM
9371          * int this case doesn't want to receive the interrupts.
9372         */
9373         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9374         if (ret)
9375                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9376                        " fails: %d\n", irqfd->consumer.token, ret);
9377 }
9378
9379 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9380                                    uint32_t guest_irq, bool set)
9381 {
9382         if (!kvm_x86_ops->update_pi_irte)
9383                 return -EINVAL;
9384
9385         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9386 }
9387
9388 bool kvm_vector_hashing_enabled(void)
9389 {
9390         return vector_hashing;
9391 }
9392 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9393
9394 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9395 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9396 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9397 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9398 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9399 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9400 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9401 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9402 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9403 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9404 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9405 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9406 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9407 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9408 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9409 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9410 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9411 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9412 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);