arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/mem_encrypt.h>
  55
  56 #include <trace/events/kvm.h>
  57
  58 #include <asm/debugreg.h>
  59 #include <asm/msr.h>
  60 #include <asm/desc.h>
  61 #include <asm/mce.h>
  62 #include <linux/kernel_stat.h>
  63 #include <asm/fpu/internal.h> /* Ugh! */
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66 #include <asm/irq_remapping.h>
  67 #include <asm/mshyperv.h>
  68 #include <asm/hypervisor.h>
  69 #include <asm/intel_pt.h>
  70 #include <clocksource/hyperv_timer.h>
  71
  72 #define CREATE_TRACE_POINTS
  73 #include "trace.h"
  74
  75 #define MAX_IO_MSRS 256
  76 #define KVM_MAX_MCE_BANKS 32
  77 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  78 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  79
  80 #define emul_to_vcpu(ctxt) \
  81         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  82
  83 /* EFER defaults:
  84  * - enable syscall per default because its emulated by KVM
  85  * - enable LME and LMA per default on 64 bit KVM
  86  */
  87 #ifdef CONFIG_X86_64
  88 static
  89 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  90 #else
  91 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  92 #endif
  93
  94 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  95 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  96
  97 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  98                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  99
 100 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 101 static void process_nmi(struct kvm_vcpu *vcpu);
 102 static void enter_smm(struct kvm_vcpu *vcpu);
 103 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 104 static void store_regs(struct kvm_vcpu *vcpu);
 105 static int sync_regs(struct kvm_vcpu *vcpu);
 106
 107 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 108 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 109
 110 static bool __read_mostly ignore_msrs = 0;
 111 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 112
 113 static bool __read_mostly report_ignored_msrs = true;
 114 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 115
 116 unsigned int min_timer_period_us = 200;
 117 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 118
 119 static bool __read_mostly kvmclock_periodic_sync = true;
 120 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 121
 122 bool __read_mostly kvm_has_tsc_control;
 123 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 124 u32  __read_mostly kvm_max_guest_tsc_khz;
 125 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 126 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 127 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 128 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 129 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 130 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 131 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 132
 133 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 134 static u32 __read_mostly tsc_tolerance_ppm = 250;
 135 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 136
 137 /*
 138  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 139  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 140  * advancement entirely.  Any other value is used as-is and disables adaptive
 141  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 142  */
 143 static int __read_mostly lapic_timer_advance_ns = -1;
 144 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 145
 146 static bool __read_mostly vector_hashing = true;
 147 module_param(vector_hashing, bool, S_IRUGO);
 148
 149 bool __read_mostly enable_vmware_backdoor = false;
 150 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 151 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 152
 153 static bool __read_mostly force_emulation_prefix = false;
 154 module_param(force_emulation_prefix, bool, S_IRUGO);
 155
 156 #define KVM_NR_SHARED_MSRS 16
 157
 158 struct kvm_shared_msrs_global {
 159         int nr;
 160         u32 msrs[KVM_NR_SHARED_MSRS];
 161 };
 162
 163 struct kvm_shared_msrs {
 164         struct user_return_notifier urn;
 165         bool registered;
 166         struct kvm_shared_msr_values {
 167                 u64 host;
 168                 u64 curr;
 169         } values[KVM_NR_SHARED_MSRS];
 170 };
 171
 172 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 173 static struct kvm_shared_msrs __percpu *shared_msrs;
 174
 175 struct kvm_stats_debugfs_item debugfs_entries[] = {
 176         { "pf_fixed", VCPU_STAT(pf_fixed) },
 177         { "pf_guest", VCPU_STAT(pf_guest) },
 178         { "tlb_flush", VCPU_STAT(tlb_flush) },
 179         { "invlpg", VCPU_STAT(invlpg) },
 180         { "exits", VCPU_STAT(exits) },
 181         { "io_exits", VCPU_STAT(io_exits) },
 182         { "mmio_exits", VCPU_STAT(mmio_exits) },
 183         { "signal_exits", VCPU_STAT(signal_exits) },
 184         { "irq_window", VCPU_STAT(irq_window_exits) },
 185         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 186         { "halt_exits", VCPU_STAT(halt_exits) },
 187         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 188         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 189         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 190         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 191         { "hypercalls", VCPU_STAT(hypercalls) },
 192         { "request_irq", VCPU_STAT(request_irq_exits) },
 193         { "irq_exits", VCPU_STAT(irq_exits) },
 194         { "host_state_reload", VCPU_STAT(host_state_reload) },
 195         { "fpu_reload", VCPU_STAT(fpu_reload) },
 196         { "insn_emulation", VCPU_STAT(insn_emulation) },
 197         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 198         { "irq_injections", VCPU_STAT(irq_injections) },
 199         { "nmi_injections", VCPU_STAT(nmi_injections) },
 200         { "req_event", VCPU_STAT(req_event) },
 201         { "l1d_flush", VCPU_STAT(l1d_flush) },
 202         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 203         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 204         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 205         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 206         { "mmu_flooded", VM_STAT(mmu_flooded) },
 207         { "mmu_recycled", VM_STAT(mmu_recycled) },
 208         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 209         { "mmu_unsync", VM_STAT(mmu_unsync) },
 210         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 211         { "largepages", VM_STAT(lpages) },
 212         { "max_mmu_page_hash_collisions",
 213                 VM_STAT(max_mmu_page_hash_collisions) },
 214         { NULL }
 215 };
 216
 217 u64 __read_mostly host_xcr0;
 218
 219 struct kmem_cache *x86_fpu_cache;
 220 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 221
 222 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 223
 224 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 225 {
 226         int i;
 227         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 228                 vcpu->arch.apf.gfns[i] = ~0;
 229 }
 230
 231 static void kvm_on_user_return(struct user_return_notifier *urn)
 232 {
 233         unsigned slot;
 234         struct kvm_shared_msrs *locals
 235                 = container_of(urn, struct kvm_shared_msrs, urn);
 236         struct kvm_shared_msr_values *values;
 237         unsigned long flags;
 238
 239         /*
 240          * Disabling irqs at this point since the following code could be
 241          * interrupted and executed through kvm_arch_hardware_disable()
 242          */
 243         local_irq_save(flags);
 244         if (locals->registered) {
 245                 locals->registered = false;
 246                 user_return_notifier_unregister(urn);
 247         }
 248         local_irq_restore(flags);
 249         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 250                 values = &locals->values[slot];
 251                 if (values->host != values->curr) {
 252                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 253                         values->curr = values->host;
 254                 }
 255         }
 256 }
 257
 258 static void shared_msr_update(unsigned slot, u32 msr)
 259 {
 260         u64 value;
 261         unsigned int cpu = smp_processor_id();
 262         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 263
 264         /* only read, and nobody should modify it at this time,
 265          * so don't need lock */
 266         if (slot >= shared_msrs_global.nr) {
 267                 printk(KERN_ERR "kvm: invalid MSR slot!");
 268                 return;
 269         }
 270         rdmsrl_safe(msr, &value);
 271         smsr->values[slot].host = value;
 272         smsr->values[slot].curr = value;
 273 }
 274
 275 void kvm_define_shared_msr(unsigned slot, u32 msr)
 276 {
 277         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 278         shared_msrs_global.msrs[slot] = msr;
 279         if (slot >= shared_msrs_global.nr)
 280                 shared_msrs_global.nr = slot + 1;
 281 }
 282 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 283
 284 static void kvm_shared_msr_cpu_online(void)
 285 {
 286         unsigned i;
 287
 288         for (i = 0; i < shared_msrs_global.nr; ++i)
 289                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 290 }
 291
 292 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 293 {
 294         unsigned int cpu = smp_processor_id();
 295         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 296         int err;
 297
 298         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 299                 return 0;
 300         smsr->values[slot].curr = value;
 301         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 302         if (err)
 303                 return 1;
 304
 305         if (!smsr->registered) {
 306                 smsr->urn.on_user_return = kvm_on_user_return;
 307                 user_return_notifier_register(&smsr->urn);
 308                 smsr->registered = true;
 309         }
 310         return 0;
 311 }
 312 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 313
 314 static void drop_user_return_notifiers(void)
 315 {
 316         unsigned int cpu = smp_processor_id();
 317         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 318
 319         if (smsr->registered)
 320                 kvm_on_user_return(&smsr->urn);
 321 }
 322
 323 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 324 {
 325         return vcpu->arch.apic_base;
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 328
 329 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 330 {
 331         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 334
 335 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 336 {
 337         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 338         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 339         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 340                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 341
 342         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 343                 return 1;
 344         if (!msr_info->host_initiated) {
 345                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 346                         return 1;
 347                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 348                         return 1;
 349         }
 350
 351         kvm_lapic_set_base(vcpu, msr_info->data);
 352         return 0;
 353 }
 354 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 355
 356 asmlinkage __visible void kvm_spurious_fault(void)
 357 {
 358         /* Fault while not rebooting.  We want the trace. */
 359         BUG();
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 362
 363 #define EXCPT_BENIGN            0
 364 #define EXCPT_CONTRIBUTORY      1
 365 #define EXCPT_PF                2
 366
 367 static int exception_class(int vector)
 368 {
 369         switch (vector) {
 370         case PF_VECTOR:
 371                 return EXCPT_PF;
 372         case DE_VECTOR:
 373         case TS_VECTOR:
 374         case NP_VECTOR:
 375         case SS_VECTOR:
 376         case GP_VECTOR:
 377                 return EXCPT_CONTRIBUTORY;
 378         default:
 379                 break;
 380         }
 381         return EXCPT_BENIGN;
 382 }
 383
 384 #define EXCPT_FAULT             0
 385 #define EXCPT_TRAP              1
 386 #define EXCPT_ABORT             2
 387 #define EXCPT_INTERRUPT         3
 388
 389 static int exception_type(int vector)
 390 {
 391         unsigned int mask;
 392
 393         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 394                 return EXCPT_INTERRUPT;
 395
 396         mask = 1 << vector;
 397
 398         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 399         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 400                 return EXCPT_TRAP;
 401
 402         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 403                 return EXCPT_ABORT;
 404
 405         /* Reserved exceptions will result in fault */
 406         return EXCPT_FAULT;
 407 }
 408
 409 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 410 {
 411         unsigned nr = vcpu->arch.exception.nr;
 412         bool has_payload = vcpu->arch.exception.has_payload;
 413         unsigned long payload = vcpu->arch.exception.payload;
 414
 415         if (!has_payload)
 416                 return;
 417
 418         switch (nr) {
 419         case DB_VECTOR:
 420                 /*
 421                  * "Certain debug exceptions may clear bit 0-3.  The
 422                  * remaining contents of the DR6 register are never
 423                  * cleared by the processor".
 424                  */
 425                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 426                 /*
 427                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 428                  */
 429                 vcpu->arch.dr6 |= DR6_RTM;
 430                 vcpu->arch.dr6 |= payload;
 431                 /*
 432                  * Bit 16 should be set in the payload whenever the #DB
 433                  * exception should clear DR6.RTM. This makes the payload
 434                  * compatible with the pending debug exceptions under VMX.
 435                  * Though not currently documented in the SDM, this also
 436                  * makes the payload compatible with the exit qualification
 437                  * for #DB exceptions under VMX.
 438                  */
 439                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 440                 break;
 441         case PF_VECTOR:
 442                 vcpu->arch.cr2 = payload;
 443                 break;
 444         }
 445
 446         vcpu->arch.exception.has_payload = false;
 447         vcpu->arch.exception.payload = 0;
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 450
 451 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 452                 unsigned nr, bool has_error, u32 error_code,
 453                 bool has_payload, unsigned long payload, bool reinject)
 454 {
 455         u32 prev_nr;
 456         int class1, class2;
 457
 458         kvm_make_request(KVM_REQ_EVENT, vcpu);
 459
 460         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 461         queue:
 462                 if (has_error && !is_protmode(vcpu))
 463                         has_error = false;
 464                 if (reinject) {
 465                         /*
 466                          * On vmentry, vcpu->arch.exception.pending is only
 467                          * true if an event injection was blocked by
 468                          * nested_run_pending.  In that case, however,
 469                          * vcpu_enter_guest requests an immediate exit,
 470                          * and the guest shouldn't proceed far enough to
 471                          * need reinjection.
 472                          */
 473                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 474                         vcpu->arch.exception.injected = true;
 475                         if (WARN_ON_ONCE(has_payload)) {
 476                                 /*
 477                                  * A reinjected event has already
 478                                  * delivered its payload.
 479                                  */
 480                                 has_payload = false;
 481                                 payload = 0;
 482                         }
 483                 } else {
 484                         vcpu->arch.exception.pending = true;
 485                         vcpu->arch.exception.injected = false;
 486                 }
 487                 vcpu->arch.exception.has_error_code = has_error;
 488                 vcpu->arch.exception.nr = nr;
 489                 vcpu->arch.exception.error_code = error_code;
 490                 vcpu->arch.exception.has_payload = has_payload;
 491                 vcpu->arch.exception.payload = payload;
 492                 /*
 493                  * In guest mode, payload delivery should be deferred,
 494                  * so that the L1 hypervisor can intercept #PF before
 495                  * CR2 is modified (or intercept #DB before DR6 is
 496                  * modified under nVMX).  However, for ABI
 497                  * compatibility with KVM_GET_VCPU_EVENTS and
 498                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 499                  * delivery unless userspace has enabled this
 500                  * functionality via the per-VM capability,
 501                  * KVM_CAP_EXCEPTION_PAYLOAD.
 502                  */
 503                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 504                     !is_guest_mode(vcpu))
 505                         kvm_deliver_exception_payload(vcpu);
 506                 return;
 507         }
 508
 509         /* to check exception */
 510         prev_nr = vcpu->arch.exception.nr;
 511         if (prev_nr == DF_VECTOR) {
 512                 /* triple fault -> shutdown */
 513                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 514                 return;
 515         }
 516         class1 = exception_class(prev_nr);
 517         class2 = exception_class(nr);
 518         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 519                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 520                 /*
 521                  * Generate double fault per SDM Table 5-5.  Set
 522                  * exception.pending = true so that the double fault
 523                  * can trigger a nested vmexit.
 524                  */
 525                 vcpu->arch.exception.pending = true;
 526                 vcpu->arch.exception.injected = false;
 527                 vcpu->arch.exception.has_error_code = true;
 528                 vcpu->arch.exception.nr = DF_VECTOR;
 529                 vcpu->arch.exception.error_code = 0;
 530                 vcpu->arch.exception.has_payload = false;
 531                 vcpu->arch.exception.payload = 0;
 532         } else
 533                 /* replace previous exception with a new one in a hope
 534                    that instruction re-execution will regenerate lost
 535                    exception */
 536                 goto queue;
 537 }
 538
 539 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 540 {
 541         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 542 }
 543 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 544
 545 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 546 {
 547         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 548 }
 549 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 550
 551 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 552                                   unsigned long payload)
 553 {
 554         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 555 }
 556
 557 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 558                                     u32 error_code, unsigned long payload)
 559 {
 560         kvm_multiple_exception(vcpu, nr, true, error_code,
 561                                true, payload, false);
 562 }
 563
 564 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 565 {
 566         if (err)
 567                 kvm_inject_gp(vcpu, 0);
 568         else
 569                 return kvm_skip_emulated_instruction(vcpu);
 570
 571         return 1;
 572 }
 573 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 574
 575 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 576 {
 577         ++vcpu->stat.pf_guest;
 578         vcpu->arch.exception.nested_apf =
 579                 is_guest_mode(vcpu) && fault->async_page_fault;
 580         if (vcpu->arch.exception.nested_apf) {
 581                 vcpu->arch.apf.nested_apf_token = fault->address;
 582                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 583         } else {
 584                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 585                                         fault->address);
 586         }
 587 }
 588 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 589
 590 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 591 {
 592         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 593                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 594         else
 595                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 596
 597         return fault->nested_page_fault;
 598 }
 599
 600 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 601 {
 602         atomic_inc(&vcpu->arch.nmi_queued);
 603         kvm_make_request(KVM_REQ_NMI, vcpu);
 604 }
 605 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 606
 607 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 608 {
 609         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 610 }
 611 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 612
 613 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 614 {
 615         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 618
 619 /*
 620  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 621  * a #GP and return false.
 622  */
 623 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 624 {
 625         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 626                 return true;
 627         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 628         return false;
 629 }
 630 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 631
 632 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 633 {
 634         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 635                 return true;
 636
 637         kvm_queue_exception(vcpu, UD_VECTOR);
 638         return false;
 639 }
 640 EXPORT_SYMBOL_GPL(kvm_require_dr);
 641
 642 /*
 643  * This function will be used to read from the physical memory of the currently
 644  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 645  * can read from guest physical or from the guest's guest physical memory.
 646  */
 647 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 648                             gfn_t ngfn, void *data, int offset, int len,
 649                             u32 access)
 650 {
 651         struct x86_exception exception;
 652         gfn_t real_gfn;
 653         gpa_t ngpa;
 654
 655         ngpa     = gfn_to_gpa(ngfn);
 656         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 657         if (real_gfn == UNMAPPED_GVA)
 658                 return -EFAULT;
 659
 660         real_gfn = gpa_to_gfn(real_gfn);
 661
 662         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 663 }
 664 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 665
 666 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 667                                void *data, int offset, int len, u32 access)
 668 {
 669         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 670                                        data, offset, len, access);
 671 }
 672
 673 /*
 674  * Load the pae pdptrs.  Return true is they are all valid.
 675  */
 676 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 677 {
 678         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 679         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 680         int i;
 681         int ret;
 682         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 683
 684         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 685                                       offset * sizeof(u64), sizeof(pdpte),
 686                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 687         if (ret < 0) {
 688                 ret = 0;
 689                 goto out;
 690         }
 691         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 692                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 693                     (pdpte[i] &
 694                      vcpu->arch.mmu->guest_rsvd_check.rsvd_bits_mask[0][2])) {
 695                         ret = 0;
 696                         goto out;
 697                 }
 698         }
 699         ret = 1;
 700
 701         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 702         __set_bit(VCPU_EXREG_PDPTR,
 703                   (unsigned long *)&vcpu->arch.regs_avail);
 704         __set_bit(VCPU_EXREG_PDPTR,
 705                   (unsigned long *)&vcpu->arch.regs_dirty);
 706 out:
 707
 708         return ret;
 709 }
 710 EXPORT_SYMBOL_GPL(load_pdptrs);
 711
 712 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 713 {
 714         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 715         bool changed = true;
 716         int offset;
 717         gfn_t gfn;
 718         int r;
 719
 720         if (is_long_mode(vcpu) || !is_pae(vcpu) || !is_paging(vcpu))
 721                 return false;
 722
 723         if (!test_bit(VCPU_EXREG_PDPTR,
 724                       (unsigned long *)&vcpu->arch.regs_avail))
 725                 return true;
 726
 727         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 728         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 729         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 730                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 731         if (r < 0)
 732                 goto out;
 733         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 734 out:
 735
 736         return changed;
 737 }
 738 EXPORT_SYMBOL_GPL(pdptrs_changed);
 739
 740 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 741 {
 742         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 743         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 744
 745         cr0 |= X86_CR0_ET;
 746
 747 #ifdef CONFIG_X86_64
 748         if (cr0 & 0xffffffff00000000UL)
 749                 return 1;
 750 #endif
 751
 752         cr0 &= ~CR0_RESERVED_BITS;
 753
 754         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 755                 return 1;
 756
 757         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 758                 return 1;
 759
 760         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 761 #ifdef CONFIG_X86_64
 762                 if ((vcpu->arch.efer & EFER_LME)) {
 763                         int cs_db, cs_l;
 764
 765                         if (!is_pae(vcpu))
 766                                 return 1;
 767                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 768                         if (cs_l)
 769                                 return 1;
 770                 } else
 771 #endif
 772                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 773                                                  kvm_read_cr3(vcpu)))
 774                         return 1;
 775         }
 776
 777         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 778                 return 1;
 779
 780         kvm_x86_ops->set_cr0(vcpu, cr0);
 781
 782         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 783                 kvm_clear_async_pf_completion_queue(vcpu);
 784                 kvm_async_pf_hash_reset(vcpu);
 785         }
 786
 787         if ((cr0 ^ old_cr0) & update_bits)
 788                 kvm_mmu_reset_context(vcpu);
 789
 790         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 791             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 792             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 793                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 794
 795         return 0;
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 798
 799 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 800 {
 801         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 802 }
 803 EXPORT_SYMBOL_GPL(kvm_lmsw);
 804
 805 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 806 {
 807         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 808                         !vcpu->guest_xcr0_loaded) {
 809                 /* kvm_set_xcr() also depends on this */
 810                 if (vcpu->arch.xcr0 != host_xcr0)
 811                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 812                 vcpu->guest_xcr0_loaded = 1;
 813         }
 814 }
 815 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 816
 817 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 818 {
 819         if (vcpu->guest_xcr0_loaded) {
 820                 if (vcpu->arch.xcr0 != host_xcr0)
 821                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 822                 vcpu->guest_xcr0_loaded = 0;
 823         }
 824 }
 825 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 826
 827 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 828 {
 829         u64 xcr0 = xcr;
 830         u64 old_xcr0 = vcpu->arch.xcr0;
 831         u64 valid_bits;
 832
 833         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 834         if (index != XCR_XFEATURE_ENABLED_MASK)
 835                 return 1;
 836         if (!(xcr0 & XFEATURE_MASK_FP))
 837                 return 1;
 838         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 839                 return 1;
 840
 841         /*
 842          * Do not allow the guest to set bits that we do not support
 843          * saving.  However, xcr0 bit 0 is always set, even if the
 844          * emulated CPU does not support XSAVE (see fx_init).
 845          */
 846         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 847         if (xcr0 & ~valid_bits)
 848                 return 1;
 849
 850         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 851             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 852                 return 1;
 853
 854         if (xcr0 & XFEATURE_MASK_AVX512) {
 855                 if (!(xcr0 & XFEATURE_MASK_YMM))
 856                         return 1;
 857                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 858                         return 1;
 859         }
 860         vcpu->arch.xcr0 = xcr0;
 861
 862         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 863                 kvm_update_cpuid(vcpu);
 864         return 0;
 865 }
 866
 867 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 868 {
 869         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 870             __kvm_set_xcr(vcpu, index, xcr)) {
 871                 kvm_inject_gp(vcpu, 0);
 872                 return 1;
 873         }
 874         return 0;
 875 }
 876 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 877
 878 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 879 {
 880         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 881         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 882                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 883
 884         if (cr4 & CR4_RESERVED_BITS)
 885                 return 1;
 886
 887         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 888                 return 1;
 889
 890         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 891                 return 1;
 892
 893         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 894                 return 1;
 895
 896         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 897                 return 1;
 898
 899         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 900                 return 1;
 901
 902         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 903                 return 1;
 904
 905         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 906                 return 1;
 907
 908         if (is_long_mode(vcpu)) {
 909                 if (!(cr4 & X86_CR4_PAE))
 910                         return 1;
 911         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 912                    && ((cr4 ^ old_cr4) & pdptr_bits)
 913                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 914                                    kvm_read_cr3(vcpu)))
 915                 return 1;
 916
 917         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 918                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 919                         return 1;
 920
 921                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 922                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 923                         return 1;
 924         }
 925
 926         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 927                 return 1;
 928
 929         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 930             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 931                 kvm_mmu_reset_context(vcpu);
 932
 933         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 934                 kvm_update_cpuid(vcpu);
 935
 936         return 0;
 937 }
 938 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 939
 940 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 941 {
 942         bool skip_tlb_flush = false;
 943 #ifdef CONFIG_X86_64
 944         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 945
 946         if (pcid_enabled) {
 947                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 948                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 949         }
 950 #endif
 951
 952         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 953                 if (!skip_tlb_flush) {
 954                         kvm_mmu_sync_roots(vcpu);
 955                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 956                 }
 957                 return 0;
 958         }
 959
 960         if (is_long_mode(vcpu) &&
 961             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 962                 return 1;
 963         else if (is_pae(vcpu) && is_paging(vcpu) &&
 964                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 965                 return 1;
 966
 967         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 968         vcpu->arch.cr3 = cr3;
 969         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 970
 971         return 0;
 972 }
 973 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 974
 975 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 976 {
 977         if (cr8 & CR8_RESERVED_BITS)
 978                 return 1;
 979         if (lapic_in_kernel(vcpu))
 980                 kvm_lapic_set_tpr(vcpu, cr8);
 981         else
 982                 vcpu->arch.cr8 = cr8;
 983         return 0;
 984 }
 985 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 986
 987 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 988 {
 989         if (lapic_in_kernel(vcpu))
 990                 return kvm_lapic_get_cr8(vcpu);
 991         else
 992                 return vcpu->arch.cr8;
 993 }
 994 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 995
 996 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 997 {
 998         int i;
 999
1000         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1001                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1002                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1003                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1004         }
1005 }
1006
1007 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1008 {
1009         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1010                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1011 }
1012
1013 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1014 {
1015         unsigned long dr7;
1016
1017         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1018                 dr7 = vcpu->arch.guest_debug_dr7;
1019         else
1020                 dr7 = vcpu->arch.dr7;
1021         kvm_x86_ops->set_dr7(vcpu, dr7);
1022         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1023         if (dr7 & DR7_BP_EN_MASK)
1024                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1025 }
1026
1027 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1028 {
1029         u64 fixed = DR6_FIXED_1;
1030
1031         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1032                 fixed |= DR6_RTM;
1033         return fixed;
1034 }
1035
1036 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1037 {
1038         switch (dr) {
1039         case 0 ... 3:
1040                 vcpu->arch.db[dr] = val;
1041                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1042                         vcpu->arch.eff_db[dr] = val;
1043                 break;
1044         case 4:
1045                 /* fall through */
1046         case 6:
1047                 if (val & 0xffffffff00000000ULL)
1048                         return -1; /* #GP */
1049                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1050                 kvm_update_dr6(vcpu);
1051                 break;
1052         case 5:
1053                 /* fall through */
1054         default: /* 7 */
1055                 if (val & 0xffffffff00000000ULL)
1056                         return -1; /* #GP */
1057                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1058                 kvm_update_dr7(vcpu);
1059                 break;
1060         }
1061
1062         return 0;
1063 }
1064
1065 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1066 {
1067         if (__kvm_set_dr(vcpu, dr, val)) {
1068                 kvm_inject_gp(vcpu, 0);
1069                 return 1;
1070         }
1071         return 0;
1072 }
1073 EXPORT_SYMBOL_GPL(kvm_set_dr);
1074
1075 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1076 {
1077         switch (dr) {
1078         case 0 ... 3:
1079                 *val = vcpu->arch.db[dr];
1080                 break;
1081         case 4:
1082                 /* fall through */
1083         case 6:
1084                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1085                         *val = vcpu->arch.dr6;
1086                 else
1087                         *val = kvm_x86_ops->get_dr6(vcpu);
1088                 break;
1089         case 5:
1090                 /* fall through */
1091         default: /* 7 */
1092                 *val = vcpu->arch.dr7;
1093                 break;
1094         }
1095         return 0;
1096 }
1097 EXPORT_SYMBOL_GPL(kvm_get_dr);
1098
1099 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1100 {
1101         u32 ecx = kvm_rcx_read(vcpu);
1102         u64 data;
1103         int err;
1104
1105         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1106         if (err)
1107                 return err;
1108         kvm_rax_write(vcpu, (u32)data);
1109         kvm_rdx_write(vcpu, data >> 32);
1110         return err;
1111 }
1112 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1113
1114 /*
1115  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1116  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1117  *
1118  * This list is modified at module load time to reflect the
1119  * capabilities of the host cpu. This capabilities test skips MSRs that are
1120  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1121  * may depend on host virtualization features rather than host cpu features.
1122  */
1123
1124 static u32 msrs_to_save[] = {
1125         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1126         MSR_STAR,
1127 #ifdef CONFIG_X86_64
1128         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1129 #endif
1130         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1131         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1132         MSR_IA32_SPEC_CTRL,
1133         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1134         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1135         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1136         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1137         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1138         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1139 };
1140
1141 static unsigned num_msrs_to_save;
1142
1143 static u32 emulated_msrs[] = {
1144         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1145         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1146         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1147         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1148         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1149         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1150         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1151         HV_X64_MSR_RESET,
1152         HV_X64_MSR_VP_INDEX,
1153         HV_X64_MSR_VP_RUNTIME,
1154         HV_X64_MSR_SCONTROL,
1155         HV_X64_MSR_STIMER0_CONFIG,
1156         HV_X64_MSR_VP_ASSIST_PAGE,
1157         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1158         HV_X64_MSR_TSC_EMULATION_STATUS,
1159
1160         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1161         MSR_KVM_PV_EOI_EN,
1162
1163         MSR_IA32_TSC_ADJUST,
1164         MSR_IA32_TSCDEADLINE,
1165         MSR_IA32_ARCH_CAPABILITIES,
1166         MSR_IA32_MISC_ENABLE,
1167         MSR_IA32_MCG_STATUS,
1168         MSR_IA32_MCG_CTL,
1169         MSR_IA32_MCG_EXT_CTL,
1170         MSR_IA32_SMBASE,
1171         MSR_SMI_COUNT,
1172         MSR_PLATFORM_INFO,
1173         MSR_MISC_FEATURES_ENABLES,
1174         MSR_AMD64_VIRT_SPEC_CTRL,
1175         MSR_IA32_POWER_CTL,
1176
1177         MSR_K7_HWCR,
1178 };
1179
1180 static unsigned num_emulated_msrs;
1181
1182 /*
1183  * List of msr numbers which are used to expose MSR-based features that
1184  * can be used by a hypervisor to validate requested CPU features.
1185  */
1186 static u32 msr_based_features[] = {
1187         MSR_IA32_VMX_BASIC,
1188         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1189         MSR_IA32_VMX_PINBASED_CTLS,
1190         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1191         MSR_IA32_VMX_PROCBASED_CTLS,
1192         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1193         MSR_IA32_VMX_EXIT_CTLS,
1194         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1195         MSR_IA32_VMX_ENTRY_CTLS,
1196         MSR_IA32_VMX_MISC,
1197         MSR_IA32_VMX_CR0_FIXED0,
1198         MSR_IA32_VMX_CR0_FIXED1,
1199         MSR_IA32_VMX_CR4_FIXED0,
1200         MSR_IA32_VMX_CR4_FIXED1,
1201         MSR_IA32_VMX_VMCS_ENUM,
1202         MSR_IA32_VMX_PROCBASED_CTLS2,
1203         MSR_IA32_VMX_EPT_VPID_CAP,
1204         MSR_IA32_VMX_VMFUNC,
1205
1206         MSR_F10H_DECFG,
1207         MSR_IA32_UCODE_REV,
1208         MSR_IA32_ARCH_CAPABILITIES,
1209 };
1210
1211 static unsigned int num_msr_based_features;
1212
1213 u64 kvm_get_arch_capabilities(void)
1214 {
1215         u64 data;
1216
1217         rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES, &data);
1218
1219         /*
1220          * If we're doing cache flushes (either "always" or "cond")
1221          * we will do one whenever the guest does a vmlaunch/vmresume.
1222          * If an outer hypervisor is doing the cache flush for us
1223          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1224          * capability to the guest too, and if EPT is disabled we're not
1225          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1226          * require a nested hypervisor to do a flush of its own.
1227          */
1228         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1229                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1230
1231         return data;
1232 }
1233 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities);
1234
1235 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1236 {
1237         switch (msr->index) {
1238         case MSR_IA32_ARCH_CAPABILITIES:
1239                 msr->data = kvm_get_arch_capabilities();
1240                 break;
1241         case MSR_IA32_UCODE_REV:
1242                 rdmsrl_safe(msr->index, &msr->data);
1243                 break;
1244         default:
1245                 if (kvm_x86_ops->get_msr_feature(msr))
1246                         return 1;
1247         }
1248         return 0;
1249 }
1250
1251 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1252 {
1253         struct kvm_msr_entry msr;
1254         int r;
1255
1256         msr.index = index;
1257         r = kvm_get_msr_feature(&msr);
1258         if (r)
1259                 return r;
1260
1261         *data = msr.data;
1262
1263         return 0;
1264 }
1265
1266 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1267 {
1268         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1269                 return false;
1270
1271         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1272                 return false;
1273
1274         if (efer & (EFER_LME | EFER_LMA) &&
1275             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1276                 return false;
1277
1278         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1279                 return false;
1280
1281         return true;
1282
1283 }
1284 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1285 {
1286         if (efer & efer_reserved_bits)
1287                 return false;
1288
1289         return __kvm_valid_efer(vcpu, efer);
1290 }
1291 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1292
1293 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1294 {
1295         u64 old_efer = vcpu->arch.efer;
1296         u64 efer = msr_info->data;
1297
1298         if (efer & efer_reserved_bits)
1299                 return 1;
1300
1301         if (!msr_info->host_initiated) {
1302                 if (!__kvm_valid_efer(vcpu, efer))
1303                         return 1;
1304
1305                 if (is_paging(vcpu) &&
1306                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1307                         return 1;
1308         }
1309
1310         efer &= ~EFER_LMA;
1311         efer |= vcpu->arch.efer & EFER_LMA;
1312
1313         kvm_x86_ops->set_efer(vcpu, efer);
1314
1315         /* Update reserved bits */
1316         if ((efer ^ old_efer) & EFER_NX)
1317                 kvm_mmu_reset_context(vcpu);
1318
1319         return 0;
1320 }
1321
1322 void kvm_enable_efer_bits(u64 mask)
1323 {
1324        efer_reserved_bits &= ~mask;
1325 }
1326 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1327
1328 /*
1329  * Writes msr value into into the appropriate "register".
1330  * Returns 0 on success, non-0 otherwise.
1331  * Assumes vcpu_load() was already called.
1332  */
1333 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1334 {
1335         switch (msr->index) {
1336         case MSR_FS_BASE:
1337         case MSR_GS_BASE:
1338         case MSR_KERNEL_GS_BASE:
1339         case MSR_CSTAR:
1340         case MSR_LSTAR:
1341                 if (is_noncanonical_address(msr->data, vcpu))
1342                         return 1;
1343                 break;
1344         case MSR_IA32_SYSENTER_EIP:
1345         case MSR_IA32_SYSENTER_ESP:
1346                 /*
1347                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1348                  * non-canonical address is written on Intel but not on
1349                  * AMD (which ignores the top 32-bits, because it does
1350                  * not implement 64-bit SYSENTER).
1351                  *
1352                  * 64-bit code should hence be able to write a non-canonical
1353                  * value on AMD.  Making the address canonical ensures that
1354                  * vmentry does not fail on Intel after writing a non-canonical
1355                  * value, and that something deterministic happens if the guest
1356                  * invokes 64-bit SYSENTER.
1357                  */
1358                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1359         }
1360         return kvm_x86_ops->set_msr(vcpu, msr);
1361 }
1362 EXPORT_SYMBOL_GPL(kvm_set_msr);
1363
1364 /*
1365  * Adapt set_msr() to msr_io()'s calling convention
1366  */
1367 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1368 {
1369         struct msr_data msr;
1370         int r;
1371
1372         msr.index = index;
1373         msr.host_initiated = true;
1374         r = kvm_get_msr(vcpu, &msr);
1375         if (r)
1376                 return r;
1377
1378         *data = msr.data;
1379         return 0;
1380 }
1381
1382 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1383 {
1384         struct msr_data msr;
1385
1386         msr.data = *data;
1387         msr.index = index;
1388         msr.host_initiated = true;
1389         return kvm_set_msr(vcpu, &msr);
1390 }
1391
1392 #ifdef CONFIG_X86_64
1393 struct pvclock_gtod_data {
1394         seqcount_t      seq;
1395
1396         struct { /* extract of a clocksource struct */
1397                 int vclock_mode;
1398                 u64     cycle_last;
1399                 u64     mask;
1400                 u32     mult;
1401                 u32     shift;
1402         } clock;
1403
1404         u64             boot_ns;
1405         u64             nsec_base;
1406         u64             wall_time_sec;
1407 };
1408
1409 static struct pvclock_gtod_data pvclock_gtod_data;
1410
1411 static void update_pvclock_gtod(struct timekeeper *tk)
1412 {
1413         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1414         u64 boot_ns;
1415
1416         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1417
1418         write_seqcount_begin(&vdata->seq);
1419
1420         /* copy pvclock gtod data */
1421         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1422         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1423         vdata->clock.mask               = tk->tkr_mono.mask;
1424         vdata->clock.mult               = tk->tkr_mono.mult;
1425         vdata->clock.shift              = tk->tkr_mono.shift;
1426
1427         vdata->boot_ns                  = boot_ns;
1428         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1429
1430         vdata->wall_time_sec            = tk->xtime_sec;
1431
1432         write_seqcount_end(&vdata->seq);
1433 }
1434 #endif
1435
1436 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1437 {
1438         /*
1439          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1440          * vcpu_enter_guest.  This function is only called from
1441          * the physical CPU that is running vcpu.
1442          */
1443         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1444 }
1445
1446 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1447 {
1448         int version;
1449         int r;
1450         struct pvclock_wall_clock wc;
1451         struct timespec64 boot;
1452
1453         if (!wall_clock)
1454                 return;
1455
1456         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1457         if (r)
1458                 return;
1459
1460         if (version & 1)
1461                 ++version;  /* first time write, random junk */
1462
1463         ++version;
1464
1465         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1466                 return;
1467
1468         /*
1469          * The guest calculates current wall clock time by adding
1470          * system time (updated by kvm_guest_time_update below) to the
1471          * wall clock specified here.  guest system time equals host
1472          * system time for us, thus we must fill in host boot time here.
1473          */
1474         getboottime64(&boot);
1475
1476         if (kvm->arch.kvmclock_offset) {
1477                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1478                 boot = timespec64_sub(boot, ts);
1479         }
1480         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1481         wc.nsec = boot.tv_nsec;
1482         wc.version = version;
1483
1484         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1485
1486         version++;
1487         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1488 }
1489
1490 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1491 {
1492         do_shl32_div32(dividend, divisor);
1493         return dividend;
1494 }
1495
1496 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1497                                s8 *pshift, u32 *pmultiplier)
1498 {
1499         uint64_t scaled64;
1500         int32_t  shift = 0;
1501         uint64_t tps64;
1502         uint32_t tps32;
1503
1504         tps64 = base_hz;
1505         scaled64 = scaled_hz;
1506         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1507                 tps64 >>= 1;
1508                 shift--;
1509         }
1510
1511         tps32 = (uint32_t)tps64;
1512         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1513                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1514                         scaled64 >>= 1;
1515                 else
1516                         tps32 <<= 1;
1517                 shift++;
1518         }
1519
1520         *pshift = shift;
1521         *pmultiplier = div_frac(scaled64, tps32);
1522
1523         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1524                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1525 }
1526
1527 #ifdef CONFIG_X86_64
1528 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1529 #endif
1530
1531 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1532 static unsigned long max_tsc_khz;
1533
1534 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1535 {
1536         u64 v = (u64)khz * (1000000 + ppm);
1537         do_div(v, 1000000);
1538         return v;
1539 }
1540
1541 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1542 {
1543         u64 ratio;
1544
1545         /* Guest TSC same frequency as host TSC? */
1546         if (!scale) {
1547                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1548                 return 0;
1549         }
1550
1551         /* TSC scaling supported? */
1552         if (!kvm_has_tsc_control) {
1553                 if (user_tsc_khz > tsc_khz) {
1554                         vcpu->arch.tsc_catchup = 1;
1555                         vcpu->arch.tsc_always_catchup = 1;
1556                         return 0;
1557                 } else {
1558                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1559                         return -1;
1560                 }
1561         }
1562
1563         /* TSC scaling required  - calculate ratio */
1564         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1565                                 user_tsc_khz, tsc_khz);
1566
1567         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1568                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1569                                     user_tsc_khz);
1570                 return -1;
1571         }
1572
1573         vcpu->arch.tsc_scaling_ratio = ratio;
1574         return 0;
1575 }
1576
1577 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1578 {
1579         u32 thresh_lo, thresh_hi;
1580         int use_scaling = 0;
1581
1582         /* tsc_khz can be zero if TSC calibration fails */
1583         if (user_tsc_khz == 0) {
1584                 /* set tsc_scaling_ratio to a safe value */
1585                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1586                 return -1;
1587         }
1588
1589         /* Compute a scale to convert nanoseconds in TSC cycles */
1590         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1591                            &vcpu->arch.virtual_tsc_shift,
1592                            &vcpu->arch.virtual_tsc_mult);
1593         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1594
1595         /*
1596          * Compute the variation in TSC rate which is acceptable
1597          * within the range of tolerance and decide if the
1598          * rate being applied is within that bounds of the hardware
1599          * rate.  If so, no scaling or compensation need be done.
1600          */
1601         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1602         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1603         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1604                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1605                 use_scaling = 1;
1606         }
1607         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1608 }
1609
1610 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1611 {
1612         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1613                                       vcpu->arch.virtual_tsc_mult,
1614                                       vcpu->arch.virtual_tsc_shift);
1615         tsc += vcpu->arch.this_tsc_write;
1616         return tsc;
1617 }
1618
1619 static inline int gtod_is_based_on_tsc(int mode)
1620 {
1621         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1622 }
1623
1624 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1625 {
1626 #ifdef CONFIG_X86_64
1627         bool vcpus_matched;
1628         struct kvm_arch *ka = &vcpu->kvm->arch;
1629         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1630
1631         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1632                          atomic_read(&vcpu->kvm->online_vcpus));
1633
1634         /*
1635          * Once the masterclock is enabled, always perform request in
1636          * order to update it.
1637          *
1638          * In order to enable masterclock, the host clocksource must be TSC
1639          * and the vcpus need to have matched TSCs.  When that happens,
1640          * perform request to enable masterclock.
1641          */
1642         if (ka->use_master_clock ||
1643             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1644                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1645
1646         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1647                             atomic_read(&vcpu->kvm->online_vcpus),
1648                             ka->use_master_clock, gtod->clock.vclock_mode);
1649 #endif
1650 }
1651
1652 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1653 {
1654         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1655         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1656 }
1657
1658 /*
1659  * Multiply tsc by a fixed point number represented by ratio.
1660  *
1661  * The most significant 64-N bits (mult) of ratio represent the
1662  * integral part of the fixed point number; the remaining N bits
1663  * (frac) represent the fractional part, ie. ratio represents a fixed
1664  * point number (mult + frac * 2^(-N)).
1665  *
1666  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1667  */
1668 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1669 {
1670         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1671 }
1672
1673 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1674 {
1675         u64 _tsc = tsc;
1676         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1677
1678         if (ratio != kvm_default_tsc_scaling_ratio)
1679                 _tsc = __scale_tsc(ratio, tsc);
1680
1681         return _tsc;
1682 }
1683 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1684
1685 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1686 {
1687         u64 tsc;
1688
1689         tsc = kvm_scale_tsc(vcpu, rdtsc());
1690
1691         return target_tsc - tsc;
1692 }
1693
1694 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1695 {
1696         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1697
1698         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1699 }
1700 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1701
1702 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1703 {
1704         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1705 }
1706
1707 static inline bool kvm_check_tsc_unstable(void)
1708 {
1709 #ifdef CONFIG_X86_64
1710         /*
1711          * TSC is marked unstable when we're running on Hyper-V,
1712          * 'TSC page' clocksource is good.
1713          */
1714         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1715                 return false;
1716 #endif
1717         return check_tsc_unstable();
1718 }
1719
1720 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1721 {
1722         struct kvm *kvm = vcpu->kvm;
1723         u64 offset, ns, elapsed;
1724         unsigned long flags;
1725         bool matched;
1726         bool already_matched;
1727         u64 data = msr->data;
1728         bool synchronizing = false;
1729
1730         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1731         offset = kvm_compute_tsc_offset(vcpu, data);
1732         ns = ktime_get_boottime_ns();
1733         elapsed = ns - kvm->arch.last_tsc_nsec;
1734
1735         if (vcpu->arch.virtual_tsc_khz) {
1736                 if (data == 0 && msr->host_initiated) {
1737                         /*
1738                          * detection of vcpu initialization -- need to sync
1739                          * with other vCPUs. This particularly helps to keep
1740                          * kvm_clock stable after CPU hotplug
1741                          */
1742                         synchronizing = true;
1743                 } else {
1744                         u64 tsc_exp = kvm->arch.last_tsc_write +
1745                                                 nsec_to_cycles(vcpu, elapsed);
1746                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1747                         /*
1748                          * Special case: TSC write with a small delta (1 second)
1749                          * of virtual cycle time against real time is
1750                          * interpreted as an attempt to synchronize the CPU.
1751                          */
1752                         synchronizing = data < tsc_exp + tsc_hz &&
1753                                         data + tsc_hz > tsc_exp;
1754                 }
1755         }
1756
1757         /*
1758          * For a reliable TSC, we can match TSC offsets, and for an unstable
1759          * TSC, we add elapsed time in this computation.  We could let the
1760          * compensation code attempt to catch up if we fall behind, but
1761          * it's better to try to match offsets from the beginning.
1762          */
1763         if (synchronizing &&
1764             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1765                 if (!kvm_check_tsc_unstable()) {
1766                         offset = kvm->arch.cur_tsc_offset;
1767                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1768                 } else {
1769                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1770                         data += delta;
1771                         offset = kvm_compute_tsc_offset(vcpu, data);
1772                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1773                 }
1774                 matched = true;
1775                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1776         } else {
1777                 /*
1778                  * We split periods of matched TSC writes into generations.
1779                  * For each generation, we track the original measured
1780                  * nanosecond time, offset, and write, so if TSCs are in
1781                  * sync, we can match exact offset, and if not, we can match
1782                  * exact software computation in compute_guest_tsc()
1783                  *
1784                  * These values are tracked in kvm->arch.cur_xxx variables.
1785                  */
1786                 kvm->arch.cur_tsc_generation++;
1787                 kvm->arch.cur_tsc_nsec = ns;
1788                 kvm->arch.cur_tsc_write = data;
1789                 kvm->arch.cur_tsc_offset = offset;
1790                 matched = false;
1791                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1792                          kvm->arch.cur_tsc_generation, data);
1793         }
1794
1795         /*
1796          * We also track th most recent recorded KHZ, write and time to
1797          * allow the matching interval to be extended at each write.
1798          */
1799         kvm->arch.last_tsc_nsec = ns;
1800         kvm->arch.last_tsc_write = data;
1801         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1802
1803         vcpu->arch.last_guest_tsc = data;
1804
1805         /* Keep track of which generation this VCPU has synchronized to */
1806         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1807         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1808         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1809
1810         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1811                 update_ia32_tsc_adjust_msr(vcpu, offset);
1812
1813         kvm_vcpu_write_tsc_offset(vcpu, offset);
1814         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1815
1816         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1817         if (!matched) {
1818                 kvm->arch.nr_vcpus_matched_tsc = 0;
1819         } else if (!already_matched) {
1820                 kvm->arch.nr_vcpus_matched_tsc++;
1821         }
1822
1823         kvm_track_tsc_matching(vcpu);
1824         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1825 }
1826
1827 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1828
1829 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1830                                            s64 adjustment)
1831 {
1832         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1833         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1834 }
1835
1836 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1837 {
1838         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1839                 WARN_ON(adjustment < 0);
1840         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1841         adjust_tsc_offset_guest(vcpu, adjustment);
1842 }
1843
1844 #ifdef CONFIG_X86_64
1845
1846 static u64 read_tsc(void)
1847 {
1848         u64 ret = (u64)rdtsc_ordered();
1849         u64 last = pvclock_gtod_data.clock.cycle_last;
1850
1851         if (likely(ret >= last))
1852                 return ret;
1853
1854         /*
1855          * GCC likes to generate cmov here, but this branch is extremely
1856          * predictable (it's just a function of time and the likely is
1857          * very likely) and there's a data dependence, so force GCC
1858          * to generate a branch instead.  I don't barrier() because
1859          * we don't actually need a barrier, and if this function
1860          * ever gets inlined it will generate worse code.
1861          */
1862         asm volatile ("");
1863         return last;
1864 }
1865
1866 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1867 {
1868         long v;
1869         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1870         u64 tsc_pg_val;
1871
1872         switch (gtod->clock.vclock_mode) {
1873         case VCLOCK_HVCLOCK:
1874                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1875                                                   tsc_timestamp);
1876                 if (tsc_pg_val != U64_MAX) {
1877                         /* TSC page valid */
1878                         *mode = VCLOCK_HVCLOCK;
1879                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1880                                 gtod->clock.mask;
1881                 } else {
1882                         /* TSC page invalid */
1883                         *mode = VCLOCK_NONE;
1884                 }
1885                 break;
1886         case VCLOCK_TSC:
1887                 *mode = VCLOCK_TSC;
1888                 *tsc_timestamp = read_tsc();
1889                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1890                         gtod->clock.mask;
1891                 break;
1892         default:
1893                 *mode = VCLOCK_NONE;
1894         }
1895
1896         if (*mode == VCLOCK_NONE)
1897                 *tsc_timestamp = v = 0;
1898
1899         return v * gtod->clock.mult;
1900 }
1901
1902 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1903 {
1904         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1905         unsigned long seq;
1906         int mode;
1907         u64 ns;
1908
1909         do {
1910                 seq = read_seqcount_begin(&gtod->seq);
1911                 ns = gtod->nsec_base;
1912                 ns += vgettsc(tsc_timestamp, &mode);
1913                 ns >>= gtod->clock.shift;
1914                 ns += gtod->boot_ns;
1915         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1916         *t = ns;
1917
1918         return mode;
1919 }
1920
1921 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1922 {
1923         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1924         unsigned long seq;
1925         int mode;
1926         u64 ns;
1927
1928         do {
1929                 seq = read_seqcount_begin(&gtod->seq);
1930                 ts->tv_sec = gtod->wall_time_sec;
1931                 ns = gtod->nsec_base;
1932                 ns += vgettsc(tsc_timestamp, &mode);
1933                 ns >>= gtod->clock.shift;
1934         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1935
1936         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1937         ts->tv_nsec = ns;
1938
1939         return mode;
1940 }
1941
1942 /* returns true if host is using TSC based clocksource */
1943 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1944 {
1945         /* checked again under seqlock below */
1946         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1947                 return false;
1948
1949         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1950                                                       tsc_timestamp));
1951 }
1952
1953 /* returns true if host is using TSC based clocksource */
1954 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1955                                            u64 *tsc_timestamp)
1956 {
1957         /* checked again under seqlock below */
1958         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1959                 return false;
1960
1961         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1962 }
1963 #endif
1964
1965 /*
1966  *
1967  * Assuming a stable TSC across physical CPUS, and a stable TSC
1968  * across virtual CPUs, the following condition is possible.
1969  * Each numbered line represents an event visible to both
1970  * CPUs at the next numbered event.
1971  *
1972  * "timespecX" represents host monotonic time. "tscX" represents
1973  * RDTSC value.
1974  *
1975  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1976  *
1977  * 1.  read timespec0,tsc0
1978  * 2.                                   | timespec1 = timespec0 + N
1979  *                                      | tsc1 = tsc0 + M
1980  * 3. transition to guest               | transition to guest
1981  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1982  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1983  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1984  *
1985  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1986  *
1987  *      - ret0 < ret1
1988  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1989  *              ...
1990  *      - 0 < N - M => M < N
1991  *
1992  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1993  * always the case (the difference between two distinct xtime instances
1994  * might be smaller then the difference between corresponding TSC reads,
1995  * when updating guest vcpus pvclock areas).
1996  *
1997  * To avoid that problem, do not allow visibility of distinct
1998  * system_timestamp/tsc_timestamp values simultaneously: use a master
1999  * copy of host monotonic time values. Update that master copy
2000  * in lockstep.
2001  *
2002  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2003  *
2004  */
2005
2006 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2007 {
2008 #ifdef CONFIG_X86_64
2009         struct kvm_arch *ka = &kvm->arch;
2010         int vclock_mode;
2011         bool host_tsc_clocksource, vcpus_matched;
2012
2013         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2014                         atomic_read(&kvm->online_vcpus));
2015
2016         /*
2017          * If the host uses TSC clock, then passthrough TSC as stable
2018          * to the guest.
2019          */
2020         host_tsc_clocksource = kvm_get_time_and_clockread(
2021                                         &ka->master_kernel_ns,
2022                                         &ka->master_cycle_now);
2023
2024         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2025                                 && !ka->backwards_tsc_observed
2026                                 && !ka->boot_vcpu_runs_old_kvmclock;
2027
2028         if (ka->use_master_clock)
2029                 atomic_set(&kvm_guest_has_master_clock, 1);
2030
2031         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2032         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2033                                         vcpus_matched);
2034 #endif
2035 }
2036
2037 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2038 {
2039         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2040 }
2041
2042 static void kvm_gen_update_masterclock(struct kvm *kvm)
2043 {
2044 #ifdef CONFIG_X86_64
2045         int i;
2046         struct kvm_vcpu *vcpu;
2047         struct kvm_arch *ka = &kvm->arch;
2048
2049         spin_lock(&ka->pvclock_gtod_sync_lock);
2050         kvm_make_mclock_inprogress_request(kvm);
2051         /* no guest entries from this point */
2052         pvclock_update_vm_gtod_copy(kvm);
2053
2054         kvm_for_each_vcpu(i, vcpu, kvm)
2055                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2056
2057         /* guest entries allowed */
2058         kvm_for_each_vcpu(i, vcpu, kvm)
2059                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2060
2061         spin_unlock(&ka->pvclock_gtod_sync_lock);
2062 #endif
2063 }
2064
2065 u64 get_kvmclock_ns(struct kvm *kvm)
2066 {
2067         struct kvm_arch *ka = &kvm->arch;
2068         struct pvclock_vcpu_time_info hv_clock;
2069         u64 ret;
2070
2071         spin_lock(&ka->pvclock_gtod_sync_lock);
2072         if (!ka->use_master_clock) {
2073                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2074                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2075         }
2076
2077         hv_clock.tsc_timestamp = ka->master_cycle_now;
2078         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2079         spin_unlock(&ka->pvclock_gtod_sync_lock);
2080
2081         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2082         get_cpu();
2083
2084         if (__this_cpu_read(cpu_tsc_khz)) {
2085                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2086                                    &hv_clock.tsc_shift,
2087                                    &hv_clock.tsc_to_system_mul);
2088                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2089         } else
2090                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2091
2092         put_cpu();
2093
2094         return ret;
2095 }
2096
2097 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2098 {
2099         struct kvm_vcpu_arch *vcpu = &v->arch;
2100         struct pvclock_vcpu_time_info guest_hv_clock;
2101
2102         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2103                 &guest_hv_clock, sizeof(guest_hv_clock))))
2104                 return;
2105
2106         /* This VCPU is paused, but it's legal for a guest to read another
2107          * VCPU's kvmclock, so we really have to follow the specification where
2108          * it says that version is odd if data is being modified, and even after
2109          * it is consistent.
2110          *
2111          * Version field updates must be kept separate.  This is because
2112          * kvm_write_guest_cached might use a "rep movs" instruction, and
2113          * writes within a string instruction are weakly ordered.  So there
2114          * are three writes overall.
2115          *
2116          * As a small optimization, only write the version field in the first
2117          * and third write.  The vcpu->pv_time cache is still valid, because the
2118          * version field is the first in the struct.
2119          */
2120         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2121
2122         if (guest_hv_clock.version & 1)
2123                 ++guest_hv_clock.version;  /* first time write, random junk */
2124
2125         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2126         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2127                                 &vcpu->hv_clock,
2128                                 sizeof(vcpu->hv_clock.version));
2129
2130         smp_wmb();
2131
2132         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2133         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2134
2135         if (vcpu->pvclock_set_guest_stopped_request) {
2136                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2137                 vcpu->pvclock_set_guest_stopped_request = false;
2138         }
2139
2140         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2141
2142         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2143                                 &vcpu->hv_clock,
2144                                 sizeof(vcpu->hv_clock));
2145
2146         smp_wmb();
2147
2148         vcpu->hv_clock.version++;
2149         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2150                                 &vcpu->hv_clock,
2151                                 sizeof(vcpu->hv_clock.version));
2152 }
2153
2154 static int kvm_guest_time_update(struct kvm_vcpu *v)
2155 {
2156         unsigned long flags, tgt_tsc_khz;
2157         struct kvm_vcpu_arch *vcpu = &v->arch;
2158         struct kvm_arch *ka = &v->kvm->arch;
2159         s64 kernel_ns;
2160         u64 tsc_timestamp, host_tsc;
2161         u8 pvclock_flags;
2162         bool use_master_clock;
2163
2164         kernel_ns = 0;
2165         host_tsc = 0;
2166
2167         /*
2168          * If the host uses TSC clock, then passthrough TSC as stable
2169          * to the guest.
2170          */
2171         spin_lock(&ka->pvclock_gtod_sync_lock);
2172         use_master_clock = ka->use_master_clock;
2173         if (use_master_clock) {
2174                 host_tsc = ka->master_cycle_now;
2175                 kernel_ns = ka->master_kernel_ns;
2176         }
2177         spin_unlock(&ka->pvclock_gtod_sync_lock);
2178
2179         /* Keep irq disabled to prevent changes to the clock */
2180         local_irq_save(flags);
2181         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2182         if (unlikely(tgt_tsc_khz == 0)) {
2183                 local_irq_restore(flags);
2184                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2185                 return 1;
2186         }
2187         if (!use_master_clock) {
2188                 host_tsc = rdtsc();
2189                 kernel_ns = ktime_get_boottime_ns();
2190         }
2191
2192         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2193
2194         /*
2195          * We may have to catch up the TSC to match elapsed wall clock
2196          * time for two reasons, even if kvmclock is used.
2197          *   1) CPU could have been running below the maximum TSC rate
2198          *   2) Broken TSC compensation resets the base at each VCPU
2199          *      entry to avoid unknown leaps of TSC even when running
2200          *      again on the same CPU.  This may cause apparent elapsed
2201          *      time to disappear, and the guest to stand still or run
2202          *      very slowly.
2203          */
2204         if (vcpu->tsc_catchup) {
2205                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2206                 if (tsc > tsc_timestamp) {
2207                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2208                         tsc_timestamp = tsc;
2209                 }
2210         }
2211
2212         local_irq_restore(flags);
2213
2214         /* With all the info we got, fill in the values */
2215
2216         if (kvm_has_tsc_control)
2217                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2218
2219         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2220                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2221                                    &vcpu->hv_clock.tsc_shift,
2222                                    &vcpu->hv_clock.tsc_to_system_mul);
2223                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2224         }
2225
2226         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2227         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2228         vcpu->last_guest_tsc = tsc_timestamp;
2229
2230         /* If the host uses TSC clocksource, then it is stable */
2231         pvclock_flags = 0;
2232         if (use_master_clock)
2233                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2234
2235         vcpu->hv_clock.flags = pvclock_flags;
2236
2237         if (vcpu->pv_time_enabled)
2238                 kvm_setup_pvclock_page(v);
2239         if (v == kvm_get_vcpu(v->kvm, 0))
2240                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2241         return 0;
2242 }
2243
2244 /*
2245  * kvmclock updates which are isolated to a given vcpu, such as
2246  * vcpu->cpu migration, should not allow system_timestamp from
2247  * the rest of the vcpus to remain static. Otherwise ntp frequency
2248  * correction applies to one vcpu's system_timestamp but not
2249  * the others.
2250  *
2251  * So in those cases, request a kvmclock update for all vcpus.
2252  * We need to rate-limit these requests though, as they can
2253  * considerably slow guests that have a large number of vcpus.
2254  * The time for a remote vcpu to update its kvmclock is bound
2255  * by the delay we use to rate-limit the updates.
2256  */
2257
2258 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2259
2260 static void kvmclock_update_fn(struct work_struct *work)
2261 {
2262         int i;
2263         struct delayed_work *dwork = to_delayed_work(work);
2264         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2265                                            kvmclock_update_work);
2266         struct kvm *kvm = container_of(ka, struct kvm, arch);
2267         struct kvm_vcpu *vcpu;
2268
2269         kvm_for_each_vcpu(i, vcpu, kvm) {
2270                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2271                 kvm_vcpu_kick(vcpu);
2272         }
2273 }
2274
2275 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2276 {
2277         struct kvm *kvm = v->kvm;
2278
2279         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2280         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2281                                         KVMCLOCK_UPDATE_DELAY);
2282 }
2283
2284 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2285
2286 static void kvmclock_sync_fn(struct work_struct *work)
2287 {
2288         struct delayed_work *dwork = to_delayed_work(work);
2289         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2290                                            kvmclock_sync_work);
2291         struct kvm *kvm = container_of(ka, struct kvm, arch);
2292
2293         if (!kvmclock_periodic_sync)
2294                 return;
2295
2296         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2297         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2298                                         KVMCLOCK_SYNC_PERIOD);
2299 }
2300
2301 /*
2302  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2303  */
2304 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2305 {
2306         /* McStatusWrEn enabled? */
2307         if (guest_cpuid_is_amd(vcpu))
2308                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2309
2310         return false;
2311 }
2312
2313 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2314 {
2315         u64 mcg_cap = vcpu->arch.mcg_cap;
2316         unsigned bank_num = mcg_cap & 0xff;
2317         u32 msr = msr_info->index;
2318         u64 data = msr_info->data;
2319
2320         switch (msr) {
2321         case MSR_IA32_MCG_STATUS:
2322                 vcpu->arch.mcg_status = data;
2323                 break;
2324         case MSR_IA32_MCG_CTL:
2325                 if (!(mcg_cap & MCG_CTL_P) &&
2326                     (data || !msr_info->host_initiated))
2327                         return 1;
2328                 if (data != 0 && data != ~(u64)0)
2329                         return 1;
2330                 vcpu->arch.mcg_ctl = data;
2331                 break;
2332         default:
2333                 if (msr >= MSR_IA32_MC0_CTL &&
2334                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2335                         u32 offset = msr - MSR_IA32_MC0_CTL;
2336                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2337                          * some Linux kernels though clear bit 10 in bank 4 to
2338                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2339                          * this to avoid an uncatched #GP in the guest
2340                          */
2341                         if ((offset & 0x3) == 0 &&
2342                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2343                                 return -1;
2344
2345                         /* MCi_STATUS */
2346                         if (!msr_info->host_initiated &&
2347                             (offset & 0x3) == 1 && data != 0) {
2348                                 if (!can_set_mci_status(vcpu))
2349                                         return -1;
2350                         }
2351
2352                         vcpu->arch.mce_banks[offset] = data;
2353                         break;
2354                 }
2355                 return 1;
2356         }
2357         return 0;
2358 }
2359
2360 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2361 {
2362         struct kvm *kvm = vcpu->kvm;
2363         int lm = is_long_mode(vcpu);
2364         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2365                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2366         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2367                 : kvm->arch.xen_hvm_config.blob_size_32;
2368         u32 page_num = data & ~PAGE_MASK;
2369         u64 page_addr = data & PAGE_MASK;
2370         u8 *page;
2371         int r;
2372
2373         r = -E2BIG;
2374         if (page_num >= blob_size)
2375                 goto out;
2376         r = -ENOMEM;
2377         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2378         if (IS_ERR(page)) {
2379                 r = PTR_ERR(page);
2380                 goto out;
2381         }
2382         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2383                 goto out_free;
2384         r = 0;
2385 out_free:
2386         kfree(page);
2387 out:
2388         return r;
2389 }
2390
2391 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2392 {
2393         gpa_t gpa = data & ~0x3f;
2394
2395         /* Bits 3:5 are reserved, Should be zero */
2396         if (data & 0x38)
2397                 return 1;
2398
2399         vcpu->arch.apf.msr_val = data;
2400
2401         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2402                 kvm_clear_async_pf_completion_queue(vcpu);
2403                 kvm_async_pf_hash_reset(vcpu);
2404                 return 0;
2405         }
2406
2407         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2408                                         sizeof(u32)))
2409                 return 1;
2410
2411         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2412         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2413         kvm_async_pf_wakeup_all(vcpu);
2414         return 0;
2415 }
2416
2417 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2418 {
2419         vcpu->arch.pv_time_enabled = false;
2420 }
2421
2422 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2423 {
2424         ++vcpu->stat.tlb_flush;
2425         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2426 }
2427
2428 static void record_steal_time(struct kvm_vcpu *vcpu)
2429 {
2430         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2431                 return;
2432
2433         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2434                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2435                 return;
2436
2437         /*
2438          * Doing a TLB flush here, on the guest's behalf, can avoid
2439          * expensive IPIs.
2440          */
2441         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2442                 kvm_vcpu_flush_tlb(vcpu, false);
2443
2444         if (vcpu->arch.st.steal.version & 1)
2445                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2446
2447         vcpu->arch.st.steal.version += 1;
2448
2449         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2450                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2451
2452         smp_wmb();
2453
2454         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2455                 vcpu->arch.st.last_steal;
2456         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2457
2458         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2459                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2460
2461         smp_wmb();
2462
2463         vcpu->arch.st.steal.version += 1;
2464
2465         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2466                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2467 }
2468
2469 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2470 {
2471         bool pr = false;
2472         u32 msr = msr_info->index;
2473         u64 data = msr_info->data;
2474
2475         switch (msr) {
2476         case MSR_AMD64_NB_CFG:
2477         case MSR_IA32_UCODE_WRITE:
2478         case MSR_VM_HSAVE_PA:
2479         case MSR_AMD64_PATCH_LOADER:
2480         case MSR_AMD64_BU_CFG2:
2481         case MSR_AMD64_DC_CFG:
2482         case MSR_F15H_EX_CFG:
2483                 break;
2484
2485         case MSR_IA32_UCODE_REV:
2486                 if (msr_info->host_initiated)
2487                         vcpu->arch.microcode_version = data;
2488                 break;
2489         case MSR_IA32_ARCH_CAPABILITIES:
2490                 if (!msr_info->host_initiated)
2491                         return 1;
2492                 vcpu->arch.arch_capabilities = data;
2493                 break;
2494         case MSR_EFER:
2495                 return set_efer(vcpu, msr_info);
2496         case MSR_K7_HWCR:
2497                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2498                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2499                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2500
2501                 /* Handle McStatusWrEn */
2502                 if (data == BIT_ULL(18)) {
2503                         vcpu->arch.msr_hwcr = data;
2504                 } else if (data != 0) {
2505                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2506                                     data);
2507                         return 1;
2508                 }
2509                 break;
2510         case MSR_FAM10H_MMIO_CONF_BASE:
2511                 if (data != 0) {
2512                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2513                                     "0x%llx\n", data);
2514                         return 1;
2515                 }
2516                 break;
2517         case MSR_IA32_DEBUGCTLMSR:
2518                 if (!data) {
2519                         /* We support the non-activated case already */
2520                         break;
2521                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2522                         /* Values other than LBR and BTF are vendor-specific,
2523                            thus reserved and should throw a #GP */
2524                         return 1;
2525                 }
2526                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2527                             __func__, data);
2528                 break;
2529         case 0x200 ... 0x2ff:
2530                 return kvm_mtrr_set_msr(vcpu, msr, data);
2531         case MSR_IA32_APICBASE:
2532                 return kvm_set_apic_base(vcpu, msr_info);
2533         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2534                 return kvm_x2apic_msr_write(vcpu, msr, data);
2535         case MSR_IA32_TSCDEADLINE:
2536                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2537                 break;
2538         case MSR_IA32_TSC_ADJUST:
2539                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2540                         if (!msr_info->host_initiated) {
2541                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2542                                 adjust_tsc_offset_guest(vcpu, adj);
2543                         }
2544                         vcpu->arch.ia32_tsc_adjust_msr = data;
2545                 }
2546                 break;
2547         case MSR_IA32_MISC_ENABLE:
2548                 vcpu->arch.ia32_misc_enable_msr = data;
2549                 break;
2550         case MSR_IA32_SMBASE:
2551                 if (!msr_info->host_initiated)
2552                         return 1;
2553                 vcpu->arch.smbase = data;
2554                 break;
2555         case MSR_IA32_TSC:
2556                 kvm_write_tsc(vcpu, msr_info);
2557                 break;
2558         case MSR_SMI_COUNT:
2559                 if (!msr_info->host_initiated)
2560                         return 1;
2561                 vcpu->arch.smi_count = data;
2562                 break;
2563         case MSR_KVM_WALL_CLOCK_NEW:
2564         case MSR_KVM_WALL_CLOCK:
2565                 vcpu->kvm->arch.wall_clock = data;
2566                 kvm_write_wall_clock(vcpu->kvm, data);
2567                 break;
2568         case MSR_KVM_SYSTEM_TIME_NEW:
2569         case MSR_KVM_SYSTEM_TIME: {
2570                 struct kvm_arch *ka = &vcpu->kvm->arch;
2571
2572                 kvmclock_reset(vcpu);
2573
2574                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2575                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2576
2577                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2578                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2579
2580                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2581                 }
2582
2583                 vcpu->arch.time = data;
2584                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2585
2586                 /* we verify if the enable bit is set... */
2587                 if (!(data & 1))
2588                         break;
2589
2590                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2591                      &vcpu->arch.pv_time, data & ~1ULL,
2592                      sizeof(struct pvclock_vcpu_time_info)))
2593                         vcpu->arch.pv_time_enabled = false;
2594                 else
2595                         vcpu->arch.pv_time_enabled = true;
2596
2597                 break;
2598         }
2599         case MSR_KVM_ASYNC_PF_EN:
2600                 if (kvm_pv_enable_async_pf(vcpu, data))
2601                         return 1;
2602                 break;
2603         case MSR_KVM_STEAL_TIME:
2604
2605                 if (unlikely(!sched_info_on()))
2606                         return 1;
2607
2608                 if (data & KVM_STEAL_RESERVED_MASK)
2609                         return 1;
2610
2611                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2612                                                 data & KVM_STEAL_VALID_BITS,
2613                                                 sizeof(struct kvm_steal_time)))
2614                         return 1;
2615
2616                 vcpu->arch.st.msr_val = data;
2617
2618                 if (!(data & KVM_MSR_ENABLED))
2619                         break;
2620
2621                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2622
2623                 break;
2624         case MSR_KVM_PV_EOI_EN:
2625                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2626                         return 1;
2627                 break;
2628
2629         case MSR_IA32_MCG_CTL:
2630         case MSR_IA32_MCG_STATUS:
2631         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2632                 return set_msr_mce(vcpu, msr_info);
2633
2634         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2635         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2636                 pr = true; /* fall through */
2637         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2638         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2639                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2640                         return kvm_pmu_set_msr(vcpu, msr_info);
2641
2642                 if (pr || data != 0)
2643                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2644                                     "0x%x data 0x%llx\n", msr, data);
2645                 break;
2646         case MSR_K7_CLK_CTL:
2647                 /*
2648                  * Ignore all writes to this no longer documented MSR.
2649                  * Writes are only relevant for old K7 processors,
2650                  * all pre-dating SVM, but a recommended workaround from
2651                  * AMD for these chips. It is possible to specify the
2652                  * affected processor models on the command line, hence
2653                  * the need to ignore the workaround.
2654                  */
2655                 break;
2656         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2657         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2658         case HV_X64_MSR_CRASH_CTL:
2659         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2660         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2661         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2662         case HV_X64_MSR_TSC_EMULATION_STATUS:
2663                 return kvm_hv_set_msr_common(vcpu, msr, data,
2664                                              msr_info->host_initiated);
2665         case MSR_IA32_BBL_CR_CTL3:
2666                 /* Drop writes to this legacy MSR -- see rdmsr
2667                  * counterpart for further detail.
2668                  */
2669                 if (report_ignored_msrs)
2670                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2671                                 msr, data);
2672                 break;
2673         case MSR_AMD64_OSVW_ID_LENGTH:
2674                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2675                         return 1;
2676                 vcpu->arch.osvw.length = data;
2677                 break;
2678         case MSR_AMD64_OSVW_STATUS:
2679                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2680                         return 1;
2681                 vcpu->arch.osvw.status = data;
2682                 break;
2683         case MSR_PLATFORM_INFO:
2684                 if (!msr_info->host_initiated ||
2685                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2686                      cpuid_fault_enabled(vcpu)))
2687                         return 1;
2688                 vcpu->arch.msr_platform_info = data;
2689                 break;
2690         case MSR_MISC_FEATURES_ENABLES:
2691                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2692                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2693                      !supports_cpuid_fault(vcpu)))
2694                         return 1;
2695                 vcpu->arch.msr_misc_features_enables = data;
2696                 break;
2697         default:
2698                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2699                         return xen_hvm_config(vcpu, data);
2700                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2701                         return kvm_pmu_set_msr(vcpu, msr_info);
2702                 if (!ignore_msrs) {
2703                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2704                                     msr, data);
2705                         return 1;
2706                 } else {
2707                         if (report_ignored_msrs)
2708                                 vcpu_unimpl(vcpu,
2709                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2710                                         msr, data);
2711                         break;
2712                 }
2713         }
2714         return 0;
2715 }
2716 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2717
2718
2719 /*
2720  * Reads an msr value (of 'msr_index') into 'pdata'.
2721  * Returns 0 on success, non-0 otherwise.
2722  * Assumes vcpu_load() was already called.
2723  */
2724 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2725 {
2726         return kvm_x86_ops->get_msr(vcpu, msr);
2727 }
2728 EXPORT_SYMBOL_GPL(kvm_get_msr);
2729
2730 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2731 {
2732         u64 data;
2733         u64 mcg_cap = vcpu->arch.mcg_cap;
2734         unsigned bank_num = mcg_cap & 0xff;
2735
2736         switch (msr) {
2737         case MSR_IA32_P5_MC_ADDR:
2738         case MSR_IA32_P5_MC_TYPE:
2739                 data = 0;
2740                 break;
2741         case MSR_IA32_MCG_CAP:
2742                 data = vcpu->arch.mcg_cap;
2743                 break;
2744         case MSR_IA32_MCG_CTL:
2745                 if (!(mcg_cap & MCG_CTL_P) && !host)
2746                         return 1;
2747                 data = vcpu->arch.mcg_ctl;
2748                 break;
2749         case MSR_IA32_MCG_STATUS:
2750                 data = vcpu->arch.mcg_status;
2751                 break;
2752         default:
2753                 if (msr >= MSR_IA32_MC0_CTL &&
2754                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2755                         u32 offset = msr - MSR_IA32_MC0_CTL;
2756                         data = vcpu->arch.mce_banks[offset];
2757                         break;
2758                 }
2759                 return 1;
2760         }
2761         *pdata = data;
2762         return 0;
2763 }
2764
2765 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2766 {
2767         switch (msr_info->index) {
2768         case MSR_IA32_PLATFORM_ID:
2769         case MSR_IA32_EBL_CR_POWERON:
2770         case MSR_IA32_DEBUGCTLMSR:
2771         case MSR_IA32_LASTBRANCHFROMIP:
2772         case MSR_IA32_LASTBRANCHTOIP:
2773         case MSR_IA32_LASTINTFROMIP:
2774         case MSR_IA32_LASTINTTOIP:
2775         case MSR_K8_SYSCFG:
2776         case MSR_K8_TSEG_ADDR:
2777         case MSR_K8_TSEG_MASK:
2778         case MSR_VM_HSAVE_PA:
2779         case MSR_K8_INT_PENDING_MSG:
2780         case MSR_AMD64_NB_CFG:
2781         case MSR_FAM10H_MMIO_CONF_BASE:
2782         case MSR_AMD64_BU_CFG2:
2783         case MSR_IA32_PERF_CTL:
2784         case MSR_AMD64_DC_CFG:
2785         case MSR_F15H_EX_CFG:
2786                 msr_info->data = 0;
2787                 break;
2788         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2789         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2790         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2791         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2792         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2793                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2794                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2795                 msr_info->data = 0;
2796                 break;
2797         case MSR_IA32_UCODE_REV:
2798                 msr_info->data = vcpu->arch.microcode_version;
2799                 break;
2800         case MSR_IA32_ARCH_CAPABILITIES:
2801                 if (!msr_info->host_initiated &&
2802                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2803                         return 1;
2804                 msr_info->data = vcpu->arch.arch_capabilities;
2805                 break;
2806         case MSR_IA32_TSC:
2807                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2808                 break;
2809         case MSR_MTRRcap:
2810         case 0x200 ... 0x2ff:
2811                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2812         case 0xcd: /* fsb frequency */
2813                 msr_info->data = 3;
2814                 break;
2815                 /*
2816                  * MSR_EBC_FREQUENCY_ID
2817                  * Conservative value valid for even the basic CPU models.
2818                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2819                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2820                  * and 266MHz for model 3, or 4. Set Core Clock
2821                  * Frequency to System Bus Frequency Ratio to 1 (bits
2822                  * 31:24) even though these are only valid for CPU
2823                  * models > 2, however guests may end up dividing or
2824                  * multiplying by zero otherwise.
2825                  */
2826         case MSR_EBC_FREQUENCY_ID:
2827                 msr_info->data = 1 << 24;
2828                 break;
2829         case MSR_IA32_APICBASE:
2830                 msr_info->data = kvm_get_apic_base(vcpu);
2831                 break;
2832         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2833                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2834                 break;
2835         case MSR_IA32_TSCDEADLINE:
2836                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2837                 break;
2838         case MSR_IA32_TSC_ADJUST:
2839                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2840                 break;
2841         case MSR_IA32_MISC_ENABLE:
2842                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2843                 break;
2844         case MSR_IA32_SMBASE:
2845                 if (!msr_info->host_initiated)
2846                         return 1;
2847                 msr_info->data = vcpu->arch.smbase;
2848                 break;
2849         case MSR_SMI_COUNT:
2850                 msr_info->data = vcpu->arch.smi_count;
2851                 break;
2852         case MSR_IA32_PERF_STATUS:
2853                 /* TSC increment by tick */
2854                 msr_info->data = 1000ULL;
2855                 /* CPU multiplier */
2856                 msr_info->data |= (((uint64_t)4ULL) << 40);
2857                 break;
2858         case MSR_EFER:
2859                 msr_info->data = vcpu->arch.efer;
2860                 break;
2861         case MSR_KVM_WALL_CLOCK:
2862         case MSR_KVM_WALL_CLOCK_NEW:
2863                 msr_info->data = vcpu->kvm->arch.wall_clock;
2864                 break;
2865         case MSR_KVM_SYSTEM_TIME:
2866         case MSR_KVM_SYSTEM_TIME_NEW:
2867                 msr_info->data = vcpu->arch.time;
2868                 break;
2869         case MSR_KVM_ASYNC_PF_EN:
2870                 msr_info->data = vcpu->arch.apf.msr_val;
2871                 break;
2872         case MSR_KVM_STEAL_TIME:
2873                 msr_info->data = vcpu->arch.st.msr_val;
2874                 break;
2875         case MSR_KVM_PV_EOI_EN:
2876                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2877                 break;
2878         case MSR_IA32_P5_MC_ADDR:
2879         case MSR_IA32_P5_MC_TYPE:
2880         case MSR_IA32_MCG_CAP:
2881         case MSR_IA32_MCG_CTL:
2882         case MSR_IA32_MCG_STATUS:
2883         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2884                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2885                                    msr_info->host_initiated);
2886         case MSR_K7_CLK_CTL:
2887                 /*
2888                  * Provide expected ramp-up count for K7. All other
2889                  * are set to zero, indicating minimum divisors for
2890                  * every field.
2891                  *
2892                  * This prevents guest kernels on AMD host with CPU
2893                  * type 6, model 8 and higher from exploding due to
2894                  * the rdmsr failing.
2895                  */
2896                 msr_info->data = 0x20000000;
2897                 break;
2898         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2899         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2900         case HV_X64_MSR_CRASH_CTL:
2901         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2902         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2903         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2904         case HV_X64_MSR_TSC_EMULATION_STATUS:
2905                 return kvm_hv_get_msr_common(vcpu,
2906                                              msr_info->index, &msr_info->data,
2907                                              msr_info->host_initiated);
2908                 break;
2909         case MSR_IA32_BBL_CR_CTL3:
2910                 /* This legacy MSR exists but isn't fully documented in current
2911                  * silicon.  It is however accessed by winxp in very narrow
2912                  * scenarios where it sets bit #19, itself documented as
2913                  * a "reserved" bit.  Best effort attempt to source coherent
2914                  * read data here should the balance of the register be
2915                  * interpreted by the guest:
2916                  *
2917                  * L2 cache control register 3: 64GB range, 256KB size,
2918                  * enabled, latency 0x1, configured
2919                  */
2920                 msr_info->data = 0xbe702111;
2921                 break;
2922         case MSR_AMD64_OSVW_ID_LENGTH:
2923                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2924                         return 1;
2925                 msr_info->data = vcpu->arch.osvw.length;
2926                 break;
2927         case MSR_AMD64_OSVW_STATUS:
2928                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2929                         return 1;
2930                 msr_info->data = vcpu->arch.osvw.status;
2931                 break;
2932         case MSR_PLATFORM_INFO:
2933                 if (!msr_info->host_initiated &&
2934                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
2935                         return 1;
2936                 msr_info->data = vcpu->arch.msr_platform_info;
2937                 break;
2938         case MSR_MISC_FEATURES_ENABLES:
2939                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2940                 break;
2941         case MSR_K7_HWCR:
2942                 msr_info->data = vcpu->arch.msr_hwcr;
2943                 break;
2944         default:
2945                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2946                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2947                 if (!ignore_msrs) {
2948                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2949                                                msr_info->index);
2950                         return 1;
2951                 } else {
2952                         if (report_ignored_msrs)
2953                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2954                                         msr_info->index);
2955                         msr_info->data = 0;
2956                 }
2957                 break;
2958         }
2959         return 0;
2960 }
2961 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2962
2963 /*
2964  * Read or write a bunch of msrs. All parameters are kernel addresses.
2965  *
2966  * @return number of msrs set successfully.
2967  */
2968 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2969                     struct kvm_msr_entry *entries,
2970                     int (*do_msr)(struct kvm_vcpu *vcpu,
2971                                   unsigned index, u64 *data))
2972 {
2973         int i;
2974
2975         for (i = 0; i < msrs->nmsrs; ++i)
2976                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2977                         break;
2978
2979         return i;
2980 }
2981
2982 /*
2983  * Read or write a bunch of msrs. Parameters are user addresses.
2984  *
2985  * @return number of msrs set successfully.
2986  */
2987 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2988                   int (*do_msr)(struct kvm_vcpu *vcpu,
2989                                 unsigned index, u64 *data),
2990                   int writeback)
2991 {
2992         struct kvm_msrs msrs;
2993         struct kvm_msr_entry *entries;
2994         int r, n;
2995         unsigned size;
2996
2997         r = -EFAULT;
2998         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
2999                 goto out;
3000
3001         r = -E2BIG;
3002         if (msrs.nmsrs >= MAX_IO_MSRS)
3003                 goto out;
3004
3005         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3006         entries = memdup_user(user_msrs->entries, size);
3007         if (IS_ERR(entries)) {
3008                 r = PTR_ERR(entries);
3009                 goto out;
3010         }
3011
3012         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3013         if (r < 0)
3014                 goto out_free;
3015
3016         r = -EFAULT;
3017         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3018                 goto out_free;
3019
3020         r = n;
3021
3022 out_free:
3023         kfree(entries);
3024 out:
3025         return r;
3026 }
3027
3028 static inline bool kvm_can_mwait_in_guest(void)
3029 {
3030         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3031                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3032                 boot_cpu_has(X86_FEATURE_ARAT);
3033 }
3034
3035 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3036 {
3037         int r = 0;
3038
3039         switch (ext) {
3040         case KVM_CAP_IRQCHIP:
3041         case KVM_CAP_HLT:
3042         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3043         case KVM_CAP_SET_TSS_ADDR:
3044         case KVM_CAP_EXT_CPUID:
3045         case KVM_CAP_EXT_EMUL_CPUID:
3046         case KVM_CAP_CLOCKSOURCE:
3047         case KVM_CAP_PIT:
3048         case KVM_CAP_NOP_IO_DELAY:
3049         case KVM_CAP_MP_STATE:
3050         case KVM_CAP_SYNC_MMU:
3051         case KVM_CAP_USER_NMI:
3052         case KVM_CAP_REINJECT_CONTROL:
3053         case KVM_CAP_IRQ_INJECT_STATUS:
3054         case KVM_CAP_IOEVENTFD:
3055         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3056         case KVM_CAP_PIT2:
3057         case KVM_CAP_PIT_STATE2:
3058         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3059         case KVM_CAP_XEN_HVM:
3060         case KVM_CAP_VCPU_EVENTS:
3061         case KVM_CAP_HYPERV:
3062         case KVM_CAP_HYPERV_VAPIC:
3063         case KVM_CAP_HYPERV_SPIN:
3064         case KVM_CAP_HYPERV_SYNIC:
3065         case KVM_CAP_HYPERV_SYNIC2:
3066         case KVM_CAP_HYPERV_VP_INDEX:
3067         case KVM_CAP_HYPERV_EVENTFD:
3068         case KVM_CAP_HYPERV_TLBFLUSH:
3069         case KVM_CAP_HYPERV_SEND_IPI:
3070         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3071         case KVM_CAP_HYPERV_CPUID:
3072         case KVM_CAP_PCI_SEGMENT:
3073         case KVM_CAP_DEBUGREGS:
3074         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3075         case KVM_CAP_XSAVE:
3076         case KVM_CAP_ASYNC_PF:
3077         case KVM_CAP_GET_TSC_KHZ:
3078         case KVM_CAP_KVMCLOCK_CTRL:
3079         case KVM_CAP_READONLY_MEM:
3080         case KVM_CAP_HYPERV_TIME:
3081         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3082         case KVM_CAP_TSC_DEADLINE_TIMER:
3083         case KVM_CAP_DISABLE_QUIRKS:
3084         case KVM_CAP_SET_BOOT_CPU_ID:
3085         case KVM_CAP_SPLIT_IRQCHIP:
3086         case KVM_CAP_IMMEDIATE_EXIT:
3087         case KVM_CAP_GET_MSR_FEATURES:
3088         case KVM_CAP_MSR_PLATFORM_INFO:
3089         case KVM_CAP_EXCEPTION_PAYLOAD:
3090                 r = 1;
3091                 break;
3092         case KVM_CAP_SYNC_REGS:
3093                 r = KVM_SYNC_X86_VALID_FIELDS;
3094                 break;
3095         case KVM_CAP_ADJUST_CLOCK:
3096                 r = KVM_CLOCK_TSC_STABLE;
3097                 break;
3098         case KVM_CAP_X86_DISABLE_EXITS:
3099                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE;
3100                 if(kvm_can_mwait_in_guest())
3101                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3102                 break;
3103         case KVM_CAP_X86_SMM:
3104                 /* SMBASE is usually relocated above 1M on modern chipsets,
3105                  * and SMM handlers might indeed rely on 4G segment limits,
3106                  * so do not report SMM to be available if real mode is
3107                  * emulated via vm86 mode.  Still, do not go to great lengths
3108                  * to avoid userspace's usage of the feature, because it is a
3109                  * fringe case that is not enabled except via specific settings
3110                  * of the module parameters.
3111                  */
3112                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3113                 break;
3114         case KVM_CAP_VAPIC:
3115                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3116                 break;
3117         case KVM_CAP_NR_VCPUS:
3118                 r = KVM_SOFT_MAX_VCPUS;
3119                 break;
3120         case KVM_CAP_MAX_VCPUS:
3121                 r = KVM_MAX_VCPUS;
3122                 break;
3123         case KVM_CAP_MAX_VCPU_ID:
3124                 r = KVM_MAX_VCPU_ID;
3125                 break;
3126         case KVM_CAP_PV_MMU:    /* obsolete */
3127                 r = 0;
3128                 break;
3129         case KVM_CAP_MCE:
3130                 r = KVM_MAX_MCE_BANKS;
3131                 break;
3132         case KVM_CAP_XCRS:
3133                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3134                 break;
3135         case KVM_CAP_TSC_CONTROL:
3136                 r = kvm_has_tsc_control;
3137                 break;
3138         case KVM_CAP_X2APIC_API:
3139                 r = KVM_X2APIC_API_VALID_FLAGS;
3140                 break;
3141         case KVM_CAP_NESTED_STATE:
3142                 r = kvm_x86_ops->get_nested_state ?
3143                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3144                 break;
3145         default:
3146                 break;
3147         }
3148         return r;
3149
3150 }
3151
3152 long kvm_arch_dev_ioctl(struct file *filp,
3153                         unsigned int ioctl, unsigned long arg)
3154 {
3155         void __user *argp = (void __user *)arg;
3156         long r;
3157
3158         switch (ioctl) {
3159         case KVM_GET_MSR_INDEX_LIST: {
3160                 struct kvm_msr_list __user *user_msr_list = argp;
3161                 struct kvm_msr_list msr_list;
3162                 unsigned n;
3163
3164                 r = -EFAULT;
3165                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3166                         goto out;
3167                 n = msr_list.nmsrs;
3168                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3169                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3170                         goto out;
3171                 r = -E2BIG;
3172                 if (n < msr_list.nmsrs)
3173                         goto out;
3174                 r = -EFAULT;
3175                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3176                                  num_msrs_to_save * sizeof(u32)))
3177                         goto out;
3178                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3179                                  &emulated_msrs,
3180                                  num_emulated_msrs * sizeof(u32)))
3181                         goto out;
3182                 r = 0;
3183                 break;
3184         }
3185         case KVM_GET_SUPPORTED_CPUID:
3186         case KVM_GET_EMULATED_CPUID: {
3187                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3188                 struct kvm_cpuid2 cpuid;
3189
3190                 r = -EFAULT;
3191                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3192                         goto out;
3193
3194                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3195                                             ioctl);
3196                 if (r)
3197                         goto out;
3198
3199                 r = -EFAULT;
3200                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3201                         goto out;
3202                 r = 0;
3203                 break;
3204         }
3205         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3206                 r = -EFAULT;
3207                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3208                                  sizeof(kvm_mce_cap_supported)))
3209                         goto out;
3210                 r = 0;
3211                 break;
3212         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3213                 struct kvm_msr_list __user *user_msr_list = argp;
3214                 struct kvm_msr_list msr_list;
3215                 unsigned int n;
3216
3217                 r = -EFAULT;
3218                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3219                         goto out;
3220                 n = msr_list.nmsrs;
3221                 msr_list.nmsrs = num_msr_based_features;
3222                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3223                         goto out;
3224                 r = -E2BIG;
3225                 if (n < msr_list.nmsrs)
3226                         goto out;
3227                 r = -EFAULT;
3228                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3229                                  num_msr_based_features * sizeof(u32)))
3230                         goto out;
3231                 r = 0;
3232                 break;
3233         }
3234         case KVM_GET_MSRS:
3235                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3236                 break;
3237         }
3238         default:
3239                 r = -EINVAL;
3240         }
3241 out:
3242         return r;
3243 }
3244
3245 static void wbinvd_ipi(void *garbage)
3246 {
3247         wbinvd();
3248 }
3249
3250 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3251 {
3252         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3253 }
3254
3255 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3256 {
3257         /* Address WBINVD may be executed by guest */
3258         if (need_emulate_wbinvd(vcpu)) {
3259                 if (kvm_x86_ops->has_wbinvd_exit())
3260                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3261                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3262                         smp_call_function_single(vcpu->cpu,
3263                                         wbinvd_ipi, NULL, 1);
3264         }
3265
3266         kvm_x86_ops->vcpu_load(vcpu, cpu);
3267
3268         /* Apply any externally detected TSC adjustments (due to suspend) */
3269         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3270                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3271                 vcpu->arch.tsc_offset_adjustment = 0;
3272                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3273         }
3274
3275         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3276                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3277                                 rdtsc() - vcpu->arch.last_host_tsc;
3278                 if (tsc_delta < 0)
3279                         mark_tsc_unstable("KVM discovered backwards TSC");
3280
3281                 if (kvm_check_tsc_unstable()) {
3282                         u64 offset = kvm_compute_tsc_offset(vcpu,
3283                                                 vcpu->arch.last_guest_tsc);
3284                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3285                         vcpu->arch.tsc_catchup = 1;
3286                 }
3287
3288                 if (kvm_lapic_hv_timer_in_use(vcpu))
3289                         kvm_lapic_restart_hv_timer(vcpu);
3290
3291                 /*
3292                  * On a host with synchronized TSC, there is no need to update
3293                  * kvmclock on vcpu->cpu migration
3294                  */
3295                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3296                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3297                 if (vcpu->cpu != cpu)
3298                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3299                 vcpu->cpu = cpu;
3300         }
3301
3302         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3303 }
3304
3305 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3306 {
3307         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3308                 return;
3309
3310         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3311
3312         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3313                         &vcpu->arch.st.steal.preempted,
3314                         offsetof(struct kvm_steal_time, preempted),
3315                         sizeof(vcpu->arch.st.steal.preempted));
3316 }
3317
3318 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3319 {
3320         int idx;
3321
3322         if (vcpu->preempted)
3323                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3324
3325         /*
3326          * Disable page faults because we're in atomic context here.
3327          * kvm_write_guest_offset_cached() would call might_fault()
3328          * that relies on pagefault_disable() to tell if there's a
3329          * bug. NOTE: the write to guest memory may not go through if
3330          * during postcopy live migration or if there's heavy guest
3331          * paging.
3332          */
3333         pagefault_disable();
3334         /*
3335          * kvm_memslots() will be called by
3336          * kvm_write_guest_offset_cached() so take the srcu lock.
3337          */
3338         idx = srcu_read_lock(&vcpu->kvm->srcu);
3339         kvm_steal_time_set_preempted(vcpu);
3340         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3341         pagefault_enable();
3342         kvm_x86_ops->vcpu_put(vcpu);
3343         vcpu->arch.last_host_tsc = rdtsc();
3344         /*
3345          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3346          * on every vmexit, but if not, we might have a stale dr6 from the
3347          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3348          */
3349         set_debugreg(0, 6);
3350 }
3351
3352 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3353                                     struct kvm_lapic_state *s)
3354 {
3355         if (vcpu->arch.apicv_active)
3356                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3357
3358         return kvm_apic_get_state(vcpu, s);
3359 }
3360
3361 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3362                                     struct kvm_lapic_state *s)
3363 {
3364         int r;
3365
3366         r = kvm_apic_set_state(vcpu, s);
3367         if (r)
3368                 return r;
3369         update_cr8_intercept(vcpu);
3370
3371         return 0;
3372 }
3373
3374 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3375 {
3376         return (!lapic_in_kernel(vcpu) ||
3377                 kvm_apic_accept_pic_intr(vcpu));
3378 }
3379
3380 /*
3381  * if userspace requested an interrupt window, check that the
3382  * interrupt window is open.
3383  *
3384  * No need to exit to userspace if we already have an interrupt queued.
3385  */
3386 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3387 {
3388         return kvm_arch_interrupt_allowed(vcpu) &&
3389                 !kvm_cpu_has_interrupt(vcpu) &&
3390                 !kvm_event_needs_reinjection(vcpu) &&
3391                 kvm_cpu_accept_dm_intr(vcpu);
3392 }
3393
3394 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3395                                     struct kvm_interrupt *irq)
3396 {
3397         if (irq->irq >= KVM_NR_INTERRUPTS)
3398                 return -EINVAL;
3399
3400         if (!irqchip_in_kernel(vcpu->kvm)) {
3401                 kvm_queue_interrupt(vcpu, irq->irq, false);
3402                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3403                 return 0;
3404         }
3405
3406         /*
3407          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3408          * fail for in-kernel 8259.
3409          */
3410         if (pic_in_kernel(vcpu->kvm))
3411                 return -ENXIO;
3412
3413         if (vcpu->arch.pending_external_vector != -1)
3414                 return -EEXIST;
3415
3416         vcpu->arch.pending_external_vector = irq->irq;
3417         kvm_make_request(KVM_REQ_EVENT, vcpu);
3418         return 0;
3419 }
3420
3421 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3422 {
3423         kvm_inject_nmi(vcpu);
3424
3425         return 0;
3426 }
3427
3428 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3429 {
3430         kvm_make_request(KVM_REQ_SMI, vcpu);
3431
3432         return 0;
3433 }
3434
3435 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3436                                            struct kvm_tpr_access_ctl *tac)
3437 {
3438         if (tac->flags)
3439                 return -EINVAL;
3440         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3441         return 0;
3442 }
3443
3444 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3445                                         u64 mcg_cap)
3446 {
3447         int r;
3448         unsigned bank_num = mcg_cap & 0xff, bank;
3449
3450         r = -EINVAL;
3451         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3452                 goto out;
3453         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3454                 goto out;
3455         r = 0;
3456         vcpu->arch.mcg_cap = mcg_cap;
3457         /* Init IA32_MCG_CTL to all 1s */
3458         if (mcg_cap & MCG_CTL_P)
3459                 vcpu->arch.mcg_ctl = ~(u64)0;
3460         /* Init IA32_MCi_CTL to all 1s */
3461         for (bank = 0; bank < bank_num; bank++)
3462                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3463
3464         if (kvm_x86_ops->setup_mce)
3465                 kvm_x86_ops->setup_mce(vcpu);
3466 out:
3467         return r;
3468 }
3469
3470 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3471                                       struct kvm_x86_mce *mce)
3472 {
3473         u64 mcg_cap = vcpu->arch.mcg_cap;
3474         unsigned bank_num = mcg_cap & 0xff;
3475         u64 *banks = vcpu->arch.mce_banks;
3476
3477         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3478                 return -EINVAL;
3479         /*
3480          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3481          * reporting is disabled
3482          */
3483         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3484             vcpu->arch.mcg_ctl != ~(u64)0)
3485                 return 0;
3486         banks += 4 * mce->bank;
3487         /*
3488          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3489          * reporting is disabled for the bank
3490          */
3491         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3492                 return 0;
3493         if (mce->status & MCI_STATUS_UC) {
3494                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3495                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3496                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3497                         return 0;
3498                 }
3499                 if (banks[1] & MCI_STATUS_VAL)
3500                         mce->status |= MCI_STATUS_OVER;
3501                 banks[2] = mce->addr;
3502                 banks[3] = mce->misc;
3503                 vcpu->arch.mcg_status = mce->mcg_status;
3504                 banks[1] = mce->status;
3505                 kvm_queue_exception(vcpu, MC_VECTOR);
3506         } else if (!(banks[1] & MCI_STATUS_VAL)
3507                    || !(banks[1] & MCI_STATUS_UC)) {
3508                 if (banks[1] & MCI_STATUS_VAL)
3509                         mce->status |= MCI_STATUS_OVER;
3510                 banks[2] = mce->addr;
3511                 banks[3] = mce->misc;
3512                 banks[1] = mce->status;
3513         } else
3514                 banks[1] |= MCI_STATUS_OVER;
3515         return 0;
3516 }
3517
3518 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3519                                                struct kvm_vcpu_events *events)
3520 {
3521         process_nmi(vcpu);
3522
3523         /*
3524          * The API doesn't provide the instruction length for software
3525          * exceptions, so don't report them. As long as the guest RIP
3526          * isn't advanced, we should expect to encounter the exception
3527          * again.
3528          */
3529         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3530                 events->exception.injected = 0;
3531                 events->exception.pending = 0;
3532         } else {
3533                 events->exception.injected = vcpu->arch.exception.injected;
3534                 events->exception.pending = vcpu->arch.exception.pending;
3535                 /*
3536                  * For ABI compatibility, deliberately conflate
3537                  * pending and injected exceptions when
3538                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3539                  */
3540                 if (!vcpu->kvm->arch.exception_payload_enabled)
3541                         events->exception.injected |=
3542                                 vcpu->arch.exception.pending;
3543         }
3544         events->exception.nr = vcpu->arch.exception.nr;
3545         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3546         events->exception.error_code = vcpu->arch.exception.error_code;
3547         events->exception_has_payload = vcpu->arch.exception.has_payload;
3548         events->exception_payload = vcpu->arch.exception.payload;
3549
3550         events->interrupt.injected =
3551                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3552         events->interrupt.nr = vcpu->arch.interrupt.nr;
3553         events->interrupt.soft = 0;
3554         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3555
3556         events->nmi.injected = vcpu->arch.nmi_injected;
3557         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3558         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3559         events->nmi.pad = 0;
3560
3561         events->sipi_vector = 0; /* never valid when reporting to user space */
3562
3563         events->smi.smm = is_smm(vcpu);
3564         events->smi.pending = vcpu->arch.smi_pending;
3565         events->smi.smm_inside_nmi =
3566                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3567         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3568
3569         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3570                          | KVM_VCPUEVENT_VALID_SHADOW
3571                          | KVM_VCPUEVENT_VALID_SMM);
3572         if (vcpu->kvm->arch.exception_payload_enabled)
3573                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3574
3575         memset(&events->reserved, 0, sizeof(events->reserved));
3576 }
3577
3578 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3579
3580 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3581                                               struct kvm_vcpu_events *events)
3582 {
3583         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3584                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3585                               | KVM_VCPUEVENT_VALID_SHADOW
3586                               | KVM_VCPUEVENT_VALID_SMM
3587                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3588                 return -EINVAL;
3589
3590         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3591                 if (!vcpu->kvm->arch.exception_payload_enabled)
3592                         return -EINVAL;
3593                 if (events->exception.pending)
3594                         events->exception.injected = 0;
3595                 else
3596                         events->exception_has_payload = 0;
3597         } else {
3598                 events->exception.pending = 0;
3599                 events->exception_has_payload = 0;
3600         }
3601
3602         if ((events->exception.injected || events->exception.pending) &&
3603             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3604                 return -EINVAL;
3605
3606         /* INITs are latched while in SMM */
3607         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3608             (events->smi.smm || events->smi.pending) &&
3609             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3610                 return -EINVAL;
3611
3612         process_nmi(vcpu);
3613         vcpu->arch.exception.injected = events->exception.injected;
3614         vcpu->arch.exception.pending = events->exception.pending;
3615         vcpu->arch.exception.nr = events->exception.nr;
3616         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3617         vcpu->arch.exception.error_code = events->exception.error_code;
3618         vcpu->arch.exception.has_payload = events->exception_has_payload;
3619         vcpu->arch.exception.payload = events->exception_payload;
3620
3621         vcpu->arch.interrupt.injected = events->interrupt.injected;
3622         vcpu->arch.interrupt.nr = events->interrupt.nr;
3623         vcpu->arch.interrupt.soft = events->interrupt.soft;
3624         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3625                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3626                                                   events->interrupt.shadow);
3627
3628         vcpu->arch.nmi_injected = events->nmi.injected;
3629         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3630                 vcpu->arch.nmi_pending = events->nmi.pending;
3631         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3632
3633         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3634             lapic_in_kernel(vcpu))
3635                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3636
3637         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3638                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3639                         if (events->smi.smm)
3640                                 vcpu->arch.hflags |= HF_SMM_MASK;
3641                         else
3642                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3643                         kvm_smm_changed(vcpu);
3644                 }
3645
3646                 vcpu->arch.smi_pending = events->smi.pending;
3647
3648                 if (events->smi.smm) {
3649                         if (events->smi.smm_inside_nmi)
3650                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3651                         else
3652                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3653                         if (lapic_in_kernel(vcpu)) {
3654                                 if (events->smi.latched_init)
3655                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3656                                 else
3657                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3658                         }
3659                 }
3660         }
3661
3662         kvm_make_request(KVM_REQ_EVENT, vcpu);
3663
3664         return 0;
3665 }
3666
3667 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3668                                              struct kvm_debugregs *dbgregs)
3669 {
3670         unsigned long val;
3671
3672         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3673         kvm_get_dr(vcpu, 6, &val);
3674         dbgregs->dr6 = val;
3675         dbgregs->dr7 = vcpu->arch.dr7;
3676         dbgregs->flags = 0;
3677         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3678 }
3679
3680 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3681                                             struct kvm_debugregs *dbgregs)
3682 {
3683         if (dbgregs->flags)
3684                 return -EINVAL;
3685
3686         if (dbgregs->dr6 & ~0xffffffffull)
3687                 return -EINVAL;
3688         if (dbgregs->dr7 & ~0xffffffffull)
3689                 return -EINVAL;
3690
3691         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3692         kvm_update_dr0123(vcpu);
3693         vcpu->arch.dr6 = dbgregs->dr6;
3694         kvm_update_dr6(vcpu);
3695         vcpu->arch.dr7 = dbgregs->dr7;
3696         kvm_update_dr7(vcpu);
3697
3698         return 0;
3699 }
3700
3701 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3702
3703 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3704 {
3705         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3706         u64 xstate_bv = xsave->header.xfeatures;
3707         u64 valid;
3708
3709         /*
3710          * Copy legacy XSAVE area, to avoid complications with CPUID
3711          * leaves 0 and 1 in the loop below.
3712          */
3713         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3714
3715         /* Set XSTATE_BV */
3716         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3717         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3718
3719         /*
3720          * Copy each region from the possibly compacted offset to the
3721          * non-compacted offset.
3722          */
3723         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3724         while (valid) {
3725                 u64 xfeature_mask = valid & -valid;
3726                 int xfeature_nr = fls64(xfeature_mask) - 1;
3727                 void *src = get_xsave_addr(xsave, xfeature_nr);
3728
3729                 if (src) {
3730                         u32 size, offset, ecx, edx;
3731                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3732                                     &size, &offset, &ecx, &edx);
3733                         if (xfeature_nr == XFEATURE_PKRU)
3734                                 memcpy(dest + offset, &vcpu->arch.pkru,
3735                                        sizeof(vcpu->arch.pkru));
3736                         else
3737                                 memcpy(dest + offset, src, size);
3738
3739                 }
3740
3741                 valid -= xfeature_mask;
3742         }
3743 }
3744
3745 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3746 {
3747         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3748         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3749         u64 valid;
3750
3751         /*
3752          * Copy legacy XSAVE area, to avoid complications with CPUID
3753          * leaves 0 and 1 in the loop below.
3754          */
3755         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3756
3757         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3758         xsave->header.xfeatures = xstate_bv;
3759         if (boot_cpu_has(X86_FEATURE_XSAVES))
3760                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3761
3762         /*
3763          * Copy each region from the non-compacted offset to the
3764          * possibly compacted offset.
3765          */
3766         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3767         while (valid) {
3768                 u64 xfeature_mask = valid & -valid;
3769                 int xfeature_nr = fls64(xfeature_mask) - 1;
3770                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3771
3772                 if (dest) {
3773                         u32 size, offset, ecx, edx;
3774                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3775                                     &size, &offset, &ecx, &edx);
3776                         if (xfeature_nr == XFEATURE_PKRU)
3777                                 memcpy(&vcpu->arch.pkru, src + offset,
3778                                        sizeof(vcpu->arch.pkru));
3779                         else
3780                                 memcpy(dest, src + offset, size);
3781                 }
3782
3783                 valid -= xfeature_mask;
3784         }
3785 }
3786
3787 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3788                                          struct kvm_xsave *guest_xsave)
3789 {
3790         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3791                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3792                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3793         } else {
3794                 memcpy(guest_xsave->region,
3795                         &vcpu->arch.guest_fpu->state.fxsave,
3796                         sizeof(struct fxregs_state));
3797                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3798                         XFEATURE_MASK_FPSSE;
3799         }
3800 }
3801
3802 #define XSAVE_MXCSR_OFFSET 24
3803
3804 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3805                                         struct kvm_xsave *guest_xsave)
3806 {
3807         u64 xstate_bv =
3808                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3809         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3810
3811         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3812                 /*
3813                  * Here we allow setting states that are not present in
3814                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3815                  * with old userspace.
3816                  */
3817                 if (xstate_bv & ~kvm_supported_xcr0() ||
3818                         mxcsr & ~mxcsr_feature_mask)
3819                         return -EINVAL;
3820                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3821         } else {
3822                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3823                         mxcsr & ~mxcsr_feature_mask)
3824                         return -EINVAL;
3825                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3826                         guest_xsave->region, sizeof(struct fxregs_state));
3827         }
3828         return 0;
3829 }
3830
3831 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3832                                         struct kvm_xcrs *guest_xcrs)
3833 {
3834         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3835                 guest_xcrs->nr_xcrs = 0;
3836                 return;
3837         }
3838
3839         guest_xcrs->nr_xcrs = 1;
3840         guest_xcrs->flags = 0;
3841         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3842         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3843 }
3844
3845 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3846                                        struct kvm_xcrs *guest_xcrs)
3847 {
3848         int i, r = 0;
3849
3850         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3851                 return -EINVAL;
3852
3853         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3854                 return -EINVAL;
3855
3856         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3857                 /* Only support XCR0 currently */
3858                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3859                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3860                                 guest_xcrs->xcrs[i].value);
3861                         break;
3862                 }
3863         if (r)
3864                 r = -EINVAL;
3865         return r;
3866 }
3867
3868 /*
3869  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3870  * stopped by the hypervisor.  This function will be called from the host only.
3871  * EINVAL is returned when the host attempts to set the flag for a guest that
3872  * does not support pv clocks.
3873  */
3874 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3875 {
3876         if (!vcpu->arch.pv_time_enabled)
3877                 return -EINVAL;
3878         vcpu->arch.pvclock_set_guest_stopped_request = true;
3879         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3880         return 0;
3881 }
3882
3883 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3884                                      struct kvm_enable_cap *cap)
3885 {
3886         int r;
3887         uint16_t vmcs_version;
3888         void __user *user_ptr;
3889
3890         if (cap->flags)
3891                 return -EINVAL;
3892
3893         switch (cap->cap) {
3894         case KVM_CAP_HYPERV_SYNIC2:
3895                 if (cap->args[0])
3896                         return -EINVAL;
3897                 /* fall through */
3898
3899         case KVM_CAP_HYPERV_SYNIC:
3900                 if (!irqchip_in_kernel(vcpu->kvm))
3901                         return -EINVAL;
3902                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3903                                              KVM_CAP_HYPERV_SYNIC2);
3904         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3905                 if (!kvm_x86_ops->nested_enable_evmcs)
3906                         return -ENOTTY;
3907                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
3908                 if (!r) {
3909                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
3910                         if (copy_to_user(user_ptr, &vmcs_version,
3911                                          sizeof(vmcs_version)))
3912                                 r = -EFAULT;
3913                 }
3914                 return r;
3915
3916         default:
3917                 return -EINVAL;
3918         }
3919 }
3920
3921 long kvm_arch_vcpu_ioctl(struct file *filp,
3922                          unsigned int ioctl, unsigned long arg)
3923 {
3924         struct kvm_vcpu *vcpu = filp->private_data;
3925         void __user *argp = (void __user *)arg;
3926         int r;
3927         union {
3928                 struct kvm_lapic_state *lapic;
3929                 struct kvm_xsave *xsave;
3930                 struct kvm_xcrs *xcrs;
3931                 void *buffer;
3932         } u;
3933
3934         vcpu_load(vcpu);
3935
3936         u.buffer = NULL;
3937         switch (ioctl) {
3938         case KVM_GET_LAPIC: {
3939                 r = -EINVAL;
3940                 if (!lapic_in_kernel(vcpu))
3941                         goto out;
3942                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
3943                                 GFP_KERNEL_ACCOUNT);
3944
3945                 r = -ENOMEM;
3946                 if (!u.lapic)
3947                         goto out;
3948                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3949                 if (r)
3950                         goto out;
3951                 r = -EFAULT;
3952                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3953                         goto out;
3954                 r = 0;
3955                 break;
3956         }
3957         case KVM_SET_LAPIC: {
3958                 r = -EINVAL;
3959                 if (!lapic_in_kernel(vcpu))
3960                         goto out;
3961                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3962                 if (IS_ERR(u.lapic)) {
3963                         r = PTR_ERR(u.lapic);
3964                         goto out_nofree;
3965                 }
3966
3967                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3968                 break;
3969         }
3970         case KVM_INTERRUPT: {
3971                 struct kvm_interrupt irq;
3972
3973                 r = -EFAULT;
3974                 if (copy_from_user(&irq, argp, sizeof(irq)))
3975                         goto out;
3976                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3977                 break;
3978         }
3979         case KVM_NMI: {
3980                 r = kvm_vcpu_ioctl_nmi(vcpu);
3981                 break;
3982         }
3983         case KVM_SMI: {
3984                 r = kvm_vcpu_ioctl_smi(vcpu);
3985                 break;
3986         }
3987         case KVM_SET_CPUID: {
3988                 struct kvm_cpuid __user *cpuid_arg = argp;
3989                 struct kvm_cpuid cpuid;
3990
3991                 r = -EFAULT;
3992                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3993                         goto out;
3994                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3995                 break;
3996         }
3997         case KVM_SET_CPUID2: {
3998                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3999                 struct kvm_cpuid2 cpuid;
4000
4001                 r = -EFAULT;
4002                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4003                         goto out;
4004                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4005                                               cpuid_arg->entries);
4006                 break;
4007         }
4008         case KVM_GET_CPUID2: {
4009                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4010                 struct kvm_cpuid2 cpuid;
4011
4012                 r = -EFAULT;
4013                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4014                         goto out;
4015                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4016                                               cpuid_arg->entries);
4017                 if (r)
4018                         goto out;
4019                 r = -EFAULT;
4020                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4021                         goto out;
4022                 r = 0;
4023                 break;
4024         }
4025         case KVM_GET_MSRS: {
4026                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4027                 r = msr_io(vcpu, argp, do_get_msr, 1);
4028                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4029                 break;
4030         }
4031         case KVM_SET_MSRS: {
4032                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4033                 r = msr_io(vcpu, argp, do_set_msr, 0);
4034                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4035                 break;
4036         }
4037         case KVM_TPR_ACCESS_REPORTING: {
4038                 struct kvm_tpr_access_ctl tac;
4039
4040                 r = -EFAULT;
4041                 if (copy_from_user(&tac, argp, sizeof(tac)))
4042                         goto out;
4043                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4044                 if (r)
4045                         goto out;
4046                 r = -EFAULT;
4047                 if (copy_to_user(argp, &tac, sizeof(tac)))
4048                         goto out;
4049                 r = 0;
4050                 break;
4051         };
4052         case KVM_SET_VAPIC_ADDR: {
4053                 struct kvm_vapic_addr va;
4054                 int idx;
4055
4056                 r = -EINVAL;
4057                 if (!lapic_in_kernel(vcpu))
4058                         goto out;
4059                 r = -EFAULT;
4060                 if (copy_from_user(&va, argp, sizeof(va)))
4061                         goto out;
4062                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4063                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4064                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4065                 break;
4066         }
4067         case KVM_X86_SETUP_MCE: {
4068                 u64 mcg_cap;
4069
4070                 r = -EFAULT;
4071                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4072                         goto out;
4073                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4074                 break;
4075         }
4076         case KVM_X86_SET_MCE: {
4077                 struct kvm_x86_mce mce;
4078
4079                 r = -EFAULT;
4080                 if (copy_from_user(&mce, argp, sizeof(mce)))
4081                         goto out;
4082                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4083                 break;
4084         }
4085         case KVM_GET_VCPU_EVENTS: {
4086                 struct kvm_vcpu_events events;
4087
4088                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4089
4090                 r = -EFAULT;
4091                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4092                         break;
4093                 r = 0;
4094                 break;
4095         }
4096         case KVM_SET_VCPU_EVENTS: {
4097                 struct kvm_vcpu_events events;
4098
4099                 r = -EFAULT;
4100                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4101                         break;
4102
4103                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4104                 break;
4105         }
4106         case KVM_GET_DEBUGREGS: {
4107                 struct kvm_debugregs dbgregs;
4108
4109                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4110
4111                 r = -EFAULT;
4112                 if (copy_to_user(argp, &dbgregs,
4113                                  sizeof(struct kvm_debugregs)))
4114                         break;
4115                 r = 0;
4116                 break;
4117         }
4118         case KVM_SET_DEBUGREGS: {
4119                 struct kvm_debugregs dbgregs;
4120
4121                 r = -EFAULT;
4122                 if (copy_from_user(&dbgregs, argp,
4123                                    sizeof(struct kvm_debugregs)))
4124                         break;
4125
4126                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4127                 break;
4128         }
4129         case KVM_GET_XSAVE: {
4130                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4131                 r = -ENOMEM;
4132                 if (!u.xsave)
4133                         break;
4134
4135                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4136
4137                 r = -EFAULT;
4138                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4139                         break;
4140                 r = 0;
4141                 break;
4142         }
4143         case KVM_SET_XSAVE: {
4144                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4145                 if (IS_ERR(u.xsave)) {
4146                         r = PTR_ERR(u.xsave);
4147                         goto out_nofree;
4148                 }
4149
4150                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4151                 break;
4152         }
4153         case KVM_GET_XCRS: {
4154                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4155                 r = -ENOMEM;
4156                 if (!u.xcrs)
4157                         break;
4158
4159                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4160
4161                 r = -EFAULT;
4162                 if (copy_to_user(argp, u.xcrs,
4163                                  sizeof(struct kvm_xcrs)))
4164                         break;
4165                 r = 0;
4166                 break;
4167         }
4168         case KVM_SET_XCRS: {
4169                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4170                 if (IS_ERR(u.xcrs)) {
4171                         r = PTR_ERR(u.xcrs);
4172                         goto out_nofree;
4173                 }
4174
4175                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4176                 break;
4177         }
4178         case KVM_SET_TSC_KHZ: {
4179                 u32 user_tsc_khz;
4180
4181                 r = -EINVAL;
4182                 user_tsc_khz = (u32)arg;
4183
4184                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4185                         goto out;
4186
4187                 if (user_tsc_khz == 0)
4188                         user_tsc_khz = tsc_khz;
4189
4190                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4191                         r = 0;
4192
4193                 goto out;
4194         }
4195         case KVM_GET_TSC_KHZ: {
4196                 r = vcpu->arch.virtual_tsc_khz;
4197                 goto out;
4198         }
4199         case KVM_KVMCLOCK_CTRL: {
4200                 r = kvm_set_guest_paused(vcpu);
4201                 goto out;
4202         }
4203         case KVM_ENABLE_CAP: {
4204                 struct kvm_enable_cap cap;
4205
4206                 r = -EFAULT;
4207                 if (copy_from_user(&cap, argp, sizeof(cap)))
4208                         goto out;
4209                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4210                 break;
4211         }
4212         case KVM_GET_NESTED_STATE: {
4213                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4214                 u32 user_data_size;
4215
4216                 r = -EINVAL;
4217                 if (!kvm_x86_ops->get_nested_state)
4218                         break;
4219
4220                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4221                 r = -EFAULT;
4222                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4223                         break;
4224
4225                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4226                                                   user_data_size);
4227                 if (r < 0)
4228                         break;
4229
4230                 if (r > user_data_size) {
4231                         if (put_user(r, &user_kvm_nested_state->size))
4232                                 r = -EFAULT;
4233                         else
4234                                 r = -E2BIG;
4235                         break;
4236                 }
4237
4238                 r = 0;
4239                 break;
4240         }
4241         case KVM_SET_NESTED_STATE: {
4242                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4243                 struct kvm_nested_state kvm_state;
4244
4245                 r = -EINVAL;
4246                 if (!kvm_x86_ops->set_nested_state)
4247                         break;
4248
4249                 r = -EFAULT;
4250                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4251                         break;
4252
4253                 r = -EINVAL;
4254                 if (kvm_state.size < sizeof(kvm_state))
4255                         break;
4256
4257                 if (kvm_state.flags &
4258                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4259                       | KVM_STATE_NESTED_EVMCS))
4260                         break;
4261
4262                 /* nested_run_pending implies guest_mode.  */
4263                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4264                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4265                         break;
4266
4267                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4268                 break;
4269         }
4270         case KVM_GET_SUPPORTED_HV_CPUID: {
4271                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4272                 struct kvm_cpuid2 cpuid;
4273
4274                 r = -EFAULT;
4275                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4276                         goto out;
4277
4278                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4279                                                 cpuid_arg->entries);
4280                 if (r)
4281                         goto out;
4282
4283                 r = -EFAULT;
4284                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4285                         goto out;
4286                 r = 0;
4287                 break;
4288         }
4289         default:
4290                 r = -EINVAL;
4291         }
4292 out:
4293         kfree(u.buffer);
4294 out_nofree:
4295         vcpu_put(vcpu);
4296         return r;
4297 }
4298
4299 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4300 {
4301         return VM_FAULT_SIGBUS;
4302 }
4303
4304 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4305 {
4306         int ret;
4307
4308         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4309                 return -EINVAL;
4310         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4311         return ret;
4312 }
4313
4314 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4315                                               u64 ident_addr)
4316 {
4317         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4318 }
4319
4320 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4321                                          unsigned long kvm_nr_mmu_pages)
4322 {
4323         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4324                 return -EINVAL;
4325
4326         mutex_lock(&kvm->slots_lock);
4327
4328         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4329         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4330
4331         mutex_unlock(&kvm->slots_lock);
4332         return 0;
4333 }
4334
4335 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4336 {
4337         return kvm->arch.n_max_mmu_pages;
4338 }
4339
4340 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4341 {
4342         struct kvm_pic *pic = kvm->arch.vpic;
4343         int r;
4344
4345         r = 0;
4346         switch (chip->chip_id) {
4347         case KVM_IRQCHIP_PIC_MASTER:
4348                 memcpy(&chip->chip.pic, &pic->pics[0],
4349                         sizeof(struct kvm_pic_state));
4350                 break;
4351         case KVM_IRQCHIP_PIC_SLAVE:
4352                 memcpy(&chip->chip.pic, &pic->pics[1],
4353                         sizeof(struct kvm_pic_state));
4354                 break;
4355         case KVM_IRQCHIP_IOAPIC:
4356                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4357                 break;
4358         default:
4359                 r = -EINVAL;
4360                 break;
4361         }
4362         return r;
4363 }
4364
4365 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4366 {
4367         struct kvm_pic *pic = kvm->arch.vpic;
4368         int r;
4369
4370         r = 0;
4371         switch (chip->chip_id) {
4372         case KVM_IRQCHIP_PIC_MASTER:
4373                 spin_lock(&pic->lock);
4374                 memcpy(&pic->pics[0], &chip->chip.pic,
4375                         sizeof(struct kvm_pic_state));
4376                 spin_unlock(&pic->lock);
4377                 break;
4378         case KVM_IRQCHIP_PIC_SLAVE:
4379                 spin_lock(&pic->lock);
4380                 memcpy(&pic->pics[1], &chip->chip.pic,
4381                         sizeof(struct kvm_pic_state));
4382                 spin_unlock(&pic->lock);
4383                 break;
4384         case KVM_IRQCHIP_IOAPIC:
4385                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4386                 break;
4387         default:
4388                 r = -EINVAL;
4389                 break;
4390         }
4391         kvm_pic_update_irq(pic);
4392         return r;
4393 }
4394
4395 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4396 {
4397         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4398
4399         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4400
4401         mutex_lock(&kps->lock);
4402         memcpy(ps, &kps->channels, sizeof(*ps));
4403         mutex_unlock(&kps->lock);
4404         return 0;
4405 }
4406
4407 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4408 {
4409         int i;
4410         struct kvm_pit *pit = kvm->arch.vpit;
4411
4412         mutex_lock(&pit->pit_state.lock);
4413         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4414         for (i = 0; i < 3; i++)
4415                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4416         mutex_unlock(&pit->pit_state.lock);
4417         return 0;
4418 }
4419
4420 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4421 {
4422         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4423         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4424                 sizeof(ps->channels));
4425         ps->flags = kvm->arch.vpit->pit_state.flags;
4426         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4427         memset(&ps->reserved, 0, sizeof(ps->reserved));
4428         return 0;
4429 }
4430
4431 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4432 {
4433         int start = 0;
4434         int i;
4435         u32 prev_legacy, cur_legacy;
4436         struct kvm_pit *pit = kvm->arch.vpit;
4437
4438         mutex_lock(&pit->pit_state.lock);
4439         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4440         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4441         if (!prev_legacy && cur_legacy)
4442                 start = 1;
4443         memcpy(&pit->pit_state.channels, &ps->channels,
4444                sizeof(pit->pit_state.channels));
4445         pit->pit_state.flags = ps->flags;
4446         for (i = 0; i < 3; i++)
4447                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4448                                    start && i == 0);
4449         mutex_unlock(&pit->pit_state.lock);
4450         return 0;
4451 }
4452
4453 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4454                                  struct kvm_reinject_control *control)
4455 {
4456         struct kvm_pit *pit = kvm->arch.vpit;
4457
4458         if (!pit)
4459                 return -ENXIO;
4460
4461         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4462          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4463          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4464          */
4465         mutex_lock(&pit->pit_state.lock);
4466         kvm_pit_set_reinject(pit, control->pit_reinject);
4467         mutex_unlock(&pit->pit_state.lock);
4468
4469         return 0;
4470 }
4471
4472 /**
4473  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4474  * @kvm: kvm instance
4475  * @log: slot id and address to which we copy the log
4476  *
4477  * Steps 1-4 below provide general overview of dirty page logging. See
4478  * kvm_get_dirty_log_protect() function description for additional details.
4479  *
4480  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4481  * always flush the TLB (step 4) even if previous step failed  and the dirty
4482  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4483  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4484  * writes will be marked dirty for next log read.
4485  *
4486  *   1. Take a snapshot of the bit and clear it if needed.
4487  *   2. Write protect the corresponding page.
4488  *   3. Copy the snapshot to the userspace.
4489  *   4. Flush TLB's if needed.
4490  */
4491 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4492 {
4493         bool flush = false;
4494         int r;
4495
4496         mutex_lock(&kvm->slots_lock);
4497
4498         /*
4499          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4500          */
4501         if (kvm_x86_ops->flush_log_dirty)
4502                 kvm_x86_ops->flush_log_dirty(kvm);
4503
4504         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4505
4506         /*
4507          * All the TLBs can be flushed out of mmu lock, see the comments in
4508          * kvm_mmu_slot_remove_write_access().
4509          */
4510         lockdep_assert_held(&kvm->slots_lock);
4511         if (flush)
4512                 kvm_flush_remote_tlbs(kvm);
4513
4514         mutex_unlock(&kvm->slots_lock);
4515         return r;
4516 }
4517
4518 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4519 {
4520         bool flush = false;
4521         int r;
4522
4523         mutex_lock(&kvm->slots_lock);
4524
4525         /*
4526          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4527          */
4528         if (kvm_x86_ops->flush_log_dirty)
4529                 kvm_x86_ops->flush_log_dirty(kvm);
4530
4531         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4532
4533         /*
4534          * All the TLBs can be flushed out of mmu lock, see the comments in
4535          * kvm_mmu_slot_remove_write_access().
4536          */
4537         lockdep_assert_held(&kvm->slots_lock);
4538         if (flush)
4539                 kvm_flush_remote_tlbs(kvm);
4540
4541         mutex_unlock(&kvm->slots_lock);
4542         return r;
4543 }
4544
4545 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4546                         bool line_status)
4547 {
4548         if (!irqchip_in_kernel(kvm))
4549                 return -ENXIO;
4550
4551         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4552                                         irq_event->irq, irq_event->level,
4553                                         line_status);
4554         return 0;
4555 }
4556
4557 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4558                             struct kvm_enable_cap *cap)
4559 {
4560         int r;
4561
4562         if (cap->flags)
4563                 return -EINVAL;
4564
4565         switch (cap->cap) {
4566         case KVM_CAP_DISABLE_QUIRKS:
4567                 kvm->arch.disabled_quirks = cap->args[0];
4568                 r = 0;
4569                 break;
4570         case KVM_CAP_SPLIT_IRQCHIP: {
4571                 mutex_lock(&kvm->lock);
4572                 r = -EINVAL;
4573                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4574                         goto split_irqchip_unlock;
4575                 r = -EEXIST;
4576                 if (irqchip_in_kernel(kvm))
4577                         goto split_irqchip_unlock;
4578                 if (kvm->created_vcpus)
4579                         goto split_irqchip_unlock;
4580                 r = kvm_setup_empty_irq_routing(kvm);
4581                 if (r)
4582                         goto split_irqchip_unlock;
4583                 /* Pairs with irqchip_in_kernel. */
4584                 smp_wmb();
4585                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4586                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4587                 r = 0;
4588 split_irqchip_unlock:
4589                 mutex_unlock(&kvm->lock);
4590                 break;
4591         }
4592         case KVM_CAP_X2APIC_API:
4593                 r = -EINVAL;
4594                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4595                         break;
4596
4597                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4598                         kvm->arch.x2apic_format = true;
4599                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4600                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4601
4602                 r = 0;
4603                 break;
4604         case KVM_CAP_X86_DISABLE_EXITS:
4605                 r = -EINVAL;
4606                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4607                         break;
4608
4609                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4610                         kvm_can_mwait_in_guest())
4611                         kvm->arch.mwait_in_guest = true;
4612                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4613                         kvm->arch.hlt_in_guest = true;
4614                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4615                         kvm->arch.pause_in_guest = true;
4616                 r = 0;
4617                 break;
4618         case KVM_CAP_MSR_PLATFORM_INFO:
4619                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4620                 r = 0;
4621                 break;
4622         case KVM_CAP_EXCEPTION_PAYLOAD:
4623                 kvm->arch.exception_payload_enabled = cap->args[0];
4624                 r = 0;
4625                 break;
4626         default:
4627                 r = -EINVAL;
4628                 break;
4629         }
4630         return r;
4631 }
4632
4633 long kvm_arch_vm_ioctl(struct file *filp,
4634                        unsigned int ioctl, unsigned long arg)
4635 {
4636         struct kvm *kvm = filp->private_data;
4637         void __user *argp = (void __user *)arg;
4638         int r = -ENOTTY;
4639         /*
4640          * This union makes it completely explicit to gcc-3.x
4641          * that these two variables' stack usage should be
4642          * combined, not added together.
4643          */
4644         union {
4645                 struct kvm_pit_state ps;
4646                 struct kvm_pit_state2 ps2;
4647                 struct kvm_pit_config pit_config;
4648         } u;
4649
4650         switch (ioctl) {
4651         case KVM_SET_TSS_ADDR:
4652                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4653                 break;
4654         case KVM_SET_IDENTITY_MAP_ADDR: {
4655                 u64 ident_addr;
4656
4657                 mutex_lock(&kvm->lock);
4658                 r = -EINVAL;
4659                 if (kvm->created_vcpus)
4660                         goto set_identity_unlock;
4661                 r = -EFAULT;
4662                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4663                         goto set_identity_unlock;
4664                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4665 set_identity_unlock:
4666                 mutex_unlock(&kvm->lock);
4667                 break;
4668         }
4669         case KVM_SET_NR_MMU_PAGES:
4670                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4671                 break;
4672         case KVM_GET_NR_MMU_PAGES:
4673                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4674                 break;
4675         case KVM_CREATE_IRQCHIP: {
4676                 mutex_lock(&kvm->lock);
4677
4678                 r = -EEXIST;
4679                 if (irqchip_in_kernel(kvm))
4680                         goto create_irqchip_unlock;
4681
4682                 r = -EINVAL;
4683                 if (kvm->created_vcpus)
4684                         goto create_irqchip_unlock;
4685
4686                 r = kvm_pic_init(kvm);
4687                 if (r)
4688                         goto create_irqchip_unlock;
4689
4690                 r = kvm_ioapic_init(kvm);
4691                 if (r) {
4692                         kvm_pic_destroy(kvm);
4693                         goto create_irqchip_unlock;
4694                 }
4695
4696                 r = kvm_setup_default_irq_routing(kvm);
4697                 if (r) {
4698                         kvm_ioapic_destroy(kvm);
4699                         kvm_pic_destroy(kvm);
4700                         goto create_irqchip_unlock;
4701                 }
4702                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4703                 smp_wmb();
4704                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4705         create_irqchip_unlock:
4706                 mutex_unlock(&kvm->lock);
4707                 break;
4708         }
4709         case KVM_CREATE_PIT:
4710                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4711                 goto create_pit;
4712         case KVM_CREATE_PIT2:
4713                 r = -EFAULT;
4714                 if (copy_from_user(&u.pit_config, argp,
4715                                    sizeof(struct kvm_pit_config)))
4716                         goto out;
4717         create_pit:
4718                 mutex_lock(&kvm->lock);
4719                 r = -EEXIST;
4720                 if (kvm->arch.vpit)
4721                         goto create_pit_unlock;
4722                 r = -ENOMEM;
4723                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4724                 if (kvm->arch.vpit)
4725                         r = 0;
4726         create_pit_unlock:
4727                 mutex_unlock(&kvm->lock);
4728                 break;
4729         case KVM_GET_IRQCHIP: {
4730                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4731                 struct kvm_irqchip *chip;
4732
4733                 chip = memdup_user(argp, sizeof(*chip));
4734                 if (IS_ERR(chip)) {
4735                         r = PTR_ERR(chip);
4736                         goto out;
4737                 }
4738
4739                 r = -ENXIO;
4740                 if (!irqchip_kernel(kvm))
4741                         goto get_irqchip_out;
4742                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4743                 if (r)
4744                         goto get_irqchip_out;
4745                 r = -EFAULT;
4746                 if (copy_to_user(argp, chip, sizeof(*chip)))
4747                         goto get_irqchip_out;
4748                 r = 0;
4749         get_irqchip_out:
4750                 kfree(chip);
4751                 break;
4752         }
4753         case KVM_SET_IRQCHIP: {
4754                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4755                 struct kvm_irqchip *chip;
4756
4757                 chip = memdup_user(argp, sizeof(*chip));
4758                 if (IS_ERR(chip)) {
4759                         r = PTR_ERR(chip);
4760                         goto out;
4761                 }
4762
4763                 r = -ENXIO;
4764                 if (!irqchip_kernel(kvm))
4765                         goto set_irqchip_out;
4766                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4767                 if (r)
4768                         goto set_irqchip_out;
4769                 r = 0;
4770         set_irqchip_out:
4771                 kfree(chip);
4772                 break;
4773         }
4774         case KVM_GET_PIT: {
4775                 r = -EFAULT;
4776                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4777                         goto out;
4778                 r = -ENXIO;
4779                 if (!kvm->arch.vpit)
4780                         goto out;
4781                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4782                 if (r)
4783                         goto out;
4784                 r = -EFAULT;
4785                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4786                         goto out;
4787                 r = 0;
4788                 break;
4789         }
4790         case KVM_SET_PIT: {
4791                 r = -EFAULT;
4792                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4793                         goto out;
4794                 r = -ENXIO;
4795                 if (!kvm->arch.vpit)
4796                         goto out;
4797                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4798                 break;
4799         }
4800         case KVM_GET_PIT2: {
4801                 r = -ENXIO;
4802                 if (!kvm->arch.vpit)
4803                         goto out;
4804                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4805                 if (r)
4806                         goto out;
4807                 r = -EFAULT;
4808                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4809                         goto out;
4810                 r = 0;
4811                 break;
4812         }
4813         case KVM_SET_PIT2: {
4814                 r = -EFAULT;
4815                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4816                         goto out;
4817                 r = -ENXIO;
4818                 if (!kvm->arch.vpit)
4819                         goto out;
4820                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4821                 break;
4822         }
4823         case KVM_REINJECT_CONTROL: {
4824                 struct kvm_reinject_control control;
4825                 r =  -EFAULT;
4826                 if (copy_from_user(&control, argp, sizeof(control)))
4827                         goto out;
4828                 r = kvm_vm_ioctl_reinject(kvm, &control);
4829                 break;
4830         }
4831         case KVM_SET_BOOT_CPU_ID:
4832                 r = 0;
4833                 mutex_lock(&kvm->lock);
4834                 if (kvm->created_vcpus)
4835                         r = -EBUSY;
4836                 else
4837                         kvm->arch.bsp_vcpu_id = arg;
4838                 mutex_unlock(&kvm->lock);
4839                 break;
4840         case KVM_XEN_HVM_CONFIG: {
4841                 struct kvm_xen_hvm_config xhc;
4842                 r = -EFAULT;
4843                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4844                         goto out;
4845                 r = -EINVAL;
4846                 if (xhc.flags)
4847                         goto out;
4848                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4849                 r = 0;
4850                 break;
4851         }
4852         case KVM_SET_CLOCK: {
4853                 struct kvm_clock_data user_ns;
4854                 u64 now_ns;
4855
4856                 r = -EFAULT;
4857                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4858                         goto out;
4859
4860                 r = -EINVAL;
4861                 if (user_ns.flags)
4862                         goto out;
4863
4864                 r = 0;
4865                 /*
4866                  * TODO: userspace has to take care of races with VCPU_RUN, so
4867                  * kvm_gen_update_masterclock() can be cut down to locked
4868                  * pvclock_update_vm_gtod_copy().
4869                  */
4870                 kvm_gen_update_masterclock(kvm);
4871                 now_ns = get_kvmclock_ns(kvm);
4872                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4873                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4874                 break;
4875         }
4876         case KVM_GET_CLOCK: {
4877                 struct kvm_clock_data user_ns;
4878                 u64 now_ns;
4879
4880                 now_ns = get_kvmclock_ns(kvm);
4881                 user_ns.clock = now_ns;
4882                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4883                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4884
4885                 r = -EFAULT;
4886                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4887                         goto out;
4888                 r = 0;
4889                 break;
4890         }
4891         case KVM_MEMORY_ENCRYPT_OP: {
4892                 r = -ENOTTY;
4893                 if (kvm_x86_ops->mem_enc_op)
4894                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4895                 break;
4896         }
4897         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4898                 struct kvm_enc_region region;
4899
4900                 r = -EFAULT;
4901                 if (copy_from_user(&region, argp, sizeof(region)))
4902                         goto out;
4903
4904                 r = -ENOTTY;
4905                 if (kvm_x86_ops->mem_enc_reg_region)
4906                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4907                 break;
4908         }
4909         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4910                 struct kvm_enc_region region;
4911
4912                 r = -EFAULT;
4913                 if (copy_from_user(&region, argp, sizeof(region)))
4914                         goto out;
4915
4916                 r = -ENOTTY;
4917                 if (kvm_x86_ops->mem_enc_unreg_region)
4918                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4919                 break;
4920         }
4921         case KVM_HYPERV_EVENTFD: {
4922                 struct kvm_hyperv_eventfd hvevfd;
4923
4924                 r = -EFAULT;
4925                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4926                         goto out;
4927                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4928                 break;
4929         }
4930         default:
4931                 r = -ENOTTY;
4932         }
4933 out:
4934         return r;
4935 }
4936
4937 static void kvm_init_msr_list(void)
4938 {
4939         u32 dummy[2];
4940         unsigned i, j;
4941
4942         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4943                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4944                         continue;
4945
4946                 /*
4947                  * Even MSRs that are valid in the host may not be exposed
4948                  * to the guests in some cases.
4949                  */
4950                 switch (msrs_to_save[i]) {
4951                 case MSR_IA32_BNDCFGS:
4952                         if (!kvm_mpx_supported())
4953                                 continue;
4954                         break;
4955                 case MSR_TSC_AUX:
4956                         if (!kvm_x86_ops->rdtscp_supported())
4957                                 continue;
4958                         break;
4959                 case MSR_IA32_RTIT_CTL:
4960                 case MSR_IA32_RTIT_STATUS:
4961                         if (!kvm_x86_ops->pt_supported())
4962                                 continue;
4963                         break;
4964                 case MSR_IA32_RTIT_CR3_MATCH:
4965                         if (!kvm_x86_ops->pt_supported() ||
4966                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
4967                                 continue;
4968                         break;
4969                 case MSR_IA32_RTIT_OUTPUT_BASE:
4970                 case MSR_IA32_RTIT_OUTPUT_MASK:
4971                         if (!kvm_x86_ops->pt_supported() ||
4972                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
4973                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
4974                                 continue;
4975                         break;
4976                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
4977                         if (!kvm_x86_ops->pt_supported() ||
4978                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
4979                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
4980                                 continue;
4981                         break;
4982                 }
4983                 default:
4984                         break;
4985                 }
4986
4987                 if (j < i)
4988                         msrs_to_save[j] = msrs_to_save[i];
4989                 j++;
4990         }
4991         num_msrs_to_save = j;
4992
4993         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4994                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
4995                         continue;
4996
4997                 if (j < i)
4998                         emulated_msrs[j] = emulated_msrs[i];
4999                 j++;
5000         }
5001         num_emulated_msrs = j;
5002
5003         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5004                 struct kvm_msr_entry msr;
5005
5006                 msr.index = msr_based_features[i];
5007                 if (kvm_get_msr_feature(&msr))
5008                         continue;
5009
5010                 if (j < i)
5011                         msr_based_features[j] = msr_based_features[i];
5012                 j++;
5013         }
5014         num_msr_based_features = j;
5015 }
5016
5017 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5018                            const void *v)
5019 {
5020         int handled = 0;
5021         int n;
5022
5023         do {
5024                 n = min(len, 8);
5025                 if (!(lapic_in_kernel(vcpu) &&
5026                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5027                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5028                         break;
5029                 handled += n;
5030                 addr += n;
5031                 len -= n;
5032                 v += n;
5033         } while (len);
5034
5035         return handled;
5036 }
5037
5038 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5039 {
5040         int handled = 0;
5041         int n;
5042
5043         do {
5044                 n = min(len, 8);
5045                 if (!(lapic_in_kernel(vcpu) &&
5046                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5047                                          addr, n, v))
5048                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5049                         break;
5050                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5051                 handled += n;
5052                 addr += n;
5053                 len -= n;
5054                 v += n;
5055         } while (len);
5056
5057         return handled;
5058 }
5059
5060 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5061                         struct kvm_segment *var, int seg)
5062 {
5063         kvm_x86_ops->set_segment(vcpu, var, seg);
5064 }
5065
5066 void kvm_get_segment(struct kvm_vcpu *vcpu,
5067                      struct kvm_segment *var, int seg)
5068 {
5069         kvm_x86_ops->get_segment(vcpu, var, seg);
5070 }
5071
5072 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5073                            struct x86_exception *exception)
5074 {
5075         gpa_t t_gpa;
5076
5077         BUG_ON(!mmu_is_nested(vcpu));
5078
5079         /* NPT walks are always user-walks */
5080         access |= PFERR_USER_MASK;
5081         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5082
5083         return t_gpa;
5084 }
5085
5086 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5087                               struct x86_exception *exception)
5088 {
5089         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5090         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5091 }
5092
5093  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5094                                 struct x86_exception *exception)
5095 {
5096         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5097         access |= PFERR_FETCH_MASK;
5098         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5099 }
5100
5101 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5102                                struct x86_exception *exception)
5103 {
5104         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5105         access |= PFERR_WRITE_MASK;
5106         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5107 }
5108
5109 /* uses this to access any guest's mapped memory without checking CPL */
5110 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5111                                 struct x86_exception *exception)
5112 {
5113         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5114 }
5115
5116 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5117                                       struct kvm_vcpu *vcpu, u32 access,
5118                                       struct x86_exception *exception)
5119 {
5120         void *data = val;
5121         int r = X86EMUL_CONTINUE;
5122
5123         while (bytes) {
5124                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5125                                                             exception);
5126                 unsigned offset = addr & (PAGE_SIZE-1);
5127                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5128                 int ret;
5129
5130                 if (gpa == UNMAPPED_GVA)
5131                         return X86EMUL_PROPAGATE_FAULT;
5132                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5133                                                offset, toread);
5134                 if (ret < 0) {
5135                         r = X86EMUL_IO_NEEDED;
5136                         goto out;
5137                 }
5138
5139                 bytes -= toread;
5140                 data += toread;
5141                 addr += toread;
5142         }
5143 out:
5144         return r;
5145 }
5146
5147 /* used for instruction fetching */
5148 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5149                                 gva_t addr, void *val, unsigned int bytes,
5150                                 struct x86_exception *exception)
5151 {
5152         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5153         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5154         unsigned offset;
5155         int ret;
5156
5157         /* Inline kvm_read_guest_virt_helper for speed.  */
5158         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5159                                                     exception);
5160         if (unlikely(gpa == UNMAPPED_GVA))
5161                 return X86EMUL_PROPAGATE_FAULT;
5162
5163         offset = addr & (PAGE_SIZE-1);
5164         if (WARN_ON(offset + bytes > PAGE_SIZE))
5165                 bytes = (unsigned)PAGE_SIZE - offset;
5166         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5167                                        offset, bytes);
5168         if (unlikely(ret < 0))
5169                 return X86EMUL_IO_NEEDED;
5170
5171         return X86EMUL_CONTINUE;
5172 }
5173
5174 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5175                                gva_t addr, void *val, unsigned int bytes,
5176                                struct x86_exception *exception)
5177 {
5178         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5179
5180         /*
5181          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5182          * is returned, but our callers are not ready for that and they blindly
5183          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5184          * uninitialized kernel stack memory into cr2 and error code.
5185          */
5186         memset(exception, 0, sizeof(*exception));
5187         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5188                                           exception);
5189 }
5190 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5191
5192 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5193                              gva_t addr, void *val, unsigned int bytes,
5194                              struct x86_exception *exception, bool system)
5195 {
5196         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5197         u32 access = 0;
5198
5199         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5200                 access |= PFERR_USER_MASK;
5201
5202         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5203 }
5204
5205 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5206                 unsigned long addr, void *val, unsigned int bytes)
5207 {
5208         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5209         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5210
5211         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5212 }
5213
5214 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5215                                       struct kvm_vcpu *vcpu, u32 access,
5216                                       struct x86_exception *exception)
5217 {
5218         void *data = val;
5219         int r = X86EMUL_CONTINUE;
5220
5221         while (bytes) {
5222                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5223                                                              access,
5224                                                              exception);
5225                 unsigned offset = addr & (PAGE_SIZE-1);
5226                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5227                 int ret;
5228
5229                 if (gpa == UNMAPPED_GVA)
5230                         return X86EMUL_PROPAGATE_FAULT;
5231                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5232                 if (ret < 0) {
5233                         r = X86EMUL_IO_NEEDED;
5234                         goto out;
5235                 }
5236
5237                 bytes -= towrite;
5238                 data += towrite;
5239                 addr += towrite;
5240         }
5241 out:
5242         return r;
5243 }
5244
5245 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5246                               unsigned int bytes, struct x86_exception *exception,
5247                               bool system)
5248 {
5249         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5250         u32 access = PFERR_WRITE_MASK;
5251
5252         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5253                 access |= PFERR_USER_MASK;
5254
5255         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5256                                            access, exception);
5257 }
5258
5259 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5260                                 unsigned int bytes, struct x86_exception *exception)
5261 {
5262         /* kvm_write_guest_virt_system can pull in tons of pages. */
5263         vcpu->arch.l1tf_flush_l1d = true;
5264
5265         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5266                                            PFERR_WRITE_MASK, exception);
5267 }
5268 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5269
5270 int handle_ud(struct kvm_vcpu *vcpu)
5271 {
5272         int emul_type = EMULTYPE_TRAP_UD;
5273         enum emulation_result er;
5274         char sig[5]; /* ud2; .ascii "kvm" */
5275         struct x86_exception e;
5276
5277         if (force_emulation_prefix &&
5278             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5279                                 sig, sizeof(sig), &e) == 0 &&
5280             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5281                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5282                 emul_type = 0;
5283         }
5284
5285         er = kvm_emulate_instruction(vcpu, emul_type);
5286         if (er == EMULATE_USER_EXIT)
5287                 return 0;
5288         if (er != EMULATE_DONE)
5289                 kvm_queue_exception(vcpu, UD_VECTOR);
5290         return 1;
5291 }
5292 EXPORT_SYMBOL_GPL(handle_ud);
5293
5294 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5295                             gpa_t gpa, bool write)
5296 {
5297         /* For APIC access vmexit */
5298         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5299                 return 1;
5300
5301         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5302                 trace_vcpu_match_mmio(gva, gpa, write, true);
5303                 return 1;
5304         }
5305
5306         return 0;
5307 }
5308
5309 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5310                                 gpa_t *gpa, struct x86_exception *exception,
5311                                 bool write)
5312 {
5313         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5314                 | (write ? PFERR_WRITE_MASK : 0);
5315
5316         /*
5317          * currently PKRU is only applied to ept enabled guest so
5318          * there is no pkey in EPT page table for L1 guest or EPT
5319          * shadow page table for L2 guest.
5320          */
5321         if (vcpu_match_mmio_gva(vcpu, gva)
5322             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5323                                  vcpu->arch.access, 0, access)) {
5324                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5325                                         (gva & (PAGE_SIZE - 1));
5326                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5327                 return 1;
5328         }
5329
5330         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5331
5332         if (*gpa == UNMAPPED_GVA)
5333                 return -1;
5334
5335         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5336 }
5337
5338 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5339                         const void *val, int bytes)
5340 {
5341         int ret;
5342
5343         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5344         if (ret < 0)
5345                 return 0;
5346         kvm_page_track_write(vcpu, gpa, val, bytes);
5347         return 1;
5348 }
5349
5350 struct read_write_emulator_ops {
5351         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5352                                   int bytes);
5353         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5354                                   void *val, int bytes);
5355         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5356                                int bytes, void *val);
5357         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5358                                     void *val, int bytes);
5359         bool write;
5360 };
5361
5362 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5363 {
5364         if (vcpu->mmio_read_completed) {
5365                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5366                                vcpu->mmio_fragments[0].gpa, val);
5367                 vcpu->mmio_read_completed = 0;
5368                 return 1;
5369         }
5370
5371         return 0;
5372 }
5373
5374 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5375                         void *val, int bytes)
5376 {
5377         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5378 }
5379
5380 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5381                          void *val, int bytes)
5382 {
5383         return emulator_write_phys(vcpu, gpa, val, bytes);
5384 }
5385
5386 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5387 {
5388         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5389         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5390 }
5391
5392 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5393                           void *val, int bytes)
5394 {
5395         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5396         return X86EMUL_IO_NEEDED;
5397 }
5398
5399 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5400                            void *val, int bytes)
5401 {
5402         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5403
5404         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5405         return X86EMUL_CONTINUE;
5406 }
5407
5408 static const struct read_write_emulator_ops read_emultor = {
5409         .read_write_prepare = read_prepare,
5410         .read_write_emulate = read_emulate,
5411         .read_write_mmio = vcpu_mmio_read,
5412         .read_write_exit_mmio = read_exit_mmio,
5413 };
5414
5415 static const struct read_write_emulator_ops write_emultor = {
5416         .read_write_emulate = write_emulate,
5417         .read_write_mmio = write_mmio,
5418         .read_write_exit_mmio = write_exit_mmio,
5419         .write = true,
5420 };
5421
5422 static int emulator_read_write_onepage(unsigned long addr, void *val,
5423                                        unsigned int bytes,
5424                                        struct x86_exception *exception,
5425                                        struct kvm_vcpu *vcpu,
5426                                        const struct read_write_emulator_ops *ops)
5427 {
5428         gpa_t gpa;
5429         int handled, ret;
5430         bool write = ops->write;
5431         struct kvm_mmio_fragment *frag;
5432         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5433
5434         /*
5435          * If the exit was due to a NPF we may already have a GPA.
5436          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5437          * Note, this cannot be used on string operations since string
5438          * operation using rep will only have the initial GPA from the NPF
5439          * occurred.
5440          */
5441         if (vcpu->arch.gpa_available &&
5442             emulator_can_use_gpa(ctxt) &&
5443             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5444                 gpa = vcpu->arch.gpa_val;
5445                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5446         } else {
5447                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5448                 if (ret < 0)
5449                         return X86EMUL_PROPAGATE_FAULT;
5450         }
5451
5452         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5453                 return X86EMUL_CONTINUE;
5454
5455         /*
5456          * Is this MMIO handled locally?
5457          */
5458         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5459         if (handled == bytes)
5460                 return X86EMUL_CONTINUE;
5461
5462         gpa += handled;
5463         bytes -= handled;
5464         val += handled;
5465
5466         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5467         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5468         frag->gpa = gpa;
5469         frag->data = val;
5470         frag->len = bytes;
5471         return X86EMUL_CONTINUE;
5472 }
5473
5474 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5475                         unsigned long addr,
5476                         void *val, unsigned int bytes,
5477                         struct x86_exception *exception,
5478                         const struct read_write_emulator_ops *ops)
5479 {
5480         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5481         gpa_t gpa;
5482         int rc;
5483
5484         if (ops->read_write_prepare &&
5485                   ops->read_write_prepare(vcpu, val, bytes))
5486                 return X86EMUL_CONTINUE;
5487
5488         vcpu->mmio_nr_fragments = 0;
5489
5490         /* Crossing a page boundary? */
5491         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5492                 int now;
5493
5494                 now = -addr & ~PAGE_MASK;
5495                 rc = emulator_read_write_onepage(addr, val, now, exception,
5496                                                  vcpu, ops);
5497
5498                 if (rc != X86EMUL_CONTINUE)
5499                         return rc;
5500                 addr += now;
5501                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5502                         addr = (u32)addr;
5503                 val += now;
5504                 bytes -= now;
5505         }
5506
5507         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5508                                          vcpu, ops);
5509         if (rc != X86EMUL_CONTINUE)
5510                 return rc;
5511
5512         if (!vcpu->mmio_nr_fragments)
5513                 return rc;
5514
5515         gpa = vcpu->mmio_fragments[0].gpa;
5516
5517         vcpu->mmio_needed = 1;
5518         vcpu->mmio_cur_fragment = 0;
5519
5520         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5521         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5522         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5523         vcpu->run->mmio.phys_addr = gpa;
5524
5525         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5526 }
5527
5528 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5529                                   unsigned long addr,
5530                                   void *val,
5531                                   unsigned int bytes,
5532                                   struct x86_exception *exception)
5533 {
5534         return emulator_read_write(ctxt, addr, val, bytes,
5535                                    exception, &read_emultor);
5536 }
5537
5538 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5539                             unsigned long addr,
5540                             const void *val,
5541                             unsigned int bytes,
5542                             struct x86_exception *exception)
5543 {
5544         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5545                                    exception, &write_emultor);
5546 }
5547
5548 #define CMPXCHG_TYPE(t, ptr, old, new) \
5549         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5550
5551 #ifdef CONFIG_X86_64
5552 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5553 #else
5554 #  define CMPXCHG64(ptr, old, new) \
5555         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5556 #endif
5557
5558 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5559                                      unsigned long addr,
5560                                      const void *old,
5561                                      const void *new,
5562                                      unsigned int bytes,
5563                                      struct x86_exception *exception)
5564 {
5565         struct kvm_host_map map;
5566         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5567         gpa_t gpa;
5568         char *kaddr;
5569         bool exchanged;
5570
5571         /* guests cmpxchg8b have to be emulated atomically */
5572         if (bytes > 8 || (bytes & (bytes - 1)))
5573                 goto emul_write;
5574
5575         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5576
5577         if (gpa == UNMAPPED_GVA ||
5578             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5579                 goto emul_write;
5580
5581         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5582                 goto emul_write;
5583
5584         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5585                 goto emul_write;
5586
5587         kaddr = map.hva + offset_in_page(gpa);
5588
5589         switch (bytes) {
5590         case 1:
5591                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5592                 break;
5593         case 2:
5594                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5595                 break;
5596         case 4:
5597                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5598                 break;
5599         case 8:
5600                 exchanged = CMPXCHG64(kaddr, old, new);
5601                 break;
5602         default:
5603                 BUG();
5604         }
5605
5606         kvm_vcpu_unmap(vcpu, &map, true);
5607
5608         if (!exchanged)
5609                 return X86EMUL_CMPXCHG_FAILED;
5610
5611         kvm_page_track_write(vcpu, gpa, new, bytes);
5612
5613         return X86EMUL_CONTINUE;
5614
5615 emul_write:
5616         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5617
5618         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5619 }
5620
5621 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5622 {
5623         int r = 0, i;
5624
5625         for (i = 0; i < vcpu->arch.pio.count; i++) {
5626                 if (vcpu->arch.pio.in)
5627                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5628                                             vcpu->arch.pio.size, pd);
5629                 else
5630                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5631                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5632                                              pd);
5633                 if (r)
5634                         break;
5635                 pd += vcpu->arch.pio.size;
5636         }
5637         return r;
5638 }
5639
5640 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5641                                unsigned short port, void *val,
5642                                unsigned int count, bool in)
5643 {
5644         vcpu->arch.pio.port = port;
5645         vcpu->arch.pio.in = in;
5646         vcpu->arch.pio.count  = count;
5647         vcpu->arch.pio.size = size;
5648
5649         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5650                 vcpu->arch.pio.count = 0;
5651                 return 1;
5652         }
5653
5654         vcpu->run->exit_reason = KVM_EXIT_IO;
5655         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5656         vcpu->run->io.size = size;
5657         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5658         vcpu->run->io.count = count;
5659         vcpu->run->io.port = port;
5660
5661         return 0;
5662 }
5663
5664 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5665                                     int size, unsigned short port, void *val,
5666                                     unsigned int count)
5667 {
5668         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5669         int ret;
5670
5671         if (vcpu->arch.pio.count)
5672                 goto data_avail;
5673
5674         memset(vcpu->arch.pio_data, 0, size * count);
5675
5676         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5677         if (ret) {
5678 data_avail:
5679                 memcpy(val, vcpu->arch.pio_data, size * count);
5680                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5681                 vcpu->arch.pio.count = 0;
5682                 return 1;
5683         }
5684
5685         return 0;
5686 }
5687
5688 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5689                                      int size, unsigned short port,
5690                                      const void *val, unsigned int count)
5691 {
5692         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5693
5694         memcpy(vcpu->arch.pio_data, val, size * count);
5695         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5696         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5697 }
5698
5699 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5700 {
5701         return kvm_x86_ops->get_segment_base(vcpu, seg);
5702 }
5703
5704 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5705 {
5706         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5707 }
5708
5709 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5710 {
5711         if (!need_emulate_wbinvd(vcpu))
5712                 return X86EMUL_CONTINUE;
5713
5714         if (kvm_x86_ops->has_wbinvd_exit()) {
5715                 int cpu = get_cpu();
5716
5717                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5718                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5719                                 wbinvd_ipi, NULL, 1);
5720                 put_cpu();
5721                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5722         } else
5723                 wbinvd();
5724         return X86EMUL_CONTINUE;
5725 }
5726
5727 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5728 {
5729         kvm_emulate_wbinvd_noskip(vcpu);
5730         return kvm_skip_emulated_instruction(vcpu);
5731 }
5732 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5733
5734
5735
5736 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5737 {
5738         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5739 }
5740
5741 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5742                            unsigned long *dest)
5743 {
5744         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5745 }
5746
5747 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5748                            unsigned long value)
5749 {
5750
5751         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5752 }
5753
5754 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5755 {
5756         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5757 }
5758
5759 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5760 {
5761         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5762         unsigned long value;
5763
5764         switch (cr) {
5765         case 0:
5766                 value = kvm_read_cr0(vcpu);
5767                 break;
5768         case 2:
5769                 value = vcpu->arch.cr2;
5770                 break;
5771         case 3:
5772                 value = kvm_read_cr3(vcpu);
5773                 break;
5774         case 4:
5775                 value = kvm_read_cr4(vcpu);
5776                 break;
5777         case 8:
5778                 value = kvm_get_cr8(vcpu);
5779                 break;
5780         default:
5781                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5782                 return 0;
5783         }
5784
5785         return value;
5786 }
5787
5788 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5789 {
5790         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5791         int res = 0;
5792
5793         switch (cr) {
5794         case 0:
5795                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5796                 break;
5797         case 2:
5798                 vcpu->arch.cr2 = val;
5799                 break;
5800         case 3:
5801                 res = kvm_set_cr3(vcpu, val);
5802                 break;
5803         case 4:
5804                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5805                 break;
5806         case 8:
5807                 res = kvm_set_cr8(vcpu, val);
5808                 break;
5809         default:
5810                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5811                 res = -1;
5812         }
5813
5814         return res;
5815 }
5816
5817 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5818 {
5819         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5820 }
5821
5822 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5823 {
5824         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5825 }
5826
5827 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5828 {
5829         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5830 }
5831
5832 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5833 {
5834         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5835 }
5836
5837 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5838 {
5839         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5840 }
5841
5842 static unsigned long emulator_get_cached_segment_base(
5843         struct x86_emulate_ctxt *ctxt, int seg)
5844 {
5845         return get_segment_base(emul_to_vcpu(ctxt), seg);
5846 }
5847
5848 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5849                                  struct desc_struct *desc, u32 *base3,
5850                                  int seg)
5851 {
5852         struct kvm_segment var;
5853
5854         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5855         *selector = var.selector;
5856
5857         if (var.unusable) {
5858                 memset(desc, 0, sizeof(*desc));
5859                 if (base3)
5860                         *base3 = 0;
5861                 return false;
5862         }
5863
5864         if (var.g)
5865                 var.limit >>= 12;
5866         set_desc_limit(desc, var.limit);
5867         set_desc_base(desc, (unsigned long)var.base);
5868 #ifdef CONFIG_X86_64
5869         if (base3)
5870                 *base3 = var.base >> 32;
5871 #endif
5872         desc->type = var.type;
5873         desc->s = var.s;
5874         desc->dpl = var.dpl;
5875         desc->p = var.present;
5876         desc->avl = var.avl;
5877         desc->l = var.l;
5878         desc->d = var.db;
5879         desc->g = var.g;
5880
5881         return true;
5882 }
5883
5884 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5885                                  struct desc_struct *desc, u32 base3,
5886                                  int seg)
5887 {
5888         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5889         struct kvm_segment var;
5890
5891         var.selector = selector;
5892         var.base = get_desc_base(desc);
5893 #ifdef CONFIG_X86_64
5894         var.base |= ((u64)base3) << 32;
5895 #endif
5896         var.limit = get_desc_limit(desc);
5897         if (desc->g)
5898                 var.limit = (var.limit << 12) | 0xfff;
5899         var.type = desc->type;
5900         var.dpl = desc->dpl;
5901         var.db = desc->d;
5902         var.s = desc->s;
5903         var.l = desc->l;
5904         var.g = desc->g;
5905         var.avl = desc->avl;
5906         var.present = desc->p;
5907         var.unusable = !var.present;
5908         var.padding = 0;
5909
5910         kvm_set_segment(vcpu, &var, seg);
5911         return;
5912 }
5913
5914 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5915                             u32 msr_index, u64 *pdata)
5916 {
5917         struct msr_data msr;
5918         int r;
5919
5920         msr.index = msr_index;
5921         msr.host_initiated = false;
5922         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5923         if (r)
5924                 return r;
5925
5926         *pdata = msr.data;
5927         return 0;
5928 }
5929
5930 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5931                             u32 msr_index, u64 data)
5932 {
5933         struct msr_data msr;
5934
5935         msr.data = data;
5936         msr.index = msr_index;
5937         msr.host_initiated = false;
5938         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5939 }
5940
5941 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5942 {
5943         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5944
5945         return vcpu->arch.smbase;
5946 }
5947
5948 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5949 {
5950         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5951
5952         vcpu->arch.smbase = smbase;
5953 }
5954
5955 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5956                               u32 pmc)
5957 {
5958         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5959 }
5960
5961 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5962                              u32 pmc, u64 *pdata)
5963 {
5964         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5965 }
5966
5967 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5968 {
5969         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5970 }
5971
5972 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5973                               struct x86_instruction_info *info,
5974                               enum x86_intercept_stage stage)
5975 {
5976         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5977 }
5978
5979 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5980                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5981 {
5982         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5983 }
5984
5985 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5986 {
5987         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5988 }
5989
5990 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5991 {
5992         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5993 }
5994
5995 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5996 {
5997         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5998 }
5999
6000 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6001 {
6002         return emul_to_vcpu(ctxt)->arch.hflags;
6003 }
6004
6005 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6006 {
6007         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6008 }
6009
6010 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6011                                   const char *smstate)
6012 {
6013         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6014 }
6015
6016 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6017 {
6018         kvm_smm_changed(emul_to_vcpu(ctxt));
6019 }
6020
6021 static const struct x86_emulate_ops emulate_ops = {
6022         .read_gpr            = emulator_read_gpr,
6023         .write_gpr           = emulator_write_gpr,
6024         .read_std            = emulator_read_std,
6025         .write_std           = emulator_write_std,
6026         .read_phys           = kvm_read_guest_phys_system,
6027         .fetch               = kvm_fetch_guest_virt,
6028         .read_emulated       = emulator_read_emulated,
6029         .write_emulated      = emulator_write_emulated,
6030         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6031         .invlpg              = emulator_invlpg,
6032         .pio_in_emulated     = emulator_pio_in_emulated,
6033         .pio_out_emulated    = emulator_pio_out_emulated,
6034         .get_segment         = emulator_get_segment,
6035         .set_segment         = emulator_set_segment,
6036         .get_cached_segment_base = emulator_get_cached_segment_base,
6037         .get_gdt             = emulator_get_gdt,
6038         .get_idt             = emulator_get_idt,
6039         .set_gdt             = emulator_set_gdt,
6040         .set_idt             = emulator_set_idt,
6041         .get_cr              = emulator_get_cr,
6042         .set_cr              = emulator_set_cr,
6043         .cpl                 = emulator_get_cpl,
6044         .get_dr              = emulator_get_dr,
6045         .set_dr              = emulator_set_dr,
6046         .get_smbase          = emulator_get_smbase,
6047         .set_smbase          = emulator_set_smbase,
6048         .set_msr             = emulator_set_msr,
6049         .get_msr             = emulator_get_msr,
6050         .check_pmc           = emulator_check_pmc,
6051         .read_pmc            = emulator_read_pmc,
6052         .halt                = emulator_halt,
6053         .wbinvd              = emulator_wbinvd,
6054         .fix_hypercall       = emulator_fix_hypercall,
6055         .intercept           = emulator_intercept,
6056         .get_cpuid           = emulator_get_cpuid,
6057         .set_nmi_mask        = emulator_set_nmi_mask,
6058         .get_hflags          = emulator_get_hflags,
6059         .set_hflags          = emulator_set_hflags,
6060         .pre_leave_smm       = emulator_pre_leave_smm,
6061         .post_leave_smm      = emulator_post_leave_smm,
6062 };
6063
6064 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6065 {
6066         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6067         /*
6068          * an sti; sti; sequence only disable interrupts for the first
6069          * instruction. So, if the last instruction, be it emulated or
6070          * not, left the system with the INT_STI flag enabled, it
6071          * means that the last instruction is an sti. We should not
6072          * leave the flag on in this case. The same goes for mov ss
6073          */
6074         if (int_shadow & mask)
6075                 mask = 0;
6076         if (unlikely(int_shadow || mask)) {
6077                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6078                 if (!mask)
6079                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6080         }
6081 }
6082
6083 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6084 {
6085         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6086         if (ctxt->exception.vector == PF_VECTOR)
6087                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6088
6089         if (ctxt->exception.error_code_valid)
6090                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6091                                       ctxt->exception.error_code);
6092         else
6093                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6094         return false;
6095 }
6096
6097 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6098 {
6099         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6100         int cs_db, cs_l;
6101
6102         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6103
6104         ctxt->eflags = kvm_get_rflags(vcpu);
6105         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6106
6107         ctxt->eip = kvm_rip_read(vcpu);
6108         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6109                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6110                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6111                      cs_db                              ? X86EMUL_MODE_PROT32 :
6112                                                           X86EMUL_MODE_PROT16;
6113         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6114         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6115         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6116
6117         init_decode_cache(ctxt);
6118         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6119 }
6120
6121 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6122 {
6123         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6124         int ret;
6125
6126         init_emulate_ctxt(vcpu);
6127
6128         ctxt->op_bytes = 2;
6129         ctxt->ad_bytes = 2;
6130         ctxt->_eip = ctxt->eip + inc_eip;
6131         ret = emulate_int_real(ctxt, irq);
6132
6133         if (ret != X86EMUL_CONTINUE)
6134                 return EMULATE_FAIL;
6135
6136         ctxt->eip = ctxt->_eip;
6137         kvm_rip_write(vcpu, ctxt->eip);
6138         kvm_set_rflags(vcpu, ctxt->eflags);
6139
6140         return EMULATE_DONE;
6141 }
6142 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6143
6144 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6145 {
6146         int r = EMULATE_DONE;
6147
6148         ++vcpu->stat.insn_emulation_fail;
6149         trace_kvm_emulate_insn_failed(vcpu);
6150
6151         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
6152                 return EMULATE_FAIL;
6153
6154         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6155                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6156                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6157                 vcpu->run->internal.ndata = 0;
6158                 r = EMULATE_USER_EXIT;
6159         }
6160
6161         kvm_queue_exception(vcpu, UD_VECTOR);
6162
6163         return r;
6164 }
6165
6166 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6167                                   bool write_fault_to_shadow_pgtable,
6168                                   int emulation_type)
6169 {
6170         gpa_t gpa = cr2;
6171         kvm_pfn_t pfn;
6172
6173         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6174                 return false;
6175
6176         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6177                 return false;
6178
6179         if (!vcpu->arch.mmu->direct_map) {
6180                 /*
6181                  * Write permission should be allowed since only
6182                  * write access need to be emulated.
6183                  */
6184                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6185
6186                 /*
6187                  * If the mapping is invalid in guest, let cpu retry
6188                  * it to generate fault.
6189                  */
6190                 if (gpa == UNMAPPED_GVA)
6191                         return true;
6192         }
6193
6194         /*
6195          * Do not retry the unhandleable instruction if it faults on the
6196          * readonly host memory, otherwise it will goto a infinite loop:
6197          * retry instruction -> write #PF -> emulation fail -> retry
6198          * instruction -> ...
6199          */
6200         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6201
6202         /*
6203          * If the instruction failed on the error pfn, it can not be fixed,
6204          * report the error to userspace.
6205          */
6206         if (is_error_noslot_pfn(pfn))
6207                 return false;
6208
6209         kvm_release_pfn_clean(pfn);
6210
6211         /* The instructions are well-emulated on direct mmu. */
6212         if (vcpu->arch.mmu->direct_map) {
6213                 unsigned int indirect_shadow_pages;
6214
6215                 spin_lock(&vcpu->kvm->mmu_lock);
6216                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6217                 spin_unlock(&vcpu->kvm->mmu_lock);
6218
6219                 if (indirect_shadow_pages)
6220                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6221
6222                 return true;
6223         }
6224
6225         /*
6226          * if emulation was due to access to shadowed page table
6227          * and it failed try to unshadow page and re-enter the
6228          * guest to let CPU execute the instruction.
6229          */
6230         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6231
6232         /*
6233          * If the access faults on its page table, it can not
6234          * be fixed by unprotecting shadow page and it should
6235          * be reported to userspace.
6236          */
6237         return !write_fault_to_shadow_pgtable;
6238 }
6239
6240 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6241                               unsigned long cr2,  int emulation_type)
6242 {
6243         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6244         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6245
6246         last_retry_eip = vcpu->arch.last_retry_eip;
6247         last_retry_addr = vcpu->arch.last_retry_addr;
6248
6249         /*
6250          * If the emulation is caused by #PF and it is non-page_table
6251          * writing instruction, it means the VM-EXIT is caused by shadow
6252          * page protected, we can zap the shadow page and retry this
6253          * instruction directly.
6254          *
6255          * Note: if the guest uses a non-page-table modifying instruction
6256          * on the PDE that points to the instruction, then we will unmap
6257          * the instruction and go to an infinite loop. So, we cache the
6258          * last retried eip and the last fault address, if we meet the eip
6259          * and the address again, we can break out of the potential infinite
6260          * loop.
6261          */
6262         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6263
6264         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6265                 return false;
6266
6267         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6268                 return false;
6269
6270         if (x86_page_table_writing_insn(ctxt))
6271                 return false;
6272
6273         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6274                 return false;
6275
6276         vcpu->arch.last_retry_eip = ctxt->eip;
6277         vcpu->arch.last_retry_addr = cr2;
6278
6279         if (!vcpu->arch.mmu->direct_map)
6280                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6281
6282         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6283
6284         return true;
6285 }
6286
6287 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6288 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6289
6290 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6291 {
6292         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6293                 /* This is a good place to trace that we are exiting SMM.  */
6294                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6295
6296                 /* Process a latched INIT or SMI, if any.  */
6297                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6298         }
6299
6300         kvm_mmu_reset_context(vcpu);
6301 }
6302
6303 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6304                                 unsigned long *db)
6305 {
6306         u32 dr6 = 0;
6307         int i;
6308         u32 enable, rwlen;
6309
6310         enable = dr7;
6311         rwlen = dr7 >> 16;
6312         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6313                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6314                         dr6 |= (1 << i);
6315         return dr6;
6316 }
6317
6318 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6319 {
6320         struct kvm_run *kvm_run = vcpu->run;
6321
6322         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6323                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6324                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6325                 kvm_run->debug.arch.exception = DB_VECTOR;
6326                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6327                 *r = EMULATE_USER_EXIT;
6328         } else {
6329                 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6330         }
6331 }
6332
6333 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6334 {
6335         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6336         int r = EMULATE_DONE;
6337
6338         kvm_x86_ops->skip_emulated_instruction(vcpu);
6339
6340         /*
6341          * rflags is the old, "raw" value of the flags.  The new value has
6342          * not been saved yet.
6343          *
6344          * This is correct even for TF set by the guest, because "the
6345          * processor will not generate this exception after the instruction
6346          * that sets the TF flag".
6347          */
6348         if (unlikely(rflags & X86_EFLAGS_TF))
6349                 kvm_vcpu_do_singlestep(vcpu, &r);
6350         return r == EMULATE_DONE;
6351 }
6352 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6353
6354 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6355 {
6356         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6357             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6358                 struct kvm_run *kvm_run = vcpu->run;
6359                 unsigned long eip = kvm_get_linear_rip(vcpu);
6360                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6361                                            vcpu->arch.guest_debug_dr7,
6362                                            vcpu->arch.eff_db);
6363
6364                 if (dr6 != 0) {
6365                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6366                         kvm_run->debug.arch.pc = eip;
6367                         kvm_run->debug.arch.exception = DB_VECTOR;
6368                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6369                         *r = EMULATE_USER_EXIT;
6370                         return true;
6371                 }
6372         }
6373
6374         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6375             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6376                 unsigned long eip = kvm_get_linear_rip(vcpu);
6377                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6378                                            vcpu->arch.dr7,
6379                                            vcpu->arch.db);
6380
6381                 if (dr6 != 0) {
6382                         vcpu->arch.dr6 &= ~15;
6383                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6384                         kvm_queue_exception(vcpu, DB_VECTOR);
6385                         *r = EMULATE_DONE;
6386                         return true;
6387                 }
6388         }
6389
6390         return false;
6391 }
6392
6393 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6394 {
6395         switch (ctxt->opcode_len) {
6396         case 1:
6397                 switch (ctxt->b) {
6398                 case 0xe4:      /* IN */
6399                 case 0xe5:
6400                 case 0xec:
6401                 case 0xed:
6402                 case 0xe6:      /* OUT */
6403                 case 0xe7:
6404                 case 0xee:
6405                 case 0xef:
6406                 case 0x6c:      /* INS */
6407                 case 0x6d:
6408                 case 0x6e:      /* OUTS */
6409                 case 0x6f:
6410                         return true;
6411                 }
6412                 break;
6413         case 2:
6414                 switch (ctxt->b) {
6415                 case 0x33:      /* RDPMC */
6416                         return true;
6417                 }
6418                 break;
6419         }
6420
6421         return false;
6422 }
6423
6424 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6425                             unsigned long cr2,
6426                             int emulation_type,
6427                             void *insn,
6428                             int insn_len)
6429 {
6430         int r;
6431         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6432         bool writeback = true;
6433         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6434
6435         vcpu->arch.l1tf_flush_l1d = true;
6436
6437         /*
6438          * Clear write_fault_to_shadow_pgtable here to ensure it is
6439          * never reused.
6440          */
6441         vcpu->arch.write_fault_to_shadow_pgtable = false;
6442         kvm_clear_exception_queue(vcpu);
6443
6444         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6445                 init_emulate_ctxt(vcpu);
6446
6447                 /*
6448                  * We will reenter on the same instruction since
6449                  * we do not set complete_userspace_io.  This does not
6450                  * handle watchpoints yet, those would be handled in
6451                  * the emulate_ops.
6452                  */
6453                 if (!(emulation_type & EMULTYPE_SKIP) &&
6454                     kvm_vcpu_check_breakpoint(vcpu, &r))
6455                         return r;
6456
6457                 ctxt->interruptibility = 0;
6458                 ctxt->have_exception = false;
6459                 ctxt->exception.vector = -1;
6460                 ctxt->perm_ok = false;
6461
6462                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6463
6464                 r = x86_decode_insn(ctxt, insn, insn_len);
6465
6466                 trace_kvm_emulate_insn_start(vcpu);
6467                 ++vcpu->stat.insn_emulation;
6468                 if (r != EMULATION_OK)  {
6469                         if (emulation_type & EMULTYPE_TRAP_UD)
6470                                 return EMULATE_FAIL;
6471                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6472                                                 emulation_type))
6473                                 return EMULATE_DONE;
6474                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6475                                 return EMULATE_DONE;
6476                         if (emulation_type & EMULTYPE_SKIP)
6477                                 return EMULATE_FAIL;
6478                         return handle_emulation_failure(vcpu, emulation_type);
6479                 }
6480         }
6481
6482         if ((emulation_type & EMULTYPE_VMWARE) &&
6483             !is_vmware_backdoor_opcode(ctxt))
6484                 return EMULATE_FAIL;
6485
6486         if (emulation_type & EMULTYPE_SKIP) {
6487                 kvm_rip_write(vcpu, ctxt->_eip);
6488                 if (ctxt->eflags & X86_EFLAGS_RF)
6489                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6490                 return EMULATE_DONE;
6491         }
6492
6493         if (retry_instruction(ctxt, cr2, emulation_type))
6494                 return EMULATE_DONE;
6495
6496         /* this is needed for vmware backdoor interface to work since it
6497            changes registers values  during IO operation */
6498         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6499                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6500                 emulator_invalidate_register_cache(ctxt);
6501         }
6502
6503 restart:
6504         /* Save the faulting GPA (cr2) in the address field */
6505         ctxt->exception.address = cr2;
6506
6507         r = x86_emulate_insn(ctxt);
6508
6509         if (r == EMULATION_INTERCEPTED)
6510                 return EMULATE_DONE;
6511
6512         if (r == EMULATION_FAILED) {
6513                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6514                                         emulation_type))
6515                         return EMULATE_DONE;
6516
6517                 return handle_emulation_failure(vcpu, emulation_type);
6518         }
6519
6520         if (ctxt->have_exception) {
6521                 r = EMULATE_DONE;
6522                 if (inject_emulated_exception(vcpu))
6523                         return r;
6524         } else if (vcpu->arch.pio.count) {
6525                 if (!vcpu->arch.pio.in) {
6526                         /* FIXME: return into emulator if single-stepping.  */
6527                         vcpu->arch.pio.count = 0;
6528                 } else {
6529                         writeback = false;
6530                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6531                 }
6532                 r = EMULATE_USER_EXIT;
6533         } else if (vcpu->mmio_needed) {
6534                 if (!vcpu->mmio_is_write)
6535                         writeback = false;
6536                 r = EMULATE_USER_EXIT;
6537                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6538         } else if (r == EMULATION_RESTART)
6539                 goto restart;
6540         else
6541                 r = EMULATE_DONE;
6542
6543         if (writeback) {
6544                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6545                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6546                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6547                 kvm_rip_write(vcpu, ctxt->eip);
6548                 if (r == EMULATE_DONE && ctxt->tf)
6549                         kvm_vcpu_do_singlestep(vcpu, &r);
6550                 if (!ctxt->have_exception ||
6551                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6552                         __kvm_set_rflags(vcpu, ctxt->eflags);
6553
6554                 /*
6555                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6556                  * do nothing, and it will be requested again as soon as
6557                  * the shadow expires.  But we still need to check here,
6558                  * because POPF has no interrupt shadow.
6559                  */
6560                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6561                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6562         } else
6563                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6564
6565         return r;
6566 }
6567
6568 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6569 {
6570         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6571 }
6572 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6573
6574 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6575                                         void *insn, int insn_len)
6576 {
6577         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6578 }
6579 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6580
6581 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6582 {
6583         vcpu->arch.pio.count = 0;
6584         return 1;
6585 }
6586
6587 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6588 {
6589         vcpu->arch.pio.count = 0;
6590
6591         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6592                 return 1;
6593
6594         return kvm_skip_emulated_instruction(vcpu);
6595 }
6596
6597 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6598                             unsigned short port)
6599 {
6600         unsigned long val = kvm_rax_read(vcpu);
6601         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6602                                             size, port, &val, 1);
6603         if (ret)
6604                 return ret;
6605
6606         /*
6607          * Workaround userspace that relies on old KVM behavior of %rip being
6608          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6609          */
6610         if (port == 0x7e &&
6611             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6612                 vcpu->arch.complete_userspace_io =
6613                         complete_fast_pio_out_port_0x7e;
6614                 kvm_skip_emulated_instruction(vcpu);
6615         } else {
6616                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6617                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6618         }
6619         return 0;
6620 }
6621
6622 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6623 {
6624         unsigned long val;
6625
6626         /* We should only ever be called with arch.pio.count equal to 1 */
6627         BUG_ON(vcpu->arch.pio.count != 1);
6628
6629         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6630                 vcpu->arch.pio.count = 0;
6631                 return 1;
6632         }
6633
6634         /* For size less than 4 we merge, else we zero extend */
6635         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6636
6637         /*
6638          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6639          * the copy and tracing
6640          */
6641         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6642                                  vcpu->arch.pio.port, &val, 1);
6643         kvm_rax_write(vcpu, val);
6644
6645         return kvm_skip_emulated_instruction(vcpu);
6646 }
6647
6648 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6649                            unsigned short port)
6650 {
6651         unsigned long val;
6652         int ret;
6653
6654         /* For size less than 4 we merge, else we zero extend */
6655         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6656
6657         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6658                                        &val, 1);
6659         if (ret) {
6660                 kvm_rax_write(vcpu, val);
6661                 return ret;
6662         }
6663
6664         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6665         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6666
6667         return 0;
6668 }
6669
6670 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6671 {
6672         int ret;
6673
6674         if (in)
6675                 ret = kvm_fast_pio_in(vcpu, size, port);
6676         else
6677                 ret = kvm_fast_pio_out(vcpu, size, port);
6678         return ret && kvm_skip_emulated_instruction(vcpu);
6679 }
6680 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6681
6682 static int kvmclock_cpu_down_prep(unsigned int cpu)
6683 {
6684         __this_cpu_write(cpu_tsc_khz, 0);
6685         return 0;
6686 }
6687
6688 static void tsc_khz_changed(void *data)
6689 {
6690         struct cpufreq_freqs *freq = data;
6691         unsigned long khz = 0;
6692
6693         if (data)
6694                 khz = freq->new;
6695         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6696                 khz = cpufreq_quick_get(raw_smp_processor_id());
6697         if (!khz)
6698                 khz = tsc_khz;
6699         __this_cpu_write(cpu_tsc_khz, khz);
6700 }
6701
6702 #ifdef CONFIG_X86_64
6703 static void kvm_hyperv_tsc_notifier(void)
6704 {
6705         struct kvm *kvm;
6706         struct kvm_vcpu *vcpu;
6707         int cpu;
6708
6709         spin_lock(&kvm_lock);
6710         list_for_each_entry(kvm, &vm_list, vm_list)
6711                 kvm_make_mclock_inprogress_request(kvm);
6712
6713         hyperv_stop_tsc_emulation();
6714
6715         /* TSC frequency always matches when on Hyper-V */
6716         for_each_present_cpu(cpu)
6717                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6718         kvm_max_guest_tsc_khz = tsc_khz;
6719
6720         list_for_each_entry(kvm, &vm_list, vm_list) {
6721                 struct kvm_arch *ka = &kvm->arch;
6722
6723                 spin_lock(&ka->pvclock_gtod_sync_lock);
6724
6725                 pvclock_update_vm_gtod_copy(kvm);
6726
6727                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6728                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6729
6730                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6731                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6732
6733                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6734         }
6735         spin_unlock(&kvm_lock);
6736 }
6737 #endif
6738
6739 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6740 {
6741         struct kvm *kvm;
6742         struct kvm_vcpu *vcpu;
6743         int i, send_ipi = 0;
6744
6745         /*
6746          * We allow guests to temporarily run on slowing clocks,
6747          * provided we notify them after, or to run on accelerating
6748          * clocks, provided we notify them before.  Thus time never
6749          * goes backwards.
6750          *
6751          * However, we have a problem.  We can't atomically update
6752          * the frequency of a given CPU from this function; it is
6753          * merely a notifier, which can be called from any CPU.
6754          * Changing the TSC frequency at arbitrary points in time
6755          * requires a recomputation of local variables related to
6756          * the TSC for each VCPU.  We must flag these local variables
6757          * to be updated and be sure the update takes place with the
6758          * new frequency before any guests proceed.
6759          *
6760          * Unfortunately, the combination of hotplug CPU and frequency
6761          * change creates an intractable locking scenario; the order
6762          * of when these callouts happen is undefined with respect to
6763          * CPU hotplug, and they can race with each other.  As such,
6764          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6765          * undefined; you can actually have a CPU frequency change take
6766          * place in between the computation of X and the setting of the
6767          * variable.  To protect against this problem, all updates of
6768          * the per_cpu tsc_khz variable are done in an interrupt
6769          * protected IPI, and all callers wishing to update the value
6770          * must wait for a synchronous IPI to complete (which is trivial
6771          * if the caller is on the CPU already).  This establishes the
6772          * necessary total order on variable updates.
6773          *
6774          * Note that because a guest time update may take place
6775          * anytime after the setting of the VCPU's request bit, the
6776          * correct TSC value must be set before the request.  However,
6777          * to ensure the update actually makes it to any guest which
6778          * starts running in hardware virtualization between the set
6779          * and the acquisition of the spinlock, we must also ping the
6780          * CPU after setting the request bit.
6781          *
6782          */
6783
6784         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6785
6786         spin_lock(&kvm_lock);
6787         list_for_each_entry(kvm, &vm_list, vm_list) {
6788                 kvm_for_each_vcpu(i, vcpu, kvm) {
6789                         if (vcpu->cpu != cpu)
6790                                 continue;
6791                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6792                         if (vcpu->cpu != smp_processor_id())
6793                                 send_ipi = 1;
6794                 }
6795         }
6796         spin_unlock(&kvm_lock);
6797
6798         if (freq->old < freq->new && send_ipi) {
6799                 /*
6800                  * We upscale the frequency.  Must make the guest
6801                  * doesn't see old kvmclock values while running with
6802                  * the new frequency, otherwise we risk the guest sees
6803                  * time go backwards.
6804                  *
6805                  * In case we update the frequency for another cpu
6806                  * (which might be in guest context) send an interrupt
6807                  * to kick the cpu out of guest context.  Next time
6808                  * guest context is entered kvmclock will be updated,
6809                  * so the guest will not see stale values.
6810                  */
6811                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6812         }
6813 }
6814
6815 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6816                                      void *data)
6817 {
6818         struct cpufreq_freqs *freq = data;
6819         int cpu;
6820
6821         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6822                 return 0;
6823         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6824                 return 0;
6825
6826         for_each_cpu(cpu, freq->policy->cpus)
6827                 __kvmclock_cpufreq_notifier(freq, cpu);
6828
6829         return 0;
6830 }
6831
6832 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6833         .notifier_call  = kvmclock_cpufreq_notifier
6834 };
6835
6836 static int kvmclock_cpu_online(unsigned int cpu)
6837 {
6838         tsc_khz_changed(NULL);
6839         return 0;
6840 }
6841
6842 static void kvm_timer_init(void)
6843 {
6844         max_tsc_khz = tsc_khz;
6845
6846         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6847 #ifdef CONFIG_CPU_FREQ
6848                 struct cpufreq_policy policy;
6849                 int cpu;
6850
6851                 memset(&policy, 0, sizeof(policy));
6852                 cpu = get_cpu();
6853                 cpufreq_get_policy(&policy, cpu);
6854                 if (policy.cpuinfo.max_freq)
6855                         max_tsc_khz = policy.cpuinfo.max_freq;
6856                 put_cpu();
6857 #endif
6858                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6859                                           CPUFREQ_TRANSITION_NOTIFIER);
6860         }
6861         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6862
6863         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6864                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6865 }
6866
6867 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6868 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6869
6870 int kvm_is_in_guest(void)
6871 {
6872         return __this_cpu_read(current_vcpu) != NULL;
6873 }
6874
6875 static int kvm_is_user_mode(void)
6876 {
6877         int user_mode = 3;
6878
6879         if (__this_cpu_read(current_vcpu))
6880                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6881
6882         return user_mode != 0;
6883 }
6884
6885 static unsigned long kvm_get_guest_ip(void)
6886 {
6887         unsigned long ip = 0;
6888
6889         if (__this_cpu_read(current_vcpu))
6890                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6891
6892         return ip;
6893 }
6894
6895 static void kvm_handle_intel_pt_intr(void)
6896 {
6897         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
6898
6899         kvm_make_request(KVM_REQ_PMI, vcpu);
6900         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
6901                         (unsigned long *)&vcpu->arch.pmu.global_status);
6902 }
6903
6904 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6905         .is_in_guest            = kvm_is_in_guest,
6906         .is_user_mode           = kvm_is_user_mode,
6907         .get_guest_ip           = kvm_get_guest_ip,
6908         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
6909 };
6910
6911 static void kvm_set_mmio_spte_mask(void)
6912 {
6913         u64 mask;
6914         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6915
6916         /*
6917          * Set the reserved bits and the present bit of an paging-structure
6918          * entry to generate page fault with PFER.RSV = 1.
6919          */
6920
6921         /*
6922          * Mask the uppermost physical address bit, which would be reserved as
6923          * long as the supported physical address width is less than 52.
6924          */
6925         mask = 1ull << 51;
6926
6927         /* Set the present bit. */
6928         mask |= 1ull;
6929
6930         /*
6931          * If reserved bit is not supported, clear the present bit to disable
6932          * mmio page fault.
6933          */
6934         if (IS_ENABLED(CONFIG_X86_64) && maxphyaddr == 52)
6935                 mask &= ~1ull;
6936
6937         kvm_mmu_set_mmio_spte_mask(mask, mask);
6938 }
6939
6940 #ifdef CONFIG_X86_64
6941 static void pvclock_gtod_update_fn(struct work_struct *work)
6942 {
6943         struct kvm *kvm;
6944
6945         struct kvm_vcpu *vcpu;
6946         int i;
6947
6948         spin_lock(&kvm_lock);
6949         list_for_each_entry(kvm, &vm_list, vm_list)
6950                 kvm_for_each_vcpu(i, vcpu, kvm)
6951                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6952         atomic_set(&kvm_guest_has_master_clock, 0);
6953         spin_unlock(&kvm_lock);
6954 }
6955
6956 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6957
6958 /*
6959  * Notification about pvclock gtod data update.
6960  */
6961 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6962                                void *priv)
6963 {
6964         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6965         struct timekeeper *tk = priv;
6966
6967         update_pvclock_gtod(tk);
6968
6969         /* disable master clock if host does not trust, or does not
6970          * use, TSC based clocksource.
6971          */
6972         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6973             atomic_read(&kvm_guest_has_master_clock) != 0)
6974                 queue_work(system_long_wq, &pvclock_gtod_work);
6975
6976         return 0;
6977 }
6978
6979 static struct notifier_block pvclock_gtod_notifier = {
6980         .notifier_call = pvclock_gtod_notify,
6981 };
6982 #endif
6983
6984 int kvm_arch_init(void *opaque)
6985 {
6986         int r;
6987         struct kvm_x86_ops *ops = opaque;
6988
6989         if (kvm_x86_ops) {
6990                 printk(KERN_ERR "kvm: already loaded the other module\n");
6991                 r = -EEXIST;
6992                 goto out;
6993         }
6994
6995         if (!ops->cpu_has_kvm_support()) {
6996                 printk(KERN_ERR "kvm: no hardware support\n");
6997                 r = -EOPNOTSUPP;
6998                 goto out;
6999         }
7000         if (ops->disabled_by_bios()) {
7001                 printk(KERN_ERR "kvm: disabled by bios\n");
7002                 r = -EOPNOTSUPP;
7003                 goto out;
7004         }
7005
7006         /*
7007          * KVM explicitly assumes that the guest has an FPU and
7008          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7009          * vCPU's FPU state as a fxregs_state struct.
7010          */
7011         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7012                 printk(KERN_ERR "kvm: inadequate fpu\n");
7013                 r = -EOPNOTSUPP;
7014                 goto out;
7015         }
7016
7017         r = -ENOMEM;
7018         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7019                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7020                                           NULL);
7021         if (!x86_fpu_cache) {
7022                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7023                 goto out;
7024         }
7025
7026         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7027         if (!shared_msrs) {
7028                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7029                 goto out_free_x86_fpu_cache;
7030         }
7031
7032         r = kvm_mmu_module_init();
7033         if (r)
7034                 goto out_free_percpu;
7035
7036         kvm_set_mmio_spte_mask();
7037
7038         kvm_x86_ops = ops;
7039
7040         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7041                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7042                         PT_PRESENT_MASK, 0, sme_me_mask);
7043         kvm_timer_init();
7044
7045         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7046
7047         if (boot_cpu_has(X86_FEATURE_XSAVE))
7048                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7049
7050         kvm_lapic_init();
7051 #ifdef CONFIG_X86_64
7052         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7053
7054         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7055                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7056 #endif
7057
7058         return 0;
7059
7060 out_free_percpu:
7061         free_percpu(shared_msrs);
7062 out_free_x86_fpu_cache:
7063         kmem_cache_destroy(x86_fpu_cache);
7064 out:
7065         return r;
7066 }
7067
7068 void kvm_arch_exit(void)
7069 {
7070 #ifdef CONFIG_X86_64
7071         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7072                 clear_hv_tscchange_cb();
7073 #endif
7074         kvm_lapic_exit();
7075         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7076
7077         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7078                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7079                                             CPUFREQ_TRANSITION_NOTIFIER);
7080         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7081 #ifdef CONFIG_X86_64
7082         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7083 #endif
7084         kvm_x86_ops = NULL;
7085         kvm_mmu_module_exit();
7086         free_percpu(shared_msrs);
7087         kmem_cache_destroy(x86_fpu_cache);
7088 }
7089
7090 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7091 {
7092         ++vcpu->stat.halt_exits;
7093         if (lapic_in_kernel(vcpu)) {
7094                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7095                 return 1;
7096         } else {
7097                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7098                 return 0;
7099         }
7100 }
7101 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7102
7103 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7104 {
7105         int ret = kvm_skip_emulated_instruction(vcpu);
7106         /*
7107          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7108          * KVM_EXIT_DEBUG here.
7109          */
7110         return kvm_vcpu_halt(vcpu) && ret;
7111 }
7112 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7113
7114 #ifdef CONFIG_X86_64
7115 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7116                                 unsigned long clock_type)
7117 {
7118         struct kvm_clock_pairing clock_pairing;
7119         struct timespec64 ts;
7120         u64 cycle;
7121         int ret;
7122
7123         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7124                 return -KVM_EOPNOTSUPP;
7125
7126         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7127                 return -KVM_EOPNOTSUPP;
7128
7129         clock_pairing.sec = ts.tv_sec;
7130         clock_pairing.nsec = ts.tv_nsec;
7131         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7132         clock_pairing.flags = 0;
7133         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7134
7135         ret = 0;
7136         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7137                             sizeof(struct kvm_clock_pairing)))
7138                 ret = -KVM_EFAULT;
7139
7140         return ret;
7141 }
7142 #endif
7143
7144 /*
7145  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7146  *
7147  * @apicid - apicid of vcpu to be kicked.
7148  */
7149 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7150 {
7151         struct kvm_lapic_irq lapic_irq;
7152
7153         lapic_irq.shorthand = 0;
7154         lapic_irq.dest_mode = 0;
7155         lapic_irq.level = 0;
7156         lapic_irq.dest_id = apicid;
7157         lapic_irq.msi_redir_hint = false;
7158
7159         lapic_irq.delivery_mode = APIC_DM_REMRD;
7160         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7161 }
7162
7163 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7164 {
7165         if (!lapic_in_kernel(vcpu)) {
7166                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7167                 return;
7168         }
7169         if (!vcpu->arch.apicv_active)
7170                 return;
7171
7172         vcpu->arch.apicv_active = false;
7173         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7174 }
7175
7176 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7177 {
7178         unsigned long nr, a0, a1, a2, a3, ret;
7179         int op_64_bit;
7180
7181         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7182                 return kvm_hv_hypercall(vcpu);
7183
7184         nr = kvm_rax_read(vcpu);
7185         a0 = kvm_rbx_read(vcpu);
7186         a1 = kvm_rcx_read(vcpu);
7187         a2 = kvm_rdx_read(vcpu);
7188         a3 = kvm_rsi_read(vcpu);
7189
7190         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7191
7192         op_64_bit = is_64_bit_mode(vcpu);
7193         if (!op_64_bit) {
7194                 nr &= 0xFFFFFFFF;
7195                 a0 &= 0xFFFFFFFF;
7196                 a1 &= 0xFFFFFFFF;
7197                 a2 &= 0xFFFFFFFF;
7198                 a3 &= 0xFFFFFFFF;
7199         }
7200
7201         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7202                 ret = -KVM_EPERM;
7203                 goto out;
7204         }
7205
7206         switch (nr) {
7207         case KVM_HC_VAPIC_POLL_IRQ:
7208                 ret = 0;
7209                 break;
7210         case KVM_HC_KICK_CPU:
7211                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7212                 ret = 0;
7213                 break;
7214 #ifdef CONFIG_X86_64
7215         case KVM_HC_CLOCK_PAIRING:
7216                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7217                 break;
7218 #endif
7219         case KVM_HC_SEND_IPI:
7220                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7221                 break;
7222         default:
7223                 ret = -KVM_ENOSYS;
7224                 break;
7225         }
7226 out:
7227         if (!op_64_bit)
7228                 ret = (u32)ret;
7229         kvm_rax_write(vcpu, ret);
7230
7231         ++vcpu->stat.hypercalls;
7232         return kvm_skip_emulated_instruction(vcpu);
7233 }
7234 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7235
7236 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7237 {
7238         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7239         char instruction[3];
7240         unsigned long rip = kvm_rip_read(vcpu);
7241
7242         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7243
7244         return emulator_write_emulated(ctxt, rip, instruction, 3,
7245                 &ctxt->exception);
7246 }
7247
7248 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7249 {
7250         return vcpu->run->request_interrupt_window &&
7251                 likely(!pic_in_kernel(vcpu->kvm));
7252 }
7253
7254 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7255 {
7256         struct kvm_run *kvm_run = vcpu->run;
7257
7258         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7259         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7260         kvm_run->cr8 = kvm_get_cr8(vcpu);
7261         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7262         kvm_run->ready_for_interrupt_injection =
7263                 pic_in_kernel(vcpu->kvm) ||
7264                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7265 }
7266
7267 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7268 {
7269         int max_irr, tpr;
7270
7271         if (!kvm_x86_ops->update_cr8_intercept)
7272                 return;
7273
7274         if (!lapic_in_kernel(vcpu))
7275                 return;
7276
7277         if (vcpu->arch.apicv_active)
7278                 return;
7279
7280         if (!vcpu->arch.apic->vapic_addr)
7281                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7282         else
7283                 max_irr = -1;
7284
7285         if (max_irr != -1)
7286                 max_irr >>= 4;
7287
7288         tpr = kvm_lapic_get_cr8(vcpu);
7289
7290         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7291 }
7292
7293 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7294 {
7295         int r;
7296
7297         /* try to reinject previous events if any */
7298
7299         if (vcpu->arch.exception.injected)
7300                 kvm_x86_ops->queue_exception(vcpu);
7301         /*
7302          * Do not inject an NMI or interrupt if there is a pending
7303          * exception.  Exceptions and interrupts are recognized at
7304          * instruction boundaries, i.e. the start of an instruction.
7305          * Trap-like exceptions, e.g. #DB, have higher priority than
7306          * NMIs and interrupts, i.e. traps are recognized before an
7307          * NMI/interrupt that's pending on the same instruction.
7308          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7309          * priority, but are only generated (pended) during instruction
7310          * execution, i.e. a pending fault-like exception means the
7311          * fault occurred on the *previous* instruction and must be
7312          * serviced prior to recognizing any new events in order to
7313          * fully complete the previous instruction.
7314          */
7315         else if (!vcpu->arch.exception.pending) {
7316                 if (vcpu->arch.nmi_injected)
7317                         kvm_x86_ops->set_nmi(vcpu);
7318                 else if (vcpu->arch.interrupt.injected)
7319                         kvm_x86_ops->set_irq(vcpu);
7320         }
7321
7322         /*
7323          * Call check_nested_events() even if we reinjected a previous event
7324          * in order for caller to determine if it should require immediate-exit
7325          * from L2 to L1 due to pending L1 events which require exit
7326          * from L2 to L1.
7327          */
7328         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7329                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7330                 if (r != 0)
7331                         return r;
7332         }
7333
7334         /* try to inject new event if pending */
7335         if (vcpu->arch.exception.pending) {
7336                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7337                                         vcpu->arch.exception.has_error_code,
7338                                         vcpu->arch.exception.error_code);
7339
7340                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7341                 vcpu->arch.exception.pending = false;
7342                 vcpu->arch.exception.injected = true;
7343
7344                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7345                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7346                                              X86_EFLAGS_RF);
7347
7348                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7349                         /*
7350                          * This code assumes that nSVM doesn't use
7351                          * check_nested_events(). If it does, the
7352                          * DR6/DR7 changes should happen before L1
7353                          * gets a #VMEXIT for an intercepted #DB in
7354                          * L2.  (Under VMX, on the other hand, the
7355                          * DR6/DR7 changes should not happen in the
7356                          * event of a VM-exit to L1 for an intercepted
7357                          * #DB in L2.)
7358                          */
7359                         kvm_deliver_exception_payload(vcpu);
7360                         if (vcpu->arch.dr7 & DR7_GD) {
7361                                 vcpu->arch.dr7 &= ~DR7_GD;
7362                                 kvm_update_dr7(vcpu);
7363                         }
7364                 }
7365
7366                 kvm_x86_ops->queue_exception(vcpu);
7367         }
7368
7369         /* Don't consider new event if we re-injected an event */
7370         if (kvm_event_needs_reinjection(vcpu))
7371                 return 0;
7372
7373         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7374             kvm_x86_ops->smi_allowed(vcpu)) {
7375                 vcpu->arch.smi_pending = false;
7376                 ++vcpu->arch.smi_count;
7377                 enter_smm(vcpu);
7378         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7379                 --vcpu->arch.nmi_pending;
7380                 vcpu->arch.nmi_injected = true;
7381                 kvm_x86_ops->set_nmi(vcpu);
7382         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7383                 /*
7384                  * Because interrupts can be injected asynchronously, we are
7385                  * calling check_nested_events again here to avoid a race condition.
7386                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7387                  * proposal and current concerns.  Perhaps we should be setting
7388                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7389                  */
7390                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7391                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7392                         if (r != 0)
7393                                 return r;
7394                 }
7395                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7396                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7397                                             false);
7398                         kvm_x86_ops->set_irq(vcpu);
7399                 }
7400         }
7401
7402         return 0;
7403 }
7404
7405 static void process_nmi(struct kvm_vcpu *vcpu)
7406 {
7407         unsigned limit = 2;
7408
7409         /*
7410          * x86 is limited to one NMI running, and one NMI pending after it.
7411          * If an NMI is already in progress, limit further NMIs to just one.
7412          * Otherwise, allow two (and we'll inject the first one immediately).
7413          */
7414         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7415                 limit = 1;
7416
7417         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7418         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7419         kvm_make_request(KVM_REQ_EVENT, vcpu);
7420 }
7421
7422 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7423 {
7424         u32 flags = 0;
7425         flags |= seg->g       << 23;
7426         flags |= seg->db      << 22;
7427         flags |= seg->l       << 21;
7428         flags |= seg->avl     << 20;
7429         flags |= seg->present << 15;
7430         flags |= seg->dpl     << 13;
7431         flags |= seg->s       << 12;
7432         flags |= seg->type    << 8;
7433         return flags;
7434 }
7435
7436 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7437 {
7438         struct kvm_segment seg;
7439         int offset;
7440
7441         kvm_get_segment(vcpu, &seg, n);
7442         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7443
7444         if (n < 3)
7445                 offset = 0x7f84 + n * 12;
7446         else
7447                 offset = 0x7f2c + (n - 3) * 12;
7448
7449         put_smstate(u32, buf, offset + 8, seg.base);
7450         put_smstate(u32, buf, offset + 4, seg.limit);
7451         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7452 }
7453
7454 #ifdef CONFIG_X86_64
7455 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7456 {
7457         struct kvm_segment seg;
7458         int offset;
7459         u16 flags;
7460
7461         kvm_get_segment(vcpu, &seg, n);
7462         offset = 0x7e00 + n * 16;
7463
7464         flags = enter_smm_get_segment_flags(&seg) >> 8;
7465         put_smstate(u16, buf, offset, seg.selector);
7466         put_smstate(u16, buf, offset + 2, flags);
7467         put_smstate(u32, buf, offset + 4, seg.limit);
7468         put_smstate(u64, buf, offset + 8, seg.base);
7469 }
7470 #endif
7471
7472 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7473 {
7474         struct desc_ptr dt;
7475         struct kvm_segment seg;
7476         unsigned long val;
7477         int i;
7478
7479         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7480         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7481         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7482         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7483
7484         for (i = 0; i < 8; i++)
7485                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7486
7487         kvm_get_dr(vcpu, 6, &val);
7488         put_smstate(u32, buf, 0x7fcc, (u32)val);
7489         kvm_get_dr(vcpu, 7, &val);
7490         put_smstate(u32, buf, 0x7fc8, (u32)val);
7491
7492         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7493         put_smstate(u32, buf, 0x7fc4, seg.selector);
7494         put_smstate(u32, buf, 0x7f64, seg.base);
7495         put_smstate(u32, buf, 0x7f60, seg.limit);
7496         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7497
7498         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7499         put_smstate(u32, buf, 0x7fc0, seg.selector);
7500         put_smstate(u32, buf, 0x7f80, seg.base);
7501         put_smstate(u32, buf, 0x7f7c, seg.limit);
7502         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7503
7504         kvm_x86_ops->get_gdt(vcpu, &dt);
7505         put_smstate(u32, buf, 0x7f74, dt.address);
7506         put_smstate(u32, buf, 0x7f70, dt.size);
7507
7508         kvm_x86_ops->get_idt(vcpu, &dt);
7509         put_smstate(u32, buf, 0x7f58, dt.address);
7510         put_smstate(u32, buf, 0x7f54, dt.size);
7511
7512         for (i = 0; i < 6; i++)
7513                 enter_smm_save_seg_32(vcpu, buf, i);
7514
7515         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7516
7517         /* revision id */
7518         put_smstate(u32, buf, 0x7efc, 0x00020000);
7519         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7520 }
7521
7522 #ifdef CONFIG_X86_64
7523 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7524 {
7525         struct desc_ptr dt;
7526         struct kvm_segment seg;
7527         unsigned long val;
7528         int i;
7529
7530         for (i = 0; i < 16; i++)
7531                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7532
7533         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7534         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7535
7536         kvm_get_dr(vcpu, 6, &val);
7537         put_smstate(u64, buf, 0x7f68, val);
7538         kvm_get_dr(vcpu, 7, &val);
7539         put_smstate(u64, buf, 0x7f60, val);
7540
7541         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7542         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7543         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7544
7545         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7546
7547         /* revision id */
7548         put_smstate(u32, buf, 0x7efc, 0x00020064);
7549
7550         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7551
7552         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7553         put_smstate(u16, buf, 0x7e90, seg.selector);
7554         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7555         put_smstate(u32, buf, 0x7e94, seg.limit);
7556         put_smstate(u64, buf, 0x7e98, seg.base);
7557
7558         kvm_x86_ops->get_idt(vcpu, &dt);
7559         put_smstate(u32, buf, 0x7e84, dt.size);
7560         put_smstate(u64, buf, 0x7e88, dt.address);
7561
7562         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7563         put_smstate(u16, buf, 0x7e70, seg.selector);
7564         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7565         put_smstate(u32, buf, 0x7e74, seg.limit);
7566         put_smstate(u64, buf, 0x7e78, seg.base);
7567
7568         kvm_x86_ops->get_gdt(vcpu, &dt);
7569         put_smstate(u32, buf, 0x7e64, dt.size);
7570         put_smstate(u64, buf, 0x7e68, dt.address);
7571
7572         for (i = 0; i < 6; i++)
7573                 enter_smm_save_seg_64(vcpu, buf, i);
7574 }
7575 #endif
7576
7577 static void enter_smm(struct kvm_vcpu *vcpu)
7578 {
7579         struct kvm_segment cs, ds;
7580         struct desc_ptr dt;
7581         char buf[512];
7582         u32 cr0;
7583
7584         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7585         memset(buf, 0, 512);
7586 #ifdef CONFIG_X86_64
7587         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7588                 enter_smm_save_state_64(vcpu, buf);
7589         else
7590 #endif
7591                 enter_smm_save_state_32(vcpu, buf);
7592
7593         /*
7594          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7595          * vCPU state (e.g. leave guest mode) after we've saved the state into
7596          * the SMM state-save area.
7597          */
7598         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7599
7600         vcpu->arch.hflags |= HF_SMM_MASK;
7601         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7602
7603         if (kvm_x86_ops->get_nmi_mask(vcpu))
7604                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7605         else
7606                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7607
7608         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7609         kvm_rip_write(vcpu, 0x8000);
7610
7611         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7612         kvm_x86_ops->set_cr0(vcpu, cr0);
7613         vcpu->arch.cr0 = cr0;
7614
7615         kvm_x86_ops->set_cr4(vcpu, 0);
7616
7617         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7618         dt.address = dt.size = 0;
7619         kvm_x86_ops->set_idt(vcpu, &dt);
7620
7621         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7622
7623         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7624         cs.base = vcpu->arch.smbase;
7625
7626         ds.selector = 0;
7627         ds.base = 0;
7628
7629         cs.limit    = ds.limit = 0xffffffff;
7630         cs.type     = ds.type = 0x3;
7631         cs.dpl      = ds.dpl = 0;
7632         cs.db       = ds.db = 0;
7633         cs.s        = ds.s = 1;
7634         cs.l        = ds.l = 0;
7635         cs.g        = ds.g = 1;
7636         cs.avl      = ds.avl = 0;
7637         cs.present  = ds.present = 1;
7638         cs.unusable = ds.unusable = 0;
7639         cs.padding  = ds.padding = 0;
7640
7641         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7642         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7643         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7644         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7645         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7646         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7647
7648 #ifdef CONFIG_X86_64
7649         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7650                 kvm_x86_ops->set_efer(vcpu, 0);
7651 #endif
7652
7653         kvm_update_cpuid(vcpu);
7654         kvm_mmu_reset_context(vcpu);
7655 }
7656
7657 static void process_smi(struct kvm_vcpu *vcpu)
7658 {
7659         vcpu->arch.smi_pending = true;
7660         kvm_make_request(KVM_REQ_EVENT, vcpu);
7661 }
7662
7663 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7664 {
7665         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7666 }
7667
7668 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7669 {
7670         if (!kvm_apic_present(vcpu))
7671                 return;
7672
7673         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7674
7675         if (irqchip_split(vcpu->kvm))
7676                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7677         else {
7678                 if (vcpu->arch.apicv_active)
7679                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7680                 if (ioapic_in_kernel(vcpu->kvm))
7681                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7682         }
7683
7684         if (is_guest_mode(vcpu))
7685                 vcpu->arch.load_eoi_exitmap_pending = true;
7686         else
7687                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7688 }
7689
7690 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7691 {
7692         u64 eoi_exit_bitmap[4];
7693
7694         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7695                 return;
7696
7697         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7698                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7699         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7700 }
7701
7702 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7703                 unsigned long start, unsigned long end,
7704                 bool blockable)
7705 {
7706         unsigned long apic_address;
7707
7708         /*
7709          * The physical address of apic access page is stored in the VMCS.
7710          * Update it when it becomes invalid.
7711          */
7712         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7713         if (start <= apic_address && apic_address < end)
7714                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7715
7716         return 0;
7717 }
7718
7719 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7720 {
7721         struct page *page = NULL;
7722
7723         if (!lapic_in_kernel(vcpu))
7724                 return;
7725
7726         if (!kvm_x86_ops->set_apic_access_page_addr)
7727                 return;
7728
7729         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7730         if (is_error_page(page))
7731                 return;
7732         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7733
7734         /*
7735          * Do not pin apic access page in memory, the MMU notifier
7736          * will call us again if it is migrated or swapped out.
7737          */
7738         put_page(page);
7739 }
7740 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7741
7742 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7743 {
7744         smp_send_reschedule(vcpu->cpu);
7745 }
7746 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7747
7748 /*
7749  * Returns 1 to let vcpu_run() continue the guest execution loop without
7750  * exiting to the userspace.  Otherwise, the value will be returned to the
7751  * userspace.
7752  */
7753 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7754 {
7755         int r;
7756         bool req_int_win =
7757                 dm_request_for_irq_injection(vcpu) &&
7758                 kvm_cpu_accept_dm_intr(vcpu);
7759
7760         bool req_immediate_exit = false;
7761
7762         if (kvm_request_pending(vcpu)) {
7763                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7764                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7765                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7766                         kvm_mmu_unload(vcpu);
7767                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7768                         __kvm_migrate_timers(vcpu);
7769                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7770                         kvm_gen_update_masterclock(vcpu->kvm);
7771                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7772                         kvm_gen_kvmclock_update(vcpu);
7773                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7774                         r = kvm_guest_time_update(vcpu);
7775                         if (unlikely(r))
7776                                 goto out;
7777                 }
7778                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7779                         kvm_mmu_sync_roots(vcpu);
7780                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7781                         kvm_mmu_load_cr3(vcpu);
7782                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7783                         kvm_vcpu_flush_tlb(vcpu, true);
7784                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7785                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7786                         r = 0;
7787                         goto out;
7788                 }
7789                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7790                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7791                         vcpu->mmio_needed = 0;
7792                         r = 0;
7793                         goto out;
7794                 }
7795                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7796                         /* Page is swapped out. Do synthetic halt */
7797                         vcpu->arch.apf.halted = true;
7798                         r = 1;
7799                         goto out;
7800                 }
7801                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7802                         record_steal_time(vcpu);
7803                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7804                         process_smi(vcpu);
7805                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7806                         process_nmi(vcpu);
7807                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7808                         kvm_pmu_handle_event(vcpu);
7809                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7810                         kvm_pmu_deliver_pmi(vcpu);
7811                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7812                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7813                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7814                                      vcpu->arch.ioapic_handled_vectors)) {
7815                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7816                                 vcpu->run->eoi.vector =
7817                                                 vcpu->arch.pending_ioapic_eoi;
7818                                 r = 0;
7819                                 goto out;
7820                         }
7821                 }
7822                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7823                         vcpu_scan_ioapic(vcpu);
7824                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7825                         vcpu_load_eoi_exitmap(vcpu);
7826                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7827                         kvm_vcpu_reload_apic_access_page(vcpu);
7828                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7829                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7830                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7831                         r = 0;
7832                         goto out;
7833                 }
7834                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7835                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7836                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7837                         r = 0;
7838                         goto out;
7839                 }
7840                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7841                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7842                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7843                         r = 0;
7844                         goto out;
7845                 }
7846
7847                 /*
7848                  * KVM_REQ_HV_STIMER has to be processed after
7849                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7850                  * depend on the guest clock being up-to-date
7851                  */
7852                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7853                         kvm_hv_process_stimers(vcpu);
7854         }
7855
7856         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7857                 ++vcpu->stat.req_event;
7858                 kvm_apic_accept_events(vcpu);
7859                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7860                         r = 1;
7861                         goto out;
7862                 }
7863
7864                 if (inject_pending_event(vcpu, req_int_win) != 0)
7865                         req_immediate_exit = true;
7866                 else {
7867                         /* Enable SMI/NMI/IRQ window open exits if needed.
7868                          *
7869                          * SMIs have three cases:
7870                          * 1) They can be nested, and then there is nothing to
7871                          *    do here because RSM will cause a vmexit anyway.
7872                          * 2) There is an ISA-specific reason why SMI cannot be
7873                          *    injected, and the moment when this changes can be
7874                          *    intercepted.
7875                          * 3) Or the SMI can be pending because
7876                          *    inject_pending_event has completed the injection
7877                          *    of an IRQ or NMI from the previous vmexit, and
7878                          *    then we request an immediate exit to inject the
7879                          *    SMI.
7880                          */
7881                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7882                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7883                                         req_immediate_exit = true;
7884                         if (vcpu->arch.nmi_pending)
7885                                 kvm_x86_ops->enable_nmi_window(vcpu);
7886                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7887                                 kvm_x86_ops->enable_irq_window(vcpu);
7888                         WARN_ON(vcpu->arch.exception.pending);
7889                 }
7890
7891                 if (kvm_lapic_enabled(vcpu)) {
7892                         update_cr8_intercept(vcpu);
7893                         kvm_lapic_sync_to_vapic(vcpu);
7894                 }
7895         }
7896
7897         r = kvm_mmu_reload(vcpu);
7898         if (unlikely(r)) {
7899                 goto cancel_injection;
7900         }
7901
7902         preempt_disable();
7903
7904         kvm_x86_ops->prepare_guest_switch(vcpu);
7905
7906         /*
7907          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7908          * IPI are then delayed after guest entry, which ensures that they
7909          * result in virtual interrupt delivery.
7910          */
7911         local_irq_disable();
7912         vcpu->mode = IN_GUEST_MODE;
7913
7914         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7915
7916         /*
7917          * 1) We should set ->mode before checking ->requests.  Please see
7918          * the comment in kvm_vcpu_exiting_guest_mode().
7919          *
7920          * 2) For APICv, we should set ->mode before checking PID.ON. This
7921          * pairs with the memory barrier implicit in pi_test_and_set_on
7922          * (see vmx_deliver_posted_interrupt).
7923          *
7924          * 3) This also orders the write to mode from any reads to the page
7925          * tables done while the VCPU is running.  Please see the comment
7926          * in kvm_flush_remote_tlbs.
7927          */
7928         smp_mb__after_srcu_read_unlock();
7929
7930         /*
7931          * This handles the case where a posted interrupt was
7932          * notified with kvm_vcpu_kick.
7933          */
7934         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7935                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7936
7937         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7938             || need_resched() || signal_pending(current)) {
7939                 vcpu->mode = OUTSIDE_GUEST_MODE;
7940                 smp_wmb();
7941                 local_irq_enable();
7942                 preempt_enable();
7943                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7944                 r = 1;
7945                 goto cancel_injection;
7946         }
7947
7948         if (req_immediate_exit) {
7949                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7950                 kvm_x86_ops->request_immediate_exit(vcpu);
7951         }
7952
7953         trace_kvm_entry(vcpu->vcpu_id);
7954         if (lapic_in_kernel(vcpu) &&
7955             vcpu->arch.apic->lapic_timer.timer_advance_ns)
7956                 wait_lapic_expire(vcpu);
7957         guest_enter_irqoff();
7958
7959         fpregs_assert_state_consistent();
7960         if (test_thread_flag(TIF_NEED_FPU_LOAD))
7961                 switch_fpu_return();
7962
7963         if (unlikely(vcpu->arch.switch_db_regs)) {
7964                 set_debugreg(0, 7);
7965                 set_debugreg(vcpu->arch.eff_db[0], 0);
7966                 set_debugreg(vcpu->arch.eff_db[1], 1);
7967                 set_debugreg(vcpu->arch.eff_db[2], 2);
7968                 set_debugreg(vcpu->arch.eff_db[3], 3);
7969                 set_debugreg(vcpu->arch.dr6, 6);
7970                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7971         }
7972
7973         kvm_x86_ops->run(vcpu);
7974
7975         /*
7976          * Do this here before restoring debug registers on the host.  And
7977          * since we do this before handling the vmexit, a DR access vmexit
7978          * can (a) read the correct value of the debug registers, (b) set
7979          * KVM_DEBUGREG_WONT_EXIT again.
7980          */
7981         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7982                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7983                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7984                 kvm_update_dr0123(vcpu);
7985                 kvm_update_dr6(vcpu);
7986                 kvm_update_dr7(vcpu);
7987                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7988         }
7989
7990         /*
7991          * If the guest has used debug registers, at least dr7
7992          * will be disabled while returning to the host.
7993          * If we don't have active breakpoints in the host, we don't
7994          * care about the messed up debug address registers. But if
7995          * we have some of them active, restore the old state.
7996          */
7997         if (hw_breakpoint_active())
7998                 hw_breakpoint_restore();
7999
8000         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8001
8002         vcpu->mode = OUTSIDE_GUEST_MODE;
8003         smp_wmb();
8004
8005         kvm_before_interrupt(vcpu);
8006         kvm_x86_ops->handle_external_intr(vcpu);
8007         kvm_after_interrupt(vcpu);
8008
8009         ++vcpu->stat.exits;
8010
8011         guest_exit_irqoff();
8012
8013         local_irq_enable();
8014         preempt_enable();
8015
8016         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8017
8018         /*
8019          * Profile KVM exit RIPs:
8020          */
8021         if (unlikely(prof_on == KVM_PROFILING)) {
8022                 unsigned long rip = kvm_rip_read(vcpu);
8023                 profile_hit(KVM_PROFILING, (void *)rip);
8024         }
8025
8026         if (unlikely(vcpu->arch.tsc_always_catchup))
8027                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8028
8029         if (vcpu->arch.apic_attention)
8030                 kvm_lapic_sync_from_vapic(vcpu);
8031
8032         vcpu->arch.gpa_available = false;
8033         r = kvm_x86_ops->handle_exit(vcpu);
8034         return r;
8035
8036 cancel_injection:
8037         kvm_x86_ops->cancel_injection(vcpu);
8038         if (unlikely(vcpu->arch.apic_attention))
8039                 kvm_lapic_sync_from_vapic(vcpu);
8040 out:
8041         return r;
8042 }
8043
8044 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8045 {
8046         if (!kvm_arch_vcpu_runnable(vcpu) &&
8047             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8048                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8049                 kvm_vcpu_block(vcpu);
8050                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8051
8052                 if (kvm_x86_ops->post_block)
8053                         kvm_x86_ops->post_block(vcpu);
8054
8055                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8056                         return 1;
8057         }
8058
8059         kvm_apic_accept_events(vcpu);
8060         switch(vcpu->arch.mp_state) {
8061         case KVM_MP_STATE_HALTED:
8062                 vcpu->arch.pv.pv_unhalted = false;
8063                 vcpu->arch.mp_state =
8064                         KVM_MP_STATE_RUNNABLE;
8065                 /* fall through */
8066         case KVM_MP_STATE_RUNNABLE:
8067                 vcpu->arch.apf.halted = false;
8068                 break;
8069         case KVM_MP_STATE_INIT_RECEIVED:
8070                 break;
8071         default:
8072                 return -EINTR;
8073                 break;
8074         }
8075         return 1;
8076 }
8077
8078 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8079 {
8080         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8081                 kvm_x86_ops->check_nested_events(vcpu, false);
8082
8083         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8084                 !vcpu->arch.apf.halted);
8085 }
8086
8087 static int vcpu_run(struct kvm_vcpu *vcpu)
8088 {
8089         int r;
8090         struct kvm *kvm = vcpu->kvm;
8091
8092         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8093         vcpu->arch.l1tf_flush_l1d = true;
8094
8095         for (;;) {
8096                 if (kvm_vcpu_running(vcpu)) {
8097                         r = vcpu_enter_guest(vcpu);
8098                 } else {
8099                         r = vcpu_block(kvm, vcpu);
8100                 }
8101
8102                 if (r <= 0)
8103                         break;
8104
8105                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8106                 if (kvm_cpu_has_pending_timer(vcpu))
8107                         kvm_inject_pending_timer_irqs(vcpu);
8108
8109                 if (dm_request_for_irq_injection(vcpu) &&
8110                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8111                         r = 0;
8112                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8113                         ++vcpu->stat.request_irq_exits;
8114                         break;
8115                 }
8116
8117                 kvm_check_async_pf_completion(vcpu);
8118
8119                 if (signal_pending(current)) {
8120                         r = -EINTR;
8121                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8122                         ++vcpu->stat.signal_exits;
8123                         break;
8124                 }
8125                 if (need_resched()) {
8126                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8127                         cond_resched();
8128                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8129                 }
8130         }
8131
8132         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8133
8134         return r;
8135 }
8136
8137 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8138 {
8139         int r;
8140         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8141         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8142         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8143         if (r != EMULATE_DONE)
8144                 return 0;
8145         return 1;
8146 }
8147
8148 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8149 {
8150         BUG_ON(!vcpu->arch.pio.count);
8151
8152         return complete_emulated_io(vcpu);
8153 }
8154
8155 /*
8156  * Implements the following, as a state machine:
8157  *
8158  * read:
8159  *   for each fragment
8160  *     for each mmio piece in the fragment
8161  *       write gpa, len
8162  *       exit
8163  *       copy data
8164  *   execute insn
8165  *
8166  * write:
8167  *   for each fragment
8168  *     for each mmio piece in the fragment
8169  *       write gpa, len
8170  *       copy data
8171  *       exit
8172  */
8173 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8174 {
8175         struct kvm_run *run = vcpu->run;
8176         struct kvm_mmio_fragment *frag;
8177         unsigned len;
8178
8179         BUG_ON(!vcpu->mmio_needed);
8180
8181         /* Complete previous fragment */
8182         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8183         len = min(8u, frag->len);
8184         if (!vcpu->mmio_is_write)
8185                 memcpy(frag->data, run->mmio.data, len);
8186
8187         if (frag->len <= 8) {
8188                 /* Switch to the next fragment. */
8189                 frag++;
8190                 vcpu->mmio_cur_fragment++;
8191         } else {
8192                 /* Go forward to the next mmio piece. */
8193                 frag->data += len;
8194                 frag->gpa += len;
8195                 frag->len -= len;
8196         }
8197
8198         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8199                 vcpu->mmio_needed = 0;
8200
8201                 /* FIXME: return into emulator if single-stepping.  */
8202                 if (vcpu->mmio_is_write)
8203                         return 1;
8204                 vcpu->mmio_read_completed = 1;
8205                 return complete_emulated_io(vcpu);
8206         }
8207
8208         run->exit_reason = KVM_EXIT_MMIO;
8209         run->mmio.phys_addr = frag->gpa;
8210         if (vcpu->mmio_is_write)
8211                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8212         run->mmio.len = min(8u, frag->len);
8213         run->mmio.is_write = vcpu->mmio_is_write;
8214         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8215         return 0;
8216 }
8217
8218 /* Swap (qemu) user FPU context for the guest FPU context. */
8219 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8220 {
8221         fpregs_lock();
8222
8223         copy_fpregs_to_fpstate(&current->thread.fpu);
8224         /* PKRU is separately restored in kvm_x86_ops->run.  */
8225         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8226                                 ~XFEATURE_MASK_PKRU);
8227
8228         fpregs_mark_activate();
8229         fpregs_unlock();
8230
8231         trace_kvm_fpu(1);
8232 }
8233
8234 /* When vcpu_run ends, restore user space FPU context. */
8235 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8236 {
8237         fpregs_lock();
8238
8239         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8240         copy_kernel_to_fpregs(&current->thread.fpu.state);
8241
8242         fpregs_mark_activate();
8243         fpregs_unlock();
8244
8245         ++vcpu->stat.fpu_reload;
8246         trace_kvm_fpu(0);
8247 }
8248
8249 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8250 {
8251         int r;
8252
8253         vcpu_load(vcpu);
8254         kvm_sigset_activate(vcpu);
8255         kvm_load_guest_fpu(vcpu);
8256
8257         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8258                 if (kvm_run->immediate_exit) {
8259                         r = -EINTR;
8260                         goto out;
8261                 }
8262                 kvm_vcpu_block(vcpu);
8263                 kvm_apic_accept_events(vcpu);
8264                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8265                 r = -EAGAIN;
8266                 if (signal_pending(current)) {
8267                         r = -EINTR;
8268                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8269                         ++vcpu->stat.signal_exits;
8270                 }
8271                 goto out;
8272         }
8273
8274         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8275                 r = -EINVAL;
8276                 goto out;
8277         }
8278
8279         if (vcpu->run->kvm_dirty_regs) {
8280                 r = sync_regs(vcpu);
8281                 if (r != 0)
8282                         goto out;
8283         }
8284
8285         /* re-sync apic's tpr */
8286         if (!lapic_in_kernel(vcpu)) {
8287                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8288                         r = -EINVAL;
8289                         goto out;
8290                 }
8291         }
8292
8293         if (unlikely(vcpu->arch.complete_userspace_io)) {
8294                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8295                 vcpu->arch.complete_userspace_io = NULL;
8296                 r = cui(vcpu);
8297                 if (r <= 0)
8298                         goto out;
8299         } else
8300                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8301
8302         if (kvm_run->immediate_exit)
8303                 r = -EINTR;
8304         else
8305                 r = vcpu_run(vcpu);
8306
8307 out:
8308         kvm_put_guest_fpu(vcpu);
8309         if (vcpu->run->kvm_valid_regs)
8310                 store_regs(vcpu);
8311         post_kvm_run_save(vcpu);
8312         kvm_sigset_deactivate(vcpu);
8313
8314         vcpu_put(vcpu);
8315         return r;
8316 }
8317
8318 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8319 {
8320         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8321                 /*
8322                  * We are here if userspace calls get_regs() in the middle of
8323                  * instruction emulation. Registers state needs to be copied
8324                  * back from emulation context to vcpu. Userspace shouldn't do
8325                  * that usually, but some bad designed PV devices (vmware
8326                  * backdoor interface) need this to work
8327                  */
8328                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8329                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8330         }
8331         regs->rax = kvm_rax_read(vcpu);
8332         regs->rbx = kvm_rbx_read(vcpu);
8333         regs->rcx = kvm_rcx_read(vcpu);
8334         regs->rdx = kvm_rdx_read(vcpu);
8335         regs->rsi = kvm_rsi_read(vcpu);
8336         regs->rdi = kvm_rdi_read(vcpu);
8337         regs->rsp = kvm_rsp_read(vcpu);
8338         regs->rbp = kvm_rbp_read(vcpu);
8339 #ifdef CONFIG_X86_64
8340         regs->r8 = kvm_r8_read(vcpu);
8341         regs->r9 = kvm_r9_read(vcpu);
8342         regs->r10 = kvm_r10_read(vcpu);
8343         regs->r11 = kvm_r11_read(vcpu);
8344         regs->r12 = kvm_r12_read(vcpu);
8345         regs->r13 = kvm_r13_read(vcpu);
8346         regs->r14 = kvm_r14_read(vcpu);
8347         regs->r15 = kvm_r15_read(vcpu);
8348 #endif
8349
8350         regs->rip = kvm_rip_read(vcpu);
8351         regs->rflags = kvm_get_rflags(vcpu);
8352 }
8353
8354 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8355 {
8356         vcpu_load(vcpu);
8357         __get_regs(vcpu, regs);
8358         vcpu_put(vcpu);
8359         return 0;
8360 }
8361
8362 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8363 {
8364         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8365         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8366
8367         kvm_rax_write(vcpu, regs->rax);
8368         kvm_rbx_write(vcpu, regs->rbx);
8369         kvm_rcx_write(vcpu, regs->rcx);
8370         kvm_rdx_write(vcpu, regs->rdx);
8371         kvm_rsi_write(vcpu, regs->rsi);
8372         kvm_rdi_write(vcpu, regs->rdi);
8373         kvm_rsp_write(vcpu, regs->rsp);
8374         kvm_rbp_write(vcpu, regs->rbp);
8375 #ifdef CONFIG_X86_64
8376         kvm_r8_write(vcpu, regs->r8);
8377         kvm_r9_write(vcpu, regs->r9);
8378         kvm_r10_write(vcpu, regs->r10);
8379         kvm_r11_write(vcpu, regs->r11);
8380         kvm_r12_write(vcpu, regs->r12);
8381         kvm_r13_write(vcpu, regs->r13);
8382         kvm_r14_write(vcpu, regs->r14);
8383         kvm_r15_write(vcpu, regs->r15);
8384 #endif
8385
8386         kvm_rip_write(vcpu, regs->rip);
8387         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8388
8389         vcpu->arch.exception.pending = false;
8390
8391         kvm_make_request(KVM_REQ_EVENT, vcpu);
8392 }
8393
8394 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8395 {
8396         vcpu_load(vcpu);
8397         __set_regs(vcpu, regs);
8398         vcpu_put(vcpu);
8399         return 0;
8400 }
8401
8402 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8403 {
8404         struct kvm_segment cs;
8405
8406         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8407         *db = cs.db;
8408         *l = cs.l;
8409 }
8410 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8411
8412 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8413 {
8414         struct desc_ptr dt;
8415
8416         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8417         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8418         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8419         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8420         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8421         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8422
8423         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8424         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8425
8426         kvm_x86_ops->get_idt(vcpu, &dt);
8427         sregs->idt.limit = dt.size;
8428         sregs->idt.base = dt.address;
8429         kvm_x86_ops->get_gdt(vcpu, &dt);
8430         sregs->gdt.limit = dt.size;
8431         sregs->gdt.base = dt.address;
8432
8433         sregs->cr0 = kvm_read_cr0(vcpu);
8434         sregs->cr2 = vcpu->arch.cr2;
8435         sregs->cr3 = kvm_read_cr3(vcpu);
8436         sregs->cr4 = kvm_read_cr4(vcpu);
8437         sregs->cr8 = kvm_get_cr8(vcpu);
8438         sregs->efer = vcpu->arch.efer;
8439         sregs->apic_base = kvm_get_apic_base(vcpu);
8440
8441         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8442
8443         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8444                 set_bit(vcpu->arch.interrupt.nr,
8445                         (unsigned long *)sregs->interrupt_bitmap);
8446 }
8447
8448 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8449                                   struct kvm_sregs *sregs)
8450 {
8451         vcpu_load(vcpu);
8452         __get_sregs(vcpu, sregs);
8453         vcpu_put(vcpu);
8454         return 0;
8455 }
8456
8457 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8458                                     struct kvm_mp_state *mp_state)
8459 {
8460         vcpu_load(vcpu);
8461
8462         kvm_apic_accept_events(vcpu);
8463         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8464                                         vcpu->arch.pv.pv_unhalted)
8465                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8466         else
8467                 mp_state->mp_state = vcpu->arch.mp_state;
8468
8469         vcpu_put(vcpu);
8470         return 0;
8471 }
8472
8473 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8474                                     struct kvm_mp_state *mp_state)
8475 {
8476         int ret = -EINVAL;
8477
8478         vcpu_load(vcpu);
8479
8480         if (!lapic_in_kernel(vcpu) &&
8481             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8482                 goto out;
8483
8484         /* INITs are latched while in SMM */
8485         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8486             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8487              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8488                 goto out;
8489
8490         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8491                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8492                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8493         } else
8494                 vcpu->arch.mp_state = mp_state->mp_state;
8495         kvm_make_request(KVM_REQ_EVENT, vcpu);
8496
8497         ret = 0;
8498 out:
8499         vcpu_put(vcpu);
8500         return ret;
8501 }
8502
8503 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8504                     int reason, bool has_error_code, u32 error_code)
8505 {
8506         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8507         int ret;
8508
8509         init_emulate_ctxt(vcpu);
8510
8511         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8512                                    has_error_code, error_code);
8513
8514         if (ret)
8515                 return EMULATE_FAIL;
8516
8517         kvm_rip_write(vcpu, ctxt->eip);
8518         kvm_set_rflags(vcpu, ctxt->eflags);
8519         kvm_make_request(KVM_REQ_EVENT, vcpu);
8520         return EMULATE_DONE;
8521 }
8522 EXPORT_SYMBOL_GPL(kvm_task_switch);
8523
8524 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8525 {
8526         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8527                         (sregs->cr4 & X86_CR4_OSXSAVE))
8528                 return  -EINVAL;
8529
8530         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8531                 /*
8532                  * When EFER.LME and CR0.PG are set, the processor is in
8533                  * 64-bit mode (though maybe in a 32-bit code segment).
8534                  * CR4.PAE and EFER.LMA must be set.
8535                  */
8536                 if (!(sregs->cr4 & X86_CR4_PAE)
8537                     || !(sregs->efer & EFER_LMA))
8538                         return -EINVAL;
8539         } else {
8540                 /*
8541                  * Not in 64-bit mode: EFER.LMA is clear and the code
8542                  * segment cannot be 64-bit.
8543                  */
8544                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8545                         return -EINVAL;
8546         }
8547
8548         return 0;
8549 }
8550
8551 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8552 {
8553         struct msr_data apic_base_msr;
8554         int mmu_reset_needed = 0;
8555         int cpuid_update_needed = 0;
8556         int pending_vec, max_bits, idx;
8557         struct desc_ptr dt;
8558         int ret = -EINVAL;
8559
8560         if (kvm_valid_sregs(vcpu, sregs))
8561                 goto out;
8562
8563         apic_base_msr.data = sregs->apic_base;
8564         apic_base_msr.host_initiated = true;
8565         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8566                 goto out;
8567
8568         dt.size = sregs->idt.limit;
8569         dt.address = sregs->idt.base;
8570         kvm_x86_ops->set_idt(vcpu, &dt);
8571         dt.size = sregs->gdt.limit;
8572         dt.address = sregs->gdt.base;
8573         kvm_x86_ops->set_gdt(vcpu, &dt);
8574
8575         vcpu->arch.cr2 = sregs->cr2;
8576         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8577         vcpu->arch.cr3 = sregs->cr3;
8578         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8579
8580         kvm_set_cr8(vcpu, sregs->cr8);
8581
8582         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8583         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8584
8585         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8586         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8587         vcpu->arch.cr0 = sregs->cr0;
8588
8589         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8590         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8591                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8592         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8593         if (cpuid_update_needed)
8594                 kvm_update_cpuid(vcpu);
8595
8596         idx = srcu_read_lock(&vcpu->kvm->srcu);
8597         if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu)) {
8598                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8599                 mmu_reset_needed = 1;
8600         }
8601         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8602
8603         if (mmu_reset_needed)
8604                 kvm_mmu_reset_context(vcpu);
8605
8606         max_bits = KVM_NR_INTERRUPTS;
8607         pending_vec = find_first_bit(
8608                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8609         if (pending_vec < max_bits) {
8610                 kvm_queue_interrupt(vcpu, pending_vec, false);
8611                 pr_debug("Set back pending irq %d\n", pending_vec);
8612         }
8613
8614         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8615         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8616         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8617         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8618         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8619         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8620
8621         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8622         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8623
8624         update_cr8_intercept(vcpu);
8625
8626         /* Older userspace won't unhalt the vcpu on reset. */
8627         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8628             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8629             !is_protmode(vcpu))
8630                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8631
8632         kvm_make_request(KVM_REQ_EVENT, vcpu);
8633
8634         ret = 0;
8635 out:
8636         return ret;
8637 }
8638
8639 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8640                                   struct kvm_sregs *sregs)
8641 {
8642         int ret;
8643
8644         vcpu_load(vcpu);
8645         ret = __set_sregs(vcpu, sregs);
8646         vcpu_put(vcpu);
8647         return ret;
8648 }
8649
8650 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8651                                         struct kvm_guest_debug *dbg)
8652 {
8653         unsigned long rflags;
8654         int i, r;
8655
8656         vcpu_load(vcpu);
8657
8658         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8659                 r = -EBUSY;
8660                 if (vcpu->arch.exception.pending)
8661                         goto out;
8662                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8663                         kvm_queue_exception(vcpu, DB_VECTOR);
8664                 else
8665                         kvm_queue_exception(vcpu, BP_VECTOR);
8666         }
8667
8668         /*
8669          * Read rflags as long as potentially injected trace flags are still
8670          * filtered out.
8671          */
8672         rflags = kvm_get_rflags(vcpu);
8673
8674         vcpu->guest_debug = dbg->control;
8675         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8676                 vcpu->guest_debug = 0;
8677
8678         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8679                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8680                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8681                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8682         } else {
8683                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8684                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8685         }
8686         kvm_update_dr7(vcpu);
8687
8688         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8689                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8690                         get_segment_base(vcpu, VCPU_SREG_CS);
8691
8692         /*
8693          * Trigger an rflags update that will inject or remove the trace
8694          * flags.
8695          */
8696         kvm_set_rflags(vcpu, rflags);
8697
8698         kvm_x86_ops->update_bp_intercept(vcpu);
8699
8700         r = 0;
8701
8702 out:
8703         vcpu_put(vcpu);
8704         return r;
8705 }
8706
8707 /*
8708  * Translate a guest virtual address to a guest physical address.
8709  */
8710 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8711                                     struct kvm_translation *tr)
8712 {
8713         unsigned long vaddr = tr->linear_address;
8714         gpa_t gpa;
8715         int idx;
8716
8717         vcpu_load(vcpu);
8718
8719         idx = srcu_read_lock(&vcpu->kvm->srcu);
8720         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8721         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8722         tr->physical_address = gpa;
8723         tr->valid = gpa != UNMAPPED_GVA;
8724         tr->writeable = 1;
8725         tr->usermode = 0;
8726
8727         vcpu_put(vcpu);
8728         return 0;
8729 }
8730
8731 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8732 {
8733         struct fxregs_state *fxsave;
8734
8735         vcpu_load(vcpu);
8736
8737         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8738         memcpy(fpu->fpr, fxsave->st_space, 128);
8739         fpu->fcw = fxsave->cwd;
8740         fpu->fsw = fxsave->swd;
8741         fpu->ftwx = fxsave->twd;
8742         fpu->last_opcode = fxsave->fop;
8743         fpu->last_ip = fxsave->rip;
8744         fpu->last_dp = fxsave->rdp;
8745         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8746
8747         vcpu_put(vcpu);
8748         return 0;
8749 }
8750
8751 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8752 {
8753         struct fxregs_state *fxsave;
8754
8755         vcpu_load(vcpu);
8756
8757         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8758
8759         memcpy(fxsave->st_space, fpu->fpr, 128);
8760         fxsave->cwd = fpu->fcw;
8761         fxsave->swd = fpu->fsw;
8762         fxsave->twd = fpu->ftwx;
8763         fxsave->fop = fpu->last_opcode;
8764         fxsave->rip = fpu->last_ip;
8765         fxsave->rdp = fpu->last_dp;
8766         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8767
8768         vcpu_put(vcpu);
8769         return 0;
8770 }
8771
8772 static void store_regs(struct kvm_vcpu *vcpu)
8773 {
8774         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8775
8776         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8777                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8778
8779         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8780                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8781
8782         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8783                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8784                                 vcpu, &vcpu->run->s.regs.events);
8785 }
8786
8787 static int sync_regs(struct kvm_vcpu *vcpu)
8788 {
8789         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8790                 return -EINVAL;
8791
8792         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8793                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8794                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8795         }
8796         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8797                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8798                         return -EINVAL;
8799                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8800         }
8801         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8802                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8803                                 vcpu, &vcpu->run->s.regs.events))
8804                         return -EINVAL;
8805                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8806         }
8807
8808         return 0;
8809 }
8810
8811 static void fx_init(struct kvm_vcpu *vcpu)
8812 {
8813         fpstate_init(&vcpu->arch.guest_fpu->state);
8814         if (boot_cpu_has(X86_FEATURE_XSAVES))
8815                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
8816                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8817
8818         /*
8819          * Ensure guest xcr0 is valid for loading
8820          */
8821         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8822
8823         vcpu->arch.cr0 |= X86_CR0_ET;
8824 }
8825
8826 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8827 {
8828         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8829
8830         kvmclock_reset(vcpu);
8831
8832         kvm_x86_ops->vcpu_free(vcpu);
8833         free_cpumask_var(wbinvd_dirty_mask);
8834 }
8835
8836 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8837                                                 unsigned int id)
8838 {
8839         struct kvm_vcpu *vcpu;
8840
8841         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8842                 printk_once(KERN_WARNING
8843                 "kvm: SMP vm created on host with unstable TSC; "
8844                 "guest TSC will not be reliable\n");
8845
8846         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8847
8848         return vcpu;
8849 }
8850
8851 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8852 {
8853         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
8854         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8855         kvm_vcpu_mtrr_init(vcpu);
8856         vcpu_load(vcpu);
8857         kvm_vcpu_reset(vcpu, false);
8858         kvm_init_mmu(vcpu, false);
8859         vcpu_put(vcpu);
8860         return 0;
8861 }
8862
8863 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8864 {
8865         struct msr_data msr;
8866         struct kvm *kvm = vcpu->kvm;
8867
8868         kvm_hv_vcpu_postcreate(vcpu);
8869
8870         if (mutex_lock_killable(&vcpu->mutex))
8871                 return;
8872         vcpu_load(vcpu);
8873         msr.data = 0x0;
8874         msr.index = MSR_IA32_TSC;
8875         msr.host_initiated = true;
8876         kvm_write_tsc(vcpu, &msr);
8877         vcpu_put(vcpu);
8878         mutex_unlock(&vcpu->mutex);
8879
8880         if (!kvmclock_periodic_sync)
8881                 return;
8882
8883         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8884                                         KVMCLOCK_SYNC_PERIOD);
8885 }
8886
8887 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8888 {
8889         vcpu->arch.apf.msr_val = 0;
8890
8891         vcpu_load(vcpu);
8892         kvm_mmu_unload(vcpu);
8893         vcpu_put(vcpu);
8894
8895         kvm_x86_ops->vcpu_free(vcpu);
8896 }
8897
8898 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8899 {
8900         kvm_lapic_reset(vcpu, init_event);
8901
8902         vcpu->arch.hflags = 0;
8903
8904         vcpu->arch.smi_pending = 0;
8905         vcpu->arch.smi_count = 0;
8906         atomic_set(&vcpu->arch.nmi_queued, 0);
8907         vcpu->arch.nmi_pending = 0;
8908         vcpu->arch.nmi_injected = false;
8909         kvm_clear_interrupt_queue(vcpu);
8910         kvm_clear_exception_queue(vcpu);
8911         vcpu->arch.exception.pending = false;
8912
8913         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8914         kvm_update_dr0123(vcpu);
8915         vcpu->arch.dr6 = DR6_INIT;
8916         kvm_update_dr6(vcpu);
8917         vcpu->arch.dr7 = DR7_FIXED_1;
8918         kvm_update_dr7(vcpu);
8919
8920         vcpu->arch.cr2 = 0;
8921
8922         kvm_make_request(KVM_REQ_EVENT, vcpu);
8923         vcpu->arch.apf.msr_val = 0;
8924         vcpu->arch.st.msr_val = 0;
8925
8926         kvmclock_reset(vcpu);
8927
8928         kvm_clear_async_pf_completion_queue(vcpu);
8929         kvm_async_pf_hash_reset(vcpu);
8930         vcpu->arch.apf.halted = false;
8931
8932         if (kvm_mpx_supported()) {
8933                 void *mpx_state_buffer;
8934
8935                 /*
8936                  * To avoid have the INIT path from kvm_apic_has_events() that be
8937                  * called with loaded FPU and does not let userspace fix the state.
8938                  */
8939                 if (init_event)
8940                         kvm_put_guest_fpu(vcpu);
8941                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
8942                                         XFEATURE_BNDREGS);
8943                 if (mpx_state_buffer)
8944                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8945                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
8946                                         XFEATURE_BNDCSR);
8947                 if (mpx_state_buffer)
8948                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8949                 if (init_event)
8950                         kvm_load_guest_fpu(vcpu);
8951         }
8952
8953         if (!init_event) {
8954                 kvm_pmu_reset(vcpu);
8955                 vcpu->arch.smbase = 0x30000;
8956
8957                 vcpu->arch.msr_misc_features_enables = 0;
8958
8959                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8960         }
8961
8962         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8963         vcpu->arch.regs_avail = ~0;
8964         vcpu->arch.regs_dirty = ~0;
8965
8966         vcpu->arch.ia32_xss = 0;
8967
8968         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8969 }
8970
8971 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8972 {
8973         struct kvm_segment cs;
8974
8975         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8976         cs.selector = vector << 8;
8977         cs.base = vector << 12;
8978         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8979         kvm_rip_write(vcpu, 0);
8980 }
8981
8982 int kvm_arch_hardware_enable(void)
8983 {
8984         struct kvm *kvm;
8985         struct kvm_vcpu *vcpu;
8986         int i;
8987         int ret;
8988         u64 local_tsc;
8989         u64 max_tsc = 0;
8990         bool stable, backwards_tsc = false;
8991
8992         kvm_shared_msr_cpu_online();
8993         ret = kvm_x86_ops->hardware_enable();
8994         if (ret != 0)
8995                 return ret;
8996
8997         local_tsc = rdtsc();
8998         stable = !kvm_check_tsc_unstable();
8999         list_for_each_entry(kvm, &vm_list, vm_list) {
9000                 kvm_for_each_vcpu(i, vcpu, kvm) {
9001                         if (!stable && vcpu->cpu == smp_processor_id())
9002                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9003                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9004                                 backwards_tsc = true;
9005                                 if (vcpu->arch.last_host_tsc > max_tsc)
9006                                         max_tsc = vcpu->arch.last_host_tsc;
9007                         }
9008                 }
9009         }
9010
9011         /*
9012          * Sometimes, even reliable TSCs go backwards.  This happens on
9013          * platforms that reset TSC during suspend or hibernate actions, but
9014          * maintain synchronization.  We must compensate.  Fortunately, we can
9015          * detect that condition here, which happens early in CPU bringup,
9016          * before any KVM threads can be running.  Unfortunately, we can't
9017          * bring the TSCs fully up to date with real time, as we aren't yet far
9018          * enough into CPU bringup that we know how much real time has actually
9019          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9020          * variables that haven't been updated yet.
9021          *
9022          * So we simply find the maximum observed TSC above, then record the
9023          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9024          * the adjustment will be applied.  Note that we accumulate
9025          * adjustments, in case multiple suspend cycles happen before some VCPU
9026          * gets a chance to run again.  In the event that no KVM threads get a
9027          * chance to run, we will miss the entire elapsed period, as we'll have
9028          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9029          * loose cycle time.  This isn't too big a deal, since the loss will be
9030          * uniform across all VCPUs (not to mention the scenario is extremely
9031          * unlikely). It is possible that a second hibernate recovery happens
9032          * much faster than a first, causing the observed TSC here to be
9033          * smaller; this would require additional padding adjustment, which is
9034          * why we set last_host_tsc to the local tsc observed here.
9035          *
9036          * N.B. - this code below runs only on platforms with reliable TSC,
9037          * as that is the only way backwards_tsc is set above.  Also note
9038          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9039          * have the same delta_cyc adjustment applied if backwards_tsc
9040          * is detected.  Note further, this adjustment is only done once,
9041          * as we reset last_host_tsc on all VCPUs to stop this from being
9042          * called multiple times (one for each physical CPU bringup).
9043          *
9044          * Platforms with unreliable TSCs don't have to deal with this, they
9045          * will be compensated by the logic in vcpu_load, which sets the TSC to
9046          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9047          * guarantee that they stay in perfect synchronization.
9048          */
9049         if (backwards_tsc) {
9050                 u64 delta_cyc = max_tsc - local_tsc;
9051                 list_for_each_entry(kvm, &vm_list, vm_list) {
9052                         kvm->arch.backwards_tsc_observed = true;
9053                         kvm_for_each_vcpu(i, vcpu, kvm) {
9054                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9055                                 vcpu->arch.last_host_tsc = local_tsc;
9056                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9057                         }
9058
9059                         /*
9060                          * We have to disable TSC offset matching.. if you were
9061                          * booting a VM while issuing an S4 host suspend....
9062                          * you may have some problem.  Solving this issue is
9063                          * left as an exercise to the reader.
9064                          */
9065                         kvm->arch.last_tsc_nsec = 0;
9066                         kvm->arch.last_tsc_write = 0;
9067                 }
9068
9069         }
9070         return 0;
9071 }
9072
9073 void kvm_arch_hardware_disable(void)
9074 {
9075         kvm_x86_ops->hardware_disable();
9076         drop_user_return_notifiers();
9077 }
9078
9079 int kvm_arch_hardware_setup(void)
9080 {
9081         int r;
9082
9083         r = kvm_x86_ops->hardware_setup();
9084         if (r != 0)
9085                 return r;
9086
9087         if (kvm_has_tsc_control) {
9088                 /*
9089                  * Make sure the user can only configure tsc_khz values that
9090                  * fit into a signed integer.
9091                  * A min value is not calculated because it will always
9092                  * be 1 on all machines.
9093                  */
9094                 u64 max = min(0x7fffffffULL,
9095                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9096                 kvm_max_guest_tsc_khz = max;
9097
9098                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9099         }
9100
9101         kvm_init_msr_list();
9102         return 0;
9103 }
9104
9105 void kvm_arch_hardware_unsetup(void)
9106 {
9107         kvm_x86_ops->hardware_unsetup();
9108 }
9109
9110 void kvm_arch_check_processor_compat(void *rtn)
9111 {
9112         kvm_x86_ops->check_processor_compatibility(rtn);
9113 }
9114
9115 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9116 {
9117         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9118 }
9119 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9120
9121 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9122 {
9123         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9124 }
9125
9126 struct static_key kvm_no_apic_vcpu __read_mostly;
9127 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9128
9129 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9130 {
9131         struct page *page;
9132         int r;
9133
9134         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9135         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9136                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9137         else
9138                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9139
9140         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9141         if (!page) {
9142                 r = -ENOMEM;
9143                 goto fail;
9144         }
9145         vcpu->arch.pio_data = page_address(page);
9146
9147         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9148
9149         r = kvm_mmu_create(vcpu);
9150         if (r < 0)
9151                 goto fail_free_pio_data;
9152
9153         if (irqchip_in_kernel(vcpu->kvm)) {
9154                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9155                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9156                 if (r < 0)
9157                         goto fail_mmu_destroy;
9158         } else
9159                 static_key_slow_inc(&kvm_no_apic_vcpu);
9160
9161         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9162                                        GFP_KERNEL_ACCOUNT);
9163         if (!vcpu->arch.mce_banks) {
9164                 r = -ENOMEM;
9165                 goto fail_free_lapic;
9166         }
9167         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9168
9169         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9170                                 GFP_KERNEL_ACCOUNT)) {
9171                 r = -ENOMEM;
9172                 goto fail_free_mce_banks;
9173         }
9174
9175         fx_init(vcpu);
9176
9177         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9178
9179         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9180
9181         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9182
9183         kvm_async_pf_hash_reset(vcpu);
9184         kvm_pmu_init(vcpu);
9185
9186         vcpu->arch.pending_external_vector = -1;
9187         vcpu->arch.preempted_in_kernel = false;
9188
9189         kvm_hv_vcpu_init(vcpu);
9190
9191         return 0;
9192
9193 fail_free_mce_banks:
9194         kfree(vcpu->arch.mce_banks);
9195 fail_free_lapic:
9196         kvm_free_lapic(vcpu);
9197 fail_mmu_destroy:
9198         kvm_mmu_destroy(vcpu);
9199 fail_free_pio_data:
9200         free_page((unsigned long)vcpu->arch.pio_data);
9201 fail:
9202         return r;
9203 }
9204
9205 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9206 {
9207         int idx;
9208
9209         kvm_hv_vcpu_uninit(vcpu);
9210         kvm_pmu_destroy(vcpu);
9211         kfree(vcpu->arch.mce_banks);
9212         kvm_free_lapic(vcpu);
9213         idx = srcu_read_lock(&vcpu->kvm->srcu);
9214         kvm_mmu_destroy(vcpu);
9215         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9216         free_page((unsigned long)vcpu->arch.pio_data);
9217         if (!lapic_in_kernel(vcpu))
9218                 static_key_slow_dec(&kvm_no_apic_vcpu);
9219 }
9220
9221 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9222 {
9223         vcpu->arch.l1tf_flush_l1d = true;
9224         kvm_x86_ops->sched_in(vcpu, cpu);
9225 }
9226
9227 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9228 {
9229         if (type)
9230                 return -EINVAL;
9231
9232         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9233         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9234         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9235         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9236
9237         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9238         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9239         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9240         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9241                 &kvm->arch.irq_sources_bitmap);
9242
9243         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9244         mutex_init(&kvm->arch.apic_map_lock);
9245         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9246
9247         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9248         pvclock_update_vm_gtod_copy(kvm);
9249
9250         kvm->arch.guest_can_read_msr_platform_info = true;
9251
9252         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9253         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9254
9255         kvm_hv_init_vm(kvm);
9256         kvm_page_track_init(kvm);
9257         kvm_mmu_init_vm(kvm);
9258
9259         if (kvm_x86_ops->vm_init)
9260                 return kvm_x86_ops->vm_init(kvm);
9261
9262         return 0;
9263 }
9264
9265 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9266 {
9267         vcpu_load(vcpu);
9268         kvm_mmu_unload(vcpu);
9269         vcpu_put(vcpu);
9270 }
9271
9272 static void kvm_free_vcpus(struct kvm *kvm)
9273 {
9274         unsigned int i;
9275         struct kvm_vcpu *vcpu;
9276
9277         /*
9278          * Unpin any mmu pages first.
9279          */
9280         kvm_for_each_vcpu(i, vcpu, kvm) {
9281                 kvm_clear_async_pf_completion_queue(vcpu);
9282                 kvm_unload_vcpu_mmu(vcpu);
9283         }
9284         kvm_for_each_vcpu(i, vcpu, kvm)
9285                 kvm_arch_vcpu_free(vcpu);
9286
9287         mutex_lock(&kvm->lock);
9288         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9289                 kvm->vcpus[i] = NULL;
9290
9291         atomic_set(&kvm->online_vcpus, 0);
9292         mutex_unlock(&kvm->lock);
9293 }
9294
9295 void kvm_arch_sync_events(struct kvm *kvm)
9296 {
9297         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9298         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9299         kvm_free_pit(kvm);
9300 }
9301
9302 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9303 {
9304         int i, r;
9305         unsigned long hva;
9306         struct kvm_memslots *slots = kvm_memslots(kvm);
9307         struct kvm_memory_slot *slot, old;
9308
9309         /* Called with kvm->slots_lock held.  */
9310         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9311                 return -EINVAL;
9312
9313         slot = id_to_memslot(slots, id);
9314         if (size) {
9315                 if (slot->npages)
9316                         return -EEXIST;
9317
9318                 /*
9319                  * MAP_SHARED to prevent internal slot pages from being moved
9320                  * by fork()/COW.
9321                  */
9322                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9323                               MAP_SHARED | MAP_ANONYMOUS, 0);
9324                 if (IS_ERR((void *)hva))
9325                         return PTR_ERR((void *)hva);
9326         } else {
9327                 if (!slot->npages)
9328                         return 0;
9329
9330                 hva = 0;
9331         }
9332
9333         old = *slot;
9334         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9335                 struct kvm_userspace_memory_region m;
9336
9337                 m.slot = id | (i << 16);
9338                 m.flags = 0;
9339                 m.guest_phys_addr = gpa;
9340                 m.userspace_addr = hva;
9341                 m.memory_size = size;
9342                 r = __kvm_set_memory_region(kvm, &m);
9343                 if (r < 0)
9344                         return r;
9345         }
9346
9347         if (!size)
9348                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9349
9350         return 0;
9351 }
9352 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9353
9354 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9355 {
9356         int r;
9357
9358         mutex_lock(&kvm->slots_lock);
9359         r = __x86_set_memory_region(kvm, id, gpa, size);
9360         mutex_unlock(&kvm->slots_lock);
9361
9362         return r;
9363 }
9364 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9365
9366 void kvm_arch_destroy_vm(struct kvm *kvm)
9367 {
9368         if (current->mm == kvm->mm) {
9369                 /*
9370                  * Free memory regions allocated on behalf of userspace,
9371                  * unless the the memory map has changed due to process exit
9372                  * or fd copying.
9373                  */
9374                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9375                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9376                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9377         }
9378         if (kvm_x86_ops->vm_destroy)
9379                 kvm_x86_ops->vm_destroy(kvm);
9380         kvm_pic_destroy(kvm);
9381         kvm_ioapic_destroy(kvm);
9382         kvm_free_vcpus(kvm);
9383         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9384         kvm_mmu_uninit_vm(kvm);
9385         kvm_page_track_cleanup(kvm);
9386         kvm_hv_destroy_vm(kvm);
9387 }
9388
9389 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9390                            struct kvm_memory_slot *dont)
9391 {
9392         int i;
9393
9394         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9395                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9396                         kvfree(free->arch.rmap[i]);
9397                         free->arch.rmap[i] = NULL;
9398                 }
9399                 if (i == 0)
9400                         continue;
9401
9402                 if (!dont || free->arch.lpage_info[i - 1] !=
9403                              dont->arch.lpage_info[i - 1]) {
9404                         kvfree(free->arch.lpage_info[i - 1]);
9405                         free->arch.lpage_info[i - 1] = NULL;
9406                 }
9407         }
9408
9409         kvm_page_track_free_memslot(free, dont);
9410 }
9411
9412 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9413                             unsigned long npages)
9414 {
9415         int i;
9416
9417         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9418                 struct kvm_lpage_info *linfo;
9419                 unsigned long ugfn;
9420                 int lpages;
9421                 int level = i + 1;
9422
9423                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9424                                       slot->base_gfn, level) + 1;
9425
9426                 slot->arch.rmap[i] =
9427                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9428                                  GFP_KERNEL_ACCOUNT);
9429                 if (!slot->arch.rmap[i])
9430                         goto out_free;
9431                 if (i == 0)
9432                         continue;
9433
9434                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9435                 if (!linfo)
9436                         goto out_free;
9437
9438                 slot->arch.lpage_info[i - 1] = linfo;
9439
9440                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9441                         linfo[0].disallow_lpage = 1;
9442                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9443                         linfo[lpages - 1].disallow_lpage = 1;
9444                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9445                 /*
9446                  * If the gfn and userspace address are not aligned wrt each
9447                  * other, or if explicitly asked to, disable large page
9448                  * support for this slot
9449                  */
9450                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9451                     !kvm_largepages_enabled()) {
9452                         unsigned long j;
9453
9454                         for (j = 0; j < lpages; ++j)
9455                                 linfo[j].disallow_lpage = 1;
9456                 }
9457         }
9458
9459         if (kvm_page_track_create_memslot(slot, npages))
9460                 goto out_free;
9461
9462         return 0;
9463
9464 out_free:
9465         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9466                 kvfree(slot->arch.rmap[i]);
9467                 slot->arch.rmap[i] = NULL;
9468                 if (i == 0)
9469                         continue;
9470
9471                 kvfree(slot->arch.lpage_info[i - 1]);
9472                 slot->arch.lpage_info[i - 1] = NULL;
9473         }
9474         return -ENOMEM;
9475 }
9476
9477 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9478 {
9479         /*
9480          * memslots->generation has been incremented.
9481          * mmio generation may have reached its maximum value.
9482          */
9483         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9484 }
9485
9486 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9487                                 struct kvm_memory_slot *memslot,
9488                                 const struct kvm_userspace_memory_region *mem,
9489                                 enum kvm_mr_change change)
9490 {
9491         return 0;
9492 }
9493
9494 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9495                                      struct kvm_memory_slot *new)
9496 {
9497         /* Still write protect RO slot */
9498         if (new->flags & KVM_MEM_READONLY) {
9499                 kvm_mmu_slot_remove_write_access(kvm, new);
9500                 return;
9501         }
9502
9503         /*
9504          * Call kvm_x86_ops dirty logging hooks when they are valid.
9505          *
9506          * kvm_x86_ops->slot_disable_log_dirty is called when:
9507          *
9508          *  - KVM_MR_CREATE with dirty logging is disabled
9509          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9510          *
9511          * The reason is, in case of PML, we need to set D-bit for any slots
9512          * with dirty logging disabled in order to eliminate unnecessary GPA
9513          * logging in PML buffer (and potential PML buffer full VMEXT). This
9514          * guarantees leaving PML enabled during guest's lifetime won't have
9515          * any additional overhead from PML when guest is running with dirty
9516          * logging disabled for memory slots.
9517          *
9518          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9519          * to dirty logging mode.
9520          *
9521          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9522          *
9523          * In case of write protect:
9524          *
9525          * Write protect all pages for dirty logging.
9526          *
9527          * All the sptes including the large sptes which point to this
9528          * slot are set to readonly. We can not create any new large
9529          * spte on this slot until the end of the logging.
9530          *
9531          * See the comments in fast_page_fault().
9532          */
9533         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9534                 if (kvm_x86_ops->slot_enable_log_dirty)
9535                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9536                 else
9537                         kvm_mmu_slot_remove_write_access(kvm, new);
9538         } else {
9539                 if (kvm_x86_ops->slot_disable_log_dirty)
9540                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9541         }
9542 }
9543
9544 void kvm_arch_commit_memory_region(struct kvm *kvm,
9545                                 const struct kvm_userspace_memory_region *mem,
9546                                 const struct kvm_memory_slot *old,
9547                                 const struct kvm_memory_slot *new,
9548                                 enum kvm_mr_change change)
9549 {
9550         if (!kvm->arch.n_requested_mmu_pages)
9551                 kvm_mmu_change_mmu_pages(kvm,
9552                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9553
9554         /*
9555          * Dirty logging tracks sptes in 4k granularity, meaning that large
9556          * sptes have to be split.  If live migration is successful, the guest
9557          * in the source machine will be destroyed and large sptes will be
9558          * created in the destination. However, if the guest continues to run
9559          * in the source machine (for example if live migration fails), small
9560          * sptes will remain around and cause bad performance.
9561          *
9562          * Scan sptes if dirty logging has been stopped, dropping those
9563          * which can be collapsed into a single large-page spte.  Later
9564          * page faults will create the large-page sptes.
9565          */
9566         if ((change != KVM_MR_DELETE) &&
9567                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9568                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9569                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9570
9571         /*
9572          * Set up write protection and/or dirty logging for the new slot.
9573          *
9574          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9575          * been zapped so no dirty logging staff is needed for old slot. For
9576          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9577          * new and it's also covered when dealing with the new slot.
9578          *
9579          * FIXME: const-ify all uses of struct kvm_memory_slot.
9580          */
9581         if (change != KVM_MR_DELETE)
9582                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9583 }
9584
9585 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9586 {
9587         kvm_mmu_zap_all(kvm);
9588 }
9589
9590 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9591                                    struct kvm_memory_slot *slot)
9592 {
9593         kvm_page_track_flush_slot(kvm, slot);
9594 }
9595
9596 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9597 {
9598         return (is_guest_mode(vcpu) &&
9599                         kvm_x86_ops->guest_apic_has_interrupt &&
9600                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9601 }
9602
9603 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9604 {
9605         if (!list_empty_careful(&vcpu->async_pf.done))
9606                 return true;
9607
9608         if (kvm_apic_has_events(vcpu))
9609                 return true;
9610
9611         if (vcpu->arch.pv.pv_unhalted)
9612                 return true;
9613
9614         if (vcpu->arch.exception.pending)
9615                 return true;
9616
9617         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9618             (vcpu->arch.nmi_pending &&
9619              kvm_x86_ops->nmi_allowed(vcpu)))
9620                 return true;
9621
9622         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9623             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9624                 return true;
9625
9626         if (kvm_arch_interrupt_allowed(vcpu) &&
9627             (kvm_cpu_has_interrupt(vcpu) ||
9628             kvm_guest_apic_has_interrupt(vcpu)))
9629                 return true;
9630
9631         if (kvm_hv_has_stimer_pending(vcpu))
9632                 return true;
9633
9634         return false;
9635 }
9636
9637 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9638 {
9639         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9640 }
9641
9642 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9643 {
9644         return vcpu->arch.preempted_in_kernel;
9645 }
9646
9647 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9648 {
9649         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9650 }
9651
9652 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9653 {
9654         return kvm_x86_ops->interrupt_allowed(vcpu);
9655 }
9656
9657 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9658 {
9659         if (is_64_bit_mode(vcpu))
9660                 return kvm_rip_read(vcpu);
9661         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9662                      kvm_rip_read(vcpu));
9663 }
9664 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9665
9666 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9667 {
9668         return kvm_get_linear_rip(vcpu) == linear_rip;
9669 }
9670 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9671
9672 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9673 {
9674         unsigned long rflags;
9675
9676         rflags = kvm_x86_ops->get_rflags(vcpu);
9677         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9678                 rflags &= ~X86_EFLAGS_TF;
9679         return rflags;
9680 }
9681 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9682
9683 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9684 {
9685         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9686             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9687                 rflags |= X86_EFLAGS_TF;
9688         kvm_x86_ops->set_rflags(vcpu, rflags);
9689 }
9690
9691 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9692 {
9693         __kvm_set_rflags(vcpu, rflags);
9694         kvm_make_request(KVM_REQ_EVENT, vcpu);
9695 }
9696 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9697
9698 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9699 {
9700         int r;
9701
9702         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9703               work->wakeup_all)
9704                 return;
9705
9706         r = kvm_mmu_reload(vcpu);
9707         if (unlikely(r))
9708                 return;
9709
9710         if (!vcpu->arch.mmu->direct_map &&
9711               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9712                 return;
9713
9714         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9715 }
9716
9717 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9718 {
9719         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9720 }
9721
9722 static inline u32 kvm_async_pf_next_probe(u32 key)
9723 {
9724         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9725 }
9726
9727 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9728 {
9729         u32 key = kvm_async_pf_hash_fn(gfn);
9730
9731         while (vcpu->arch.apf.gfns[key] != ~0)
9732                 key = kvm_async_pf_next_probe(key);
9733
9734         vcpu->arch.apf.gfns[key] = gfn;
9735 }
9736
9737 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9738 {
9739         int i;
9740         u32 key = kvm_async_pf_hash_fn(gfn);
9741
9742         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9743                      (vcpu->arch.apf.gfns[key] != gfn &&
9744                       vcpu->arch.apf.gfns[key] != ~0); i++)
9745                 key = kvm_async_pf_next_probe(key);
9746
9747         return key;
9748 }
9749
9750 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9751 {
9752         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9753 }
9754
9755 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9756 {
9757         u32 i, j, k;
9758
9759         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9760         while (true) {
9761                 vcpu->arch.apf.gfns[i] = ~0;
9762                 do {
9763                         j = kvm_async_pf_next_probe(j);
9764                         if (vcpu->arch.apf.gfns[j] == ~0)
9765                                 return;
9766                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9767                         /*
9768                          * k lies cyclically in ]i,j]
9769                          * |    i.k.j |
9770                          * |....j i.k.| or  |.k..j i...|
9771                          */
9772                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9773                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9774                 i = j;
9775         }
9776 }
9777
9778 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9779 {
9780
9781         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9782                                       sizeof(val));
9783 }
9784
9785 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9786 {
9787
9788         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9789                                       sizeof(u32));
9790 }
9791
9792 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9793                                      struct kvm_async_pf *work)
9794 {
9795         struct x86_exception fault;
9796
9797         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9798         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9799
9800         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9801             (vcpu->arch.apf.send_user_only &&
9802              kvm_x86_ops->get_cpl(vcpu) == 0))
9803                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9804         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9805                 fault.vector = PF_VECTOR;
9806                 fault.error_code_valid = true;
9807                 fault.error_code = 0;
9808                 fault.nested_page_fault = false;
9809                 fault.address = work->arch.token;
9810                 fault.async_page_fault = true;
9811                 kvm_inject_page_fault(vcpu, &fault);
9812         }
9813 }
9814
9815 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9816                                  struct kvm_async_pf *work)
9817 {
9818         struct x86_exception fault;
9819         u32 val;
9820
9821         if (work->wakeup_all)
9822                 work->arch.token = ~0; /* broadcast wakeup */
9823         else
9824                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9825         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9826
9827         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9828             !apf_get_user(vcpu, &val)) {
9829                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9830                     vcpu->arch.exception.pending &&
9831                     vcpu->arch.exception.nr == PF_VECTOR &&
9832                     !apf_put_user(vcpu, 0)) {
9833                         vcpu->arch.exception.injected = false;
9834                         vcpu->arch.exception.pending = false;
9835                         vcpu->arch.exception.nr = 0;
9836                         vcpu->arch.exception.has_error_code = false;
9837                         vcpu->arch.exception.error_code = 0;
9838                         vcpu->arch.exception.has_payload = false;
9839                         vcpu->arch.exception.payload = 0;
9840                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9841                         fault.vector = PF_VECTOR;
9842                         fault.error_code_valid = true;
9843                         fault.error_code = 0;
9844                         fault.nested_page_fault = false;
9845                         fault.address = work->arch.token;
9846                         fault.async_page_fault = true;
9847                         kvm_inject_page_fault(vcpu, &fault);
9848                 }
9849         }
9850         vcpu->arch.apf.halted = false;
9851         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9852 }
9853
9854 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9855 {
9856         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9857                 return true;
9858         else
9859                 return kvm_can_do_async_pf(vcpu);
9860 }
9861
9862 void kvm_arch_start_assignment(struct kvm *kvm)
9863 {
9864         atomic_inc(&kvm->arch.assigned_device_count);
9865 }
9866 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9867
9868 void kvm_arch_end_assignment(struct kvm *kvm)
9869 {
9870         atomic_dec(&kvm->arch.assigned_device_count);
9871 }
9872 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9873
9874 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9875 {
9876         return atomic_read(&kvm->arch.assigned_device_count);
9877 }
9878 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9879
9880 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9881 {
9882         atomic_inc(&kvm->arch.noncoherent_dma_count);
9883 }
9884 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9885
9886 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9887 {
9888         atomic_dec(&kvm->arch.noncoherent_dma_count);
9889 }
9890 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9891
9892 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9893 {
9894         return atomic_read(&kvm->arch.noncoherent_dma_count);
9895 }
9896 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9897
9898 bool kvm_arch_has_irq_bypass(void)
9899 {
9900         return kvm_x86_ops->update_pi_irte != NULL;
9901 }
9902
9903 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9904                                       struct irq_bypass_producer *prod)
9905 {
9906         struct kvm_kernel_irqfd *irqfd =
9907                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9908
9909         irqfd->producer = prod;
9910
9911         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9912                                            prod->irq, irqfd->gsi, 1);
9913 }
9914
9915 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9916                                       struct irq_bypass_producer *prod)
9917 {
9918         int ret;
9919         struct kvm_kernel_irqfd *irqfd =
9920                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9921
9922         WARN_ON(irqfd->producer != prod);
9923         irqfd->producer = NULL;
9924
9925         /*
9926          * When producer of consumer is unregistered, we change back to
9927          * remapped mode, so we can re-use the current implementation
9928          * when the irq is masked/disabled or the consumer side (KVM
9929          * int this case doesn't want to receive the interrupts.
9930         */
9931         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9932         if (ret)
9933                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9934                        " fails: %d\n", irqfd->consumer.token, ret);
9935 }
9936
9937 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9938                                    uint32_t guest_irq, bool set)
9939 {
9940         if (!kvm_x86_ops->update_pi_irte)
9941                 return -EINVAL;
9942
9943         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9944 }
9945
9946 bool kvm_vector_hashing_enabled(void)
9947 {
9948         return vector_hashing;
9949 }
9950 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9951
9952 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9953 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9954 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9955 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9956 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9957 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9958 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9959 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9960 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9961 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9962 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9963 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9964 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9965 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9966 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9967 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9968 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9969 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9970 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);