arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 139 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 140 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 141 EXPORT_SYMBOL_GPL(lapic_timer_advance_ns);
 142
 143 static bool __read_mostly vector_hashing = true;
 144 module_param(vector_hashing, bool, S_IRUGO);
 145
 146 bool __read_mostly enable_vmware_backdoor = false;
 147 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 148 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 149
 150 static bool __read_mostly force_emulation_prefix = false;
 151 module_param(force_emulation_prefix, bool, S_IRUGO);
 152
 153 #define KVM_NR_SHARED_MSRS 16
 154
 155 struct kvm_shared_msrs_global {
 156         int nr;
 157         u32 msrs[KVM_NR_SHARED_MSRS];
 158 };
 159
 160 struct kvm_shared_msrs {
 161         struct user_return_notifier urn;
 162         bool registered;
 163         struct kvm_shared_msr_values {
 164                 u64 host;
 165                 u64 curr;
 166         } values[KVM_NR_SHARED_MSRS];
 167 };
 168
 169 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 170 static struct kvm_shared_msrs __percpu *shared_msrs;
 171
 172 struct kvm_stats_debugfs_item debugfs_entries[] = {
 173         { "pf_fixed", VCPU_STAT(pf_fixed) },
 174         { "pf_guest", VCPU_STAT(pf_guest) },
 175         { "tlb_flush", VCPU_STAT(tlb_flush) },
 176         { "invlpg", VCPU_STAT(invlpg) },
 177         { "exits", VCPU_STAT(exits) },
 178         { "io_exits", VCPU_STAT(io_exits) },
 179         { "mmio_exits", VCPU_STAT(mmio_exits) },
 180         { "signal_exits", VCPU_STAT(signal_exits) },
 181         { "irq_window", VCPU_STAT(irq_window_exits) },
 182         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 183         { "halt_exits", VCPU_STAT(halt_exits) },
 184         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 185         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 186         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 187         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 188         { "hypercalls", VCPU_STAT(hypercalls) },
 189         { "request_irq", VCPU_STAT(request_irq_exits) },
 190         { "irq_exits", VCPU_STAT(irq_exits) },
 191         { "host_state_reload", VCPU_STAT(host_state_reload) },
 192         { "fpu_reload", VCPU_STAT(fpu_reload) },
 193         { "insn_emulation", VCPU_STAT(insn_emulation) },
 194         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 195         { "irq_injections", VCPU_STAT(irq_injections) },
 196         { "nmi_injections", VCPU_STAT(nmi_injections) },
 197         { "req_event", VCPU_STAT(req_event) },
 198         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 199         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 200         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 201         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 202         { "mmu_flooded", VM_STAT(mmu_flooded) },
 203         { "mmu_recycled", VM_STAT(mmu_recycled) },
 204         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 205         { "mmu_unsync", VM_STAT(mmu_unsync) },
 206         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 207         { "largepages", VM_STAT(lpages) },
 208         { "max_mmu_page_hash_collisions",
 209                 VM_STAT(max_mmu_page_hash_collisions) },
 210         { NULL }
 211 };
 212
 213 u64 __read_mostly host_xcr0;
 214
 215 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 216
 217 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 218 {
 219         int i;
 220         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 221                 vcpu->arch.apf.gfns[i] = ~0;
 222 }
 223
 224 static void kvm_on_user_return(struct user_return_notifier *urn)
 225 {
 226         unsigned slot;
 227         struct kvm_shared_msrs *locals
 228                 = container_of(urn, struct kvm_shared_msrs, urn);
 229         struct kvm_shared_msr_values *values;
 230         unsigned long flags;
 231
 232         /*
 233          * Disabling irqs at this point since the following code could be
 234          * interrupted and executed through kvm_arch_hardware_disable()
 235          */
 236         local_irq_save(flags);
 237         if (locals->registered) {
 238                 locals->registered = false;
 239                 user_return_notifier_unregister(urn);
 240         }
 241         local_irq_restore(flags);
 242         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 243                 values = &locals->values[slot];
 244                 if (values->host != values->curr) {
 245                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 246                         values->curr = values->host;
 247                 }
 248         }
 249 }
 250
 251 static void shared_msr_update(unsigned slot, u32 msr)
 252 {
 253         u64 value;
 254         unsigned int cpu = smp_processor_id();
 255         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 256
 257         /* only read, and nobody should modify it at this time,
 258          * so don't need lock */
 259         if (slot >= shared_msrs_global.nr) {
 260                 printk(KERN_ERR "kvm: invalid MSR slot!");
 261                 return;
 262         }
 263         rdmsrl_safe(msr, &value);
 264         smsr->values[slot].host = value;
 265         smsr->values[slot].curr = value;
 266 }
 267
 268 void kvm_define_shared_msr(unsigned slot, u32 msr)
 269 {
 270         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 271         shared_msrs_global.msrs[slot] = msr;
 272         if (slot >= shared_msrs_global.nr)
 273                 shared_msrs_global.nr = slot + 1;
 274 }
 275 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 276
 277 static void kvm_shared_msr_cpu_online(void)
 278 {
 279         unsigned i;
 280
 281         for (i = 0; i < shared_msrs_global.nr; ++i)
 282                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 283 }
 284
 285 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 286 {
 287         unsigned int cpu = smp_processor_id();
 288         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 289         int err;
 290
 291         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 292                 return 0;
 293         smsr->values[slot].curr = value;
 294         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 295         if (err)
 296                 return 1;
 297
 298         if (!smsr->registered) {
 299                 smsr->urn.on_user_return = kvm_on_user_return;
 300                 user_return_notifier_register(&smsr->urn);
 301                 smsr->registered = true;
 302         }
 303         return 0;
 304 }
 305 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 306
 307 static void drop_user_return_notifiers(void)
 308 {
 309         unsigned int cpu = smp_processor_id();
 310         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 311
 312         if (smsr->registered)
 313                 kvm_on_user_return(&smsr->urn);
 314 }
 315
 316 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 317 {
 318         return vcpu->arch.apic_base;
 319 }
 320 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 321
 322 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 323 {
 324         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 325 }
 326 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 327
 328 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 329 {
 330         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 331         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 332         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 333                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 334
 335         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 336                 return 1;
 337         if (!msr_info->host_initiated) {
 338                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 339                         return 1;
 340                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 341                         return 1;
 342         }
 343
 344         kvm_lapic_set_base(vcpu, msr_info->data);
 345         return 0;
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 348
 349 asmlinkage __visible void kvm_spurious_fault(void)
 350 {
 351         /* Fault while not rebooting.  We want the trace. */
 352         BUG();
 353 }
 354 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 355
 356 #define EXCPT_BENIGN            0
 357 #define EXCPT_CONTRIBUTORY      1
 358 #define EXCPT_PF                2
 359
 360 static int exception_class(int vector)
 361 {
 362         switch (vector) {
 363         case PF_VECTOR:
 364                 return EXCPT_PF;
 365         case DE_VECTOR:
 366         case TS_VECTOR:
 367         case NP_VECTOR:
 368         case SS_VECTOR:
 369         case GP_VECTOR:
 370                 return EXCPT_CONTRIBUTORY;
 371         default:
 372                 break;
 373         }
 374         return EXCPT_BENIGN;
 375 }
 376
 377 #define EXCPT_FAULT             0
 378 #define EXCPT_TRAP              1
 379 #define EXCPT_ABORT             2
 380 #define EXCPT_INTERRUPT         3
 381
 382 static int exception_type(int vector)
 383 {
 384         unsigned int mask;
 385
 386         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 387                 return EXCPT_INTERRUPT;
 388
 389         mask = 1 << vector;
 390
 391         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 392         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 393                 return EXCPT_TRAP;
 394
 395         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 396                 return EXCPT_ABORT;
 397
 398         /* Reserved exceptions will result in fault */
 399         return EXCPT_FAULT;
 400 }
 401
 402 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 403                 unsigned nr, bool has_error, u32 error_code,
 404                 bool reinject)
 405 {
 406         u32 prev_nr;
 407         int class1, class2;
 408
 409         kvm_make_request(KVM_REQ_EVENT, vcpu);
 410
 411         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 412         queue:
 413                 if (has_error && !is_protmode(vcpu))
 414                         has_error = false;
 415                 if (reinject) {
 416                         /*
 417                          * On vmentry, vcpu->arch.exception.pending is only
 418                          * true if an event injection was blocked by
 419                          * nested_run_pending.  In that case, however,
 420                          * vcpu_enter_guest requests an immediate exit,
 421                          * and the guest shouldn't proceed far enough to
 422                          * need reinjection.
 423                          */
 424                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 425                         vcpu->arch.exception.injected = true;
 426                 } else {
 427                         vcpu->arch.exception.pending = true;
 428                         vcpu->arch.exception.injected = false;
 429                 }
 430                 vcpu->arch.exception.has_error_code = has_error;
 431                 vcpu->arch.exception.nr = nr;
 432                 vcpu->arch.exception.error_code = error_code;
 433                 return;
 434         }
 435
 436         /* to check exception */
 437         prev_nr = vcpu->arch.exception.nr;
 438         if (prev_nr == DF_VECTOR) {
 439                 /* triple fault -> shutdown */
 440                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 441                 return;
 442         }
 443         class1 = exception_class(prev_nr);
 444         class2 = exception_class(nr);
 445         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 446                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 447                 /*
 448                  * Generate double fault per SDM Table 5-5.  Set
 449                  * exception.pending = true so that the double fault
 450                  * can trigger a nested vmexit.
 451                  */
 452                 vcpu->arch.exception.pending = true;
 453                 vcpu->arch.exception.injected = false;
 454                 vcpu->arch.exception.has_error_code = true;
 455                 vcpu->arch.exception.nr = DF_VECTOR;
 456                 vcpu->arch.exception.error_code = 0;
 457         } else
 458                 /* replace previous exception with a new one in a hope
 459                    that instruction re-execution will regenerate lost
 460                    exception */
 461                 goto queue;
 462 }
 463
 464 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 465 {
 466         kvm_multiple_exception(vcpu, nr, false, 0, false);
 467 }
 468 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 469
 470 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 471 {
 472         kvm_multiple_exception(vcpu, nr, false, 0, true);
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 475
 476 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 477 {
 478         if (err)
 479                 kvm_inject_gp(vcpu, 0);
 480         else
 481                 return kvm_skip_emulated_instruction(vcpu);
 482
 483         return 1;
 484 }
 485 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 486
 487 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 488 {
 489         ++vcpu->stat.pf_guest;
 490         vcpu->arch.exception.nested_apf =
 491                 is_guest_mode(vcpu) && fault->async_page_fault;
 492         if (vcpu->arch.exception.nested_apf)
 493                 vcpu->arch.apf.nested_apf_token = fault->address;
 494         else
 495                 vcpu->arch.cr2 = fault->address;
 496         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 497 }
 498 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 499
 500 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 501 {
 502         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 503                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 504         else
 505                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 506
 507         return fault->nested_page_fault;
 508 }
 509
 510 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 511 {
 512         atomic_inc(&vcpu->arch.nmi_queued);
 513         kvm_make_request(KVM_REQ_NMI, vcpu);
 514 }
 515 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 516
 517 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 518 {
 519         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 520 }
 521 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 522
 523 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 524 {
 525         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 526 }
 527 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 528
 529 /*
 530  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 531  * a #GP and return false.
 532  */
 533 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 534 {
 535         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 536                 return true;
 537         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 538         return false;
 539 }
 540 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 541
 542 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 543 {
 544         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 545                 return true;
 546
 547         kvm_queue_exception(vcpu, UD_VECTOR);
 548         return false;
 549 }
 550 EXPORT_SYMBOL_GPL(kvm_require_dr);
 551
 552 /*
 553  * This function will be used to read from the physical memory of the currently
 554  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 555  * can read from guest physical or from the guest's guest physical memory.
 556  */
 557 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 558                             gfn_t ngfn, void *data, int offset, int len,
 559                             u32 access)
 560 {
 561         struct x86_exception exception;
 562         gfn_t real_gfn;
 563         gpa_t ngpa;
 564
 565         ngpa     = gfn_to_gpa(ngfn);
 566         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 567         if (real_gfn == UNMAPPED_GVA)
 568                 return -EFAULT;
 569
 570         real_gfn = gpa_to_gfn(real_gfn);
 571
 572         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 573 }
 574 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 575
 576 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 577                                void *data, int offset, int len, u32 access)
 578 {
 579         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 580                                        data, offset, len, access);
 581 }
 582
 583 /*
 584  * Load the pae pdptrs.  Return true is they are all valid.
 585  */
 586 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 587 {
 588         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 589         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 590         int i;
 591         int ret;
 592         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 593
 594         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 595                                       offset * sizeof(u64), sizeof(pdpte),
 596                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 597         if (ret < 0) {
 598                 ret = 0;
 599                 goto out;
 600         }
 601         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 602                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 603                     (pdpte[i] &
 604                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 605                         ret = 0;
 606                         goto out;
 607                 }
 608         }
 609         ret = 1;
 610
 611         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 612         __set_bit(VCPU_EXREG_PDPTR,
 613                   (unsigned long *)&vcpu->arch.regs_avail);
 614         __set_bit(VCPU_EXREG_PDPTR,
 615                   (unsigned long *)&vcpu->arch.regs_dirty);
 616 out:
 617
 618         return ret;
 619 }
 620 EXPORT_SYMBOL_GPL(load_pdptrs);
 621
 622 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 623 {
 624         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 625         bool changed = true;
 626         int offset;
 627         gfn_t gfn;
 628         int r;
 629
 630         if (is_long_mode(vcpu) || !is_pae(vcpu))
 631                 return false;
 632
 633         if (!test_bit(VCPU_EXREG_PDPTR,
 634                       (unsigned long *)&vcpu->arch.regs_avail))
 635                 return true;
 636
 637         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 638         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 639         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 640                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 641         if (r < 0)
 642                 goto out;
 643         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 644 out:
 645
 646         return changed;
 647 }
 648 EXPORT_SYMBOL_GPL(pdptrs_changed);
 649
 650 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 651 {
 652         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 653         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 654
 655         cr0 |= X86_CR0_ET;
 656
 657 #ifdef CONFIG_X86_64
 658         if (cr0 & 0xffffffff00000000UL)
 659                 return 1;
 660 #endif
 661
 662         cr0 &= ~CR0_RESERVED_BITS;
 663
 664         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 665                 return 1;
 666
 667         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 668                 return 1;
 669
 670         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 671 #ifdef CONFIG_X86_64
 672                 if ((vcpu->arch.efer & EFER_LME)) {
 673                         int cs_db, cs_l;
 674
 675                         if (!is_pae(vcpu))
 676                                 return 1;
 677                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 678                         if (cs_l)
 679                                 return 1;
 680                 } else
 681 #endif
 682                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 683                                                  kvm_read_cr3(vcpu)))
 684                         return 1;
 685         }
 686
 687         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 688                 return 1;
 689
 690         kvm_x86_ops->set_cr0(vcpu, cr0);
 691
 692         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 693                 kvm_clear_async_pf_completion_queue(vcpu);
 694                 kvm_async_pf_hash_reset(vcpu);
 695         }
 696
 697         if ((cr0 ^ old_cr0) & update_bits)
 698                 kvm_mmu_reset_context(vcpu);
 699
 700         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 701             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 702             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 703                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 704
 705         return 0;
 706 }
 707 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 708
 709 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 710 {
 711         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 712 }
 713 EXPORT_SYMBOL_GPL(kvm_lmsw);
 714
 715 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 716 {
 717         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 718                         !vcpu->guest_xcr0_loaded) {
 719                 /* kvm_set_xcr() also depends on this */
 720                 if (vcpu->arch.xcr0 != host_xcr0)
 721                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 722                 vcpu->guest_xcr0_loaded = 1;
 723         }
 724 }
 725
 726 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 727 {
 728         if (vcpu->guest_xcr0_loaded) {
 729                 if (vcpu->arch.xcr0 != host_xcr0)
 730                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 731                 vcpu->guest_xcr0_loaded = 0;
 732         }
 733 }
 734
 735 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 736 {
 737         u64 xcr0 = xcr;
 738         u64 old_xcr0 = vcpu->arch.xcr0;
 739         u64 valid_bits;
 740
 741         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 742         if (index != XCR_XFEATURE_ENABLED_MASK)
 743                 return 1;
 744         if (!(xcr0 & XFEATURE_MASK_FP))
 745                 return 1;
 746         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 747                 return 1;
 748
 749         /*
 750          * Do not allow the guest to set bits that we do not support
 751          * saving.  However, xcr0 bit 0 is always set, even if the
 752          * emulated CPU does not support XSAVE (see fx_init).
 753          */
 754         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 755         if (xcr0 & ~valid_bits)
 756                 return 1;
 757
 758         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 759             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 760                 return 1;
 761
 762         if (xcr0 & XFEATURE_MASK_AVX512) {
 763                 if (!(xcr0 & XFEATURE_MASK_YMM))
 764                         return 1;
 765                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 766                         return 1;
 767         }
 768         vcpu->arch.xcr0 = xcr0;
 769
 770         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 771                 kvm_update_cpuid(vcpu);
 772         return 0;
 773 }
 774
 775 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 776 {
 777         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 778             __kvm_set_xcr(vcpu, index, xcr)) {
 779                 kvm_inject_gp(vcpu, 0);
 780                 return 1;
 781         }
 782         return 0;
 783 }
 784 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 785
 786 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 787 {
 788         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 789         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 790                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 791
 792         if (cr4 & CR4_RESERVED_BITS)
 793                 return 1;
 794
 795         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 796                 return 1;
 797
 798         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 799                 return 1;
 800
 801         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 802                 return 1;
 803
 804         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 805                 return 1;
 806
 807         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 808                 return 1;
 809
 810         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 811                 return 1;
 812
 813         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 814                 return 1;
 815
 816         if (is_long_mode(vcpu)) {
 817                 if (!(cr4 & X86_CR4_PAE))
 818                         return 1;
 819         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 820                    && ((cr4 ^ old_cr4) & pdptr_bits)
 821                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 822                                    kvm_read_cr3(vcpu)))
 823                 return 1;
 824
 825         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 826                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 827                         return 1;
 828
 829                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 830                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 831                         return 1;
 832         }
 833
 834         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 835                 return 1;
 836
 837         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 838             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 839                 kvm_mmu_reset_context(vcpu);
 840
 841         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 842                 kvm_update_cpuid(vcpu);
 843
 844         return 0;
 845 }
 846 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 847
 848 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 849 {
 850 #ifdef CONFIG_X86_64
 851         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 852
 853         if (pcid_enabled)
 854                 cr3 &= ~CR3_PCID_INVD;
 855 #endif
 856
 857         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 858                 kvm_mmu_sync_roots(vcpu);
 859                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 860                 return 0;
 861         }
 862
 863         if (is_long_mode(vcpu) &&
 864             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 865                 return 1;
 866         else if (is_pae(vcpu) && is_paging(vcpu) &&
 867                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 868                 return 1;
 869
 870         vcpu->arch.cr3 = cr3;
 871         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 872         kvm_mmu_new_cr3(vcpu);
 873         return 0;
 874 }
 875 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 876
 877 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 878 {
 879         if (cr8 & CR8_RESERVED_BITS)
 880                 return 1;
 881         if (lapic_in_kernel(vcpu))
 882                 kvm_lapic_set_tpr(vcpu, cr8);
 883         else
 884                 vcpu->arch.cr8 = cr8;
 885         return 0;
 886 }
 887 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 888
 889 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 890 {
 891         if (lapic_in_kernel(vcpu))
 892                 return kvm_lapic_get_cr8(vcpu);
 893         else
 894                 return vcpu->arch.cr8;
 895 }
 896 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 897
 898 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 899 {
 900         int i;
 901
 902         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 903                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 904                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 905                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 906         }
 907 }
 908
 909 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 910 {
 911         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 912                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 913 }
 914
 915 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 916 {
 917         unsigned long dr7;
 918
 919         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 920                 dr7 = vcpu->arch.guest_debug_dr7;
 921         else
 922                 dr7 = vcpu->arch.dr7;
 923         kvm_x86_ops->set_dr7(vcpu, dr7);
 924         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 925         if (dr7 & DR7_BP_EN_MASK)
 926                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 927 }
 928
 929 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 930 {
 931         u64 fixed = DR6_FIXED_1;
 932
 933         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 934                 fixed |= DR6_RTM;
 935         return fixed;
 936 }
 937
 938 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 939 {
 940         switch (dr) {
 941         case 0 ... 3:
 942                 vcpu->arch.db[dr] = val;
 943                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 944                         vcpu->arch.eff_db[dr] = val;
 945                 break;
 946         case 4:
 947                 /* fall through */
 948         case 6:
 949                 if (val & 0xffffffff00000000ULL)
 950                         return -1; /* #GP */
 951                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 952                 kvm_update_dr6(vcpu);
 953                 break;
 954         case 5:
 955                 /* fall through */
 956         default: /* 7 */
 957                 if (val & 0xffffffff00000000ULL)
 958                         return -1; /* #GP */
 959                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 960                 kvm_update_dr7(vcpu);
 961                 break;
 962         }
 963
 964         return 0;
 965 }
 966
 967 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 968 {
 969         if (__kvm_set_dr(vcpu, dr, val)) {
 970                 kvm_inject_gp(vcpu, 0);
 971                 return 1;
 972         }
 973         return 0;
 974 }
 975 EXPORT_SYMBOL_GPL(kvm_set_dr);
 976
 977 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 978 {
 979         switch (dr) {
 980         case 0 ... 3:
 981                 *val = vcpu->arch.db[dr];
 982                 break;
 983         case 4:
 984                 /* fall through */
 985         case 6:
 986                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 987                         *val = vcpu->arch.dr6;
 988                 else
 989                         *val = kvm_x86_ops->get_dr6(vcpu);
 990                 break;
 991         case 5:
 992                 /* fall through */
 993         default: /* 7 */
 994                 *val = vcpu->arch.dr7;
 995                 break;
 996         }
 997         return 0;
 998 }
 999 EXPORT_SYMBOL_GPL(kvm_get_dr);
1000
1001 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1002 {
1003         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
1004         u64 data;
1005         int err;
1006
1007         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1008         if (err)
1009                 return err;
1010         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
1011         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
1012         return err;
1013 }
1014 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1015
1016 /*
1017  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1018  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1019  *
1020  * This list is modified at module load time to reflect the
1021  * capabilities of the host cpu. This capabilities test skips MSRs that are
1022  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1023  * may depend on host virtualization features rather than host cpu features.
1024  */
1025
1026 static u32 msrs_to_save[] = {
1027         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1028         MSR_STAR,
1029 #ifdef CONFIG_X86_64
1030         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1031 #endif
1032         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1033         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1034         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1035 };
1036
1037 static unsigned num_msrs_to_save;
1038
1039 static u32 emulated_msrs[] = {
1040         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1041         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1042         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1043         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1044         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1045         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1046         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1047         HV_X64_MSR_RESET,
1048         HV_X64_MSR_VP_INDEX,
1049         HV_X64_MSR_VP_RUNTIME,
1050         HV_X64_MSR_SCONTROL,
1051         HV_X64_MSR_STIMER0_CONFIG,
1052         HV_X64_MSR_VP_ASSIST_PAGE,
1053         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1054         HV_X64_MSR_TSC_EMULATION_STATUS,
1055
1056         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1057         MSR_KVM_PV_EOI_EN,
1058
1059         MSR_IA32_TSC_ADJUST,
1060         MSR_IA32_TSCDEADLINE,
1061         MSR_IA32_MISC_ENABLE,
1062         MSR_IA32_MCG_STATUS,
1063         MSR_IA32_MCG_CTL,
1064         MSR_IA32_MCG_EXT_CTL,
1065         MSR_IA32_SMBASE,
1066         MSR_SMI_COUNT,
1067         MSR_PLATFORM_INFO,
1068         MSR_MISC_FEATURES_ENABLES,
1069         MSR_AMD64_VIRT_SPEC_CTRL,
1070 };
1071
1072 static unsigned num_emulated_msrs;
1073
1074 /*
1075  * List of msr numbers which are used to expose MSR-based features that
1076  * can be used by a hypervisor to validate requested CPU features.
1077  */
1078 static u32 msr_based_features[] = {
1079         MSR_IA32_VMX_BASIC,
1080         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1081         MSR_IA32_VMX_PINBASED_CTLS,
1082         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1083         MSR_IA32_VMX_PROCBASED_CTLS,
1084         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1085         MSR_IA32_VMX_EXIT_CTLS,
1086         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1087         MSR_IA32_VMX_ENTRY_CTLS,
1088         MSR_IA32_VMX_MISC,
1089         MSR_IA32_VMX_CR0_FIXED0,
1090         MSR_IA32_VMX_CR0_FIXED1,
1091         MSR_IA32_VMX_CR4_FIXED0,
1092         MSR_IA32_VMX_CR4_FIXED1,
1093         MSR_IA32_VMX_VMCS_ENUM,
1094         MSR_IA32_VMX_PROCBASED_CTLS2,
1095         MSR_IA32_VMX_EPT_VPID_CAP,
1096         MSR_IA32_VMX_VMFUNC,
1097
1098         MSR_F10H_DECFG,
1099         MSR_IA32_UCODE_REV,
1100         MSR_IA32_ARCH_CAPABILITIES,
1101 };
1102
1103 static unsigned int num_msr_based_features;
1104
1105 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1106 {
1107         switch (msr->index) {
1108         case MSR_IA32_UCODE_REV:
1109         case MSR_IA32_ARCH_CAPABILITIES:
1110                 rdmsrl_safe(msr->index, &msr->data);
1111                 break;
1112         default:
1113                 if (kvm_x86_ops->get_msr_feature(msr))
1114                         return 1;
1115         }
1116         return 0;
1117 }
1118
1119 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1120 {
1121         struct kvm_msr_entry msr;
1122         int r;
1123
1124         msr.index = index;
1125         r = kvm_get_msr_feature(&msr);
1126         if (r)
1127                 return r;
1128
1129         *data = msr.data;
1130
1131         return 0;
1132 }
1133
1134 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1135 {
1136         if (efer & efer_reserved_bits)
1137                 return false;
1138
1139         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1140                         return false;
1141
1142         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1143                         return false;
1144
1145         return true;
1146 }
1147 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1148
1149 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1150 {
1151         u64 old_efer = vcpu->arch.efer;
1152
1153         if (!kvm_valid_efer(vcpu, efer))
1154                 return 1;
1155
1156         if (is_paging(vcpu)
1157             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1158                 return 1;
1159
1160         efer &= ~EFER_LMA;
1161         efer |= vcpu->arch.efer & EFER_LMA;
1162
1163         kvm_x86_ops->set_efer(vcpu, efer);
1164
1165         /* Update reserved bits */
1166         if ((efer ^ old_efer) & EFER_NX)
1167                 kvm_mmu_reset_context(vcpu);
1168
1169         return 0;
1170 }
1171
1172 void kvm_enable_efer_bits(u64 mask)
1173 {
1174        efer_reserved_bits &= ~mask;
1175 }
1176 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1177
1178 /*
1179  * Writes msr value into into the appropriate "register".
1180  * Returns 0 on success, non-0 otherwise.
1181  * Assumes vcpu_load() was already called.
1182  */
1183 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1184 {
1185         switch (msr->index) {
1186         case MSR_FS_BASE:
1187         case MSR_GS_BASE:
1188         case MSR_KERNEL_GS_BASE:
1189         case MSR_CSTAR:
1190         case MSR_LSTAR:
1191                 if (is_noncanonical_address(msr->data, vcpu))
1192                         return 1;
1193                 break;
1194         case MSR_IA32_SYSENTER_EIP:
1195         case MSR_IA32_SYSENTER_ESP:
1196                 /*
1197                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1198                  * non-canonical address is written on Intel but not on
1199                  * AMD (which ignores the top 32-bits, because it does
1200                  * not implement 64-bit SYSENTER).
1201                  *
1202                  * 64-bit code should hence be able to write a non-canonical
1203                  * value on AMD.  Making the address canonical ensures that
1204                  * vmentry does not fail on Intel after writing a non-canonical
1205                  * value, and that something deterministic happens if the guest
1206                  * invokes 64-bit SYSENTER.
1207                  */
1208                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1209         }
1210         return kvm_x86_ops->set_msr(vcpu, msr);
1211 }
1212 EXPORT_SYMBOL_GPL(kvm_set_msr);
1213
1214 /*
1215  * Adapt set_msr() to msr_io()'s calling convention
1216  */
1217 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1218 {
1219         struct msr_data msr;
1220         int r;
1221
1222         msr.index = index;
1223         msr.host_initiated = true;
1224         r = kvm_get_msr(vcpu, &msr);
1225         if (r)
1226                 return r;
1227
1228         *data = msr.data;
1229         return 0;
1230 }
1231
1232 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1233 {
1234         struct msr_data msr;
1235
1236         msr.data = *data;
1237         msr.index = index;
1238         msr.host_initiated = true;
1239         return kvm_set_msr(vcpu, &msr);
1240 }
1241
1242 #ifdef CONFIG_X86_64
1243 struct pvclock_gtod_data {
1244         seqcount_t      seq;
1245
1246         struct { /* extract of a clocksource struct */
1247                 int vclock_mode;
1248                 u64     cycle_last;
1249                 u64     mask;
1250                 u32     mult;
1251                 u32     shift;
1252         } clock;
1253
1254         u64             boot_ns;
1255         u64             nsec_base;
1256         u64             wall_time_sec;
1257 };
1258
1259 static struct pvclock_gtod_data pvclock_gtod_data;
1260
1261 static void update_pvclock_gtod(struct timekeeper *tk)
1262 {
1263         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1264         u64 boot_ns;
1265
1266         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1267
1268         write_seqcount_begin(&vdata->seq);
1269
1270         /* copy pvclock gtod data */
1271         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1272         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1273         vdata->clock.mask               = tk->tkr_mono.mask;
1274         vdata->clock.mult               = tk->tkr_mono.mult;
1275         vdata->clock.shift              = tk->tkr_mono.shift;
1276
1277         vdata->boot_ns                  = boot_ns;
1278         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1279
1280         vdata->wall_time_sec            = tk->xtime_sec;
1281
1282         write_seqcount_end(&vdata->seq);
1283 }
1284 #endif
1285
1286 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1287 {
1288         /*
1289          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1290          * vcpu_enter_guest.  This function is only called from
1291          * the physical CPU that is running vcpu.
1292          */
1293         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1294 }
1295
1296 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1297 {
1298         int version;
1299         int r;
1300         struct pvclock_wall_clock wc;
1301         struct timespec64 boot;
1302
1303         if (!wall_clock)
1304                 return;
1305
1306         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1307         if (r)
1308                 return;
1309
1310         if (version & 1)
1311                 ++version;  /* first time write, random junk */
1312
1313         ++version;
1314
1315         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1316                 return;
1317
1318         /*
1319          * The guest calculates current wall clock time by adding
1320          * system time (updated by kvm_guest_time_update below) to the
1321          * wall clock specified here.  guest system time equals host
1322          * system time for us, thus we must fill in host boot time here.
1323          */
1324         getboottime64(&boot);
1325
1326         if (kvm->arch.kvmclock_offset) {
1327                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1328                 boot = timespec64_sub(boot, ts);
1329         }
1330         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1331         wc.nsec = boot.tv_nsec;
1332         wc.version = version;
1333
1334         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1335
1336         version++;
1337         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1338 }
1339
1340 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1341 {
1342         do_shl32_div32(dividend, divisor);
1343         return dividend;
1344 }
1345
1346 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1347                                s8 *pshift, u32 *pmultiplier)
1348 {
1349         uint64_t scaled64;
1350         int32_t  shift = 0;
1351         uint64_t tps64;
1352         uint32_t tps32;
1353
1354         tps64 = base_hz;
1355         scaled64 = scaled_hz;
1356         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1357                 tps64 >>= 1;
1358                 shift--;
1359         }
1360
1361         tps32 = (uint32_t)tps64;
1362         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1363                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1364                         scaled64 >>= 1;
1365                 else
1366                         tps32 <<= 1;
1367                 shift++;
1368         }
1369
1370         *pshift = shift;
1371         *pmultiplier = div_frac(scaled64, tps32);
1372
1373         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1374                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1375 }
1376
1377 #ifdef CONFIG_X86_64
1378 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1379 #endif
1380
1381 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1382 static unsigned long max_tsc_khz;
1383
1384 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1385 {
1386         u64 v = (u64)khz * (1000000 + ppm);
1387         do_div(v, 1000000);
1388         return v;
1389 }
1390
1391 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1392 {
1393         u64 ratio;
1394
1395         /* Guest TSC same frequency as host TSC? */
1396         if (!scale) {
1397                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1398                 return 0;
1399         }
1400
1401         /* TSC scaling supported? */
1402         if (!kvm_has_tsc_control) {
1403                 if (user_tsc_khz > tsc_khz) {
1404                         vcpu->arch.tsc_catchup = 1;
1405                         vcpu->arch.tsc_always_catchup = 1;
1406                         return 0;
1407                 } else {
1408                         WARN(1, "user requested TSC rate below hardware speed\n");
1409                         return -1;
1410                 }
1411         }
1412
1413         /* TSC scaling required  - calculate ratio */
1414         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1415                                 user_tsc_khz, tsc_khz);
1416
1417         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1418                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1419                           user_tsc_khz);
1420                 return -1;
1421         }
1422
1423         vcpu->arch.tsc_scaling_ratio = ratio;
1424         return 0;
1425 }
1426
1427 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1428 {
1429         u32 thresh_lo, thresh_hi;
1430         int use_scaling = 0;
1431
1432         /* tsc_khz can be zero if TSC calibration fails */
1433         if (user_tsc_khz == 0) {
1434                 /* set tsc_scaling_ratio to a safe value */
1435                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1436                 return -1;
1437         }
1438
1439         /* Compute a scale to convert nanoseconds in TSC cycles */
1440         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1441                            &vcpu->arch.virtual_tsc_shift,
1442                            &vcpu->arch.virtual_tsc_mult);
1443         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1444
1445         /*
1446          * Compute the variation in TSC rate which is acceptable
1447          * within the range of tolerance and decide if the
1448          * rate being applied is within that bounds of the hardware
1449          * rate.  If so, no scaling or compensation need be done.
1450          */
1451         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1452         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1453         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1454                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1455                 use_scaling = 1;
1456         }
1457         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1458 }
1459
1460 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1461 {
1462         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1463                                       vcpu->arch.virtual_tsc_mult,
1464                                       vcpu->arch.virtual_tsc_shift);
1465         tsc += vcpu->arch.this_tsc_write;
1466         return tsc;
1467 }
1468
1469 static inline int gtod_is_based_on_tsc(int mode)
1470 {
1471         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1472 }
1473
1474 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1475 {
1476 #ifdef CONFIG_X86_64
1477         bool vcpus_matched;
1478         struct kvm_arch *ka = &vcpu->kvm->arch;
1479         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1480
1481         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1482                          atomic_read(&vcpu->kvm->online_vcpus));
1483
1484         /*
1485          * Once the masterclock is enabled, always perform request in
1486          * order to update it.
1487          *
1488          * In order to enable masterclock, the host clocksource must be TSC
1489          * and the vcpus need to have matched TSCs.  When that happens,
1490          * perform request to enable masterclock.
1491          */
1492         if (ka->use_master_clock ||
1493             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1494                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1495
1496         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1497                             atomic_read(&vcpu->kvm->online_vcpus),
1498                             ka->use_master_clock, gtod->clock.vclock_mode);
1499 #endif
1500 }
1501
1502 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1503 {
1504         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1505         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1506 }
1507
1508 /*
1509  * Multiply tsc by a fixed point number represented by ratio.
1510  *
1511  * The most significant 64-N bits (mult) of ratio represent the
1512  * integral part of the fixed point number; the remaining N bits
1513  * (frac) represent the fractional part, ie. ratio represents a fixed
1514  * point number (mult + frac * 2^(-N)).
1515  *
1516  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1517  */
1518 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1519 {
1520         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1521 }
1522
1523 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1524 {
1525         u64 _tsc = tsc;
1526         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1527
1528         if (ratio != kvm_default_tsc_scaling_ratio)
1529                 _tsc = __scale_tsc(ratio, tsc);
1530
1531         return _tsc;
1532 }
1533 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1534
1535 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1536 {
1537         u64 tsc;
1538
1539         tsc = kvm_scale_tsc(vcpu, rdtsc());
1540
1541         return target_tsc - tsc;
1542 }
1543
1544 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1545 {
1546         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1547
1548         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1549 }
1550 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1551
1552 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1553 {
1554         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1555         vcpu->arch.tsc_offset = offset;
1556 }
1557
1558 static inline bool kvm_check_tsc_unstable(void)
1559 {
1560 #ifdef CONFIG_X86_64
1561         /*
1562          * TSC is marked unstable when we're running on Hyper-V,
1563          * 'TSC page' clocksource is good.
1564          */
1565         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1566                 return false;
1567 #endif
1568         return check_tsc_unstable();
1569 }
1570
1571 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1572 {
1573         struct kvm *kvm = vcpu->kvm;
1574         u64 offset, ns, elapsed;
1575         unsigned long flags;
1576         bool matched;
1577         bool already_matched;
1578         u64 data = msr->data;
1579         bool synchronizing = false;
1580
1581         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1582         offset = kvm_compute_tsc_offset(vcpu, data);
1583         ns = ktime_get_boot_ns();
1584         elapsed = ns - kvm->arch.last_tsc_nsec;
1585
1586         if (vcpu->arch.virtual_tsc_khz) {
1587                 if (data == 0 && msr->host_initiated) {
1588                         /*
1589                          * detection of vcpu initialization -- need to sync
1590                          * with other vCPUs. This particularly helps to keep
1591                          * kvm_clock stable after CPU hotplug
1592                          */
1593                         synchronizing = true;
1594                 } else {
1595                         u64 tsc_exp = kvm->arch.last_tsc_write +
1596                                                 nsec_to_cycles(vcpu, elapsed);
1597                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1598                         /*
1599                          * Special case: TSC write with a small delta (1 second)
1600                          * of virtual cycle time against real time is
1601                          * interpreted as an attempt to synchronize the CPU.
1602                          */
1603                         synchronizing = data < tsc_exp + tsc_hz &&
1604                                         data + tsc_hz > tsc_exp;
1605                 }
1606         }
1607
1608         /*
1609          * For a reliable TSC, we can match TSC offsets, and for an unstable
1610          * TSC, we add elapsed time in this computation.  We could let the
1611          * compensation code attempt to catch up if we fall behind, but
1612          * it's better to try to match offsets from the beginning.
1613          */
1614         if (synchronizing &&
1615             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1616                 if (!kvm_check_tsc_unstable()) {
1617                         offset = kvm->arch.cur_tsc_offset;
1618                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1619                 } else {
1620                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1621                         data += delta;
1622                         offset = kvm_compute_tsc_offset(vcpu, data);
1623                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1624                 }
1625                 matched = true;
1626                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1627         } else {
1628                 /*
1629                  * We split periods of matched TSC writes into generations.
1630                  * For each generation, we track the original measured
1631                  * nanosecond time, offset, and write, so if TSCs are in
1632                  * sync, we can match exact offset, and if not, we can match
1633                  * exact software computation in compute_guest_tsc()
1634                  *
1635                  * These values are tracked in kvm->arch.cur_xxx variables.
1636                  */
1637                 kvm->arch.cur_tsc_generation++;
1638                 kvm->arch.cur_tsc_nsec = ns;
1639                 kvm->arch.cur_tsc_write = data;
1640                 kvm->arch.cur_tsc_offset = offset;
1641                 matched = false;
1642                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1643                          kvm->arch.cur_tsc_generation, data);
1644         }
1645
1646         /*
1647          * We also track th most recent recorded KHZ, write and time to
1648          * allow the matching interval to be extended at each write.
1649          */
1650         kvm->arch.last_tsc_nsec = ns;
1651         kvm->arch.last_tsc_write = data;
1652         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1653
1654         vcpu->arch.last_guest_tsc = data;
1655
1656         /* Keep track of which generation this VCPU has synchronized to */
1657         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1658         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1659         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1660
1661         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1662                 update_ia32_tsc_adjust_msr(vcpu, offset);
1663
1664         kvm_vcpu_write_tsc_offset(vcpu, offset);
1665         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1666
1667         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1668         if (!matched) {
1669                 kvm->arch.nr_vcpus_matched_tsc = 0;
1670         } else if (!already_matched) {
1671                 kvm->arch.nr_vcpus_matched_tsc++;
1672         }
1673
1674         kvm_track_tsc_matching(vcpu);
1675         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1676 }
1677
1678 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1679
1680 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1681                                            s64 adjustment)
1682 {
1683         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1684 }
1685
1686 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1687 {
1688         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1689                 WARN_ON(adjustment < 0);
1690         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1691         adjust_tsc_offset_guest(vcpu, adjustment);
1692 }
1693
1694 #ifdef CONFIG_X86_64
1695
1696 static u64 read_tsc(void)
1697 {
1698         u64 ret = (u64)rdtsc_ordered();
1699         u64 last = pvclock_gtod_data.clock.cycle_last;
1700
1701         if (likely(ret >= last))
1702                 return ret;
1703
1704         /*
1705          * GCC likes to generate cmov here, but this branch is extremely
1706          * predictable (it's just a function of time and the likely is
1707          * very likely) and there's a data dependence, so force GCC
1708          * to generate a branch instead.  I don't barrier() because
1709          * we don't actually need a barrier, and if this function
1710          * ever gets inlined it will generate worse code.
1711          */
1712         asm volatile ("");
1713         return last;
1714 }
1715
1716 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1717 {
1718         long v;
1719         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1720         u64 tsc_pg_val;
1721
1722         switch (gtod->clock.vclock_mode) {
1723         case VCLOCK_HVCLOCK:
1724                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1725                                                   tsc_timestamp);
1726                 if (tsc_pg_val != U64_MAX) {
1727                         /* TSC page valid */
1728                         *mode = VCLOCK_HVCLOCK;
1729                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1730                                 gtod->clock.mask;
1731                 } else {
1732                         /* TSC page invalid */
1733                         *mode = VCLOCK_NONE;
1734                 }
1735                 break;
1736         case VCLOCK_TSC:
1737                 *mode = VCLOCK_TSC;
1738                 *tsc_timestamp = read_tsc();
1739                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1740                         gtod->clock.mask;
1741                 break;
1742         default:
1743                 *mode = VCLOCK_NONE;
1744         }
1745
1746         if (*mode == VCLOCK_NONE)
1747                 *tsc_timestamp = v = 0;
1748
1749         return v * gtod->clock.mult;
1750 }
1751
1752 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1753 {
1754         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1755         unsigned long seq;
1756         int mode;
1757         u64 ns;
1758
1759         do {
1760                 seq = read_seqcount_begin(&gtod->seq);
1761                 ns = gtod->nsec_base;
1762                 ns += vgettsc(tsc_timestamp, &mode);
1763                 ns >>= gtod->clock.shift;
1764                 ns += gtod->boot_ns;
1765         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1766         *t = ns;
1767
1768         return mode;
1769 }
1770
1771 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1772 {
1773         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1774         unsigned long seq;
1775         int mode;
1776         u64 ns;
1777
1778         do {
1779                 seq = read_seqcount_begin(&gtod->seq);
1780                 ts->tv_sec = gtod->wall_time_sec;
1781                 ns = gtod->nsec_base;
1782                 ns += vgettsc(tsc_timestamp, &mode);
1783                 ns >>= gtod->clock.shift;
1784         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1785
1786         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1787         ts->tv_nsec = ns;
1788
1789         return mode;
1790 }
1791
1792 /* returns true if host is using TSC based clocksource */
1793 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1794 {
1795         /* checked again under seqlock below */
1796         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1797                 return false;
1798
1799         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1800                                                       tsc_timestamp));
1801 }
1802
1803 /* returns true if host is using TSC based clocksource */
1804 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1805                                            u64 *tsc_timestamp)
1806 {
1807         /* checked again under seqlock below */
1808         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1809                 return false;
1810
1811         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1812 }
1813 #endif
1814
1815 /*
1816  *
1817  * Assuming a stable TSC across physical CPUS, and a stable TSC
1818  * across virtual CPUs, the following condition is possible.
1819  * Each numbered line represents an event visible to both
1820  * CPUs at the next numbered event.
1821  *
1822  * "timespecX" represents host monotonic time. "tscX" represents
1823  * RDTSC value.
1824  *
1825  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1826  *
1827  * 1.  read timespec0,tsc0
1828  * 2.                                   | timespec1 = timespec0 + N
1829  *                                      | tsc1 = tsc0 + M
1830  * 3. transition to guest               | transition to guest
1831  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1832  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1833  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1834  *
1835  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1836  *
1837  *      - ret0 < ret1
1838  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1839  *              ...
1840  *      - 0 < N - M => M < N
1841  *
1842  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1843  * always the case (the difference between two distinct xtime instances
1844  * might be smaller then the difference between corresponding TSC reads,
1845  * when updating guest vcpus pvclock areas).
1846  *
1847  * To avoid that problem, do not allow visibility of distinct
1848  * system_timestamp/tsc_timestamp values simultaneously: use a master
1849  * copy of host monotonic time values. Update that master copy
1850  * in lockstep.
1851  *
1852  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1853  *
1854  */
1855
1856 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1857 {
1858 #ifdef CONFIG_X86_64
1859         struct kvm_arch *ka = &kvm->arch;
1860         int vclock_mode;
1861         bool host_tsc_clocksource, vcpus_matched;
1862
1863         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1864                         atomic_read(&kvm->online_vcpus));
1865
1866         /*
1867          * If the host uses TSC clock, then passthrough TSC as stable
1868          * to the guest.
1869          */
1870         host_tsc_clocksource = kvm_get_time_and_clockread(
1871                                         &ka->master_kernel_ns,
1872                                         &ka->master_cycle_now);
1873
1874         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1875                                 && !ka->backwards_tsc_observed
1876                                 && !ka->boot_vcpu_runs_old_kvmclock;
1877
1878         if (ka->use_master_clock)
1879                 atomic_set(&kvm_guest_has_master_clock, 1);
1880
1881         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1882         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1883                                         vcpus_matched);
1884 #endif
1885 }
1886
1887 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1888 {
1889         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1890 }
1891
1892 static void kvm_gen_update_masterclock(struct kvm *kvm)
1893 {
1894 #ifdef CONFIG_X86_64
1895         int i;
1896         struct kvm_vcpu *vcpu;
1897         struct kvm_arch *ka = &kvm->arch;
1898
1899         spin_lock(&ka->pvclock_gtod_sync_lock);
1900         kvm_make_mclock_inprogress_request(kvm);
1901         /* no guest entries from this point */
1902         pvclock_update_vm_gtod_copy(kvm);
1903
1904         kvm_for_each_vcpu(i, vcpu, kvm)
1905                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1906
1907         /* guest entries allowed */
1908         kvm_for_each_vcpu(i, vcpu, kvm)
1909                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1910
1911         spin_unlock(&ka->pvclock_gtod_sync_lock);
1912 #endif
1913 }
1914
1915 u64 get_kvmclock_ns(struct kvm *kvm)
1916 {
1917         struct kvm_arch *ka = &kvm->arch;
1918         struct pvclock_vcpu_time_info hv_clock;
1919         u64 ret;
1920
1921         spin_lock(&ka->pvclock_gtod_sync_lock);
1922         if (!ka->use_master_clock) {
1923                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1924                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1925         }
1926
1927         hv_clock.tsc_timestamp = ka->master_cycle_now;
1928         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1929         spin_unlock(&ka->pvclock_gtod_sync_lock);
1930
1931         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1932         get_cpu();
1933
1934         if (__this_cpu_read(cpu_tsc_khz)) {
1935                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1936                                    &hv_clock.tsc_shift,
1937                                    &hv_clock.tsc_to_system_mul);
1938                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1939         } else
1940                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1941
1942         put_cpu();
1943
1944         return ret;
1945 }
1946
1947 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1948 {
1949         struct kvm_vcpu_arch *vcpu = &v->arch;
1950         struct pvclock_vcpu_time_info guest_hv_clock;
1951
1952         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1953                 &guest_hv_clock, sizeof(guest_hv_clock))))
1954                 return;
1955
1956         /* This VCPU is paused, but it's legal for a guest to read another
1957          * VCPU's kvmclock, so we really have to follow the specification where
1958          * it says that version is odd if data is being modified, and even after
1959          * it is consistent.
1960          *
1961          * Version field updates must be kept separate.  This is because
1962          * kvm_write_guest_cached might use a "rep movs" instruction, and
1963          * writes within a string instruction are weakly ordered.  So there
1964          * are three writes overall.
1965          *
1966          * As a small optimization, only write the version field in the first
1967          * and third write.  The vcpu->pv_time cache is still valid, because the
1968          * version field is the first in the struct.
1969          */
1970         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1971
1972         if (guest_hv_clock.version & 1)
1973                 ++guest_hv_clock.version;  /* first time write, random junk */
1974
1975         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1976         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1977                                 &vcpu->hv_clock,
1978                                 sizeof(vcpu->hv_clock.version));
1979
1980         smp_wmb();
1981
1982         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1983         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1984
1985         if (vcpu->pvclock_set_guest_stopped_request) {
1986                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1987                 vcpu->pvclock_set_guest_stopped_request = false;
1988         }
1989
1990         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1991
1992         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1993                                 &vcpu->hv_clock,
1994                                 sizeof(vcpu->hv_clock));
1995
1996         smp_wmb();
1997
1998         vcpu->hv_clock.version++;
1999         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2000                                 &vcpu->hv_clock,
2001                                 sizeof(vcpu->hv_clock.version));
2002 }
2003
2004 static int kvm_guest_time_update(struct kvm_vcpu *v)
2005 {
2006         unsigned long flags, tgt_tsc_khz;
2007         struct kvm_vcpu_arch *vcpu = &v->arch;
2008         struct kvm_arch *ka = &v->kvm->arch;
2009         s64 kernel_ns;
2010         u64 tsc_timestamp, host_tsc;
2011         u8 pvclock_flags;
2012         bool use_master_clock;
2013
2014         kernel_ns = 0;
2015         host_tsc = 0;
2016
2017         /*
2018          * If the host uses TSC clock, then passthrough TSC as stable
2019          * to the guest.
2020          */
2021         spin_lock(&ka->pvclock_gtod_sync_lock);
2022         use_master_clock = ka->use_master_clock;
2023         if (use_master_clock) {
2024                 host_tsc = ka->master_cycle_now;
2025                 kernel_ns = ka->master_kernel_ns;
2026         }
2027         spin_unlock(&ka->pvclock_gtod_sync_lock);
2028
2029         /* Keep irq disabled to prevent changes to the clock */
2030         local_irq_save(flags);
2031         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2032         if (unlikely(tgt_tsc_khz == 0)) {
2033                 local_irq_restore(flags);
2034                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2035                 return 1;
2036         }
2037         if (!use_master_clock) {
2038                 host_tsc = rdtsc();
2039                 kernel_ns = ktime_get_boot_ns();
2040         }
2041
2042         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2043
2044         /*
2045          * We may have to catch up the TSC to match elapsed wall clock
2046          * time for two reasons, even if kvmclock is used.
2047          *   1) CPU could have been running below the maximum TSC rate
2048          *   2) Broken TSC compensation resets the base at each VCPU
2049          *      entry to avoid unknown leaps of TSC even when running
2050          *      again on the same CPU.  This may cause apparent elapsed
2051          *      time to disappear, and the guest to stand still or run
2052          *      very slowly.
2053          */
2054         if (vcpu->tsc_catchup) {
2055                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2056                 if (tsc > tsc_timestamp) {
2057                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2058                         tsc_timestamp = tsc;
2059                 }
2060         }
2061
2062         local_irq_restore(flags);
2063
2064         /* With all the info we got, fill in the values */
2065
2066         if (kvm_has_tsc_control)
2067                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2068
2069         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2070                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2071                                    &vcpu->hv_clock.tsc_shift,
2072                                    &vcpu->hv_clock.tsc_to_system_mul);
2073                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2074         }
2075
2076         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2077         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2078         vcpu->last_guest_tsc = tsc_timestamp;
2079
2080         /* If the host uses TSC clocksource, then it is stable */
2081         pvclock_flags = 0;
2082         if (use_master_clock)
2083                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2084
2085         vcpu->hv_clock.flags = pvclock_flags;
2086
2087         if (vcpu->pv_time_enabled)
2088                 kvm_setup_pvclock_page(v);
2089         if (v == kvm_get_vcpu(v->kvm, 0))
2090                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2091         return 0;
2092 }
2093
2094 /*
2095  * kvmclock updates which are isolated to a given vcpu, such as
2096  * vcpu->cpu migration, should not allow system_timestamp from
2097  * the rest of the vcpus to remain static. Otherwise ntp frequency
2098  * correction applies to one vcpu's system_timestamp but not
2099  * the others.
2100  *
2101  * So in those cases, request a kvmclock update for all vcpus.
2102  * We need to rate-limit these requests though, as they can
2103  * considerably slow guests that have a large number of vcpus.
2104  * The time for a remote vcpu to update its kvmclock is bound
2105  * by the delay we use to rate-limit the updates.
2106  */
2107
2108 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2109
2110 static void kvmclock_update_fn(struct work_struct *work)
2111 {
2112         int i;
2113         struct delayed_work *dwork = to_delayed_work(work);
2114         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2115                                            kvmclock_update_work);
2116         struct kvm *kvm = container_of(ka, struct kvm, arch);
2117         struct kvm_vcpu *vcpu;
2118
2119         kvm_for_each_vcpu(i, vcpu, kvm) {
2120                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2121                 kvm_vcpu_kick(vcpu);
2122         }
2123 }
2124
2125 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2126 {
2127         struct kvm *kvm = v->kvm;
2128
2129         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2130         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2131                                         KVMCLOCK_UPDATE_DELAY);
2132 }
2133
2134 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2135
2136 static void kvmclock_sync_fn(struct work_struct *work)
2137 {
2138         struct delayed_work *dwork = to_delayed_work(work);
2139         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2140                                            kvmclock_sync_work);
2141         struct kvm *kvm = container_of(ka, struct kvm, arch);
2142
2143         if (!kvmclock_periodic_sync)
2144                 return;
2145
2146         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2147         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2148                                         KVMCLOCK_SYNC_PERIOD);
2149 }
2150
2151 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2152 {
2153         u64 mcg_cap = vcpu->arch.mcg_cap;
2154         unsigned bank_num = mcg_cap & 0xff;
2155         u32 msr = msr_info->index;
2156         u64 data = msr_info->data;
2157
2158         switch (msr) {
2159         case MSR_IA32_MCG_STATUS:
2160                 vcpu->arch.mcg_status = data;
2161                 break;
2162         case MSR_IA32_MCG_CTL:
2163                 if (!(mcg_cap & MCG_CTL_P))
2164                         return 1;
2165                 if (data != 0 && data != ~(u64)0)
2166                         return -1;
2167                 vcpu->arch.mcg_ctl = data;
2168                 break;
2169         default:
2170                 if (msr >= MSR_IA32_MC0_CTL &&
2171                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2172                         u32 offset = msr - MSR_IA32_MC0_CTL;
2173                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2174                          * some Linux kernels though clear bit 10 in bank 4 to
2175                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2176                          * this to avoid an uncatched #GP in the guest
2177                          */
2178                         if ((offset & 0x3) == 0 &&
2179                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2180                                 return -1;
2181                         if (!msr_info->host_initiated &&
2182                                 (offset & 0x3) == 1 && data != 0)
2183                                 return -1;
2184                         vcpu->arch.mce_banks[offset] = data;
2185                         break;
2186                 }
2187                 return 1;
2188         }
2189         return 0;
2190 }
2191
2192 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2193 {
2194         struct kvm *kvm = vcpu->kvm;
2195         int lm = is_long_mode(vcpu);
2196         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2197                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2198         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2199                 : kvm->arch.xen_hvm_config.blob_size_32;
2200         u32 page_num = data & ~PAGE_MASK;
2201         u64 page_addr = data & PAGE_MASK;
2202         u8 *page;
2203         int r;
2204
2205         r = -E2BIG;
2206         if (page_num >= blob_size)
2207                 goto out;
2208         r = -ENOMEM;
2209         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2210         if (IS_ERR(page)) {
2211                 r = PTR_ERR(page);
2212                 goto out;
2213         }
2214         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2215                 goto out_free;
2216         r = 0;
2217 out_free:
2218         kfree(page);
2219 out:
2220         return r;
2221 }
2222
2223 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2224 {
2225         gpa_t gpa = data & ~0x3f;
2226
2227         /* Bits 3:5 are reserved, Should be zero */
2228         if (data & 0x38)
2229                 return 1;
2230
2231         vcpu->arch.apf.msr_val = data;
2232
2233         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2234                 kvm_clear_async_pf_completion_queue(vcpu);
2235                 kvm_async_pf_hash_reset(vcpu);
2236                 return 0;
2237         }
2238
2239         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2240                                         sizeof(u32)))
2241                 return 1;
2242
2243         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2244         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2245         kvm_async_pf_wakeup_all(vcpu);
2246         return 0;
2247 }
2248
2249 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2250 {
2251         vcpu->arch.pv_time_enabled = false;
2252 }
2253
2254 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2255 {
2256         ++vcpu->stat.tlb_flush;
2257         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2258 }
2259
2260 static void record_steal_time(struct kvm_vcpu *vcpu)
2261 {
2262         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2263                 return;
2264
2265         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2266                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2267                 return;
2268
2269         /*
2270          * Doing a TLB flush here, on the guest's behalf, can avoid
2271          * expensive IPIs.
2272          */
2273         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2274                 kvm_vcpu_flush_tlb(vcpu, false);
2275
2276         if (vcpu->arch.st.steal.version & 1)
2277                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2278
2279         vcpu->arch.st.steal.version += 1;
2280
2281         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2282                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2283
2284         smp_wmb();
2285
2286         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2287                 vcpu->arch.st.last_steal;
2288         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2289
2290         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2291                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2292
2293         smp_wmb();
2294
2295         vcpu->arch.st.steal.version += 1;
2296
2297         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2298                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2299 }
2300
2301 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2302 {
2303         bool pr = false;
2304         u32 msr = msr_info->index;
2305         u64 data = msr_info->data;
2306
2307         switch (msr) {
2308         case MSR_AMD64_NB_CFG:
2309         case MSR_IA32_UCODE_WRITE:
2310         case MSR_VM_HSAVE_PA:
2311         case MSR_AMD64_PATCH_LOADER:
2312         case MSR_AMD64_BU_CFG2:
2313         case MSR_AMD64_DC_CFG:
2314                 break;
2315
2316         case MSR_IA32_UCODE_REV:
2317                 if (msr_info->host_initiated)
2318                         vcpu->arch.microcode_version = data;
2319                 break;
2320         case MSR_EFER:
2321                 return set_efer(vcpu, data);
2322         case MSR_K7_HWCR:
2323                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2324                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2325                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2326                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2327                 if (data != 0) {
2328                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2329                                     data);
2330                         return 1;
2331                 }
2332                 break;
2333         case MSR_FAM10H_MMIO_CONF_BASE:
2334                 if (data != 0) {
2335                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2336                                     "0x%llx\n", data);
2337                         return 1;
2338                 }
2339                 break;
2340         case MSR_IA32_DEBUGCTLMSR:
2341                 if (!data) {
2342                         /* We support the non-activated case already */
2343                         break;
2344                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2345                         /* Values other than LBR and BTF are vendor-specific,
2346                            thus reserved and should throw a #GP */
2347                         return 1;
2348                 }
2349                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2350                             __func__, data);
2351                 break;
2352         case 0x200 ... 0x2ff:
2353                 return kvm_mtrr_set_msr(vcpu, msr, data);
2354         case MSR_IA32_APICBASE:
2355                 return kvm_set_apic_base(vcpu, msr_info);
2356         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2357                 return kvm_x2apic_msr_write(vcpu, msr, data);
2358         case MSR_IA32_TSCDEADLINE:
2359                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2360                 break;
2361         case MSR_IA32_TSC_ADJUST:
2362                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2363                         if (!msr_info->host_initiated) {
2364                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2365                                 adjust_tsc_offset_guest(vcpu, adj);
2366                         }
2367                         vcpu->arch.ia32_tsc_adjust_msr = data;
2368                 }
2369                 break;
2370         case MSR_IA32_MISC_ENABLE:
2371                 vcpu->arch.ia32_misc_enable_msr = data;
2372                 break;
2373         case MSR_IA32_SMBASE:
2374                 if (!msr_info->host_initiated)
2375                         return 1;
2376                 vcpu->arch.smbase = data;
2377                 break;
2378         case MSR_IA32_TSC:
2379                 kvm_write_tsc(vcpu, msr_info);
2380                 break;
2381         case MSR_SMI_COUNT:
2382                 if (!msr_info->host_initiated)
2383                         return 1;
2384                 vcpu->arch.smi_count = data;
2385                 break;
2386         case MSR_KVM_WALL_CLOCK_NEW:
2387         case MSR_KVM_WALL_CLOCK:
2388                 vcpu->kvm->arch.wall_clock = data;
2389                 kvm_write_wall_clock(vcpu->kvm, data);
2390                 break;
2391         case MSR_KVM_SYSTEM_TIME_NEW:
2392         case MSR_KVM_SYSTEM_TIME: {
2393                 struct kvm_arch *ka = &vcpu->kvm->arch;
2394
2395                 kvmclock_reset(vcpu);
2396
2397                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2398                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2399
2400                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2401                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2402
2403                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2404                 }
2405
2406                 vcpu->arch.time = data;
2407                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2408
2409                 /* we verify if the enable bit is set... */
2410                 if (!(data & 1))
2411                         break;
2412
2413                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2414                      &vcpu->arch.pv_time, data & ~1ULL,
2415                      sizeof(struct pvclock_vcpu_time_info)))
2416                         vcpu->arch.pv_time_enabled = false;
2417                 else
2418                         vcpu->arch.pv_time_enabled = true;
2419
2420                 break;
2421         }
2422         case MSR_KVM_ASYNC_PF_EN:
2423                 if (kvm_pv_enable_async_pf(vcpu, data))
2424                         return 1;
2425                 break;
2426         case MSR_KVM_STEAL_TIME:
2427
2428                 if (unlikely(!sched_info_on()))
2429                         return 1;
2430
2431                 if (data & KVM_STEAL_RESERVED_MASK)
2432                         return 1;
2433
2434                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2435                                                 data & KVM_STEAL_VALID_BITS,
2436                                                 sizeof(struct kvm_steal_time)))
2437                         return 1;
2438
2439                 vcpu->arch.st.msr_val = data;
2440
2441                 if (!(data & KVM_MSR_ENABLED))
2442                         break;
2443
2444                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2445
2446                 break;
2447         case MSR_KVM_PV_EOI_EN:
2448                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2449                         return 1;
2450                 break;
2451
2452         case MSR_IA32_MCG_CTL:
2453         case MSR_IA32_MCG_STATUS:
2454         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2455                 return set_msr_mce(vcpu, msr_info);
2456
2457         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2458         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2459                 pr = true; /* fall through */
2460         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2461         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2462                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2463                         return kvm_pmu_set_msr(vcpu, msr_info);
2464
2465                 if (pr || data != 0)
2466                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2467                                     "0x%x data 0x%llx\n", msr, data);
2468                 break;
2469         case MSR_K7_CLK_CTL:
2470                 /*
2471                  * Ignore all writes to this no longer documented MSR.
2472                  * Writes are only relevant for old K7 processors,
2473                  * all pre-dating SVM, but a recommended workaround from
2474                  * AMD for these chips. It is possible to specify the
2475                  * affected processor models on the command line, hence
2476                  * the need to ignore the workaround.
2477                  */
2478                 break;
2479         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2480         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2481         case HV_X64_MSR_CRASH_CTL:
2482         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2483         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2484         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2485         case HV_X64_MSR_TSC_EMULATION_STATUS:
2486                 return kvm_hv_set_msr_common(vcpu, msr, data,
2487                                              msr_info->host_initiated);
2488         case MSR_IA32_BBL_CR_CTL3:
2489                 /* Drop writes to this legacy MSR -- see rdmsr
2490                  * counterpart for further detail.
2491                  */
2492                 if (report_ignored_msrs)
2493                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2494                                 msr, data);
2495                 break;
2496         case MSR_AMD64_OSVW_ID_LENGTH:
2497                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2498                         return 1;
2499                 vcpu->arch.osvw.length = data;
2500                 break;
2501         case MSR_AMD64_OSVW_STATUS:
2502                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2503                         return 1;
2504                 vcpu->arch.osvw.status = data;
2505                 break;
2506         case MSR_PLATFORM_INFO:
2507                 if (!msr_info->host_initiated ||
2508                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2509                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2510                      cpuid_fault_enabled(vcpu)))
2511                         return 1;
2512                 vcpu->arch.msr_platform_info = data;
2513                 break;
2514         case MSR_MISC_FEATURES_ENABLES:
2515                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2516                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2517                      !supports_cpuid_fault(vcpu)))
2518                         return 1;
2519                 vcpu->arch.msr_misc_features_enables = data;
2520                 break;
2521         default:
2522                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2523                         return xen_hvm_config(vcpu, data);
2524                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2525                         return kvm_pmu_set_msr(vcpu, msr_info);
2526                 if (!ignore_msrs) {
2527                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2528                                     msr, data);
2529                         return 1;
2530                 } else {
2531                         if (report_ignored_msrs)
2532                                 vcpu_unimpl(vcpu,
2533                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2534                                         msr, data);
2535                         break;
2536                 }
2537         }
2538         return 0;
2539 }
2540 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2541
2542
2543 /*
2544  * Reads an msr value (of 'msr_index') into 'pdata'.
2545  * Returns 0 on success, non-0 otherwise.
2546  * Assumes vcpu_load() was already called.
2547  */
2548 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2549 {
2550         return kvm_x86_ops->get_msr(vcpu, msr);
2551 }
2552 EXPORT_SYMBOL_GPL(kvm_get_msr);
2553
2554 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2555 {
2556         u64 data;
2557         u64 mcg_cap = vcpu->arch.mcg_cap;
2558         unsigned bank_num = mcg_cap & 0xff;
2559
2560         switch (msr) {
2561         case MSR_IA32_P5_MC_ADDR:
2562         case MSR_IA32_P5_MC_TYPE:
2563                 data = 0;
2564                 break;
2565         case MSR_IA32_MCG_CAP:
2566                 data = vcpu->arch.mcg_cap;
2567                 break;
2568         case MSR_IA32_MCG_CTL:
2569                 if (!(mcg_cap & MCG_CTL_P))
2570                         return 1;
2571                 data = vcpu->arch.mcg_ctl;
2572                 break;
2573         case MSR_IA32_MCG_STATUS:
2574                 data = vcpu->arch.mcg_status;
2575                 break;
2576         default:
2577                 if (msr >= MSR_IA32_MC0_CTL &&
2578                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2579                         u32 offset = msr - MSR_IA32_MC0_CTL;
2580                         data = vcpu->arch.mce_banks[offset];
2581                         break;
2582                 }
2583                 return 1;
2584         }
2585         *pdata = data;
2586         return 0;
2587 }
2588
2589 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2590 {
2591         switch (msr_info->index) {
2592         case MSR_IA32_PLATFORM_ID:
2593         case MSR_IA32_EBL_CR_POWERON:
2594         case MSR_IA32_DEBUGCTLMSR:
2595         case MSR_IA32_LASTBRANCHFROMIP:
2596         case MSR_IA32_LASTBRANCHTOIP:
2597         case MSR_IA32_LASTINTFROMIP:
2598         case MSR_IA32_LASTINTTOIP:
2599         case MSR_K8_SYSCFG:
2600         case MSR_K8_TSEG_ADDR:
2601         case MSR_K8_TSEG_MASK:
2602         case MSR_K7_HWCR:
2603         case MSR_VM_HSAVE_PA:
2604         case MSR_K8_INT_PENDING_MSG:
2605         case MSR_AMD64_NB_CFG:
2606         case MSR_FAM10H_MMIO_CONF_BASE:
2607         case MSR_AMD64_BU_CFG2:
2608         case MSR_IA32_PERF_CTL:
2609         case MSR_AMD64_DC_CFG:
2610                 msr_info->data = 0;
2611                 break;
2612         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2613         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2614         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2615         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2616         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2617                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2618                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2619                 msr_info->data = 0;
2620                 break;
2621         case MSR_IA32_UCODE_REV:
2622                 msr_info->data = vcpu->arch.microcode_version;
2623                 break;
2624         case MSR_IA32_TSC:
2625                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2626                 break;
2627         case MSR_MTRRcap:
2628         case 0x200 ... 0x2ff:
2629                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2630         case 0xcd: /* fsb frequency */
2631                 msr_info->data = 3;
2632                 break;
2633                 /*
2634                  * MSR_EBC_FREQUENCY_ID
2635                  * Conservative value valid for even the basic CPU models.
2636                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2637                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2638                  * and 266MHz for model 3, or 4. Set Core Clock
2639                  * Frequency to System Bus Frequency Ratio to 1 (bits
2640                  * 31:24) even though these are only valid for CPU
2641                  * models > 2, however guests may end up dividing or
2642                  * multiplying by zero otherwise.
2643                  */
2644         case MSR_EBC_FREQUENCY_ID:
2645                 msr_info->data = 1 << 24;
2646                 break;
2647         case MSR_IA32_APICBASE:
2648                 msr_info->data = kvm_get_apic_base(vcpu);
2649                 break;
2650         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2651                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2652                 break;
2653         case MSR_IA32_TSCDEADLINE:
2654                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2655                 break;
2656         case MSR_IA32_TSC_ADJUST:
2657                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2658                 break;
2659         case MSR_IA32_MISC_ENABLE:
2660                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2661                 break;
2662         case MSR_IA32_SMBASE:
2663                 if (!msr_info->host_initiated)
2664                         return 1;
2665                 msr_info->data = vcpu->arch.smbase;
2666                 break;
2667         case MSR_SMI_COUNT:
2668                 msr_info->data = vcpu->arch.smi_count;
2669                 break;
2670         case MSR_IA32_PERF_STATUS:
2671                 /* TSC increment by tick */
2672                 msr_info->data = 1000ULL;
2673                 /* CPU multiplier */
2674                 msr_info->data |= (((uint64_t)4ULL) << 40);
2675                 break;
2676         case MSR_EFER:
2677                 msr_info->data = vcpu->arch.efer;
2678                 break;
2679         case MSR_KVM_WALL_CLOCK:
2680         case MSR_KVM_WALL_CLOCK_NEW:
2681                 msr_info->data = vcpu->kvm->arch.wall_clock;
2682                 break;
2683         case MSR_KVM_SYSTEM_TIME:
2684         case MSR_KVM_SYSTEM_TIME_NEW:
2685                 msr_info->data = vcpu->arch.time;
2686                 break;
2687         case MSR_KVM_ASYNC_PF_EN:
2688                 msr_info->data = vcpu->arch.apf.msr_val;
2689                 break;
2690         case MSR_KVM_STEAL_TIME:
2691                 msr_info->data = vcpu->arch.st.msr_val;
2692                 break;
2693         case MSR_KVM_PV_EOI_EN:
2694                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2695                 break;
2696         case MSR_IA32_P5_MC_ADDR:
2697         case MSR_IA32_P5_MC_TYPE:
2698         case MSR_IA32_MCG_CAP:
2699         case MSR_IA32_MCG_CTL:
2700         case MSR_IA32_MCG_STATUS:
2701         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2702                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2703         case MSR_K7_CLK_CTL:
2704                 /*
2705                  * Provide expected ramp-up count for K7. All other
2706                  * are set to zero, indicating minimum divisors for
2707                  * every field.
2708                  *
2709                  * This prevents guest kernels on AMD host with CPU
2710                  * type 6, model 8 and higher from exploding due to
2711                  * the rdmsr failing.
2712                  */
2713                 msr_info->data = 0x20000000;
2714                 break;
2715         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2716         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2717         case HV_X64_MSR_CRASH_CTL:
2718         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2719         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2720         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2721         case HV_X64_MSR_TSC_EMULATION_STATUS:
2722                 return kvm_hv_get_msr_common(vcpu,
2723                                              msr_info->index, &msr_info->data);
2724                 break;
2725         case MSR_IA32_BBL_CR_CTL3:
2726                 /* This legacy MSR exists but isn't fully documented in current
2727                  * silicon.  It is however accessed by winxp in very narrow
2728                  * scenarios where it sets bit #19, itself documented as
2729                  * a "reserved" bit.  Best effort attempt to source coherent
2730                  * read data here should the balance of the register be
2731                  * interpreted by the guest:
2732                  *
2733                  * L2 cache control register 3: 64GB range, 256KB size,
2734                  * enabled, latency 0x1, configured
2735                  */
2736                 msr_info->data = 0xbe702111;
2737                 break;
2738         case MSR_AMD64_OSVW_ID_LENGTH:
2739                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2740                         return 1;
2741                 msr_info->data = vcpu->arch.osvw.length;
2742                 break;
2743         case MSR_AMD64_OSVW_STATUS:
2744                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2745                         return 1;
2746                 msr_info->data = vcpu->arch.osvw.status;
2747                 break;
2748         case MSR_PLATFORM_INFO:
2749                 msr_info->data = vcpu->arch.msr_platform_info;
2750                 break;
2751         case MSR_MISC_FEATURES_ENABLES:
2752                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2753                 break;
2754         default:
2755                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2756                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2757                 if (!ignore_msrs) {
2758                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2759                                                msr_info->index);
2760                         return 1;
2761                 } else {
2762                         if (report_ignored_msrs)
2763                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2764                                         msr_info->index);
2765                         msr_info->data = 0;
2766                 }
2767                 break;
2768         }
2769         return 0;
2770 }
2771 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2772
2773 /*
2774  * Read or write a bunch of msrs. All parameters are kernel addresses.
2775  *
2776  * @return number of msrs set successfully.
2777  */
2778 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2779                     struct kvm_msr_entry *entries,
2780                     int (*do_msr)(struct kvm_vcpu *vcpu,
2781                                   unsigned index, u64 *data))
2782 {
2783         int i;
2784
2785         for (i = 0; i < msrs->nmsrs; ++i)
2786                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2787                         break;
2788
2789         return i;
2790 }
2791
2792 /*
2793  * Read or write a bunch of msrs. Parameters are user addresses.
2794  *
2795  * @return number of msrs set successfully.
2796  */
2797 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2798                   int (*do_msr)(struct kvm_vcpu *vcpu,
2799                                 unsigned index, u64 *data),
2800                   int writeback)
2801 {
2802         struct kvm_msrs msrs;
2803         struct kvm_msr_entry *entries;
2804         int r, n;
2805         unsigned size;
2806
2807         r = -EFAULT;
2808         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2809                 goto out;
2810
2811         r = -E2BIG;
2812         if (msrs.nmsrs >= MAX_IO_MSRS)
2813                 goto out;
2814
2815         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2816         entries = memdup_user(user_msrs->entries, size);
2817         if (IS_ERR(entries)) {
2818                 r = PTR_ERR(entries);
2819                 goto out;
2820         }
2821
2822         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2823         if (r < 0)
2824                 goto out_free;
2825
2826         r = -EFAULT;
2827         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2828                 goto out_free;
2829
2830         r = n;
2831
2832 out_free:
2833         kfree(entries);
2834 out:
2835         return r;
2836 }
2837
2838 static inline bool kvm_can_mwait_in_guest(void)
2839 {
2840         return boot_cpu_has(X86_FEATURE_MWAIT) &&
2841                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
2842                 boot_cpu_has(X86_FEATURE_ARAT);
2843 }
2844
2845 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2846 {
2847         int r = 0;
2848
2849         switch (ext) {
2850         case KVM_CAP_IRQCHIP:
2851         case KVM_CAP_HLT:
2852         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2853         case KVM_CAP_SET_TSS_ADDR:
2854         case KVM_CAP_EXT_CPUID:
2855         case KVM_CAP_EXT_EMUL_CPUID:
2856         case KVM_CAP_CLOCKSOURCE:
2857         case KVM_CAP_PIT:
2858         case KVM_CAP_NOP_IO_DELAY:
2859         case KVM_CAP_MP_STATE:
2860         case KVM_CAP_SYNC_MMU:
2861         case KVM_CAP_USER_NMI:
2862         case KVM_CAP_REINJECT_CONTROL:
2863         case KVM_CAP_IRQ_INJECT_STATUS:
2864         case KVM_CAP_IOEVENTFD:
2865         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2866         case KVM_CAP_PIT2:
2867         case KVM_CAP_PIT_STATE2:
2868         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2869         case KVM_CAP_XEN_HVM:
2870         case KVM_CAP_VCPU_EVENTS:
2871         case KVM_CAP_HYPERV:
2872         case KVM_CAP_HYPERV_VAPIC:
2873         case KVM_CAP_HYPERV_SPIN:
2874         case KVM_CAP_HYPERV_SYNIC:
2875         case KVM_CAP_HYPERV_SYNIC2:
2876         case KVM_CAP_HYPERV_VP_INDEX:
2877         case KVM_CAP_HYPERV_EVENTFD:
2878         case KVM_CAP_HYPERV_TLBFLUSH:
2879         case KVM_CAP_PCI_SEGMENT:
2880         case KVM_CAP_DEBUGREGS:
2881         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2882         case KVM_CAP_XSAVE:
2883         case KVM_CAP_ASYNC_PF:
2884         case KVM_CAP_GET_TSC_KHZ:
2885         case KVM_CAP_KVMCLOCK_CTRL:
2886         case KVM_CAP_READONLY_MEM:
2887         case KVM_CAP_HYPERV_TIME:
2888         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2889         case KVM_CAP_TSC_DEADLINE_TIMER:
2890         case KVM_CAP_ENABLE_CAP_VM:
2891         case KVM_CAP_DISABLE_QUIRKS:
2892         case KVM_CAP_SET_BOOT_CPU_ID:
2893         case KVM_CAP_SPLIT_IRQCHIP:
2894         case KVM_CAP_IMMEDIATE_EXIT:
2895         case KVM_CAP_GET_MSR_FEATURES:
2896                 r = 1;
2897                 break;
2898         case KVM_CAP_SYNC_REGS:
2899                 r = KVM_SYNC_X86_VALID_FIELDS;
2900                 break;
2901         case KVM_CAP_ADJUST_CLOCK:
2902                 r = KVM_CLOCK_TSC_STABLE;
2903                 break;
2904         case KVM_CAP_X86_DISABLE_EXITS:
2905                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE;
2906                 if(kvm_can_mwait_in_guest())
2907                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
2908                 break;
2909         case KVM_CAP_X86_SMM:
2910                 /* SMBASE is usually relocated above 1M on modern chipsets,
2911                  * and SMM handlers might indeed rely on 4G segment limits,
2912                  * so do not report SMM to be available if real mode is
2913                  * emulated via vm86 mode.  Still, do not go to great lengths
2914                  * to avoid userspace's usage of the feature, because it is a
2915                  * fringe case that is not enabled except via specific settings
2916                  * of the module parameters.
2917                  */
2918                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
2919                 break;
2920         case KVM_CAP_VAPIC:
2921                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2922                 break;
2923         case KVM_CAP_NR_VCPUS:
2924                 r = KVM_SOFT_MAX_VCPUS;
2925                 break;
2926         case KVM_CAP_MAX_VCPUS:
2927                 r = KVM_MAX_VCPUS;
2928                 break;
2929         case KVM_CAP_NR_MEMSLOTS:
2930                 r = KVM_USER_MEM_SLOTS;
2931                 break;
2932         case KVM_CAP_PV_MMU:    /* obsolete */
2933                 r = 0;
2934                 break;
2935         case KVM_CAP_MCE:
2936                 r = KVM_MAX_MCE_BANKS;
2937                 break;
2938         case KVM_CAP_XCRS:
2939                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2940                 break;
2941         case KVM_CAP_TSC_CONTROL:
2942                 r = kvm_has_tsc_control;
2943                 break;
2944         case KVM_CAP_X2APIC_API:
2945                 r = KVM_X2APIC_API_VALID_FLAGS;
2946                 break;
2947         default:
2948                 break;
2949         }
2950         return r;
2951
2952 }
2953
2954 long kvm_arch_dev_ioctl(struct file *filp,
2955                         unsigned int ioctl, unsigned long arg)
2956 {
2957         void __user *argp = (void __user *)arg;
2958         long r;
2959
2960         switch (ioctl) {
2961         case KVM_GET_MSR_INDEX_LIST: {
2962                 struct kvm_msr_list __user *user_msr_list = argp;
2963                 struct kvm_msr_list msr_list;
2964                 unsigned n;
2965
2966                 r = -EFAULT;
2967                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2968                         goto out;
2969                 n = msr_list.nmsrs;
2970                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2971                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2972                         goto out;
2973                 r = -E2BIG;
2974                 if (n < msr_list.nmsrs)
2975                         goto out;
2976                 r = -EFAULT;
2977                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2978                                  num_msrs_to_save * sizeof(u32)))
2979                         goto out;
2980                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2981                                  &emulated_msrs,
2982                                  num_emulated_msrs * sizeof(u32)))
2983                         goto out;
2984                 r = 0;
2985                 break;
2986         }
2987         case KVM_GET_SUPPORTED_CPUID:
2988         case KVM_GET_EMULATED_CPUID: {
2989                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2990                 struct kvm_cpuid2 cpuid;
2991
2992                 r = -EFAULT;
2993                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2994                         goto out;
2995
2996                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2997                                             ioctl);
2998                 if (r)
2999                         goto out;
3000
3001                 r = -EFAULT;
3002                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3003                         goto out;
3004                 r = 0;
3005                 break;
3006         }
3007         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3008                 r = -EFAULT;
3009                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3010                                  sizeof(kvm_mce_cap_supported)))
3011                         goto out;
3012                 r = 0;
3013                 break;
3014         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3015                 struct kvm_msr_list __user *user_msr_list = argp;
3016                 struct kvm_msr_list msr_list;
3017                 unsigned int n;
3018
3019                 r = -EFAULT;
3020                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3021                         goto out;
3022                 n = msr_list.nmsrs;
3023                 msr_list.nmsrs = num_msr_based_features;
3024                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3025                         goto out;
3026                 r = -E2BIG;
3027                 if (n < msr_list.nmsrs)
3028                         goto out;
3029                 r = -EFAULT;
3030                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3031                                  num_msr_based_features * sizeof(u32)))
3032                         goto out;
3033                 r = 0;
3034                 break;
3035         }
3036         case KVM_GET_MSRS:
3037                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3038                 break;
3039         }
3040         default:
3041                 r = -EINVAL;
3042         }
3043 out:
3044         return r;
3045 }
3046
3047 static void wbinvd_ipi(void *garbage)
3048 {
3049         wbinvd();
3050 }
3051
3052 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3053 {
3054         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3055 }
3056
3057 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3058 {
3059         /* Address WBINVD may be executed by guest */
3060         if (need_emulate_wbinvd(vcpu)) {
3061                 if (kvm_x86_ops->has_wbinvd_exit())
3062                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3063                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3064                         smp_call_function_single(vcpu->cpu,
3065                                         wbinvd_ipi, NULL, 1);
3066         }
3067
3068         kvm_x86_ops->vcpu_load(vcpu, cpu);
3069
3070         /* Apply any externally detected TSC adjustments (due to suspend) */
3071         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3072                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3073                 vcpu->arch.tsc_offset_adjustment = 0;
3074                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3075         }
3076
3077         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3078                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3079                                 rdtsc() - vcpu->arch.last_host_tsc;
3080                 if (tsc_delta < 0)
3081                         mark_tsc_unstable("KVM discovered backwards TSC");
3082
3083                 if (kvm_check_tsc_unstable()) {
3084                         u64 offset = kvm_compute_tsc_offset(vcpu,
3085                                                 vcpu->arch.last_guest_tsc);
3086                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3087                         vcpu->arch.tsc_catchup = 1;
3088                 }
3089
3090                 if (kvm_lapic_hv_timer_in_use(vcpu))
3091                         kvm_lapic_restart_hv_timer(vcpu);
3092
3093                 /*
3094                  * On a host with synchronized TSC, there is no need to update
3095                  * kvmclock on vcpu->cpu migration
3096                  */
3097                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3098                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3099                 if (vcpu->cpu != cpu)
3100                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3101                 vcpu->cpu = cpu;
3102         }
3103
3104         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3105 }
3106
3107 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3108 {
3109         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3110                 return;
3111
3112         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3113
3114         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3115                         &vcpu->arch.st.steal.preempted,
3116                         offsetof(struct kvm_steal_time, preempted),
3117                         sizeof(vcpu->arch.st.steal.preempted));
3118 }
3119
3120 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3121 {
3122         int idx;
3123
3124         if (vcpu->preempted)
3125                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3126
3127         /*
3128          * Disable page faults because we're in atomic context here.
3129          * kvm_write_guest_offset_cached() would call might_fault()
3130          * that relies on pagefault_disable() to tell if there's a
3131          * bug. NOTE: the write to guest memory may not go through if
3132          * during postcopy live migration or if there's heavy guest
3133          * paging.
3134          */
3135         pagefault_disable();
3136         /*
3137          * kvm_memslots() will be called by
3138          * kvm_write_guest_offset_cached() so take the srcu lock.
3139          */
3140         idx = srcu_read_lock(&vcpu->kvm->srcu);
3141         kvm_steal_time_set_preempted(vcpu);
3142         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3143         pagefault_enable();
3144         kvm_x86_ops->vcpu_put(vcpu);
3145         vcpu->arch.last_host_tsc = rdtsc();
3146         /*
3147          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3148          * on every vmexit, but if not, we might have a stale dr6 from the
3149          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3150          */
3151         set_debugreg(0, 6);
3152 }
3153
3154 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3155                                     struct kvm_lapic_state *s)
3156 {
3157         if (vcpu->arch.apicv_active)
3158                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3159
3160         return kvm_apic_get_state(vcpu, s);
3161 }
3162
3163 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3164                                     struct kvm_lapic_state *s)
3165 {
3166         int r;
3167
3168         r = kvm_apic_set_state(vcpu, s);
3169         if (r)
3170                 return r;
3171         update_cr8_intercept(vcpu);
3172
3173         return 0;
3174 }
3175
3176 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3177 {
3178         return (!lapic_in_kernel(vcpu) ||
3179                 kvm_apic_accept_pic_intr(vcpu));
3180 }
3181
3182 /*
3183  * if userspace requested an interrupt window, check that the
3184  * interrupt window is open.
3185  *
3186  * No need to exit to userspace if we already have an interrupt queued.
3187  */
3188 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3189 {
3190         return kvm_arch_interrupt_allowed(vcpu) &&
3191                 !kvm_cpu_has_interrupt(vcpu) &&
3192                 !kvm_event_needs_reinjection(vcpu) &&
3193                 kvm_cpu_accept_dm_intr(vcpu);
3194 }
3195
3196 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3197                                     struct kvm_interrupt *irq)
3198 {
3199         if (irq->irq >= KVM_NR_INTERRUPTS)
3200                 return -EINVAL;
3201
3202         if (!irqchip_in_kernel(vcpu->kvm)) {
3203                 kvm_queue_interrupt(vcpu, irq->irq, false);
3204                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3205                 return 0;
3206         }
3207
3208         /*
3209          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3210          * fail for in-kernel 8259.
3211          */
3212         if (pic_in_kernel(vcpu->kvm))
3213                 return -ENXIO;
3214
3215         if (vcpu->arch.pending_external_vector != -1)
3216                 return -EEXIST;
3217
3218         vcpu->arch.pending_external_vector = irq->irq;
3219         kvm_make_request(KVM_REQ_EVENT, vcpu);
3220         return 0;
3221 }
3222
3223 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3224 {
3225         kvm_inject_nmi(vcpu);
3226
3227         return 0;
3228 }
3229
3230 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3231 {
3232         kvm_make_request(KVM_REQ_SMI, vcpu);
3233
3234         return 0;
3235 }
3236
3237 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3238                                            struct kvm_tpr_access_ctl *tac)
3239 {
3240         if (tac->flags)
3241                 return -EINVAL;
3242         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3243         return 0;
3244 }
3245
3246 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3247                                         u64 mcg_cap)
3248 {
3249         int r;
3250         unsigned bank_num = mcg_cap & 0xff, bank;
3251
3252         r = -EINVAL;
3253         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3254                 goto out;
3255         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3256                 goto out;
3257         r = 0;
3258         vcpu->arch.mcg_cap = mcg_cap;
3259         /* Init IA32_MCG_CTL to all 1s */
3260         if (mcg_cap & MCG_CTL_P)
3261                 vcpu->arch.mcg_ctl = ~(u64)0;
3262         /* Init IA32_MCi_CTL to all 1s */
3263         for (bank = 0; bank < bank_num; bank++)
3264                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3265
3266         if (kvm_x86_ops->setup_mce)
3267                 kvm_x86_ops->setup_mce(vcpu);
3268 out:
3269         return r;
3270 }
3271
3272 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3273                                       struct kvm_x86_mce *mce)
3274 {
3275         u64 mcg_cap = vcpu->arch.mcg_cap;
3276         unsigned bank_num = mcg_cap & 0xff;
3277         u64 *banks = vcpu->arch.mce_banks;
3278
3279         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3280                 return -EINVAL;
3281         /*
3282          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3283          * reporting is disabled
3284          */
3285         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3286             vcpu->arch.mcg_ctl != ~(u64)0)
3287                 return 0;
3288         banks += 4 * mce->bank;
3289         /*
3290          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3291          * reporting is disabled for the bank
3292          */
3293         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3294                 return 0;
3295         if (mce->status & MCI_STATUS_UC) {
3296                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3297                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3298                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3299                         return 0;
3300                 }
3301                 if (banks[1] & MCI_STATUS_VAL)
3302                         mce->status |= MCI_STATUS_OVER;
3303                 banks[2] = mce->addr;
3304                 banks[3] = mce->misc;
3305                 vcpu->arch.mcg_status = mce->mcg_status;
3306                 banks[1] = mce->status;
3307                 kvm_queue_exception(vcpu, MC_VECTOR);
3308         } else if (!(banks[1] & MCI_STATUS_VAL)
3309                    || !(banks[1] & MCI_STATUS_UC)) {
3310                 if (banks[1] & MCI_STATUS_VAL)
3311                         mce->status |= MCI_STATUS_OVER;
3312                 banks[2] = mce->addr;
3313                 banks[3] = mce->misc;
3314                 banks[1] = mce->status;
3315         } else
3316                 banks[1] |= MCI_STATUS_OVER;
3317         return 0;
3318 }
3319
3320 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3321                                                struct kvm_vcpu_events *events)
3322 {
3323         process_nmi(vcpu);
3324         /*
3325          * FIXME: pass injected and pending separately.  This is only
3326          * needed for nested virtualization, whose state cannot be
3327          * migrated yet.  For now we can combine them.
3328          */
3329         events->exception.injected =
3330                 (vcpu->arch.exception.pending ||
3331                  vcpu->arch.exception.injected) &&
3332                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3333         events->exception.nr = vcpu->arch.exception.nr;
3334         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3335         events->exception.pad = 0;
3336         events->exception.error_code = vcpu->arch.exception.error_code;
3337
3338         events->interrupt.injected =
3339                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3340         events->interrupt.nr = vcpu->arch.interrupt.nr;
3341         events->interrupt.soft = 0;
3342         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3343
3344         events->nmi.injected = vcpu->arch.nmi_injected;
3345         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3346         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3347         events->nmi.pad = 0;
3348
3349         events->sipi_vector = 0; /* never valid when reporting to user space */
3350
3351         events->smi.smm = is_smm(vcpu);
3352         events->smi.pending = vcpu->arch.smi_pending;
3353         events->smi.smm_inside_nmi =
3354                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3355         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3356
3357         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3358                          | KVM_VCPUEVENT_VALID_SHADOW
3359                          | KVM_VCPUEVENT_VALID_SMM);
3360         memset(&events->reserved, 0, sizeof(events->reserved));
3361 }
3362
3363 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3364
3365 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3366                                               struct kvm_vcpu_events *events)
3367 {
3368         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3369                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3370                               | KVM_VCPUEVENT_VALID_SHADOW
3371                               | KVM_VCPUEVENT_VALID_SMM))
3372                 return -EINVAL;
3373
3374         if (events->exception.injected &&
3375             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3376              is_guest_mode(vcpu)))
3377                 return -EINVAL;
3378
3379         /* INITs are latched while in SMM */
3380         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3381             (events->smi.smm || events->smi.pending) &&
3382             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3383                 return -EINVAL;
3384
3385         process_nmi(vcpu);
3386         vcpu->arch.exception.injected = false;
3387         vcpu->arch.exception.pending = events->exception.injected;
3388         vcpu->arch.exception.nr = events->exception.nr;
3389         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3390         vcpu->arch.exception.error_code = events->exception.error_code;
3391
3392         vcpu->arch.interrupt.injected = events->interrupt.injected;
3393         vcpu->arch.interrupt.nr = events->interrupt.nr;
3394         vcpu->arch.interrupt.soft = events->interrupt.soft;
3395         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3396                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3397                                                   events->interrupt.shadow);
3398
3399         vcpu->arch.nmi_injected = events->nmi.injected;
3400         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3401                 vcpu->arch.nmi_pending = events->nmi.pending;
3402         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3403
3404         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3405             lapic_in_kernel(vcpu))
3406                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3407
3408         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3409                 u32 hflags = vcpu->arch.hflags;
3410                 if (events->smi.smm)
3411                         hflags |= HF_SMM_MASK;
3412                 else
3413                         hflags &= ~HF_SMM_MASK;
3414                 kvm_set_hflags(vcpu, hflags);
3415
3416                 vcpu->arch.smi_pending = events->smi.pending;
3417
3418                 if (events->smi.smm) {
3419                         if (events->smi.smm_inside_nmi)
3420                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3421                         else
3422                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3423                         if (lapic_in_kernel(vcpu)) {
3424                                 if (events->smi.latched_init)
3425                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3426                                 else
3427                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3428                         }
3429                 }
3430         }
3431
3432         kvm_make_request(KVM_REQ_EVENT, vcpu);
3433
3434         return 0;
3435 }
3436
3437 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3438                                              struct kvm_debugregs *dbgregs)
3439 {
3440         unsigned long val;
3441
3442         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3443         kvm_get_dr(vcpu, 6, &val);
3444         dbgregs->dr6 = val;
3445         dbgregs->dr7 = vcpu->arch.dr7;
3446         dbgregs->flags = 0;
3447         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3448 }
3449
3450 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3451                                             struct kvm_debugregs *dbgregs)
3452 {
3453         if (dbgregs->flags)
3454                 return -EINVAL;
3455
3456         if (dbgregs->dr6 & ~0xffffffffull)
3457                 return -EINVAL;
3458         if (dbgregs->dr7 & ~0xffffffffull)
3459                 return -EINVAL;
3460
3461         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3462         kvm_update_dr0123(vcpu);
3463         vcpu->arch.dr6 = dbgregs->dr6;
3464         kvm_update_dr6(vcpu);
3465         vcpu->arch.dr7 = dbgregs->dr7;
3466         kvm_update_dr7(vcpu);
3467
3468         return 0;
3469 }
3470
3471 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3472
3473 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3474 {
3475         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3476         u64 xstate_bv = xsave->header.xfeatures;
3477         u64 valid;
3478
3479         /*
3480          * Copy legacy XSAVE area, to avoid complications with CPUID
3481          * leaves 0 and 1 in the loop below.
3482          */
3483         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3484
3485         /* Set XSTATE_BV */
3486         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3487         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3488
3489         /*
3490          * Copy each region from the possibly compacted offset to the
3491          * non-compacted offset.
3492          */
3493         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3494         while (valid) {
3495                 u64 feature = valid & -valid;
3496                 int index = fls64(feature) - 1;
3497                 void *src = get_xsave_addr(xsave, feature);
3498
3499                 if (src) {
3500                         u32 size, offset, ecx, edx;
3501                         cpuid_count(XSTATE_CPUID, index,
3502                                     &size, &offset, &ecx, &edx);
3503                         if (feature == XFEATURE_MASK_PKRU)
3504                                 memcpy(dest + offset, &vcpu->arch.pkru,
3505                                        sizeof(vcpu->arch.pkru));
3506                         else
3507                                 memcpy(dest + offset, src, size);
3508
3509                 }
3510
3511                 valid -= feature;
3512         }
3513 }
3514
3515 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3516 {
3517         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3518         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3519         u64 valid;
3520
3521         /*
3522          * Copy legacy XSAVE area, to avoid complications with CPUID
3523          * leaves 0 and 1 in the loop below.
3524          */
3525         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3526
3527         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3528         xsave->header.xfeatures = xstate_bv;
3529         if (boot_cpu_has(X86_FEATURE_XSAVES))
3530                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3531
3532         /*
3533          * Copy each region from the non-compacted offset to the
3534          * possibly compacted offset.
3535          */
3536         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3537         while (valid) {
3538                 u64 feature = valid & -valid;
3539                 int index = fls64(feature) - 1;
3540                 void *dest = get_xsave_addr(xsave, feature);
3541
3542                 if (dest) {
3543                         u32 size, offset, ecx, edx;
3544                         cpuid_count(XSTATE_CPUID, index,
3545                                     &size, &offset, &ecx, &edx);
3546                         if (feature == XFEATURE_MASK_PKRU)
3547                                 memcpy(&vcpu->arch.pkru, src + offset,
3548                                        sizeof(vcpu->arch.pkru));
3549                         else
3550                                 memcpy(dest, src + offset, size);
3551                 }
3552
3553                 valid -= feature;
3554         }
3555 }
3556
3557 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3558                                          struct kvm_xsave *guest_xsave)
3559 {
3560         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3561                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3562                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3563         } else {
3564                 memcpy(guest_xsave->region,
3565                         &vcpu->arch.guest_fpu.state.fxsave,
3566                         sizeof(struct fxregs_state));
3567                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3568                         XFEATURE_MASK_FPSSE;
3569         }
3570 }
3571
3572 #define XSAVE_MXCSR_OFFSET 24
3573
3574 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3575                                         struct kvm_xsave *guest_xsave)
3576 {
3577         u64 xstate_bv =
3578                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3579         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3580
3581         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3582                 /*
3583                  * Here we allow setting states that are not present in
3584                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3585                  * with old userspace.
3586                  */
3587                 if (xstate_bv & ~kvm_supported_xcr0() ||
3588                         mxcsr & ~mxcsr_feature_mask)
3589                         return -EINVAL;
3590                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3591         } else {
3592                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3593                         mxcsr & ~mxcsr_feature_mask)
3594                         return -EINVAL;
3595                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3596                         guest_xsave->region, sizeof(struct fxregs_state));
3597         }
3598         return 0;
3599 }
3600
3601 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3602                                         struct kvm_xcrs *guest_xcrs)
3603 {
3604         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3605                 guest_xcrs->nr_xcrs = 0;
3606                 return;
3607         }
3608
3609         guest_xcrs->nr_xcrs = 1;
3610         guest_xcrs->flags = 0;
3611         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3612         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3613 }
3614
3615 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3616                                        struct kvm_xcrs *guest_xcrs)
3617 {
3618         int i, r = 0;
3619
3620         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3621                 return -EINVAL;
3622
3623         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3624                 return -EINVAL;
3625
3626         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3627                 /* Only support XCR0 currently */
3628                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3629                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3630                                 guest_xcrs->xcrs[i].value);
3631                         break;
3632                 }
3633         if (r)
3634                 r = -EINVAL;
3635         return r;
3636 }
3637
3638 /*
3639  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3640  * stopped by the hypervisor.  This function will be called from the host only.
3641  * EINVAL is returned when the host attempts to set the flag for a guest that
3642  * does not support pv clocks.
3643  */
3644 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3645 {
3646         if (!vcpu->arch.pv_time_enabled)
3647                 return -EINVAL;
3648         vcpu->arch.pvclock_set_guest_stopped_request = true;
3649         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3650         return 0;
3651 }
3652
3653 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3654                                      struct kvm_enable_cap *cap)
3655 {
3656         if (cap->flags)
3657                 return -EINVAL;
3658
3659         switch (cap->cap) {
3660         case KVM_CAP_HYPERV_SYNIC2:
3661                 if (cap->args[0])
3662                         return -EINVAL;
3663         case KVM_CAP_HYPERV_SYNIC:
3664                 if (!irqchip_in_kernel(vcpu->kvm))
3665                         return -EINVAL;
3666                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3667                                              KVM_CAP_HYPERV_SYNIC2);
3668         default:
3669                 return -EINVAL;
3670         }
3671 }
3672
3673 long kvm_arch_vcpu_ioctl(struct file *filp,
3674                          unsigned int ioctl, unsigned long arg)
3675 {
3676         struct kvm_vcpu *vcpu = filp->private_data;
3677         void __user *argp = (void __user *)arg;
3678         int r;
3679         union {
3680                 struct kvm_lapic_state *lapic;
3681                 struct kvm_xsave *xsave;
3682                 struct kvm_xcrs *xcrs;
3683                 void *buffer;
3684         } u;
3685
3686         vcpu_load(vcpu);
3687
3688         u.buffer = NULL;
3689         switch (ioctl) {
3690         case KVM_GET_LAPIC: {
3691                 r = -EINVAL;
3692                 if (!lapic_in_kernel(vcpu))
3693                         goto out;
3694                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3695
3696                 r = -ENOMEM;
3697                 if (!u.lapic)
3698                         goto out;
3699                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3700                 if (r)
3701                         goto out;
3702                 r = -EFAULT;
3703                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3704                         goto out;
3705                 r = 0;
3706                 break;
3707         }
3708         case KVM_SET_LAPIC: {
3709                 r = -EINVAL;
3710                 if (!lapic_in_kernel(vcpu))
3711                         goto out;
3712                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3713                 if (IS_ERR(u.lapic)) {
3714                         r = PTR_ERR(u.lapic);
3715                         goto out_nofree;
3716                 }
3717
3718                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3719                 break;
3720         }
3721         case KVM_INTERRUPT: {
3722                 struct kvm_interrupt irq;
3723
3724                 r = -EFAULT;
3725                 if (copy_from_user(&irq, argp, sizeof irq))
3726                         goto out;
3727                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3728                 break;
3729         }
3730         case KVM_NMI: {
3731                 r = kvm_vcpu_ioctl_nmi(vcpu);
3732                 break;
3733         }
3734         case KVM_SMI: {
3735                 r = kvm_vcpu_ioctl_smi(vcpu);
3736                 break;
3737         }
3738         case KVM_SET_CPUID: {
3739                 struct kvm_cpuid __user *cpuid_arg = argp;
3740                 struct kvm_cpuid cpuid;
3741
3742                 r = -EFAULT;
3743                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3744                         goto out;
3745                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3746                 break;
3747         }
3748         case KVM_SET_CPUID2: {
3749                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3750                 struct kvm_cpuid2 cpuid;
3751
3752                 r = -EFAULT;
3753                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3754                         goto out;
3755                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3756                                               cpuid_arg->entries);
3757                 break;
3758         }
3759         case KVM_GET_CPUID2: {
3760                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3761                 struct kvm_cpuid2 cpuid;
3762
3763                 r = -EFAULT;
3764                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3765                         goto out;
3766                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3767                                               cpuid_arg->entries);
3768                 if (r)
3769                         goto out;
3770                 r = -EFAULT;
3771                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3772                         goto out;
3773                 r = 0;
3774                 break;
3775         }
3776         case KVM_GET_MSRS: {
3777                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3778                 r = msr_io(vcpu, argp, do_get_msr, 1);
3779                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3780                 break;
3781         }
3782         case KVM_SET_MSRS: {
3783                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3784                 r = msr_io(vcpu, argp, do_set_msr, 0);
3785                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3786                 break;
3787         }
3788         case KVM_TPR_ACCESS_REPORTING: {
3789                 struct kvm_tpr_access_ctl tac;
3790
3791                 r = -EFAULT;
3792                 if (copy_from_user(&tac, argp, sizeof tac))
3793                         goto out;
3794                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3795                 if (r)
3796                         goto out;
3797                 r = -EFAULT;
3798                 if (copy_to_user(argp, &tac, sizeof tac))
3799                         goto out;
3800                 r = 0;
3801                 break;
3802         };
3803         case KVM_SET_VAPIC_ADDR: {
3804                 struct kvm_vapic_addr va;
3805                 int idx;
3806
3807                 r = -EINVAL;
3808                 if (!lapic_in_kernel(vcpu))
3809                         goto out;
3810                 r = -EFAULT;
3811                 if (copy_from_user(&va, argp, sizeof va))
3812                         goto out;
3813                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3814                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3815                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3816                 break;
3817         }
3818         case KVM_X86_SETUP_MCE: {
3819                 u64 mcg_cap;
3820
3821                 r = -EFAULT;
3822                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3823                         goto out;
3824                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3825                 break;
3826         }
3827         case KVM_X86_SET_MCE: {
3828                 struct kvm_x86_mce mce;
3829
3830                 r = -EFAULT;
3831                 if (copy_from_user(&mce, argp, sizeof mce))
3832                         goto out;
3833                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3834                 break;
3835         }
3836         case KVM_GET_VCPU_EVENTS: {
3837                 struct kvm_vcpu_events events;
3838
3839                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3840
3841                 r = -EFAULT;
3842                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3843                         break;
3844                 r = 0;
3845                 break;
3846         }
3847         case KVM_SET_VCPU_EVENTS: {
3848                 struct kvm_vcpu_events events;
3849
3850                 r = -EFAULT;
3851                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3852                         break;
3853
3854                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3855                 break;
3856         }
3857         case KVM_GET_DEBUGREGS: {
3858                 struct kvm_debugregs dbgregs;
3859
3860                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3861
3862                 r = -EFAULT;
3863                 if (copy_to_user(argp, &dbgregs,
3864                                  sizeof(struct kvm_debugregs)))
3865                         break;
3866                 r = 0;
3867                 break;
3868         }
3869         case KVM_SET_DEBUGREGS: {
3870                 struct kvm_debugregs dbgregs;
3871
3872                 r = -EFAULT;
3873                 if (copy_from_user(&dbgregs, argp,
3874                                    sizeof(struct kvm_debugregs)))
3875                         break;
3876
3877                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3878                 break;
3879         }
3880         case KVM_GET_XSAVE: {
3881                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3882                 r = -ENOMEM;
3883                 if (!u.xsave)
3884                         break;
3885
3886                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3887
3888                 r = -EFAULT;
3889                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3890                         break;
3891                 r = 0;
3892                 break;
3893         }
3894         case KVM_SET_XSAVE: {
3895                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3896                 if (IS_ERR(u.xsave)) {
3897                         r = PTR_ERR(u.xsave);
3898                         goto out_nofree;
3899                 }
3900
3901                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3902                 break;
3903         }
3904         case KVM_GET_XCRS: {
3905                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3906                 r = -ENOMEM;
3907                 if (!u.xcrs)
3908                         break;
3909
3910                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3911
3912                 r = -EFAULT;
3913                 if (copy_to_user(argp, u.xcrs,
3914                                  sizeof(struct kvm_xcrs)))
3915                         break;
3916                 r = 0;
3917                 break;
3918         }
3919         case KVM_SET_XCRS: {
3920                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3921                 if (IS_ERR(u.xcrs)) {
3922                         r = PTR_ERR(u.xcrs);
3923                         goto out_nofree;
3924                 }
3925
3926                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3927                 break;
3928         }
3929         case KVM_SET_TSC_KHZ: {
3930                 u32 user_tsc_khz;
3931
3932                 r = -EINVAL;
3933                 user_tsc_khz = (u32)arg;
3934
3935                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3936                         goto out;
3937
3938                 if (user_tsc_khz == 0)
3939                         user_tsc_khz = tsc_khz;
3940
3941                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3942                         r = 0;
3943
3944                 goto out;
3945         }
3946         case KVM_GET_TSC_KHZ: {
3947                 r = vcpu->arch.virtual_tsc_khz;
3948                 goto out;
3949         }
3950         case KVM_KVMCLOCK_CTRL: {
3951                 r = kvm_set_guest_paused(vcpu);
3952                 goto out;
3953         }
3954         case KVM_ENABLE_CAP: {
3955                 struct kvm_enable_cap cap;
3956
3957                 r = -EFAULT;
3958                 if (copy_from_user(&cap, argp, sizeof(cap)))
3959                         goto out;
3960                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3961                 break;
3962         }
3963         default:
3964                 r = -EINVAL;
3965         }
3966 out:
3967         kfree(u.buffer);
3968 out_nofree:
3969         vcpu_put(vcpu);
3970         return r;
3971 }
3972
3973 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3974 {
3975         return VM_FAULT_SIGBUS;
3976 }
3977
3978 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3979 {
3980         int ret;
3981
3982         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3983                 return -EINVAL;
3984         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3985         return ret;
3986 }
3987
3988 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3989                                               u64 ident_addr)
3990 {
3991         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
3992 }
3993
3994 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3995                                           u32 kvm_nr_mmu_pages)
3996 {
3997         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3998                 return -EINVAL;
3999
4000         mutex_lock(&kvm->slots_lock);
4001
4002         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4003         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4004
4005         mutex_unlock(&kvm->slots_lock);
4006         return 0;
4007 }
4008
4009 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4010 {
4011         return kvm->arch.n_max_mmu_pages;
4012 }
4013
4014 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4015 {
4016         struct kvm_pic *pic = kvm->arch.vpic;
4017         int r;
4018
4019         r = 0;
4020         switch (chip->chip_id) {
4021         case KVM_IRQCHIP_PIC_MASTER:
4022                 memcpy(&chip->chip.pic, &pic->pics[0],
4023                         sizeof(struct kvm_pic_state));
4024                 break;
4025         case KVM_IRQCHIP_PIC_SLAVE:
4026                 memcpy(&chip->chip.pic, &pic->pics[1],
4027                         sizeof(struct kvm_pic_state));
4028                 break;
4029         case KVM_IRQCHIP_IOAPIC:
4030                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4031                 break;
4032         default:
4033                 r = -EINVAL;
4034                 break;
4035         }
4036         return r;
4037 }
4038
4039 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4040 {
4041         struct kvm_pic *pic = kvm->arch.vpic;
4042         int r;
4043
4044         r = 0;
4045         switch (chip->chip_id) {
4046         case KVM_IRQCHIP_PIC_MASTER:
4047                 spin_lock(&pic->lock);
4048                 memcpy(&pic->pics[0], &chip->chip.pic,
4049                         sizeof(struct kvm_pic_state));
4050                 spin_unlock(&pic->lock);
4051                 break;
4052         case KVM_IRQCHIP_PIC_SLAVE:
4053                 spin_lock(&pic->lock);
4054                 memcpy(&pic->pics[1], &chip->chip.pic,
4055                         sizeof(struct kvm_pic_state));
4056                 spin_unlock(&pic->lock);
4057                 break;
4058         case KVM_IRQCHIP_IOAPIC:
4059                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4060                 break;
4061         default:
4062                 r = -EINVAL;
4063                 break;
4064         }
4065         kvm_pic_update_irq(pic);
4066         return r;
4067 }
4068
4069 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4070 {
4071         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4072
4073         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4074
4075         mutex_lock(&kps->lock);
4076         memcpy(ps, &kps->channels, sizeof(*ps));
4077         mutex_unlock(&kps->lock);
4078         return 0;
4079 }
4080
4081 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4082 {
4083         int i;
4084         struct kvm_pit *pit = kvm->arch.vpit;
4085
4086         mutex_lock(&pit->pit_state.lock);
4087         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4088         for (i = 0; i < 3; i++)
4089                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4090         mutex_unlock(&pit->pit_state.lock);
4091         return 0;
4092 }
4093
4094 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4095 {
4096         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4097         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4098                 sizeof(ps->channels));
4099         ps->flags = kvm->arch.vpit->pit_state.flags;
4100         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4101         memset(&ps->reserved, 0, sizeof(ps->reserved));
4102         return 0;
4103 }
4104
4105 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4106 {
4107         int start = 0;
4108         int i;
4109         u32 prev_legacy, cur_legacy;
4110         struct kvm_pit *pit = kvm->arch.vpit;
4111
4112         mutex_lock(&pit->pit_state.lock);
4113         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4114         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4115         if (!prev_legacy && cur_legacy)
4116                 start = 1;
4117         memcpy(&pit->pit_state.channels, &ps->channels,
4118                sizeof(pit->pit_state.channels));
4119         pit->pit_state.flags = ps->flags;
4120         for (i = 0; i < 3; i++)
4121                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4122                                    start && i == 0);
4123         mutex_unlock(&pit->pit_state.lock);
4124         return 0;
4125 }
4126
4127 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4128                                  struct kvm_reinject_control *control)
4129 {
4130         struct kvm_pit *pit = kvm->arch.vpit;
4131
4132         if (!pit)
4133                 return -ENXIO;
4134
4135         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4136          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4137          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4138          */
4139         mutex_lock(&pit->pit_state.lock);
4140         kvm_pit_set_reinject(pit, control->pit_reinject);
4141         mutex_unlock(&pit->pit_state.lock);
4142
4143         return 0;
4144 }
4145
4146 /**
4147  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4148  * @kvm: kvm instance
4149  * @log: slot id and address to which we copy the log
4150  *
4151  * Steps 1-4 below provide general overview of dirty page logging. See
4152  * kvm_get_dirty_log_protect() function description for additional details.
4153  *
4154  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4155  * always flush the TLB (step 4) even if previous step failed  and the dirty
4156  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4157  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4158  * writes will be marked dirty for next log read.
4159  *
4160  *   1. Take a snapshot of the bit and clear it if needed.
4161  *   2. Write protect the corresponding page.
4162  *   3. Copy the snapshot to the userspace.
4163  *   4. Flush TLB's if needed.
4164  */
4165 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4166 {
4167         bool is_dirty = false;
4168         int r;
4169
4170         mutex_lock(&kvm->slots_lock);
4171
4172         /*
4173          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4174          */
4175         if (kvm_x86_ops->flush_log_dirty)
4176                 kvm_x86_ops->flush_log_dirty(kvm);
4177
4178         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4179
4180         /*
4181          * All the TLBs can be flushed out of mmu lock, see the comments in
4182          * kvm_mmu_slot_remove_write_access().
4183          */
4184         lockdep_assert_held(&kvm->slots_lock);
4185         if (is_dirty)
4186                 kvm_flush_remote_tlbs(kvm);
4187
4188         mutex_unlock(&kvm->slots_lock);
4189         return r;
4190 }
4191
4192 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4193                         bool line_status)
4194 {
4195         if (!irqchip_in_kernel(kvm))
4196                 return -ENXIO;
4197
4198         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4199                                         irq_event->irq, irq_event->level,
4200                                         line_status);
4201         return 0;
4202 }
4203
4204 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4205                                    struct kvm_enable_cap *cap)
4206 {
4207         int r;
4208
4209         if (cap->flags)
4210                 return -EINVAL;
4211
4212         switch (cap->cap) {
4213         case KVM_CAP_DISABLE_QUIRKS:
4214                 kvm->arch.disabled_quirks = cap->args[0];
4215                 r = 0;
4216                 break;
4217         case KVM_CAP_SPLIT_IRQCHIP: {
4218                 mutex_lock(&kvm->lock);
4219                 r = -EINVAL;
4220                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4221                         goto split_irqchip_unlock;
4222                 r = -EEXIST;
4223                 if (irqchip_in_kernel(kvm))
4224                         goto split_irqchip_unlock;
4225                 if (kvm->created_vcpus)
4226                         goto split_irqchip_unlock;
4227                 r = kvm_setup_empty_irq_routing(kvm);
4228                 if (r)
4229                         goto split_irqchip_unlock;
4230                 /* Pairs with irqchip_in_kernel. */
4231                 smp_wmb();
4232                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4233                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4234                 r = 0;
4235 split_irqchip_unlock:
4236                 mutex_unlock(&kvm->lock);
4237                 break;
4238         }
4239         case KVM_CAP_X2APIC_API:
4240                 r = -EINVAL;
4241                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4242                         break;
4243
4244                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4245                         kvm->arch.x2apic_format = true;
4246                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4247                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4248
4249                 r = 0;
4250                 break;
4251         case KVM_CAP_X86_DISABLE_EXITS:
4252                 r = -EINVAL;
4253                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4254                         break;
4255
4256                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4257                         kvm_can_mwait_in_guest())
4258                         kvm->arch.mwait_in_guest = true;
4259                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4260                         kvm->arch.hlt_in_guest = true;
4261                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4262                         kvm->arch.pause_in_guest = true;
4263                 r = 0;
4264                 break;
4265         default:
4266                 r = -EINVAL;
4267                 break;
4268         }
4269         return r;
4270 }
4271
4272 long kvm_arch_vm_ioctl(struct file *filp,
4273                        unsigned int ioctl, unsigned long arg)
4274 {
4275         struct kvm *kvm = filp->private_data;
4276         void __user *argp = (void __user *)arg;
4277         int r = -ENOTTY;
4278         /*
4279          * This union makes it completely explicit to gcc-3.x
4280          * that these two variables' stack usage should be
4281          * combined, not added together.
4282          */
4283         union {
4284                 struct kvm_pit_state ps;
4285                 struct kvm_pit_state2 ps2;
4286                 struct kvm_pit_config pit_config;
4287         } u;
4288
4289         switch (ioctl) {
4290         case KVM_SET_TSS_ADDR:
4291                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4292                 break;
4293         case KVM_SET_IDENTITY_MAP_ADDR: {
4294                 u64 ident_addr;
4295
4296                 mutex_lock(&kvm->lock);
4297                 r = -EINVAL;
4298                 if (kvm->created_vcpus)
4299                         goto set_identity_unlock;
4300                 r = -EFAULT;
4301                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4302                         goto set_identity_unlock;
4303                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4304 set_identity_unlock:
4305                 mutex_unlock(&kvm->lock);
4306                 break;
4307         }
4308         case KVM_SET_NR_MMU_PAGES:
4309                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4310                 break;
4311         case KVM_GET_NR_MMU_PAGES:
4312                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4313                 break;
4314         case KVM_CREATE_IRQCHIP: {
4315                 mutex_lock(&kvm->lock);
4316
4317                 r = -EEXIST;
4318                 if (irqchip_in_kernel(kvm))
4319                         goto create_irqchip_unlock;
4320
4321                 r = -EINVAL;
4322                 if (kvm->created_vcpus)
4323                         goto create_irqchip_unlock;
4324
4325                 r = kvm_pic_init(kvm);
4326                 if (r)
4327                         goto create_irqchip_unlock;
4328
4329                 r = kvm_ioapic_init(kvm);
4330                 if (r) {
4331                         kvm_pic_destroy(kvm);
4332                         goto create_irqchip_unlock;
4333                 }
4334
4335                 r = kvm_setup_default_irq_routing(kvm);
4336                 if (r) {
4337                         kvm_ioapic_destroy(kvm);
4338                         kvm_pic_destroy(kvm);
4339                         goto create_irqchip_unlock;
4340                 }
4341                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4342                 smp_wmb();
4343                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4344         create_irqchip_unlock:
4345                 mutex_unlock(&kvm->lock);
4346                 break;
4347         }
4348         case KVM_CREATE_PIT:
4349                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4350                 goto create_pit;
4351         case KVM_CREATE_PIT2:
4352                 r = -EFAULT;
4353                 if (copy_from_user(&u.pit_config, argp,
4354                                    sizeof(struct kvm_pit_config)))
4355                         goto out;
4356         create_pit:
4357                 mutex_lock(&kvm->lock);
4358                 r = -EEXIST;
4359                 if (kvm->arch.vpit)
4360                         goto create_pit_unlock;
4361                 r = -ENOMEM;
4362                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4363                 if (kvm->arch.vpit)
4364                         r = 0;
4365         create_pit_unlock:
4366                 mutex_unlock(&kvm->lock);
4367                 break;
4368         case KVM_GET_IRQCHIP: {
4369                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4370                 struct kvm_irqchip *chip;
4371
4372                 chip = memdup_user(argp, sizeof(*chip));
4373                 if (IS_ERR(chip)) {
4374                         r = PTR_ERR(chip);
4375                         goto out;
4376                 }
4377
4378                 r = -ENXIO;
4379                 if (!irqchip_kernel(kvm))
4380                         goto get_irqchip_out;
4381                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4382                 if (r)
4383                         goto get_irqchip_out;
4384                 r = -EFAULT;
4385                 if (copy_to_user(argp, chip, sizeof *chip))
4386                         goto get_irqchip_out;
4387                 r = 0;
4388         get_irqchip_out:
4389                 kfree(chip);
4390                 break;
4391         }
4392         case KVM_SET_IRQCHIP: {
4393                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4394                 struct kvm_irqchip *chip;
4395
4396                 chip = memdup_user(argp, sizeof(*chip));
4397                 if (IS_ERR(chip)) {
4398                         r = PTR_ERR(chip);
4399                         goto out;
4400                 }
4401
4402                 r = -ENXIO;
4403                 if (!irqchip_kernel(kvm))
4404                         goto set_irqchip_out;
4405                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4406                 if (r)
4407                         goto set_irqchip_out;
4408                 r = 0;
4409         set_irqchip_out:
4410                 kfree(chip);
4411                 break;
4412         }
4413         case KVM_GET_PIT: {
4414                 r = -EFAULT;
4415                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4416                         goto out;
4417                 r = -ENXIO;
4418                 if (!kvm->arch.vpit)
4419                         goto out;
4420                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4421                 if (r)
4422                         goto out;
4423                 r = -EFAULT;
4424                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4425                         goto out;
4426                 r = 0;
4427                 break;
4428         }
4429         case KVM_SET_PIT: {
4430                 r = -EFAULT;
4431                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4432                         goto out;
4433                 r = -ENXIO;
4434                 if (!kvm->arch.vpit)
4435                         goto out;
4436                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4437                 break;
4438         }
4439         case KVM_GET_PIT2: {
4440                 r = -ENXIO;
4441                 if (!kvm->arch.vpit)
4442                         goto out;
4443                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4444                 if (r)
4445                         goto out;
4446                 r = -EFAULT;
4447                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4448                         goto out;
4449                 r = 0;
4450                 break;
4451         }
4452         case KVM_SET_PIT2: {
4453                 r = -EFAULT;
4454                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4455                         goto out;
4456                 r = -ENXIO;
4457                 if (!kvm->arch.vpit)
4458                         goto out;
4459                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4460                 break;
4461         }
4462         case KVM_REINJECT_CONTROL: {
4463                 struct kvm_reinject_control control;
4464                 r =  -EFAULT;
4465                 if (copy_from_user(&control, argp, sizeof(control)))
4466                         goto out;
4467                 r = kvm_vm_ioctl_reinject(kvm, &control);
4468                 break;
4469         }
4470         case KVM_SET_BOOT_CPU_ID:
4471                 r = 0;
4472                 mutex_lock(&kvm->lock);
4473                 if (kvm->created_vcpus)
4474                         r = -EBUSY;
4475                 else
4476                         kvm->arch.bsp_vcpu_id = arg;
4477                 mutex_unlock(&kvm->lock);
4478                 break;
4479         case KVM_XEN_HVM_CONFIG: {
4480                 struct kvm_xen_hvm_config xhc;
4481                 r = -EFAULT;
4482                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4483                         goto out;
4484                 r = -EINVAL;
4485                 if (xhc.flags)
4486                         goto out;
4487                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4488                 r = 0;
4489                 break;
4490         }
4491         case KVM_SET_CLOCK: {
4492                 struct kvm_clock_data user_ns;
4493                 u64 now_ns;
4494
4495                 r = -EFAULT;
4496                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4497                         goto out;
4498
4499                 r = -EINVAL;
4500                 if (user_ns.flags)
4501                         goto out;
4502
4503                 r = 0;
4504                 /*
4505                  * TODO: userspace has to take care of races with VCPU_RUN, so
4506                  * kvm_gen_update_masterclock() can be cut down to locked
4507                  * pvclock_update_vm_gtod_copy().
4508                  */
4509                 kvm_gen_update_masterclock(kvm);
4510                 now_ns = get_kvmclock_ns(kvm);
4511                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4512                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4513                 break;
4514         }
4515         case KVM_GET_CLOCK: {
4516                 struct kvm_clock_data user_ns;
4517                 u64 now_ns;
4518
4519                 now_ns = get_kvmclock_ns(kvm);
4520                 user_ns.clock = now_ns;
4521                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4522                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4523
4524                 r = -EFAULT;
4525                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4526                         goto out;
4527                 r = 0;
4528                 break;
4529         }
4530         case KVM_ENABLE_CAP: {
4531                 struct kvm_enable_cap cap;
4532
4533                 r = -EFAULT;
4534                 if (copy_from_user(&cap, argp, sizeof(cap)))
4535                         goto out;
4536                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4537                 break;
4538         }
4539         case KVM_MEMORY_ENCRYPT_OP: {
4540                 r = -ENOTTY;
4541                 if (kvm_x86_ops->mem_enc_op)
4542                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4543                 break;
4544         }
4545         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4546                 struct kvm_enc_region region;
4547
4548                 r = -EFAULT;
4549                 if (copy_from_user(&region, argp, sizeof(region)))
4550                         goto out;
4551
4552                 r = -ENOTTY;
4553                 if (kvm_x86_ops->mem_enc_reg_region)
4554                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4555                 break;
4556         }
4557         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4558                 struct kvm_enc_region region;
4559
4560                 r = -EFAULT;
4561                 if (copy_from_user(&region, argp, sizeof(region)))
4562                         goto out;
4563
4564                 r = -ENOTTY;
4565                 if (kvm_x86_ops->mem_enc_unreg_region)
4566                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4567                 break;
4568         }
4569         case KVM_HYPERV_EVENTFD: {
4570                 struct kvm_hyperv_eventfd hvevfd;
4571
4572                 r = -EFAULT;
4573                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4574                         goto out;
4575                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4576                 break;
4577         }
4578         default:
4579                 r = -ENOTTY;
4580         }
4581 out:
4582         return r;
4583 }
4584
4585 static void kvm_init_msr_list(void)
4586 {
4587         u32 dummy[2];
4588         unsigned i, j;
4589
4590         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4591                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4592                         continue;
4593
4594                 /*
4595                  * Even MSRs that are valid in the host may not be exposed
4596                  * to the guests in some cases.
4597                  */
4598                 switch (msrs_to_save[i]) {
4599                 case MSR_IA32_BNDCFGS:
4600                         if (!kvm_x86_ops->mpx_supported())
4601                                 continue;
4602                         break;
4603                 case MSR_TSC_AUX:
4604                         if (!kvm_x86_ops->rdtscp_supported())
4605                                 continue;
4606                         break;
4607                 default:
4608                         break;
4609                 }
4610
4611                 if (j < i)
4612                         msrs_to_save[j] = msrs_to_save[i];
4613                 j++;
4614         }
4615         num_msrs_to_save = j;
4616
4617         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4618                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
4619                         continue;
4620
4621                 if (j < i)
4622                         emulated_msrs[j] = emulated_msrs[i];
4623                 j++;
4624         }
4625         num_emulated_msrs = j;
4626
4627         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4628                 struct kvm_msr_entry msr;
4629
4630                 msr.index = msr_based_features[i];
4631                 if (kvm_get_msr_feature(&msr))
4632                         continue;
4633
4634                 if (j < i)
4635                         msr_based_features[j] = msr_based_features[i];
4636                 j++;
4637         }
4638         num_msr_based_features = j;
4639 }
4640
4641 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4642                            const void *v)
4643 {
4644         int handled = 0;
4645         int n;
4646
4647         do {
4648                 n = min(len, 8);
4649                 if (!(lapic_in_kernel(vcpu) &&
4650                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4651                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4652                         break;
4653                 handled += n;
4654                 addr += n;
4655                 len -= n;
4656                 v += n;
4657         } while (len);
4658
4659         return handled;
4660 }
4661
4662 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4663 {
4664         int handled = 0;
4665         int n;
4666
4667         do {
4668                 n = min(len, 8);
4669                 if (!(lapic_in_kernel(vcpu) &&
4670                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4671                                          addr, n, v))
4672                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4673                         break;
4674                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4675                 handled += n;
4676                 addr += n;
4677                 len -= n;
4678                 v += n;
4679         } while (len);
4680
4681         return handled;
4682 }
4683
4684 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4685                         struct kvm_segment *var, int seg)
4686 {
4687         kvm_x86_ops->set_segment(vcpu, var, seg);
4688 }
4689
4690 void kvm_get_segment(struct kvm_vcpu *vcpu,
4691                      struct kvm_segment *var, int seg)
4692 {
4693         kvm_x86_ops->get_segment(vcpu, var, seg);
4694 }
4695
4696 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4697                            struct x86_exception *exception)
4698 {
4699         gpa_t t_gpa;
4700
4701         BUG_ON(!mmu_is_nested(vcpu));
4702
4703         /* NPT walks are always user-walks */
4704         access |= PFERR_USER_MASK;
4705         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4706
4707         return t_gpa;
4708 }
4709
4710 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4711                               struct x86_exception *exception)
4712 {
4713         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4714         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4715 }
4716
4717  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4718                                 struct x86_exception *exception)
4719 {
4720         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4721         access |= PFERR_FETCH_MASK;
4722         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4723 }
4724
4725 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4726                                struct x86_exception *exception)
4727 {
4728         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4729         access |= PFERR_WRITE_MASK;
4730         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4731 }
4732
4733 /* uses this to access any guest's mapped memory without checking CPL */
4734 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4735                                 struct x86_exception *exception)
4736 {
4737         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4738 }
4739
4740 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4741                                       struct kvm_vcpu *vcpu, u32 access,
4742                                       struct x86_exception *exception)
4743 {
4744         void *data = val;
4745         int r = X86EMUL_CONTINUE;
4746
4747         while (bytes) {
4748                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4749                                                             exception);
4750                 unsigned offset = addr & (PAGE_SIZE-1);
4751                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4752                 int ret;
4753
4754                 if (gpa == UNMAPPED_GVA)
4755                         return X86EMUL_PROPAGATE_FAULT;
4756                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4757                                                offset, toread);
4758                 if (ret < 0) {
4759                         r = X86EMUL_IO_NEEDED;
4760                         goto out;
4761                 }
4762
4763                 bytes -= toread;
4764                 data += toread;
4765                 addr += toread;
4766         }
4767 out:
4768         return r;
4769 }
4770
4771 /* used for instruction fetching */
4772 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4773                                 gva_t addr, void *val, unsigned int bytes,
4774                                 struct x86_exception *exception)
4775 {
4776         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4777         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4778         unsigned offset;
4779         int ret;
4780
4781         /* Inline kvm_read_guest_virt_helper for speed.  */
4782         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4783                                                     exception);
4784         if (unlikely(gpa == UNMAPPED_GVA))
4785                 return X86EMUL_PROPAGATE_FAULT;
4786
4787         offset = addr & (PAGE_SIZE-1);
4788         if (WARN_ON(offset + bytes > PAGE_SIZE))
4789                 bytes = (unsigned)PAGE_SIZE - offset;
4790         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4791                                        offset, bytes);
4792         if (unlikely(ret < 0))
4793                 return X86EMUL_IO_NEEDED;
4794
4795         return X86EMUL_CONTINUE;
4796 }
4797
4798 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
4799                                gva_t addr, void *val, unsigned int bytes,
4800                                struct x86_exception *exception)
4801 {
4802         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4803
4804         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4805                                           exception);
4806 }
4807 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4808
4809 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
4810                              gva_t addr, void *val, unsigned int bytes,
4811                              struct x86_exception *exception, bool system)
4812 {
4813         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4814         u32 access = 0;
4815
4816         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
4817                 access |= PFERR_USER_MASK;
4818
4819         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
4820 }
4821
4822 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4823                 unsigned long addr, void *val, unsigned int bytes)
4824 {
4825         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4826         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4827
4828         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4829 }
4830
4831 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4832                                       struct kvm_vcpu *vcpu, u32 access,
4833                                       struct x86_exception *exception)
4834 {
4835         void *data = val;
4836         int r = X86EMUL_CONTINUE;
4837
4838         while (bytes) {
4839                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4840                                                              access,
4841                                                              exception);
4842                 unsigned offset = addr & (PAGE_SIZE-1);
4843                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4844                 int ret;
4845
4846                 if (gpa == UNMAPPED_GVA)
4847                         return X86EMUL_PROPAGATE_FAULT;
4848                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4849                 if (ret < 0) {
4850                         r = X86EMUL_IO_NEEDED;
4851                         goto out;
4852                 }
4853
4854                 bytes -= towrite;
4855                 data += towrite;
4856                 addr += towrite;
4857         }
4858 out:
4859         return r;
4860 }
4861
4862 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
4863                               unsigned int bytes, struct x86_exception *exception,
4864                               bool system)
4865 {
4866         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4867         u32 access = PFERR_WRITE_MASK;
4868
4869         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
4870                 access |= PFERR_USER_MASK;
4871
4872         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
4873                                            access, exception);
4874 }
4875
4876 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
4877                                 unsigned int bytes, struct x86_exception *exception)
4878 {
4879         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
4880                                            PFERR_WRITE_MASK, exception);
4881 }
4882 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4883
4884 int handle_ud(struct kvm_vcpu *vcpu)
4885 {
4886         int emul_type = EMULTYPE_TRAP_UD;
4887         enum emulation_result er;
4888         char sig[5]; /* ud2; .ascii "kvm" */
4889         struct x86_exception e;
4890
4891         if (force_emulation_prefix &&
4892             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
4893                                 sig, sizeof(sig), &e) == 0 &&
4894             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
4895                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
4896                 emul_type = 0;
4897         }
4898
4899         er = emulate_instruction(vcpu, emul_type);
4900         if (er == EMULATE_USER_EXIT)
4901                 return 0;
4902         if (er != EMULATE_DONE)
4903                 kvm_queue_exception(vcpu, UD_VECTOR);
4904         return 1;
4905 }
4906 EXPORT_SYMBOL_GPL(handle_ud);
4907
4908 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4909                             gpa_t gpa, bool write)
4910 {
4911         /* For APIC access vmexit */
4912         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4913                 return 1;
4914
4915         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4916                 trace_vcpu_match_mmio(gva, gpa, write, true);
4917                 return 1;
4918         }
4919
4920         return 0;
4921 }
4922
4923 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4924                                 gpa_t *gpa, struct x86_exception *exception,
4925                                 bool write)
4926 {
4927         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4928                 | (write ? PFERR_WRITE_MASK : 0);
4929
4930         /*
4931          * currently PKRU is only applied to ept enabled guest so
4932          * there is no pkey in EPT page table for L1 guest or EPT
4933          * shadow page table for L2 guest.
4934          */
4935         if (vcpu_match_mmio_gva(vcpu, gva)
4936             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4937                                  vcpu->arch.access, 0, access)) {
4938                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4939                                         (gva & (PAGE_SIZE - 1));
4940                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4941                 return 1;
4942         }
4943
4944         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4945
4946         if (*gpa == UNMAPPED_GVA)
4947                 return -1;
4948
4949         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4950 }
4951
4952 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4953                         const void *val, int bytes)
4954 {
4955         int ret;
4956
4957         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4958         if (ret < 0)
4959                 return 0;
4960         kvm_page_track_write(vcpu, gpa, val, bytes);
4961         return 1;
4962 }
4963
4964 struct read_write_emulator_ops {
4965         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4966                                   int bytes);
4967         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4968                                   void *val, int bytes);
4969         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4970                                int bytes, void *val);
4971         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4972                                     void *val, int bytes);
4973         bool write;
4974 };
4975
4976 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4977 {
4978         if (vcpu->mmio_read_completed) {
4979                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4980                                vcpu->mmio_fragments[0].gpa, val);
4981                 vcpu->mmio_read_completed = 0;
4982                 return 1;
4983         }
4984
4985         return 0;
4986 }
4987
4988 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4989                         void *val, int bytes)
4990 {
4991         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4992 }
4993
4994 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4995                          void *val, int bytes)
4996 {
4997         return emulator_write_phys(vcpu, gpa, val, bytes);
4998 }
4999
5000 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5001 {
5002         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5003         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5004 }
5005
5006 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5007                           void *val, int bytes)
5008 {
5009         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5010         return X86EMUL_IO_NEEDED;
5011 }
5012
5013 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5014                            void *val, int bytes)
5015 {
5016         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5017
5018         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5019         return X86EMUL_CONTINUE;
5020 }
5021
5022 static const struct read_write_emulator_ops read_emultor = {
5023         .read_write_prepare = read_prepare,
5024         .read_write_emulate = read_emulate,
5025         .read_write_mmio = vcpu_mmio_read,
5026         .read_write_exit_mmio = read_exit_mmio,
5027 };
5028
5029 static const struct read_write_emulator_ops write_emultor = {
5030         .read_write_emulate = write_emulate,
5031         .read_write_mmio = write_mmio,
5032         .read_write_exit_mmio = write_exit_mmio,
5033         .write = true,
5034 };
5035
5036 static int emulator_read_write_onepage(unsigned long addr, void *val,
5037                                        unsigned int bytes,
5038                                        struct x86_exception *exception,
5039                                        struct kvm_vcpu *vcpu,
5040                                        const struct read_write_emulator_ops *ops)
5041 {
5042         gpa_t gpa;
5043         int handled, ret;
5044         bool write = ops->write;
5045         struct kvm_mmio_fragment *frag;
5046         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5047
5048         /*
5049          * If the exit was due to a NPF we may already have a GPA.
5050          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5051          * Note, this cannot be used on string operations since string
5052          * operation using rep will only have the initial GPA from the NPF
5053          * occurred.
5054          */
5055         if (vcpu->arch.gpa_available &&
5056             emulator_can_use_gpa(ctxt) &&
5057             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5058                 gpa = vcpu->arch.gpa_val;
5059                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5060         } else {
5061                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5062                 if (ret < 0)
5063                         return X86EMUL_PROPAGATE_FAULT;
5064         }
5065
5066         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5067                 return X86EMUL_CONTINUE;
5068
5069         /*
5070          * Is this MMIO handled locally?
5071          */
5072         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5073         if (handled == bytes)
5074                 return X86EMUL_CONTINUE;
5075
5076         gpa += handled;
5077         bytes -= handled;
5078         val += handled;
5079
5080         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5081         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5082         frag->gpa = gpa;
5083         frag->data = val;
5084         frag->len = bytes;
5085         return X86EMUL_CONTINUE;
5086 }
5087
5088 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5089                         unsigned long addr,
5090                         void *val, unsigned int bytes,
5091                         struct x86_exception *exception,
5092                         const struct read_write_emulator_ops *ops)
5093 {
5094         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5095         gpa_t gpa;
5096         int rc;
5097
5098         if (ops->read_write_prepare &&
5099                   ops->read_write_prepare(vcpu, val, bytes))
5100                 return X86EMUL_CONTINUE;
5101
5102         vcpu->mmio_nr_fragments = 0;
5103
5104         /* Crossing a page boundary? */
5105         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5106                 int now;
5107
5108                 now = -addr & ~PAGE_MASK;
5109                 rc = emulator_read_write_onepage(addr, val, now, exception,
5110                                                  vcpu, ops);
5111
5112                 if (rc != X86EMUL_CONTINUE)
5113                         return rc;
5114                 addr += now;
5115                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5116                         addr = (u32)addr;
5117                 val += now;
5118                 bytes -= now;
5119         }
5120
5121         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5122                                          vcpu, ops);
5123         if (rc != X86EMUL_CONTINUE)
5124                 return rc;
5125
5126         if (!vcpu->mmio_nr_fragments)
5127                 return rc;
5128
5129         gpa = vcpu->mmio_fragments[0].gpa;
5130
5131         vcpu->mmio_needed = 1;
5132         vcpu->mmio_cur_fragment = 0;
5133
5134         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5135         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5136         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5137         vcpu->run->mmio.phys_addr = gpa;
5138
5139         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5140 }
5141
5142 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5143                                   unsigned long addr,
5144                                   void *val,
5145                                   unsigned int bytes,
5146                                   struct x86_exception *exception)
5147 {
5148         return emulator_read_write(ctxt, addr, val, bytes,
5149                                    exception, &read_emultor);
5150 }
5151
5152 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5153                             unsigned long addr,
5154                             const void *val,
5155                             unsigned int bytes,
5156                             struct x86_exception *exception)
5157 {
5158         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5159                                    exception, &write_emultor);
5160 }
5161
5162 #define CMPXCHG_TYPE(t, ptr, old, new) \
5163         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5164
5165 #ifdef CONFIG_X86_64
5166 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5167 #else
5168 #  define CMPXCHG64(ptr, old, new) \
5169         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5170 #endif
5171
5172 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5173                                      unsigned long addr,
5174                                      const void *old,
5175                                      const void *new,
5176                                      unsigned int bytes,
5177                                      struct x86_exception *exception)
5178 {
5179         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5180         gpa_t gpa;
5181         struct page *page;
5182         char *kaddr;
5183         bool exchanged;
5184
5185         /* guests cmpxchg8b have to be emulated atomically */
5186         if (bytes > 8 || (bytes & (bytes - 1)))
5187                 goto emul_write;
5188
5189         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5190
5191         if (gpa == UNMAPPED_GVA ||
5192             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5193                 goto emul_write;
5194
5195         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5196                 goto emul_write;
5197
5198         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5199         if (is_error_page(page))
5200                 goto emul_write;
5201
5202         kaddr = kmap_atomic(page);
5203         kaddr += offset_in_page(gpa);
5204         switch (bytes) {
5205         case 1:
5206                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5207                 break;
5208         case 2:
5209                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5210                 break;
5211         case 4:
5212                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5213                 break;
5214         case 8:
5215                 exchanged = CMPXCHG64(kaddr, old, new);
5216                 break;
5217         default:
5218                 BUG();
5219         }
5220         kunmap_atomic(kaddr);
5221         kvm_release_page_dirty(page);
5222
5223         if (!exchanged)
5224                 return X86EMUL_CMPXCHG_FAILED;
5225
5226         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5227         kvm_page_track_write(vcpu, gpa, new, bytes);
5228
5229         return X86EMUL_CONTINUE;
5230
5231 emul_write:
5232         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5233
5234         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5235 }
5236
5237 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5238 {
5239         int r = 0, i;
5240
5241         for (i = 0; i < vcpu->arch.pio.count; i++) {
5242                 if (vcpu->arch.pio.in)
5243                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5244                                             vcpu->arch.pio.size, pd);
5245                 else
5246                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5247                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5248                                              pd);
5249                 if (r)
5250                         break;
5251                 pd += vcpu->arch.pio.size;
5252         }
5253         return r;
5254 }
5255
5256 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5257                                unsigned short port, void *val,
5258                                unsigned int count, bool in)
5259 {
5260         vcpu->arch.pio.port = port;
5261         vcpu->arch.pio.in = in;
5262         vcpu->arch.pio.count  = count;
5263         vcpu->arch.pio.size = size;
5264
5265         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5266                 vcpu->arch.pio.count = 0;
5267                 return 1;
5268         }
5269
5270         vcpu->run->exit_reason = KVM_EXIT_IO;
5271         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5272         vcpu->run->io.size = size;
5273         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5274         vcpu->run->io.count = count;
5275         vcpu->run->io.port = port;
5276
5277         return 0;
5278 }
5279
5280 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5281                                     int size, unsigned short port, void *val,
5282                                     unsigned int count)
5283 {
5284         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5285         int ret;
5286
5287         if (vcpu->arch.pio.count)
5288                 goto data_avail;
5289
5290         memset(vcpu->arch.pio_data, 0, size * count);
5291
5292         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5293         if (ret) {
5294 data_avail:
5295                 memcpy(val, vcpu->arch.pio_data, size * count);
5296                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5297                 vcpu->arch.pio.count = 0;
5298                 return 1;
5299         }
5300
5301         return 0;
5302 }
5303
5304 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5305                                      int size, unsigned short port,
5306                                      const void *val, unsigned int count)
5307 {
5308         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5309
5310         memcpy(vcpu->arch.pio_data, val, size * count);
5311         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5312         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5313 }
5314
5315 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5316 {
5317         return kvm_x86_ops->get_segment_base(vcpu, seg);
5318 }
5319
5320 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5321 {
5322         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5323 }
5324
5325 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5326 {
5327         if (!need_emulate_wbinvd(vcpu))
5328                 return X86EMUL_CONTINUE;
5329
5330         if (kvm_x86_ops->has_wbinvd_exit()) {
5331                 int cpu = get_cpu();
5332
5333                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5334                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5335                                 wbinvd_ipi, NULL, 1);
5336                 put_cpu();
5337                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5338         } else
5339                 wbinvd();
5340         return X86EMUL_CONTINUE;
5341 }
5342
5343 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5344 {
5345         kvm_emulate_wbinvd_noskip(vcpu);
5346         return kvm_skip_emulated_instruction(vcpu);
5347 }
5348 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5349
5350
5351
5352 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5353 {
5354         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5355 }
5356
5357 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5358                            unsigned long *dest)
5359 {
5360         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5361 }
5362
5363 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5364                            unsigned long value)
5365 {
5366
5367         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5368 }
5369
5370 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5371 {
5372         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5373 }
5374
5375 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5376 {
5377         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5378         unsigned long value;
5379
5380         switch (cr) {
5381         case 0:
5382                 value = kvm_read_cr0(vcpu);
5383                 break;
5384         case 2:
5385                 value = vcpu->arch.cr2;
5386                 break;
5387         case 3:
5388                 value = kvm_read_cr3(vcpu);
5389                 break;
5390         case 4:
5391                 value = kvm_read_cr4(vcpu);
5392                 break;
5393         case 8:
5394                 value = kvm_get_cr8(vcpu);
5395                 break;
5396         default:
5397                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5398                 return 0;
5399         }
5400
5401         return value;
5402 }
5403
5404 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5405 {
5406         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5407         int res = 0;
5408
5409         switch (cr) {
5410         case 0:
5411                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5412                 break;
5413         case 2:
5414                 vcpu->arch.cr2 = val;
5415                 break;
5416         case 3:
5417                 res = kvm_set_cr3(vcpu, val);
5418                 break;
5419         case 4:
5420                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5421                 break;
5422         case 8:
5423                 res = kvm_set_cr8(vcpu, val);
5424                 break;
5425         default:
5426                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5427                 res = -1;
5428         }
5429
5430         return res;
5431 }
5432
5433 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5434 {
5435         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5436 }
5437
5438 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5439 {
5440         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5441 }
5442
5443 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5444 {
5445         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5446 }
5447
5448 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5449 {
5450         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5451 }
5452
5453 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5454 {
5455         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5456 }
5457
5458 static unsigned long emulator_get_cached_segment_base(
5459         struct x86_emulate_ctxt *ctxt, int seg)
5460 {
5461         return get_segment_base(emul_to_vcpu(ctxt), seg);
5462 }
5463
5464 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5465                                  struct desc_struct *desc, u32 *base3,
5466                                  int seg)
5467 {
5468         struct kvm_segment var;
5469
5470         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5471         *selector = var.selector;
5472
5473         if (var.unusable) {
5474                 memset(desc, 0, sizeof(*desc));
5475                 if (base3)
5476                         *base3 = 0;
5477                 return false;
5478         }
5479
5480         if (var.g)
5481                 var.limit >>= 12;
5482         set_desc_limit(desc, var.limit);
5483         set_desc_base(desc, (unsigned long)var.base);
5484 #ifdef CONFIG_X86_64
5485         if (base3)
5486                 *base3 = var.base >> 32;
5487 #endif
5488         desc->type = var.type;
5489         desc->s = var.s;
5490         desc->dpl = var.dpl;
5491         desc->p = var.present;
5492         desc->avl = var.avl;
5493         desc->l = var.l;
5494         desc->d = var.db;
5495         desc->g = var.g;
5496
5497         return true;
5498 }
5499
5500 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5501                                  struct desc_struct *desc, u32 base3,
5502                                  int seg)
5503 {
5504         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5505         struct kvm_segment var;
5506
5507         var.selector = selector;
5508         var.base = get_desc_base(desc);
5509 #ifdef CONFIG_X86_64
5510         var.base |= ((u64)base3) << 32;
5511 #endif
5512         var.limit = get_desc_limit(desc);
5513         if (desc->g)
5514                 var.limit = (var.limit << 12) | 0xfff;
5515         var.type = desc->type;
5516         var.dpl = desc->dpl;
5517         var.db = desc->d;
5518         var.s = desc->s;
5519         var.l = desc->l;
5520         var.g = desc->g;
5521         var.avl = desc->avl;
5522         var.present = desc->p;
5523         var.unusable = !var.present;
5524         var.padding = 0;
5525
5526         kvm_set_segment(vcpu, &var, seg);
5527         return;
5528 }
5529
5530 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5531                             u32 msr_index, u64 *pdata)
5532 {
5533         struct msr_data msr;
5534         int r;
5535
5536         msr.index = msr_index;
5537         msr.host_initiated = false;
5538         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5539         if (r)
5540                 return r;
5541
5542         *pdata = msr.data;
5543         return 0;
5544 }
5545
5546 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5547                             u32 msr_index, u64 data)
5548 {
5549         struct msr_data msr;
5550
5551         msr.data = data;
5552         msr.index = msr_index;
5553         msr.host_initiated = false;
5554         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5555 }
5556
5557 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5558 {
5559         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5560
5561         return vcpu->arch.smbase;
5562 }
5563
5564 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5565 {
5566         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5567
5568         vcpu->arch.smbase = smbase;
5569 }
5570
5571 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5572                               u32 pmc)
5573 {
5574         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5575 }
5576
5577 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5578                              u32 pmc, u64 *pdata)
5579 {
5580         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5581 }
5582
5583 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5584 {
5585         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5586 }
5587
5588 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5589                               struct x86_instruction_info *info,
5590                               enum x86_intercept_stage stage)
5591 {
5592         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5593 }
5594
5595 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5596                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5597 {
5598         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5599 }
5600
5601 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5602 {
5603         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5604 }
5605
5606 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5607 {
5608         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5609 }
5610
5611 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5612 {
5613         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5614 }
5615
5616 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5617 {
5618         return emul_to_vcpu(ctxt)->arch.hflags;
5619 }
5620
5621 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5622 {
5623         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5624 }
5625
5626 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5627 {
5628         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5629 }
5630
5631 static const struct x86_emulate_ops emulate_ops = {
5632         .read_gpr            = emulator_read_gpr,
5633         .write_gpr           = emulator_write_gpr,
5634         .read_std            = emulator_read_std,
5635         .write_std           = emulator_write_std,
5636         .read_phys           = kvm_read_guest_phys_system,
5637         .fetch               = kvm_fetch_guest_virt,
5638         .read_emulated       = emulator_read_emulated,
5639         .write_emulated      = emulator_write_emulated,
5640         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5641         .invlpg              = emulator_invlpg,
5642         .pio_in_emulated     = emulator_pio_in_emulated,
5643         .pio_out_emulated    = emulator_pio_out_emulated,
5644         .get_segment         = emulator_get_segment,
5645         .set_segment         = emulator_set_segment,
5646         .get_cached_segment_base = emulator_get_cached_segment_base,
5647         .get_gdt             = emulator_get_gdt,
5648         .get_idt             = emulator_get_idt,
5649         .set_gdt             = emulator_set_gdt,
5650         .set_idt             = emulator_set_idt,
5651         .get_cr              = emulator_get_cr,
5652         .set_cr              = emulator_set_cr,
5653         .cpl                 = emulator_get_cpl,
5654         .get_dr              = emulator_get_dr,
5655         .set_dr              = emulator_set_dr,
5656         .get_smbase          = emulator_get_smbase,
5657         .set_smbase          = emulator_set_smbase,
5658         .set_msr             = emulator_set_msr,
5659         .get_msr             = emulator_get_msr,
5660         .check_pmc           = emulator_check_pmc,
5661         .read_pmc            = emulator_read_pmc,
5662         .halt                = emulator_halt,
5663         .wbinvd              = emulator_wbinvd,
5664         .fix_hypercall       = emulator_fix_hypercall,
5665         .intercept           = emulator_intercept,
5666         .get_cpuid           = emulator_get_cpuid,
5667         .set_nmi_mask        = emulator_set_nmi_mask,
5668         .get_hflags          = emulator_get_hflags,
5669         .set_hflags          = emulator_set_hflags,
5670         .pre_leave_smm       = emulator_pre_leave_smm,
5671 };
5672
5673 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5674 {
5675         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5676         /*
5677          * an sti; sti; sequence only disable interrupts for the first
5678          * instruction. So, if the last instruction, be it emulated or
5679          * not, left the system with the INT_STI flag enabled, it
5680          * means that the last instruction is an sti. We should not
5681          * leave the flag on in this case. The same goes for mov ss
5682          */
5683         if (int_shadow & mask)
5684                 mask = 0;
5685         if (unlikely(int_shadow || mask)) {
5686                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5687                 if (!mask)
5688                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5689         }
5690 }
5691
5692 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5693 {
5694         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5695         if (ctxt->exception.vector == PF_VECTOR)
5696                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5697
5698         if (ctxt->exception.error_code_valid)
5699                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5700                                       ctxt->exception.error_code);
5701         else
5702                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5703         return false;
5704 }
5705
5706 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5707 {
5708         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5709         int cs_db, cs_l;
5710
5711         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5712
5713         ctxt->eflags = kvm_get_rflags(vcpu);
5714         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5715
5716         ctxt->eip = kvm_rip_read(vcpu);
5717         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5718                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5719                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5720                      cs_db                              ? X86EMUL_MODE_PROT32 :
5721                                                           X86EMUL_MODE_PROT16;
5722         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5723         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5724         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5725
5726         init_decode_cache(ctxt);
5727         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5728 }
5729
5730 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5731 {
5732         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5733         int ret;
5734
5735         init_emulate_ctxt(vcpu);
5736
5737         ctxt->op_bytes = 2;
5738         ctxt->ad_bytes = 2;
5739         ctxt->_eip = ctxt->eip + inc_eip;
5740         ret = emulate_int_real(ctxt, irq);
5741
5742         if (ret != X86EMUL_CONTINUE)
5743                 return EMULATE_FAIL;
5744
5745         ctxt->eip = ctxt->_eip;
5746         kvm_rip_write(vcpu, ctxt->eip);
5747         kvm_set_rflags(vcpu, ctxt->eflags);
5748
5749         return EMULATE_DONE;
5750 }
5751 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5752
5753 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
5754 {
5755         int r = EMULATE_DONE;
5756
5757         ++vcpu->stat.insn_emulation_fail;
5758         trace_kvm_emulate_insn_failed(vcpu);
5759
5760         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
5761                 return EMULATE_FAIL;
5762
5763         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5764                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5765                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5766                 vcpu->run->internal.ndata = 0;
5767                 r = EMULATE_USER_EXIT;
5768         }
5769
5770         kvm_queue_exception(vcpu, UD_VECTOR);
5771
5772         return r;
5773 }
5774
5775 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5776                                   bool write_fault_to_shadow_pgtable,
5777                                   int emulation_type)
5778 {
5779         gpa_t gpa = cr2;
5780         kvm_pfn_t pfn;
5781
5782         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5783                 return false;
5784
5785         if (!vcpu->arch.mmu.direct_map) {
5786                 /*
5787                  * Write permission should be allowed since only
5788                  * write access need to be emulated.
5789                  */
5790                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5791
5792                 /*
5793                  * If the mapping is invalid in guest, let cpu retry
5794                  * it to generate fault.
5795                  */
5796                 if (gpa == UNMAPPED_GVA)
5797                         return true;
5798         }
5799
5800         /*
5801          * Do not retry the unhandleable instruction if it faults on the
5802          * readonly host memory, otherwise it will goto a infinite loop:
5803          * retry instruction -> write #PF -> emulation fail -> retry
5804          * instruction -> ...
5805          */
5806         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5807
5808         /*
5809          * If the instruction failed on the error pfn, it can not be fixed,
5810          * report the error to userspace.
5811          */
5812         if (is_error_noslot_pfn(pfn))
5813                 return false;
5814
5815         kvm_release_pfn_clean(pfn);
5816
5817         /* The instructions are well-emulated on direct mmu. */
5818         if (vcpu->arch.mmu.direct_map) {
5819                 unsigned int indirect_shadow_pages;
5820
5821                 spin_lock(&vcpu->kvm->mmu_lock);
5822                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5823                 spin_unlock(&vcpu->kvm->mmu_lock);
5824
5825                 if (indirect_shadow_pages)
5826                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5827
5828                 return true;
5829         }
5830
5831         /*
5832          * if emulation was due to access to shadowed page table
5833          * and it failed try to unshadow page and re-enter the
5834          * guest to let CPU execute the instruction.
5835          */
5836         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5837
5838         /*
5839          * If the access faults on its page table, it can not
5840          * be fixed by unprotecting shadow page and it should
5841          * be reported to userspace.
5842          */
5843         return !write_fault_to_shadow_pgtable;
5844 }
5845
5846 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5847                               unsigned long cr2,  int emulation_type)
5848 {
5849         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5850         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5851
5852         last_retry_eip = vcpu->arch.last_retry_eip;
5853         last_retry_addr = vcpu->arch.last_retry_addr;
5854
5855         /*
5856          * If the emulation is caused by #PF and it is non-page_table
5857          * writing instruction, it means the VM-EXIT is caused by shadow
5858          * page protected, we can zap the shadow page and retry this
5859          * instruction directly.
5860          *
5861          * Note: if the guest uses a non-page-table modifying instruction
5862          * on the PDE that points to the instruction, then we will unmap
5863          * the instruction and go to an infinite loop. So, we cache the
5864          * last retried eip and the last fault address, if we meet the eip
5865          * and the address again, we can break out of the potential infinite
5866          * loop.
5867          */
5868         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5869
5870         if (!(emulation_type & EMULTYPE_RETRY))
5871                 return false;
5872
5873         if (x86_page_table_writing_insn(ctxt))
5874                 return false;
5875
5876         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5877                 return false;
5878
5879         vcpu->arch.last_retry_eip = ctxt->eip;
5880         vcpu->arch.last_retry_addr = cr2;
5881
5882         if (!vcpu->arch.mmu.direct_map)
5883                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5884
5885         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5886
5887         return true;
5888 }
5889
5890 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5891 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5892
5893 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5894 {
5895         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5896                 /* This is a good place to trace that we are exiting SMM.  */
5897                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5898
5899                 /* Process a latched INIT or SMI, if any.  */
5900                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5901         }
5902
5903         kvm_mmu_reset_context(vcpu);
5904 }
5905
5906 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5907 {
5908         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5909
5910         vcpu->arch.hflags = emul_flags;
5911
5912         if (changed & HF_SMM_MASK)
5913                 kvm_smm_changed(vcpu);
5914 }
5915
5916 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5917                                 unsigned long *db)
5918 {
5919         u32 dr6 = 0;
5920         int i;
5921         u32 enable, rwlen;
5922
5923         enable = dr7;
5924         rwlen = dr7 >> 16;
5925         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5926                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5927                         dr6 |= (1 << i);
5928         return dr6;
5929 }
5930
5931 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5932 {
5933         struct kvm_run *kvm_run = vcpu->run;
5934
5935         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5936                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5937                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5938                 kvm_run->debug.arch.exception = DB_VECTOR;
5939                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5940                 *r = EMULATE_USER_EXIT;
5941         } else {
5942                 /*
5943                  * "Certain debug exceptions may clear bit 0-3.  The
5944                  * remaining contents of the DR6 register are never
5945                  * cleared by the processor".
5946                  */
5947                 vcpu->arch.dr6 &= ~15;
5948                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5949                 kvm_queue_exception(vcpu, DB_VECTOR);
5950         }
5951 }
5952
5953 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5954 {
5955         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5956         int r = EMULATE_DONE;
5957
5958         kvm_x86_ops->skip_emulated_instruction(vcpu);
5959
5960         /*
5961          * rflags is the old, "raw" value of the flags.  The new value has
5962          * not been saved yet.
5963          *
5964          * This is correct even for TF set by the guest, because "the
5965          * processor will not generate this exception after the instruction
5966          * that sets the TF flag".
5967          */
5968         if (unlikely(rflags & X86_EFLAGS_TF))
5969                 kvm_vcpu_do_singlestep(vcpu, &r);
5970         return r == EMULATE_DONE;
5971 }
5972 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5973
5974 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5975 {
5976         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5977             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5978                 struct kvm_run *kvm_run = vcpu->run;
5979                 unsigned long eip = kvm_get_linear_rip(vcpu);
5980                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5981                                            vcpu->arch.guest_debug_dr7,
5982                                            vcpu->arch.eff_db);
5983
5984                 if (dr6 != 0) {
5985                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5986                         kvm_run->debug.arch.pc = eip;
5987                         kvm_run->debug.arch.exception = DB_VECTOR;
5988                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5989                         *r = EMULATE_USER_EXIT;
5990                         return true;
5991                 }
5992         }
5993
5994         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5995             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5996                 unsigned long eip = kvm_get_linear_rip(vcpu);
5997                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5998                                            vcpu->arch.dr7,
5999                                            vcpu->arch.db);
6000
6001                 if (dr6 != 0) {
6002                         vcpu->arch.dr6 &= ~15;
6003                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6004                         kvm_queue_exception(vcpu, DB_VECTOR);
6005                         *r = EMULATE_DONE;
6006                         return true;
6007                 }
6008         }
6009
6010         return false;
6011 }
6012
6013 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6014 {
6015         switch (ctxt->opcode_len) {
6016         case 1:
6017                 switch (ctxt->b) {
6018                 case 0xe4:      /* IN */
6019                 case 0xe5:
6020                 case 0xec:
6021                 case 0xed:
6022                 case 0xe6:      /* OUT */
6023                 case 0xe7:
6024                 case 0xee:
6025                 case 0xef:
6026                 case 0x6c:      /* INS */
6027                 case 0x6d:
6028                 case 0x6e:      /* OUTS */
6029                 case 0x6f:
6030                         return true;
6031                 }
6032                 break;
6033         case 2:
6034                 switch (ctxt->b) {
6035                 case 0x33:      /* RDPMC */
6036                         return true;
6037                 }
6038                 break;
6039         }
6040
6041         return false;
6042 }
6043
6044 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6045                             unsigned long cr2,
6046                             int emulation_type,
6047                             void *insn,
6048                             int insn_len)
6049 {
6050         int r;
6051         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6052         bool writeback = true;
6053         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6054
6055         /*
6056          * Clear write_fault_to_shadow_pgtable here to ensure it is
6057          * never reused.
6058          */
6059         vcpu->arch.write_fault_to_shadow_pgtable = false;
6060         kvm_clear_exception_queue(vcpu);
6061
6062         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6063                 init_emulate_ctxt(vcpu);
6064
6065                 /*
6066                  * We will reenter on the same instruction since
6067                  * we do not set complete_userspace_io.  This does not
6068                  * handle watchpoints yet, those would be handled in
6069                  * the emulate_ops.
6070                  */
6071                 if (!(emulation_type & EMULTYPE_SKIP) &&
6072                     kvm_vcpu_check_breakpoint(vcpu, &r))
6073                         return r;
6074
6075                 ctxt->interruptibility = 0;
6076                 ctxt->have_exception = false;
6077                 ctxt->exception.vector = -1;
6078                 ctxt->perm_ok = false;
6079
6080                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6081
6082                 r = x86_decode_insn(ctxt, insn, insn_len);
6083
6084                 trace_kvm_emulate_insn_start(vcpu);
6085                 ++vcpu->stat.insn_emulation;
6086                 if (r != EMULATION_OK)  {
6087                         if (emulation_type & EMULTYPE_TRAP_UD)
6088                                 return EMULATE_FAIL;
6089                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6090                                                 emulation_type))
6091                                 return EMULATE_DONE;
6092                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6093                                 return EMULATE_DONE;
6094                         if (emulation_type & EMULTYPE_SKIP)
6095                                 return EMULATE_FAIL;
6096                         return handle_emulation_failure(vcpu, emulation_type);
6097                 }
6098         }
6099
6100         if ((emulation_type & EMULTYPE_VMWARE) &&
6101             !is_vmware_backdoor_opcode(ctxt))
6102                 return EMULATE_FAIL;
6103
6104         if (emulation_type & EMULTYPE_SKIP) {
6105                 kvm_rip_write(vcpu, ctxt->_eip);
6106                 if (ctxt->eflags & X86_EFLAGS_RF)
6107                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6108                 return EMULATE_DONE;
6109         }
6110
6111         if (retry_instruction(ctxt, cr2, emulation_type))
6112                 return EMULATE_DONE;
6113
6114         /* this is needed for vmware backdoor interface to work since it
6115            changes registers values  during IO operation */
6116         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6117                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6118                 emulator_invalidate_register_cache(ctxt);
6119         }
6120
6121 restart:
6122         /* Save the faulting GPA (cr2) in the address field */
6123         ctxt->exception.address = cr2;
6124
6125         r = x86_emulate_insn(ctxt);
6126
6127         if (r == EMULATION_INTERCEPTED)
6128                 return EMULATE_DONE;
6129
6130         if (r == EMULATION_FAILED) {
6131                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6132                                         emulation_type))
6133                         return EMULATE_DONE;
6134
6135                 return handle_emulation_failure(vcpu, emulation_type);
6136         }
6137
6138         if (ctxt->have_exception) {
6139                 r = EMULATE_DONE;
6140                 if (inject_emulated_exception(vcpu))
6141                         return r;
6142         } else if (vcpu->arch.pio.count) {
6143                 if (!vcpu->arch.pio.in) {
6144                         /* FIXME: return into emulator if single-stepping.  */
6145                         vcpu->arch.pio.count = 0;
6146                 } else {
6147                         writeback = false;
6148                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6149                 }
6150                 r = EMULATE_USER_EXIT;
6151         } else if (vcpu->mmio_needed) {
6152                 if (!vcpu->mmio_is_write)
6153                         writeback = false;
6154                 r = EMULATE_USER_EXIT;
6155                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6156         } else if (r == EMULATION_RESTART)
6157                 goto restart;
6158         else
6159                 r = EMULATE_DONE;
6160
6161         if (writeback) {
6162                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6163                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6164                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6165                 kvm_rip_write(vcpu, ctxt->eip);
6166                 if (r == EMULATE_DONE &&
6167                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6168                         kvm_vcpu_do_singlestep(vcpu, &r);
6169                 if (!ctxt->have_exception ||
6170                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6171                         __kvm_set_rflags(vcpu, ctxt->eflags);
6172
6173                 /*
6174                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6175                  * do nothing, and it will be requested again as soon as
6176                  * the shadow expires.  But we still need to check here,
6177                  * because POPF has no interrupt shadow.
6178                  */
6179                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6180                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6181         } else
6182                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6183
6184         return r;
6185 }
6186 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
6187
6188 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6189                             unsigned short port)
6190 {
6191         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6192         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6193                                             size, port, &val, 1);
6194         /* do not return to emulator after return from userspace */
6195         vcpu->arch.pio.count = 0;
6196         return ret;
6197 }
6198
6199 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6200 {
6201         unsigned long val;
6202
6203         /* We should only ever be called with arch.pio.count equal to 1 */
6204         BUG_ON(vcpu->arch.pio.count != 1);
6205
6206         /* For size less than 4 we merge, else we zero extend */
6207         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6208                                         : 0;
6209
6210         /*
6211          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6212          * the copy and tracing
6213          */
6214         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6215                                  vcpu->arch.pio.port, &val, 1);
6216         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6217
6218         return 1;
6219 }
6220
6221 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6222                            unsigned short port)
6223 {
6224         unsigned long val;
6225         int ret;
6226
6227         /* For size less than 4 we merge, else we zero extend */
6228         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6229
6230         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6231                                        &val, 1);
6232         if (ret) {
6233                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6234                 return ret;
6235         }
6236
6237         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6238
6239         return 0;
6240 }
6241
6242 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6243 {
6244         int ret = kvm_skip_emulated_instruction(vcpu);
6245
6246         /*
6247          * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
6248          * KVM_EXIT_DEBUG here.
6249          */
6250         if (in)
6251                 return kvm_fast_pio_in(vcpu, size, port) && ret;
6252         else
6253                 return kvm_fast_pio_out(vcpu, size, port) && ret;
6254 }
6255 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6256
6257 static int kvmclock_cpu_down_prep(unsigned int cpu)
6258 {
6259         __this_cpu_write(cpu_tsc_khz, 0);
6260         return 0;
6261 }
6262
6263 static void tsc_khz_changed(void *data)
6264 {
6265         struct cpufreq_freqs *freq = data;
6266         unsigned long khz = 0;
6267
6268         if (data)
6269                 khz = freq->new;
6270         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6271                 khz = cpufreq_quick_get(raw_smp_processor_id());
6272         if (!khz)
6273                 khz = tsc_khz;
6274         __this_cpu_write(cpu_tsc_khz, khz);
6275 }
6276
6277 #ifdef CONFIG_X86_64
6278 static void kvm_hyperv_tsc_notifier(void)
6279 {
6280         struct kvm *kvm;
6281         struct kvm_vcpu *vcpu;
6282         int cpu;
6283
6284         spin_lock(&kvm_lock);
6285         list_for_each_entry(kvm, &vm_list, vm_list)
6286                 kvm_make_mclock_inprogress_request(kvm);
6287
6288         hyperv_stop_tsc_emulation();
6289
6290         /* TSC frequency always matches when on Hyper-V */
6291         for_each_present_cpu(cpu)
6292                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6293         kvm_max_guest_tsc_khz = tsc_khz;
6294
6295         list_for_each_entry(kvm, &vm_list, vm_list) {
6296                 struct kvm_arch *ka = &kvm->arch;
6297
6298                 spin_lock(&ka->pvclock_gtod_sync_lock);
6299
6300                 pvclock_update_vm_gtod_copy(kvm);
6301
6302                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6303                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6304
6305                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6306                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6307
6308                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6309         }
6310         spin_unlock(&kvm_lock);
6311 }
6312 #endif
6313
6314 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6315                                      void *data)
6316 {
6317         struct cpufreq_freqs *freq = data;
6318         struct kvm *kvm;
6319         struct kvm_vcpu *vcpu;
6320         int i, send_ipi = 0;
6321
6322         /*
6323          * We allow guests to temporarily run on slowing clocks,
6324          * provided we notify them after, or to run on accelerating
6325          * clocks, provided we notify them before.  Thus time never
6326          * goes backwards.
6327          *
6328          * However, we have a problem.  We can't atomically update
6329          * the frequency of a given CPU from this function; it is
6330          * merely a notifier, which can be called from any CPU.
6331          * Changing the TSC frequency at arbitrary points in time
6332          * requires a recomputation of local variables related to
6333          * the TSC for each VCPU.  We must flag these local variables
6334          * to be updated and be sure the update takes place with the
6335          * new frequency before any guests proceed.
6336          *
6337          * Unfortunately, the combination of hotplug CPU and frequency
6338          * change creates an intractable locking scenario; the order
6339          * of when these callouts happen is undefined with respect to
6340          * CPU hotplug, and they can race with each other.  As such,
6341          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6342          * undefined; you can actually have a CPU frequency change take
6343          * place in between the computation of X and the setting of the
6344          * variable.  To protect against this problem, all updates of
6345          * the per_cpu tsc_khz variable are done in an interrupt
6346          * protected IPI, and all callers wishing to update the value
6347          * must wait for a synchronous IPI to complete (which is trivial
6348          * if the caller is on the CPU already).  This establishes the
6349          * necessary total order on variable updates.
6350          *
6351          * Note that because a guest time update may take place
6352          * anytime after the setting of the VCPU's request bit, the
6353          * correct TSC value must be set before the request.  However,
6354          * to ensure the update actually makes it to any guest which
6355          * starts running in hardware virtualization between the set
6356          * and the acquisition of the spinlock, we must also ping the
6357          * CPU after setting the request bit.
6358          *
6359          */
6360
6361         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6362                 return 0;
6363         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6364                 return 0;
6365
6366         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6367
6368         spin_lock(&kvm_lock);
6369         list_for_each_entry(kvm, &vm_list, vm_list) {
6370                 kvm_for_each_vcpu(i, vcpu, kvm) {
6371                         if (vcpu->cpu != freq->cpu)
6372                                 continue;
6373                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6374                         if (vcpu->cpu != smp_processor_id())
6375                                 send_ipi = 1;
6376                 }
6377         }
6378         spin_unlock(&kvm_lock);
6379
6380         if (freq->old < freq->new && send_ipi) {
6381                 /*
6382                  * We upscale the frequency.  Must make the guest
6383                  * doesn't see old kvmclock values while running with
6384                  * the new frequency, otherwise we risk the guest sees
6385                  * time go backwards.
6386                  *
6387                  * In case we update the frequency for another cpu
6388                  * (which might be in guest context) send an interrupt
6389                  * to kick the cpu out of guest context.  Next time
6390                  * guest context is entered kvmclock will be updated,
6391                  * so the guest will not see stale values.
6392                  */
6393                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6394         }
6395         return 0;
6396 }
6397
6398 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6399         .notifier_call  = kvmclock_cpufreq_notifier
6400 };
6401
6402 static int kvmclock_cpu_online(unsigned int cpu)
6403 {
6404         tsc_khz_changed(NULL);
6405         return 0;
6406 }
6407
6408 static void kvm_timer_init(void)
6409 {
6410         max_tsc_khz = tsc_khz;
6411
6412         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6413 #ifdef CONFIG_CPU_FREQ
6414                 struct cpufreq_policy policy;
6415                 int cpu;
6416
6417                 memset(&policy, 0, sizeof(policy));
6418                 cpu = get_cpu();
6419                 cpufreq_get_policy(&policy, cpu);
6420                 if (policy.cpuinfo.max_freq)
6421                         max_tsc_khz = policy.cpuinfo.max_freq;
6422                 put_cpu();
6423 #endif
6424                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6425                                           CPUFREQ_TRANSITION_NOTIFIER);
6426         }
6427         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6428
6429         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6430                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6431 }
6432
6433 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6434 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6435
6436 int kvm_is_in_guest(void)
6437 {
6438         return __this_cpu_read(current_vcpu) != NULL;
6439 }
6440
6441 static int kvm_is_user_mode(void)
6442 {
6443         int user_mode = 3;
6444
6445         if (__this_cpu_read(current_vcpu))
6446                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6447
6448         return user_mode != 0;
6449 }
6450
6451 static unsigned long kvm_get_guest_ip(void)
6452 {
6453         unsigned long ip = 0;
6454
6455         if (__this_cpu_read(current_vcpu))
6456                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6457
6458         return ip;
6459 }
6460
6461 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6462         .is_in_guest            = kvm_is_in_guest,
6463         .is_user_mode           = kvm_is_user_mode,
6464         .get_guest_ip           = kvm_get_guest_ip,
6465 };
6466
6467 static void kvm_set_mmio_spte_mask(void)
6468 {
6469         u64 mask;
6470         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6471
6472         /*
6473          * Set the reserved bits and the present bit of an paging-structure
6474          * entry to generate page fault with PFER.RSV = 1.
6475          */
6476          /* Mask the reserved physical address bits. */
6477         mask = rsvd_bits(maxphyaddr, 51);
6478
6479         /* Set the present bit. */
6480         mask |= 1ull;
6481
6482 #ifdef CONFIG_X86_64
6483         /*
6484          * If reserved bit is not supported, clear the present bit to disable
6485          * mmio page fault.
6486          */
6487         if (maxphyaddr == 52)
6488                 mask &= ~1ull;
6489 #endif
6490
6491         kvm_mmu_set_mmio_spte_mask(mask, mask);
6492 }
6493
6494 #ifdef CONFIG_X86_64
6495 static void pvclock_gtod_update_fn(struct work_struct *work)
6496 {
6497         struct kvm *kvm;
6498
6499         struct kvm_vcpu *vcpu;
6500         int i;
6501
6502         spin_lock(&kvm_lock);
6503         list_for_each_entry(kvm, &vm_list, vm_list)
6504                 kvm_for_each_vcpu(i, vcpu, kvm)
6505                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6506         atomic_set(&kvm_guest_has_master_clock, 0);
6507         spin_unlock(&kvm_lock);
6508 }
6509
6510 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6511
6512 /*
6513  * Notification about pvclock gtod data update.
6514  */
6515 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6516                                void *priv)
6517 {
6518         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6519         struct timekeeper *tk = priv;
6520
6521         update_pvclock_gtod(tk);
6522
6523         /* disable master clock if host does not trust, or does not
6524          * use, TSC based clocksource.
6525          */
6526         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6527             atomic_read(&kvm_guest_has_master_clock) != 0)
6528                 queue_work(system_long_wq, &pvclock_gtod_work);
6529
6530         return 0;
6531 }
6532
6533 static struct notifier_block pvclock_gtod_notifier = {
6534         .notifier_call = pvclock_gtod_notify,
6535 };
6536 #endif
6537
6538 int kvm_arch_init(void *opaque)
6539 {
6540         int r;
6541         struct kvm_x86_ops *ops = opaque;
6542
6543         if (kvm_x86_ops) {
6544                 printk(KERN_ERR "kvm: already loaded the other module\n");
6545                 r = -EEXIST;
6546                 goto out;
6547         }
6548
6549         if (!ops->cpu_has_kvm_support()) {
6550                 printk(KERN_ERR "kvm: no hardware support\n");
6551                 r = -EOPNOTSUPP;
6552                 goto out;
6553         }
6554         if (ops->disabled_by_bios()) {
6555                 printk(KERN_ERR "kvm: disabled by bios\n");
6556                 r = -EOPNOTSUPP;
6557                 goto out;
6558         }
6559
6560         r = -ENOMEM;
6561         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6562         if (!shared_msrs) {
6563                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6564                 goto out;
6565         }
6566
6567         r = kvm_mmu_module_init();
6568         if (r)
6569                 goto out_free_percpu;
6570
6571         kvm_set_mmio_spte_mask();
6572
6573         kvm_x86_ops = ops;
6574
6575         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6576                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6577                         PT_PRESENT_MASK, 0, sme_me_mask);
6578         kvm_timer_init();
6579
6580         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6581
6582         if (boot_cpu_has(X86_FEATURE_XSAVE))
6583                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6584
6585         kvm_lapic_init();
6586 #ifdef CONFIG_X86_64
6587         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6588
6589         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6590                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6591 #endif
6592
6593         return 0;
6594
6595 out_free_percpu:
6596         free_percpu(shared_msrs);
6597 out:
6598         return r;
6599 }
6600
6601 void kvm_arch_exit(void)
6602 {
6603 #ifdef CONFIG_X86_64
6604         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6605                 clear_hv_tscchange_cb();
6606 #endif
6607         kvm_lapic_exit();
6608         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6609
6610         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6611                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6612                                             CPUFREQ_TRANSITION_NOTIFIER);
6613         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6614 #ifdef CONFIG_X86_64
6615         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6616 #endif
6617         kvm_x86_ops = NULL;
6618         kvm_mmu_module_exit();
6619         free_percpu(shared_msrs);
6620 }
6621
6622 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6623 {
6624         ++vcpu->stat.halt_exits;
6625         if (lapic_in_kernel(vcpu)) {
6626                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6627                 return 1;
6628         } else {
6629                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6630                 return 0;
6631         }
6632 }
6633 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6634
6635 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6636 {
6637         int ret = kvm_skip_emulated_instruction(vcpu);
6638         /*
6639          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6640          * KVM_EXIT_DEBUG here.
6641          */
6642         return kvm_vcpu_halt(vcpu) && ret;
6643 }
6644 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6645
6646 #ifdef CONFIG_X86_64
6647 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6648                                 unsigned long clock_type)
6649 {
6650         struct kvm_clock_pairing clock_pairing;
6651         struct timespec64 ts;
6652         u64 cycle;
6653         int ret;
6654
6655         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6656                 return -KVM_EOPNOTSUPP;
6657
6658         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6659                 return -KVM_EOPNOTSUPP;
6660
6661         clock_pairing.sec = ts.tv_sec;
6662         clock_pairing.nsec = ts.tv_nsec;
6663         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6664         clock_pairing.flags = 0;
6665
6666         ret = 0;
6667         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6668                             sizeof(struct kvm_clock_pairing)))
6669                 ret = -KVM_EFAULT;
6670
6671         return ret;
6672 }
6673 #endif
6674
6675 /*
6676  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6677  *
6678  * @apicid - apicid of vcpu to be kicked.
6679  */
6680 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6681 {
6682         struct kvm_lapic_irq lapic_irq;
6683
6684         lapic_irq.shorthand = 0;
6685         lapic_irq.dest_mode = 0;
6686         lapic_irq.level = 0;
6687         lapic_irq.dest_id = apicid;
6688         lapic_irq.msi_redir_hint = false;
6689
6690         lapic_irq.delivery_mode = APIC_DM_REMRD;
6691         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6692 }
6693
6694 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6695 {
6696         vcpu->arch.apicv_active = false;
6697         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6698 }
6699
6700 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6701 {
6702         unsigned long nr, a0, a1, a2, a3, ret;
6703         int op_64_bit;
6704
6705         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6706                 return kvm_hv_hypercall(vcpu);
6707
6708         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6709         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6710         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6711         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6712         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6713
6714         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6715
6716         op_64_bit = is_64_bit_mode(vcpu);
6717         if (!op_64_bit) {
6718                 nr &= 0xFFFFFFFF;
6719                 a0 &= 0xFFFFFFFF;
6720                 a1 &= 0xFFFFFFFF;
6721                 a2 &= 0xFFFFFFFF;
6722                 a3 &= 0xFFFFFFFF;
6723         }
6724
6725         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6726                 ret = -KVM_EPERM;
6727                 goto out;
6728         }
6729
6730         switch (nr) {
6731         case KVM_HC_VAPIC_POLL_IRQ:
6732                 ret = 0;
6733                 break;
6734         case KVM_HC_KICK_CPU:
6735                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6736                 ret = 0;
6737                 break;
6738 #ifdef CONFIG_X86_64
6739         case KVM_HC_CLOCK_PAIRING:
6740                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6741                 break;
6742 #endif
6743         default:
6744                 ret = -KVM_ENOSYS;
6745                 break;
6746         }
6747 out:
6748         if (!op_64_bit)
6749                 ret = (u32)ret;
6750         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6751
6752         ++vcpu->stat.hypercalls;
6753         return kvm_skip_emulated_instruction(vcpu);
6754 }
6755 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6756
6757 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6758 {
6759         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6760         char instruction[3];
6761         unsigned long rip = kvm_rip_read(vcpu);
6762
6763         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6764
6765         return emulator_write_emulated(ctxt, rip, instruction, 3,
6766                 &ctxt->exception);
6767 }
6768
6769 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6770 {
6771         return vcpu->run->request_interrupt_window &&
6772                 likely(!pic_in_kernel(vcpu->kvm));
6773 }
6774
6775 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6776 {
6777         struct kvm_run *kvm_run = vcpu->run;
6778
6779         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6780         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6781         kvm_run->cr8 = kvm_get_cr8(vcpu);
6782         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6783         kvm_run->ready_for_interrupt_injection =
6784                 pic_in_kernel(vcpu->kvm) ||
6785                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6786 }
6787
6788 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6789 {
6790         int max_irr, tpr;
6791
6792         if (!kvm_x86_ops->update_cr8_intercept)
6793                 return;
6794
6795         if (!lapic_in_kernel(vcpu))
6796                 return;
6797
6798         if (vcpu->arch.apicv_active)
6799                 return;
6800
6801         if (!vcpu->arch.apic->vapic_addr)
6802                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6803         else
6804                 max_irr = -1;
6805
6806         if (max_irr != -1)
6807                 max_irr >>= 4;
6808
6809         tpr = kvm_lapic_get_cr8(vcpu);
6810
6811         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6812 }
6813
6814 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6815 {
6816         int r;
6817
6818         /* try to reinject previous events if any */
6819
6820         if (vcpu->arch.exception.injected)
6821                 kvm_x86_ops->queue_exception(vcpu);
6822         /*
6823          * Do not inject an NMI or interrupt if there is a pending
6824          * exception.  Exceptions and interrupts are recognized at
6825          * instruction boundaries, i.e. the start of an instruction.
6826          * Trap-like exceptions, e.g. #DB, have higher priority than
6827          * NMIs and interrupts, i.e. traps are recognized before an
6828          * NMI/interrupt that's pending on the same instruction.
6829          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
6830          * priority, but are only generated (pended) during instruction
6831          * execution, i.e. a pending fault-like exception means the
6832          * fault occurred on the *previous* instruction and must be
6833          * serviced prior to recognizing any new events in order to
6834          * fully complete the previous instruction.
6835          */
6836         else if (!vcpu->arch.exception.pending) {
6837                 if (vcpu->arch.nmi_injected)
6838                         kvm_x86_ops->set_nmi(vcpu);
6839                 else if (vcpu->arch.interrupt.injected)
6840                         kvm_x86_ops->set_irq(vcpu);
6841         }
6842
6843         /*
6844          * Call check_nested_events() even if we reinjected a previous event
6845          * in order for caller to determine if it should require immediate-exit
6846          * from L2 to L1 due to pending L1 events which require exit
6847          * from L2 to L1.
6848          */
6849         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6850                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6851                 if (r != 0)
6852                         return r;
6853         }
6854
6855         /* try to inject new event if pending */
6856         if (vcpu->arch.exception.pending) {
6857                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6858                                         vcpu->arch.exception.has_error_code,
6859                                         vcpu->arch.exception.error_code);
6860
6861                 WARN_ON_ONCE(vcpu->arch.exception.injected);
6862                 vcpu->arch.exception.pending = false;
6863                 vcpu->arch.exception.injected = true;
6864
6865                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6866                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6867                                              X86_EFLAGS_RF);
6868
6869                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6870                     (vcpu->arch.dr7 & DR7_GD)) {
6871                         vcpu->arch.dr7 &= ~DR7_GD;
6872                         kvm_update_dr7(vcpu);
6873                 }
6874
6875                 kvm_x86_ops->queue_exception(vcpu);
6876         }
6877
6878         /* Don't consider new event if we re-injected an event */
6879         if (kvm_event_needs_reinjection(vcpu))
6880                 return 0;
6881
6882         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
6883             kvm_x86_ops->smi_allowed(vcpu)) {
6884                 vcpu->arch.smi_pending = false;
6885                 ++vcpu->arch.smi_count;
6886                 enter_smm(vcpu);
6887         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6888                 --vcpu->arch.nmi_pending;
6889                 vcpu->arch.nmi_injected = true;
6890                 kvm_x86_ops->set_nmi(vcpu);
6891         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6892                 /*
6893                  * Because interrupts can be injected asynchronously, we are
6894                  * calling check_nested_events again here to avoid a race condition.
6895                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6896                  * proposal and current concerns.  Perhaps we should be setting
6897                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6898                  */
6899                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6900                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6901                         if (r != 0)
6902                                 return r;
6903                 }
6904                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6905                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6906                                             false);
6907                         kvm_x86_ops->set_irq(vcpu);
6908                 }
6909         }
6910
6911         return 0;
6912 }
6913
6914 static void process_nmi(struct kvm_vcpu *vcpu)
6915 {
6916         unsigned limit = 2;
6917
6918         /*
6919          * x86 is limited to one NMI running, and one NMI pending after it.
6920          * If an NMI is already in progress, limit further NMIs to just one.
6921          * Otherwise, allow two (and we'll inject the first one immediately).
6922          */
6923         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6924                 limit = 1;
6925
6926         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6927         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6928         kvm_make_request(KVM_REQ_EVENT, vcpu);
6929 }
6930
6931 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6932 {
6933         u32 flags = 0;
6934         flags |= seg->g       << 23;
6935         flags |= seg->db      << 22;
6936         flags |= seg->l       << 21;
6937         flags |= seg->avl     << 20;
6938         flags |= seg->present << 15;
6939         flags |= seg->dpl     << 13;
6940         flags |= seg->s       << 12;
6941         flags |= seg->type    << 8;
6942         return flags;
6943 }
6944
6945 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6946 {
6947         struct kvm_segment seg;
6948         int offset;
6949
6950         kvm_get_segment(vcpu, &seg, n);
6951         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6952
6953         if (n < 3)
6954                 offset = 0x7f84 + n * 12;
6955         else
6956                 offset = 0x7f2c + (n - 3) * 12;
6957
6958         put_smstate(u32, buf, offset + 8, seg.base);
6959         put_smstate(u32, buf, offset + 4, seg.limit);
6960         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6961 }
6962
6963 #ifdef CONFIG_X86_64
6964 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6965 {
6966         struct kvm_segment seg;
6967         int offset;
6968         u16 flags;
6969
6970         kvm_get_segment(vcpu, &seg, n);
6971         offset = 0x7e00 + n * 16;
6972
6973         flags = enter_smm_get_segment_flags(&seg) >> 8;
6974         put_smstate(u16, buf, offset, seg.selector);
6975         put_smstate(u16, buf, offset + 2, flags);
6976         put_smstate(u32, buf, offset + 4, seg.limit);
6977         put_smstate(u64, buf, offset + 8, seg.base);
6978 }
6979 #endif
6980
6981 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6982 {
6983         struct desc_ptr dt;
6984         struct kvm_segment seg;
6985         unsigned long val;
6986         int i;
6987
6988         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6989         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6990         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6991         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6992
6993         for (i = 0; i < 8; i++)
6994                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6995
6996         kvm_get_dr(vcpu, 6, &val);
6997         put_smstate(u32, buf, 0x7fcc, (u32)val);
6998         kvm_get_dr(vcpu, 7, &val);
6999         put_smstate(u32, buf, 0x7fc8, (u32)val);
7000
7001         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7002         put_smstate(u32, buf, 0x7fc4, seg.selector);
7003         put_smstate(u32, buf, 0x7f64, seg.base);
7004         put_smstate(u32, buf, 0x7f60, seg.limit);
7005         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7006
7007         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7008         put_smstate(u32, buf, 0x7fc0, seg.selector);
7009         put_smstate(u32, buf, 0x7f80, seg.base);
7010         put_smstate(u32, buf, 0x7f7c, seg.limit);
7011         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7012
7013         kvm_x86_ops->get_gdt(vcpu, &dt);
7014         put_smstate(u32, buf, 0x7f74, dt.address);
7015         put_smstate(u32, buf, 0x7f70, dt.size);
7016
7017         kvm_x86_ops->get_idt(vcpu, &dt);
7018         put_smstate(u32, buf, 0x7f58, dt.address);
7019         put_smstate(u32, buf, 0x7f54, dt.size);
7020
7021         for (i = 0; i < 6; i++)
7022                 enter_smm_save_seg_32(vcpu, buf, i);
7023
7024         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7025
7026         /* revision id */
7027         put_smstate(u32, buf, 0x7efc, 0x00020000);
7028         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7029 }
7030
7031 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7032 {
7033 #ifdef CONFIG_X86_64
7034         struct desc_ptr dt;
7035         struct kvm_segment seg;
7036         unsigned long val;
7037         int i;
7038
7039         for (i = 0; i < 16; i++)
7040                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7041
7042         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7043         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7044
7045         kvm_get_dr(vcpu, 6, &val);
7046         put_smstate(u64, buf, 0x7f68, val);
7047         kvm_get_dr(vcpu, 7, &val);
7048         put_smstate(u64, buf, 0x7f60, val);
7049
7050         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7051         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7052         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7053
7054         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7055
7056         /* revision id */
7057         put_smstate(u32, buf, 0x7efc, 0x00020064);
7058
7059         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7060
7061         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7062         put_smstate(u16, buf, 0x7e90, seg.selector);
7063         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7064         put_smstate(u32, buf, 0x7e94, seg.limit);
7065         put_smstate(u64, buf, 0x7e98, seg.base);
7066
7067         kvm_x86_ops->get_idt(vcpu, &dt);
7068         put_smstate(u32, buf, 0x7e84, dt.size);
7069         put_smstate(u64, buf, 0x7e88, dt.address);
7070
7071         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7072         put_smstate(u16, buf, 0x7e70, seg.selector);
7073         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7074         put_smstate(u32, buf, 0x7e74, seg.limit);
7075         put_smstate(u64, buf, 0x7e78, seg.base);
7076
7077         kvm_x86_ops->get_gdt(vcpu, &dt);
7078         put_smstate(u32, buf, 0x7e64, dt.size);
7079         put_smstate(u64, buf, 0x7e68, dt.address);
7080
7081         for (i = 0; i < 6; i++)
7082                 enter_smm_save_seg_64(vcpu, buf, i);
7083 #else
7084         WARN_ON_ONCE(1);
7085 #endif
7086 }
7087
7088 static void enter_smm(struct kvm_vcpu *vcpu)
7089 {
7090         struct kvm_segment cs, ds;
7091         struct desc_ptr dt;
7092         char buf[512];
7093         u32 cr0;
7094
7095         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7096         memset(buf, 0, 512);
7097         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7098                 enter_smm_save_state_64(vcpu, buf);
7099         else
7100                 enter_smm_save_state_32(vcpu, buf);
7101
7102         /*
7103          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7104          * vCPU state (e.g. leave guest mode) after we've saved the state into
7105          * the SMM state-save area.
7106          */
7107         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7108
7109         vcpu->arch.hflags |= HF_SMM_MASK;
7110         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7111
7112         if (kvm_x86_ops->get_nmi_mask(vcpu))
7113                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7114         else
7115                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7116
7117         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7118         kvm_rip_write(vcpu, 0x8000);
7119
7120         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7121         kvm_x86_ops->set_cr0(vcpu, cr0);
7122         vcpu->arch.cr0 = cr0;
7123
7124         kvm_x86_ops->set_cr4(vcpu, 0);
7125
7126         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7127         dt.address = dt.size = 0;
7128         kvm_x86_ops->set_idt(vcpu, &dt);
7129
7130         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7131
7132         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7133         cs.base = vcpu->arch.smbase;
7134
7135         ds.selector = 0;
7136         ds.base = 0;
7137
7138         cs.limit    = ds.limit = 0xffffffff;
7139         cs.type     = ds.type = 0x3;
7140         cs.dpl      = ds.dpl = 0;
7141         cs.db       = ds.db = 0;
7142         cs.s        = ds.s = 1;
7143         cs.l        = ds.l = 0;
7144         cs.g        = ds.g = 1;
7145         cs.avl      = ds.avl = 0;
7146         cs.present  = ds.present = 1;
7147         cs.unusable = ds.unusable = 0;
7148         cs.padding  = ds.padding = 0;
7149
7150         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7151         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7152         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7153         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7154         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7155         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7156
7157         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7158                 kvm_x86_ops->set_efer(vcpu, 0);
7159
7160         kvm_update_cpuid(vcpu);
7161         kvm_mmu_reset_context(vcpu);
7162 }
7163
7164 static void process_smi(struct kvm_vcpu *vcpu)
7165 {
7166         vcpu->arch.smi_pending = true;
7167         kvm_make_request(KVM_REQ_EVENT, vcpu);
7168 }
7169
7170 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7171 {
7172         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7173 }
7174
7175 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7176 {
7177         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7178                 return;
7179
7180         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7181
7182         if (irqchip_split(vcpu->kvm))
7183                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7184         else {
7185                 if (vcpu->arch.apicv_active)
7186                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7187                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7188         }
7189
7190         if (is_guest_mode(vcpu))
7191                 vcpu->arch.load_eoi_exitmap_pending = true;
7192         else
7193                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7194 }
7195
7196 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7197 {
7198         u64 eoi_exit_bitmap[4];
7199
7200         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7201                 return;
7202
7203         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7204                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7205         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7206 }
7207
7208 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7209                 unsigned long start, unsigned long end)
7210 {
7211         unsigned long apic_address;
7212
7213         /*
7214          * The physical address of apic access page is stored in the VMCS.
7215          * Update it when it becomes invalid.
7216          */
7217         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7218         if (start <= apic_address && apic_address < end)
7219                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7220 }
7221
7222 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7223 {
7224         struct page *page = NULL;
7225
7226         if (!lapic_in_kernel(vcpu))
7227                 return;
7228
7229         if (!kvm_x86_ops->set_apic_access_page_addr)
7230                 return;
7231
7232         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7233         if (is_error_page(page))
7234                 return;
7235         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7236
7237         /*
7238          * Do not pin apic access page in memory, the MMU notifier
7239          * will call us again if it is migrated or swapped out.
7240          */
7241         put_page(page);
7242 }
7243 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7244
7245 /*
7246  * Returns 1 to let vcpu_run() continue the guest execution loop without
7247  * exiting to the userspace.  Otherwise, the value will be returned to the
7248  * userspace.
7249  */
7250 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7251 {
7252         int r;
7253         bool req_int_win =
7254                 dm_request_for_irq_injection(vcpu) &&
7255                 kvm_cpu_accept_dm_intr(vcpu);
7256
7257         bool req_immediate_exit = false;
7258
7259         if (kvm_request_pending(vcpu)) {
7260                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7261                         kvm_mmu_unload(vcpu);
7262                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7263                         __kvm_migrate_timers(vcpu);
7264                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7265                         kvm_gen_update_masterclock(vcpu->kvm);
7266                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7267                         kvm_gen_kvmclock_update(vcpu);
7268                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7269                         r = kvm_guest_time_update(vcpu);
7270                         if (unlikely(r))
7271                                 goto out;
7272                 }
7273                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7274                         kvm_mmu_sync_roots(vcpu);
7275                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7276                         kvm_vcpu_flush_tlb(vcpu, true);
7277                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7278                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7279                         r = 0;
7280                         goto out;
7281                 }
7282                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7283                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7284                         vcpu->mmio_needed = 0;
7285                         r = 0;
7286                         goto out;
7287                 }
7288                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7289                         /* Page is swapped out. Do synthetic halt */
7290                         vcpu->arch.apf.halted = true;
7291                         r = 1;
7292                         goto out;
7293                 }
7294                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7295                         record_steal_time(vcpu);
7296                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7297                         process_smi(vcpu);
7298                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7299                         process_nmi(vcpu);
7300                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7301                         kvm_pmu_handle_event(vcpu);
7302                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7303                         kvm_pmu_deliver_pmi(vcpu);
7304                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7305                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7306                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7307                                      vcpu->arch.ioapic_handled_vectors)) {
7308                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7309                                 vcpu->run->eoi.vector =
7310                                                 vcpu->arch.pending_ioapic_eoi;
7311                                 r = 0;
7312                                 goto out;
7313                         }
7314                 }
7315                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7316                         vcpu_scan_ioapic(vcpu);
7317                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7318                         vcpu_load_eoi_exitmap(vcpu);
7319                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7320                         kvm_vcpu_reload_apic_access_page(vcpu);
7321                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7322                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7323                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7324                         r = 0;
7325                         goto out;
7326                 }
7327                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7328                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7329                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7330                         r = 0;
7331                         goto out;
7332                 }
7333                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7334                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7335                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7336                         r = 0;
7337                         goto out;
7338                 }
7339
7340                 /*
7341                  * KVM_REQ_HV_STIMER has to be processed after
7342                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7343                  * depend on the guest clock being up-to-date
7344                  */
7345                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7346                         kvm_hv_process_stimers(vcpu);
7347         }
7348
7349         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7350                 ++vcpu->stat.req_event;
7351                 kvm_apic_accept_events(vcpu);
7352                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7353                         r = 1;
7354                         goto out;
7355                 }
7356
7357                 if (inject_pending_event(vcpu, req_int_win) != 0)
7358                         req_immediate_exit = true;
7359                 else {
7360                         /* Enable SMI/NMI/IRQ window open exits if needed.
7361                          *
7362                          * SMIs have three cases:
7363                          * 1) They can be nested, and then there is nothing to
7364                          *    do here because RSM will cause a vmexit anyway.
7365                          * 2) There is an ISA-specific reason why SMI cannot be
7366                          *    injected, and the moment when this changes can be
7367                          *    intercepted.
7368                          * 3) Or the SMI can be pending because
7369                          *    inject_pending_event has completed the injection
7370                          *    of an IRQ or NMI from the previous vmexit, and
7371                          *    then we request an immediate exit to inject the
7372                          *    SMI.
7373                          */
7374                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7375                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7376                                         req_immediate_exit = true;
7377                         if (vcpu->arch.nmi_pending)
7378                                 kvm_x86_ops->enable_nmi_window(vcpu);
7379                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7380                                 kvm_x86_ops->enable_irq_window(vcpu);
7381                         WARN_ON(vcpu->arch.exception.pending);
7382                 }
7383
7384                 if (kvm_lapic_enabled(vcpu)) {
7385                         update_cr8_intercept(vcpu);
7386                         kvm_lapic_sync_to_vapic(vcpu);
7387                 }
7388         }
7389
7390         r = kvm_mmu_reload(vcpu);
7391         if (unlikely(r)) {
7392                 goto cancel_injection;
7393         }
7394
7395         preempt_disable();
7396
7397         kvm_x86_ops->prepare_guest_switch(vcpu);
7398
7399         /*
7400          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7401          * IPI are then delayed after guest entry, which ensures that they
7402          * result in virtual interrupt delivery.
7403          */
7404         local_irq_disable();
7405         vcpu->mode = IN_GUEST_MODE;
7406
7407         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7408
7409         /*
7410          * 1) We should set ->mode before checking ->requests.  Please see
7411          * the comment in kvm_vcpu_exiting_guest_mode().
7412          *
7413          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7414          * pairs with the memory barrier implicit in pi_test_and_set_on
7415          * (see vmx_deliver_posted_interrupt).
7416          *
7417          * 3) This also orders the write to mode from any reads to the page
7418          * tables done while the VCPU is running.  Please see the comment
7419          * in kvm_flush_remote_tlbs.
7420          */
7421         smp_mb__after_srcu_read_unlock();
7422
7423         /*
7424          * This handles the case where a posted interrupt was
7425          * notified with kvm_vcpu_kick.
7426          */
7427         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7428                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7429
7430         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7431             || need_resched() || signal_pending(current)) {
7432                 vcpu->mode = OUTSIDE_GUEST_MODE;
7433                 smp_wmb();
7434                 local_irq_enable();
7435                 preempt_enable();
7436                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7437                 r = 1;
7438                 goto cancel_injection;
7439         }
7440
7441         kvm_load_guest_xcr0(vcpu);
7442
7443         if (req_immediate_exit) {
7444                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7445                 smp_send_reschedule(vcpu->cpu);
7446         }
7447
7448         trace_kvm_entry(vcpu->vcpu_id);
7449         if (lapic_timer_advance_ns)
7450                 wait_lapic_expire(vcpu);
7451         guest_enter_irqoff();
7452
7453         if (unlikely(vcpu->arch.switch_db_regs)) {
7454                 set_debugreg(0, 7);
7455                 set_debugreg(vcpu->arch.eff_db[0], 0);
7456                 set_debugreg(vcpu->arch.eff_db[1], 1);
7457                 set_debugreg(vcpu->arch.eff_db[2], 2);
7458                 set_debugreg(vcpu->arch.eff_db[3], 3);
7459                 set_debugreg(vcpu->arch.dr6, 6);
7460                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7461         }
7462
7463         kvm_x86_ops->run(vcpu);
7464
7465         /*
7466          * Do this here before restoring debug registers on the host.  And
7467          * since we do this before handling the vmexit, a DR access vmexit
7468          * can (a) read the correct value of the debug registers, (b) set
7469          * KVM_DEBUGREG_WONT_EXIT again.
7470          */
7471         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7472                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7473                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7474                 kvm_update_dr0123(vcpu);
7475                 kvm_update_dr6(vcpu);
7476                 kvm_update_dr7(vcpu);
7477                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7478         }
7479
7480         /*
7481          * If the guest has used debug registers, at least dr7
7482          * will be disabled while returning to the host.
7483          * If we don't have active breakpoints in the host, we don't
7484          * care about the messed up debug address registers. But if
7485          * we have some of them active, restore the old state.
7486          */
7487         if (hw_breakpoint_active())
7488                 hw_breakpoint_restore();
7489
7490         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7491
7492         vcpu->mode = OUTSIDE_GUEST_MODE;
7493         smp_wmb();
7494
7495         kvm_put_guest_xcr0(vcpu);
7496
7497         kvm_before_interrupt(vcpu);
7498         kvm_x86_ops->handle_external_intr(vcpu);
7499         kvm_after_interrupt(vcpu);
7500
7501         ++vcpu->stat.exits;
7502
7503         guest_exit_irqoff();
7504
7505         local_irq_enable();
7506         preempt_enable();
7507
7508         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7509
7510         /*
7511          * Profile KVM exit RIPs:
7512          */
7513         if (unlikely(prof_on == KVM_PROFILING)) {
7514                 unsigned long rip = kvm_rip_read(vcpu);
7515                 profile_hit(KVM_PROFILING, (void *)rip);
7516         }
7517
7518         if (unlikely(vcpu->arch.tsc_always_catchup))
7519                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7520
7521         if (vcpu->arch.apic_attention)
7522                 kvm_lapic_sync_from_vapic(vcpu);
7523
7524         vcpu->arch.gpa_available = false;
7525         r = kvm_x86_ops->handle_exit(vcpu);
7526         return r;
7527
7528 cancel_injection:
7529         kvm_x86_ops->cancel_injection(vcpu);
7530         if (unlikely(vcpu->arch.apic_attention))
7531                 kvm_lapic_sync_from_vapic(vcpu);
7532 out:
7533         return r;
7534 }
7535
7536 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7537 {
7538         if (!kvm_arch_vcpu_runnable(vcpu) &&
7539             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7540                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7541                 kvm_vcpu_block(vcpu);
7542                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7543
7544                 if (kvm_x86_ops->post_block)
7545                         kvm_x86_ops->post_block(vcpu);
7546
7547                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7548                         return 1;
7549         }
7550
7551         kvm_apic_accept_events(vcpu);
7552         switch(vcpu->arch.mp_state) {
7553         case KVM_MP_STATE_HALTED:
7554                 vcpu->arch.pv.pv_unhalted = false;
7555                 vcpu->arch.mp_state =
7556                         KVM_MP_STATE_RUNNABLE;
7557         case KVM_MP_STATE_RUNNABLE:
7558                 vcpu->arch.apf.halted = false;
7559                 break;
7560         case KVM_MP_STATE_INIT_RECEIVED:
7561                 break;
7562         default:
7563                 return -EINTR;
7564                 break;
7565         }
7566         return 1;
7567 }
7568
7569 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7570 {
7571         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7572                 kvm_x86_ops->check_nested_events(vcpu, false);
7573
7574         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7575                 !vcpu->arch.apf.halted);
7576 }
7577
7578 static int vcpu_run(struct kvm_vcpu *vcpu)
7579 {
7580         int r;
7581         struct kvm *kvm = vcpu->kvm;
7582
7583         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7584
7585         for (;;) {
7586                 if (kvm_vcpu_running(vcpu)) {
7587                         r = vcpu_enter_guest(vcpu);
7588                 } else {
7589                         r = vcpu_block(kvm, vcpu);
7590                 }
7591
7592                 if (r <= 0)
7593                         break;
7594
7595                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7596                 if (kvm_cpu_has_pending_timer(vcpu))
7597                         kvm_inject_pending_timer_irqs(vcpu);
7598
7599                 if (dm_request_for_irq_injection(vcpu) &&
7600                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7601                         r = 0;
7602                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7603                         ++vcpu->stat.request_irq_exits;
7604                         break;
7605                 }
7606
7607                 kvm_check_async_pf_completion(vcpu);
7608
7609                 if (signal_pending(current)) {
7610                         r = -EINTR;
7611                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7612                         ++vcpu->stat.signal_exits;
7613                         break;
7614                 }
7615                 if (need_resched()) {
7616                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7617                         cond_resched();
7618                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7619                 }
7620         }
7621
7622         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7623
7624         return r;
7625 }
7626
7627 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7628 {
7629         int r;
7630         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7631         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7632         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7633         if (r != EMULATE_DONE)
7634                 return 0;
7635         return 1;
7636 }
7637
7638 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7639 {
7640         BUG_ON(!vcpu->arch.pio.count);
7641
7642         return complete_emulated_io(vcpu);
7643 }
7644
7645 /*
7646  * Implements the following, as a state machine:
7647  *
7648  * read:
7649  *   for each fragment
7650  *     for each mmio piece in the fragment
7651  *       write gpa, len
7652  *       exit
7653  *       copy data
7654  *   execute insn
7655  *
7656  * write:
7657  *   for each fragment
7658  *     for each mmio piece in the fragment
7659  *       write gpa, len
7660  *       copy data
7661  *       exit
7662  */
7663 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7664 {
7665         struct kvm_run *run = vcpu->run;
7666         struct kvm_mmio_fragment *frag;
7667         unsigned len;
7668
7669         BUG_ON(!vcpu->mmio_needed);
7670
7671         /* Complete previous fragment */
7672         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7673         len = min(8u, frag->len);
7674         if (!vcpu->mmio_is_write)
7675                 memcpy(frag->data, run->mmio.data, len);
7676
7677         if (frag->len <= 8) {
7678                 /* Switch to the next fragment. */
7679                 frag++;
7680                 vcpu->mmio_cur_fragment++;
7681         } else {
7682                 /* Go forward to the next mmio piece. */
7683                 frag->data += len;
7684                 frag->gpa += len;
7685                 frag->len -= len;
7686         }
7687
7688         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7689                 vcpu->mmio_needed = 0;
7690
7691                 /* FIXME: return into emulator if single-stepping.  */
7692                 if (vcpu->mmio_is_write)
7693                         return 1;
7694                 vcpu->mmio_read_completed = 1;
7695                 return complete_emulated_io(vcpu);
7696         }
7697
7698         run->exit_reason = KVM_EXIT_MMIO;
7699         run->mmio.phys_addr = frag->gpa;
7700         if (vcpu->mmio_is_write)
7701                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7702         run->mmio.len = min(8u, frag->len);
7703         run->mmio.is_write = vcpu->mmio_is_write;
7704         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7705         return 0;
7706 }
7707
7708 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7709 {
7710         int r;
7711
7712         vcpu_load(vcpu);
7713         kvm_sigset_activate(vcpu);
7714         kvm_load_guest_fpu(vcpu);
7715
7716         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7717                 if (kvm_run->immediate_exit) {
7718                         r = -EINTR;
7719                         goto out;
7720                 }
7721                 kvm_vcpu_block(vcpu);
7722                 kvm_apic_accept_events(vcpu);
7723                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7724                 r = -EAGAIN;
7725                 if (signal_pending(current)) {
7726                         r = -EINTR;
7727                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7728                         ++vcpu->stat.signal_exits;
7729                 }
7730                 goto out;
7731         }
7732
7733         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
7734                 r = -EINVAL;
7735                 goto out;
7736         }
7737
7738         if (vcpu->run->kvm_dirty_regs) {
7739                 r = sync_regs(vcpu);
7740                 if (r != 0)
7741                         goto out;
7742         }
7743
7744         /* re-sync apic's tpr */
7745         if (!lapic_in_kernel(vcpu)) {
7746                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7747                         r = -EINVAL;
7748                         goto out;
7749                 }
7750         }
7751
7752         if (unlikely(vcpu->arch.complete_userspace_io)) {
7753                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7754                 vcpu->arch.complete_userspace_io = NULL;
7755                 r = cui(vcpu);
7756                 if (r <= 0)
7757                         goto out;
7758         } else
7759                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7760
7761         if (kvm_run->immediate_exit)
7762                 r = -EINTR;
7763         else
7764                 r = vcpu_run(vcpu);
7765
7766 out:
7767         kvm_put_guest_fpu(vcpu);
7768         if (vcpu->run->kvm_valid_regs)
7769                 store_regs(vcpu);
7770         post_kvm_run_save(vcpu);
7771         kvm_sigset_deactivate(vcpu);
7772
7773         vcpu_put(vcpu);
7774         return r;
7775 }
7776
7777 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7778 {
7779         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7780                 /*
7781                  * We are here if userspace calls get_regs() in the middle of
7782                  * instruction emulation. Registers state needs to be copied
7783                  * back from emulation context to vcpu. Userspace shouldn't do
7784                  * that usually, but some bad designed PV devices (vmware
7785                  * backdoor interface) need this to work
7786                  */
7787                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7788                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7789         }
7790         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7791         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7792         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7793         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7794         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7795         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7796         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7797         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7798 #ifdef CONFIG_X86_64
7799         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7800         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7801         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7802         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7803         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7804         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7805         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7806         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7807 #endif
7808
7809         regs->rip = kvm_rip_read(vcpu);
7810         regs->rflags = kvm_get_rflags(vcpu);
7811 }
7812
7813 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7814 {
7815         vcpu_load(vcpu);
7816         __get_regs(vcpu, regs);
7817         vcpu_put(vcpu);
7818         return 0;
7819 }
7820
7821 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7822 {
7823         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7824         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7825
7826         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7827         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7828         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7829         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7830         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7831         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7832         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7833         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7834 #ifdef CONFIG_X86_64
7835         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7836         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7837         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7838         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7839         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7840         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7841         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7842         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7843 #endif
7844
7845         kvm_rip_write(vcpu, regs->rip);
7846         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7847
7848         vcpu->arch.exception.pending = false;
7849
7850         kvm_make_request(KVM_REQ_EVENT, vcpu);
7851 }
7852
7853 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7854 {
7855         vcpu_load(vcpu);
7856         __set_regs(vcpu, regs);
7857         vcpu_put(vcpu);
7858         return 0;
7859 }
7860
7861 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7862 {
7863         struct kvm_segment cs;
7864
7865         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7866         *db = cs.db;
7867         *l = cs.l;
7868 }
7869 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7870
7871 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7872 {
7873         struct desc_ptr dt;
7874
7875         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7876         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7877         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7878         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7879         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7880         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7881
7882         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7883         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7884
7885         kvm_x86_ops->get_idt(vcpu, &dt);
7886         sregs->idt.limit = dt.size;
7887         sregs->idt.base = dt.address;
7888         kvm_x86_ops->get_gdt(vcpu, &dt);
7889         sregs->gdt.limit = dt.size;
7890         sregs->gdt.base = dt.address;
7891
7892         sregs->cr0 = kvm_read_cr0(vcpu);
7893         sregs->cr2 = vcpu->arch.cr2;
7894         sregs->cr3 = kvm_read_cr3(vcpu);
7895         sregs->cr4 = kvm_read_cr4(vcpu);
7896         sregs->cr8 = kvm_get_cr8(vcpu);
7897         sregs->efer = vcpu->arch.efer;
7898         sregs->apic_base = kvm_get_apic_base(vcpu);
7899
7900         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7901
7902         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
7903                 set_bit(vcpu->arch.interrupt.nr,
7904                         (unsigned long *)sregs->interrupt_bitmap);
7905 }
7906
7907 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7908                                   struct kvm_sregs *sregs)
7909 {
7910         vcpu_load(vcpu);
7911         __get_sregs(vcpu, sregs);
7912         vcpu_put(vcpu);
7913         return 0;
7914 }
7915
7916 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7917                                     struct kvm_mp_state *mp_state)
7918 {
7919         vcpu_load(vcpu);
7920
7921         kvm_apic_accept_events(vcpu);
7922         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7923                                         vcpu->arch.pv.pv_unhalted)
7924                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7925         else
7926                 mp_state->mp_state = vcpu->arch.mp_state;
7927
7928         vcpu_put(vcpu);
7929         return 0;
7930 }
7931
7932 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7933                                     struct kvm_mp_state *mp_state)
7934 {
7935         int ret = -EINVAL;
7936
7937         vcpu_load(vcpu);
7938
7939         if (!lapic_in_kernel(vcpu) &&
7940             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7941                 goto out;
7942
7943         /* INITs are latched while in SMM */
7944         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7945             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7946              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7947                 goto out;
7948
7949         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7950                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7951                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7952         } else
7953                 vcpu->arch.mp_state = mp_state->mp_state;
7954         kvm_make_request(KVM_REQ_EVENT, vcpu);
7955
7956         ret = 0;
7957 out:
7958         vcpu_put(vcpu);
7959         return ret;
7960 }
7961
7962 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7963                     int reason, bool has_error_code, u32 error_code)
7964 {
7965         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7966         int ret;
7967
7968         init_emulate_ctxt(vcpu);
7969
7970         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7971                                    has_error_code, error_code);
7972
7973         if (ret)
7974                 return EMULATE_FAIL;
7975
7976         kvm_rip_write(vcpu, ctxt->eip);
7977         kvm_set_rflags(vcpu, ctxt->eflags);
7978         kvm_make_request(KVM_REQ_EVENT, vcpu);
7979         return EMULATE_DONE;
7980 }
7981 EXPORT_SYMBOL_GPL(kvm_task_switch);
7982
7983 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7984 {
7985         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
7986                 /*
7987                  * When EFER.LME and CR0.PG are set, the processor is in
7988                  * 64-bit mode (though maybe in a 32-bit code segment).
7989                  * CR4.PAE and EFER.LMA must be set.
7990                  */
7991                 if (!(sregs->cr4 & X86_CR4_PAE)
7992                     || !(sregs->efer & EFER_LMA))
7993                         return -EINVAL;
7994         } else {
7995                 /*
7996                  * Not in 64-bit mode: EFER.LMA is clear and the code
7997                  * segment cannot be 64-bit.
7998                  */
7999                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8000                         return -EINVAL;
8001         }
8002
8003         return 0;
8004 }
8005
8006 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8007 {
8008         struct msr_data apic_base_msr;
8009         int mmu_reset_needed = 0;
8010         int cpuid_update_needed = 0;
8011         int pending_vec, max_bits, idx;
8012         struct desc_ptr dt;
8013         int ret = -EINVAL;
8014
8015         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8016                         (sregs->cr4 & X86_CR4_OSXSAVE))
8017                 goto out;
8018
8019         if (kvm_valid_sregs(vcpu, sregs))
8020                 goto out;
8021
8022         apic_base_msr.data = sregs->apic_base;
8023         apic_base_msr.host_initiated = true;
8024         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8025                 goto out;
8026
8027         dt.size = sregs->idt.limit;
8028         dt.address = sregs->idt.base;
8029         kvm_x86_ops->set_idt(vcpu, &dt);
8030         dt.size = sregs->gdt.limit;
8031         dt.address = sregs->gdt.base;
8032         kvm_x86_ops->set_gdt(vcpu, &dt);
8033
8034         vcpu->arch.cr2 = sregs->cr2;
8035         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8036         vcpu->arch.cr3 = sregs->cr3;
8037         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8038
8039         kvm_set_cr8(vcpu, sregs->cr8);
8040
8041         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8042         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8043
8044         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8045         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8046         vcpu->arch.cr0 = sregs->cr0;
8047
8048         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8049         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8050                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8051         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8052         if (cpuid_update_needed)
8053                 kvm_update_cpuid(vcpu);
8054
8055         idx = srcu_read_lock(&vcpu->kvm->srcu);
8056         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
8057                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8058                 mmu_reset_needed = 1;
8059         }
8060         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8061
8062         if (mmu_reset_needed)
8063                 kvm_mmu_reset_context(vcpu);
8064
8065         max_bits = KVM_NR_INTERRUPTS;
8066         pending_vec = find_first_bit(
8067                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8068         if (pending_vec < max_bits) {
8069                 kvm_queue_interrupt(vcpu, pending_vec, false);
8070                 pr_debug("Set back pending irq %d\n", pending_vec);
8071         }
8072
8073         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8074         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8075         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8076         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8077         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8078         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8079
8080         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8081         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8082
8083         update_cr8_intercept(vcpu);
8084
8085         /* Older userspace won't unhalt the vcpu on reset. */
8086         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8087             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8088             !is_protmode(vcpu))
8089                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8090
8091         kvm_make_request(KVM_REQ_EVENT, vcpu);
8092
8093         ret = 0;
8094 out:
8095         return ret;
8096 }
8097
8098 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8099                                   struct kvm_sregs *sregs)
8100 {
8101         int ret;
8102
8103         vcpu_load(vcpu);
8104         ret = __set_sregs(vcpu, sregs);
8105         vcpu_put(vcpu);
8106         return ret;
8107 }
8108
8109 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8110                                         struct kvm_guest_debug *dbg)
8111 {
8112         unsigned long rflags;
8113         int i, r;
8114
8115         vcpu_load(vcpu);
8116
8117         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8118                 r = -EBUSY;
8119                 if (vcpu->arch.exception.pending)
8120                         goto out;
8121                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8122                         kvm_queue_exception(vcpu, DB_VECTOR);
8123                 else
8124                         kvm_queue_exception(vcpu, BP_VECTOR);
8125         }
8126
8127         /*
8128          * Read rflags as long as potentially injected trace flags are still
8129          * filtered out.
8130          */
8131         rflags = kvm_get_rflags(vcpu);
8132
8133         vcpu->guest_debug = dbg->control;
8134         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8135                 vcpu->guest_debug = 0;
8136
8137         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8138                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8139                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8140                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8141         } else {
8142                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8143                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8144         }
8145         kvm_update_dr7(vcpu);
8146
8147         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8148                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8149                         get_segment_base(vcpu, VCPU_SREG_CS);
8150
8151         /*
8152          * Trigger an rflags update that will inject or remove the trace
8153          * flags.
8154          */
8155         kvm_set_rflags(vcpu, rflags);
8156
8157         kvm_x86_ops->update_bp_intercept(vcpu);
8158
8159         r = 0;
8160
8161 out:
8162         vcpu_put(vcpu);
8163         return r;
8164 }
8165
8166 /*
8167  * Translate a guest virtual address to a guest physical address.
8168  */
8169 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8170                                     struct kvm_translation *tr)
8171 {
8172         unsigned long vaddr = tr->linear_address;
8173         gpa_t gpa;
8174         int idx;
8175
8176         vcpu_load(vcpu);
8177
8178         idx = srcu_read_lock(&vcpu->kvm->srcu);
8179         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8180         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8181         tr->physical_address = gpa;
8182         tr->valid = gpa != UNMAPPED_GVA;
8183         tr->writeable = 1;
8184         tr->usermode = 0;
8185
8186         vcpu_put(vcpu);
8187         return 0;
8188 }
8189
8190 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8191 {
8192         struct fxregs_state *fxsave;
8193
8194         vcpu_load(vcpu);
8195
8196         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8197         memcpy(fpu->fpr, fxsave->st_space, 128);
8198         fpu->fcw = fxsave->cwd;
8199         fpu->fsw = fxsave->swd;
8200         fpu->ftwx = fxsave->twd;
8201         fpu->last_opcode = fxsave->fop;
8202         fpu->last_ip = fxsave->rip;
8203         fpu->last_dp = fxsave->rdp;
8204         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
8205
8206         vcpu_put(vcpu);
8207         return 0;
8208 }
8209
8210 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8211 {
8212         struct fxregs_state *fxsave;
8213
8214         vcpu_load(vcpu);
8215
8216         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8217
8218         memcpy(fxsave->st_space, fpu->fpr, 128);
8219         fxsave->cwd = fpu->fcw;
8220         fxsave->swd = fpu->fsw;
8221         fxsave->twd = fpu->ftwx;
8222         fxsave->fop = fpu->last_opcode;
8223         fxsave->rip = fpu->last_ip;
8224         fxsave->rdp = fpu->last_dp;
8225         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
8226
8227         vcpu_put(vcpu);
8228         return 0;
8229 }
8230
8231 static void store_regs(struct kvm_vcpu *vcpu)
8232 {
8233         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8234
8235         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8236                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8237
8238         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8239                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8240
8241         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8242                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8243                                 vcpu, &vcpu->run->s.regs.events);
8244 }
8245
8246 static int sync_regs(struct kvm_vcpu *vcpu)
8247 {
8248         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8249                 return -EINVAL;
8250
8251         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8252                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8253                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8254         }
8255         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8256                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8257                         return -EINVAL;
8258                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8259         }
8260         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8261                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8262                                 vcpu, &vcpu->run->s.regs.events))
8263                         return -EINVAL;
8264                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8265         }
8266
8267         return 0;
8268 }
8269
8270 static void fx_init(struct kvm_vcpu *vcpu)
8271 {
8272         fpstate_init(&vcpu->arch.guest_fpu.state);
8273         if (boot_cpu_has(X86_FEATURE_XSAVES))
8274                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8275                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8276
8277         /*
8278          * Ensure guest xcr0 is valid for loading
8279          */
8280         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8281
8282         vcpu->arch.cr0 |= X86_CR0_ET;
8283 }
8284
8285 /* Swap (qemu) user FPU context for the guest FPU context. */
8286 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8287 {
8288         preempt_disable();
8289         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8290         /* PKRU is separately restored in kvm_x86_ops->run.  */
8291         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8292                                 ~XFEATURE_MASK_PKRU);
8293         preempt_enable();
8294         trace_kvm_fpu(1);
8295 }
8296
8297 /* When vcpu_run ends, restore user space FPU context. */
8298 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8299 {
8300         preempt_disable();
8301         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8302         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8303         preempt_enable();
8304         ++vcpu->stat.fpu_reload;
8305         trace_kvm_fpu(0);
8306 }
8307
8308 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8309 {
8310         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8311
8312         kvmclock_reset(vcpu);
8313
8314         kvm_x86_ops->vcpu_free(vcpu);
8315         free_cpumask_var(wbinvd_dirty_mask);
8316 }
8317
8318 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8319                                                 unsigned int id)
8320 {
8321         struct kvm_vcpu *vcpu;
8322
8323         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8324                 printk_once(KERN_WARNING
8325                 "kvm: SMP vm created on host with unstable TSC; "
8326                 "guest TSC will not be reliable\n");
8327
8328         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8329
8330         return vcpu;
8331 }
8332
8333 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8334 {
8335         kvm_vcpu_mtrr_init(vcpu);
8336         vcpu_load(vcpu);
8337         kvm_vcpu_reset(vcpu, false);
8338         kvm_mmu_setup(vcpu);
8339         vcpu_put(vcpu);
8340         return 0;
8341 }
8342
8343 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8344 {
8345         struct msr_data msr;
8346         struct kvm *kvm = vcpu->kvm;
8347
8348         kvm_hv_vcpu_postcreate(vcpu);
8349
8350         if (mutex_lock_killable(&vcpu->mutex))
8351                 return;
8352         vcpu_load(vcpu);
8353         msr.data = 0x0;
8354         msr.index = MSR_IA32_TSC;
8355         msr.host_initiated = true;
8356         kvm_write_tsc(vcpu, &msr);
8357         vcpu_put(vcpu);
8358         mutex_unlock(&vcpu->mutex);
8359
8360         if (!kvmclock_periodic_sync)
8361                 return;
8362
8363         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8364                                         KVMCLOCK_SYNC_PERIOD);
8365 }
8366
8367 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8368 {
8369         vcpu->arch.apf.msr_val = 0;
8370
8371         vcpu_load(vcpu);
8372         kvm_mmu_unload(vcpu);
8373         vcpu_put(vcpu);
8374
8375         kvm_x86_ops->vcpu_free(vcpu);
8376 }
8377
8378 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8379 {
8380         kvm_lapic_reset(vcpu, init_event);
8381
8382         vcpu->arch.hflags = 0;
8383
8384         vcpu->arch.smi_pending = 0;
8385         vcpu->arch.smi_count = 0;
8386         atomic_set(&vcpu->arch.nmi_queued, 0);
8387         vcpu->arch.nmi_pending = 0;
8388         vcpu->arch.nmi_injected = false;
8389         kvm_clear_interrupt_queue(vcpu);
8390         kvm_clear_exception_queue(vcpu);
8391         vcpu->arch.exception.pending = false;
8392
8393         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8394         kvm_update_dr0123(vcpu);
8395         vcpu->arch.dr6 = DR6_INIT;
8396         kvm_update_dr6(vcpu);
8397         vcpu->arch.dr7 = DR7_FIXED_1;
8398         kvm_update_dr7(vcpu);
8399
8400         vcpu->arch.cr2 = 0;
8401
8402         kvm_make_request(KVM_REQ_EVENT, vcpu);
8403         vcpu->arch.apf.msr_val = 0;
8404         vcpu->arch.st.msr_val = 0;
8405
8406         kvmclock_reset(vcpu);
8407
8408         kvm_clear_async_pf_completion_queue(vcpu);
8409         kvm_async_pf_hash_reset(vcpu);
8410         vcpu->arch.apf.halted = false;
8411
8412         if (kvm_mpx_supported()) {
8413                 void *mpx_state_buffer;
8414
8415                 /*
8416                  * To avoid have the INIT path from kvm_apic_has_events() that be
8417                  * called with loaded FPU and does not let userspace fix the state.
8418                  */
8419                 if (init_event)
8420                         kvm_put_guest_fpu(vcpu);
8421                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8422                                         XFEATURE_MASK_BNDREGS);
8423                 if (mpx_state_buffer)
8424                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8425                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8426                                         XFEATURE_MASK_BNDCSR);
8427                 if (mpx_state_buffer)
8428                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8429                 if (init_event)
8430                         kvm_load_guest_fpu(vcpu);
8431         }
8432
8433         if (!init_event) {
8434                 kvm_pmu_reset(vcpu);
8435                 vcpu->arch.smbase = 0x30000;
8436
8437                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8438                 vcpu->arch.msr_misc_features_enables = 0;
8439
8440                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8441         }
8442
8443         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8444         vcpu->arch.regs_avail = ~0;
8445         vcpu->arch.regs_dirty = ~0;
8446
8447         vcpu->arch.ia32_xss = 0;
8448
8449         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8450 }
8451
8452 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8453 {
8454         struct kvm_segment cs;
8455
8456         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8457         cs.selector = vector << 8;
8458         cs.base = vector << 12;
8459         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8460         kvm_rip_write(vcpu, 0);
8461 }
8462
8463 int kvm_arch_hardware_enable(void)
8464 {
8465         struct kvm *kvm;
8466         struct kvm_vcpu *vcpu;
8467         int i;
8468         int ret;
8469         u64 local_tsc;
8470         u64 max_tsc = 0;
8471         bool stable, backwards_tsc = false;
8472
8473         kvm_shared_msr_cpu_online();
8474         ret = kvm_x86_ops->hardware_enable();
8475         if (ret != 0)
8476                 return ret;
8477
8478         local_tsc = rdtsc();
8479         stable = !kvm_check_tsc_unstable();
8480         list_for_each_entry(kvm, &vm_list, vm_list) {
8481                 kvm_for_each_vcpu(i, vcpu, kvm) {
8482                         if (!stable && vcpu->cpu == smp_processor_id())
8483                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8484                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8485                                 backwards_tsc = true;
8486                                 if (vcpu->arch.last_host_tsc > max_tsc)
8487                                         max_tsc = vcpu->arch.last_host_tsc;
8488                         }
8489                 }
8490         }
8491
8492         /*
8493          * Sometimes, even reliable TSCs go backwards.  This happens on
8494          * platforms that reset TSC during suspend or hibernate actions, but
8495          * maintain synchronization.  We must compensate.  Fortunately, we can
8496          * detect that condition here, which happens early in CPU bringup,
8497          * before any KVM threads can be running.  Unfortunately, we can't
8498          * bring the TSCs fully up to date with real time, as we aren't yet far
8499          * enough into CPU bringup that we know how much real time has actually
8500          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8501          * variables that haven't been updated yet.
8502          *
8503          * So we simply find the maximum observed TSC above, then record the
8504          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8505          * the adjustment will be applied.  Note that we accumulate
8506          * adjustments, in case multiple suspend cycles happen before some VCPU
8507          * gets a chance to run again.  In the event that no KVM threads get a
8508          * chance to run, we will miss the entire elapsed period, as we'll have
8509          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8510          * loose cycle time.  This isn't too big a deal, since the loss will be
8511          * uniform across all VCPUs (not to mention the scenario is extremely
8512          * unlikely). It is possible that a second hibernate recovery happens
8513          * much faster than a first, causing the observed TSC here to be
8514          * smaller; this would require additional padding adjustment, which is
8515          * why we set last_host_tsc to the local tsc observed here.
8516          *
8517          * N.B. - this code below runs only on platforms with reliable TSC,
8518          * as that is the only way backwards_tsc is set above.  Also note
8519          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8520          * have the same delta_cyc adjustment applied if backwards_tsc
8521          * is detected.  Note further, this adjustment is only done once,
8522          * as we reset last_host_tsc on all VCPUs to stop this from being
8523          * called multiple times (one for each physical CPU bringup).
8524          *
8525          * Platforms with unreliable TSCs don't have to deal with this, they
8526          * will be compensated by the logic in vcpu_load, which sets the TSC to
8527          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8528          * guarantee that they stay in perfect synchronization.
8529          */
8530         if (backwards_tsc) {
8531                 u64 delta_cyc = max_tsc - local_tsc;
8532                 list_for_each_entry(kvm, &vm_list, vm_list) {
8533                         kvm->arch.backwards_tsc_observed = true;
8534                         kvm_for_each_vcpu(i, vcpu, kvm) {
8535                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8536                                 vcpu->arch.last_host_tsc = local_tsc;
8537                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8538                         }
8539
8540                         /*
8541                          * We have to disable TSC offset matching.. if you were
8542                          * booting a VM while issuing an S4 host suspend....
8543                          * you may have some problem.  Solving this issue is
8544                          * left as an exercise to the reader.
8545                          */
8546                         kvm->arch.last_tsc_nsec = 0;
8547                         kvm->arch.last_tsc_write = 0;
8548                 }
8549
8550         }
8551         return 0;
8552 }
8553
8554 void kvm_arch_hardware_disable(void)
8555 {
8556         kvm_x86_ops->hardware_disable();
8557         drop_user_return_notifiers();
8558 }
8559
8560 int kvm_arch_hardware_setup(void)
8561 {
8562         int r;
8563
8564         r = kvm_x86_ops->hardware_setup();
8565         if (r != 0)
8566                 return r;
8567
8568         if (kvm_has_tsc_control) {
8569                 /*
8570                  * Make sure the user can only configure tsc_khz values that
8571                  * fit into a signed integer.
8572                  * A min value is not calculated because it will always
8573                  * be 1 on all machines.
8574                  */
8575                 u64 max = min(0x7fffffffULL,
8576                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8577                 kvm_max_guest_tsc_khz = max;
8578
8579                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8580         }
8581
8582         kvm_init_msr_list();
8583         return 0;
8584 }
8585
8586 void kvm_arch_hardware_unsetup(void)
8587 {
8588         kvm_x86_ops->hardware_unsetup();
8589 }
8590
8591 void kvm_arch_check_processor_compat(void *rtn)
8592 {
8593         kvm_x86_ops->check_processor_compatibility(rtn);
8594 }
8595
8596 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8597 {
8598         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8599 }
8600 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8601
8602 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8603 {
8604         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8605 }
8606
8607 struct static_key kvm_no_apic_vcpu __read_mostly;
8608 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8609
8610 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8611 {
8612         struct page *page;
8613         int r;
8614
8615         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8616         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8617         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8618                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8619         else
8620                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8621
8622         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8623         if (!page) {
8624                 r = -ENOMEM;
8625                 goto fail;
8626         }
8627         vcpu->arch.pio_data = page_address(page);
8628
8629         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8630
8631         r = kvm_mmu_create(vcpu);
8632         if (r < 0)
8633                 goto fail_free_pio_data;
8634
8635         if (irqchip_in_kernel(vcpu->kvm)) {
8636                 r = kvm_create_lapic(vcpu);
8637                 if (r < 0)
8638                         goto fail_mmu_destroy;
8639         } else
8640                 static_key_slow_inc(&kvm_no_apic_vcpu);
8641
8642         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8643                                        GFP_KERNEL);
8644         if (!vcpu->arch.mce_banks) {
8645                 r = -ENOMEM;
8646                 goto fail_free_lapic;
8647         }
8648         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8649
8650         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8651                 r = -ENOMEM;
8652                 goto fail_free_mce_banks;
8653         }
8654
8655         fx_init(vcpu);
8656
8657         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8658
8659         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8660
8661         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8662
8663         kvm_async_pf_hash_reset(vcpu);
8664         kvm_pmu_init(vcpu);
8665
8666         vcpu->arch.pending_external_vector = -1;
8667         vcpu->arch.preempted_in_kernel = false;
8668
8669         kvm_hv_vcpu_init(vcpu);
8670
8671         return 0;
8672
8673 fail_free_mce_banks:
8674         kfree(vcpu->arch.mce_banks);
8675 fail_free_lapic:
8676         kvm_free_lapic(vcpu);
8677 fail_mmu_destroy:
8678         kvm_mmu_destroy(vcpu);
8679 fail_free_pio_data:
8680         free_page((unsigned long)vcpu->arch.pio_data);
8681 fail:
8682         return r;
8683 }
8684
8685 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8686 {
8687         int idx;
8688
8689         kvm_hv_vcpu_uninit(vcpu);
8690         kvm_pmu_destroy(vcpu);
8691         kfree(vcpu->arch.mce_banks);
8692         kvm_free_lapic(vcpu);
8693         idx = srcu_read_lock(&vcpu->kvm->srcu);
8694         kvm_mmu_destroy(vcpu);
8695         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8696         free_page((unsigned long)vcpu->arch.pio_data);
8697         if (!lapic_in_kernel(vcpu))
8698                 static_key_slow_dec(&kvm_no_apic_vcpu);
8699 }
8700
8701 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8702 {
8703         kvm_x86_ops->sched_in(vcpu, cpu);
8704 }
8705
8706 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8707 {
8708         if (type)
8709                 return -EINVAL;
8710
8711         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8712         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8713         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8714         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8715         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8716
8717         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8718         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8719         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8720         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8721                 &kvm->arch.irq_sources_bitmap);
8722
8723         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8724         mutex_init(&kvm->arch.apic_map_lock);
8725         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8726
8727         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8728         pvclock_update_vm_gtod_copy(kvm);
8729
8730         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8731         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8732
8733         kvm_hv_init_vm(kvm);
8734         kvm_page_track_init(kvm);
8735         kvm_mmu_init_vm(kvm);
8736
8737         if (kvm_x86_ops->vm_init)
8738                 return kvm_x86_ops->vm_init(kvm);
8739
8740         return 0;
8741 }
8742
8743 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8744 {
8745         vcpu_load(vcpu);
8746         kvm_mmu_unload(vcpu);
8747         vcpu_put(vcpu);
8748 }
8749
8750 static void kvm_free_vcpus(struct kvm *kvm)
8751 {
8752         unsigned int i;
8753         struct kvm_vcpu *vcpu;
8754
8755         /*
8756          * Unpin any mmu pages first.
8757          */
8758         kvm_for_each_vcpu(i, vcpu, kvm) {
8759                 kvm_clear_async_pf_completion_queue(vcpu);
8760                 kvm_unload_vcpu_mmu(vcpu);
8761         }
8762         kvm_for_each_vcpu(i, vcpu, kvm)
8763                 kvm_arch_vcpu_free(vcpu);
8764
8765         mutex_lock(&kvm->lock);
8766         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8767                 kvm->vcpus[i] = NULL;
8768
8769         atomic_set(&kvm->online_vcpus, 0);
8770         mutex_unlock(&kvm->lock);
8771 }
8772
8773 void kvm_arch_sync_events(struct kvm *kvm)
8774 {
8775         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8776         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8777         kvm_free_pit(kvm);
8778 }
8779
8780 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8781 {
8782         int i, r;
8783         unsigned long hva;
8784         struct kvm_memslots *slots = kvm_memslots(kvm);
8785         struct kvm_memory_slot *slot, old;
8786
8787         /* Called with kvm->slots_lock held.  */
8788         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8789                 return -EINVAL;
8790
8791         slot = id_to_memslot(slots, id);
8792         if (size) {
8793                 if (slot->npages)
8794                         return -EEXIST;
8795
8796                 /*
8797                  * MAP_SHARED to prevent internal slot pages from being moved
8798                  * by fork()/COW.
8799                  */
8800                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8801                               MAP_SHARED | MAP_ANONYMOUS, 0);
8802                 if (IS_ERR((void *)hva))
8803                         return PTR_ERR((void *)hva);
8804         } else {
8805                 if (!slot->npages)
8806                         return 0;
8807
8808                 hva = 0;
8809         }
8810
8811         old = *slot;
8812         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8813                 struct kvm_userspace_memory_region m;
8814
8815                 m.slot = id | (i << 16);
8816                 m.flags = 0;
8817                 m.guest_phys_addr = gpa;
8818                 m.userspace_addr = hva;
8819                 m.memory_size = size;
8820                 r = __kvm_set_memory_region(kvm, &m);
8821                 if (r < 0)
8822                         return r;
8823         }
8824
8825         if (!size)
8826                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8827
8828         return 0;
8829 }
8830 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8831
8832 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8833 {
8834         int r;
8835
8836         mutex_lock(&kvm->slots_lock);
8837         r = __x86_set_memory_region(kvm, id, gpa, size);
8838         mutex_unlock(&kvm->slots_lock);
8839
8840         return r;
8841 }
8842 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8843
8844 void kvm_arch_destroy_vm(struct kvm *kvm)
8845 {
8846         if (current->mm == kvm->mm) {
8847                 /*
8848                  * Free memory regions allocated on behalf of userspace,
8849                  * unless the the memory map has changed due to process exit
8850                  * or fd copying.
8851                  */
8852                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8853                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8854                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8855         }
8856         if (kvm_x86_ops->vm_destroy)
8857                 kvm_x86_ops->vm_destroy(kvm);
8858         kvm_pic_destroy(kvm);
8859         kvm_ioapic_destroy(kvm);
8860         kvm_free_vcpus(kvm);
8861         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8862         kvm_mmu_uninit_vm(kvm);
8863         kvm_page_track_cleanup(kvm);
8864         kvm_hv_destroy_vm(kvm);
8865 }
8866
8867 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8868                            struct kvm_memory_slot *dont)
8869 {
8870         int i;
8871
8872         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8873                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8874                         kvfree(free->arch.rmap[i]);
8875                         free->arch.rmap[i] = NULL;
8876                 }
8877                 if (i == 0)
8878                         continue;
8879
8880                 if (!dont || free->arch.lpage_info[i - 1] !=
8881                              dont->arch.lpage_info[i - 1]) {
8882                         kvfree(free->arch.lpage_info[i - 1]);
8883                         free->arch.lpage_info[i - 1] = NULL;
8884                 }
8885         }
8886
8887         kvm_page_track_free_memslot(free, dont);
8888 }
8889
8890 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8891                             unsigned long npages)
8892 {
8893         int i;
8894
8895         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8896                 struct kvm_lpage_info *linfo;
8897                 unsigned long ugfn;
8898                 int lpages;
8899                 int level = i + 1;
8900
8901                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8902                                       slot->base_gfn, level) + 1;
8903
8904                 slot->arch.rmap[i] =
8905                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
8906                                  GFP_KERNEL);
8907                 if (!slot->arch.rmap[i])
8908                         goto out_free;
8909                 if (i == 0)
8910                         continue;
8911
8912                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL);
8913                 if (!linfo)
8914                         goto out_free;
8915
8916                 slot->arch.lpage_info[i - 1] = linfo;
8917
8918                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8919                         linfo[0].disallow_lpage = 1;
8920                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8921                         linfo[lpages - 1].disallow_lpage = 1;
8922                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8923                 /*
8924                  * If the gfn and userspace address are not aligned wrt each
8925                  * other, or if explicitly asked to, disable large page
8926                  * support for this slot
8927                  */
8928                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8929                     !kvm_largepages_enabled()) {
8930                         unsigned long j;
8931
8932                         for (j = 0; j < lpages; ++j)
8933                                 linfo[j].disallow_lpage = 1;
8934                 }
8935         }
8936
8937         if (kvm_page_track_create_memslot(slot, npages))
8938                 goto out_free;
8939
8940         return 0;
8941
8942 out_free:
8943         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8944                 kvfree(slot->arch.rmap[i]);
8945                 slot->arch.rmap[i] = NULL;
8946                 if (i == 0)
8947                         continue;
8948
8949                 kvfree(slot->arch.lpage_info[i - 1]);
8950                 slot->arch.lpage_info[i - 1] = NULL;
8951         }
8952         return -ENOMEM;
8953 }
8954
8955 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8956 {
8957         /*
8958          * memslots->generation has been incremented.
8959          * mmio generation may have reached its maximum value.
8960          */
8961         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8962 }
8963
8964 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8965                                 struct kvm_memory_slot *memslot,
8966                                 const struct kvm_userspace_memory_region *mem,
8967                                 enum kvm_mr_change change)
8968 {
8969         return 0;
8970 }
8971
8972 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8973                                      struct kvm_memory_slot *new)
8974 {
8975         /* Still write protect RO slot */
8976         if (new->flags & KVM_MEM_READONLY) {
8977                 kvm_mmu_slot_remove_write_access(kvm, new);
8978                 return;
8979         }
8980
8981         /*
8982          * Call kvm_x86_ops dirty logging hooks when they are valid.
8983          *
8984          * kvm_x86_ops->slot_disable_log_dirty is called when:
8985          *
8986          *  - KVM_MR_CREATE with dirty logging is disabled
8987          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8988          *
8989          * The reason is, in case of PML, we need to set D-bit for any slots
8990          * with dirty logging disabled in order to eliminate unnecessary GPA
8991          * logging in PML buffer (and potential PML buffer full VMEXT). This
8992          * guarantees leaving PML enabled during guest's lifetime won't have
8993          * any additonal overhead from PML when guest is running with dirty
8994          * logging disabled for memory slots.
8995          *
8996          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8997          * to dirty logging mode.
8998          *
8999          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9000          *
9001          * In case of write protect:
9002          *
9003          * Write protect all pages for dirty logging.
9004          *
9005          * All the sptes including the large sptes which point to this
9006          * slot are set to readonly. We can not create any new large
9007          * spte on this slot until the end of the logging.
9008          *
9009          * See the comments in fast_page_fault().
9010          */
9011         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9012                 if (kvm_x86_ops->slot_enable_log_dirty)
9013                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9014                 else
9015                         kvm_mmu_slot_remove_write_access(kvm, new);
9016         } else {
9017                 if (kvm_x86_ops->slot_disable_log_dirty)
9018                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9019         }
9020 }
9021
9022 void kvm_arch_commit_memory_region(struct kvm *kvm,
9023                                 const struct kvm_userspace_memory_region *mem,
9024                                 const struct kvm_memory_slot *old,
9025                                 const struct kvm_memory_slot *new,
9026                                 enum kvm_mr_change change)
9027 {
9028         int nr_mmu_pages = 0;
9029
9030         if (!kvm->arch.n_requested_mmu_pages)
9031                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
9032
9033         if (nr_mmu_pages)
9034                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
9035
9036         /*
9037          * Dirty logging tracks sptes in 4k granularity, meaning that large
9038          * sptes have to be split.  If live migration is successful, the guest
9039          * in the source machine will be destroyed and large sptes will be
9040          * created in the destination. However, if the guest continues to run
9041          * in the source machine (for example if live migration fails), small
9042          * sptes will remain around and cause bad performance.
9043          *
9044          * Scan sptes if dirty logging has been stopped, dropping those
9045          * which can be collapsed into a single large-page spte.  Later
9046          * page faults will create the large-page sptes.
9047          */
9048         if ((change != KVM_MR_DELETE) &&
9049                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9050                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9051                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9052
9053         /*
9054          * Set up write protection and/or dirty logging for the new slot.
9055          *
9056          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9057          * been zapped so no dirty logging staff is needed for old slot. For
9058          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9059          * new and it's also covered when dealing with the new slot.
9060          *
9061          * FIXME: const-ify all uses of struct kvm_memory_slot.
9062          */
9063         if (change != KVM_MR_DELETE)
9064                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9065 }
9066
9067 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9068 {
9069         kvm_mmu_invalidate_zap_all_pages(kvm);
9070 }
9071
9072 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9073                                    struct kvm_memory_slot *slot)
9074 {
9075         kvm_page_track_flush_slot(kvm, slot);
9076 }
9077
9078 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9079 {
9080         if (!list_empty_careful(&vcpu->async_pf.done))
9081                 return true;
9082
9083         if (kvm_apic_has_events(vcpu))
9084                 return true;
9085
9086         if (vcpu->arch.pv.pv_unhalted)
9087                 return true;
9088
9089         if (vcpu->arch.exception.pending)
9090                 return true;
9091
9092         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9093             (vcpu->arch.nmi_pending &&
9094              kvm_x86_ops->nmi_allowed(vcpu)))
9095                 return true;
9096
9097         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9098             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9099                 return true;
9100
9101         if (kvm_arch_interrupt_allowed(vcpu) &&
9102             kvm_cpu_has_interrupt(vcpu))
9103                 return true;
9104
9105         if (kvm_hv_has_stimer_pending(vcpu))
9106                 return true;
9107
9108         return false;
9109 }
9110
9111 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9112 {
9113         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9114 }
9115
9116 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9117 {
9118         return vcpu->arch.preempted_in_kernel;
9119 }
9120
9121 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9122 {
9123         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9124 }
9125
9126 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9127 {
9128         return kvm_x86_ops->interrupt_allowed(vcpu);
9129 }
9130
9131 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9132 {
9133         if (is_64_bit_mode(vcpu))
9134                 return kvm_rip_read(vcpu);
9135         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9136                      kvm_rip_read(vcpu));
9137 }
9138 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9139
9140 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9141 {
9142         return kvm_get_linear_rip(vcpu) == linear_rip;
9143 }
9144 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9145
9146 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9147 {
9148         unsigned long rflags;
9149
9150         rflags = kvm_x86_ops->get_rflags(vcpu);
9151         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9152                 rflags &= ~X86_EFLAGS_TF;
9153         return rflags;
9154 }
9155 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9156
9157 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9158 {
9159         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9160             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9161                 rflags |= X86_EFLAGS_TF;
9162         kvm_x86_ops->set_rflags(vcpu, rflags);
9163 }
9164
9165 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9166 {
9167         __kvm_set_rflags(vcpu, rflags);
9168         kvm_make_request(KVM_REQ_EVENT, vcpu);
9169 }
9170 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9171
9172 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9173 {
9174         int r;
9175
9176         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
9177               work->wakeup_all)
9178                 return;
9179
9180         r = kvm_mmu_reload(vcpu);
9181         if (unlikely(r))
9182                 return;
9183
9184         if (!vcpu->arch.mmu.direct_map &&
9185               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
9186                 return;
9187
9188         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
9189 }
9190
9191 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9192 {
9193         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9194 }
9195
9196 static inline u32 kvm_async_pf_next_probe(u32 key)
9197 {
9198         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9199 }
9200
9201 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9202 {
9203         u32 key = kvm_async_pf_hash_fn(gfn);
9204
9205         while (vcpu->arch.apf.gfns[key] != ~0)
9206                 key = kvm_async_pf_next_probe(key);
9207
9208         vcpu->arch.apf.gfns[key] = gfn;
9209 }
9210
9211 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9212 {
9213         int i;
9214         u32 key = kvm_async_pf_hash_fn(gfn);
9215
9216         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9217                      (vcpu->arch.apf.gfns[key] != gfn &&
9218                       vcpu->arch.apf.gfns[key] != ~0); i++)
9219                 key = kvm_async_pf_next_probe(key);
9220
9221         return key;
9222 }
9223
9224 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9225 {
9226         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9227 }
9228
9229 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9230 {
9231         u32 i, j, k;
9232
9233         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9234         while (true) {
9235                 vcpu->arch.apf.gfns[i] = ~0;
9236                 do {
9237                         j = kvm_async_pf_next_probe(j);
9238                         if (vcpu->arch.apf.gfns[j] == ~0)
9239                                 return;
9240                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9241                         /*
9242                          * k lies cyclically in ]i,j]
9243                          * |    i.k.j |
9244                          * |....j i.k.| or  |.k..j i...|
9245                          */
9246                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9247                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9248                 i = j;
9249         }
9250 }
9251
9252 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9253 {
9254
9255         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9256                                       sizeof(val));
9257 }
9258
9259 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9260 {
9261
9262         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9263                                       sizeof(u32));
9264 }
9265
9266 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9267                                      struct kvm_async_pf *work)
9268 {
9269         struct x86_exception fault;
9270
9271         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9272         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9273
9274         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9275             (vcpu->arch.apf.send_user_only &&
9276              kvm_x86_ops->get_cpl(vcpu) == 0))
9277                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9278         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9279                 fault.vector = PF_VECTOR;
9280                 fault.error_code_valid = true;
9281                 fault.error_code = 0;
9282                 fault.nested_page_fault = false;
9283                 fault.address = work->arch.token;
9284                 fault.async_page_fault = true;
9285                 kvm_inject_page_fault(vcpu, &fault);
9286         }
9287 }
9288
9289 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9290                                  struct kvm_async_pf *work)
9291 {
9292         struct x86_exception fault;
9293         u32 val;
9294
9295         if (work->wakeup_all)
9296                 work->arch.token = ~0; /* broadcast wakeup */
9297         else
9298                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9299         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9300
9301         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9302             !apf_get_user(vcpu, &val)) {
9303                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9304                     vcpu->arch.exception.pending &&
9305                     vcpu->arch.exception.nr == PF_VECTOR &&
9306                     !apf_put_user(vcpu, 0)) {
9307                         vcpu->arch.exception.injected = false;
9308                         vcpu->arch.exception.pending = false;
9309                         vcpu->arch.exception.nr = 0;
9310                         vcpu->arch.exception.has_error_code = false;
9311                         vcpu->arch.exception.error_code = 0;
9312                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9313                         fault.vector = PF_VECTOR;
9314                         fault.error_code_valid = true;
9315                         fault.error_code = 0;
9316                         fault.nested_page_fault = false;
9317                         fault.address = work->arch.token;
9318                         fault.async_page_fault = true;
9319                         kvm_inject_page_fault(vcpu, &fault);
9320                 }
9321         }
9322         vcpu->arch.apf.halted = false;
9323         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9324 }
9325
9326 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9327 {
9328         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9329                 return true;
9330         else
9331                 return kvm_can_do_async_pf(vcpu);
9332 }
9333
9334 void kvm_arch_start_assignment(struct kvm *kvm)
9335 {
9336         atomic_inc(&kvm->arch.assigned_device_count);
9337 }
9338 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9339
9340 void kvm_arch_end_assignment(struct kvm *kvm)
9341 {
9342         atomic_dec(&kvm->arch.assigned_device_count);
9343 }
9344 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9345
9346 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9347 {
9348         return atomic_read(&kvm->arch.assigned_device_count);
9349 }
9350 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9351
9352 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9353 {
9354         atomic_inc(&kvm->arch.noncoherent_dma_count);
9355 }
9356 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9357
9358 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9359 {
9360         atomic_dec(&kvm->arch.noncoherent_dma_count);
9361 }
9362 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9363
9364 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9365 {
9366         return atomic_read(&kvm->arch.noncoherent_dma_count);
9367 }
9368 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9369
9370 bool kvm_arch_has_irq_bypass(void)
9371 {
9372         return kvm_x86_ops->update_pi_irte != NULL;
9373 }
9374
9375 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9376                                       struct irq_bypass_producer *prod)
9377 {
9378         struct kvm_kernel_irqfd *irqfd =
9379                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9380
9381         irqfd->producer = prod;
9382
9383         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9384                                            prod->irq, irqfd->gsi, 1);
9385 }
9386
9387 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9388                                       struct irq_bypass_producer *prod)
9389 {
9390         int ret;
9391         struct kvm_kernel_irqfd *irqfd =
9392                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9393
9394         WARN_ON(irqfd->producer != prod);
9395         irqfd->producer = NULL;
9396
9397         /*
9398          * When producer of consumer is unregistered, we change back to
9399          * remapped mode, so we can re-use the current implementation
9400          * when the irq is masked/disabled or the consumer side (KVM
9401          * int this case doesn't want to receive the interrupts.
9402         */
9403         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9404         if (ret)
9405                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9406                        " fails: %d\n", irqfd->consumer.token, ret);
9407 }
9408
9409 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9410                                    uint32_t guest_irq, bool set)
9411 {
9412         if (!kvm_x86_ops->update_pi_irte)
9413                 return -EINVAL;
9414
9415         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9416 }
9417
9418 bool kvm_vector_hashing_enabled(void)
9419 {
9420         return vector_hashing;
9421 }
9422 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9423
9424 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9425 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9426 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9427 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9428 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9429 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9430 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9431 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9432 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9433 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9434 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9435 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9436 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9437 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9438 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9439 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9440 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9441 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9442 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);