1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_X86_H
3 #define ARCH_X86_KVM_X86_H
5 #include <linux/kvm_host.h>
6 #include <asm/pvclock.h>
7 #include "kvm_cache_regs.h"
9 #define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL
11 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
13 vcpu->arch.exception.pending = false;
14 vcpu->arch.exception.injected = false;
17 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
20 vcpu->arch.interrupt.pending = true;
21 vcpu->arch.interrupt.soft = soft;
22 vcpu->arch.interrupt.nr = vector;
25 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
27 vcpu->arch.interrupt.pending = false;
30 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
32 return vcpu->arch.exception.injected || vcpu->arch.interrupt.pending ||
33 vcpu->arch.nmi_injected;
36 static inline bool kvm_exception_is_soft(unsigned int nr)
38 return (nr == BP_VECTOR) || (nr == OF_VECTOR);
41 static inline bool is_protmode(struct kvm_vcpu *vcpu)
43 return kvm_read_cr0_bits(vcpu, X86_CR0_PE);
46 static inline int is_long_mode(struct kvm_vcpu *vcpu)
49 return vcpu->arch.efer & EFER_LMA;
55 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu)
59 if (!is_long_mode(vcpu))
61 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
65 static inline bool is_la57_mode(struct kvm_vcpu *vcpu)
68 return (vcpu->arch.efer & EFER_LMA) &&
69 kvm_read_cr4_bits(vcpu, X86_CR4_LA57);
75 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
77 return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;
80 static inline int is_pae(struct kvm_vcpu *vcpu)
82 return kvm_read_cr4_bits(vcpu, X86_CR4_PAE);
85 static inline int is_pse(struct kvm_vcpu *vcpu)
87 return kvm_read_cr4_bits(vcpu, X86_CR4_PSE);
90 static inline int is_paging(struct kvm_vcpu *vcpu)
92 return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));
95 static inline u32 bit(int bitno)
97 return 1 << (bitno & 31);
100 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu)
102 return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48;
105 static inline u8 ctxt_virt_addr_bits(struct x86_emulate_ctxt *ctxt)
107 return (ctxt->ops->get_cr(ctxt, 4) & X86_CR4_LA57) ? 57 : 48;
110 static inline u64 get_canonical(u64 la, u8 vaddr_bits)
112 return ((int64_t)la << (64 - vaddr_bits)) >> (64 - vaddr_bits);
115 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu)
118 return get_canonical(la, vcpu_virt_addr_bits(vcpu)) != la;
124 static inline bool emul_is_noncanonical_address(u64 la,
125 struct x86_emulate_ctxt *ctxt)
128 return get_canonical(la, ctxt_virt_addr_bits(ctxt)) != la;
134 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu,
135 gva_t gva, gfn_t gfn, unsigned access)
138 * If this is a shadow nested page table, the "GVA" is
141 vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK;
142 vcpu->arch.access = access;
143 vcpu->arch.mmio_gfn = gfn;
144 vcpu->arch.mmio_gen = kvm_memslots(vcpu->kvm)->generation;
147 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu)
149 return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation;
153 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we
154 * clear all mmio cache info.
156 #define MMIO_GVA_ANY (~(gva_t)0)
158 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva)
160 if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK))
163 vcpu->arch.mmio_gva = 0;
166 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva)
168 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva &&
169 vcpu->arch.mmio_gva == (gva & PAGE_MASK))
175 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
177 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn &&
178 vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT)
184 static inline unsigned long kvm_register_readl(struct kvm_vcpu *vcpu,
187 unsigned long val = kvm_register_read(vcpu, reg);
189 return is_64_bit_mode(vcpu) ? val : (u32)val;
192 static inline void kvm_register_writel(struct kvm_vcpu *vcpu,
196 if (!is_64_bit_mode(vcpu))
198 return kvm_register_write(vcpu, reg, val);
201 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
203 return !(kvm->arch.disabled_quirks & quirk);
206 void kvm_set_pending_timer(struct kvm_vcpu *vcpu);
207 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
209 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr);
210 u64 get_kvmclock_ns(struct kvm *kvm);
212 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
213 gva_t addr, void *val, unsigned int bytes,
214 struct x86_exception *exception);
216 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
217 gva_t addr, void *val, unsigned int bytes,
218 struct x86_exception *exception);
220 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
221 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
222 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);
223 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
224 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
225 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
227 bool kvm_vector_hashing_enabled(void);
229 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
230 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
231 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
232 | XFEATURE_MASK_PKRU)
233 extern u64 host_xcr0;
235 extern u64 kvm_supported_xcr0(void);
237 extern unsigned int min_timer_period_us;
239 extern unsigned int lapic_timer_advance_ns;
241 extern bool enable_vmware_backdoor;
243 extern struct static_key kvm_no_apic_vcpu;
245 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
247 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
248 vcpu->arch.virtual_tsc_shift);
251 /* Same "calling convention" as do_div:
252 * - divide (n << 32) by base
256 #define do_shl32_div32(n, base) \
259 asm("divl %2" : "=a" (__quot), "=d" (__rem) \
260 : "rm" (base), "0" (0), "1" ((u32) n)); \
265 #define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0)
266 #define KVM_X86_DISABLE_EXITS_HTL (1 << 1)
267 #define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2)
268 #define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \
269 KVM_X86_DISABLE_EXITS_HTL | \
270 KVM_X86_DISABLE_EXITS_PAUSE)
272 static inline bool kvm_mwait_in_guest(struct kvm *kvm)
274 return kvm->arch.mwait_in_guest;
277 static inline bool kvm_hlt_in_guest(struct kvm *kvm)
279 return kvm->arch.hlt_in_guest;
282 static inline bool kvm_pause_in_guest(struct kvm *kvm)
284 return kvm->arch.pause_in_guest;
287 DECLARE_PER_CPU(struct kvm_vcpu *, current_vcpu);
289 static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu)
291 __this_cpu_write(current_vcpu, vcpu);
294 static inline void kvm_after_interrupt(struct kvm_vcpu *vcpu)
296 __this_cpu_write(current_vcpu, NULL);