1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_X86_H
3 #define ARCH_X86_KVM_X86_H
5 #include <asm/processor.h>
7 #include <linux/kvm_host.h>
8 #include <asm/pvclock.h>
9 #include "kvm_cache_regs.h"
11 #define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL
13 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
15 vcpu->arch.exception.pending = false;
16 vcpu->arch.exception.injected = false;
19 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
22 vcpu->arch.interrupt.pending = true;
23 vcpu->arch.interrupt.soft = soft;
24 vcpu->arch.interrupt.nr = vector;
27 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
29 vcpu->arch.interrupt.pending = false;
32 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
34 return vcpu->arch.exception.injected || vcpu->arch.interrupt.pending ||
35 vcpu->arch.nmi_injected;
38 static inline bool kvm_exception_is_soft(unsigned int nr)
40 return (nr == BP_VECTOR) || (nr == OF_VECTOR);
43 static inline bool is_protmode(struct kvm_vcpu *vcpu)
45 return kvm_read_cr0_bits(vcpu, X86_CR0_PE);
48 static inline int is_long_mode(struct kvm_vcpu *vcpu)
51 return vcpu->arch.efer & EFER_LMA;
57 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu)
61 if (!is_long_mode(vcpu))
63 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
67 static inline bool is_la57_mode(struct kvm_vcpu *vcpu)
70 return (vcpu->arch.efer & EFER_LMA) &&
71 kvm_read_cr4_bits(vcpu, X86_CR4_LA57);
77 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
79 return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;
82 static inline int is_pae(struct kvm_vcpu *vcpu)
84 return kvm_read_cr4_bits(vcpu, X86_CR4_PAE);
87 static inline int is_pse(struct kvm_vcpu *vcpu)
89 return kvm_read_cr4_bits(vcpu, X86_CR4_PSE);
92 static inline int is_paging(struct kvm_vcpu *vcpu)
94 return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));
97 static inline u32 bit(int bitno)
99 return 1 << (bitno & 31);
102 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu)
104 return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48;
107 static inline u8 ctxt_virt_addr_bits(struct x86_emulate_ctxt *ctxt)
109 return (ctxt->ops->get_cr(ctxt, 4) & X86_CR4_LA57) ? 57 : 48;
112 static inline u64 get_canonical(u64 la, u8 vaddr_bits)
114 return ((int64_t)la << (64 - vaddr_bits)) >> (64 - vaddr_bits);
117 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu)
120 return get_canonical(la, vcpu_virt_addr_bits(vcpu)) != la;
126 static inline bool emul_is_noncanonical_address(u64 la,
127 struct x86_emulate_ctxt *ctxt)
130 return get_canonical(la, ctxt_virt_addr_bits(ctxt)) != la;
136 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu,
137 gva_t gva, gfn_t gfn, unsigned access)
140 * If this is a shadow nested page table, the "GVA" is
143 vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK;
144 vcpu->arch.access = access;
145 vcpu->arch.mmio_gfn = gfn;
146 vcpu->arch.mmio_gen = kvm_memslots(vcpu->kvm)->generation;
149 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu)
151 return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation;
155 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we
156 * clear all mmio cache info.
158 #define MMIO_GVA_ANY (~(gva_t)0)
160 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva)
162 if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK))
165 vcpu->arch.mmio_gva = 0;
168 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva)
170 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva &&
171 vcpu->arch.mmio_gva == (gva & PAGE_MASK))
177 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
179 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn &&
180 vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT)
186 static inline unsigned long kvm_register_readl(struct kvm_vcpu *vcpu,
189 unsigned long val = kvm_register_read(vcpu, reg);
191 return is_64_bit_mode(vcpu) ? val : (u32)val;
194 static inline void kvm_register_writel(struct kvm_vcpu *vcpu,
198 if (!is_64_bit_mode(vcpu))
200 return kvm_register_write(vcpu, reg, val);
203 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
205 return !(kvm->arch.disabled_quirks & quirk);
208 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu);
209 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu);
210 void kvm_set_pending_timer(struct kvm_vcpu *vcpu);
211 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
213 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr);
214 u64 get_kvmclock_ns(struct kvm *kvm);
216 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
217 gva_t addr, void *val, unsigned int bytes,
218 struct x86_exception *exception);
220 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
221 gva_t addr, void *val, unsigned int bytes,
222 struct x86_exception *exception);
224 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
225 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
226 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);
227 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
228 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
229 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
231 bool kvm_vector_hashing_enabled(void);
233 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
234 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
235 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
236 | XFEATURE_MASK_PKRU)
237 extern u64 host_xcr0;
239 extern u64 kvm_supported_xcr0(void);
241 extern unsigned int min_timer_period_us;
243 extern unsigned int lapic_timer_advance_ns;
245 extern struct static_key kvm_no_apic_vcpu;
247 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
249 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
250 vcpu->arch.virtual_tsc_shift);
253 /* Same "calling convention" as do_div:
254 * - divide (n << 32) by base
258 #define do_shl32_div32(n, base) \
261 asm("divl %2" : "=a" (__quot), "=d" (__rem) \
262 : "rm" (base), "0" (0), "1" ((u32) n)); \
267 static inline bool kvm_mwait_in_guest(void)
269 return boot_cpu_has(X86_FEATURE_MWAIT) &&
270 !boot_cpu_has_bug(X86_BUG_MONITOR);