1 // SPDX-License-Identifier: GPL-2.0
2 #define DISABLE_BRANCH_PROFILING
3 #define pr_fmt(fmt) "kasan: " fmt
5 /* cpu_feature_enabled() cannot be used this early */
6 #define USE_EARLY_PGTABLE_L5
8 #include <linux/memblock.h>
9 #include <linux/kasan.h>
10 #include <linux/kdebug.h>
12 #include <linux/sched.h>
13 #include <linux/sched/task.h>
14 #include <linux/vmalloc.h>
16 #include <asm/e820/types.h>
17 #include <asm/pgalloc.h>
18 #include <asm/tlbflush.h>
19 #include <asm/sections.h>
20 #include <asm/pgtable.h>
21 #include <asm/cpu_entry_area.h>
23 extern struct range pfn_mapped[E820_MAX_ENTRIES];
25 static p4d_t tmp_p4d_table[MAX_PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE);
27 static __init void *early_alloc(size_t size, int nid, bool panic)
30 return memblock_alloc_try_nid(size, size,
31 __pa(MAX_DMA_ADDRESS), MEMBLOCK_ALLOC_ACCESSIBLE, nid);
33 return memblock_alloc_try_nid_nopanic(size, size,
34 __pa(MAX_DMA_ADDRESS), MEMBLOCK_ALLOC_ACCESSIBLE, nid);
37 static void __init kasan_populate_pmd(pmd_t *pmd, unsigned long addr,
38 unsigned long end, int nid)
45 if (boot_cpu_has(X86_FEATURE_PSE) &&
46 ((end - addr) == PMD_SIZE) &&
47 IS_ALIGNED(addr, PMD_SIZE)) {
48 p = early_alloc(PMD_SIZE, nid, false);
49 if (p && pmd_set_huge(pmd, __pa(p), PAGE_KERNEL))
52 memblock_free(__pa(p), PMD_SIZE);
55 p = early_alloc(PAGE_SIZE, nid, true);
56 pmd_populate_kernel(&init_mm, pmd, p);
59 pte = pte_offset_kernel(pmd, addr);
67 p = early_alloc(PAGE_SIZE, nid, true);
68 entry = pfn_pte(PFN_DOWN(__pa(p)), PAGE_KERNEL);
69 set_pte_at(&init_mm, addr, pte, entry);
70 } while (pte++, addr += PAGE_SIZE, addr != end);
73 static void __init kasan_populate_pud(pud_t *pud, unsigned long addr,
74 unsigned long end, int nid)
82 if (boot_cpu_has(X86_FEATURE_GBPAGES) &&
83 ((end - addr) == PUD_SIZE) &&
84 IS_ALIGNED(addr, PUD_SIZE)) {
85 p = early_alloc(PUD_SIZE, nid, false);
86 if (p && pud_set_huge(pud, __pa(p), PAGE_KERNEL))
89 memblock_free(__pa(p), PUD_SIZE);
92 p = early_alloc(PAGE_SIZE, nid, true);
93 pud_populate(&init_mm, pud, p);
96 pmd = pmd_offset(pud, addr);
98 next = pmd_addr_end(addr, end);
100 kasan_populate_pmd(pmd, addr, next, nid);
101 } while (pmd++, addr = next, addr != end);
104 static void __init kasan_populate_p4d(p4d_t *p4d, unsigned long addr,
105 unsigned long end, int nid)
110 if (p4d_none(*p4d)) {
111 void *p = early_alloc(PAGE_SIZE, nid, true);
113 p4d_populate(&init_mm, p4d, p);
116 pud = pud_offset(p4d, addr);
118 next = pud_addr_end(addr, end);
119 if (!pud_large(*pud))
120 kasan_populate_pud(pud, addr, next, nid);
121 } while (pud++, addr = next, addr != end);
124 static void __init kasan_populate_pgd(pgd_t *pgd, unsigned long addr,
125 unsigned long end, int nid)
131 if (pgd_none(*pgd)) {
132 p = early_alloc(PAGE_SIZE, nid, true);
133 pgd_populate(&init_mm, pgd, p);
136 p4d = p4d_offset(pgd, addr);
138 next = p4d_addr_end(addr, end);
139 kasan_populate_p4d(p4d, addr, next, nid);
140 } while (p4d++, addr = next, addr != end);
143 static void __init kasan_populate_shadow(unsigned long addr, unsigned long end,
149 addr = addr & PAGE_MASK;
150 end = round_up(end, PAGE_SIZE);
151 pgd = pgd_offset_k(addr);
153 next = pgd_addr_end(addr, end);
154 kasan_populate_pgd(pgd, addr, next, nid);
155 } while (pgd++, addr = next, addr != end);
158 static void __init map_range(struct range *range)
163 start = (unsigned long)kasan_mem_to_shadow(pfn_to_kaddr(range->start));
164 end = (unsigned long)kasan_mem_to_shadow(pfn_to_kaddr(range->end));
166 kasan_populate_shadow(start, end, early_pfn_to_nid(range->start));
169 static void __init clear_pgds(unsigned long start,
173 /* See comment in kasan_init() */
174 unsigned long pgd_end = end & PGDIR_MASK;
176 for (; start < pgd_end; start += PGDIR_SIZE) {
177 pgd = pgd_offset_k(start);
179 * With folded p4d, pgd_clear() is nop, use p4d_clear()
182 if (pgtable_l5_enabled())
185 p4d_clear(p4d_offset(pgd, start));
188 pgd = pgd_offset_k(start);
189 for (; start < end; start += P4D_SIZE)
190 p4d_clear(p4d_offset(pgd, start));
193 static inline p4d_t *early_p4d_offset(pgd_t *pgd, unsigned long addr)
197 if (!pgtable_l5_enabled())
200 p4d = __pa_nodebug(pgd_val(*pgd)) & PTE_PFN_MASK;
201 p4d += __START_KERNEL_map - phys_base;
202 return (p4d_t *)p4d + p4d_index(addr);
205 static void __init kasan_early_p4d_populate(pgd_t *pgd,
210 p4d_t *p4d, p4d_entry;
213 if (pgd_none(*pgd)) {
214 pgd_entry = __pgd(_KERNPG_TABLE |
215 __pa_nodebug(kasan_early_shadow_p4d));
216 set_pgd(pgd, pgd_entry);
219 p4d = early_p4d_offset(pgd, addr);
221 next = p4d_addr_end(addr, end);
226 p4d_entry = __p4d(_KERNPG_TABLE |
227 __pa_nodebug(kasan_early_shadow_pud));
228 set_p4d(p4d, p4d_entry);
229 } while (p4d++, addr = next, addr != end && p4d_none(*p4d));
232 static void __init kasan_map_early_shadow(pgd_t *pgd)
234 /* See comment in kasan_init() */
235 unsigned long addr = KASAN_SHADOW_START & PGDIR_MASK;
236 unsigned long end = KASAN_SHADOW_END;
239 pgd += pgd_index(addr);
241 next = pgd_addr_end(addr, end);
242 kasan_early_p4d_populate(pgd, addr, next);
243 } while (pgd++, addr = next, addr != end);
246 #ifdef CONFIG_KASAN_INLINE
247 static int kasan_die_handler(struct notifier_block *self,
251 if (val == DIE_GPF) {
252 pr_emerg("CONFIG_KASAN_INLINE enabled\n");
253 pr_emerg("GPF could be caused by NULL-ptr deref or user memory access\n");
258 static struct notifier_block kasan_die_notifier = {
259 .notifier_call = kasan_die_handler,
263 void __init kasan_early_init(void)
266 pteval_t pte_val = __pa_nodebug(kasan_early_shadow_page) |
267 __PAGE_KERNEL | _PAGE_ENC;
268 pmdval_t pmd_val = __pa_nodebug(kasan_early_shadow_pte) | _KERNPG_TABLE;
269 pudval_t pud_val = __pa_nodebug(kasan_early_shadow_pmd) | _KERNPG_TABLE;
270 p4dval_t p4d_val = __pa_nodebug(kasan_early_shadow_pud) | _KERNPG_TABLE;
272 /* Mask out unsupported __PAGE_KERNEL bits: */
273 pte_val &= __default_kernel_pte_mask;
274 pmd_val &= __default_kernel_pte_mask;
275 pud_val &= __default_kernel_pte_mask;
276 p4d_val &= __default_kernel_pte_mask;
278 for (i = 0; i < PTRS_PER_PTE; i++)
279 kasan_early_shadow_pte[i] = __pte(pte_val);
281 for (i = 0; i < PTRS_PER_PMD; i++)
282 kasan_early_shadow_pmd[i] = __pmd(pmd_val);
284 for (i = 0; i < PTRS_PER_PUD; i++)
285 kasan_early_shadow_pud[i] = __pud(pud_val);
287 for (i = 0; pgtable_l5_enabled() && i < PTRS_PER_P4D; i++)
288 kasan_early_shadow_p4d[i] = __p4d(p4d_val);
290 kasan_map_early_shadow(early_top_pgt);
291 kasan_map_early_shadow(init_top_pgt);
294 void __init kasan_init(void)
297 void *shadow_cpu_entry_begin, *shadow_cpu_entry_end;
299 #ifdef CONFIG_KASAN_INLINE
300 register_die_notifier(&kasan_die_notifier);
303 memcpy(early_top_pgt, init_top_pgt, sizeof(early_top_pgt));
306 * We use the same shadow offset for 4- and 5-level paging to
307 * facilitate boot-time switching between paging modes.
308 * As result in 5-level paging mode KASAN_SHADOW_START and
309 * KASAN_SHADOW_END are not aligned to PGD boundary.
311 * KASAN_SHADOW_START doesn't share PGD with anything else.
312 * We claim whole PGD entry to make things easier.
314 * KASAN_SHADOW_END lands in the last PGD entry and it collides with
315 * bunch of things like kernel code, modules, EFI mapping, etc.
316 * We need to take extra steps to not overwrite them.
318 if (pgtable_l5_enabled()) {
321 ptr = (void *)pgd_page_vaddr(*pgd_offset_k(KASAN_SHADOW_END));
322 memcpy(tmp_p4d_table, (void *)ptr, sizeof(tmp_p4d_table));
323 set_pgd(&early_top_pgt[pgd_index(KASAN_SHADOW_END)],
324 __pgd(__pa(tmp_p4d_table) | _KERNPG_TABLE));
327 load_cr3(early_top_pgt);
330 clear_pgds(KASAN_SHADOW_START & PGDIR_MASK, KASAN_SHADOW_END);
332 kasan_populate_early_shadow((void *)(KASAN_SHADOW_START & PGDIR_MASK),
333 kasan_mem_to_shadow((void *)PAGE_OFFSET));
335 for (i = 0; i < E820_MAX_ENTRIES; i++) {
336 if (pfn_mapped[i].end == 0)
339 map_range(&pfn_mapped[i]);
342 shadow_cpu_entry_begin = (void *)CPU_ENTRY_AREA_BASE;
343 shadow_cpu_entry_begin = kasan_mem_to_shadow(shadow_cpu_entry_begin);
344 shadow_cpu_entry_begin = (void *)round_down(
345 (unsigned long)shadow_cpu_entry_begin, PAGE_SIZE);
347 shadow_cpu_entry_end = (void *)(CPU_ENTRY_AREA_BASE +
348 CPU_ENTRY_AREA_MAP_SIZE);
349 shadow_cpu_entry_end = kasan_mem_to_shadow(shadow_cpu_entry_end);
350 shadow_cpu_entry_end = (void *)round_up(
351 (unsigned long)shadow_cpu_entry_end, PAGE_SIZE);
353 kasan_populate_early_shadow(
354 kasan_mem_to_shadow((void *)PAGE_OFFSET + MAXMEM),
355 shadow_cpu_entry_begin);
357 kasan_populate_shadow((unsigned long)shadow_cpu_entry_begin,
358 (unsigned long)shadow_cpu_entry_end, 0);
360 kasan_populate_early_shadow(shadow_cpu_entry_end,
361 kasan_mem_to_shadow((void *)__START_KERNEL_map));
363 kasan_populate_shadow((unsigned long)kasan_mem_to_shadow(_stext),
364 (unsigned long)kasan_mem_to_shadow(_end),
365 early_pfn_to_nid(__pa(_stext)));
367 kasan_populate_early_shadow(kasan_mem_to_shadow((void *)MODULES_END),
368 (void *)KASAN_SHADOW_END);
370 load_cr3(init_top_pgt);
374 * kasan_early_shadow_page has been used as early shadow memory, thus
375 * it may contain some garbage. Now we can clear and write protect it,
376 * since after the TLB flush no one should write to it.
378 memset(kasan_early_shadow_page, 0, PAGE_SIZE);
379 for (i = 0; i < PTRS_PER_PTE; i++) {
383 prot = __pgprot(__PAGE_KERNEL_RO | _PAGE_ENC);
384 pgprot_val(prot) &= __default_kernel_pte_mask;
386 pte = __pte(__pa(kasan_early_shadow_page) | pgprot_val(prot));
387 set_pte(&kasan_early_shadow_pte[i], pte);
389 /* Flush TLBs again to be sure that write protection applied. */
392 init_task.kasan_depth = 0;
393 pr_info("KernelAddressSanitizer initialized\n");