2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
18 #include <asm/e820/api.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <linux/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
27 #include <asm/set_memory.h>
30 * The current flushing context - we pass it instead of 5 arguments:
37 unsigned long numpages;
40 unsigned force_split : 1;
46 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
47 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
48 * entries change the page attribute in parallel to some other cpu
49 * splitting a large page entry along with changing the attribute.
51 static DEFINE_SPINLOCK(cpa_lock);
53 #define CPA_FLUSHTLB 1
55 #define CPA_PAGES_ARRAY 4
58 static unsigned long direct_pages_count[PG_LEVEL_NUM];
60 void update_page_count(int level, unsigned long pages)
62 /* Protect against CPA */
64 direct_pages_count[level] += pages;
65 spin_unlock(&pgd_lock);
68 static void split_page_count(int level)
70 if (direct_pages_count[level] == 0)
73 direct_pages_count[level]--;
74 direct_pages_count[level - 1] += PTRS_PER_PTE;
77 void arch_report_meminfo(struct seq_file *m)
79 seq_printf(m, "DirectMap4k: %8lu kB\n",
80 direct_pages_count[PG_LEVEL_4K] << 2);
81 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
82 seq_printf(m, "DirectMap2M: %8lu kB\n",
83 direct_pages_count[PG_LEVEL_2M] << 11);
85 seq_printf(m, "DirectMap4M: %8lu kB\n",
86 direct_pages_count[PG_LEVEL_2M] << 12);
89 seq_printf(m, "DirectMap1G: %8lu kB\n",
90 direct_pages_count[PG_LEVEL_1G] << 20);
93 static inline void split_page_count(int level) { }
98 static inline unsigned long highmap_start_pfn(void)
100 return __pa_symbol(_text) >> PAGE_SHIFT;
103 static inline unsigned long highmap_end_pfn(void)
105 /* Do not reference physical address outside the kernel. */
106 return __pa_symbol(roundup(_brk_end, PMD_SIZE) - 1) >> PAGE_SHIFT;
112 within(unsigned long addr, unsigned long start, unsigned long end)
114 return addr >= start && addr < end;
118 within_inclusive(unsigned long addr, unsigned long start, unsigned long end)
120 return addr >= start && addr <= end;
128 * clflush_cache_range - flush a cache range with clflush
129 * @vaddr: virtual start address
130 * @size: number of bytes to flush
132 * clflushopt is an unordered instruction which needs fencing with mfence or
133 * sfence to avoid ordering issues.
135 void clflush_cache_range(void *vaddr, unsigned int size)
137 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
138 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
139 void *vend = vaddr + size;
146 for (; p < vend; p += clflush_size)
151 EXPORT_SYMBOL_GPL(clflush_cache_range);
153 void arch_invalidate_pmem(void *addr, size_t size)
155 clflush_cache_range(addr, size);
157 EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
159 static void __cpa_flush_all(void *arg)
161 unsigned long cache = (unsigned long)arg;
164 * Flush all to work around Errata in early athlons regarding
165 * large page flushing.
169 if (cache && boot_cpu_data.x86 >= 4)
173 static void cpa_flush_all(unsigned long cache)
175 BUG_ON(irqs_disabled());
177 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
180 static void __cpa_flush_range(void *arg)
183 * We could optimize that further and do individual per page
184 * tlb invalidates for a low number of pages. Caveat: we must
185 * flush the high aliases on 64bit as well.
190 static void cpa_flush_range(unsigned long start, int numpages, int cache)
192 unsigned int i, level;
195 BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
196 WARN_ON(PAGE_ALIGN(start) != start);
198 on_each_cpu(__cpa_flush_range, NULL, 1);
204 * We only need to flush on one CPU,
205 * clflush is a MESI-coherent instruction that
206 * will cause all other CPUs to flush the same
209 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
210 pte_t *pte = lookup_address(addr, &level);
213 * Only flush present addresses:
215 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
216 clflush_cache_range((void *) addr, PAGE_SIZE);
220 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
221 int in_flags, struct page **pages)
223 unsigned int i, level;
224 #ifdef CONFIG_PREEMPT
226 * Avoid wbinvd() because it causes latencies on all CPUs,
227 * regardless of any CPU isolation that may be in effect.
229 * This should be extended for CAT enabled systems independent of
230 * PREEMPT because wbinvd() does not respect the CAT partitions and
231 * this is exposed to unpriviledged users through the graphics
234 unsigned long do_wbinvd = 0;
236 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
239 BUG_ON(irqs_disabled());
241 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
243 if (!cache || do_wbinvd)
247 * We only need to flush on one CPU,
248 * clflush is a MESI-coherent instruction that
249 * will cause all other CPUs to flush the same
252 for (i = 0; i < numpages; i++) {
256 if (in_flags & CPA_PAGES_ARRAY)
257 addr = (unsigned long)page_address(pages[i]);
261 pte = lookup_address(addr, &level);
264 * Only flush present addresses:
266 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
267 clflush_cache_range((void *)addr, PAGE_SIZE);
272 * Certain areas of memory on x86 require very specific protection flags,
273 * for example the BIOS area or kernel text. Callers don't always get this
274 * right (again, ioremap() on BIOS memory is not uncommon) so this function
275 * checks and fixes these known static required protection bits.
277 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
280 pgprot_t forbidden = __pgprot(0);
283 * The BIOS area between 640k and 1Mb needs to be executable for
284 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
286 #ifdef CONFIG_PCI_BIOS
287 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
288 pgprot_val(forbidden) |= _PAGE_NX;
292 * The kernel text needs to be executable for obvious reasons
293 * Does not cover __inittext since that is gone later on. On
294 * 64bit we do not enforce !NX on the low mapping
296 if (within(address, (unsigned long)_text, (unsigned long)_etext))
297 pgprot_val(forbidden) |= _PAGE_NX;
300 * The .rodata section needs to be read-only. Using the pfn
301 * catches all aliases. This also includes __ro_after_init,
302 * so do not enforce until kernel_set_to_readonly is true.
304 if (kernel_set_to_readonly &&
305 within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
306 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
307 pgprot_val(forbidden) |= _PAGE_RW;
309 #if defined(CONFIG_X86_64)
311 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
312 * kernel text mappings for the large page aligned text, rodata sections
313 * will be always read-only. For the kernel identity mappings covering
314 * the holes caused by this alignment can be anything that user asks.
316 * This will preserve the large page mappings for kernel text/data
319 if (kernel_set_to_readonly &&
320 within(address, (unsigned long)_text,
321 (unsigned long)__end_rodata_hpage_align)) {
325 * Don't enforce the !RW mapping for the kernel text mapping,
326 * if the current mapping is already using small page mapping.
327 * No need to work hard to preserve large page mappings in this
330 * This also fixes the Linux Xen paravirt guest boot failure
331 * (because of unexpected read-only mappings for kernel identity
332 * mappings). In this paravirt guest case, the kernel text
333 * mapping and the kernel identity mapping share the same
334 * page-table pages. Thus we can't really use different
335 * protections for the kernel text and identity mappings. Also,
336 * these shared mappings are made of small page mappings.
337 * Thus this don't enforce !RW mapping for small page kernel
338 * text mapping logic will help Linux Xen parvirt guest boot
341 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
342 pgprot_val(forbidden) |= _PAGE_RW;
346 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
352 * Lookup the page table entry for a virtual address in a specific pgd.
353 * Return a pointer to the entry and the level of the mapping.
355 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
362 *level = PG_LEVEL_NONE;
367 p4d = p4d_offset(pgd, address);
371 *level = PG_LEVEL_512G;
372 if (p4d_large(*p4d) || !p4d_present(*p4d))
375 pud = pud_offset(p4d, address);
379 *level = PG_LEVEL_1G;
380 if (pud_large(*pud) || !pud_present(*pud))
383 pmd = pmd_offset(pud, address);
387 *level = PG_LEVEL_2M;
388 if (pmd_large(*pmd) || !pmd_present(*pmd))
391 *level = PG_LEVEL_4K;
393 return pte_offset_kernel(pmd, address);
397 * Lookup the page table entry for a virtual address. Return a pointer
398 * to the entry and the level of the mapping.
400 * Note: We return pud and pmd either when the entry is marked large
401 * or when the present bit is not set. Otherwise we would return a
402 * pointer to a nonexisting mapping.
404 pte_t *lookup_address(unsigned long address, unsigned int *level)
406 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
408 EXPORT_SYMBOL_GPL(lookup_address);
410 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
414 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
417 return lookup_address(address, level);
421 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
422 * or NULL if not present.
424 pmd_t *lookup_pmd_address(unsigned long address)
430 pgd = pgd_offset_k(address);
434 p4d = p4d_offset(pgd, address);
435 if (p4d_none(*p4d) || p4d_large(*p4d) || !p4d_present(*p4d))
438 pud = pud_offset(p4d, address);
439 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
442 return pmd_offset(pud, address);
446 * This is necessary because __pa() does not work on some
447 * kinds of memory, like vmalloc() or the alloc_remap()
448 * areas on 32-bit NUMA systems. The percpu areas can
449 * end up in this kind of memory, for instance.
451 * This could be optimized, but it is only intended to be
452 * used at inititalization time, and keeping it
453 * unoptimized should increase the testing coverage for
454 * the more obscure platforms.
456 phys_addr_t slow_virt_to_phys(void *__virt_addr)
458 unsigned long virt_addr = (unsigned long)__virt_addr;
459 phys_addr_t phys_addr;
460 unsigned long offset;
464 pte = lookup_address(virt_addr, &level);
468 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
469 * before being left-shifted PAGE_SHIFT bits -- this trick is to
470 * make 32-PAE kernel work correctly.
474 phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
475 offset = virt_addr & ~PUD_PAGE_MASK;
478 phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
479 offset = virt_addr & ~PMD_PAGE_MASK;
482 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
483 offset = virt_addr & ~PAGE_MASK;
486 return (phys_addr_t)(phys_addr | offset);
488 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
491 * Set the new pmd in all the pgds we know about:
493 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
496 set_pte_atomic(kpte, pte);
498 if (!SHARED_KERNEL_PMD) {
501 list_for_each_entry(page, &pgd_list, lru) {
507 pgd = (pgd_t *)page_address(page) + pgd_index(address);
508 p4d = p4d_offset(pgd, address);
509 pud = pud_offset(p4d, address);
510 pmd = pmd_offset(pud, address);
511 set_pte_atomic((pte_t *)pmd, pte);
517 static pgprot_t pgprot_clear_protnone_bits(pgprot_t prot)
520 * _PAGE_GLOBAL means "global page" for present PTEs.
521 * But, it is also used to indicate _PAGE_PROTNONE
522 * for non-present PTEs.
524 * This ensures that a _PAGE_GLOBAL PTE going from
525 * present to non-present is not confused as
528 if (!(pgprot_val(prot) & _PAGE_PRESENT))
529 pgprot_val(prot) &= ~_PAGE_GLOBAL;
535 try_preserve_large_page(pte_t *kpte, unsigned long address,
536 struct cpa_data *cpa)
538 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
539 pte_t new_pte, old_pte, *tmp;
540 pgprot_t old_prot, new_prot, req_prot;
544 if (cpa->force_split)
547 spin_lock(&pgd_lock);
549 * Check for races, another CPU might have split this page
552 tmp = _lookup_address_cpa(cpa, address, &level);
558 old_prot = pmd_pgprot(*(pmd_t *)kpte);
559 old_pfn = pmd_pfn(*(pmd_t *)kpte);
562 old_prot = pud_pgprot(*(pud_t *)kpte);
563 old_pfn = pud_pfn(*(pud_t *)kpte);
570 psize = page_level_size(level);
571 pmask = page_level_mask(level);
574 * Calculate the number of pages, which fit into this large
575 * page starting at address:
577 nextpage_addr = (address + psize) & pmask;
578 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
579 if (numpages < cpa->numpages)
580 cpa->numpages = numpages;
583 * We are safe now. Check whether the new pgprot is the same:
584 * Convert protection attributes to 4k-format, as cpa->mask* are set
588 /* Clear PSE (aka _PAGE_PAT) and move PAT bit to correct position */
589 req_prot = pgprot_large_2_4k(old_prot);
591 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
592 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
595 * req_prot is in format of 4k pages. It must be converted to large
596 * page format: the caching mode includes the PAT bit located at
597 * different bit positions in the two formats.
599 req_prot = pgprot_4k_2_large(req_prot);
600 req_prot = pgprot_clear_protnone_bits(req_prot);
601 if (pgprot_val(req_prot) & _PAGE_PRESENT)
602 pgprot_val(req_prot) |= _PAGE_PSE;
605 * old_pfn points to the large page base pfn. So we need
606 * to add the offset of the virtual address:
608 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
611 new_prot = static_protections(req_prot, address, pfn);
614 * We need to check the full range, whether
615 * static_protection() requires a different pgprot for one of
616 * the pages in the range we try to preserve:
618 addr = address & pmask;
620 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
621 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
623 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
628 * If there are no changes, return. maxpages has been updated
631 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
637 * We need to change the attributes. Check, whether we can
638 * change the large page in one go. We request a split, when
639 * the address is not aligned and the number of pages is
640 * smaller than the number of pages in the large page. Note
641 * that we limited the number of possible pages already to
642 * the number of pages in the large page.
644 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
646 * The address is aligned and the number of pages
647 * covers the full page.
649 new_pte = pfn_pte(old_pfn, new_prot);
650 __set_pmd_pte(kpte, address, new_pte);
651 cpa->flags |= CPA_FLUSHTLB;
656 spin_unlock(&pgd_lock);
662 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
665 pte_t *pbase = (pte_t *)page_address(base);
666 unsigned long ref_pfn, pfn, pfninc = 1;
667 unsigned int i, level;
671 spin_lock(&pgd_lock);
673 * Check for races, another CPU might have split this page
676 tmp = _lookup_address_cpa(cpa, address, &level);
678 spin_unlock(&pgd_lock);
682 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
686 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
688 * Clear PSE (aka _PAGE_PAT) and move
689 * PAT bit to correct position.
691 ref_prot = pgprot_large_2_4k(ref_prot);
693 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
697 ref_prot = pud_pgprot(*(pud_t *)kpte);
698 ref_pfn = pud_pfn(*(pud_t *)kpte);
699 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
702 * Clear the PSE flags if the PRESENT flag is not set
703 * otherwise pmd_present/pmd_huge will return true
704 * even on a non present pmd.
706 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
707 pgprot_val(ref_prot) &= ~_PAGE_PSE;
711 spin_unlock(&pgd_lock);
715 ref_prot = pgprot_clear_protnone_bits(ref_prot);
718 * Get the target pfn from the original entry:
721 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
722 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
724 if (virt_addr_valid(address)) {
725 unsigned long pfn = PFN_DOWN(__pa(address));
727 if (pfn_range_is_mapped(pfn, pfn + 1))
728 split_page_count(level);
732 * Install the new, split up pagetable.
734 * We use the standard kernel pagetable protections for the new
735 * pagetable protections, the actual ptes set above control the
736 * primary protection behavior:
738 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
741 * Intel Atom errata AAH41 workaround.
743 * The real fix should be in hw or in a microcode update, but
744 * we also probabilistically try to reduce the window of having
745 * a large TLB mixed with 4K TLBs while instruction fetches are
749 spin_unlock(&pgd_lock);
754 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
755 unsigned long address)
759 if (!debug_pagealloc_enabled())
760 spin_unlock(&cpa_lock);
761 base = alloc_pages(GFP_KERNEL, 0);
762 if (!debug_pagealloc_enabled())
763 spin_lock(&cpa_lock);
767 if (__split_large_page(cpa, kpte, address, base))
773 static bool try_to_free_pte_page(pte_t *pte)
777 for (i = 0; i < PTRS_PER_PTE; i++)
778 if (!pte_none(pte[i]))
781 free_page((unsigned long)pte);
785 static bool try_to_free_pmd_page(pmd_t *pmd)
789 for (i = 0; i < PTRS_PER_PMD; i++)
790 if (!pmd_none(pmd[i]))
793 free_page((unsigned long)pmd);
797 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
799 pte_t *pte = pte_offset_kernel(pmd, start);
801 while (start < end) {
802 set_pte(pte, __pte(0));
808 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
815 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
816 unsigned long start, unsigned long end)
818 if (unmap_pte_range(pmd, start, end))
819 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
823 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
825 pmd_t *pmd = pmd_offset(pud, start);
828 * Not on a 2MB page boundary?
830 if (start & (PMD_SIZE - 1)) {
831 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
832 unsigned long pre_end = min_t(unsigned long, end, next_page);
834 __unmap_pmd_range(pud, pmd, start, pre_end);
841 * Try to unmap in 2M chunks.
843 while (end - start >= PMD_SIZE) {
847 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
857 return __unmap_pmd_range(pud, pmd, start, end);
860 * Try again to free the PMD page if haven't succeeded above.
863 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
867 static void unmap_pud_range(p4d_t *p4d, unsigned long start, unsigned long end)
869 pud_t *pud = pud_offset(p4d, start);
872 * Not on a GB page boundary?
874 if (start & (PUD_SIZE - 1)) {
875 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
876 unsigned long pre_end = min_t(unsigned long, end, next_page);
878 unmap_pmd_range(pud, start, pre_end);
885 * Try to unmap in 1G chunks?
887 while (end - start >= PUD_SIZE) {
892 unmap_pmd_range(pud, start, start + PUD_SIZE);
902 unmap_pmd_range(pud, start, end);
905 * No need to try to free the PUD page because we'll free it in
906 * populate_pgd's error path
910 static int alloc_pte_page(pmd_t *pmd)
912 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL);
916 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
920 static int alloc_pmd_page(pud_t *pud)
922 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL);
926 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
930 static void populate_pte(struct cpa_data *cpa,
931 unsigned long start, unsigned long end,
932 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
936 pte = pte_offset_kernel(pmd, start);
938 pgprot = pgprot_clear_protnone_bits(pgprot);
940 while (num_pages-- && start < end) {
941 set_pte(pte, pfn_pte(cpa->pfn, pgprot));
949 static long populate_pmd(struct cpa_data *cpa,
950 unsigned long start, unsigned long end,
951 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
958 * Not on a 2M boundary?
960 if (start & (PMD_SIZE - 1)) {
961 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
962 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
964 pre_end = min_t(unsigned long, pre_end, next_page);
965 cur_pages = (pre_end - start) >> PAGE_SHIFT;
966 cur_pages = min_t(unsigned int, num_pages, cur_pages);
971 pmd = pmd_offset(pud, start);
973 if (alloc_pte_page(pmd))
976 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
982 * We mapped them all?
984 if (num_pages == cur_pages)
987 pmd_pgprot = pgprot_4k_2_large(pgprot);
989 while (end - start >= PMD_SIZE) {
992 * We cannot use a 1G page so allocate a PMD page if needed.
995 if (alloc_pmd_page(pud))
998 pmd = pmd_offset(pud, start);
1000 set_pmd(pmd, __pmd(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1001 massage_pgprot(pmd_pgprot)));
1004 cpa->pfn += PMD_SIZE >> PAGE_SHIFT;
1005 cur_pages += PMD_SIZE >> PAGE_SHIFT;
1009 * Map trailing 4K pages.
1012 pmd = pmd_offset(pud, start);
1014 if (alloc_pte_page(pmd))
1017 populate_pte(cpa, start, end, num_pages - cur_pages,
1023 static int populate_pud(struct cpa_data *cpa, unsigned long start, p4d_t *p4d,
1029 pgprot_t pud_pgprot;
1031 end = start + (cpa->numpages << PAGE_SHIFT);
1034 * Not on a Gb page boundary? => map everything up to it with
1037 if (start & (PUD_SIZE - 1)) {
1038 unsigned long pre_end;
1039 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1041 pre_end = min_t(unsigned long, end, next_page);
1042 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1043 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1045 pud = pud_offset(p4d, start);
1051 if (alloc_pmd_page(pud))
1054 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1062 /* We mapped them all? */
1063 if (cpa->numpages == cur_pages)
1066 pud = pud_offset(p4d, start);
1067 pud_pgprot = pgprot_4k_2_large(pgprot);
1070 * Map everything starting from the Gb boundary, possibly with 1G pages
1072 while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
1073 set_pud(pud, __pud(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1074 massage_pgprot(pud_pgprot)));
1077 cpa->pfn += PUD_SIZE >> PAGE_SHIFT;
1078 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1082 /* Map trailing leftover */
1086 pud = pud_offset(p4d, start);
1088 if (alloc_pmd_page(pud))
1091 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1102 * Restrictions for kernel page table do not necessarily apply when mapping in
1105 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1107 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1108 pud_t *pud = NULL; /* shut up gcc */
1113 pgd_entry = cpa->pgd + pgd_index(addr);
1115 if (pgd_none(*pgd_entry)) {
1116 p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL);
1120 set_pgd(pgd_entry, __pgd(__pa(p4d) | _KERNPG_TABLE));
1124 * Allocate a PUD page and hand it down for mapping.
1126 p4d = p4d_offset(pgd_entry, addr);
1127 if (p4d_none(*p4d)) {
1128 pud = (pud_t *)get_zeroed_page(GFP_KERNEL);
1132 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE));
1135 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1136 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1138 ret = populate_pud(cpa, addr, p4d, pgprot);
1141 * Leave the PUD page in place in case some other CPU or thread
1142 * already found it, but remove any useless entries we just
1145 unmap_pud_range(p4d, addr,
1146 addr + (cpa->numpages << PAGE_SHIFT));
1150 cpa->numpages = ret;
1154 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1159 * Right now, we only execute this code path when mapping
1160 * the EFI virtual memory map regions, no other users
1161 * provide a ->pgd value. This may change in the future.
1163 return populate_pgd(cpa, vaddr);
1167 * Ignore all non primary paths.
1175 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1177 * Also set numpages to '1' indicating that we processed cpa req for
1178 * one virtual address page and its pfn. TBD: numpages can be set based
1179 * on the initial value and the level returned by lookup_address().
1181 if (within(vaddr, PAGE_OFFSET,
1182 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1184 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1187 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1188 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1195 static int __change_page_attr(struct cpa_data *cpa, int primary)
1197 unsigned long address;
1200 pte_t *kpte, old_pte;
1202 if (cpa->flags & CPA_PAGES_ARRAY) {
1203 struct page *page = cpa->pages[cpa->curpage];
1204 if (unlikely(PageHighMem(page)))
1206 address = (unsigned long)page_address(page);
1207 } else if (cpa->flags & CPA_ARRAY)
1208 address = cpa->vaddr[cpa->curpage];
1210 address = *cpa->vaddr;
1212 kpte = _lookup_address_cpa(cpa, address, &level);
1214 return __cpa_process_fault(cpa, address, primary);
1217 if (pte_none(old_pte))
1218 return __cpa_process_fault(cpa, address, primary);
1220 if (level == PG_LEVEL_4K) {
1222 pgprot_t new_prot = pte_pgprot(old_pte);
1223 unsigned long pfn = pte_pfn(old_pte);
1225 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1226 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1228 new_prot = static_protections(new_prot, address, pfn);
1230 new_prot = pgprot_clear_protnone_bits(new_prot);
1233 * We need to keep the pfn from the existing PTE,
1234 * after all we're only going to change it's attributes
1235 * not the memory it points to
1237 new_pte = pfn_pte(pfn, new_prot);
1240 * Do we really change anything ?
1242 if (pte_val(old_pte) != pte_val(new_pte)) {
1243 set_pte_atomic(kpte, new_pte);
1244 cpa->flags |= CPA_FLUSHTLB;
1251 * Check, whether we can keep the large page intact
1252 * and just change the pte:
1254 do_split = try_preserve_large_page(kpte, address, cpa);
1256 * When the range fits into the existing large page,
1257 * return. cp->numpages and cpa->tlbflush have been updated in
1264 * We have to split the large page:
1266 err = split_large_page(cpa, kpte, address);
1269 * Do a global flush tlb after splitting the large page
1270 * and before we do the actual change page attribute in the PTE.
1272 * With out this, we violate the TLB application note, that says
1273 * "The TLBs may contain both ordinary and large-page
1274 * translations for a 4-KByte range of linear addresses. This
1275 * may occur if software modifies the paging structures so that
1276 * the page size used for the address range changes. If the two
1277 * translations differ with respect to page frame or attributes
1278 * (e.g., permissions), processor behavior is undefined and may
1279 * be implementation-specific."
1281 * We do this global tlb flush inside the cpa_lock, so that we
1282 * don't allow any other cpu, with stale tlb entries change the
1283 * page attribute in parallel, that also falls into the
1284 * just split large page entry.
1293 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1295 static int cpa_process_alias(struct cpa_data *cpa)
1297 struct cpa_data alias_cpa;
1298 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1299 unsigned long vaddr;
1302 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1306 * No need to redo, when the primary call touched the direct
1309 if (cpa->flags & CPA_PAGES_ARRAY) {
1310 struct page *page = cpa->pages[cpa->curpage];
1311 if (unlikely(PageHighMem(page)))
1313 vaddr = (unsigned long)page_address(page);
1314 } else if (cpa->flags & CPA_ARRAY)
1315 vaddr = cpa->vaddr[cpa->curpage];
1317 vaddr = *cpa->vaddr;
1319 if (!(within(vaddr, PAGE_OFFSET,
1320 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1323 alias_cpa.vaddr = &laddr;
1324 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1326 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1331 #ifdef CONFIG_X86_64
1333 * If the primary call didn't touch the high mapping already
1334 * and the physical address is inside the kernel map, we need
1335 * to touch the high mapped kernel as well:
1337 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1338 within_inclusive(cpa->pfn, highmap_start_pfn(),
1339 highmap_end_pfn())) {
1340 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1341 __START_KERNEL_map - phys_base;
1343 alias_cpa.vaddr = &temp_cpa_vaddr;
1344 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1347 * The high mapping range is imprecise, so ignore the
1350 __change_page_attr_set_clr(&alias_cpa, 0);
1357 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1359 unsigned long numpages = cpa->numpages;
1364 * Store the remaining nr of pages for the large page
1365 * preservation check.
1367 cpa->numpages = numpages;
1368 /* for array changes, we can't use large page */
1369 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1372 if (!debug_pagealloc_enabled())
1373 spin_lock(&cpa_lock);
1374 ret = __change_page_attr(cpa, checkalias);
1375 if (!debug_pagealloc_enabled())
1376 spin_unlock(&cpa_lock);
1381 ret = cpa_process_alias(cpa);
1387 * Adjust the number of pages with the result of the
1388 * CPA operation. Either a large page has been
1389 * preserved or a single page update happened.
1391 BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1392 numpages -= cpa->numpages;
1393 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1396 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1402 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1403 pgprot_t mask_set, pgprot_t mask_clr,
1404 int force_split, int in_flag,
1405 struct page **pages)
1407 struct cpa_data cpa;
1408 int ret, cache, checkalias;
1409 unsigned long baddr = 0;
1411 memset(&cpa, 0, sizeof(cpa));
1414 * Check, if we are requested to set a not supported
1415 * feature. Clearing non-supported features is OK.
1417 mask_set = canon_pgprot(mask_set);
1419 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1422 /* Ensure we are PAGE_SIZE aligned */
1423 if (in_flag & CPA_ARRAY) {
1425 for (i = 0; i < numpages; i++) {
1426 if (addr[i] & ~PAGE_MASK) {
1427 addr[i] &= PAGE_MASK;
1431 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1433 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1434 * No need to cehck in that case
1436 if (*addr & ~PAGE_MASK) {
1439 * People should not be passing in unaligned addresses:
1444 * Save address for cache flush. *addr is modified in the call
1445 * to __change_page_attr_set_clr() below.
1450 /* Must avoid aliasing mappings in the highmem code */
1451 kmap_flush_unused();
1457 cpa.numpages = numpages;
1458 cpa.mask_set = mask_set;
1459 cpa.mask_clr = mask_clr;
1462 cpa.force_split = force_split;
1464 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1465 cpa.flags |= in_flag;
1467 /* No alias checking for _NX bit modifications */
1468 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1470 ret = __change_page_attr_set_clr(&cpa, checkalias);
1473 * Check whether we really changed something:
1475 if (!(cpa.flags & CPA_FLUSHTLB))
1479 * No need to flush, when we did not set any of the caching
1482 cache = !!pgprot2cachemode(mask_set);
1485 * On success we use CLFLUSH, when the CPU supports it to
1486 * avoid the WBINVD. If the CPU does not support it and in the
1487 * error case we fall back to cpa_flush_all (which uses
1490 if (!ret && boot_cpu_has(X86_FEATURE_CLFLUSH)) {
1491 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1492 cpa_flush_array(addr, numpages, cache,
1495 cpa_flush_range(baddr, numpages, cache);
1497 cpa_flush_all(cache);
1503 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1504 pgprot_t mask, int array)
1506 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1507 (array ? CPA_ARRAY : 0), NULL);
1510 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1511 pgprot_t mask, int array)
1513 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1514 (array ? CPA_ARRAY : 0), NULL);
1517 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1520 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1521 CPA_PAGES_ARRAY, pages);
1524 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1527 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1528 CPA_PAGES_ARRAY, pages);
1531 int _set_memory_uc(unsigned long addr, int numpages)
1534 * for now UC MINUS. see comments in ioremap_nocache()
1535 * If you really need strong UC use ioremap_uc(), but note
1536 * that you cannot override IO areas with set_memory_*() as
1537 * these helpers cannot work with IO memory.
1539 return change_page_attr_set(&addr, numpages,
1540 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1544 int set_memory_uc(unsigned long addr, int numpages)
1549 * for now UC MINUS. see comments in ioremap_nocache()
1551 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1552 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1556 ret = _set_memory_uc(addr, numpages);
1563 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1567 EXPORT_SYMBOL(set_memory_uc);
1569 static int _set_memory_array(unsigned long *addr, int addrinarray,
1570 enum page_cache_mode new_type)
1572 enum page_cache_mode set_type;
1576 for (i = 0; i < addrinarray; i++) {
1577 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1583 /* If WC, set to UC- first and then WC */
1584 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1585 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1587 ret = change_page_attr_set(addr, addrinarray,
1588 cachemode2pgprot(set_type), 1);
1590 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1591 ret = change_page_attr_set_clr(addr, addrinarray,
1593 _PAGE_CACHE_MODE_WC),
1594 __pgprot(_PAGE_CACHE_MASK),
1595 0, CPA_ARRAY, NULL);
1602 for (j = 0; j < i; j++)
1603 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1608 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1610 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1612 EXPORT_SYMBOL(set_memory_array_uc);
1614 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1616 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1618 EXPORT_SYMBOL(set_memory_array_wc);
1620 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1622 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1624 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1626 int _set_memory_wc(unsigned long addr, int numpages)
1629 unsigned long addr_copy = addr;
1631 ret = change_page_attr_set(&addr, numpages,
1632 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1635 ret = change_page_attr_set_clr(&addr_copy, numpages,
1637 _PAGE_CACHE_MODE_WC),
1638 __pgprot(_PAGE_CACHE_MASK),
1644 int set_memory_wc(unsigned long addr, int numpages)
1648 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1649 _PAGE_CACHE_MODE_WC, NULL);
1653 ret = _set_memory_wc(addr, numpages);
1655 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1659 EXPORT_SYMBOL(set_memory_wc);
1661 int _set_memory_wt(unsigned long addr, int numpages)
1663 return change_page_attr_set(&addr, numpages,
1664 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1667 int set_memory_wt(unsigned long addr, int numpages)
1671 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1672 _PAGE_CACHE_MODE_WT, NULL);
1676 ret = _set_memory_wt(addr, numpages);
1678 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1682 EXPORT_SYMBOL_GPL(set_memory_wt);
1684 int _set_memory_wb(unsigned long addr, int numpages)
1686 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1687 return change_page_attr_clear(&addr, numpages,
1688 __pgprot(_PAGE_CACHE_MASK), 0);
1691 int set_memory_wb(unsigned long addr, int numpages)
1695 ret = _set_memory_wb(addr, numpages);
1699 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1702 EXPORT_SYMBOL(set_memory_wb);
1704 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1709 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1710 ret = change_page_attr_clear(addr, addrinarray,
1711 __pgprot(_PAGE_CACHE_MASK), 1);
1715 for (i = 0; i < addrinarray; i++)
1716 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1720 EXPORT_SYMBOL(set_memory_array_wb);
1722 int set_memory_x(unsigned long addr, int numpages)
1724 if (!(__supported_pte_mask & _PAGE_NX))
1727 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1729 EXPORT_SYMBOL(set_memory_x);
1731 int set_memory_nx(unsigned long addr, int numpages)
1733 if (!(__supported_pte_mask & _PAGE_NX))
1736 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1738 EXPORT_SYMBOL(set_memory_nx);
1740 int set_memory_ro(unsigned long addr, int numpages)
1742 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1745 int set_memory_rw(unsigned long addr, int numpages)
1747 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1750 int set_memory_np(unsigned long addr, int numpages)
1752 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1755 int set_memory_4k(unsigned long addr, int numpages)
1757 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1758 __pgprot(0), 1, 0, NULL);
1761 int set_memory_nonglobal(unsigned long addr, int numpages)
1763 return change_page_attr_clear(&addr, numpages,
1764 __pgprot(_PAGE_GLOBAL), 0);
1767 static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc)
1769 struct cpa_data cpa;
1770 unsigned long start;
1773 /* Nothing to do if memory encryption is not active */
1774 if (!mem_encrypt_active())
1777 /* Should not be working on unaligned addresses */
1778 if (WARN_ONCE(addr & ~PAGE_MASK, "misaligned address: %#lx\n", addr))
1783 memset(&cpa, 0, sizeof(cpa));
1785 cpa.numpages = numpages;
1786 cpa.mask_set = enc ? __pgprot(_PAGE_ENC) : __pgprot(0);
1787 cpa.mask_clr = enc ? __pgprot(0) : __pgprot(_PAGE_ENC);
1788 cpa.pgd = init_mm.pgd;
1790 /* Must avoid aliasing mappings in the highmem code */
1791 kmap_flush_unused();
1795 * Before changing the encryption attribute, we need to flush caches.
1797 if (static_cpu_has(X86_FEATURE_CLFLUSH))
1798 cpa_flush_range(start, numpages, 1);
1802 ret = __change_page_attr_set_clr(&cpa, 1);
1805 * After changing the encryption attribute, we need to flush TLBs
1806 * again in case any speculative TLB caching occurred (but no need
1807 * to flush caches again). We could just use cpa_flush_all(), but
1808 * in case TLB flushing gets optimized in the cpa_flush_range()
1809 * path use the same logic as above.
1811 if (static_cpu_has(X86_FEATURE_CLFLUSH))
1812 cpa_flush_range(start, numpages, 0);
1819 int set_memory_encrypted(unsigned long addr, int numpages)
1821 return __set_memory_enc_dec(addr, numpages, true);
1823 EXPORT_SYMBOL_GPL(set_memory_encrypted);
1825 int set_memory_decrypted(unsigned long addr, int numpages)
1827 return __set_memory_enc_dec(addr, numpages, false);
1829 EXPORT_SYMBOL_GPL(set_memory_decrypted);
1831 int set_pages_uc(struct page *page, int numpages)
1833 unsigned long addr = (unsigned long)page_address(page);
1835 return set_memory_uc(addr, numpages);
1837 EXPORT_SYMBOL(set_pages_uc);
1839 static int _set_pages_array(struct page **pages, int addrinarray,
1840 enum page_cache_mode new_type)
1842 unsigned long start;
1844 enum page_cache_mode set_type;
1849 for (i = 0; i < addrinarray; i++) {
1850 if (PageHighMem(pages[i]))
1852 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1853 end = start + PAGE_SIZE;
1854 if (reserve_memtype(start, end, new_type, NULL))
1858 /* If WC, set to UC- first and then WC */
1859 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1860 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1862 ret = cpa_set_pages_array(pages, addrinarray,
1863 cachemode2pgprot(set_type));
1864 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1865 ret = change_page_attr_set_clr(NULL, addrinarray,
1867 _PAGE_CACHE_MODE_WC),
1868 __pgprot(_PAGE_CACHE_MASK),
1869 0, CPA_PAGES_ARRAY, pages);
1872 return 0; /* Success */
1875 for (i = 0; i < free_idx; i++) {
1876 if (PageHighMem(pages[i]))
1878 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1879 end = start + PAGE_SIZE;
1880 free_memtype(start, end);
1885 int set_pages_array_uc(struct page **pages, int addrinarray)
1887 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1889 EXPORT_SYMBOL(set_pages_array_uc);
1891 int set_pages_array_wc(struct page **pages, int addrinarray)
1893 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1895 EXPORT_SYMBOL(set_pages_array_wc);
1897 int set_pages_array_wt(struct page **pages, int addrinarray)
1899 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1901 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1903 int set_pages_wb(struct page *page, int numpages)
1905 unsigned long addr = (unsigned long)page_address(page);
1907 return set_memory_wb(addr, numpages);
1909 EXPORT_SYMBOL(set_pages_wb);
1911 int set_pages_array_wb(struct page **pages, int addrinarray)
1914 unsigned long start;
1918 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1919 retval = cpa_clear_pages_array(pages, addrinarray,
1920 __pgprot(_PAGE_CACHE_MASK));
1924 for (i = 0; i < addrinarray; i++) {
1925 if (PageHighMem(pages[i]))
1927 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1928 end = start + PAGE_SIZE;
1929 free_memtype(start, end);
1934 EXPORT_SYMBOL(set_pages_array_wb);
1936 int set_pages_x(struct page *page, int numpages)
1938 unsigned long addr = (unsigned long)page_address(page);
1940 return set_memory_x(addr, numpages);
1942 EXPORT_SYMBOL(set_pages_x);
1944 int set_pages_nx(struct page *page, int numpages)
1946 unsigned long addr = (unsigned long)page_address(page);
1948 return set_memory_nx(addr, numpages);
1950 EXPORT_SYMBOL(set_pages_nx);
1952 int set_pages_ro(struct page *page, int numpages)
1954 unsigned long addr = (unsigned long)page_address(page);
1956 return set_memory_ro(addr, numpages);
1959 int set_pages_rw(struct page *page, int numpages)
1961 unsigned long addr = (unsigned long)page_address(page);
1963 return set_memory_rw(addr, numpages);
1966 #ifdef CONFIG_DEBUG_PAGEALLOC
1968 static int __set_pages_p(struct page *page, int numpages)
1970 unsigned long tempaddr = (unsigned long) page_address(page);
1971 struct cpa_data cpa = { .vaddr = &tempaddr,
1973 .numpages = numpages,
1974 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1975 .mask_clr = __pgprot(0),
1979 * No alias checking needed for setting present flag. otherwise,
1980 * we may need to break large pages for 64-bit kernel text
1981 * mappings (this adds to complexity if we want to do this from
1982 * atomic context especially). Let's keep it simple!
1984 return __change_page_attr_set_clr(&cpa, 0);
1987 static int __set_pages_np(struct page *page, int numpages)
1989 unsigned long tempaddr = (unsigned long) page_address(page);
1990 struct cpa_data cpa = { .vaddr = &tempaddr,
1992 .numpages = numpages,
1993 .mask_set = __pgprot(0),
1994 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1998 * No alias checking needed for setting not present flag. otherwise,
1999 * we may need to break large pages for 64-bit kernel text
2000 * mappings (this adds to complexity if we want to do this from
2001 * atomic context especially). Let's keep it simple!
2003 return __change_page_attr_set_clr(&cpa, 0);
2006 void __kernel_map_pages(struct page *page, int numpages, int enable)
2008 if (PageHighMem(page))
2011 debug_check_no_locks_freed(page_address(page),
2012 numpages * PAGE_SIZE);
2016 * The return value is ignored as the calls cannot fail.
2017 * Large pages for identity mappings are not used at boot time
2018 * and hence no memory allocations during large page split.
2021 __set_pages_p(page, numpages);
2023 __set_pages_np(page, numpages);
2026 * We should perform an IPI and flush all tlbs,
2027 * but that can deadlock->flush only current cpu:
2031 arch_flush_lazy_mmu_mode();
2034 #ifdef CONFIG_HIBERNATION
2036 bool kernel_page_present(struct page *page)
2041 if (PageHighMem(page))
2044 pte = lookup_address((unsigned long)page_address(page), &level);
2045 return (pte_val(*pte) & _PAGE_PRESENT);
2048 #endif /* CONFIG_HIBERNATION */
2050 #endif /* CONFIG_DEBUG_PAGEALLOC */
2052 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
2053 unsigned numpages, unsigned long page_flags)
2055 int retval = -EINVAL;
2057 struct cpa_data cpa = {
2061 .numpages = numpages,
2062 .mask_set = __pgprot(0),
2063 .mask_clr = __pgprot(0),
2067 if (!(__supported_pte_mask & _PAGE_NX))
2070 if (!(page_flags & _PAGE_NX))
2071 cpa.mask_clr = __pgprot(_PAGE_NX);
2073 if (!(page_flags & _PAGE_RW))
2074 cpa.mask_clr = __pgprot(_PAGE_RW);
2076 if (!(page_flags & _PAGE_ENC))
2077 cpa.mask_clr = pgprot_encrypted(cpa.mask_clr);
2079 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
2081 retval = __change_page_attr_set_clr(&cpa, 0);
2089 * The testcases use internal knowledge of the implementation that shouldn't
2090 * be exposed to the rest of the kernel. Include these directly here.
2092 #ifdef CONFIG_CPA_DEBUG
2093 #include "pageattr-test.c"