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x86/mm/cpa: Split, rename and clean up try_preserve_large_page()
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1 /*
2  * Copyright 2002 Andi Kleen, SuSE Labs.
3  * Thanks to Ben LaHaise for precious feedback.
4  */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
8 #include <linux/mm.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
17
18 #include <asm/e820/api.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <linux/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
26 #include <asm/pat.h>
27 #include <asm/set_memory.h>
28
29 /*
30  * The current flushing context - we pass it instead of 5 arguments:
31  */
32 struct cpa_data {
33         unsigned long   *vaddr;
34         pgd_t           *pgd;
35         pgprot_t        mask_set;
36         pgprot_t        mask_clr;
37         unsigned long   numpages;
38         int             flags;
39         unsigned long   pfn;
40         unsigned        force_split : 1;
41         int             curpage;
42         struct page     **pages;
43 };
44
45 /*
46  * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
47  * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
48  * entries change the page attribute in parallel to some other cpu
49  * splitting a large page entry along with changing the attribute.
50  */
51 static DEFINE_SPINLOCK(cpa_lock);
52
53 #define CPA_FLUSHTLB 1
54 #define CPA_ARRAY 2
55 #define CPA_PAGES_ARRAY 4
56 #define CPA_NO_CHECK_ALIAS 8 /* Do not search for aliases */
57
58 #ifdef CONFIG_PROC_FS
59 static unsigned long direct_pages_count[PG_LEVEL_NUM];
60
61 void update_page_count(int level, unsigned long pages)
62 {
63         /* Protect against CPA */
64         spin_lock(&pgd_lock);
65         direct_pages_count[level] += pages;
66         spin_unlock(&pgd_lock);
67 }
68
69 static void split_page_count(int level)
70 {
71         if (direct_pages_count[level] == 0)
72                 return;
73
74         direct_pages_count[level]--;
75         direct_pages_count[level - 1] += PTRS_PER_PTE;
76 }
77
78 void arch_report_meminfo(struct seq_file *m)
79 {
80         seq_printf(m, "DirectMap4k:    %8lu kB\n",
81                         direct_pages_count[PG_LEVEL_4K] << 2);
82 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
83         seq_printf(m, "DirectMap2M:    %8lu kB\n",
84                         direct_pages_count[PG_LEVEL_2M] << 11);
85 #else
86         seq_printf(m, "DirectMap4M:    %8lu kB\n",
87                         direct_pages_count[PG_LEVEL_2M] << 12);
88 #endif
89         if (direct_gbpages)
90                 seq_printf(m, "DirectMap1G:    %8lu kB\n",
91                         direct_pages_count[PG_LEVEL_1G] << 20);
92 }
93 #else
94 static inline void split_page_count(int level) { }
95 #endif
96
97 static inline int
98 within(unsigned long addr, unsigned long start, unsigned long end)
99 {
100         return addr >= start && addr < end;
101 }
102
103 static inline int
104 within_inclusive(unsigned long addr, unsigned long start, unsigned long end)
105 {
106         return addr >= start && addr <= end;
107 }
108
109 #ifdef CONFIG_X86_64
110
111 static inline unsigned long highmap_start_pfn(void)
112 {
113         return __pa_symbol(_text) >> PAGE_SHIFT;
114 }
115
116 static inline unsigned long highmap_end_pfn(void)
117 {
118         /* Do not reference physical address outside the kernel. */
119         return __pa_symbol(roundup(_brk_end, PMD_SIZE) - 1) >> PAGE_SHIFT;
120 }
121
122 static bool __cpa_pfn_in_highmap(unsigned long pfn)
123 {
124         /*
125          * Kernel text has an alias mapping at a high address, known
126          * here as "highmap".
127          */
128         return within_inclusive(pfn, highmap_start_pfn(), highmap_end_pfn());
129 }
130
131 #else
132
133 static bool __cpa_pfn_in_highmap(unsigned long pfn)
134 {
135         /* There is no highmap on 32-bit */
136         return false;
137 }
138
139 #endif
140
141 /*
142  * Flushing functions
143  */
144
145 /**
146  * clflush_cache_range - flush a cache range with clflush
147  * @vaddr:      virtual start address
148  * @size:       number of bytes to flush
149  *
150  * clflushopt is an unordered instruction which needs fencing with mfence or
151  * sfence to avoid ordering issues.
152  */
153 void clflush_cache_range(void *vaddr, unsigned int size)
154 {
155         const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
156         void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
157         void *vend = vaddr + size;
158
159         if (p >= vend)
160                 return;
161
162         mb();
163
164         for (; p < vend; p += clflush_size)
165                 clflushopt(p);
166
167         mb();
168 }
169 EXPORT_SYMBOL_GPL(clflush_cache_range);
170
171 void arch_invalidate_pmem(void *addr, size_t size)
172 {
173         clflush_cache_range(addr, size);
174 }
175 EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
176
177 static void __cpa_flush_all(void *arg)
178 {
179         unsigned long cache = (unsigned long)arg;
180
181         /*
182          * Flush all to work around Errata in early athlons regarding
183          * large page flushing.
184          */
185         __flush_tlb_all();
186
187         if (cache && boot_cpu_data.x86 >= 4)
188                 wbinvd();
189 }
190
191 static void cpa_flush_all(unsigned long cache)
192 {
193         BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
194
195         on_each_cpu(__cpa_flush_all, (void *) cache, 1);
196 }
197
198 static void __cpa_flush_range(void *arg)
199 {
200         /*
201          * We could optimize that further and do individual per page
202          * tlb invalidates for a low number of pages. Caveat: we must
203          * flush the high aliases on 64bit as well.
204          */
205         __flush_tlb_all();
206 }
207
208 static void cpa_flush_range(unsigned long start, int numpages, int cache)
209 {
210         unsigned int i, level;
211         unsigned long addr;
212
213         BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
214         WARN_ON(PAGE_ALIGN(start) != start);
215
216         on_each_cpu(__cpa_flush_range, NULL, 1);
217
218         if (!cache)
219                 return;
220
221         /*
222          * We only need to flush on one CPU,
223          * clflush is a MESI-coherent instruction that
224          * will cause all other CPUs to flush the same
225          * cachelines:
226          */
227         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
228                 pte_t *pte = lookup_address(addr, &level);
229
230                 /*
231                  * Only flush present addresses:
232                  */
233                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
234                         clflush_cache_range((void *) addr, PAGE_SIZE);
235         }
236 }
237
238 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
239                             int in_flags, struct page **pages)
240 {
241         unsigned int i, level;
242 #ifdef CONFIG_PREEMPT
243         /*
244          * Avoid wbinvd() because it causes latencies on all CPUs,
245          * regardless of any CPU isolation that may be in effect.
246          *
247          * This should be extended for CAT enabled systems independent of
248          * PREEMPT because wbinvd() does not respect the CAT partitions and
249          * this is exposed to unpriviledged users through the graphics
250          * subsystem.
251          */
252         unsigned long do_wbinvd = 0;
253 #else
254         unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
255 #endif
256
257         BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
258
259         on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
260
261         if (!cache || do_wbinvd)
262                 return;
263
264         /*
265          * We only need to flush on one CPU,
266          * clflush is a MESI-coherent instruction that
267          * will cause all other CPUs to flush the same
268          * cachelines:
269          */
270         for (i = 0; i < numpages; i++) {
271                 unsigned long addr;
272                 pte_t *pte;
273
274                 if (in_flags & CPA_PAGES_ARRAY)
275                         addr = (unsigned long)page_address(pages[i]);
276                 else
277                         addr = start[i];
278
279                 pte = lookup_address(addr, &level);
280
281                 /*
282                  * Only flush present addresses:
283                  */
284                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
285                         clflush_cache_range((void *)addr, PAGE_SIZE);
286         }
287 }
288
289 /*
290  * Certain areas of memory on x86 require very specific protection flags,
291  * for example the BIOS area or kernel text. Callers don't always get this
292  * right (again, ioremap() on BIOS memory is not uncommon) so this function
293  * checks and fixes these known static required protection bits.
294  */
295 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
296                                    unsigned long pfn)
297 {
298         pgprot_t forbidden = __pgprot(0);
299
300         /*
301          * The BIOS area between 640k and 1Mb needs to be executable for
302          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
303          */
304 #ifdef CONFIG_PCI_BIOS
305         if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
306                 pgprot_val(forbidden) |= _PAGE_NX;
307 #endif
308
309         /*
310          * The kernel text needs to be executable for obvious reasons
311          * Does not cover __inittext since that is gone later on. On
312          * 64bit we do not enforce !NX on the low mapping
313          */
314         if (within(address, (unsigned long)_text, (unsigned long)_etext))
315                 pgprot_val(forbidden) |= _PAGE_NX;
316
317         /*
318          * The .rodata section needs to be read-only. Using the pfn
319          * catches all aliases.  This also includes __ro_after_init,
320          * so do not enforce until kernel_set_to_readonly is true.
321          */
322         if (kernel_set_to_readonly &&
323             within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
324                    __pa_symbol(__end_rodata) >> PAGE_SHIFT))
325                 pgprot_val(forbidden) |= _PAGE_RW;
326
327 #if defined(CONFIG_X86_64)
328         /*
329          * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
330          * kernel text mappings for the large page aligned text, rodata sections
331          * will be always read-only. For the kernel identity mappings covering
332          * the holes caused by this alignment can be anything that user asks.
333          *
334          * This will preserve the large page mappings for kernel text/data
335          * at no extra cost.
336          */
337         if (kernel_set_to_readonly &&
338             within(address, (unsigned long)_text,
339                    (unsigned long)__end_rodata_hpage_align)) {
340                 unsigned int level;
341
342                 /*
343                  * Don't enforce the !RW mapping for the kernel text mapping,
344                  * if the current mapping is already using small page mapping.
345                  * No need to work hard to preserve large page mappings in this
346                  * case.
347                  *
348                  * This also fixes the Linux Xen paravirt guest boot failure
349                  * (because of unexpected read-only mappings for kernel identity
350                  * mappings). In this paravirt guest case, the kernel text
351                  * mapping and the kernel identity mapping share the same
352                  * page-table pages. Thus we can't really use different
353                  * protections for the kernel text and identity mappings. Also,
354                  * these shared mappings are made of small page mappings.
355                  * Thus this don't enforce !RW mapping for small page kernel
356                  * text mapping logic will help Linux Xen parvirt guest boot
357                  * as well.
358                  */
359                 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
360                         pgprot_val(forbidden) |= _PAGE_RW;
361         }
362 #endif
363
364         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
365
366         return prot;
367 }
368
369 /*
370  * Lookup the page table entry for a virtual address in a specific pgd.
371  * Return a pointer to the entry and the level of the mapping.
372  */
373 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
374                              unsigned int *level)
375 {
376         p4d_t *p4d;
377         pud_t *pud;
378         pmd_t *pmd;
379
380         *level = PG_LEVEL_NONE;
381
382         if (pgd_none(*pgd))
383                 return NULL;
384
385         p4d = p4d_offset(pgd, address);
386         if (p4d_none(*p4d))
387                 return NULL;
388
389         *level = PG_LEVEL_512G;
390         if (p4d_large(*p4d) || !p4d_present(*p4d))
391                 return (pte_t *)p4d;
392
393         pud = pud_offset(p4d, address);
394         if (pud_none(*pud))
395                 return NULL;
396
397         *level = PG_LEVEL_1G;
398         if (pud_large(*pud) || !pud_present(*pud))
399                 return (pte_t *)pud;
400
401         pmd = pmd_offset(pud, address);
402         if (pmd_none(*pmd))
403                 return NULL;
404
405         *level = PG_LEVEL_2M;
406         if (pmd_large(*pmd) || !pmd_present(*pmd))
407                 return (pte_t *)pmd;
408
409         *level = PG_LEVEL_4K;
410
411         return pte_offset_kernel(pmd, address);
412 }
413
414 /*
415  * Lookup the page table entry for a virtual address. Return a pointer
416  * to the entry and the level of the mapping.
417  *
418  * Note: We return pud and pmd either when the entry is marked large
419  * or when the present bit is not set. Otherwise we would return a
420  * pointer to a nonexisting mapping.
421  */
422 pte_t *lookup_address(unsigned long address, unsigned int *level)
423 {
424         return lookup_address_in_pgd(pgd_offset_k(address), address, level);
425 }
426 EXPORT_SYMBOL_GPL(lookup_address);
427
428 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
429                                   unsigned int *level)
430 {
431         if (cpa->pgd)
432                 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
433                                                address, level);
434
435         return lookup_address(address, level);
436 }
437
438 /*
439  * Lookup the PMD entry for a virtual address. Return a pointer to the entry
440  * or NULL if not present.
441  */
442 pmd_t *lookup_pmd_address(unsigned long address)
443 {
444         pgd_t *pgd;
445         p4d_t *p4d;
446         pud_t *pud;
447
448         pgd = pgd_offset_k(address);
449         if (pgd_none(*pgd))
450                 return NULL;
451
452         p4d = p4d_offset(pgd, address);
453         if (p4d_none(*p4d) || p4d_large(*p4d) || !p4d_present(*p4d))
454                 return NULL;
455
456         pud = pud_offset(p4d, address);
457         if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
458                 return NULL;
459
460         return pmd_offset(pud, address);
461 }
462
463 /*
464  * This is necessary because __pa() does not work on some
465  * kinds of memory, like vmalloc() or the alloc_remap()
466  * areas on 32-bit NUMA systems.  The percpu areas can
467  * end up in this kind of memory, for instance.
468  *
469  * This could be optimized, but it is only intended to be
470  * used at inititalization time, and keeping it
471  * unoptimized should increase the testing coverage for
472  * the more obscure platforms.
473  */
474 phys_addr_t slow_virt_to_phys(void *__virt_addr)
475 {
476         unsigned long virt_addr = (unsigned long)__virt_addr;
477         phys_addr_t phys_addr;
478         unsigned long offset;
479         enum pg_level level;
480         pte_t *pte;
481
482         pte = lookup_address(virt_addr, &level);
483         BUG_ON(!pte);
484
485         /*
486          * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
487          * before being left-shifted PAGE_SHIFT bits -- this trick is to
488          * make 32-PAE kernel work correctly.
489          */
490         switch (level) {
491         case PG_LEVEL_1G:
492                 phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
493                 offset = virt_addr & ~PUD_PAGE_MASK;
494                 break;
495         case PG_LEVEL_2M:
496                 phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
497                 offset = virt_addr & ~PMD_PAGE_MASK;
498                 break;
499         default:
500                 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
501                 offset = virt_addr & ~PAGE_MASK;
502         }
503
504         return (phys_addr_t)(phys_addr | offset);
505 }
506 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
507
508 /*
509  * Set the new pmd in all the pgds we know about:
510  */
511 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
512 {
513         /* change init_mm */
514         set_pte_atomic(kpte, pte);
515 #ifdef CONFIG_X86_32
516         if (!SHARED_KERNEL_PMD) {
517                 struct page *page;
518
519                 list_for_each_entry(page, &pgd_list, lru) {
520                         pgd_t *pgd;
521                         p4d_t *p4d;
522                         pud_t *pud;
523                         pmd_t *pmd;
524
525                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
526                         p4d = p4d_offset(pgd, address);
527                         pud = pud_offset(p4d, address);
528                         pmd = pmd_offset(pud, address);
529                         set_pte_atomic((pte_t *)pmd, pte);
530                 }
531         }
532 #endif
533 }
534
535 static pgprot_t pgprot_clear_protnone_bits(pgprot_t prot)
536 {
537         /*
538          * _PAGE_GLOBAL means "global page" for present PTEs.
539          * But, it is also used to indicate _PAGE_PROTNONE
540          * for non-present PTEs.
541          *
542          * This ensures that a _PAGE_GLOBAL PTE going from
543          * present to non-present is not confused as
544          * _PAGE_PROTNONE.
545          */
546         if (!(pgprot_val(prot) & _PAGE_PRESENT))
547                 pgprot_val(prot) &= ~_PAGE_GLOBAL;
548
549         return prot;
550 }
551
552 static int __should_split_large_page(pte_t *kpte, unsigned long address,
553                                      struct cpa_data *cpa)
554 {
555         unsigned long numpages, pmask, psize, lpaddr, addr, pfn, old_pfn;
556         pgprot_t old_prot, new_prot, req_prot;
557         pte_t new_pte, old_pte, *tmp;
558         enum pg_level level;
559         int i;
560
561         /*
562          * Check for races, another CPU might have split this page
563          * up already:
564          */
565         tmp = _lookup_address_cpa(cpa, address, &level);
566         if (tmp != kpte)
567                 return 1;
568
569         switch (level) {
570         case PG_LEVEL_2M:
571                 old_prot = pmd_pgprot(*(pmd_t *)kpte);
572                 old_pfn = pmd_pfn(*(pmd_t *)kpte);
573                 break;
574         case PG_LEVEL_1G:
575                 old_prot = pud_pgprot(*(pud_t *)kpte);
576                 old_pfn = pud_pfn(*(pud_t *)kpte);
577                 break;
578         default:
579                 return -EINVAL;
580         }
581
582         psize = page_level_size(level);
583         pmask = page_level_mask(level);
584
585         /*
586          * Calculate the number of pages, which fit into this large
587          * page starting at address:
588          */
589         lpaddr = (address + psize) & pmask;
590         numpages = (lpaddr - address) >> PAGE_SHIFT;
591         if (numpages < cpa->numpages)
592                 cpa->numpages = numpages;
593
594         /*
595          * We are safe now. Check whether the new pgprot is the same:
596          * Convert protection attributes to 4k-format, as cpa->mask* are set
597          * up accordingly.
598          */
599         old_pte = *kpte;
600         /* Clear PSE (aka _PAGE_PAT) and move PAT bit to correct position */
601         req_prot = pgprot_large_2_4k(old_prot);
602
603         pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
604         pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
605
606         /*
607          * req_prot is in format of 4k pages. It must be converted to large
608          * page format: the caching mode includes the PAT bit located at
609          * different bit positions in the two formats.
610          */
611         req_prot = pgprot_4k_2_large(req_prot);
612         req_prot = pgprot_clear_protnone_bits(req_prot);
613         if (pgprot_val(req_prot) & _PAGE_PRESENT)
614                 pgprot_val(req_prot) |= _PAGE_PSE;
615
616         /*
617          * old_pfn points to the large page base pfn. So we need to add the
618          * offset of the virtual address:
619          */
620         pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
621         cpa->pfn = pfn;
622
623         /*
624          * Calculate the large page base address and the number of 4K pages
625          * in the large page
626          */
627         lpaddr = address & pmask;
628         numpages = psize >> PAGE_SHIFT;
629
630         /*
631          * Make sure that the requested pgprot does not violate the static
632          * protections. Check the full large page whether one of the pages
633          * in it results in a different pgprot than the first one of the
634          * requested range. If yes, then the page needs to be split.
635          */
636         new_prot = static_protections(req_prot, address, pfn);
637         pfn = old_pfn;
638         for (i = 0, addr = lpaddr; i < numpages; i++, addr += PAGE_SIZE, pfn++) {
639                 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
640
641                 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
642                         return 1;
643         }
644
645         /* If there are no changes, return. */
646         if (pgprot_val(new_prot) == pgprot_val(old_prot))
647                 return 0;
648
649         /*
650          * Verify that the address is aligned and the number of pages
651          * covers the full page.
652          */
653         if (address != lpaddr || cpa->numpages != numpages)
654                 return 1;
655
656         /* All checks passed. Update the large page mapping. */
657         new_pte = pfn_pte(old_pfn, new_prot);
658         __set_pmd_pte(kpte, address, new_pte);
659         cpa->flags |= CPA_FLUSHTLB;
660         return 0;
661 }
662
663 static int should_split_large_page(pte_t *kpte, unsigned long address,
664                                    struct cpa_data *cpa)
665 {
666         int do_split;
667
668         if (cpa->force_split)
669                 return 1;
670
671         spin_lock(&pgd_lock);
672         do_split = __should_split_large_page(kpte, address, cpa);
673         spin_unlock(&pgd_lock);
674
675         return do_split;
676 }
677
678 static int
679 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
680                    struct page *base)
681 {
682         pte_t *pbase = (pte_t *)page_address(base);
683         unsigned long ref_pfn, pfn, pfninc = 1;
684         unsigned int i, level;
685         pte_t *tmp;
686         pgprot_t ref_prot;
687
688         spin_lock(&pgd_lock);
689         /*
690          * Check for races, another CPU might have split this page
691          * up for us already:
692          */
693         tmp = _lookup_address_cpa(cpa, address, &level);
694         if (tmp != kpte) {
695                 spin_unlock(&pgd_lock);
696                 return 1;
697         }
698
699         paravirt_alloc_pte(&init_mm, page_to_pfn(base));
700
701         switch (level) {
702         case PG_LEVEL_2M:
703                 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
704                 /*
705                  * Clear PSE (aka _PAGE_PAT) and move
706                  * PAT bit to correct position.
707                  */
708                 ref_prot = pgprot_large_2_4k(ref_prot);
709
710                 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
711                 break;
712
713         case PG_LEVEL_1G:
714                 ref_prot = pud_pgprot(*(pud_t *)kpte);
715                 ref_pfn = pud_pfn(*(pud_t *)kpte);
716                 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
717
718                 /*
719                  * Clear the PSE flags if the PRESENT flag is not set
720                  * otherwise pmd_present/pmd_huge will return true
721                  * even on a non present pmd.
722                  */
723                 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
724                         pgprot_val(ref_prot) &= ~_PAGE_PSE;
725                 break;
726
727         default:
728                 spin_unlock(&pgd_lock);
729                 return 1;
730         }
731
732         ref_prot = pgprot_clear_protnone_bits(ref_prot);
733
734         /*
735          * Get the target pfn from the original entry:
736          */
737         pfn = ref_pfn;
738         for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
739                 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
740
741         if (virt_addr_valid(address)) {
742                 unsigned long pfn = PFN_DOWN(__pa(address));
743
744                 if (pfn_range_is_mapped(pfn, pfn + 1))
745                         split_page_count(level);
746         }
747
748         /*
749          * Install the new, split up pagetable.
750          *
751          * We use the standard kernel pagetable protections for the new
752          * pagetable protections, the actual ptes set above control the
753          * primary protection behavior:
754          */
755         __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
756
757         /*
758          * Intel Atom errata AAH41 workaround.
759          *
760          * The real fix should be in hw or in a microcode update, but
761          * we also probabilistically try to reduce the window of having
762          * a large TLB mixed with 4K TLBs while instruction fetches are
763          * going on.
764          */
765         __flush_tlb_all();
766         spin_unlock(&pgd_lock);
767
768         return 0;
769 }
770
771 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
772                             unsigned long address)
773 {
774         struct page *base;
775
776         if (!debug_pagealloc_enabled())
777                 spin_unlock(&cpa_lock);
778         base = alloc_pages(GFP_KERNEL, 0);
779         if (!debug_pagealloc_enabled())
780                 spin_lock(&cpa_lock);
781         if (!base)
782                 return -ENOMEM;
783
784         if (__split_large_page(cpa, kpte, address, base))
785                 __free_page(base);
786
787         return 0;
788 }
789
790 static bool try_to_free_pte_page(pte_t *pte)
791 {
792         int i;
793
794         for (i = 0; i < PTRS_PER_PTE; i++)
795                 if (!pte_none(pte[i]))
796                         return false;
797
798         free_page((unsigned long)pte);
799         return true;
800 }
801
802 static bool try_to_free_pmd_page(pmd_t *pmd)
803 {
804         int i;
805
806         for (i = 0; i < PTRS_PER_PMD; i++)
807                 if (!pmd_none(pmd[i]))
808                         return false;
809
810         free_page((unsigned long)pmd);
811         return true;
812 }
813
814 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
815 {
816         pte_t *pte = pte_offset_kernel(pmd, start);
817
818         while (start < end) {
819                 set_pte(pte, __pte(0));
820
821                 start += PAGE_SIZE;
822                 pte++;
823         }
824
825         if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
826                 pmd_clear(pmd);
827                 return true;
828         }
829         return false;
830 }
831
832 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
833                               unsigned long start, unsigned long end)
834 {
835         if (unmap_pte_range(pmd, start, end))
836                 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
837                         pud_clear(pud);
838 }
839
840 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
841 {
842         pmd_t *pmd = pmd_offset(pud, start);
843
844         /*
845          * Not on a 2MB page boundary?
846          */
847         if (start & (PMD_SIZE - 1)) {
848                 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
849                 unsigned long pre_end = min_t(unsigned long, end, next_page);
850
851                 __unmap_pmd_range(pud, pmd, start, pre_end);
852
853                 start = pre_end;
854                 pmd++;
855         }
856
857         /*
858          * Try to unmap in 2M chunks.
859          */
860         while (end - start >= PMD_SIZE) {
861                 if (pmd_large(*pmd))
862                         pmd_clear(pmd);
863                 else
864                         __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
865
866                 start += PMD_SIZE;
867                 pmd++;
868         }
869
870         /*
871          * 4K leftovers?
872          */
873         if (start < end)
874                 return __unmap_pmd_range(pud, pmd, start, end);
875
876         /*
877          * Try again to free the PMD page if haven't succeeded above.
878          */
879         if (!pud_none(*pud))
880                 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
881                         pud_clear(pud);
882 }
883
884 static void unmap_pud_range(p4d_t *p4d, unsigned long start, unsigned long end)
885 {
886         pud_t *pud = pud_offset(p4d, start);
887
888         /*
889          * Not on a GB page boundary?
890          */
891         if (start & (PUD_SIZE - 1)) {
892                 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
893                 unsigned long pre_end   = min_t(unsigned long, end, next_page);
894
895                 unmap_pmd_range(pud, start, pre_end);
896
897                 start = pre_end;
898                 pud++;
899         }
900
901         /*
902          * Try to unmap in 1G chunks?
903          */
904         while (end - start >= PUD_SIZE) {
905
906                 if (pud_large(*pud))
907                         pud_clear(pud);
908                 else
909                         unmap_pmd_range(pud, start, start + PUD_SIZE);
910
911                 start += PUD_SIZE;
912                 pud++;
913         }
914
915         /*
916          * 2M leftovers?
917          */
918         if (start < end)
919                 unmap_pmd_range(pud, start, end);
920
921         /*
922          * No need to try to free the PUD page because we'll free it in
923          * populate_pgd's error path
924          */
925 }
926
927 static int alloc_pte_page(pmd_t *pmd)
928 {
929         pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL);
930         if (!pte)
931                 return -1;
932
933         set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
934         return 0;
935 }
936
937 static int alloc_pmd_page(pud_t *pud)
938 {
939         pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL);
940         if (!pmd)
941                 return -1;
942
943         set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
944         return 0;
945 }
946
947 static void populate_pte(struct cpa_data *cpa,
948                          unsigned long start, unsigned long end,
949                          unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
950 {
951         pte_t *pte;
952
953         pte = pte_offset_kernel(pmd, start);
954
955         pgprot = pgprot_clear_protnone_bits(pgprot);
956
957         while (num_pages-- && start < end) {
958                 set_pte(pte, pfn_pte(cpa->pfn, pgprot));
959
960                 start    += PAGE_SIZE;
961                 cpa->pfn++;
962                 pte++;
963         }
964 }
965
966 static long populate_pmd(struct cpa_data *cpa,
967                          unsigned long start, unsigned long end,
968                          unsigned num_pages, pud_t *pud, pgprot_t pgprot)
969 {
970         long cur_pages = 0;
971         pmd_t *pmd;
972         pgprot_t pmd_pgprot;
973
974         /*
975          * Not on a 2M boundary?
976          */
977         if (start & (PMD_SIZE - 1)) {
978                 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
979                 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
980
981                 pre_end   = min_t(unsigned long, pre_end, next_page);
982                 cur_pages = (pre_end - start) >> PAGE_SHIFT;
983                 cur_pages = min_t(unsigned int, num_pages, cur_pages);
984
985                 /*
986                  * Need a PTE page?
987                  */
988                 pmd = pmd_offset(pud, start);
989                 if (pmd_none(*pmd))
990                         if (alloc_pte_page(pmd))
991                                 return -1;
992
993                 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
994
995                 start = pre_end;
996         }
997
998         /*
999          * We mapped them all?
1000          */
1001         if (num_pages == cur_pages)
1002                 return cur_pages;
1003
1004         pmd_pgprot = pgprot_4k_2_large(pgprot);
1005
1006         while (end - start >= PMD_SIZE) {
1007
1008                 /*
1009                  * We cannot use a 1G page so allocate a PMD page if needed.
1010                  */
1011                 if (pud_none(*pud))
1012                         if (alloc_pmd_page(pud))
1013                                 return -1;
1014
1015                 pmd = pmd_offset(pud, start);
1016
1017                 set_pmd(pmd, pmd_mkhuge(pfn_pmd(cpa->pfn,
1018                                         canon_pgprot(pmd_pgprot))));
1019
1020                 start     += PMD_SIZE;
1021                 cpa->pfn  += PMD_SIZE >> PAGE_SHIFT;
1022                 cur_pages += PMD_SIZE >> PAGE_SHIFT;
1023         }
1024
1025         /*
1026          * Map trailing 4K pages.
1027          */
1028         if (start < end) {
1029                 pmd = pmd_offset(pud, start);
1030                 if (pmd_none(*pmd))
1031                         if (alloc_pte_page(pmd))
1032                                 return -1;
1033
1034                 populate_pte(cpa, start, end, num_pages - cur_pages,
1035                              pmd, pgprot);
1036         }
1037         return num_pages;
1038 }
1039
1040 static int populate_pud(struct cpa_data *cpa, unsigned long start, p4d_t *p4d,
1041                         pgprot_t pgprot)
1042 {
1043         pud_t *pud;
1044         unsigned long end;
1045         long cur_pages = 0;
1046         pgprot_t pud_pgprot;
1047
1048         end = start + (cpa->numpages << PAGE_SHIFT);
1049
1050         /*
1051          * Not on a Gb page boundary? => map everything up to it with
1052          * smaller pages.
1053          */
1054         if (start & (PUD_SIZE - 1)) {
1055                 unsigned long pre_end;
1056                 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1057
1058                 pre_end   = min_t(unsigned long, end, next_page);
1059                 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1060                 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1061
1062                 pud = pud_offset(p4d, start);
1063
1064                 /*
1065                  * Need a PMD page?
1066                  */
1067                 if (pud_none(*pud))
1068                         if (alloc_pmd_page(pud))
1069                                 return -1;
1070
1071                 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1072                                          pud, pgprot);
1073                 if (cur_pages < 0)
1074                         return cur_pages;
1075
1076                 start = pre_end;
1077         }
1078
1079         /* We mapped them all? */
1080         if (cpa->numpages == cur_pages)
1081                 return cur_pages;
1082
1083         pud = pud_offset(p4d, start);
1084         pud_pgprot = pgprot_4k_2_large(pgprot);
1085
1086         /*
1087          * Map everything starting from the Gb boundary, possibly with 1G pages
1088          */
1089         while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
1090                 set_pud(pud, pud_mkhuge(pfn_pud(cpa->pfn,
1091                                    canon_pgprot(pud_pgprot))));
1092
1093                 start     += PUD_SIZE;
1094                 cpa->pfn  += PUD_SIZE >> PAGE_SHIFT;
1095                 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1096                 pud++;
1097         }
1098
1099         /* Map trailing leftover */
1100         if (start < end) {
1101                 long tmp;
1102
1103                 pud = pud_offset(p4d, start);
1104                 if (pud_none(*pud))
1105                         if (alloc_pmd_page(pud))
1106                                 return -1;
1107
1108                 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1109                                    pud, pgprot);
1110                 if (tmp < 0)
1111                         return cur_pages;
1112
1113                 cur_pages += tmp;
1114         }
1115         return cur_pages;
1116 }
1117
1118 /*
1119  * Restrictions for kernel page table do not necessarily apply when mapping in
1120  * an alternate PGD.
1121  */
1122 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1123 {
1124         pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1125         pud_t *pud = NULL;      /* shut up gcc */
1126         p4d_t *p4d;
1127         pgd_t *pgd_entry;
1128         long ret;
1129
1130         pgd_entry = cpa->pgd + pgd_index(addr);
1131
1132         if (pgd_none(*pgd_entry)) {
1133                 p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL);
1134                 if (!p4d)
1135                         return -1;
1136
1137                 set_pgd(pgd_entry, __pgd(__pa(p4d) | _KERNPG_TABLE));
1138         }
1139
1140         /*
1141          * Allocate a PUD page and hand it down for mapping.
1142          */
1143         p4d = p4d_offset(pgd_entry, addr);
1144         if (p4d_none(*p4d)) {
1145                 pud = (pud_t *)get_zeroed_page(GFP_KERNEL);
1146                 if (!pud)
1147                         return -1;
1148
1149                 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE));
1150         }
1151
1152         pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1153         pgprot_val(pgprot) |=  pgprot_val(cpa->mask_set);
1154
1155         ret = populate_pud(cpa, addr, p4d, pgprot);
1156         if (ret < 0) {
1157                 /*
1158                  * Leave the PUD page in place in case some other CPU or thread
1159                  * already found it, but remove any useless entries we just
1160                  * added to it.
1161                  */
1162                 unmap_pud_range(p4d, addr,
1163                                 addr + (cpa->numpages << PAGE_SHIFT));
1164                 return ret;
1165         }
1166
1167         cpa->numpages = ret;
1168         return 0;
1169 }
1170
1171 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1172                                int primary)
1173 {
1174         if (cpa->pgd) {
1175                 /*
1176                  * Right now, we only execute this code path when mapping
1177                  * the EFI virtual memory map regions, no other users
1178                  * provide a ->pgd value. This may change in the future.
1179                  */
1180                 return populate_pgd(cpa, vaddr);
1181         }
1182
1183         /*
1184          * Ignore all non primary paths.
1185          */
1186         if (!primary) {
1187                 cpa->numpages = 1;
1188                 return 0;
1189         }
1190
1191         /*
1192          * Ignore the NULL PTE for kernel identity mapping, as it is expected
1193          * to have holes.
1194          * Also set numpages to '1' indicating that we processed cpa req for
1195          * one virtual address page and its pfn. TBD: numpages can be set based
1196          * on the initial value and the level returned by lookup_address().
1197          */
1198         if (within(vaddr, PAGE_OFFSET,
1199                    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1200                 cpa->numpages = 1;
1201                 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1202                 return 0;
1203
1204         } else if (__cpa_pfn_in_highmap(cpa->pfn)) {
1205                 /* Faults in the highmap are OK, so do not warn: */
1206                 return -EFAULT;
1207         } else {
1208                 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1209                         "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1210                         *cpa->vaddr);
1211
1212                 return -EFAULT;
1213         }
1214 }
1215
1216 static int __change_page_attr(struct cpa_data *cpa, int primary)
1217 {
1218         unsigned long address;
1219         int do_split, err;
1220         unsigned int level;
1221         pte_t *kpte, old_pte;
1222
1223         if (cpa->flags & CPA_PAGES_ARRAY) {
1224                 struct page *page = cpa->pages[cpa->curpage];
1225                 if (unlikely(PageHighMem(page)))
1226                         return 0;
1227                 address = (unsigned long)page_address(page);
1228         } else if (cpa->flags & CPA_ARRAY)
1229                 address = cpa->vaddr[cpa->curpage];
1230         else
1231                 address = *cpa->vaddr;
1232 repeat:
1233         kpte = _lookup_address_cpa(cpa, address, &level);
1234         if (!kpte)
1235                 return __cpa_process_fault(cpa, address, primary);
1236
1237         old_pte = *kpte;
1238         if (pte_none(old_pte))
1239                 return __cpa_process_fault(cpa, address, primary);
1240
1241         if (level == PG_LEVEL_4K) {
1242                 pte_t new_pte;
1243                 pgprot_t new_prot = pte_pgprot(old_pte);
1244                 unsigned long pfn = pte_pfn(old_pte);
1245
1246                 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1247                 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1248
1249                 new_prot = static_protections(new_prot, address, pfn);
1250
1251                 new_prot = pgprot_clear_protnone_bits(new_prot);
1252
1253                 /*
1254                  * We need to keep the pfn from the existing PTE,
1255                  * after all we're only going to change it's attributes
1256                  * not the memory it points to
1257                  */
1258                 new_pte = pfn_pte(pfn, new_prot);
1259                 cpa->pfn = pfn;
1260                 /*
1261                  * Do we really change anything ?
1262                  */
1263                 if (pte_val(old_pte) != pte_val(new_pte)) {
1264                         set_pte_atomic(kpte, new_pte);
1265                         cpa->flags |= CPA_FLUSHTLB;
1266                 }
1267                 cpa->numpages = 1;
1268                 return 0;
1269         }
1270
1271         /*
1272          * Check, whether we can keep the large page intact
1273          * and just change the pte:
1274          */
1275         do_split = should_split_large_page(kpte, address, cpa);
1276         /*
1277          * When the range fits into the existing large page,
1278          * return. cp->numpages and cpa->tlbflush have been updated in
1279          * try_large_page:
1280          */
1281         if (do_split <= 0)
1282                 return do_split;
1283
1284         /*
1285          * We have to split the large page:
1286          */
1287         err = split_large_page(cpa, kpte, address);
1288         if (!err) {
1289                 /*
1290                  * Do a global flush tlb after splitting the large page
1291                  * and before we do the actual change page attribute in the PTE.
1292                  *
1293                  * With out this, we violate the TLB application note, that says
1294                  * "The TLBs may contain both ordinary and large-page
1295                  *  translations for a 4-KByte range of linear addresses. This
1296                  *  may occur if software modifies the paging structures so that
1297                  *  the page size used for the address range changes. If the two
1298                  *  translations differ with respect to page frame or attributes
1299                  *  (e.g., permissions), processor behavior is undefined and may
1300                  *  be implementation-specific."
1301                  *
1302                  * We do this global tlb flush inside the cpa_lock, so that we
1303                  * don't allow any other cpu, with stale tlb entries change the
1304                  * page attribute in parallel, that also falls into the
1305                  * just split large page entry.
1306                  */
1307                 flush_tlb_all();
1308                 goto repeat;
1309         }
1310
1311         return err;
1312 }
1313
1314 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1315
1316 static int cpa_process_alias(struct cpa_data *cpa)
1317 {
1318         struct cpa_data alias_cpa;
1319         unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1320         unsigned long vaddr;
1321         int ret;
1322
1323         if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1324                 return 0;
1325
1326         /*
1327          * No need to redo, when the primary call touched the direct
1328          * mapping already:
1329          */
1330         if (cpa->flags & CPA_PAGES_ARRAY) {
1331                 struct page *page = cpa->pages[cpa->curpage];
1332                 if (unlikely(PageHighMem(page)))
1333                         return 0;
1334                 vaddr = (unsigned long)page_address(page);
1335         } else if (cpa->flags & CPA_ARRAY)
1336                 vaddr = cpa->vaddr[cpa->curpage];
1337         else
1338                 vaddr = *cpa->vaddr;
1339
1340         if (!(within(vaddr, PAGE_OFFSET,
1341                     PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1342
1343                 alias_cpa = *cpa;
1344                 alias_cpa.vaddr = &laddr;
1345                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1346
1347                 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1348                 if (ret)
1349                         return ret;
1350         }
1351
1352 #ifdef CONFIG_X86_64
1353         /*
1354          * If the primary call didn't touch the high mapping already
1355          * and the physical address is inside the kernel map, we need
1356          * to touch the high mapped kernel as well:
1357          */
1358         if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1359             __cpa_pfn_in_highmap(cpa->pfn)) {
1360                 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1361                                                __START_KERNEL_map - phys_base;
1362                 alias_cpa = *cpa;
1363                 alias_cpa.vaddr = &temp_cpa_vaddr;
1364                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1365
1366                 /*
1367                  * The high mapping range is imprecise, so ignore the
1368                  * return value.
1369                  */
1370                 __change_page_attr_set_clr(&alias_cpa, 0);
1371         }
1372 #endif
1373
1374         return 0;
1375 }
1376
1377 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1378 {
1379         unsigned long numpages = cpa->numpages;
1380         int ret;
1381
1382         while (numpages) {
1383                 /*
1384                  * Store the remaining nr of pages for the large page
1385                  * preservation check.
1386                  */
1387                 cpa->numpages = numpages;
1388                 /* for array changes, we can't use large page */
1389                 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1390                         cpa->numpages = 1;
1391
1392                 if (!debug_pagealloc_enabled())
1393                         spin_lock(&cpa_lock);
1394                 ret = __change_page_attr(cpa, checkalias);
1395                 if (!debug_pagealloc_enabled())
1396                         spin_unlock(&cpa_lock);
1397                 if (ret)
1398                         return ret;
1399
1400                 if (checkalias) {
1401                         ret = cpa_process_alias(cpa);
1402                         if (ret)
1403                                 return ret;
1404                 }
1405
1406                 /*
1407                  * Adjust the number of pages with the result of the
1408                  * CPA operation. Either a large page has been
1409                  * preserved or a single page update happened.
1410                  */
1411                 BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1412                 numpages -= cpa->numpages;
1413                 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1414                         cpa->curpage++;
1415                 else
1416                         *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1417
1418         }
1419         return 0;
1420 }
1421
1422 /*
1423  * Machine check recovery code needs to change cache mode of poisoned
1424  * pages to UC to avoid speculative access logging another error. But
1425  * passing the address of the 1:1 mapping to set_memory_uc() is a fine
1426  * way to encourage a speculative access. So we cheat and flip the top
1427  * bit of the address. This works fine for the code that updates the
1428  * page tables. But at the end of the process we need to flush the cache
1429  * and the non-canonical address causes a #GP fault when used by the
1430  * CLFLUSH instruction.
1431  *
1432  * But in the common case we already have a canonical address. This code
1433  * will fix the top bit if needed and is a no-op otherwise.
1434  */
1435 static inline unsigned long make_addr_canonical_again(unsigned long addr)
1436 {
1437 #ifdef CONFIG_X86_64
1438         return (long)(addr << 1) >> 1;
1439 #else
1440         return addr;
1441 #endif
1442 }
1443
1444
1445 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1446                                     pgprot_t mask_set, pgprot_t mask_clr,
1447                                     int force_split, int in_flag,
1448                                     struct page **pages)
1449 {
1450         struct cpa_data cpa;
1451         int ret, cache, checkalias;
1452         unsigned long baddr = 0;
1453
1454         memset(&cpa, 0, sizeof(cpa));
1455
1456         /*
1457          * Check, if we are requested to set a not supported
1458          * feature.  Clearing non-supported features is OK.
1459          */
1460         mask_set = canon_pgprot(mask_set);
1461
1462         if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1463                 return 0;
1464
1465         /* Ensure we are PAGE_SIZE aligned */
1466         if (in_flag & CPA_ARRAY) {
1467                 int i;
1468                 for (i = 0; i < numpages; i++) {
1469                         if (addr[i] & ~PAGE_MASK) {
1470                                 addr[i] &= PAGE_MASK;
1471                                 WARN_ON_ONCE(1);
1472                         }
1473                 }
1474         } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1475                 /*
1476                  * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1477                  * No need to cehck in that case
1478                  */
1479                 if (*addr & ~PAGE_MASK) {
1480                         *addr &= PAGE_MASK;
1481                         /*
1482                          * People should not be passing in unaligned addresses:
1483                          */
1484                         WARN_ON_ONCE(1);
1485                 }
1486                 /*
1487                  * Save address for cache flush. *addr is modified in the call
1488                  * to __change_page_attr_set_clr() below.
1489                  */
1490                 baddr = make_addr_canonical_again(*addr);
1491         }
1492
1493         /* Must avoid aliasing mappings in the highmem code */
1494         kmap_flush_unused();
1495
1496         vm_unmap_aliases();
1497
1498         cpa.vaddr = addr;
1499         cpa.pages = pages;
1500         cpa.numpages = numpages;
1501         cpa.mask_set = mask_set;
1502         cpa.mask_clr = mask_clr;
1503         cpa.flags = 0;
1504         cpa.curpage = 0;
1505         cpa.force_split = force_split;
1506
1507         if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1508                 cpa.flags |= in_flag;
1509
1510         /* No alias checking for _NX bit modifications */
1511         checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1512         /* Has caller explicitly disabled alias checking? */
1513         if (in_flag & CPA_NO_CHECK_ALIAS)
1514                 checkalias = 0;
1515
1516         ret = __change_page_attr_set_clr(&cpa, checkalias);
1517
1518         /*
1519          * Check whether we really changed something:
1520          */
1521         if (!(cpa.flags & CPA_FLUSHTLB))
1522                 goto out;
1523
1524         /*
1525          * No need to flush, when we did not set any of the caching
1526          * attributes:
1527          */
1528         cache = !!pgprot2cachemode(mask_set);
1529
1530         /*
1531          * On success we use CLFLUSH, when the CPU supports it to
1532          * avoid the WBINVD. If the CPU does not support it and in the
1533          * error case we fall back to cpa_flush_all (which uses
1534          * WBINVD):
1535          */
1536         if (!ret && boot_cpu_has(X86_FEATURE_CLFLUSH)) {
1537                 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1538                         cpa_flush_array(addr, numpages, cache,
1539                                         cpa.flags, pages);
1540                 } else
1541                         cpa_flush_range(baddr, numpages, cache);
1542         } else
1543                 cpa_flush_all(cache);
1544
1545 out:
1546         return ret;
1547 }
1548
1549 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1550                                        pgprot_t mask, int array)
1551 {
1552         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1553                 (array ? CPA_ARRAY : 0), NULL);
1554 }
1555
1556 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1557                                          pgprot_t mask, int array)
1558 {
1559         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1560                 (array ? CPA_ARRAY : 0), NULL);
1561 }
1562
1563 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1564                                        pgprot_t mask)
1565 {
1566         return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1567                 CPA_PAGES_ARRAY, pages);
1568 }
1569
1570 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1571                                          pgprot_t mask)
1572 {
1573         return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1574                 CPA_PAGES_ARRAY, pages);
1575 }
1576
1577 int _set_memory_uc(unsigned long addr, int numpages)
1578 {
1579         /*
1580          * for now UC MINUS. see comments in ioremap_nocache()
1581          * If you really need strong UC use ioremap_uc(), but note
1582          * that you cannot override IO areas with set_memory_*() as
1583          * these helpers cannot work with IO memory.
1584          */
1585         return change_page_attr_set(&addr, numpages,
1586                                     cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1587                                     0);
1588 }
1589
1590 int set_memory_uc(unsigned long addr, int numpages)
1591 {
1592         int ret;
1593
1594         /*
1595          * for now UC MINUS. see comments in ioremap_nocache()
1596          */
1597         ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1598                               _PAGE_CACHE_MODE_UC_MINUS, NULL);
1599         if (ret)
1600                 goto out_err;
1601
1602         ret = _set_memory_uc(addr, numpages);
1603         if (ret)
1604                 goto out_free;
1605
1606         return 0;
1607
1608 out_free:
1609         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1610 out_err:
1611         return ret;
1612 }
1613 EXPORT_SYMBOL(set_memory_uc);
1614
1615 static int _set_memory_array(unsigned long *addr, int addrinarray,
1616                 enum page_cache_mode new_type)
1617 {
1618         enum page_cache_mode set_type;
1619         int i, j;
1620         int ret;
1621
1622         for (i = 0; i < addrinarray; i++) {
1623                 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1624                                         new_type, NULL);
1625                 if (ret)
1626                         goto out_free;
1627         }
1628
1629         /* If WC, set to UC- first and then WC */
1630         set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1631                                 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1632
1633         ret = change_page_attr_set(addr, addrinarray,
1634                                    cachemode2pgprot(set_type), 1);
1635
1636         if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1637                 ret = change_page_attr_set_clr(addr, addrinarray,
1638                                                cachemode2pgprot(
1639                                                 _PAGE_CACHE_MODE_WC),
1640                                                __pgprot(_PAGE_CACHE_MASK),
1641                                                0, CPA_ARRAY, NULL);
1642         if (ret)
1643                 goto out_free;
1644
1645         return 0;
1646
1647 out_free:
1648         for (j = 0; j < i; j++)
1649                 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1650
1651         return ret;
1652 }
1653
1654 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1655 {
1656         return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1657 }
1658 EXPORT_SYMBOL(set_memory_array_uc);
1659
1660 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1661 {
1662         return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1663 }
1664 EXPORT_SYMBOL(set_memory_array_wc);
1665
1666 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1667 {
1668         return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1669 }
1670 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1671
1672 int _set_memory_wc(unsigned long addr, int numpages)
1673 {
1674         int ret;
1675         unsigned long addr_copy = addr;
1676
1677         ret = change_page_attr_set(&addr, numpages,
1678                                    cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1679                                    0);
1680         if (!ret) {
1681                 ret = change_page_attr_set_clr(&addr_copy, numpages,
1682                                                cachemode2pgprot(
1683                                                 _PAGE_CACHE_MODE_WC),
1684                                                __pgprot(_PAGE_CACHE_MASK),
1685                                                0, 0, NULL);
1686         }
1687         return ret;
1688 }
1689
1690 int set_memory_wc(unsigned long addr, int numpages)
1691 {
1692         int ret;
1693
1694         ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1695                 _PAGE_CACHE_MODE_WC, NULL);
1696         if (ret)
1697                 return ret;
1698
1699         ret = _set_memory_wc(addr, numpages);
1700         if (ret)
1701                 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1702
1703         return ret;
1704 }
1705 EXPORT_SYMBOL(set_memory_wc);
1706
1707 int _set_memory_wt(unsigned long addr, int numpages)
1708 {
1709         return change_page_attr_set(&addr, numpages,
1710                                     cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1711 }
1712
1713 int set_memory_wt(unsigned long addr, int numpages)
1714 {
1715         int ret;
1716
1717         ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1718                               _PAGE_CACHE_MODE_WT, NULL);
1719         if (ret)
1720                 return ret;
1721
1722         ret = _set_memory_wt(addr, numpages);
1723         if (ret)
1724                 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1725
1726         return ret;
1727 }
1728 EXPORT_SYMBOL_GPL(set_memory_wt);
1729
1730 int _set_memory_wb(unsigned long addr, int numpages)
1731 {
1732         /* WB cache mode is hard wired to all cache attribute bits being 0 */
1733         return change_page_attr_clear(&addr, numpages,
1734                                       __pgprot(_PAGE_CACHE_MASK), 0);
1735 }
1736
1737 int set_memory_wb(unsigned long addr, int numpages)
1738 {
1739         int ret;
1740
1741         ret = _set_memory_wb(addr, numpages);
1742         if (ret)
1743                 return ret;
1744
1745         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1746         return 0;
1747 }
1748 EXPORT_SYMBOL(set_memory_wb);
1749
1750 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1751 {
1752         int i;
1753         int ret;
1754
1755         /* WB cache mode is hard wired to all cache attribute bits being 0 */
1756         ret = change_page_attr_clear(addr, addrinarray,
1757                                       __pgprot(_PAGE_CACHE_MASK), 1);
1758         if (ret)
1759                 return ret;
1760
1761         for (i = 0; i < addrinarray; i++)
1762                 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1763
1764         return 0;
1765 }
1766 EXPORT_SYMBOL(set_memory_array_wb);
1767
1768 int set_memory_x(unsigned long addr, int numpages)
1769 {
1770         if (!(__supported_pte_mask & _PAGE_NX))
1771                 return 0;
1772
1773         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1774 }
1775 EXPORT_SYMBOL(set_memory_x);
1776
1777 int set_memory_nx(unsigned long addr, int numpages)
1778 {
1779         if (!(__supported_pte_mask & _PAGE_NX))
1780                 return 0;
1781
1782         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1783 }
1784 EXPORT_SYMBOL(set_memory_nx);
1785
1786 int set_memory_ro(unsigned long addr, int numpages)
1787 {
1788         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1789 }
1790
1791 int set_memory_rw(unsigned long addr, int numpages)
1792 {
1793         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1794 }
1795
1796 int set_memory_np(unsigned long addr, int numpages)
1797 {
1798         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1799 }
1800
1801 int set_memory_np_noalias(unsigned long addr, int numpages)
1802 {
1803         int cpa_flags = CPA_NO_CHECK_ALIAS;
1804
1805         return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1806                                         __pgprot(_PAGE_PRESENT), 0,
1807                                         cpa_flags, NULL);
1808 }
1809
1810 int set_memory_4k(unsigned long addr, int numpages)
1811 {
1812         return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1813                                         __pgprot(0), 1, 0, NULL);
1814 }
1815
1816 int set_memory_nonglobal(unsigned long addr, int numpages)
1817 {
1818         return change_page_attr_clear(&addr, numpages,
1819                                       __pgprot(_PAGE_GLOBAL), 0);
1820 }
1821
1822 int set_memory_global(unsigned long addr, int numpages)
1823 {
1824         return change_page_attr_set(&addr, numpages,
1825                                     __pgprot(_PAGE_GLOBAL), 0);
1826 }
1827
1828 static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc)
1829 {
1830         struct cpa_data cpa;
1831         unsigned long start;
1832         int ret;
1833
1834         /* Nothing to do if memory encryption is not active */
1835         if (!mem_encrypt_active())
1836                 return 0;
1837
1838         /* Should not be working on unaligned addresses */
1839         if (WARN_ONCE(addr & ~PAGE_MASK, "misaligned address: %#lx\n", addr))
1840                 addr &= PAGE_MASK;
1841
1842         start = addr;
1843
1844         memset(&cpa, 0, sizeof(cpa));
1845         cpa.vaddr = &addr;
1846         cpa.numpages = numpages;
1847         cpa.mask_set = enc ? __pgprot(_PAGE_ENC) : __pgprot(0);
1848         cpa.mask_clr = enc ? __pgprot(0) : __pgprot(_PAGE_ENC);
1849         cpa.pgd = init_mm.pgd;
1850
1851         /* Must avoid aliasing mappings in the highmem code */
1852         kmap_flush_unused();
1853         vm_unmap_aliases();
1854
1855         /*
1856          * Before changing the encryption attribute, we need to flush caches.
1857          */
1858         if (static_cpu_has(X86_FEATURE_CLFLUSH))
1859                 cpa_flush_range(start, numpages, 1);
1860         else
1861                 cpa_flush_all(1);
1862
1863         ret = __change_page_attr_set_clr(&cpa, 1);
1864
1865         /*
1866          * After changing the encryption attribute, we need to flush TLBs
1867          * again in case any speculative TLB caching occurred (but no need
1868          * to flush caches again).  We could just use cpa_flush_all(), but
1869          * in case TLB flushing gets optimized in the cpa_flush_range()
1870          * path use the same logic as above.
1871          */
1872         if (static_cpu_has(X86_FEATURE_CLFLUSH))
1873                 cpa_flush_range(start, numpages, 0);
1874         else
1875                 cpa_flush_all(0);
1876
1877         return ret;
1878 }
1879
1880 int set_memory_encrypted(unsigned long addr, int numpages)
1881 {
1882         return __set_memory_enc_dec(addr, numpages, true);
1883 }
1884 EXPORT_SYMBOL_GPL(set_memory_encrypted);
1885
1886 int set_memory_decrypted(unsigned long addr, int numpages)
1887 {
1888         return __set_memory_enc_dec(addr, numpages, false);
1889 }
1890 EXPORT_SYMBOL_GPL(set_memory_decrypted);
1891
1892 int set_pages_uc(struct page *page, int numpages)
1893 {
1894         unsigned long addr = (unsigned long)page_address(page);
1895
1896         return set_memory_uc(addr, numpages);
1897 }
1898 EXPORT_SYMBOL(set_pages_uc);
1899
1900 static int _set_pages_array(struct page **pages, int addrinarray,
1901                 enum page_cache_mode new_type)
1902 {
1903         unsigned long start;
1904         unsigned long end;
1905         enum page_cache_mode set_type;
1906         int i;
1907         int free_idx;
1908         int ret;
1909
1910         for (i = 0; i < addrinarray; i++) {
1911                 if (PageHighMem(pages[i]))
1912                         continue;
1913                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1914                 end = start + PAGE_SIZE;
1915                 if (reserve_memtype(start, end, new_type, NULL))
1916                         goto err_out;
1917         }
1918
1919         /* If WC, set to UC- first and then WC */
1920         set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1921                                 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1922
1923         ret = cpa_set_pages_array(pages, addrinarray,
1924                                   cachemode2pgprot(set_type));
1925         if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1926                 ret = change_page_attr_set_clr(NULL, addrinarray,
1927                                                cachemode2pgprot(
1928                                                 _PAGE_CACHE_MODE_WC),
1929                                                __pgprot(_PAGE_CACHE_MASK),
1930                                                0, CPA_PAGES_ARRAY, pages);
1931         if (ret)
1932                 goto err_out;
1933         return 0; /* Success */
1934 err_out:
1935         free_idx = i;
1936         for (i = 0; i < free_idx; i++) {
1937                 if (PageHighMem(pages[i]))
1938                         continue;
1939                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1940                 end = start + PAGE_SIZE;
1941                 free_memtype(start, end);
1942         }
1943         return -EINVAL;
1944 }
1945
1946 int set_pages_array_uc(struct page **pages, int addrinarray)
1947 {
1948         return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1949 }
1950 EXPORT_SYMBOL(set_pages_array_uc);
1951
1952 int set_pages_array_wc(struct page **pages, int addrinarray)
1953 {
1954         return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1955 }
1956 EXPORT_SYMBOL(set_pages_array_wc);
1957
1958 int set_pages_array_wt(struct page **pages, int addrinarray)
1959 {
1960         return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1961 }
1962 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1963
1964 int set_pages_wb(struct page *page, int numpages)
1965 {
1966         unsigned long addr = (unsigned long)page_address(page);
1967
1968         return set_memory_wb(addr, numpages);
1969 }
1970 EXPORT_SYMBOL(set_pages_wb);
1971
1972 int set_pages_array_wb(struct page **pages, int addrinarray)
1973 {
1974         int retval;
1975         unsigned long start;
1976         unsigned long end;
1977         int i;
1978
1979         /* WB cache mode is hard wired to all cache attribute bits being 0 */
1980         retval = cpa_clear_pages_array(pages, addrinarray,
1981                         __pgprot(_PAGE_CACHE_MASK));
1982         if (retval)
1983                 return retval;
1984
1985         for (i = 0; i < addrinarray; i++) {
1986                 if (PageHighMem(pages[i]))
1987                         continue;
1988                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1989                 end = start + PAGE_SIZE;
1990                 free_memtype(start, end);
1991         }
1992
1993         return 0;
1994 }
1995 EXPORT_SYMBOL(set_pages_array_wb);
1996
1997 int set_pages_x(struct page *page, int numpages)
1998 {
1999         unsigned long addr = (unsigned long)page_address(page);
2000
2001         return set_memory_x(addr, numpages);
2002 }
2003 EXPORT_SYMBOL(set_pages_x);
2004
2005 int set_pages_nx(struct page *page, int numpages)
2006 {
2007         unsigned long addr = (unsigned long)page_address(page);
2008
2009         return set_memory_nx(addr, numpages);
2010 }
2011 EXPORT_SYMBOL(set_pages_nx);
2012
2013 int set_pages_ro(struct page *page, int numpages)
2014 {
2015         unsigned long addr = (unsigned long)page_address(page);
2016
2017         return set_memory_ro(addr, numpages);
2018 }
2019
2020 int set_pages_rw(struct page *page, int numpages)
2021 {
2022         unsigned long addr = (unsigned long)page_address(page);
2023
2024         return set_memory_rw(addr, numpages);
2025 }
2026
2027 #ifdef CONFIG_DEBUG_PAGEALLOC
2028
2029 static int __set_pages_p(struct page *page, int numpages)
2030 {
2031         unsigned long tempaddr = (unsigned long) page_address(page);
2032         struct cpa_data cpa = { .vaddr = &tempaddr,
2033                                 .pgd = NULL,
2034                                 .numpages = numpages,
2035                                 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2036                                 .mask_clr = __pgprot(0),
2037                                 .flags = 0};
2038
2039         /*
2040          * No alias checking needed for setting present flag. otherwise,
2041          * we may need to break large pages for 64-bit kernel text
2042          * mappings (this adds to complexity if we want to do this from
2043          * atomic context especially). Let's keep it simple!
2044          */
2045         return __change_page_attr_set_clr(&cpa, 0);
2046 }
2047
2048 static int __set_pages_np(struct page *page, int numpages)
2049 {
2050         unsigned long tempaddr = (unsigned long) page_address(page);
2051         struct cpa_data cpa = { .vaddr = &tempaddr,
2052                                 .pgd = NULL,
2053                                 .numpages = numpages,
2054                                 .mask_set = __pgprot(0),
2055                                 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2056                                 .flags = 0};
2057
2058         /*
2059          * No alias checking needed for setting not present flag. otherwise,
2060          * we may need to break large pages for 64-bit kernel text
2061          * mappings (this adds to complexity if we want to do this from
2062          * atomic context especially). Let's keep it simple!
2063          */
2064         return __change_page_attr_set_clr(&cpa, 0);
2065 }
2066
2067 void __kernel_map_pages(struct page *page, int numpages, int enable)
2068 {
2069         if (PageHighMem(page))
2070                 return;
2071         if (!enable) {
2072                 debug_check_no_locks_freed(page_address(page),
2073                                            numpages * PAGE_SIZE);
2074         }
2075
2076         /*
2077          * The return value is ignored as the calls cannot fail.
2078          * Large pages for identity mappings are not used at boot time
2079          * and hence no memory allocations during large page split.
2080          */
2081         if (enable)
2082                 __set_pages_p(page, numpages);
2083         else
2084                 __set_pages_np(page, numpages);
2085
2086         /*
2087          * We should perform an IPI and flush all tlbs,
2088          * but that can deadlock->flush only current cpu:
2089          */
2090         __flush_tlb_all();
2091
2092         arch_flush_lazy_mmu_mode();
2093 }
2094
2095 #ifdef CONFIG_HIBERNATION
2096
2097 bool kernel_page_present(struct page *page)
2098 {
2099         unsigned int level;
2100         pte_t *pte;
2101
2102         if (PageHighMem(page))
2103                 return false;
2104
2105         pte = lookup_address((unsigned long)page_address(page), &level);
2106         return (pte_val(*pte) & _PAGE_PRESENT);
2107 }
2108
2109 #endif /* CONFIG_HIBERNATION */
2110
2111 #endif /* CONFIG_DEBUG_PAGEALLOC */
2112
2113 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
2114                             unsigned numpages, unsigned long page_flags)
2115 {
2116         int retval = -EINVAL;
2117
2118         struct cpa_data cpa = {
2119                 .vaddr = &address,
2120                 .pfn = pfn,
2121                 .pgd = pgd,
2122                 .numpages = numpages,
2123                 .mask_set = __pgprot(0),
2124                 .mask_clr = __pgprot(0),
2125                 .flags = 0,
2126         };
2127
2128         if (!(__supported_pte_mask & _PAGE_NX))
2129                 goto out;
2130
2131         if (!(page_flags & _PAGE_NX))
2132                 cpa.mask_clr = __pgprot(_PAGE_NX);
2133
2134         if (!(page_flags & _PAGE_RW))
2135                 cpa.mask_clr = __pgprot(_PAGE_RW);
2136
2137         if (!(page_flags & _PAGE_ENC))
2138                 cpa.mask_clr = pgprot_encrypted(cpa.mask_clr);
2139
2140         cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
2141
2142         retval = __change_page_attr_set_clr(&cpa, 0);
2143         __flush_tlb_all();
2144
2145 out:
2146         return retval;
2147 }
2148
2149 /*
2150  * The testcases use internal knowledge of the implementation that shouldn't
2151  * be exposed to the rest of the kernel. Include these directly here.
2152  */
2153 #ifdef CONFIG_CPA_DEBUG
2154 #include "pageattr-test.c"
2155 #endif