arch/x86/platform/uv/tlb_uv.c

   1 /*
   2  *      SGI UltraViolet TLB flush routines.
   3  *
   4  *      (c) 2008-2014 Cliff Wickman <cpw@sgi.com>, SGI.
   5  *
   6  *      This code is released under the GNU General Public License version 2 or
   7  *      later.
   8  */
   9 #include <linux/seq_file.h>
  10 #include <linux/proc_fs.h>
  11 #include <linux/debugfs.h>
  12 #include <linux/kernel.h>
  13 #include <linux/slab.h>
  14 #include <linux/delay.h>
  15
  16 #include <asm/mmu_context.h>
  17 #include <asm/uv/uv.h>
  18 #include <asm/uv/uv_mmrs.h>
  19 #include <asm/uv/uv_hub.h>
  20 #include <asm/uv/uv_bau.h>
  21 #include <asm/apic.h>
  22 #include <asm/tsc.h>
  23 #include <asm/irq_vectors.h>
  24 #include <asm/timer.h>
  25
  26 static struct bau_operations ops __ro_after_init;
  27
  28 /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  29 static int timeout_base_ns[] = {
  30                 20,
  31                 160,
  32                 1280,
  33                 10240,
  34                 81920,
  35                 655360,
  36                 5242880,
  37                 167772160
  38 };
  39
  40 static int timeout_us;
  41 static bool nobau = true;
  42 static int nobau_perm;
  43 static cycles_t congested_cycles;
  44
  45 /* tunables: */
  46 static int max_concurr          = MAX_BAU_CONCURRENT;
  47 static int max_concurr_const    = MAX_BAU_CONCURRENT;
  48 static int plugged_delay        = PLUGGED_DELAY;
  49 static int plugsb4reset         = PLUGSB4RESET;
  50 static int giveup_limit         = GIVEUP_LIMIT;
  51 static int timeoutsb4reset      = TIMEOUTSB4RESET;
  52 static int ipi_reset_limit      = IPI_RESET_LIMIT;
  53 static int complete_threshold   = COMPLETE_THRESHOLD;
  54 static int congested_respns_us  = CONGESTED_RESPONSE_US;
  55 static int congested_reps       = CONGESTED_REPS;
  56 static int disabled_period      = DISABLED_PERIOD;
  57
  58 static struct tunables tunables[] = {
  59         {&max_concurr,           MAX_BAU_CONCURRENT}, /* must be [0] */
  60         {&plugged_delay,         PLUGGED_DELAY},
  61         {&plugsb4reset,          PLUGSB4RESET},
  62         {&timeoutsb4reset,       TIMEOUTSB4RESET},
  63         {&ipi_reset_limit,       IPI_RESET_LIMIT},
  64         {&complete_threshold,    COMPLETE_THRESHOLD},
  65         {&congested_respns_us,   CONGESTED_RESPONSE_US},
  66         {&congested_reps,        CONGESTED_REPS},
  67         {&disabled_period,       DISABLED_PERIOD},
  68         {&giveup_limit,          GIVEUP_LIMIT}
  69 };
  70
  71 static struct dentry *tunables_dir;
  72 static struct dentry *tunables_file;
  73
  74 /* these correspond to the statistics printed by ptc_seq_show() */
  75 static char *stat_description[] = {
  76         "sent:     number of shootdown messages sent",
  77         "stime:    time spent sending messages",
  78         "numuvhubs: number of hubs targeted with shootdown",
  79         "numuvhubs16: number times 16 or more hubs targeted",
  80         "numuvhubs8: number times 8 or more hubs targeted",
  81         "numuvhubs4: number times 4 or more hubs targeted",
  82         "numuvhubs2: number times 2 or more hubs targeted",
  83         "numuvhubs1: number times 1 hub targeted",
  84         "numcpus:  number of cpus targeted with shootdown",
  85         "dto:      number of destination timeouts",
  86         "retries:  destination timeout retries sent",
  87         "rok:   :  destination timeouts successfully retried",
  88         "resetp:   ipi-style resource resets for plugs",
  89         "resett:   ipi-style resource resets for timeouts",
  90         "giveup:   fall-backs to ipi-style shootdowns",
  91         "sto:      number of source timeouts",
  92         "bz:       number of stay-busy's",
  93         "throt:    number times spun in throttle",
  94         "swack:   image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
  95         "recv:     shootdown messages received",
  96         "rtime:    time spent processing messages",
  97         "all:      shootdown all-tlb messages",
  98         "one:      shootdown one-tlb messages",
  99         "mult:     interrupts that found multiple messages",
 100         "none:     interrupts that found no messages",
 101         "retry:    number of retry messages processed",
 102         "canc:     number messages canceled by retries",
 103         "nocan:    number retries that found nothing to cancel",
 104         "reset:    number of ipi-style reset requests processed",
 105         "rcan:     number messages canceled by reset requests",
 106         "disable:  number times use of the BAU was disabled",
 107         "enable:   number times use of the BAU was re-enabled"
 108 };
 109
 110 static int __init setup_bau(char *arg)
 111 {
 112         int result;
 113
 114         if (!arg)
 115                 return -EINVAL;
 116
 117         result = strtobool(arg, &nobau);
 118         if (result)
 119                 return result;
 120
 121         /* we need to flip the logic here, so that bau=y sets nobau to false */
 122         nobau = !nobau;
 123
 124         if (!nobau)
 125                 pr_info("UV BAU Enabled\n");
 126         else
 127                 pr_info("UV BAU Disabled\n");
 128
 129         return 0;
 130 }
 131 early_param("bau", setup_bau);
 132
 133 /* base pnode in this partition */
 134 static int uv_base_pnode __read_mostly;
 135
 136 static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
 137 static DEFINE_PER_CPU(struct bau_control, bau_control);
 138 static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
 139
 140 static void
 141 set_bau_on(void)
 142 {
 143         int cpu;
 144         struct bau_control *bcp;
 145
 146         if (nobau_perm) {
 147                 pr_info("BAU not initialized; cannot be turned on\n");
 148                 return;
 149         }
 150         nobau = false;
 151         for_each_present_cpu(cpu) {
 152                 bcp = &per_cpu(bau_control, cpu);
 153                 bcp->nobau = false;
 154         }
 155         pr_info("BAU turned on\n");
 156         return;
 157 }
 158
 159 static void
 160 set_bau_off(void)
 161 {
 162         int cpu;
 163         struct bau_control *bcp;
 164
 165         nobau = true;
 166         for_each_present_cpu(cpu) {
 167                 bcp = &per_cpu(bau_control, cpu);
 168                 bcp->nobau = true;
 169         }
 170         pr_info("BAU turned off\n");
 171         return;
 172 }
 173
 174 /*
 175  * Determine the first node on a uvhub. 'Nodes' are used for kernel
 176  * memory allocation.
 177  */
 178 static int __init uvhub_to_first_node(int uvhub)
 179 {
 180         int node, b;
 181
 182         for_each_online_node(node) {
 183                 b = uv_node_to_blade_id(node);
 184                 if (uvhub == b)
 185                         return node;
 186         }
 187         return -1;
 188 }
 189
 190 /*
 191  * Determine the apicid of the first cpu on a uvhub.
 192  */
 193 static int __init uvhub_to_first_apicid(int uvhub)
 194 {
 195         int cpu;
 196
 197         for_each_present_cpu(cpu)
 198                 if (uvhub == uv_cpu_to_blade_id(cpu))
 199                         return per_cpu(x86_cpu_to_apicid, cpu);
 200         return -1;
 201 }
 202
 203 /*
 204  * Free a software acknowledge hardware resource by clearing its Pending
 205  * bit. This will return a reply to the sender.
 206  * If the message has timed out, a reply has already been sent by the
 207  * hardware but the resource has not been released. In that case our
 208  * clear of the Timeout bit (as well) will free the resource. No reply will
 209  * be sent (the hardware will only do one reply per message).
 210  */
 211 static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
 212                                                 int do_acknowledge)
 213 {
 214         unsigned long dw;
 215         struct bau_pq_entry *msg;
 216
 217         msg = mdp->msg;
 218         if (!msg->canceled && do_acknowledge) {
 219                 dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
 220                 ops.write_l_sw_ack(dw);
 221         }
 222         msg->replied_to = 1;
 223         msg->swack_vec = 0;
 224 }
 225
 226 /*
 227  * Process the receipt of a RETRY message
 228  */
 229 static void bau_process_retry_msg(struct msg_desc *mdp,
 230                                         struct bau_control *bcp)
 231 {
 232         int i;
 233         int cancel_count = 0;
 234         unsigned long msg_res;
 235         unsigned long mmr = 0;
 236         struct bau_pq_entry *msg = mdp->msg;
 237         struct bau_pq_entry *msg2;
 238         struct ptc_stats *stat = bcp->statp;
 239
 240         stat->d_retries++;
 241         /*
 242          * cancel any message from msg+1 to the retry itself
 243          */
 244         for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
 245                 if (msg2 > mdp->queue_last)
 246                         msg2 = mdp->queue_first;
 247                 if (msg2 == msg)
 248                         break;
 249
 250                 /* same conditions for cancellation as do_reset */
 251                 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
 252                     (msg2->swack_vec) && ((msg2->swack_vec &
 253                         msg->swack_vec) == 0) &&
 254                     (msg2->sending_cpu == msg->sending_cpu) &&
 255                     (msg2->msg_type != MSG_NOOP)) {
 256                         mmr = ops.read_l_sw_ack();
 257                         msg_res = msg2->swack_vec;
 258                         /*
 259                          * This is a message retry; clear the resources held
 260                          * by the previous message only if they timed out.
 261                          * If it has not timed out we have an unexpected
 262                          * situation to report.
 263                          */
 264                         if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
 265                                 unsigned long mr;
 266                                 /*
 267                                  * Is the resource timed out?
 268                                  * Make everyone ignore the cancelled message.
 269                                  */
 270                                 msg2->canceled = 1;
 271                                 stat->d_canceled++;
 272                                 cancel_count++;
 273                                 mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
 274                                 ops.write_l_sw_ack(mr);
 275                         }
 276                 }
 277         }
 278         if (!cancel_count)
 279                 stat->d_nocanceled++;
 280 }
 281
 282 /*
 283  * Do all the things a cpu should do for a TLB shootdown message.
 284  * Other cpu's may come here at the same time for this message.
 285  */
 286 static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
 287                                                 int do_acknowledge)
 288 {
 289         short socket_ack_count = 0;
 290         short *sp;
 291         struct atomic_short *asp;
 292         struct ptc_stats *stat = bcp->statp;
 293         struct bau_pq_entry *msg = mdp->msg;
 294         struct bau_control *smaster = bcp->socket_master;
 295
 296         /*
 297          * This must be a normal message, or retry of a normal message
 298          */
 299         if (msg->address == TLB_FLUSH_ALL) {
 300                 local_flush_tlb();
 301                 stat->d_alltlb++;
 302         } else {
 303                 __flush_tlb_one(msg->address);
 304                 stat->d_onetlb++;
 305         }
 306         stat->d_requestee++;
 307
 308         /*
 309          * One cpu on each uvhub has the additional job on a RETRY
 310          * of releasing the resource held by the message that is
 311          * being retried.  That message is identified by sending
 312          * cpu number.
 313          */
 314         if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
 315                 bau_process_retry_msg(mdp, bcp);
 316
 317         /*
 318          * This is a swack message, so we have to reply to it.
 319          * Count each responding cpu on the socket. This avoids
 320          * pinging the count's cache line back and forth between
 321          * the sockets.
 322          */
 323         sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
 324         asp = (struct atomic_short *)sp;
 325         socket_ack_count = atom_asr(1, asp);
 326         if (socket_ack_count == bcp->cpus_in_socket) {
 327                 int msg_ack_count;
 328                 /*
 329                  * Both sockets dump their completed count total into
 330                  * the message's count.
 331                  */
 332                 *sp = 0;
 333                 asp = (struct atomic_short *)&msg->acknowledge_count;
 334                 msg_ack_count = atom_asr(socket_ack_count, asp);
 335
 336                 if (msg_ack_count == bcp->cpus_in_uvhub) {
 337                         /*
 338                          * All cpus in uvhub saw it; reply
 339                          * (unless we are in the UV2 workaround)
 340                          */
 341                         reply_to_message(mdp, bcp, do_acknowledge);
 342                 }
 343         }
 344
 345         return;
 346 }
 347
 348 /*
 349  * Determine the first cpu on a pnode.
 350  */
 351 static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
 352 {
 353         int cpu;
 354         struct hub_and_pnode *hpp;
 355
 356         for_each_present_cpu(cpu) {
 357                 hpp = &smaster->thp[cpu];
 358                 if (pnode == hpp->pnode)
 359                         return cpu;
 360         }
 361         return -1;
 362 }
 363
 364 /*
 365  * Last resort when we get a large number of destination timeouts is
 366  * to clear resources held by a given cpu.
 367  * Do this with IPI so that all messages in the BAU message queue
 368  * can be identified by their nonzero swack_vec field.
 369  *
 370  * This is entered for a single cpu on the uvhub.
 371  * The sender want's this uvhub to free a specific message's
 372  * swack resources.
 373  */
 374 static void do_reset(void *ptr)
 375 {
 376         int i;
 377         struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
 378         struct reset_args *rap = (struct reset_args *)ptr;
 379         struct bau_pq_entry *msg;
 380         struct ptc_stats *stat = bcp->statp;
 381
 382         stat->d_resets++;
 383         /*
 384          * We're looking for the given sender, and
 385          * will free its swack resource.
 386          * If all cpu's finally responded after the timeout, its
 387          * message 'replied_to' was set.
 388          */
 389         for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
 390                 unsigned long msg_res;
 391                 /* do_reset: same conditions for cancellation as
 392                    bau_process_retry_msg() */
 393                 if ((msg->replied_to == 0) &&
 394                     (msg->canceled == 0) &&
 395                     (msg->sending_cpu == rap->sender) &&
 396                     (msg->swack_vec) &&
 397                     (msg->msg_type != MSG_NOOP)) {
 398                         unsigned long mmr;
 399                         unsigned long mr;
 400                         /*
 401                          * make everyone else ignore this message
 402                          */
 403                         msg->canceled = 1;
 404                         /*
 405                          * only reset the resource if it is still pending
 406                          */
 407                         mmr = ops.read_l_sw_ack();
 408                         msg_res = msg->swack_vec;
 409                         mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
 410                         if (mmr & msg_res) {
 411                                 stat->d_rcanceled++;
 412                                 ops.write_l_sw_ack(mr);
 413                         }
 414                 }
 415         }
 416         return;
 417 }
 418
 419 /*
 420  * Use IPI to get all target uvhubs to release resources held by
 421  * a given sending cpu number.
 422  */
 423 static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
 424 {
 425         int pnode;
 426         int apnode;
 427         int maskbits;
 428         int sender = bcp->cpu;
 429         cpumask_t *mask = bcp->uvhub_master->cpumask;
 430         struct bau_control *smaster = bcp->socket_master;
 431         struct reset_args reset_args;
 432
 433         reset_args.sender = sender;
 434         cpumask_clear(mask);
 435         /* find a single cpu for each uvhub in this distribution mask */
 436         maskbits = sizeof(struct pnmask) * BITSPERBYTE;
 437         /* each bit is a pnode relative to the partition base pnode */
 438         for (pnode = 0; pnode < maskbits; pnode++) {
 439                 int cpu;
 440                 if (!bau_uvhub_isset(pnode, distribution))
 441                         continue;
 442                 apnode = pnode + bcp->partition_base_pnode;
 443                 cpu = pnode_to_first_cpu(apnode, smaster);
 444                 cpumask_set_cpu(cpu, mask);
 445         }
 446
 447         /* IPI all cpus; preemption is already disabled */
 448         smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
 449         return;
 450 }
 451
 452 /*
 453  * Not to be confused with cycles_2_ns() from tsc.c; this gives a relative
 454  * number, not an absolute. It converts a duration in cycles to a duration in
 455  * ns.
 456  */
 457 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
 458 {
 459         struct cyc2ns_data data;
 460         unsigned long long ns;
 461
 462         cyc2ns_read_begin(&data);
 463         ns = mul_u64_u32_shr(cyc, data.cyc2ns_mul, data.cyc2ns_shift);
 464         cyc2ns_read_end();
 465
 466         return ns;
 467 }
 468
 469 /*
 470  * The reverse of the above; converts a duration in ns to a duration in cycles.
 471  */
 472 static inline unsigned long long ns_2_cycles(unsigned long long ns)
 473 {
 474         struct cyc2ns_data data;
 475         unsigned long long cyc;
 476
 477         cyc2ns_read_begin(&data);
 478         cyc = (ns << data.cyc2ns_shift) / data.cyc2ns_mul;
 479         cyc2ns_read_end();
 480
 481         return cyc;
 482 }
 483
 484 static inline unsigned long cycles_2_us(unsigned long long cyc)
 485 {
 486         return cycles_2_ns(cyc) / NSEC_PER_USEC;
 487 }
 488
 489 static inline cycles_t sec_2_cycles(unsigned long sec)
 490 {
 491         return ns_2_cycles(sec * NSEC_PER_SEC);
 492 }
 493
 494 static inline unsigned long long usec_2_cycles(unsigned long usec)
 495 {
 496         return ns_2_cycles(usec * NSEC_PER_USEC);
 497 }
 498
 499 /*
 500  * wait for all cpus on this hub to finish their sends and go quiet
 501  * leaves uvhub_quiesce set so that no new broadcasts are started by
 502  * bau_flush_send_and_wait()
 503  */
 504 static inline void quiesce_local_uvhub(struct bau_control *hmaster)
 505 {
 506         atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
 507 }
 508
 509 /*
 510  * mark this quiet-requestor as done
 511  */
 512 static inline void end_uvhub_quiesce(struct bau_control *hmaster)
 513 {
 514         atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
 515 }
 516
 517 static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
 518 {
 519         unsigned long descriptor_status;
 520
 521         descriptor_status = uv_read_local_mmr(mmr_offset);
 522         descriptor_status >>= right_shift;
 523         descriptor_status &= UV_ACT_STATUS_MASK;
 524         return descriptor_status;
 525 }
 526
 527 /*
 528  * Wait for completion of a broadcast software ack message
 529  * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
 530  */
 531 static int uv1_wait_completion(struct bau_desc *bau_desc,
 532                                 struct bau_control *bcp, long try)
 533 {
 534         unsigned long descriptor_status;
 535         cycles_t ttm;
 536         u64 mmr_offset = bcp->status_mmr;
 537         int right_shift = bcp->status_index;
 538         struct ptc_stats *stat = bcp->statp;
 539
 540         descriptor_status = uv1_read_status(mmr_offset, right_shift);
 541         /* spin on the status MMR, waiting for it to go idle */
 542         while ((descriptor_status != DS_IDLE)) {
 543                 /*
 544                  * Our software ack messages may be blocked because
 545                  * there are no swack resources available.  As long
 546                  * as none of them has timed out hardware will NACK
 547                  * our message and its state will stay IDLE.
 548                  */
 549                 if (descriptor_status == DS_SOURCE_TIMEOUT) {
 550                         stat->s_stimeout++;
 551                         return FLUSH_GIVEUP;
 552                 } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
 553                         stat->s_dtimeout++;
 554                         ttm = get_cycles();
 555
 556                         /*
 557                          * Our retries may be blocked by all destination
 558                          * swack resources being consumed, and a timeout
 559                          * pending.  In that case hardware returns the
 560                          * ERROR that looks like a destination timeout.
 561                          */
 562                         if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
 563                                 bcp->conseccompletes = 0;
 564                                 return FLUSH_RETRY_PLUGGED;
 565                         }
 566
 567                         bcp->conseccompletes = 0;
 568                         return FLUSH_RETRY_TIMEOUT;
 569                 } else {
 570                         /*
 571                          * descriptor_status is still BUSY
 572                          */
 573                         cpu_relax();
 574                 }
 575                 descriptor_status = uv1_read_status(mmr_offset, right_shift);
 576         }
 577         bcp->conseccompletes++;
 578         return FLUSH_COMPLETE;
 579 }
 580
 581 /*
 582  * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
 583  * But not currently used.
 584  */
 585 static unsigned long uv2_3_read_status(unsigned long offset, int rshft, int desc)
 586 {
 587         return ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
 588 }
 589
 590 /*
 591  * Return whether the status of the descriptor that is normally used for this
 592  * cpu (the one indexed by its hub-relative cpu number) is busy.
 593  * The status of the original 32 descriptors is always reflected in the 64
 594  * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
 595  * The bit provided by the activation_status_2 register is irrelevant to
 596  * the status if it is only being tested for busy or not busy.
 597  */
 598 int normal_busy(struct bau_control *bcp)
 599 {
 600         int cpu = bcp->uvhub_cpu;
 601         int mmr_offset;
 602         int right_shift;
 603
 604         mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
 605         right_shift = cpu * UV_ACT_STATUS_SIZE;
 606         return (((((read_lmmr(mmr_offset) >> right_shift) &
 607                                 UV_ACT_STATUS_MASK)) << 1) == UV2H_DESC_BUSY);
 608 }
 609
 610 /*
 611  * Entered when a bau descriptor has gone into a permanent busy wait because
 612  * of a hardware bug.
 613  * Workaround the bug.
 614  */
 615 int handle_uv2_busy(struct bau_control *bcp)
 616 {
 617         struct ptc_stats *stat = bcp->statp;
 618
 619         stat->s_uv2_wars++;
 620         bcp->busy = 1;
 621         return FLUSH_GIVEUP;
 622 }
 623
 624 static int uv2_3_wait_completion(struct bau_desc *bau_desc,
 625                                 struct bau_control *bcp, long try)
 626 {
 627         unsigned long descriptor_stat;
 628         cycles_t ttm;
 629         u64 mmr_offset = bcp->status_mmr;
 630         int right_shift = bcp->status_index;
 631         int desc = bcp->uvhub_cpu;
 632         long busy_reps = 0;
 633         struct ptc_stats *stat = bcp->statp;
 634
 635         descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
 636
 637         /* spin on the status MMR, waiting for it to go idle */
 638         while (descriptor_stat != UV2H_DESC_IDLE) {
 639                 if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
 640                         /*
 641                          * A h/w bug on the destination side may
 642                          * have prevented the message being marked
 643                          * pending, thus it doesn't get replied to
 644                          * and gets continually nacked until it times
 645                          * out with a SOURCE_TIMEOUT.
 646                          */
 647                         stat->s_stimeout++;
 648                         return FLUSH_GIVEUP;
 649                 } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
 650                         ttm = get_cycles();
 651
 652                         /*
 653                          * Our retries may be blocked by all destination
 654                          * swack resources being consumed, and a timeout
 655                          * pending.  In that case hardware returns the
 656                          * ERROR that looks like a destination timeout.
 657                          * Without using the extended status we have to
 658                          * deduce from the short time that this was a
 659                          * strong nack.
 660                          */
 661                         if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
 662                                 bcp->conseccompletes = 0;
 663                                 stat->s_plugged++;
 664                                 /* FLUSH_RETRY_PLUGGED causes hang on boot */
 665                                 return FLUSH_GIVEUP;
 666                         }
 667                         stat->s_dtimeout++;
 668                         bcp->conseccompletes = 0;
 669                         /* FLUSH_RETRY_TIMEOUT causes hang on boot */
 670                         return FLUSH_GIVEUP;
 671                 } else {
 672                         busy_reps++;
 673                         if (busy_reps > 1000000) {
 674                                 /* not to hammer on the clock */
 675                                 busy_reps = 0;
 676                                 ttm = get_cycles();
 677                                 if ((ttm - bcp->send_message) > bcp->timeout_interval)
 678                                         return handle_uv2_busy(bcp);
 679                         }
 680                         /*
 681                          * descriptor_stat is still BUSY
 682                          */
 683                         cpu_relax();
 684                 }
 685                 descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
 686         }
 687         bcp->conseccompletes++;
 688         return FLUSH_COMPLETE;
 689 }
 690
 691 /*
 692  * Returns the status of current BAU message for cpu desc as a bit field
 693  * [Error][Busy][Aux]
 694  */
 695 static u64 read_status(u64 status_mmr, int index, int desc)
 696 {
 697         u64 stat;
 698
 699         stat = ((read_lmmr(status_mmr) >> index) & UV_ACT_STATUS_MASK) << 1;
 700         stat |= (read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_2) >> desc) & 0x1;
 701
 702         return stat;
 703 }
 704
 705 static int uv4_wait_completion(struct bau_desc *bau_desc,
 706                                 struct bau_control *bcp, long try)
 707 {
 708         struct ptc_stats *stat = bcp->statp;
 709         u64 descriptor_stat;
 710         u64 mmr = bcp->status_mmr;
 711         int index = bcp->status_index;
 712         int desc = bcp->uvhub_cpu;
 713
 714         descriptor_stat = read_status(mmr, index, desc);
 715
 716         /* spin on the status MMR, waiting for it to go idle */
 717         while (descriptor_stat != UV2H_DESC_IDLE) {
 718                 switch (descriptor_stat) {
 719                 case UV2H_DESC_SOURCE_TIMEOUT:
 720                         stat->s_stimeout++;
 721                         return FLUSH_GIVEUP;
 722
 723                 case UV2H_DESC_DEST_TIMEOUT:
 724                         stat->s_dtimeout++;
 725                         bcp->conseccompletes = 0;
 726                         return FLUSH_RETRY_TIMEOUT;
 727
 728                 case UV2H_DESC_DEST_STRONG_NACK:
 729                         stat->s_plugged++;
 730                         bcp->conseccompletes = 0;
 731                         return FLUSH_RETRY_PLUGGED;
 732
 733                 case UV2H_DESC_DEST_PUT_ERR:
 734                         bcp->conseccompletes = 0;
 735                         return FLUSH_GIVEUP;
 736
 737                 default:
 738                         /* descriptor_stat is still BUSY */
 739                         cpu_relax();
 740                 }
 741                 descriptor_stat = read_status(mmr, index, desc);
 742         }
 743         bcp->conseccompletes++;
 744         return FLUSH_COMPLETE;
 745 }
 746
 747 /*
 748  * Our retries are blocked by all destination sw ack resources being
 749  * in use, and a timeout is pending. In that case hardware immediately
 750  * returns the ERROR that looks like a destination timeout.
 751  */
 752 static void destination_plugged(struct bau_desc *bau_desc,
 753                         struct bau_control *bcp,
 754                         struct bau_control *hmaster, struct ptc_stats *stat)
 755 {
 756         udelay(bcp->plugged_delay);
 757         bcp->plugged_tries++;
 758
 759         if (bcp->plugged_tries >= bcp->plugsb4reset) {
 760                 bcp->plugged_tries = 0;
 761
 762                 quiesce_local_uvhub(hmaster);
 763
 764                 spin_lock(&hmaster->queue_lock);
 765                 reset_with_ipi(&bau_desc->distribution, bcp);
 766                 spin_unlock(&hmaster->queue_lock);
 767
 768                 end_uvhub_quiesce(hmaster);
 769
 770                 bcp->ipi_attempts++;
 771                 stat->s_resets_plug++;
 772         }
 773 }
 774
 775 static void destination_timeout(struct bau_desc *bau_desc,
 776                         struct bau_control *bcp, struct bau_control *hmaster,
 777                         struct ptc_stats *stat)
 778 {
 779         hmaster->max_concurr = 1;
 780         bcp->timeout_tries++;
 781         if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
 782                 bcp->timeout_tries = 0;
 783
 784                 quiesce_local_uvhub(hmaster);
 785
 786                 spin_lock(&hmaster->queue_lock);
 787                 reset_with_ipi(&bau_desc->distribution, bcp);
 788                 spin_unlock(&hmaster->queue_lock);
 789
 790                 end_uvhub_quiesce(hmaster);
 791
 792                 bcp->ipi_attempts++;
 793                 stat->s_resets_timeout++;
 794         }
 795 }
 796
 797 /*
 798  * Stop all cpus on a uvhub from using the BAU for a period of time.
 799  * This is reversed by check_enable.
 800  */
 801 static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
 802 {
 803         int tcpu;
 804         struct bau_control *tbcp;
 805         struct bau_control *hmaster;
 806         cycles_t tm1;
 807
 808         hmaster = bcp->uvhub_master;
 809         spin_lock(&hmaster->disable_lock);
 810         if (!bcp->baudisabled) {
 811                 stat->s_bau_disabled++;
 812                 tm1 = get_cycles();
 813                 for_each_present_cpu(tcpu) {
 814                         tbcp = &per_cpu(bau_control, tcpu);
 815                         if (tbcp->uvhub_master == hmaster) {
 816                                 tbcp->baudisabled = 1;
 817                                 tbcp->set_bau_on_time =
 818                                         tm1 + bcp->disabled_period;
 819                         }
 820                 }
 821         }
 822         spin_unlock(&hmaster->disable_lock);
 823 }
 824
 825 static void count_max_concurr(int stat, struct bau_control *bcp,
 826                                 struct bau_control *hmaster)
 827 {
 828         bcp->plugged_tries = 0;
 829         bcp->timeout_tries = 0;
 830         if (stat != FLUSH_COMPLETE)
 831                 return;
 832         if (bcp->conseccompletes <= bcp->complete_threshold)
 833                 return;
 834         if (hmaster->max_concurr >= hmaster->max_concurr_const)
 835                 return;
 836         hmaster->max_concurr++;
 837 }
 838
 839 static void record_send_stats(cycles_t time1, cycles_t time2,
 840                 struct bau_control *bcp, struct ptc_stats *stat,
 841                 int completion_status, int try)
 842 {
 843         cycles_t elapsed;
 844
 845         if (time2 > time1) {
 846                 elapsed = time2 - time1;
 847                 stat->s_time += elapsed;
 848
 849                 if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
 850                         bcp->period_requests++;
 851                         bcp->period_time += elapsed;
 852                         if ((elapsed > congested_cycles) &&
 853                             (bcp->period_requests > bcp->cong_reps) &&
 854                             ((bcp->period_time / bcp->period_requests) >
 855                                                         congested_cycles)) {
 856                                 stat->s_congested++;
 857                                 disable_for_period(bcp, stat);
 858                         }
 859                 }
 860         } else
 861                 stat->s_requestor--;
 862
 863         if (completion_status == FLUSH_COMPLETE && try > 1)
 864                 stat->s_retriesok++;
 865         else if (completion_status == FLUSH_GIVEUP) {
 866                 stat->s_giveup++;
 867                 if (get_cycles() > bcp->period_end)
 868                         bcp->period_giveups = 0;
 869                 bcp->period_giveups++;
 870                 if (bcp->period_giveups == 1)
 871                         bcp->period_end = get_cycles() + bcp->disabled_period;
 872                 if (bcp->period_giveups > bcp->giveup_limit) {
 873                         disable_for_period(bcp, stat);
 874                         stat->s_giveuplimit++;
 875                 }
 876         }
 877 }
 878
 879 /*
 880  * Because of a uv1 hardware bug only a limited number of concurrent
 881  * requests can be made.
 882  */
 883 static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
 884 {
 885         spinlock_t *lock = &hmaster->uvhub_lock;
 886         atomic_t *v;
 887
 888         v = &hmaster->active_descriptor_count;
 889         if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
 890                 stat->s_throttles++;
 891                 do {
 892                         cpu_relax();
 893                 } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
 894         }
 895 }
 896
 897 /*
 898  * Handle the completion status of a message send.
 899  */
 900 static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
 901                         struct bau_control *bcp, struct bau_control *hmaster,
 902                         struct ptc_stats *stat)
 903 {
 904         if (completion_status == FLUSH_RETRY_PLUGGED)
 905                 destination_plugged(bau_desc, bcp, hmaster, stat);
 906         else if (completion_status == FLUSH_RETRY_TIMEOUT)
 907                 destination_timeout(bau_desc, bcp, hmaster, stat);
 908 }
 909
 910 /*
 911  * Send a broadcast and wait for it to complete.
 912  *
 913  * The flush_mask contains the cpus the broadcast is to be sent to including
 914  * cpus that are on the local uvhub.
 915  *
 916  * Returns 0 if all flushing represented in the mask was done.
 917  * Returns 1 if it gives up entirely and the original cpu mask is to be
 918  * returned to the kernel.
 919  */
 920 int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp,
 921         struct bau_desc *bau_desc)
 922 {
 923         int seq_number = 0;
 924         int completion_stat = 0;
 925         int uv1 = 0;
 926         long try = 0;
 927         unsigned long index;
 928         cycles_t time1;
 929         cycles_t time2;
 930         struct ptc_stats *stat = bcp->statp;
 931         struct bau_control *hmaster = bcp->uvhub_master;
 932         struct uv1_bau_msg_header *uv1_hdr = NULL;
 933         struct uv2_3_bau_msg_header *uv2_3_hdr = NULL;
 934
 935         if (bcp->uvhub_version == UV_BAU_V1) {
 936                 uv1 = 1;
 937                 uv1_throttle(hmaster, stat);
 938         }
 939
 940         while (hmaster->uvhub_quiesce)
 941                 cpu_relax();
 942
 943         time1 = get_cycles();
 944         if (uv1)
 945                 uv1_hdr = &bau_desc->header.uv1_hdr;
 946         else
 947                 /* uv2 and uv3 */
 948                 uv2_3_hdr = &bau_desc->header.uv2_3_hdr;
 949
 950         do {
 951                 if (try == 0) {
 952                         if (uv1)
 953                                 uv1_hdr->msg_type = MSG_REGULAR;
 954                         else
 955                                 uv2_3_hdr->msg_type = MSG_REGULAR;
 956                         seq_number = bcp->message_number++;
 957                 } else {
 958                         if (uv1)
 959                                 uv1_hdr->msg_type = MSG_RETRY;
 960                         else
 961                                 uv2_3_hdr->msg_type = MSG_RETRY;
 962                         stat->s_retry_messages++;
 963                 }
 964
 965                 if (uv1)
 966                         uv1_hdr->sequence = seq_number;
 967                 else
 968                         uv2_3_hdr->sequence = seq_number;
 969                 index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
 970                 bcp->send_message = get_cycles();
 971
 972                 write_mmr_activation(index);
 973
 974                 try++;
 975                 completion_stat = ops.wait_completion(bau_desc, bcp, try);
 976
 977                 handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
 978
 979                 if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
 980                         bcp->ipi_attempts = 0;
 981                         stat->s_overipilimit++;
 982                         completion_stat = FLUSH_GIVEUP;
 983                         break;
 984                 }
 985                 cpu_relax();
 986         } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
 987                  (completion_stat == FLUSH_RETRY_TIMEOUT));
 988
 989         time2 = get_cycles();
 990
 991         count_max_concurr(completion_stat, bcp, hmaster);
 992
 993         while (hmaster->uvhub_quiesce)
 994                 cpu_relax();
 995
 996         atomic_dec(&hmaster->active_descriptor_count);
 997
 998         record_send_stats(time1, time2, bcp, stat, completion_stat, try);
 999
1000         if (completion_stat == FLUSH_GIVEUP)
1001                 /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
1002                 return 1;
1003         return 0;
1004 }
1005
1006 /*
1007  * The BAU is disabled for this uvhub. When the disabled time period has
1008  * expired re-enable it.
1009  * Return 0 if it is re-enabled for all cpus on this uvhub.
1010  */
1011 static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
1012 {
1013         int tcpu;
1014         struct bau_control *tbcp;
1015         struct bau_control *hmaster;
1016
1017         hmaster = bcp->uvhub_master;
1018         spin_lock(&hmaster->disable_lock);
1019         if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
1020                 stat->s_bau_reenabled++;
1021                 for_each_present_cpu(tcpu) {
1022                         tbcp = &per_cpu(bau_control, tcpu);
1023                         if (tbcp->uvhub_master == hmaster) {
1024                                 tbcp->baudisabled = 0;
1025                                 tbcp->period_requests = 0;
1026                                 tbcp->period_time = 0;
1027                                 tbcp->period_giveups = 0;
1028                         }
1029                 }
1030                 spin_unlock(&hmaster->disable_lock);
1031                 return 0;
1032         }
1033         spin_unlock(&hmaster->disable_lock);
1034         return -1;
1035 }
1036
1037 static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
1038                                 int remotes, struct bau_desc *bau_desc)
1039 {
1040         stat->s_requestor++;
1041         stat->s_ntargcpu += remotes + locals;
1042         stat->s_ntargremotes += remotes;
1043         stat->s_ntarglocals += locals;
1044
1045         /* uvhub statistics */
1046         hubs = bau_uvhub_weight(&bau_desc->distribution);
1047         if (locals) {
1048                 stat->s_ntarglocaluvhub++;
1049                 stat->s_ntargremoteuvhub += (hubs - 1);
1050         } else
1051                 stat->s_ntargremoteuvhub += hubs;
1052
1053         stat->s_ntarguvhub += hubs;
1054
1055         if (hubs >= 16)
1056                 stat->s_ntarguvhub16++;
1057         else if (hubs >= 8)
1058                 stat->s_ntarguvhub8++;
1059         else if (hubs >= 4)
1060                 stat->s_ntarguvhub4++;
1061         else if (hubs >= 2)
1062                 stat->s_ntarguvhub2++;
1063         else
1064                 stat->s_ntarguvhub1++;
1065 }
1066
1067 /*
1068  * Translate a cpu mask to the uvhub distribution mask in the BAU
1069  * activation descriptor.
1070  */
1071 static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
1072                         struct bau_desc *bau_desc, int *localsp, int *remotesp)
1073 {
1074         int cpu;
1075         int pnode;
1076         int cnt = 0;
1077         struct hub_and_pnode *hpp;
1078
1079         for_each_cpu(cpu, flush_mask) {
1080                 /*
1081                  * The distribution vector is a bit map of pnodes, relative
1082                  * to the partition base pnode (and the partition base nasid
1083                  * in the header).
1084                  * Translate cpu to pnode and hub using a local memory array.
1085                  */
1086                 hpp = &bcp->socket_master->thp[cpu];
1087                 pnode = hpp->pnode - bcp->partition_base_pnode;
1088                 bau_uvhub_set(pnode, &bau_desc->distribution);
1089                 cnt++;
1090                 if (hpp->uvhub == bcp->uvhub)
1091                         (*localsp)++;
1092                 else
1093                         (*remotesp)++;
1094         }
1095         if (!cnt)
1096                 return 1;
1097         return 0;
1098 }
1099
1100 /*
1101  * globally purge translation cache of a virtual address or all TLB's
1102  * @cpumask: mask of all cpu's in which the address is to be removed
1103  * @mm: mm_struct containing virtual address range
1104  * @start: start virtual address to be removed from TLB
1105  * @end: end virtual address to be remove from TLB
1106  * @cpu: the current cpu
1107  *
1108  * This is the entry point for initiating any UV global TLB shootdown.
1109  *
1110  * Purges the translation caches of all specified processors of the given
1111  * virtual address, or purges all TLB's on specified processors.
1112  *
1113  * The caller has derived the cpumask from the mm_struct.  This function
1114  * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
1115  *
1116  * The cpumask is converted into a uvhubmask of the uvhubs containing
1117  * those cpus.
1118  *
1119  * Note that this function should be called with preemption disabled.
1120  *
1121  * Returns NULL if all remote flushing was done.
1122  * Returns pointer to cpumask if some remote flushing remains to be
1123  * done.  The returned pointer is valid till preemption is re-enabled.
1124  */
1125 const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
1126                                           const struct flush_tlb_info *info)
1127 {
1128         unsigned int cpu = smp_processor_id();
1129         int locals = 0, remotes = 0, hubs = 0;
1130         struct bau_desc *bau_desc;
1131         struct cpumask *flush_mask;
1132         struct ptc_stats *stat;
1133         struct bau_control *bcp;
1134         unsigned long descriptor_status, status, address;
1135
1136         bcp = &per_cpu(bau_control, cpu);
1137
1138         if (bcp->nobau)
1139                 return cpumask;
1140
1141         stat = bcp->statp;
1142         stat->s_enters++;
1143
1144         if (bcp->busy) {
1145                 descriptor_status =
1146                         read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
1147                 status = ((descriptor_status >> (bcp->uvhub_cpu *
1148                         UV_ACT_STATUS_SIZE)) & UV_ACT_STATUS_MASK) << 1;
1149                 if (status == UV2H_DESC_BUSY)
1150                         return cpumask;
1151                 bcp->busy = 0;
1152         }
1153
1154         /* bau was disabled due to slow response */
1155         if (bcp->baudisabled) {
1156                 if (check_enable(bcp, stat)) {
1157                         stat->s_ipifordisabled++;
1158                         return cpumask;
1159                 }
1160         }
1161
1162         /*
1163          * Each sending cpu has a per-cpu mask which it fills from the caller's
1164          * cpu mask.  All cpus are converted to uvhubs and copied to the
1165          * activation descriptor.
1166          */
1167         flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
1168         /* don't actually do a shootdown of the local cpu */
1169         cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
1170
1171         if (cpumask_test_cpu(cpu, cpumask))
1172                 stat->s_ntargself++;
1173
1174         bau_desc = bcp->descriptor_base;
1175         bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
1176         bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
1177         if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
1178                 return NULL;
1179
1180         record_send_statistics(stat, locals, hubs, remotes, bau_desc);
1181
1182         if (!info->end || (info->end - info->start) <= PAGE_SIZE)
1183                 address = info->start;
1184         else
1185                 address = TLB_FLUSH_ALL;
1186
1187         switch (bcp->uvhub_version) {
1188         case UV_BAU_V1:
1189         case UV_BAU_V2:
1190         case UV_BAU_V3:
1191                 bau_desc->payload.uv1_2_3.address = address;
1192                 bau_desc->payload.uv1_2_3.sending_cpu = cpu;
1193                 break;
1194         case UV_BAU_V4:
1195                 bau_desc->payload.uv4.address = address;
1196                 bau_desc->payload.uv4.sending_cpu = cpu;
1197                 bau_desc->payload.uv4.qualifier = BAU_DESC_QUALIFIER;
1198                 break;
1199         }
1200
1201         /*
1202          * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
1203          * or 1 if it gave up and the original cpumask should be returned.
1204          */
1205         if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
1206                 return NULL;
1207         else
1208                 return cpumask;
1209 }
1210
1211 /*
1212  * Search the message queue for any 'other' unprocessed message with the
1213  * same software acknowledge resource bit vector as the 'msg' message.
1214  */
1215 struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
1216                                            struct bau_control *bcp)
1217 {
1218         struct bau_pq_entry *msg_next = msg + 1;
1219         unsigned char swack_vec = msg->swack_vec;
1220
1221         if (msg_next > bcp->queue_last)
1222                 msg_next = bcp->queue_first;
1223         while (msg_next != msg) {
1224                 if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
1225                                 (msg_next->swack_vec == swack_vec))
1226                         return msg_next;
1227                 msg_next++;
1228                 if (msg_next > bcp->queue_last)
1229                         msg_next = bcp->queue_first;
1230         }
1231         return NULL;
1232 }
1233
1234 /*
1235  * UV2 needs to work around a bug in which an arriving message has not
1236  * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
1237  * Such a message must be ignored.
1238  */
1239 void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
1240 {
1241         unsigned long mmr_image;
1242         unsigned char swack_vec;
1243         struct bau_pq_entry *msg = mdp->msg;
1244         struct bau_pq_entry *other_msg;
1245
1246         mmr_image = ops.read_l_sw_ack();
1247         swack_vec = msg->swack_vec;
1248
1249         if ((swack_vec & mmr_image) == 0) {
1250                 /*
1251                  * This message was assigned a swack resource, but no
1252                  * reserved acknowlegment is pending.
1253                  * The bug has prevented this message from setting the MMR.
1254                  */
1255                 /*
1256                  * Some message has set the MMR 'pending' bit; it might have
1257                  * been another message.  Look for that message.
1258                  */
1259                 other_msg = find_another_by_swack(msg, bcp);
1260                 if (other_msg) {
1261                         /*
1262                          * There is another. Process this one but do not
1263                          * ack it.
1264                          */
1265                         bau_process_message(mdp, bcp, 0);
1266                         /*
1267                          * Let the natural processing of that other message
1268                          * acknowledge it. Don't get the processing of sw_ack's
1269                          * out of order.
1270                          */
1271                         return;
1272                 }
1273         }
1274
1275         /*
1276          * Either the MMR shows this one pending a reply or there is no
1277          * other message using this sw_ack, so it is safe to acknowledge it.
1278          */
1279         bau_process_message(mdp, bcp, 1);
1280
1281         return;
1282 }
1283
1284 /*
1285  * The BAU message interrupt comes here. (registered by set_intr_gate)
1286  * See entry_64.S
1287  *
1288  * We received a broadcast assist message.
1289  *
1290  * Interrupts are disabled; this interrupt could represent
1291  * the receipt of several messages.
1292  *
1293  * All cores/threads on this hub get this interrupt.
1294  * The last one to see it does the software ack.
1295  * (the resource will not be freed until noninterruptable cpus see this
1296  *  interrupt; hardware may timeout the s/w ack and reply ERROR)
1297  */
1298 void uv_bau_message_interrupt(struct pt_regs *regs)
1299 {
1300         int count = 0;
1301         cycles_t time_start;
1302         struct bau_pq_entry *msg;
1303         struct bau_control *bcp;
1304         struct ptc_stats *stat;
1305         struct msg_desc msgdesc;
1306
1307         ack_APIC_irq();
1308         time_start = get_cycles();
1309
1310         bcp = &per_cpu(bau_control, smp_processor_id());
1311         stat = bcp->statp;
1312
1313         msgdesc.queue_first = bcp->queue_first;
1314         msgdesc.queue_last = bcp->queue_last;
1315
1316         msg = bcp->bau_msg_head;
1317         while (msg->swack_vec) {
1318                 count++;
1319
1320                 msgdesc.msg_slot = msg - msgdesc.queue_first;
1321                 msgdesc.msg = msg;
1322                 if (bcp->uvhub_version == UV_BAU_V2)
1323                         process_uv2_message(&msgdesc, bcp);
1324                 else
1325                         /* no error workaround for uv1 or uv3 */
1326                         bau_process_message(&msgdesc, bcp, 1);
1327
1328                 msg++;
1329                 if (msg > msgdesc.queue_last)
1330                         msg = msgdesc.queue_first;
1331                 bcp->bau_msg_head = msg;
1332         }
1333         stat->d_time += (get_cycles() - time_start);
1334         if (!count)
1335                 stat->d_nomsg++;
1336         else if (count > 1)
1337                 stat->d_multmsg++;
1338 }
1339
1340 /*
1341  * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
1342  * shootdown message timeouts enabled.  The timeout does not cause
1343  * an interrupt, but causes an error message to be returned to
1344  * the sender.
1345  */
1346 static void __init enable_timeouts(void)
1347 {
1348         int uvhub;
1349         int nuvhubs;
1350         int pnode;
1351         unsigned long mmr_image;
1352
1353         nuvhubs = uv_num_possible_blades();
1354
1355         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
1356                 if (!uv_blade_nr_possible_cpus(uvhub))
1357                         continue;
1358
1359                 pnode = uv_blade_to_pnode(uvhub);
1360                 mmr_image = read_mmr_misc_control(pnode);
1361                 /*
1362                  * Set the timeout period and then lock it in, in three
1363                  * steps; captures and locks in the period.
1364                  *
1365                  * To program the period, the SOFT_ACK_MODE must be off.
1366                  */
1367                 mmr_image &= ~(1L << SOFTACK_MSHIFT);
1368                 write_mmr_misc_control(pnode, mmr_image);
1369                 /*
1370                  * Set the 4-bit period.
1371                  */
1372                 mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
1373                 mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
1374                 write_mmr_misc_control(pnode, mmr_image);
1375                 /*
1376                  * UV1:
1377                  * Subsequent reversals of the timebase bit (3) cause an
1378                  * immediate timeout of one or all INTD resources as
1379                  * indicated in bits 2:0 (7 causes all of them to timeout).
1380                  */
1381                 mmr_image |= (1L << SOFTACK_MSHIFT);
1382                 if (is_uv2_hub()) {
1383                         /* do not touch the legacy mode bit */
1384                         /* hw bug workaround; do not use extended status */
1385                         mmr_image &= ~(1L << UV2_EXT_SHFT);
1386                 } else if (is_uv3_hub()) {
1387                         mmr_image &= ~(1L << PREFETCH_HINT_SHFT);
1388                         mmr_image |= (1L << SB_STATUS_SHFT);
1389                 }
1390                 write_mmr_misc_control(pnode, mmr_image);
1391         }
1392 }
1393
1394 static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
1395 {
1396         if (*offset < num_possible_cpus())
1397                 return offset;
1398         return NULL;
1399 }
1400
1401 static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1402 {
1403         (*offset)++;
1404         if (*offset < num_possible_cpus())
1405                 return offset;
1406         return NULL;
1407 }
1408
1409 static void ptc_seq_stop(struct seq_file *file, void *data)
1410 {
1411 }
1412
1413 /*
1414  * Display the statistics thru /proc/sgi_uv/ptc_statistics
1415  * 'data' points to the cpu number
1416  * Note: see the descriptions in stat_description[].
1417  */
1418 static int ptc_seq_show(struct seq_file *file, void *data)
1419 {
1420         struct ptc_stats *stat;
1421         struct bau_control *bcp;
1422         int cpu;
1423
1424         cpu = *(loff_t *)data;
1425         if (!cpu) {
1426                 seq_puts(file,
1427                          "# cpu bauoff sent stime self locals remotes ncpus localhub ");
1428                 seq_puts(file, "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
1429                 seq_puts(file,
1430                          "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
1431                 seq_puts(file,
1432                          "rok resetp resett giveup sto bz throt disable ");
1433                 seq_puts(file,
1434                          "enable wars warshw warwaits enters ipidis plugged ");
1435                 seq_puts(file,
1436                          "ipiover glim cong swack recv rtime all one mult ");
1437                 seq_puts(file, "none retry canc nocan reset rcan\n");
1438         }
1439         if (cpu < num_possible_cpus() && cpu_online(cpu)) {
1440                 bcp = &per_cpu(bau_control, cpu);
1441                 if (bcp->nobau) {
1442                         seq_printf(file, "cpu %d bau disabled\n", cpu);
1443                         return 0;
1444                 }
1445                 stat = bcp->statp;
1446                 /* source side statistics */
1447                 seq_printf(file,
1448                         "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1449                            cpu, bcp->nobau, stat->s_requestor,
1450                            cycles_2_us(stat->s_time),
1451                            stat->s_ntargself, stat->s_ntarglocals,
1452                            stat->s_ntargremotes, stat->s_ntargcpu,
1453                            stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
1454                            stat->s_ntarguvhub, stat->s_ntarguvhub16);
1455                 seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
1456                            stat->s_ntarguvhub8, stat->s_ntarguvhub4,
1457                            stat->s_ntarguvhub2, stat->s_ntarguvhub1,
1458                            stat->s_dtimeout, stat->s_strongnacks);
1459                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
1460                            stat->s_retry_messages, stat->s_retriesok,
1461                            stat->s_resets_plug, stat->s_resets_timeout,
1462                            stat->s_giveup, stat->s_stimeout,
1463                            stat->s_busy, stat->s_throttles);
1464                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1465                            stat->s_bau_disabled, stat->s_bau_reenabled,
1466                            stat->s_uv2_wars, stat->s_uv2_wars_hw,
1467                            stat->s_uv2_war_waits, stat->s_enters,
1468                            stat->s_ipifordisabled, stat->s_plugged,
1469                            stat->s_overipilimit, stat->s_giveuplimit,
1470                            stat->s_congested);
1471
1472                 /* destination side statistics */
1473                 seq_printf(file,
1474                         "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
1475                            ops.read_g_sw_ack(uv_cpu_to_pnode(cpu)),
1476                            stat->d_requestee, cycles_2_us(stat->d_time),
1477                            stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
1478                            stat->d_nomsg, stat->d_retries, stat->d_canceled,
1479                            stat->d_nocanceled, stat->d_resets,
1480                            stat->d_rcanceled);
1481         }
1482         return 0;
1483 }
1484
1485 /*
1486  * Display the tunables thru debugfs
1487  */
1488 static ssize_t tunables_read(struct file *file, char __user *userbuf,
1489                                 size_t count, loff_t *ppos)
1490 {
1491         char *buf;
1492         int ret;
1493
1494         buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
1495                 "max_concur plugged_delay plugsb4reset timeoutsb4reset",
1496                 "ipi_reset_limit complete_threshold congested_response_us",
1497                 "congested_reps disabled_period giveup_limit",
1498                 max_concurr, plugged_delay, plugsb4reset,
1499                 timeoutsb4reset, ipi_reset_limit, complete_threshold,
1500                 congested_respns_us, congested_reps, disabled_period,
1501                 giveup_limit);
1502
1503         if (!buf)
1504                 return -ENOMEM;
1505
1506         ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
1507         kfree(buf);
1508         return ret;
1509 }
1510
1511 /*
1512  * handle a write to /proc/sgi_uv/ptc_statistics
1513  * -1: reset the statistics
1514  *  0: display meaning of the statistics
1515  */
1516 static ssize_t ptc_proc_write(struct file *file, const char __user *user,
1517                                 size_t count, loff_t *data)
1518 {
1519         int cpu;
1520         int i;
1521         int elements;
1522         long input_arg;
1523         char optstr[64];
1524         struct ptc_stats *stat;
1525
1526         if (count == 0 || count > sizeof(optstr))
1527                 return -EINVAL;
1528         if (copy_from_user(optstr, user, count))
1529                 return -EFAULT;
1530         optstr[count - 1] = '\0';
1531
1532         if (!strcmp(optstr, "on")) {
1533                 set_bau_on();
1534                 return count;
1535         } else if (!strcmp(optstr, "off")) {
1536                 set_bau_off();
1537                 return count;
1538         }
1539
1540         if (kstrtol(optstr, 10, &input_arg) < 0) {
1541                 pr_debug("%s is invalid\n", optstr);
1542                 return -EINVAL;
1543         }
1544
1545         if (input_arg == 0) {
1546                 elements = ARRAY_SIZE(stat_description);
1547                 pr_debug("# cpu:      cpu number\n");
1548                 pr_debug("Sender statistics:\n");
1549                 for (i = 0; i < elements; i++)
1550                         pr_debug("%s\n", stat_description[i]);
1551         } else if (input_arg == -1) {
1552                 for_each_present_cpu(cpu) {
1553                         stat = &per_cpu(ptcstats, cpu);
1554                         memset(stat, 0, sizeof(struct ptc_stats));
1555                 }
1556         }
1557
1558         return count;
1559 }
1560
1561 static int local_atoi(const char *name)
1562 {
1563         int val = 0;
1564
1565         for (;; name++) {
1566                 switch (*name) {
1567                 case '0' ... '9':
1568                         val = 10*val+(*name-'0');
1569                         break;
1570                 default:
1571                         return val;
1572                 }
1573         }
1574 }
1575
1576 /*
1577  * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
1578  * Zero values reset them to defaults.
1579  */
1580 static int parse_tunables_write(struct bau_control *bcp, char *instr,
1581                                 int count)
1582 {
1583         char *p;
1584         char *q;
1585         int cnt = 0;
1586         int val;
1587         int e = ARRAY_SIZE(tunables);
1588
1589         p = instr + strspn(instr, WHITESPACE);
1590         q = p;
1591         for (; *p; p = q + strspn(q, WHITESPACE)) {
1592                 q = p + strcspn(p, WHITESPACE);
1593                 cnt++;
1594                 if (q == p)
1595                         break;
1596         }
1597         if (cnt != e) {
1598                 pr_info("bau tunable error: should be %d values\n", e);
1599                 return -EINVAL;
1600         }
1601
1602         p = instr + strspn(instr, WHITESPACE);
1603         q = p;
1604         for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
1605                 q = p + strcspn(p, WHITESPACE);
1606                 val = local_atoi(p);
1607                 switch (cnt) {
1608                 case 0:
1609                         if (val == 0) {
1610                                 max_concurr = MAX_BAU_CONCURRENT;
1611                                 max_concurr_const = MAX_BAU_CONCURRENT;
1612                                 continue;
1613                         }
1614                         if (val < 1 || val > bcp->cpus_in_uvhub) {
1615                                 pr_debug(
1616                                 "Error: BAU max concurrent %d is invalid\n",
1617                                 val);
1618                                 return -EINVAL;
1619                         }
1620                         max_concurr = val;
1621                         max_concurr_const = val;
1622                         continue;
1623                 default:
1624                         if (val == 0)
1625                                 *tunables[cnt].tunp = tunables[cnt].deflt;
1626                         else
1627                                 *tunables[cnt].tunp = val;
1628                         continue;
1629                 }
1630                 if (q == p)
1631                         break;
1632         }
1633         return 0;
1634 }
1635
1636 /*
1637  * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
1638  */
1639 static ssize_t tunables_write(struct file *file, const char __user *user,
1640                                 size_t count, loff_t *data)
1641 {
1642         int cpu;
1643         int ret;
1644         char instr[100];
1645         struct bau_control *bcp;
1646
1647         if (count == 0 || count > sizeof(instr)-1)
1648                 return -EINVAL;
1649         if (copy_from_user(instr, user, count))
1650                 return -EFAULT;
1651
1652         instr[count] = '\0';
1653
1654         cpu = get_cpu();
1655         bcp = &per_cpu(bau_control, cpu);
1656         ret = parse_tunables_write(bcp, instr, count);
1657         put_cpu();
1658         if (ret)
1659                 return ret;
1660
1661         for_each_present_cpu(cpu) {
1662                 bcp = &per_cpu(bau_control, cpu);
1663                 bcp->max_concurr         = max_concurr;
1664                 bcp->max_concurr_const   = max_concurr;
1665                 bcp->plugged_delay       = plugged_delay;
1666                 bcp->plugsb4reset        = plugsb4reset;
1667                 bcp->timeoutsb4reset     = timeoutsb4reset;
1668                 bcp->ipi_reset_limit     = ipi_reset_limit;
1669                 bcp->complete_threshold  = complete_threshold;
1670                 bcp->cong_response_us    = congested_respns_us;
1671                 bcp->cong_reps           = congested_reps;
1672                 bcp->disabled_period     = sec_2_cycles(disabled_period);
1673                 bcp->giveup_limit        = giveup_limit;
1674         }
1675         return count;
1676 }
1677
1678 static const struct seq_operations uv_ptc_seq_ops = {
1679         .start          = ptc_seq_start,
1680         .next           = ptc_seq_next,
1681         .stop           = ptc_seq_stop,
1682         .show           = ptc_seq_show
1683 };
1684
1685 static int ptc_proc_open(struct inode *inode, struct file *file)
1686 {
1687         return seq_open(file, &uv_ptc_seq_ops);
1688 }
1689
1690 static int tunables_open(struct inode *inode, struct file *file)
1691 {
1692         return 0;
1693 }
1694
1695 static const struct file_operations proc_uv_ptc_operations = {
1696         .open           = ptc_proc_open,
1697         .read           = seq_read,
1698         .write          = ptc_proc_write,
1699         .llseek         = seq_lseek,
1700         .release        = seq_release,
1701 };
1702
1703 static const struct file_operations tunables_fops = {
1704         .open           = tunables_open,
1705         .read           = tunables_read,
1706         .write          = tunables_write,
1707         .llseek         = default_llseek,
1708 };
1709
1710 static int __init uv_ptc_init(void)
1711 {
1712         struct proc_dir_entry *proc_uv_ptc;
1713
1714         if (!is_uv_system())
1715                 return 0;
1716
1717         proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
1718                                   &proc_uv_ptc_operations);
1719         if (!proc_uv_ptc) {
1720                 pr_err("unable to create %s proc entry\n",
1721                        UV_PTC_BASENAME);
1722                 return -EINVAL;
1723         }
1724
1725         tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
1726         if (!tunables_dir) {
1727                 pr_err("unable to create debugfs directory %s\n",
1728                        UV_BAU_TUNABLES_DIR);
1729                 return -EINVAL;
1730         }
1731         tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
1732                                         tunables_dir, NULL, &tunables_fops);
1733         if (!tunables_file) {
1734                 pr_err("unable to create debugfs file %s\n",
1735                        UV_BAU_TUNABLES_FILE);
1736                 return -EINVAL;
1737         }
1738         return 0;
1739 }
1740
1741 /*
1742  * Initialize the sending side's sending buffers.
1743  */
1744 static void activation_descriptor_init(int node, int pnode, int base_pnode)
1745 {
1746         int i;
1747         int cpu;
1748         int uv1 = 0;
1749         unsigned long gpa;
1750         unsigned long m;
1751         unsigned long n;
1752         size_t dsize;
1753         struct bau_desc *bau_desc;
1754         struct bau_desc *bd2;
1755         struct uv1_bau_msg_header *uv1_hdr;
1756         struct uv2_3_bau_msg_header *uv2_3_hdr;
1757         struct bau_control *bcp;
1758
1759         /*
1760          * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
1761          * per cpu; and one per cpu on the uvhub (ADP_SZ)
1762          */
1763         dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
1764         bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
1765         BUG_ON(!bau_desc);
1766
1767         gpa = uv_gpa(bau_desc);
1768         n = uv_gpa_to_gnode(gpa);
1769         m = ops.bau_gpa_to_offset(gpa);
1770         if (is_uv1_hub())
1771                 uv1 = 1;
1772
1773         /* the 14-bit pnode */
1774         write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
1775         /*
1776          * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
1777          * cpu even though we only use the first one; one descriptor can
1778          * describe a broadcast to 256 uv hubs.
1779          */
1780         for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
1781                 memset(bd2, 0, sizeof(struct bau_desc));
1782                 if (uv1) {
1783                         uv1_hdr = &bd2->header.uv1_hdr;
1784                         uv1_hdr->swack_flag = 1;
1785                         /*
1786                          * The base_dest_nasid set in the message header
1787                          * is the nasid of the first uvhub in the partition.
1788                          * The bit map will indicate destination pnode numbers
1789                          * relative to that base. They may not be consecutive
1790                          * if nasid striding is being used.
1791                          */
1792                         uv1_hdr->base_dest_nasid =
1793                                                   UV_PNODE_TO_NASID(base_pnode);
1794                         uv1_hdr->dest_subnodeid  = UV_LB_SUBNODEID;
1795                         uv1_hdr->command         = UV_NET_ENDPOINT_INTD;
1796                         uv1_hdr->int_both        = 1;
1797                         /*
1798                          * all others need to be set to zero:
1799                          *   fairness chaining multilevel count replied_to
1800                          */
1801                 } else {
1802                         /*
1803                          * BIOS uses legacy mode, but uv2 and uv3 hardware always
1804                          * uses native mode for selective broadcasts.
1805                          */
1806                         uv2_3_hdr = &bd2->header.uv2_3_hdr;
1807                         uv2_3_hdr->swack_flag      = 1;
1808                         uv2_3_hdr->base_dest_nasid =
1809                                                   UV_PNODE_TO_NASID(base_pnode);
1810                         uv2_3_hdr->dest_subnodeid  = UV_LB_SUBNODEID;
1811                         uv2_3_hdr->command         = UV_NET_ENDPOINT_INTD;
1812                 }
1813         }
1814         for_each_present_cpu(cpu) {
1815                 if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1816                         continue;
1817                 bcp = &per_cpu(bau_control, cpu);
1818                 bcp->descriptor_base = bau_desc;
1819         }
1820 }
1821
1822 /*
1823  * initialize the destination side's receiving buffers
1824  * entered for each uvhub in the partition
1825  * - node is first node (kernel memory notion) on the uvhub
1826  * - pnode is the uvhub's physical identifier
1827  */
1828 static void pq_init(int node, int pnode)
1829 {
1830         int cpu;
1831         size_t plsize;
1832         char *cp;
1833         void *vp;
1834         unsigned long gnode, first, last, tail;
1835         struct bau_pq_entry *pqp;
1836         struct bau_control *bcp;
1837
1838         plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
1839         vp = kmalloc_node(plsize, GFP_KERNEL, node);
1840         pqp = (struct bau_pq_entry *)vp;
1841         BUG_ON(!pqp);
1842
1843         cp = (char *)pqp + 31;
1844         pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
1845
1846         for_each_present_cpu(cpu) {
1847                 if (pnode != uv_cpu_to_pnode(cpu))
1848                         continue;
1849                 /* for every cpu on this pnode: */
1850                 bcp = &per_cpu(bau_control, cpu);
1851                 bcp->queue_first        = pqp;
1852                 bcp->bau_msg_head       = pqp;
1853                 bcp->queue_last         = pqp + (DEST_Q_SIZE - 1);
1854         }
1855
1856         first = ops.bau_gpa_to_offset(uv_gpa(pqp));
1857         last = ops.bau_gpa_to_offset(uv_gpa(pqp + (DEST_Q_SIZE - 1)));
1858
1859         /*
1860          * Pre UV4, the gnode is required to locate the payload queue
1861          * and the payload queue tail must be maintained by the kernel.
1862          */
1863         bcp = &per_cpu(bau_control, smp_processor_id());
1864         if (bcp->uvhub_version <= UV_BAU_V3) {
1865                 tail = first;
1866                 gnode = uv_gpa_to_gnode(uv_gpa(pqp));
1867                 first = (gnode << UV_PAYLOADQ_GNODE_SHIFT) | tail;
1868                 write_mmr_payload_tail(pnode, tail);
1869         }
1870
1871         ops.write_payload_first(pnode, first);
1872         ops.write_payload_last(pnode, last);
1873
1874         /* in effect, all msg_type's are set to MSG_NOOP */
1875         memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
1876 }
1877
1878 /*
1879  * Initialization of each UV hub's structures
1880  */
1881 static void __init init_uvhub(int uvhub, int vector, int base_pnode)
1882 {
1883         int node;
1884         int pnode;
1885         unsigned long apicid;
1886
1887         node = uvhub_to_first_node(uvhub);
1888         pnode = uv_blade_to_pnode(uvhub);
1889
1890         activation_descriptor_init(node, pnode, base_pnode);
1891
1892         pq_init(node, pnode);
1893         /*
1894          * The below initialization can't be in firmware because the
1895          * messaging IRQ will be determined by the OS.
1896          */
1897         apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
1898         write_mmr_data_config(pnode, ((apicid << 32) | vector));
1899 }
1900
1901 /*
1902  * We will set BAU_MISC_CONTROL with a timeout period.
1903  * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
1904  * So the destination timeout period has to be calculated from them.
1905  */
1906 static int calculate_destination_timeout(void)
1907 {
1908         unsigned long mmr_image;
1909         int mult1;
1910         int mult2;
1911         int index;
1912         int base;
1913         int ret;
1914         unsigned long ts_ns;
1915
1916         if (is_uv1_hub()) {
1917                 mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
1918                 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1919                 index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
1920                 mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
1921                 mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
1922                 ts_ns = timeout_base_ns[index];
1923                 ts_ns *= (mult1 * mult2);
1924                 ret = ts_ns / 1000;
1925         } else {
1926                 /* same destination timeout for uv2 and uv3 */
1927                 /* 4 bits  0/1 for 10/80us base, 3 bits of multiplier */
1928                 mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
1929                 mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
1930                 if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
1931                         base = 80;
1932                 else
1933                         base = 10;
1934                 mult1 = mmr_image & UV2_ACK_MASK;
1935                 ret = mult1 * base;
1936         }
1937         return ret;
1938 }
1939
1940 static void __init init_per_cpu_tunables(void)
1941 {
1942         int cpu;
1943         struct bau_control *bcp;
1944
1945         for_each_present_cpu(cpu) {
1946                 bcp = &per_cpu(bau_control, cpu);
1947                 bcp->baudisabled                = 0;
1948                 if (nobau)
1949                         bcp->nobau              = true;
1950                 bcp->statp                      = &per_cpu(ptcstats, cpu);
1951                 /* time interval to catch a hardware stay-busy bug */
1952                 bcp->timeout_interval           = usec_2_cycles(2*timeout_us);
1953                 bcp->max_concurr                = max_concurr;
1954                 bcp->max_concurr_const          = max_concurr;
1955                 bcp->plugged_delay              = plugged_delay;
1956                 bcp->plugsb4reset               = plugsb4reset;
1957                 bcp->timeoutsb4reset            = timeoutsb4reset;
1958                 bcp->ipi_reset_limit            = ipi_reset_limit;
1959                 bcp->complete_threshold         = complete_threshold;
1960                 bcp->cong_response_us           = congested_respns_us;
1961                 bcp->cong_reps                  = congested_reps;
1962                 bcp->disabled_period            = sec_2_cycles(disabled_period);
1963                 bcp->giveup_limit               = giveup_limit;
1964                 spin_lock_init(&bcp->queue_lock);
1965                 spin_lock_init(&bcp->uvhub_lock);
1966                 spin_lock_init(&bcp->disable_lock);
1967         }
1968 }
1969
1970 /*
1971  * Scan all cpus to collect blade and socket summaries.
1972  */
1973 static int __init get_cpu_topology(int base_pnode,
1974                                         struct uvhub_desc *uvhub_descs,
1975                                         unsigned char *uvhub_mask)
1976 {
1977         int cpu;
1978         int pnode;
1979         int uvhub;
1980         int socket;
1981         struct bau_control *bcp;
1982         struct uvhub_desc *bdp;
1983         struct socket_desc *sdp;
1984
1985         for_each_present_cpu(cpu) {
1986                 bcp = &per_cpu(bau_control, cpu);
1987
1988                 memset(bcp, 0, sizeof(struct bau_control));
1989
1990                 pnode = uv_cpu_hub_info(cpu)->pnode;
1991                 if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
1992                         pr_emerg(
1993                                 "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
1994                                 cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
1995                         return 1;
1996                 }
1997
1998                 bcp->osnode = cpu_to_node(cpu);
1999                 bcp->partition_base_pnode = base_pnode;
2000
2001                 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
2002                 *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
2003                 bdp = &uvhub_descs[uvhub];
2004
2005                 bdp->num_cpus++;
2006                 bdp->uvhub = uvhub;
2007                 bdp->pnode = pnode;
2008
2009                 /* kludge: 'assuming' one node per socket, and assuming that
2010                    disabling a socket just leaves a gap in node numbers */
2011                 socket = bcp->osnode & 1;
2012                 bdp->socket_mask |= (1 << socket);
2013                 sdp = &bdp->socket[socket];
2014                 sdp->cpu_number[sdp->num_cpus] = cpu;
2015                 sdp->num_cpus++;
2016                 if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
2017                         pr_emerg("%d cpus per socket invalid\n",
2018                                 sdp->num_cpus);
2019                         return 1;
2020                 }
2021         }
2022         return 0;
2023 }
2024
2025 /*
2026  * Each socket is to get a local array of pnodes/hubs.
2027  */
2028 static void make_per_cpu_thp(struct bau_control *smaster)
2029 {
2030         int cpu;
2031         size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
2032
2033         smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
2034         memset(smaster->thp, 0, hpsz);
2035         for_each_present_cpu(cpu) {
2036                 smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
2037                 smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
2038         }
2039 }
2040
2041 /*
2042  * Each uvhub is to get a local cpumask.
2043  */
2044 static void make_per_hub_cpumask(struct bau_control *hmaster)
2045 {
2046         int sz = sizeof(cpumask_t);
2047
2048         hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
2049 }
2050
2051 /*
2052  * Initialize all the per_cpu information for the cpu's on a given socket,
2053  * given what has been gathered into the socket_desc struct.
2054  * And reports the chosen hub and socket masters back to the caller.
2055  */
2056 static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
2057                         struct bau_control **smasterp,
2058                         struct bau_control **hmasterp)
2059 {
2060         int i, cpu, uvhub_cpu;
2061         struct bau_control *bcp;
2062
2063         for (i = 0; i < sdp->num_cpus; i++) {
2064                 cpu = sdp->cpu_number[i];
2065                 bcp = &per_cpu(bau_control, cpu);
2066                 bcp->cpu = cpu;
2067                 if (i == 0) {
2068                         *smasterp = bcp;
2069                         if (!(*hmasterp))
2070                                 *hmasterp = bcp;
2071                 }
2072                 bcp->cpus_in_uvhub = bdp->num_cpus;
2073                 bcp->cpus_in_socket = sdp->num_cpus;
2074                 bcp->socket_master = *smasterp;
2075                 bcp->uvhub = bdp->uvhub;
2076                 if (is_uv1_hub())
2077                         bcp->uvhub_version = UV_BAU_V1;
2078                 else if (is_uv2_hub())
2079                         bcp->uvhub_version = UV_BAU_V2;
2080                 else if (is_uv3_hub())
2081                         bcp->uvhub_version = UV_BAU_V3;
2082                 else if (is_uv4_hub())
2083                         bcp->uvhub_version = UV_BAU_V4;
2084                 else {
2085                         pr_emerg("uvhub version not 1, 2, 3, or 4\n");
2086                         return 1;
2087                 }
2088                 bcp->uvhub_master = *hmasterp;
2089                 uvhub_cpu = uv_cpu_blade_processor_id(cpu);
2090                 bcp->uvhub_cpu = uvhub_cpu;
2091
2092                 /*
2093                  * The ERROR and BUSY status registers are located pairwise over
2094                  * the STATUS_0 and STATUS_1 mmrs; each an array[32] of 2 bits.
2095                  */
2096                 if (uvhub_cpu < UV_CPUS_PER_AS) {
2097                         bcp->status_mmr = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
2098                         bcp->status_index = uvhub_cpu * UV_ACT_STATUS_SIZE;
2099                 } else {
2100                         bcp->status_mmr = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
2101                         bcp->status_index = (uvhub_cpu - UV_CPUS_PER_AS)
2102                                                 * UV_ACT_STATUS_SIZE;
2103                 }
2104
2105                 if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
2106                         pr_emerg("%d cpus per uvhub invalid\n",
2107                                 bcp->uvhub_cpu);
2108                         return 1;
2109                 }
2110         }
2111         return 0;
2112 }
2113
2114 /*
2115  * Summarize the blade and socket topology into the per_cpu structures.
2116  */
2117 static int __init summarize_uvhub_sockets(int nuvhubs,
2118                         struct uvhub_desc *uvhub_descs,
2119                         unsigned char *uvhub_mask)
2120 {
2121         int socket;
2122         int uvhub;
2123         unsigned short socket_mask;
2124
2125         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2126                 struct uvhub_desc *bdp;
2127                 struct bau_control *smaster = NULL;
2128                 struct bau_control *hmaster = NULL;
2129
2130                 if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
2131                         continue;
2132
2133                 bdp = &uvhub_descs[uvhub];
2134                 socket_mask = bdp->socket_mask;
2135                 socket = 0;
2136                 while (socket_mask) {
2137                         struct socket_desc *sdp;
2138                         if ((socket_mask & 1)) {
2139                                 sdp = &bdp->socket[socket];
2140                                 if (scan_sock(sdp, bdp, &smaster, &hmaster))
2141                                         return 1;
2142                                 make_per_cpu_thp(smaster);
2143                         }
2144                         socket++;
2145                         socket_mask = (socket_mask >> 1);
2146                 }
2147                 make_per_hub_cpumask(hmaster);
2148         }
2149         return 0;
2150 }
2151
2152 /*
2153  * initialize the bau_control structure for each cpu
2154  */
2155 static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
2156 {
2157         unsigned char *uvhub_mask;
2158         void *vp;
2159         struct uvhub_desc *uvhub_descs;
2160
2161         if (is_uv3_hub() || is_uv2_hub() || is_uv1_hub())
2162                 timeout_us = calculate_destination_timeout();
2163
2164         vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
2165         uvhub_descs = (struct uvhub_desc *)vp;
2166         memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
2167         uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
2168
2169         if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
2170                 goto fail;
2171
2172         if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
2173                 goto fail;
2174
2175         kfree(uvhub_descs);
2176         kfree(uvhub_mask);
2177         init_per_cpu_tunables();
2178         return 0;
2179
2180 fail:
2181         kfree(uvhub_descs);
2182         kfree(uvhub_mask);
2183         return 1;
2184 }
2185
2186 static const struct bau_operations uv1_bau_ops __initconst = {
2187         .bau_gpa_to_offset       = uv_gpa_to_offset,
2188         .read_l_sw_ack           = read_mmr_sw_ack,
2189         .read_g_sw_ack           = read_gmmr_sw_ack,
2190         .write_l_sw_ack          = write_mmr_sw_ack,
2191         .write_g_sw_ack          = write_gmmr_sw_ack,
2192         .write_payload_first     = write_mmr_payload_first,
2193         .write_payload_last      = write_mmr_payload_last,
2194         .wait_completion         = uv1_wait_completion,
2195 };
2196
2197 static const struct bau_operations uv2_3_bau_ops __initconst = {
2198         .bau_gpa_to_offset       = uv_gpa_to_offset,
2199         .read_l_sw_ack           = read_mmr_sw_ack,
2200         .read_g_sw_ack           = read_gmmr_sw_ack,
2201         .write_l_sw_ack          = write_mmr_sw_ack,
2202         .write_g_sw_ack          = write_gmmr_sw_ack,
2203         .write_payload_first     = write_mmr_payload_first,
2204         .write_payload_last      = write_mmr_payload_last,
2205         .wait_completion         = uv2_3_wait_completion,
2206 };
2207
2208 static const struct bau_operations uv4_bau_ops __initconst = {
2209         .bau_gpa_to_offset       = uv_gpa_to_soc_phys_ram,
2210         .read_l_sw_ack           = read_mmr_proc_sw_ack,
2211         .read_g_sw_ack           = read_gmmr_proc_sw_ack,
2212         .write_l_sw_ack          = write_mmr_proc_sw_ack,
2213         .write_g_sw_ack          = write_gmmr_proc_sw_ack,
2214         .write_payload_first     = write_mmr_proc_payload_first,
2215         .write_payload_last      = write_mmr_proc_payload_last,
2216         .wait_completion         = uv4_wait_completion,
2217 };
2218
2219 /*
2220  * Initialization of BAU-related structures
2221  */
2222 static int __init uv_bau_init(void)
2223 {
2224         int uvhub;
2225         int pnode;
2226         int nuvhubs;
2227         int cur_cpu;
2228         int cpus;
2229         int vector;
2230         cpumask_var_t *mask;
2231
2232         if (!is_uv_system())
2233                 return 0;
2234
2235         if (is_uv4_hub())
2236                 ops = uv4_bau_ops;
2237         else if (is_uv3_hub())
2238                 ops = uv2_3_bau_ops;
2239         else if (is_uv2_hub())
2240                 ops = uv2_3_bau_ops;
2241         else if (is_uv1_hub())
2242                 ops = uv1_bau_ops;
2243
2244         for_each_possible_cpu(cur_cpu) {
2245                 mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
2246                 zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
2247         }
2248
2249         nuvhubs = uv_num_possible_blades();
2250         congested_cycles = usec_2_cycles(congested_respns_us);
2251
2252         uv_base_pnode = 0x7fffffff;
2253         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2254                 cpus = uv_blade_nr_possible_cpus(uvhub);
2255                 if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
2256                         uv_base_pnode = uv_blade_to_pnode(uvhub);
2257         }
2258
2259         /* software timeouts are not supported on UV4 */
2260         if (is_uv3_hub() || is_uv2_hub() || is_uv1_hub())
2261                 enable_timeouts();
2262
2263         if (init_per_cpu(nuvhubs, uv_base_pnode)) {
2264                 set_bau_off();
2265                 nobau_perm = 1;
2266                 return 0;
2267         }
2268
2269         vector = UV_BAU_MESSAGE;
2270         for_each_possible_blade(uvhub) {
2271                 if (uv_blade_nr_possible_cpus(uvhub))
2272                         init_uvhub(uvhub, vector, uv_base_pnode);
2273         }
2274
2275         alloc_intr_gate(vector, uv_bau_message_intr1);
2276
2277         for_each_possible_blade(uvhub) {
2278                 if (uv_blade_nr_possible_cpus(uvhub)) {
2279                         unsigned long val;
2280                         unsigned long mmr;
2281                         pnode = uv_blade_to_pnode(uvhub);
2282                         /* INIT the bau */
2283                         val = 1L << 63;
2284                         write_gmmr_activation(pnode, val);
2285                         mmr = 1; /* should be 1 to broadcast to both sockets */
2286                         if (!is_uv1_hub())
2287                                 write_mmr_data_broadcast(pnode, mmr);
2288                 }
2289         }
2290
2291         return 0;
2292 }
2293 core_initcall(uv_bau_init);
2294 fs_initcall(uv_ptc_init);