1 # SPDX-License-Identifier: GPL-2.0
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_BINFMT_FLAT if !MMU
6 select ARCH_HAS_DMA_PREP_COHERENT if MMU
7 select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
8 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
9 select ARCH_HAS_UNCACHED_SEGMENT if MMU
10 select ARCH_USE_QUEUED_RWLOCKS
11 select ARCH_USE_QUEUED_SPINLOCKS
12 select ARCH_WANT_FRAME_POINTERS
13 select ARCH_WANT_IPC_PARSE_VERSION
14 select BUILDTIME_EXTABLE_SORT
15 select CLONE_BACKWARDS
17 select DMA_REMAP if MMU
18 select GENERIC_ATOMIC64
19 select GENERIC_CLOCKEVENTS
20 select GENERIC_IRQ_SHOW
21 select GENERIC_PCI_IOMAP
22 select GENERIC_SCHED_CLOCK
23 select GENERIC_STRNCPY_FROM_USER if KASAN
24 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
25 select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL
26 select HAVE_ARCH_TRACEHOOK
27 select HAVE_DEBUG_KMEMLEAK
28 select HAVE_DMA_CONTIGUOUS
29 select HAVE_EXIT_THREAD
30 select HAVE_FUNCTION_TRACER
31 select HAVE_FUTEX_CMPXCHG if !MMU
32 select HAVE_HW_BREAKPOINT if PERF_EVENTS
33 select HAVE_IRQ_TIME_ACCOUNTING
36 select HAVE_PERF_EVENTS
37 select HAVE_STACKPROTECTOR
38 select HAVE_SYSCALL_TRACEPOINTS
40 select MODULES_USE_ELF_RELA
41 select PERF_USE_VMALLOC
44 Xtensa processors are 32-bit RISC machines designed by Tensilica
45 primarily for embedded systems. These processors are both
46 configurable and extensible. The Linux port to the Xtensa
47 architecture supports all processor configurations and extensions,
48 with reasonable minimum requirements. The Xtensa Linux project has
49 a home page at <http://www.linux-xtensa.org/>.
51 config GENERIC_HWEIGHT
54 config ARCH_HAS_ILOG2_U32
57 config ARCH_HAS_ILOG2_U64
67 config LOCKDEP_SUPPORT
70 config STACKTRACE_SUPPORT
73 config TRACE_IRQFLAGS_SUPPORT
79 config HAVE_XTENSA_GPIO32
82 config KASAN_SHADOW_OFFSET
86 menu "Processor type and features"
89 prompt "Xtensa Processor Configuration"
90 default XTENSA_VARIANT_FSF
92 config XTENSA_VARIANT_FSF
93 bool "fsf - default (not generic) configuration"
96 config XTENSA_VARIANT_DC232B
97 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
99 select HAVE_XTENSA_GPIO32
101 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
103 config XTENSA_VARIANT_DC233C
104 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
106 select HAVE_XTENSA_GPIO32
108 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
110 config XTENSA_VARIANT_CUSTOM
111 bool "Custom Xtensa processor configuration"
112 select HAVE_XTENSA_GPIO32
114 Select this variant to use a custom Xtensa processor configuration.
115 You will be prompted for a processor variant CORENAME.
118 config XTENSA_VARIANT_CUSTOM_NAME
119 string "Xtensa Processor Custom Core Variant Name"
120 depends on XTENSA_VARIANT_CUSTOM
122 Provide the name of a custom Xtensa processor variant.
123 This CORENAME selects arch/xtensa/variant/CORENAME.
124 Dont forget you have to select MMU if you have one.
126 config XTENSA_VARIANT_NAME
128 default "dc232b" if XTENSA_VARIANT_DC232B
129 default "dc233c" if XTENSA_VARIANT_DC233C
130 default "fsf" if XTENSA_VARIANT_FSF
131 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
133 config XTENSA_VARIANT_MMU
134 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
135 depends on XTENSA_VARIANT_CUSTOM
139 Build a Conventional Kernel with full MMU support,
140 ie: it supports a TLB with auto-loading, page protection.
142 config XTENSA_VARIANT_HAVE_PERF_EVENTS
143 bool "Core variant has Performance Monitor Module"
144 depends on XTENSA_VARIANT_CUSTOM
147 Enable if core variant has Performance Monitor Module with
148 External Registers Interface.
152 config XTENSA_FAKE_NMI
153 bool "Treat PMM IRQ as NMI"
154 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
157 If PMM IRQ is the only IRQ at EXCM level it is safe to
158 treat it as NMI, which improves accuracy of profiling.
160 If there are other interrupts at or above PMM IRQ priority level
161 but not above the EXCM level, PMM IRQ still may be treated as NMI,
162 but only if these IRQs are not used. There will be a build warning
163 saying that this is not safe, and a bugcheck if one of these IRQs
168 config XTENSA_UNALIGNED_USER
169 bool "Unaligned memory access in user space"
171 The Xtensa architecture currently does not handle unaligned
172 memory accesses in hardware but through an exception handler.
173 Per default, unaligned memory accesses are disabled in user space.
175 Say Y here to enable unaligned memory access in user space.
178 bool "System Supports SMP (MX)"
179 depends on XTENSA_VARIANT_CUSTOM
182 This option is use to indicate that the system-on-a-chip (SOC)
183 supports Multiprocessing. Multiprocessor support implemented above
184 the CPU core definition and currently needs to be selected manually.
186 Multiprocessor support in implemented with external cache and
187 interrupt controllers.
189 The MX interrupt distributer adds Interprocessor Interrupts
190 and causes the IRQ numbers to be increased by 4 for devices
191 like the open cores ethernet driver and the serial interface.
193 You still have to select "Enable SMP" to enable SMP on this SOC.
196 bool "Enable Symmetric multi-processing support"
198 select GENERIC_SMP_IDLE_THREAD
200 Enabled SMP Software; allows more than one CPU/CORE
201 to be activated during startup.
205 int "Maximum number of CPUs (2-32)"
210 bool "Enable CPU hotplug support"
213 Say Y here to allow turning CPUs off and on. CPUs can be
214 controlled through /sys/devices/system/cpu.
216 Say N if you want to disable CPU hotplug.
218 config FAST_SYSCALL_XTENSA
219 bool "Enable fast atomic syscalls"
222 fast_syscall_xtensa is a syscall that can make atomic operations
223 on UP kernel when processor has no s32c1i support.
225 This syscall is deprecated. It may have issues when called with
226 invalid arguments. It is provided only for backwards compatibility.
227 Only enable it if your userspace software requires it.
231 config FAST_SYSCALL_SPILL_REGISTERS
232 bool "Enable spill registers syscall"
235 fast_syscall_spill_registers is a syscall that spills all active
236 register windows of a calling userspace task onto its stack.
238 This syscall is deprecated. It may have issues when called with
239 invalid arguments. It is provided only for backwards compatibility.
240 Only enable it if your userspace software requires it.
244 config USER_ABI_CALL0
248 prompt "Userspace ABI"
249 default USER_ABI_DEFAULT
251 Select supported userspace ABI.
253 If unsure, choose the default ABI.
255 config USER_ABI_DEFAULT
256 bool "Default ABI only"
258 Assume default userspace ABI. For XEA2 cores it is windowed ABI.
259 call0 ABI binaries may be run on such kernel, but signal delivery
260 will not work correctly for them.
262 config USER_ABI_CALL0_ONLY
263 bool "Call0 ABI only"
264 select USER_ABI_CALL0
266 Select this option to support only call0 ABI in userspace.
267 Windowed ABI binaries will crash with a segfault caused by
268 an illegal instruction exception on the first 'entry' opcode.
270 Choose this option if you're planning to run only user code
271 built with call0 ABI.
273 config USER_ABI_CALL0_PROBE
274 bool "Support both windowed and call0 ABI by probing"
275 select USER_ABI_CALL0
277 Select this option to support both windowed and call0 userspace
278 ABIs. When enabled all processes are started with PS.WOE disabled
279 and a fast user exception handler for an illegal instruction is
280 used to turn on PS.WOE bit on the first 'entry' opcode executed by
283 This option should be enabled for the kernel that must support
284 both call0 and windowed ABIs in userspace at the same time.
286 Note that Xtensa ISA does not guarantee that entry opcode will
287 raise an illegal instruction exception on cores with XEA2 when
288 PS.WOE is disabled, check whether the target core supports it.
294 config XTENSA_CALIBRATE_CCOUNT
297 On some platforms (XT2000, for example), the CPU clock rate can
298 vary. The frequency can be determined, however, by measuring
299 against a well known, fixed frequency, such as an UART oscillator.
301 config SERIAL_CONSOLE
304 config PLATFORM_HAVE_XIP
307 menu "Platform options"
310 prompt "Xtensa System Type"
311 default XTENSA_PLATFORM_ISS
313 config XTENSA_PLATFORM_ISS
315 select XTENSA_CALIBRATE_CCOUNT
316 select SERIAL_CONSOLE
318 ISS is an acronym for Tensilica's Instruction Set Simulator.
320 config XTENSA_PLATFORM_XT2000
324 XT2000 is the name of Tensilica's feature-rich emulation platform.
325 This hardware is capable of running a full Linux distribution.
327 config XTENSA_PLATFORM_XTFPGA
329 select ETHOC if ETHERNET
330 select PLATFORM_WANT_DEFAULT_MEM if !MMU
331 select SERIAL_CONSOLE
332 select XTENSA_CALIBRATE_CCOUNT
333 select PLATFORM_HAVE_XIP
335 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
336 This hardware is capable of running a full Linux distribution.
340 config PLATFORM_NR_IRQS
342 default 3 if XTENSA_PLATFORM_XT2000
345 config XTENSA_CPU_CLOCK
346 int "CPU clock rate [MHz]"
347 depends on !XTENSA_CALIBRATE_CCOUNT
350 config GENERIC_CALIBRATE_DELAY
351 bool "Auto calibration of the BogoMIPS value"
353 The BogoMIPS value can easily be derived from the CPU frequency.
356 bool "Default bootloader kernel arguments"
359 string "Initial kernel command string"
360 depends on CMDLINE_BOOL
361 default "console=ttyS0,38400 root=/dev/ram"
363 On some architectures (EBSA110 and CATS), there is currently no way
364 for the boot loader to pass arguments to the kernel. For these
365 architectures, you should supply some command-line options at build
366 time by entering them here. As a minimum, you should specify the
367 memory size and the root device (e.g., mem=64M root=/dev/nfs).
370 bool "Flattened Device Tree support"
372 select OF_EARLY_FLATTREE
374 Include support for flattened device tree machine descriptions.
376 config BUILTIN_DTB_SOURCE
377 string "DTB to build into the kernel image"
380 config PARSE_BOOTPARAM
381 bool "Parse bootparam block"
384 Parse parameters passed to the kernel from the bootloader. It may
385 be disabled if the kernel is known to run without the bootloader.
389 config BLK_DEV_SIMDISK
390 tristate "Host file-based simulated block device support"
392 depends on XTENSA_PLATFORM_ISS && BLOCK
394 Create block devices that map to files in the host file system.
395 Device binding to host file may be changed at runtime via proc
396 interface provided the device is not in use.
398 config BLK_DEV_SIMDISK_COUNT
399 int "Number of host file-based simulated block devices"
401 depends on BLK_DEV_SIMDISK
404 This is the default minimal number of created block devices.
405 Kernel/module parameter 'simdisk_count' may be used to change this
406 value at runtime. More file names (but no more than 10) may be
407 specified as parameters, simdisk_count grows accordingly.
409 config SIMDISK0_FILENAME
410 string "Host filename for the first simulated device"
411 depends on BLK_DEV_SIMDISK = y
414 Attach a first simdisk to a host file. Conventionally, this file
415 contains a root file system.
417 config SIMDISK1_FILENAME
418 string "Host filename for the second simulated device"
419 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
422 Another simulated disk in a host file for a buildroot-independent
426 bool "Enable XTFPGA LCD driver"
427 depends on XTENSA_PLATFORM_XTFPGA
430 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
431 progress messages there during bootup/shutdown. It may be useful
432 during board bringup.
436 config XTFPGA_LCD_BASE_ADDR
437 hex "XTFPGA LCD base address"
438 depends on XTFPGA_LCD
441 Base address of the LCD controller inside KIO region.
442 Different boards from XTFPGA family have LCD controller at different
443 addresses. Please consult prototyping user guide for your board for
444 the correct address. Wrong address here may lead to hardware lockup.
446 config XTFPGA_LCD_8BIT_ACCESS
447 bool "Use 8-bit access to XTFPGA LCD"
448 depends on XTFPGA_LCD
451 LCD may be connected with 4- or 8-bit interface, 8-bit access may
452 only be used with 8-bit interface. Please consult prototyping user
453 guide for your board for the correct interface width.
455 comment "Kernel memory layout"
457 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
458 bool "Initialize Xtensa MMU inside the Linux kernel code"
459 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
460 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
462 Earlier version initialized the MMU in the exception vector
463 before jumping to _startup in head.S and had an advantage that
464 it was possible to place a software breakpoint at 'reset' and
465 then enter your normal kernel breakpoints once the MMU was mapped
466 to the kernel mappings (0XC0000000).
468 This unfortunately won't work for U-Boot and likely also wont
469 work for using KEXEC to have a hot kernel ready for doing a
472 So now the MMU is initialized in head.S but it's necessary to
473 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
474 xt-gdb can't place a Software Breakpoint in the 0XD region prior
475 to mapping the MMU and after mapping even if the area of low memory
476 was mapped gdb wouldn't remove the breakpoint on hitting it as the
477 PC wouldn't match. Since Hardware Breakpoints are recommended for
478 Linux configurations it seems reasonable to just assume they exist
479 and leave this older mechanism for unfortunate souls that choose
480 not to follow Tensilica's recommendation.
482 Selecting this will cause U-Boot to set the KERNEL Load and Entry
483 address at 0x00003000 instead of the mapped std of 0xD0003000.
488 bool "Kernel Execute-In-Place from ROM"
489 depends on PLATFORM_HAVE_XIP
491 Execute-In-Place allows the kernel to run from non-volatile storage
492 directly addressable by the CPU, such as NOR flash. This saves RAM
493 space since the text section of the kernel is not loaded from flash
494 to RAM. Read-write sections, such as the data section and stack,
495 are still copied to RAM. The XIP kernel is not compressed since
496 it has to run directly from flash, so it will take more space to
497 store it. The flash address used to link the kernel object files,
498 and for storing it, is configuration dependent. Therefore, if you
499 say Y here, you must know the proper physical address where to
500 store the kernel image depending on your own flash memory usage.
502 Also note that the make target becomes "make xipImage" rather than
503 "make Image" or "make uImage". The final kernel binary to put in
504 ROM memory will be arch/xtensa/boot/xipImage.
508 config MEMMAP_CACHEATTR
509 hex "Cache attributes for the memory address space"
513 These cache attributes are set up for noMMU systems. Each hex digit
514 specifies cache attributes for the corresponding 512MB memory
515 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
516 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
518 Cache attribute values are specific for the MMU type.
519 For region protection MMUs:
531 3: special (c and e are illegal, f is reserved).
535 2: WB, no-write-allocate cache,
540 hex "Physical address of the KSEG mapping"
541 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
544 This is the physical address where KSEG is mapped. Please refer to
545 the chosen KSEG layout help for the required address alignment.
546 Unpacked kernel image (including vectors) must be located completely
548 Physical memory below this address is not available to linux.
550 If unsure, leave the default value here.
552 config KERNEL_VIRTUAL_ADDRESS
553 hex "Kernel virtual address"
554 depends on MMU && XIP_KERNEL
557 This is the virtual address where the XIP kernel is mapped.
558 XIP kernel may be mapped into KSEG or KIO region, virtual address
559 provided here must match kernel load address provided in
562 config KERNEL_LOAD_ADDRESS
563 hex "Kernel load address"
564 default 0x60003000 if !MMU
565 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
566 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
568 This is the address where the kernel is loaded.
569 It is virtual address for MMUv2 configurations and physical address
570 for all other configurations.
572 If unsure, leave the default value here.
574 config VECTORS_OFFSET
575 hex "Kernel vectors offset"
577 depends on !XIP_KERNEL
579 This is the offset of the kernel image from the relocatable vectors
582 If unsure, leave the default value here.
585 hex "XIP kernel data virtual address"
586 depends on XIP_KERNEL
589 This is the virtual address where XIP kernel data is copied.
590 It must be within KSEG if MMU is used.
592 config PLATFORM_WANT_DEFAULT_MEM
595 config DEFAULT_MEM_START
597 prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
598 default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
601 This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
602 in noMMU configurations.
604 If unsure, leave the default value here.
609 default XTENSA_KSEG_MMU_V2
611 config XTENSA_KSEG_MMU_V2
612 bool "MMUv2: 128MB cached + 128MB uncached"
614 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
615 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
617 KSEG_PADDR must be aligned to 128MB.
619 config XTENSA_KSEG_256M
620 bool "256MB cached + 256MB uncached"
621 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
623 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
624 with cache and to 0xc0000000 without cache.
625 KSEG_PADDR must be aligned to 256MB.
627 config XTENSA_KSEG_512M
628 bool "512MB cached + 512MB uncached"
629 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
631 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
632 with cache and to 0xc0000000 without cache.
633 KSEG_PADDR must be aligned to 256MB.
638 bool "High Memory Support"
641 Linux can use the full amount of RAM in the system by
642 default. However, the default MMUv2 setup only maps the
643 lowermost 128 MB of memory linearly to the areas starting
644 at 0xd0000000 (cached) and 0xd8000000 (uncached).
645 When there are more than 128 MB memory in the system not
646 all of it can be "permanently mapped" by the kernel.
647 The physical memory that's not permanently mapped is called
650 If you are compiling a kernel which will never run on a
651 machine with more than 128 MB total physical RAM, answer
656 config FORCE_MAX_ZONEORDER
657 int "Maximum zone order"
660 The kernel memory allocator divides physically contiguous memory
661 blocks into "zones", where each zone is a power of two number of
662 pages. This option selects the largest power of two that the kernel
663 keeps in the memory allocator. If you need to allocate very large
664 blocks of physically contiguous memory, then you may need to
667 This config option is actually maximum order plus one. For example,
668 a value of 11 means that the largest free memory block is 2^10 pages.
672 menu "Power management options"
674 source "kernel/power/Kconfig"