1 # SPDX-License-Identifier: GPL-2.0
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_SYNC_DMA_FOR_CPU
6 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
7 select ARCH_NO_COHERENT_DMA_MMAP if !MMU
8 select ARCH_USE_QUEUED_RWLOCKS
9 select ARCH_USE_QUEUED_SPINLOCKS
10 select ARCH_WANT_FRAME_POINTERS
11 select ARCH_WANT_IPC_PARSE_VERSION
12 select BUILDTIME_EXTABLE_SORT
13 select CLONE_BACKWARDS
15 select DMA_REMAP if MMU
16 select GENERIC_ATOMIC64
17 select GENERIC_CLOCKEVENTS
18 select GENERIC_IRQ_SHOW
19 select GENERIC_PCI_IOMAP
20 select GENERIC_SCHED_CLOCK
21 select GENERIC_STRNCPY_FROM_USER if KASAN
22 select HAVE_ARCH_JUMP_LABEL
23 select HAVE_ARCH_KASAN if MMU
24 select HAVE_ARCH_TRACEHOOK
25 select HAVE_DEBUG_KMEMLEAK
26 select HAVE_DMA_CONTIGUOUS
27 select HAVE_EXIT_THREAD
28 select HAVE_FUNCTION_TRACER
29 select HAVE_FUTEX_CMPXCHG if !MMU
30 select HAVE_HW_BREAKPOINT if PERF_EVENTS
31 select HAVE_IRQ_TIME_ACCOUNTING
34 select HAVE_PERF_EVENTS
35 select HAVE_STACKPROTECTOR
36 select HAVE_SYSCALL_TRACEPOINTS
38 select MODULES_USE_ELF_RELA
39 select PERF_USE_VMALLOC
42 Xtensa processors are 32-bit RISC machines designed by Tensilica
43 primarily for embedded systems. These processors are both
44 configurable and extensible. The Linux port to the Xtensa
45 architecture supports all processor configurations and extensions,
46 with reasonable minimum requirements. The Xtensa Linux project has
47 a home page at <http://www.linux-xtensa.org/>.
49 config RWSEM_XCHGADD_ALGORITHM
52 config GENERIC_HWEIGHT
55 config ARCH_HAS_ILOG2_U32
58 config ARCH_HAS_ILOG2_U64
68 config LOCKDEP_SUPPORT
71 config STACKTRACE_SUPPORT
74 config TRACE_IRQFLAGS_SUPPORT
80 config HAVE_XTENSA_GPIO32
83 config KASAN_SHADOW_OFFSET
87 menu "Processor type and features"
90 prompt "Xtensa Processor Configuration"
91 default XTENSA_VARIANT_FSF
93 config XTENSA_VARIANT_FSF
94 bool "fsf - default (not generic) configuration"
97 config XTENSA_VARIANT_DC232B
98 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
100 select HAVE_XTENSA_GPIO32
102 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
104 config XTENSA_VARIANT_DC233C
105 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
107 select HAVE_XTENSA_GPIO32
109 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
111 config XTENSA_VARIANT_CUSTOM
112 bool "Custom Xtensa processor configuration"
113 select HAVE_XTENSA_GPIO32
115 Select this variant to use a custom Xtensa processor configuration.
116 You will be prompted for a processor variant CORENAME.
119 config XTENSA_VARIANT_CUSTOM_NAME
120 string "Xtensa Processor Custom Core Variant Name"
121 depends on XTENSA_VARIANT_CUSTOM
123 Provide the name of a custom Xtensa processor variant.
124 This CORENAME selects arch/xtensa/variant/CORENAME.
125 Dont forget you have to select MMU if you have one.
127 config XTENSA_VARIANT_NAME
129 default "dc232b" if XTENSA_VARIANT_DC232B
130 default "dc233c" if XTENSA_VARIANT_DC233C
131 default "fsf" if XTENSA_VARIANT_FSF
132 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
134 config XTENSA_VARIANT_MMU
135 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
136 depends on XTENSA_VARIANT_CUSTOM
140 Build a Conventional Kernel with full MMU support,
141 ie: it supports a TLB with auto-loading, page protection.
143 config XTENSA_VARIANT_HAVE_PERF_EVENTS
144 bool "Core variant has Performance Monitor Module"
145 depends on XTENSA_VARIANT_CUSTOM
148 Enable if core variant has Performance Monitor Module with
149 External Registers Interface.
153 config XTENSA_FAKE_NMI
154 bool "Treat PMM IRQ as NMI"
155 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
158 If PMM IRQ is the only IRQ at EXCM level it is safe to
159 treat it as NMI, which improves accuracy of profiling.
161 If there are other interrupts at or above PMM IRQ priority level
162 but not above the EXCM level, PMM IRQ still may be treated as NMI,
163 but only if these IRQs are not used. There will be a build warning
164 saying that this is not safe, and a bugcheck if one of these IRQs
169 config XTENSA_UNALIGNED_USER
170 bool "Unaligned memory access in user space"
172 The Xtensa architecture currently does not handle unaligned
173 memory accesses in hardware but through an exception handler.
174 Per default, unaligned memory accesses are disabled in user space.
176 Say Y here to enable unaligned memory access in user space.
179 bool "System Supports SMP (MX)"
180 depends on XTENSA_VARIANT_CUSTOM
183 This option is use to indicate that the system-on-a-chip (SOC)
184 supports Multiprocessing. Multiprocessor support implemented above
185 the CPU core definition and currently needs to be selected manually.
187 Multiprocessor support in implemented with external cache and
188 interrupt controllers.
190 The MX interrupt distributer adds Interprocessor Interrupts
191 and causes the IRQ numbers to be increased by 4 for devices
192 like the open cores ethernet driver and the serial interface.
194 You still have to select "Enable SMP" to enable SMP on this SOC.
197 bool "Enable Symmetric multi-processing support"
199 select GENERIC_SMP_IDLE_THREAD
201 Enabled SMP Software; allows more than one CPU/CORE
202 to be activated during startup.
206 int "Maximum number of CPUs (2-32)"
211 bool "Enable CPU hotplug support"
214 Say Y here to allow turning CPUs off and on. CPUs can be
215 controlled through /sys/devices/system/cpu.
217 Say N if you want to disable CPU hotplug.
219 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
220 bool "Initialize Xtensa MMU inside the Linux kernel code"
221 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
222 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
224 Earlier version initialized the MMU in the exception vector
225 before jumping to _startup in head.S and had an advantage that
226 it was possible to place a software breakpoint at 'reset' and
227 then enter your normal kernel breakpoints once the MMU was mapped
228 to the kernel mappings (0XC0000000).
230 This unfortunately won't work for U-Boot and likely also wont
231 work for using KEXEC to have a hot kernel ready for doing a
234 So now the MMU is initialized in head.S but it's necessary to
235 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
236 xt-gdb can't place a Software Breakpoint in the 0XD region prior
237 to mapping the MMU and after mapping even if the area of low memory
238 was mapped gdb wouldn't remove the breakpoint on hitting it as the
239 PC wouldn't match. Since Hardware Breakpoints are recommended for
240 Linux configurations it seems reasonable to just assume they exist
241 and leave this older mechanism for unfortunate souls that choose
242 not to follow Tensilica's recommendation.
244 Selecting this will cause U-Boot to set the KERNEL Load and Entry
245 address at 0x00003000 instead of the mapped std of 0xD0003000.
249 config MEMMAP_CACHEATTR
250 hex "Cache attributes for the memory address space"
254 These cache attributes are set up for noMMU systems. Each hex digit
255 specifies cache attributes for the corresponding 512MB memory
256 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
257 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
259 Cache attribute values are specific for the MMU type, so e.g.
260 for region protection MMUs: 2 is cache bypass, 4 is WB cached,
261 1 is WT cached, f is illegal. For ful MMU: bit 0 makes it executable,
262 bit 1 makes it writable, bits 2..3 meaning is 0: cache bypass,
263 1: WB cache, 2: WT cache, 3: special (c and e are illegal, f is
267 hex "Physical address of the KSEG mapping"
268 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
271 This is the physical address where KSEG is mapped. Please refer to
272 the chosen KSEG layout help for the required address alignment.
273 Unpacked kernel image (including vectors) must be located completely
275 Physical memory below this address is not available to linux.
277 If unsure, leave the default value here.
279 config KERNEL_LOAD_ADDRESS
280 hex "Kernel load address"
281 default 0x60003000 if !MMU
282 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
283 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
285 This is the address where the kernel is loaded.
286 It is virtual address for MMUv2 configurations and physical address
287 for all other configurations.
289 If unsure, leave the default value here.
291 config VECTORS_OFFSET
292 hex "Kernel vectors offset"
295 This is the offset of the kernel image from the relocatable vectors
298 If unsure, leave the default value here.
303 default XTENSA_KSEG_MMU_V2
305 config XTENSA_KSEG_MMU_V2
306 bool "MMUv2: 128MB cached + 128MB uncached"
308 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
309 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
311 KSEG_PADDR must be aligned to 128MB.
313 config XTENSA_KSEG_256M
314 bool "256MB cached + 256MB uncached"
315 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
317 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
318 with cache and to 0xc0000000 without cache.
319 KSEG_PADDR must be aligned to 256MB.
321 config XTENSA_KSEG_512M
322 bool "512MB cached + 512MB uncached"
323 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
325 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
326 with cache and to 0xc0000000 without cache.
327 KSEG_PADDR must be aligned to 256MB.
332 bool "High Memory Support"
335 Linux can use the full amount of RAM in the system by
336 default. However, the default MMUv2 setup only maps the
337 lowermost 128 MB of memory linearly to the areas starting
338 at 0xd0000000 (cached) and 0xd8000000 (uncached).
339 When there are more than 128 MB memory in the system not
340 all of it can be "permanently mapped" by the kernel.
341 The physical memory that's not permanently mapped is called
344 If you are compiling a kernel which will never run on a
345 machine with more than 128 MB total physical RAM, answer
350 config FAST_SYSCALL_XTENSA
351 bool "Enable fast atomic syscalls"
354 fast_syscall_xtensa is a syscall that can make atomic operations
355 on UP kernel when processor has no s32c1i support.
357 This syscall is deprecated. It may have issues when called with
358 invalid arguments. It is provided only for backwards compatibility.
359 Only enable it if your userspace software requires it.
363 config FAST_SYSCALL_SPILL_REGISTERS
364 bool "Enable spill registers syscall"
367 fast_syscall_spill_registers is a syscall that spills all active
368 register windows of a calling userspace task onto its stack.
370 This syscall is deprecated. It may have issues when called with
371 invalid arguments. It is provided only for backwards compatibility.
372 Only enable it if your userspace software requires it.
378 config XTENSA_CALIBRATE_CCOUNT
381 On some platforms (XT2000, for example), the CPU clock rate can
382 vary. The frequency can be determined, however, by measuring
383 against a well known, fixed frequency, such as an UART oscillator.
385 config SERIAL_CONSOLE
388 menu "Platform options"
391 prompt "Xtensa System Type"
392 default XTENSA_PLATFORM_ISS
394 config XTENSA_PLATFORM_ISS
396 select XTENSA_CALIBRATE_CCOUNT
397 select SERIAL_CONSOLE
399 ISS is an acronym for Tensilica's Instruction Set Simulator.
401 config XTENSA_PLATFORM_XT2000
405 XT2000 is the name of Tensilica's feature-rich emulation platform.
406 This hardware is capable of running a full Linux distribution.
408 config XTENSA_PLATFORM_XTFPGA
410 select ETHOC if ETHERNET
411 select PLATFORM_WANT_DEFAULT_MEM if !MMU
412 select SERIAL_CONSOLE
413 select XTENSA_CALIBRATE_CCOUNT
415 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
416 This hardware is capable of running a full Linux distribution.
420 config PLATFORM_NR_IRQS
422 default 3 if XTENSA_PLATFORM_XT2000
425 config XTENSA_CPU_CLOCK
426 int "CPU clock rate [MHz]"
427 depends on !XTENSA_CALIBRATE_CCOUNT
430 config GENERIC_CALIBRATE_DELAY
431 bool "Auto calibration of the BogoMIPS value"
433 The BogoMIPS value can easily be derived from the CPU frequency.
436 bool "Default bootloader kernel arguments"
439 string "Initial kernel command string"
440 depends on CMDLINE_BOOL
441 default "console=ttyS0,38400 root=/dev/ram"
443 On some architectures (EBSA110 and CATS), there is currently no way
444 for the boot loader to pass arguments to the kernel. For these
445 architectures, you should supply some command-line options at build
446 time by entering them here. As a minimum, you should specify the
447 memory size and the root device (e.g., mem=64M root=/dev/nfs).
450 bool "Flattened Device Tree support"
452 select OF_EARLY_FLATTREE
454 Include support for flattened device tree machine descriptions.
456 config BUILTIN_DTB_SOURCE
457 string "DTB to build into the kernel image"
460 config PARSE_BOOTPARAM
461 bool "Parse bootparam block"
464 Parse parameters passed to the kernel from the bootloader. It may
465 be disabled if the kernel is known to run without the bootloader.
469 config BLK_DEV_SIMDISK
470 tristate "Host file-based simulated block device support"
472 depends on XTENSA_PLATFORM_ISS && BLOCK
474 Create block devices that map to files in the host file system.
475 Device binding to host file may be changed at runtime via proc
476 interface provided the device is not in use.
478 config BLK_DEV_SIMDISK_COUNT
479 int "Number of host file-based simulated block devices"
481 depends on BLK_DEV_SIMDISK
484 This is the default minimal number of created block devices.
485 Kernel/module parameter 'simdisk_count' may be used to change this
486 value at runtime. More file names (but no more than 10) may be
487 specified as parameters, simdisk_count grows accordingly.
489 config SIMDISK0_FILENAME
490 string "Host filename for the first simulated device"
491 depends on BLK_DEV_SIMDISK = y
494 Attach a first simdisk to a host file. Conventionally, this file
495 contains a root file system.
497 config SIMDISK1_FILENAME
498 string "Host filename for the second simulated device"
499 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
502 Another simulated disk in a host file for a buildroot-independent
505 config FORCE_MAX_ZONEORDER
506 int "Maximum zone order"
509 The kernel memory allocator divides physically contiguous memory
510 blocks into "zones", where each zone is a power of two number of
511 pages. This option selects the largest power of two that the kernel
512 keeps in the memory allocator. If you need to allocate very large
513 blocks of physically contiguous memory, then you may need to
516 This config option is actually maximum order plus one. For example,
517 a value of 11 means that the largest free memory block is 2^10 pages.
519 config PLATFORM_WANT_DEFAULT_MEM
522 config DEFAULT_MEM_START
524 prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
525 default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
528 This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
529 in noMMU configurations.
531 If unsure, leave the default value here.
534 bool "Enable XTFPGA LCD driver"
535 depends on XTENSA_PLATFORM_XTFPGA
538 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
539 progress messages there during bootup/shutdown. It may be useful
540 during board bringup.
544 config XTFPGA_LCD_BASE_ADDR
545 hex "XTFPGA LCD base address"
546 depends on XTFPGA_LCD
549 Base address of the LCD controller inside KIO region.
550 Different boards from XTFPGA family have LCD controller at different
551 addresses. Please consult prototyping user guide for your board for
552 the correct address. Wrong address here may lead to hardware lockup.
554 config XTFPGA_LCD_8BIT_ACCESS
555 bool "Use 8-bit access to XTFPGA LCD"
556 depends on XTFPGA_LCD
559 LCD may be connected with 4- or 8-bit interface, 8-bit access may
560 only be used with 8-bit interface. Please consult prototyping user
561 guide for your board for the correct interface width.
565 menu "Power management options"
567 source "kernel/power/Kconfig"