drivers/acpi/acpi_lpss.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * ACPI support for Intel Lynxpoint LPSS.
   4  *
   5  * Copyright (C) 2013, Intel Corporation
   6  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
   7  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
   8  */
   9
  10 #include <linux/acpi.h>
  11 #include <linux/clkdev.h>
  12 #include <linux/clk-provider.h>
  13 #include <linux/dmi.h>
  14 #include <linux/err.h>
  15 #include <linux/io.h>
  16 #include <linux/mutex.h>
  17 #include <linux/pci.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/platform_data/x86/clk-lpss.h>
  20 #include <linux/platform_data/x86/pmc_atom.h>
  21 #include <linux/pm_domain.h>
  22 #include <linux/pm_runtime.h>
  23 #include <linux/pwm.h>
  24 #include <linux/suspend.h>
  25 #include <linux/delay.h>
  26
  27 #include "internal.h"
  28
  29 ACPI_MODULE_NAME("acpi_lpss");
  30
  31 #ifdef CONFIG_X86_INTEL_LPSS
  32
  33 #include <asm/cpu_device_id.h>
  34 #include <asm/intel-family.h>
  35 #include <asm/iosf_mbi.h>
  36
  37 #define LPSS_ADDR(desc) ((unsigned long)&desc)
  38
  39 #define LPSS_CLK_SIZE   0x04
  40 #define LPSS_LTR_SIZE   0x18
  41
  42 /* Offsets relative to LPSS_PRIVATE_OFFSET */
  43 #define LPSS_CLK_DIVIDER_DEF_MASK       (BIT(1) | BIT(16))
  44 #define LPSS_RESETS                     0x04
  45 #define LPSS_RESETS_RESET_FUNC          BIT(0)
  46 #define LPSS_RESETS_RESET_APB           BIT(1)
  47 #define LPSS_GENERAL                    0x08
  48 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
  49 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
  50 #define LPSS_SW_LTR                     0x10
  51 #define LPSS_AUTO_LTR                   0x14
  52 #define LPSS_LTR_SNOOP_REQ              BIT(15)
  53 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
  54 #define LPSS_LTR_SNOOP_LAT_1US          0x800
  55 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
  56 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
  57 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
  58 #define LPSS_LTR_MAX_VAL                0x3FF
  59 #define LPSS_TX_INT                     0x20
  60 #define LPSS_TX_INT_MASK                BIT(1)
  61
  62 #define LPSS_PRV_REG_COUNT              9
  63
  64 /* LPSS Flags */
  65 #define LPSS_CLK                        BIT(0)
  66 #define LPSS_CLK_GATE                   BIT(1)
  67 #define LPSS_CLK_DIVIDER                BIT(2)
  68 #define LPSS_LTR                        BIT(3)
  69 #define LPSS_SAVE_CTX                   BIT(4)
  70 #define LPSS_NO_D3_DELAY                BIT(5)
  71
  72 struct lpss_private_data;
  73
  74 struct lpss_device_desc {
  75         unsigned int flags;
  76         const char *clk_con_id;
  77         unsigned int prv_offset;
  78         size_t prv_size_override;
  79         struct property_entry *properties;
  80         void (*setup)(struct lpss_private_data *pdata);
  81         bool resume_from_noirq;
  82 };
  83
  84 static const struct lpss_device_desc lpss_dma_desc = {
  85         .flags = LPSS_CLK,
  86 };
  87
  88 struct lpss_private_data {
  89         struct acpi_device *adev;
  90         void __iomem *mmio_base;
  91         resource_size_t mmio_size;
  92         unsigned int fixed_clk_rate;
  93         struct clk *clk;
  94         const struct lpss_device_desc *dev_desc;
  95         u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
  96 };
  97
  98 /* Devices which need to be in D3 before lpss_iosf_enter_d3_state() proceeds */
  99 static u32 pmc_atom_d3_mask = 0xfe000ffe;
 100
 101 /* LPSS run time quirks */
 102 static unsigned int lpss_quirks;
 103
 104 /*
 105  * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
 106  *
 107  * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
 108  * it can be powered off automatically whenever the last LPSS device goes down.
 109  * In case of no power any access to the DMA controller will hang the system.
 110  * The behaviour is reproduced on some HP laptops based on Intel BayTrail as
 111  * well as on ASuS T100TA transformer.
 112  *
 113  * This quirk overrides power state of entire LPSS island to keep DMA powered
 114  * on whenever we have at least one other device in use.
 115  */
 116 #define LPSS_QUIRK_ALWAYS_POWER_ON      BIT(0)
 117
 118 /* UART Component Parameter Register */
 119 #define LPSS_UART_CPR                   0xF4
 120 #define LPSS_UART_CPR_AFCE              BIT(4)
 121
 122 static void lpss_uart_setup(struct lpss_private_data *pdata)
 123 {
 124         unsigned int offset;
 125         u32 val;
 126
 127         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
 128         val = readl(pdata->mmio_base + offset);
 129         writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
 130
 131         val = readl(pdata->mmio_base + LPSS_UART_CPR);
 132         if (!(val & LPSS_UART_CPR_AFCE)) {
 133                 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
 134                 val = readl(pdata->mmio_base + offset);
 135                 val |= LPSS_GENERAL_UART_RTS_OVRD;
 136                 writel(val, pdata->mmio_base + offset);
 137         }
 138 }
 139
 140 static void lpss_deassert_reset(struct lpss_private_data *pdata)
 141 {
 142         unsigned int offset;
 143         u32 val;
 144
 145         offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
 146         val = readl(pdata->mmio_base + offset);
 147         val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
 148         writel(val, pdata->mmio_base + offset);
 149 }
 150
 151 /*
 152  * BYT PWM used for backlight control by the i915 driver on systems without
 153  * the Crystal Cove PMIC.
 154  */
 155 static struct pwm_lookup byt_pwm_lookup[] = {
 156         PWM_LOOKUP_WITH_MODULE("80860F09:00", 0, "0000:00:02.0",
 157                                "pwm_soc_backlight", 0, PWM_POLARITY_NORMAL,
 158                                "pwm-lpss-platform"),
 159 };
 160
 161 static void byt_pwm_setup(struct lpss_private_data *pdata)
 162 {
 163         struct acpi_device *adev = pdata->adev;
 164
 165         /* Only call pwm_add_table for the first PWM controller */
 166         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 167                 return;
 168
 169         pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup));
 170 }
 171
 172 #define LPSS_I2C_ENABLE                 0x6c
 173
 174 static void byt_i2c_setup(struct lpss_private_data *pdata)
 175 {
 176         const char *uid_str = acpi_device_uid(pdata->adev);
 177         acpi_handle handle = pdata->adev->handle;
 178         unsigned long long shared_host = 0;
 179         acpi_status status;
 180         long uid = 0;
 181
 182         /* Expected to always be true, but better safe then sorry */
 183         if (uid_str)
 184                 uid = simple_strtol(uid_str, NULL, 10);
 185
 186         /* Detect I2C bus shared with PUNIT and ignore its d3 status */
 187         status = acpi_evaluate_integer(handle, "_SEM", NULL, &shared_host);
 188         if (ACPI_SUCCESS(status) && shared_host && uid)
 189                 pmc_atom_d3_mask &= ~(BIT_LPSS2_F1_I2C1 << (uid - 1));
 190
 191         lpss_deassert_reset(pdata);
 192
 193         if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
 194                 pdata->fixed_clk_rate = 133000000;
 195
 196         writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
 197 }
 198
 199 /* BSW PWM used for backlight control by the i915 driver */
 200 static struct pwm_lookup bsw_pwm_lookup[] = {
 201         PWM_LOOKUP_WITH_MODULE("80862288:00", 0, "0000:00:02.0",
 202                                "pwm_soc_backlight", 0, PWM_POLARITY_NORMAL,
 203                                "pwm-lpss-platform"),
 204 };
 205
 206 static void bsw_pwm_setup(struct lpss_private_data *pdata)
 207 {
 208         struct acpi_device *adev = pdata->adev;
 209
 210         /* Only call pwm_add_table for the first PWM controller */
 211         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 212                 return;
 213
 214         pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup));
 215 }
 216
 217 static const struct lpss_device_desc lpt_dev_desc = {
 218         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR
 219                         | LPSS_SAVE_CTX,
 220         .prv_offset = 0x800,
 221 };
 222
 223 static const struct lpss_device_desc lpt_i2c_dev_desc = {
 224         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR | LPSS_SAVE_CTX,
 225         .prv_offset = 0x800,
 226 };
 227
 228 static struct property_entry uart_properties[] = {
 229         PROPERTY_ENTRY_U32("reg-io-width", 4),
 230         PROPERTY_ENTRY_U32("reg-shift", 2),
 231         PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
 232         { },
 233 };
 234
 235 static const struct lpss_device_desc lpt_uart_dev_desc = {
 236         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR
 237                         | LPSS_SAVE_CTX,
 238         .clk_con_id = "baudclk",
 239         .prv_offset = 0x800,
 240         .setup = lpss_uart_setup,
 241         .properties = uart_properties,
 242 };
 243
 244 static const struct lpss_device_desc lpt_sdio_dev_desc = {
 245         .flags = LPSS_LTR,
 246         .prv_offset = 0x1000,
 247         .prv_size_override = 0x1018,
 248 };
 249
 250 static const struct lpss_device_desc byt_pwm_dev_desc = {
 251         .flags = LPSS_SAVE_CTX,
 252         .prv_offset = 0x800,
 253         .setup = byt_pwm_setup,
 254 };
 255
 256 static const struct lpss_device_desc bsw_pwm_dev_desc = {
 257         .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 258         .prv_offset = 0x800,
 259         .setup = bsw_pwm_setup,
 260 };
 261
 262 static const struct lpss_device_desc byt_uart_dev_desc = {
 263         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 264         .clk_con_id = "baudclk",
 265         .prv_offset = 0x800,
 266         .setup = lpss_uart_setup,
 267         .properties = uart_properties,
 268 };
 269
 270 static const struct lpss_device_desc bsw_uart_dev_desc = {
 271         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 272                         | LPSS_NO_D3_DELAY,
 273         .clk_con_id = "baudclk",
 274         .prv_offset = 0x800,
 275         .setup = lpss_uart_setup,
 276         .properties = uart_properties,
 277 };
 278
 279 static const struct lpss_device_desc byt_spi_dev_desc = {
 280         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 281         .prv_offset = 0x400,
 282 };
 283
 284 static const struct lpss_device_desc byt_sdio_dev_desc = {
 285         .flags = LPSS_CLK,
 286 };
 287
 288 static const struct lpss_device_desc byt_i2c_dev_desc = {
 289         .flags = LPSS_CLK | LPSS_SAVE_CTX,
 290         .prv_offset = 0x800,
 291         .setup = byt_i2c_setup,
 292         .resume_from_noirq = true,
 293 };
 294
 295 static const struct lpss_device_desc bsw_i2c_dev_desc = {
 296         .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 297         .prv_offset = 0x800,
 298         .setup = byt_i2c_setup,
 299         .resume_from_noirq = true,
 300 };
 301
 302 static const struct lpss_device_desc bsw_spi_dev_desc = {
 303         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 304                         | LPSS_NO_D3_DELAY,
 305         .prv_offset = 0x400,
 306         .setup = lpss_deassert_reset,
 307 };
 308
 309 #define ICPU(model)     { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
 310
 311 static const struct x86_cpu_id lpss_cpu_ids[] = {
 312         ICPU(INTEL_FAM6_ATOM_SILVERMONT),       /* Valleyview, Bay Trail */
 313         ICPU(INTEL_FAM6_ATOM_AIRMONT),  /* Braswell, Cherry Trail */
 314         {}
 315 };
 316
 317 #else
 318
 319 #define LPSS_ADDR(desc) (0UL)
 320
 321 #endif /* CONFIG_X86_INTEL_LPSS */
 322
 323 static const struct acpi_device_id acpi_lpss_device_ids[] = {
 324         /* Generic LPSS devices */
 325         { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
 326
 327         /* Lynxpoint LPSS devices */
 328         { "INT33C0", LPSS_ADDR(lpt_dev_desc) },
 329         { "INT33C1", LPSS_ADDR(lpt_dev_desc) },
 330         { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
 331         { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
 332         { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
 333         { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
 334         { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
 335         { "INT33C7", },
 336
 337         /* BayTrail LPSS devices */
 338         { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
 339         { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
 340         { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
 341         { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
 342         { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
 343         { "INT33B2", },
 344         { "INT33FC", },
 345
 346         /* Braswell LPSS devices */
 347         { "80862286", LPSS_ADDR(lpss_dma_desc) },
 348         { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) },
 349         { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) },
 350         { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
 351         { "808622C0", LPSS_ADDR(lpss_dma_desc) },
 352         { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) },
 353
 354         /* Broadwell LPSS devices */
 355         { "INT3430", LPSS_ADDR(lpt_dev_desc) },
 356         { "INT3431", LPSS_ADDR(lpt_dev_desc) },
 357         { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
 358         { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
 359         { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
 360         { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
 361         { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
 362         { "INT3437", },
 363
 364         /* Wildcat Point LPSS devices */
 365         { "INT3438", LPSS_ADDR(lpt_dev_desc) },
 366
 367         { }
 368 };
 369
 370 #ifdef CONFIG_X86_INTEL_LPSS
 371
 372 static int is_memory(struct acpi_resource *res, void *not_used)
 373 {
 374         struct resource r;
 375         return !acpi_dev_resource_memory(res, &r);
 376 }
 377
 378 /* LPSS main clock device. */
 379 static struct platform_device *lpss_clk_dev;
 380
 381 static inline void lpt_register_clock_device(void)
 382 {
 383         lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
 384 }
 385
 386 static int register_device_clock(struct acpi_device *adev,
 387                                  struct lpss_private_data *pdata)
 388 {
 389         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
 390         const char *devname = dev_name(&adev->dev);
 391         struct clk *clk;
 392         struct lpss_clk_data *clk_data;
 393         const char *parent, *clk_name;
 394         void __iomem *prv_base;
 395
 396         if (!lpss_clk_dev)
 397                 lpt_register_clock_device();
 398
 399         clk_data = platform_get_drvdata(lpss_clk_dev);
 400         if (!clk_data)
 401                 return -ENODEV;
 402         clk = clk_data->clk;
 403
 404         if (!pdata->mmio_base
 405             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
 406                 return -ENODATA;
 407
 408         parent = clk_data->name;
 409         prv_base = pdata->mmio_base + dev_desc->prv_offset;
 410
 411         if (pdata->fixed_clk_rate) {
 412                 clk = clk_register_fixed_rate(NULL, devname, parent, 0,
 413                                               pdata->fixed_clk_rate);
 414                 goto out;
 415         }
 416
 417         if (dev_desc->flags & LPSS_CLK_GATE) {
 418                 clk = clk_register_gate(NULL, devname, parent, 0,
 419                                         prv_base, 0, 0, NULL);
 420                 parent = devname;
 421         }
 422
 423         if (dev_desc->flags & LPSS_CLK_DIVIDER) {
 424                 /* Prevent division by zero */
 425                 if (!readl(prv_base))
 426                         writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
 427
 428                 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
 429                 if (!clk_name)
 430                         return -ENOMEM;
 431                 clk = clk_register_fractional_divider(NULL, clk_name, parent,
 432                                                       0, prv_base,
 433                                                       1, 15, 16, 15, 0, NULL);
 434                 parent = clk_name;
 435
 436                 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
 437                 if (!clk_name) {
 438                         kfree(parent);
 439                         return -ENOMEM;
 440                 }
 441                 clk = clk_register_gate(NULL, clk_name, parent,
 442                                         CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
 443                                         prv_base, 31, 0, NULL);
 444                 kfree(parent);
 445                 kfree(clk_name);
 446         }
 447 out:
 448         if (IS_ERR(clk))
 449                 return PTR_ERR(clk);
 450
 451         pdata->clk = clk;
 452         clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
 453         return 0;
 454 }
 455
 456 struct lpss_device_links {
 457         const char *supplier_hid;
 458         const char *supplier_uid;
 459         const char *consumer_hid;
 460         const char *consumer_uid;
 461         u32 flags;
 462         const struct dmi_system_id *dep_missing_ids;
 463 };
 464
 465 /* Please keep this list sorted alphabetically by vendor and model */
 466 static const struct dmi_system_id i2c1_dep_missing_dmi_ids[] = {
 467         {
 468                 .matches = {
 469                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
 470                         DMI_MATCH(DMI_PRODUCT_NAME, "T200TA"),
 471                 },
 472         },
 473         {}
 474 };
 475
 476 /*
 477  * The _DEP method is used to identify dependencies but instead of creating
 478  * device links for every handle in _DEP, only links in the following list are
 479  * created. That is necessary because, in the general case, _DEP can refer to
 480  * devices that might not have drivers, or that are on different buses, or where
 481  * the supplier is not enumerated until after the consumer is probed.
 482  */
 483 static const struct lpss_device_links lpss_device_links[] = {
 484         /* CHT External sdcard slot controller depends on PMIC I2C ctrl */
 485         {"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME},
 486         /* CHT iGPU depends on PMIC I2C controller */
 487         {"808622C1", "7", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
 488         /* BYT iGPU depends on the Embedded Controller I2C controller (UID 1) */
 489         {"80860F41", "1", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME,
 490          i2c1_dep_missing_dmi_ids},
 491         /* BYT CR iGPU depends on PMIC I2C controller (UID 5 on CR) */
 492         {"80860F41", "5", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
 493         /* BYT iGPU depends on PMIC I2C controller (UID 7 on non CR) */
 494         {"80860F41", "7", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
 495 };
 496
 497 static bool acpi_lpss_is_supplier(struct acpi_device *adev,
 498                                   const struct lpss_device_links *link)
 499 {
 500         return acpi_dev_hid_uid_match(adev, link->supplier_hid, link->supplier_uid);
 501 }
 502
 503 static bool acpi_lpss_is_consumer(struct acpi_device *adev,
 504                                   const struct lpss_device_links *link)
 505 {
 506         return acpi_dev_hid_uid_match(adev, link->consumer_hid, link->consumer_uid);
 507 }
 508
 509 struct hid_uid {
 510         const char *hid;
 511         const char *uid;
 512 };
 513
 514 static int match_hid_uid(struct device *dev, const void *data)
 515 {
 516         struct acpi_device *adev = ACPI_COMPANION(dev);
 517         const struct hid_uid *id = data;
 518
 519         if (!adev)
 520                 return 0;
 521
 522         return acpi_dev_hid_uid_match(adev, id->hid, id->uid);
 523 }
 524
 525 static struct device *acpi_lpss_find_device(const char *hid, const char *uid)
 526 {
 527         struct device *dev;
 528
 529         struct hid_uid data = {
 530                 .hid = hid,
 531                 .uid = uid,
 532         };
 533
 534         dev = bus_find_device(&platform_bus_type, NULL, &data, match_hid_uid);
 535         if (dev)
 536                 return dev;
 537
 538         return bus_find_device(&pci_bus_type, NULL, &data, match_hid_uid);
 539 }
 540
 541 static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle)
 542 {
 543         struct acpi_handle_list dep_devices;
 544         acpi_status status;
 545         int i;
 546
 547         if (!acpi_has_method(adev->handle, "_DEP"))
 548                 return false;
 549
 550         status = acpi_evaluate_reference(adev->handle, "_DEP", NULL,
 551                                          &dep_devices);
 552         if (ACPI_FAILURE(status)) {
 553                 dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n");
 554                 return false;
 555         }
 556
 557         for (i = 0; i < dep_devices.count; i++) {
 558                 if (dep_devices.handles[i] == handle)
 559                         return true;
 560         }
 561
 562         return false;
 563 }
 564
 565 static void acpi_lpss_link_consumer(struct device *dev1,
 566                                     const struct lpss_device_links *link)
 567 {
 568         struct device *dev2;
 569
 570         dev2 = acpi_lpss_find_device(link->consumer_hid, link->consumer_uid);
 571         if (!dev2)
 572                 return;
 573
 574         if ((link->dep_missing_ids && dmi_check_system(link->dep_missing_ids))
 575             || acpi_lpss_dep(ACPI_COMPANION(dev2), ACPI_HANDLE(dev1)))
 576                 device_link_add(dev2, dev1, link->flags);
 577
 578         put_device(dev2);
 579 }
 580
 581 static void acpi_lpss_link_supplier(struct device *dev1,
 582                                     const struct lpss_device_links *link)
 583 {
 584         struct device *dev2;
 585
 586         dev2 = acpi_lpss_find_device(link->supplier_hid, link->supplier_uid);
 587         if (!dev2)
 588                 return;
 589
 590         if ((link->dep_missing_ids && dmi_check_system(link->dep_missing_ids))
 591             || acpi_lpss_dep(ACPI_COMPANION(dev1), ACPI_HANDLE(dev2)))
 592                 device_link_add(dev1, dev2, link->flags);
 593
 594         put_device(dev2);
 595 }
 596
 597 static void acpi_lpss_create_device_links(struct acpi_device *adev,
 598                                           struct platform_device *pdev)
 599 {
 600         int i;
 601
 602         for (i = 0; i < ARRAY_SIZE(lpss_device_links); i++) {
 603                 const struct lpss_device_links *link = &lpss_device_links[i];
 604
 605                 if (acpi_lpss_is_supplier(adev, link))
 606                         acpi_lpss_link_consumer(&pdev->dev, link);
 607
 608                 if (acpi_lpss_is_consumer(adev, link))
 609                         acpi_lpss_link_supplier(&pdev->dev, link);
 610         }
 611 }
 612
 613 static int acpi_lpss_create_device(struct acpi_device *adev,
 614                                    const struct acpi_device_id *id)
 615 {
 616         const struct lpss_device_desc *dev_desc;
 617         struct lpss_private_data *pdata;
 618         struct resource_entry *rentry;
 619         struct list_head resource_list;
 620         struct platform_device *pdev;
 621         int ret;
 622
 623         dev_desc = (const struct lpss_device_desc *)id->driver_data;
 624         if (!dev_desc) {
 625                 pdev = acpi_create_platform_device(adev, NULL);
 626                 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
 627         }
 628         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 629         if (!pdata)
 630                 return -ENOMEM;
 631
 632         INIT_LIST_HEAD(&resource_list);
 633         ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
 634         if (ret < 0)
 635                 goto err_out;
 636
 637         list_for_each_entry(rentry, &resource_list, node)
 638                 if (resource_type(rentry->res) == IORESOURCE_MEM) {
 639                         if (dev_desc->prv_size_override)
 640                                 pdata->mmio_size = dev_desc->prv_size_override;
 641                         else
 642                                 pdata->mmio_size = resource_size(rentry->res);
 643                         pdata->mmio_base = ioremap(rentry->res->start,
 644                                                    pdata->mmio_size);
 645                         break;
 646                 }
 647
 648         acpi_dev_free_resource_list(&resource_list);
 649
 650         if (!pdata->mmio_base) {
 651                 /* Avoid acpi_bus_attach() instantiating a pdev for this dev. */
 652                 adev->pnp.type.platform_id = 0;
 653                 /* Skip the device, but continue the namespace scan. */
 654                 ret = 0;
 655                 goto err_out;
 656         }
 657
 658         pdata->adev = adev;
 659         pdata->dev_desc = dev_desc;
 660
 661         if (dev_desc->setup)
 662                 dev_desc->setup(pdata);
 663
 664         if (dev_desc->flags & LPSS_CLK) {
 665                 ret = register_device_clock(adev, pdata);
 666                 if (ret) {
 667                         /* Skip the device, but continue the namespace scan. */
 668                         ret = 0;
 669                         goto err_out;
 670                 }
 671         }
 672
 673         /*
 674          * This works around a known issue in ACPI tables where LPSS devices
 675          * have _PS0 and _PS3 without _PSC (and no power resources), so
 676          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
 677          */
 678         acpi_device_fix_up_power(adev);
 679
 680         adev->driver_data = pdata;
 681         pdev = acpi_create_platform_device(adev, dev_desc->properties);
 682         if (!IS_ERR_OR_NULL(pdev)) {
 683                 acpi_lpss_create_device_links(adev, pdev);
 684                 return 1;
 685         }
 686
 687         ret = PTR_ERR(pdev);
 688         adev->driver_data = NULL;
 689
 690  err_out:
 691         kfree(pdata);
 692         return ret;
 693 }
 694
 695 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
 696 {
 697         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 698 }
 699
 700 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
 701                              unsigned int reg)
 702 {
 703         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 704 }
 705
 706 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
 707 {
 708         struct acpi_device *adev;
 709         struct lpss_private_data *pdata;
 710         unsigned long flags;
 711         int ret;
 712
 713         ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
 714         if (WARN_ON(ret))
 715                 return ret;
 716
 717         spin_lock_irqsave(&dev->power.lock, flags);
 718         if (pm_runtime_suspended(dev)) {
 719                 ret = -EAGAIN;
 720                 goto out;
 721         }
 722         pdata = acpi_driver_data(adev);
 723         if (WARN_ON(!pdata || !pdata->mmio_base)) {
 724                 ret = -ENODEV;
 725                 goto out;
 726         }
 727         *val = __lpss_reg_read(pdata, reg);
 728
 729  out:
 730         spin_unlock_irqrestore(&dev->power.lock, flags);
 731         return ret;
 732 }
 733
 734 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
 735                              char *buf)
 736 {
 737         u32 ltr_value = 0;
 738         unsigned int reg;
 739         int ret;
 740
 741         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
 742         ret = lpss_reg_read(dev, reg, &ltr_value);
 743         if (ret)
 744                 return ret;
 745
 746         return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
 747 }
 748
 749 static ssize_t lpss_ltr_mode_show(struct device *dev,
 750                                   struct device_attribute *attr, char *buf)
 751 {
 752         u32 ltr_mode = 0;
 753         char *outstr;
 754         int ret;
 755
 756         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
 757         if (ret)
 758                 return ret;
 759
 760         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
 761         return sprintf(buf, "%s\n", outstr);
 762 }
 763
 764 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
 765 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
 766 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
 767
 768 static struct attribute *lpss_attrs[] = {
 769         &dev_attr_auto_ltr.attr,
 770         &dev_attr_sw_ltr.attr,
 771         &dev_attr_ltr_mode.attr,
 772         NULL,
 773 };
 774
 775 static const struct attribute_group lpss_attr_group = {
 776         .attrs = lpss_attrs,
 777         .name = "lpss_ltr",
 778 };
 779
 780 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
 781 {
 782         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 783         u32 ltr_mode, ltr_val;
 784
 785         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
 786         if (val < 0) {
 787                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
 788                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
 789                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 790                 }
 791                 return;
 792         }
 793         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
 794         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
 795                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
 796                 val = LPSS_LTR_MAX_VAL;
 797         } else if (val > LPSS_LTR_MAX_VAL) {
 798                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
 799                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
 800         } else {
 801                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
 802         }
 803         ltr_val |= val;
 804         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
 805         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
 806                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
 807                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 808         }
 809 }
 810
 811 #ifdef CONFIG_PM
 812 /**
 813  * acpi_lpss_save_ctx() - Save the private registers of LPSS device
 814  * @dev: LPSS device
 815  * @pdata: pointer to the private data of the LPSS device
 816  *
 817  * Most LPSS devices have private registers which may loose their context when
 818  * the device is powered down. acpi_lpss_save_ctx() saves those registers into
 819  * prv_reg_ctx array.
 820  */
 821 static void acpi_lpss_save_ctx(struct device *dev,
 822                                struct lpss_private_data *pdata)
 823 {
 824         unsigned int i;
 825
 826         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 827                 unsigned long offset = i * sizeof(u32);
 828
 829                 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
 830                 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
 831                         pdata->prv_reg_ctx[i], offset);
 832         }
 833 }
 834
 835 /**
 836  * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
 837  * @dev: LPSS device
 838  * @pdata: pointer to the private data of the LPSS device
 839  *
 840  * Restores the registers that were previously stored with acpi_lpss_save_ctx().
 841  */
 842 static void acpi_lpss_restore_ctx(struct device *dev,
 843                                   struct lpss_private_data *pdata)
 844 {
 845         unsigned int i;
 846
 847         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 848                 unsigned long offset = i * sizeof(u32);
 849
 850                 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
 851                 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
 852                         pdata->prv_reg_ctx[i], offset);
 853         }
 854 }
 855
 856 static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
 857 {
 858         /*
 859          * The following delay is needed or the subsequent write operations may
 860          * fail. The LPSS devices are actually PCI devices and the PCI spec
 861          * expects 10ms delay before the device can be accessed after D3 to D0
 862          * transition. However some platforms like BSW does not need this delay.
 863          */
 864         unsigned int delay = 10;        /* default 10ms delay */
 865
 866         if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY)
 867                 delay = 0;
 868
 869         msleep(delay);
 870 }
 871
 872 static int acpi_lpss_activate(struct device *dev)
 873 {
 874         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 875         int ret;
 876
 877         ret = acpi_dev_resume(dev);
 878         if (ret)
 879                 return ret;
 880
 881         acpi_lpss_d3_to_d0_delay(pdata);
 882
 883         /*
 884          * This is called only on ->probe() stage where a device is either in
 885          * known state defined by BIOS or most likely powered off. Due to this
 886          * we have to deassert reset line to be sure that ->probe() will
 887          * recognize the device.
 888          */
 889         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 890                 lpss_deassert_reset(pdata);
 891
 892         return 0;
 893 }
 894
 895 static void acpi_lpss_dismiss(struct device *dev)
 896 {
 897         acpi_dev_suspend(dev, false);
 898 }
 899
 900 /* IOSF SB for LPSS island */
 901 #define LPSS_IOSF_UNIT_LPIOEP           0xA0
 902 #define LPSS_IOSF_UNIT_LPIO1            0xAB
 903 #define LPSS_IOSF_UNIT_LPIO2            0xAC
 904
 905 #define LPSS_IOSF_PMCSR                 0x84
 906 #define LPSS_PMCSR_D0                   0
 907 #define LPSS_PMCSR_D3hot                3
 908 #define LPSS_PMCSR_Dx_MASK              GENMASK(1, 0)
 909
 910 #define LPSS_IOSF_GPIODEF0              0x154
 911 #define LPSS_GPIODEF0_DMA1_D3           BIT(2)
 912 #define LPSS_GPIODEF0_DMA2_D3           BIT(3)
 913 #define LPSS_GPIODEF0_DMA_D3_MASK       GENMASK(3, 2)
 914 #define LPSS_GPIODEF0_DMA_LLP           BIT(13)
 915
 916 static DEFINE_MUTEX(lpss_iosf_mutex);
 917 static bool lpss_iosf_d3_entered = true;
 918
 919 static void lpss_iosf_enter_d3_state(void)
 920 {
 921         u32 value1 = 0;
 922         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 923         u32 value2 = LPSS_PMCSR_D3hot;
 924         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 925         /*
 926          * PMC provides an information about actual status of the LPSS devices.
 927          * Here we read the values related to LPSS power island, i.e. LPSS
 928          * devices, excluding both LPSS DMA controllers, along with SCC domain.
 929          */
 930         u32 func_dis, d3_sts_0, pmc_status;
 931         int ret;
 932
 933         ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
 934         if (ret)
 935                 return;
 936
 937         mutex_lock(&lpss_iosf_mutex);
 938
 939         ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
 940         if (ret)
 941                 goto exit;
 942
 943         /*
 944          * Get the status of entire LPSS power island per device basis.
 945          * Shutdown both LPSS DMA controllers if and only if all other devices
 946          * are already in D3hot.
 947          */
 948         pmc_status = (~(d3_sts_0 | func_dis)) & pmc_atom_d3_mask;
 949         if (pmc_status)
 950                 goto exit;
 951
 952         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 953                         LPSS_IOSF_PMCSR, value2, mask2);
 954
 955         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 956                         LPSS_IOSF_PMCSR, value2, mask2);
 957
 958         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 959                         LPSS_IOSF_GPIODEF0, value1, mask1);
 960
 961         lpss_iosf_d3_entered = true;
 962
 963 exit:
 964         mutex_unlock(&lpss_iosf_mutex);
 965 }
 966
 967 static void lpss_iosf_exit_d3_state(void)
 968 {
 969         u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 |
 970                      LPSS_GPIODEF0_DMA_LLP;
 971         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 972         u32 value2 = LPSS_PMCSR_D0;
 973         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 974
 975         mutex_lock(&lpss_iosf_mutex);
 976
 977         if (!lpss_iosf_d3_entered)
 978                 goto exit;
 979
 980         lpss_iosf_d3_entered = false;
 981
 982         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 983                         LPSS_IOSF_GPIODEF0, value1, mask1);
 984
 985         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 986                         LPSS_IOSF_PMCSR, value2, mask2);
 987
 988         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 989                         LPSS_IOSF_PMCSR, value2, mask2);
 990
 991 exit:
 992         mutex_unlock(&lpss_iosf_mutex);
 993 }
 994
 995 static int acpi_lpss_suspend(struct device *dev, bool wakeup)
 996 {
 997         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 998         int ret;
 999
1000         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1001                 acpi_lpss_save_ctx(dev, pdata);
1002
1003         ret = acpi_dev_suspend(dev, wakeup);
1004
1005         /*
1006          * This call must be last in the sequence, otherwise PMC will return
1007          * wrong status for devices being about to be powered off. See
1008          * lpss_iosf_enter_d3_state() for further information.
1009          */
1010         if (acpi_target_system_state() == ACPI_STATE_S0 &&
1011             lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1012                 lpss_iosf_enter_d3_state();
1013
1014         return ret;
1015 }
1016
1017 static int acpi_lpss_resume(struct device *dev)
1018 {
1019         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1020         int ret;
1021
1022         /*
1023          * This call is kept first to be in symmetry with
1024          * acpi_lpss_runtime_suspend() one.
1025          */
1026         if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1027                 lpss_iosf_exit_d3_state();
1028
1029         ret = acpi_dev_resume(dev);
1030         if (ret)
1031                 return ret;
1032
1033         acpi_lpss_d3_to_d0_delay(pdata);
1034
1035         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1036                 acpi_lpss_restore_ctx(dev, pdata);
1037
1038         return 0;
1039 }
1040
1041 #ifdef CONFIG_PM_SLEEP
1042 static int acpi_lpss_do_suspend_late(struct device *dev)
1043 {
1044         int ret;
1045
1046         if (dev_pm_smart_suspend_and_suspended(dev))
1047                 return 0;
1048
1049         ret = pm_generic_suspend_late(dev);
1050         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1051 }
1052
1053 static int acpi_lpss_suspend_late(struct device *dev)
1054 {
1055         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1056
1057         if (pdata->dev_desc->resume_from_noirq)
1058                 return 0;
1059
1060         return acpi_lpss_do_suspend_late(dev);
1061 }
1062
1063 static int acpi_lpss_suspend_noirq(struct device *dev)
1064 {
1065         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1066         int ret;
1067
1068         if (pdata->dev_desc->resume_from_noirq) {
1069                 /*
1070                  * The driver's ->suspend_late callback will be invoked by
1071                  * acpi_lpss_do_suspend_late(), with the assumption that the
1072                  * driver really wanted to run that code in ->suspend_noirq, but
1073                  * it could not run after acpi_dev_suspend() and the driver
1074                  * expected the latter to be called in the "late" phase.
1075                  */
1076                 ret = acpi_lpss_do_suspend_late(dev);
1077                 if (ret)
1078                         return ret;
1079         }
1080
1081         return acpi_subsys_suspend_noirq(dev);
1082 }
1083
1084 static int acpi_lpss_do_resume_early(struct device *dev)
1085 {
1086         int ret = acpi_lpss_resume(dev);
1087
1088         return ret ? ret : pm_generic_resume_early(dev);
1089 }
1090
1091 static int acpi_lpss_resume_early(struct device *dev)
1092 {
1093         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1094
1095         if (pdata->dev_desc->resume_from_noirq)
1096                 return 0;
1097
1098         return acpi_lpss_do_resume_early(dev);
1099 }
1100
1101 static int acpi_lpss_resume_noirq(struct device *dev)
1102 {
1103         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1104         int ret;
1105
1106         /* Follow acpi_subsys_resume_noirq(). */
1107         if (dev_pm_may_skip_resume(dev))
1108                 return 0;
1109
1110         if (dev_pm_smart_suspend_and_suspended(dev))
1111                 pm_runtime_set_active(dev);
1112
1113         ret = pm_generic_resume_noirq(dev);
1114         if (ret)
1115                 return ret;
1116
1117         if (!pdata->dev_desc->resume_from_noirq)
1118                 return 0;
1119
1120         /*
1121          * The driver's ->resume_early callback will be invoked by
1122          * acpi_lpss_do_resume_early(), with the assumption that the driver
1123          * really wanted to run that code in ->resume_noirq, but it could not
1124          * run before acpi_dev_resume() and the driver expected the latter to be
1125          * called in the "early" phase.
1126          */
1127         return acpi_lpss_do_resume_early(dev);
1128 }
1129
1130 static int acpi_lpss_do_restore_early(struct device *dev)
1131 {
1132         int ret = acpi_lpss_resume(dev);
1133
1134         return ret ? ret : pm_generic_restore_early(dev);
1135 }
1136
1137 static int acpi_lpss_restore_early(struct device *dev)
1138 {
1139         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1140
1141         if (pdata->dev_desc->resume_from_noirq)
1142                 return 0;
1143
1144         return acpi_lpss_do_restore_early(dev);
1145 }
1146
1147 static int acpi_lpss_restore_noirq(struct device *dev)
1148 {
1149         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1150         int ret;
1151
1152         ret = pm_generic_restore_noirq(dev);
1153         if (ret)
1154                 return ret;
1155
1156         if (!pdata->dev_desc->resume_from_noirq)
1157                 return 0;
1158
1159         /* This is analogous to what happens in acpi_lpss_resume_noirq(). */
1160         return acpi_lpss_do_restore_early(dev);
1161 }
1162
1163 static int acpi_lpss_do_poweroff_late(struct device *dev)
1164 {
1165         int ret = pm_generic_poweroff_late(dev);
1166
1167         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1168 }
1169
1170 static int acpi_lpss_poweroff_late(struct device *dev)
1171 {
1172         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1173
1174         if (dev_pm_smart_suspend_and_suspended(dev))
1175                 return 0;
1176
1177         if (pdata->dev_desc->resume_from_noirq)
1178                 return 0;
1179
1180         return acpi_lpss_do_poweroff_late(dev);
1181 }
1182
1183 static int acpi_lpss_poweroff_noirq(struct device *dev)
1184 {
1185         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1186
1187         if (dev_pm_smart_suspend_and_suspended(dev))
1188                 return 0;
1189
1190         if (pdata->dev_desc->resume_from_noirq) {
1191                 /* This is analogous to the acpi_lpss_suspend_noirq() case. */
1192                 int ret = acpi_lpss_do_poweroff_late(dev);
1193                 if (ret)
1194                         return ret;
1195         }
1196
1197         return pm_generic_poweroff_noirq(dev);
1198 }
1199 #endif /* CONFIG_PM_SLEEP */
1200
1201 static int acpi_lpss_runtime_suspend(struct device *dev)
1202 {
1203         int ret = pm_generic_runtime_suspend(dev);
1204
1205         return ret ? ret : acpi_lpss_suspend(dev, true);
1206 }
1207
1208 static int acpi_lpss_runtime_resume(struct device *dev)
1209 {
1210         int ret = acpi_lpss_resume(dev);
1211
1212         return ret ? ret : pm_generic_runtime_resume(dev);
1213 }
1214 #endif /* CONFIG_PM */
1215
1216 static struct dev_pm_domain acpi_lpss_pm_domain = {
1217 #ifdef CONFIG_PM
1218         .activate = acpi_lpss_activate,
1219         .dismiss = acpi_lpss_dismiss,
1220 #endif
1221         .ops = {
1222 #ifdef CONFIG_PM
1223 #ifdef CONFIG_PM_SLEEP
1224                 .prepare = acpi_subsys_prepare,
1225                 .complete = acpi_subsys_complete,
1226                 .suspend = acpi_subsys_suspend,
1227                 .suspend_late = acpi_lpss_suspend_late,
1228                 .suspend_noirq = acpi_lpss_suspend_noirq,
1229                 .resume_noirq = acpi_lpss_resume_noirq,
1230                 .resume_early = acpi_lpss_resume_early,
1231                 .freeze = acpi_subsys_freeze,
1232                 .poweroff = acpi_subsys_poweroff,
1233                 .poweroff_late = acpi_lpss_poweroff_late,
1234                 .poweroff_noirq = acpi_lpss_poweroff_noirq,
1235                 .restore_noirq = acpi_lpss_restore_noirq,
1236                 .restore_early = acpi_lpss_restore_early,
1237 #endif
1238                 .runtime_suspend = acpi_lpss_runtime_suspend,
1239                 .runtime_resume = acpi_lpss_runtime_resume,
1240 #endif
1241         },
1242 };
1243
1244 static int acpi_lpss_platform_notify(struct notifier_block *nb,
1245                                      unsigned long action, void *data)
1246 {
1247         struct platform_device *pdev = to_platform_device(data);
1248         struct lpss_private_data *pdata;
1249         struct acpi_device *adev;
1250         const struct acpi_device_id *id;
1251
1252         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
1253         if (!id || !id->driver_data)
1254                 return 0;
1255
1256         if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
1257                 return 0;
1258
1259         pdata = acpi_driver_data(adev);
1260         if (!pdata)
1261                 return 0;
1262
1263         if (pdata->mmio_base &&
1264             pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
1265                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
1266                 return 0;
1267         }
1268
1269         switch (action) {
1270         case BUS_NOTIFY_BIND_DRIVER:
1271                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1272                 break;
1273         case BUS_NOTIFY_DRIVER_NOT_BOUND:
1274         case BUS_NOTIFY_UNBOUND_DRIVER:
1275                 dev_pm_domain_set(&pdev->dev, NULL);
1276                 break;
1277         case BUS_NOTIFY_ADD_DEVICE:
1278                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1279                 if (pdata->dev_desc->flags & LPSS_LTR)
1280                         return sysfs_create_group(&pdev->dev.kobj,
1281                                                   &lpss_attr_group);
1282                 break;
1283         case BUS_NOTIFY_DEL_DEVICE:
1284                 if (pdata->dev_desc->flags & LPSS_LTR)
1285                         sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
1286                 dev_pm_domain_set(&pdev->dev, NULL);
1287                 break;
1288         default:
1289                 break;
1290         }
1291
1292         return 0;
1293 }
1294
1295 static struct notifier_block acpi_lpss_nb = {
1296         .notifier_call = acpi_lpss_platform_notify,
1297 };
1298
1299 static void acpi_lpss_bind(struct device *dev)
1300 {
1301         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1302
1303         if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
1304                 return;
1305
1306         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
1307                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
1308         else
1309                 dev_err(dev, "MMIO size insufficient to access LTR\n");
1310 }
1311
1312 static void acpi_lpss_unbind(struct device *dev)
1313 {
1314         dev->power.set_latency_tolerance = NULL;
1315 }
1316
1317 static struct acpi_scan_handler lpss_handler = {
1318         .ids = acpi_lpss_device_ids,
1319         .attach = acpi_lpss_create_device,
1320         .bind = acpi_lpss_bind,
1321         .unbind = acpi_lpss_unbind,
1322 };
1323
1324 void __init acpi_lpss_init(void)
1325 {
1326         const struct x86_cpu_id *id;
1327         int ret;
1328
1329         ret = lpt_clk_init();
1330         if (ret)
1331                 return;
1332
1333         id = x86_match_cpu(lpss_cpu_ids);
1334         if (id)
1335                 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
1336
1337         bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
1338         acpi_scan_add_handler(&lpss_handler);
1339 }
1340
1341 #else
1342
1343 static struct acpi_scan_handler lpss_handler = {
1344         .ids = acpi_lpss_device_ids,
1345 };
1346
1347 void __init acpi_lpss_init(void)
1348 {
1349         acpi_scan_add_handler(&lpss_handler);
1350 }
1351
1352 #endif /* CONFIG_X86_INTEL_LPSS */