1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016, Semihalf
4 * Author: Tomasz Nowicki <tn@semihalf.com>
6 * This file implements early detection/parsing of I/O mapping
7 * reported to OS through firmware via I/O Remapping Table (IORT)
8 * IORT document number: ARM DEN 0049A
11 #define pr_fmt(fmt) "ACPI: IORT: " fmt
13 #include <linux/acpi_iort.h>
14 #include <linux/bitfield.h>
15 #include <linux/iommu.h>
16 #include <linux/kernel.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/platform_device.h>
20 #include <linux/slab.h>
22 #define IORT_TYPE_MASK(type) (1 << (type))
23 #define IORT_MSI_TYPE (1 << ACPI_IORT_NODE_ITS_GROUP)
24 #define IORT_IOMMU_TYPE ((1 << ACPI_IORT_NODE_SMMU) | \
25 (1 << ACPI_IORT_NODE_SMMU_V3))
27 struct iort_its_msi_chip {
28 struct list_head list;
29 struct fwnode_handle *fw_node;
30 phys_addr_t base_addr;
35 struct list_head list;
36 struct acpi_iort_node *iort_node;
37 struct fwnode_handle *fwnode;
39 static LIST_HEAD(iort_fwnode_list);
40 static DEFINE_SPINLOCK(iort_fwnode_lock);
43 * iort_set_fwnode() - Create iort_fwnode and use it to register
44 * iommu data in the iort_fwnode_list
46 * @node: IORT table node associated with the IOMMU
47 * @fwnode: fwnode associated with the IORT node
49 * Returns: 0 on success
52 static inline int iort_set_fwnode(struct acpi_iort_node *iort_node,
53 struct fwnode_handle *fwnode)
55 struct iort_fwnode *np;
57 np = kzalloc(sizeof(struct iort_fwnode), GFP_ATOMIC);
62 INIT_LIST_HEAD(&np->list);
63 np->iort_node = iort_node;
66 spin_lock(&iort_fwnode_lock);
67 list_add_tail(&np->list, &iort_fwnode_list);
68 spin_unlock(&iort_fwnode_lock);
74 * iort_get_fwnode() - Retrieve fwnode associated with an IORT node
76 * @node: IORT table node to be looked-up
78 * Returns: fwnode_handle pointer on success, NULL on failure
80 static inline struct fwnode_handle *iort_get_fwnode(
81 struct acpi_iort_node *node)
83 struct iort_fwnode *curr;
84 struct fwnode_handle *fwnode = NULL;
86 spin_lock(&iort_fwnode_lock);
87 list_for_each_entry(curr, &iort_fwnode_list, list) {
88 if (curr->iort_node == node) {
89 fwnode = curr->fwnode;
93 spin_unlock(&iort_fwnode_lock);
99 * iort_delete_fwnode() - Delete fwnode associated with an IORT node
101 * @node: IORT table node associated with fwnode to delete
103 static inline void iort_delete_fwnode(struct acpi_iort_node *node)
105 struct iort_fwnode *curr, *tmp;
107 spin_lock(&iort_fwnode_lock);
108 list_for_each_entry_safe(curr, tmp, &iort_fwnode_list, list) {
109 if (curr->iort_node == node) {
110 list_del(&curr->list);
115 spin_unlock(&iort_fwnode_lock);
119 * iort_get_iort_node() - Retrieve iort_node associated with an fwnode
121 * @fwnode: fwnode associated with device to be looked-up
123 * Returns: iort_node pointer on success, NULL on failure
125 static inline struct acpi_iort_node *iort_get_iort_node(
126 struct fwnode_handle *fwnode)
128 struct iort_fwnode *curr;
129 struct acpi_iort_node *iort_node = NULL;
131 spin_lock(&iort_fwnode_lock);
132 list_for_each_entry(curr, &iort_fwnode_list, list) {
133 if (curr->fwnode == fwnode) {
134 iort_node = curr->iort_node;
138 spin_unlock(&iort_fwnode_lock);
143 typedef acpi_status (*iort_find_node_callback)
144 (struct acpi_iort_node *node, void *context);
146 /* Root pointer to the mapped IORT table */
147 static struct acpi_table_header *iort_table;
149 static LIST_HEAD(iort_msi_chip_list);
150 static DEFINE_SPINLOCK(iort_msi_chip_lock);
153 * iort_register_domain_token() - register domain token along with related
154 * ITS ID and base address to the list from where we can get it back later on.
156 * @base: ITS base address.
157 * @fw_node: Domain token.
159 * Returns: 0 on success, -ENOMEM if no memory when allocating list element
161 int iort_register_domain_token(int trans_id, phys_addr_t base,
162 struct fwnode_handle *fw_node)
164 struct iort_its_msi_chip *its_msi_chip;
166 its_msi_chip = kzalloc(sizeof(*its_msi_chip), GFP_KERNEL);
170 its_msi_chip->fw_node = fw_node;
171 its_msi_chip->translation_id = trans_id;
172 its_msi_chip->base_addr = base;
174 spin_lock(&iort_msi_chip_lock);
175 list_add(&its_msi_chip->list, &iort_msi_chip_list);
176 spin_unlock(&iort_msi_chip_lock);
182 * iort_deregister_domain_token() - Deregister domain token based on ITS ID
187 void iort_deregister_domain_token(int trans_id)
189 struct iort_its_msi_chip *its_msi_chip, *t;
191 spin_lock(&iort_msi_chip_lock);
192 list_for_each_entry_safe(its_msi_chip, t, &iort_msi_chip_list, list) {
193 if (its_msi_chip->translation_id == trans_id) {
194 list_del(&its_msi_chip->list);
199 spin_unlock(&iort_msi_chip_lock);
203 * iort_find_domain_token() - Find domain token based on given ITS ID
206 * Returns: domain token when find on the list, NULL otherwise
208 struct fwnode_handle *iort_find_domain_token(int trans_id)
210 struct fwnode_handle *fw_node = NULL;
211 struct iort_its_msi_chip *its_msi_chip;
213 spin_lock(&iort_msi_chip_lock);
214 list_for_each_entry(its_msi_chip, &iort_msi_chip_list, list) {
215 if (its_msi_chip->translation_id == trans_id) {
216 fw_node = its_msi_chip->fw_node;
220 spin_unlock(&iort_msi_chip_lock);
225 static struct acpi_iort_node *iort_scan_node(enum acpi_iort_node_type type,
226 iort_find_node_callback callback,
229 struct acpi_iort_node *iort_node, *iort_end;
230 struct acpi_table_iort *iort;
236 /* Get the first IORT node */
237 iort = (struct acpi_table_iort *)iort_table;
238 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
240 iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
243 for (i = 0; i < iort->node_count; i++) {
244 if (WARN_TAINT(iort_node >= iort_end, TAINT_FIRMWARE_WORKAROUND,
245 "IORT node pointer overflows, bad table!\n"))
248 if (iort_node->type == type &&
249 ACPI_SUCCESS(callback(iort_node, context)))
252 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
259 static acpi_status iort_match_node_callback(struct acpi_iort_node *node,
262 struct device *dev = context;
263 acpi_status status = AE_NOT_FOUND;
265 if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT) {
266 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
267 struct acpi_device *adev = to_acpi_device_node(dev->fwnode);
268 struct acpi_iort_named_component *ncomp;
273 status = acpi_get_name(adev->handle, ACPI_FULL_PATHNAME, &buf);
274 if (ACPI_FAILURE(status)) {
275 dev_warn(dev, "Can't get device full path name\n");
279 ncomp = (struct acpi_iort_named_component *)node->node_data;
280 status = !strcmp(ncomp->device_name, buf.pointer) ?
281 AE_OK : AE_NOT_FOUND;
282 acpi_os_free(buf.pointer);
283 } else if (node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
284 struct acpi_iort_root_complex *pci_rc;
287 bus = to_pci_bus(dev);
288 pci_rc = (struct acpi_iort_root_complex *)node->node_data;
291 * It is assumed that PCI segment numbers maps one-to-one
292 * with root complexes. Each segment number can represent only
295 status = pci_rc->pci_segment_number == pci_domain_nr(bus) ?
296 AE_OK : AE_NOT_FOUND;
302 struct iort_workaround_oem_info {
303 char oem_id[ACPI_OEM_ID_SIZE + 1];
304 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
308 static bool apply_id_count_workaround;
310 static struct iort_workaround_oem_info wa_info[] __initdata = {
313 .oem_table_id = "HIP07 ",
317 .oem_table_id = "HIP08 ",
323 iort_check_id_count_workaround(struct acpi_table_header *tbl)
327 for (i = 0; i < ARRAY_SIZE(wa_info); i++) {
328 if (!memcmp(wa_info[i].oem_id, tbl->oem_id, ACPI_OEM_ID_SIZE) &&
329 !memcmp(wa_info[i].oem_table_id, tbl->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&
330 wa_info[i].oem_revision == tbl->oem_revision) {
331 apply_id_count_workaround = true;
332 pr_warn(FW_BUG "ID count for ID mapping entry is wrong, applying workaround\n");
338 static inline u32 iort_get_map_max(struct acpi_iort_id_mapping *map)
340 u32 map_max = map->input_base + map->id_count;
343 * The IORT specification revision D (Section 3, table 4, page 9) says
344 * Number of IDs = The number of IDs in the range minus one, but the
345 * IORT code ignored the "minus one", and some firmware did that too,
346 * so apply a workaround here to keep compatible with both the spec
347 * compliant and non-spec compliant firmwares.
349 if (apply_id_count_workaround)
355 static int iort_id_map(struct acpi_iort_id_mapping *map, u8 type, u32 rid_in,
358 /* Single mapping does not care for input id */
359 if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) {
360 if (type == ACPI_IORT_NODE_NAMED_COMPONENT ||
361 type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
362 *rid_out = map->output_base;
366 pr_warn(FW_BUG "[map %p] SINGLE MAPPING flag not allowed for node type %d, skipping ID map\n",
371 if (rid_in < map->input_base || rid_in > iort_get_map_max(map))
374 *rid_out = map->output_base + (rid_in - map->input_base);
378 static struct acpi_iort_node *iort_node_get_id(struct acpi_iort_node *node,
379 u32 *id_out, int index)
381 struct acpi_iort_node *parent;
382 struct acpi_iort_id_mapping *map;
384 if (!node->mapping_offset || !node->mapping_count ||
385 index >= node->mapping_count)
388 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
389 node->mapping_offset + index * sizeof(*map));
392 if (!map->output_reference) {
393 pr_err(FW_BUG "[node %p type %d] ID map has NULL parent reference\n",
398 parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
399 map->output_reference);
401 if (map->flags & ACPI_IORT_ID_SINGLE_MAPPING) {
402 if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT ||
403 node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX ||
404 node->type == ACPI_IORT_NODE_SMMU_V3 ||
405 node->type == ACPI_IORT_NODE_PMCG) {
406 *id_out = map->output_base;
414 static int iort_get_id_mapping_index(struct acpi_iort_node *node)
416 struct acpi_iort_smmu_v3 *smmu;
418 switch (node->type) {
419 case ACPI_IORT_NODE_SMMU_V3:
421 * SMMUv3 dev ID mapping index was introduced in revision 1
422 * table, not available in revision 0
424 if (node->revision < 1)
427 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
429 * ID mapping index is only ignored if all interrupts are
432 if (smmu->event_gsiv && smmu->pri_gsiv && smmu->gerr_gsiv
436 if (smmu->id_mapping_index >= node->mapping_count) {
437 pr_err(FW_BUG "[node %p type %d] ID mapping index overflows valid mappings\n",
442 return smmu->id_mapping_index;
443 case ACPI_IORT_NODE_PMCG:
450 static struct acpi_iort_node *iort_node_map_id(struct acpi_iort_node *node,
451 u32 id_in, u32 *id_out,
456 /* Parse the ID mapping tree to find specified node type */
458 struct acpi_iort_id_mapping *map;
461 if (IORT_TYPE_MASK(node->type) & type_mask) {
467 if (!node->mapping_offset || !node->mapping_count)
470 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
471 node->mapping_offset);
474 if (!map->output_reference) {
475 pr_err(FW_BUG "[node %p type %d] ID map has NULL parent reference\n",
481 * Get the special ID mapping index (if any) and skip its
482 * associated ID map to prevent erroneous multi-stage
483 * IORT ID translations.
485 index = iort_get_id_mapping_index(node);
487 /* Do the ID translation */
488 for (i = 0; i < node->mapping_count; i++, map++) {
489 /* if it is special mapping index, skip it */
493 if (!iort_id_map(map, node->type, id, &id))
497 if (i == node->mapping_count)
500 node = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
501 map->output_reference);
505 /* Map input ID to output ID unchanged on mapping failure */
512 static struct acpi_iort_node *iort_node_map_platform_id(
513 struct acpi_iort_node *node, u32 *id_out, u8 type_mask,
516 struct acpi_iort_node *parent;
519 /* step 1: retrieve the initial dev id */
520 parent = iort_node_get_id(node, &id, index);
525 * optional step 2: map the initial dev id if its parent is not
526 * the target type we want, map it again for the use cases such
527 * as NC (named component) -> SMMU -> ITS. If the type is matched,
528 * return the initial dev id and its parent pointer directly.
530 if (!(IORT_TYPE_MASK(parent->type) & type_mask))
531 parent = iort_node_map_id(parent, id, id_out, type_mask);
539 static struct acpi_iort_node *iort_find_dev_node(struct device *dev)
541 struct pci_bus *pbus;
543 if (!dev_is_pci(dev)) {
544 struct acpi_iort_node *node;
546 * scan iort_fwnode_list to see if it's an iort platform
547 * device (such as SMMU, PMCG),its iort node already cached
548 * and associated with fwnode when iort platform devices
551 node = iort_get_iort_node(dev->fwnode);
556 * if not, then it should be a platform device defined in
557 * DSDT/SSDT (with Named Component node in IORT)
559 return iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
560 iort_match_node_callback, dev);
563 /* Find a PCI root bus */
564 pbus = to_pci_dev(dev)->bus;
565 while (!pci_is_root_bus(pbus))
568 return iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
569 iort_match_node_callback, &pbus->dev);
573 * iort_msi_map_rid() - Map a MSI requester ID for a device
574 * @dev: The device for which the mapping is to be done.
575 * @req_id: The device requester ID.
577 * Returns: mapped MSI RID on success, input requester ID otherwise
579 u32 iort_msi_map_rid(struct device *dev, u32 req_id)
581 struct acpi_iort_node *node;
584 node = iort_find_dev_node(dev);
588 iort_node_map_id(node, req_id, &dev_id, IORT_MSI_TYPE);
593 * iort_pmsi_get_dev_id() - Get the device id for a device
594 * @dev: The device for which the mapping is to be done.
595 * @dev_id: The device ID found.
597 * Returns: 0 for successful find a dev id, -ENODEV on error
599 int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id)
602 struct acpi_iort_node *node;
604 node = iort_find_dev_node(dev);
608 index = iort_get_id_mapping_index(node);
609 /* if there is a valid index, go get the dev_id directly */
611 if (iort_node_get_id(node, dev_id, index))
614 for (i = 0; i < node->mapping_count; i++) {
615 if (iort_node_map_platform_id(node, dev_id,
624 static int __maybe_unused iort_find_its_base(u32 its_id, phys_addr_t *base)
626 struct iort_its_msi_chip *its_msi_chip;
629 spin_lock(&iort_msi_chip_lock);
630 list_for_each_entry(its_msi_chip, &iort_msi_chip_list, list) {
631 if (its_msi_chip->translation_id == its_id) {
632 *base = its_msi_chip->base_addr;
637 spin_unlock(&iort_msi_chip_lock);
643 * iort_dev_find_its_id() - Find the ITS identifier for a device
645 * @req_id: Device's requester ID
646 * @idx: Index of the ITS identifier list.
647 * @its_id: ITS identifier.
649 * Returns: 0 on success, appropriate error value otherwise
651 static int iort_dev_find_its_id(struct device *dev, u32 req_id,
652 unsigned int idx, int *its_id)
654 struct acpi_iort_its_group *its;
655 struct acpi_iort_node *node;
657 node = iort_find_dev_node(dev);
661 node = iort_node_map_id(node, req_id, NULL, IORT_MSI_TYPE);
665 /* Move to ITS specific data */
666 its = (struct acpi_iort_its_group *)node->node_data;
667 if (idx >= its->its_count) {
668 dev_err(dev, "requested ITS ID index [%d] overruns ITS entries [%d]\n",
669 idx, its->its_count);
673 *its_id = its->identifiers[idx];
678 * iort_get_device_domain() - Find MSI domain related to a device
680 * @req_id: Requester ID for the device.
682 * Returns: the MSI domain for this device, NULL otherwise
684 struct irq_domain *iort_get_device_domain(struct device *dev, u32 req_id)
686 struct fwnode_handle *handle;
689 if (iort_dev_find_its_id(dev, req_id, 0, &its_id))
692 handle = iort_find_domain_token(its_id);
696 return irq_find_matching_fwnode(handle, DOMAIN_BUS_PCI_MSI);
699 static void iort_set_device_domain(struct device *dev,
700 struct acpi_iort_node *node)
702 struct acpi_iort_its_group *its;
703 struct acpi_iort_node *msi_parent;
704 struct acpi_iort_id_mapping *map;
705 struct fwnode_handle *iort_fwnode;
706 struct irq_domain *domain;
709 index = iort_get_id_mapping_index(node);
713 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
714 node->mapping_offset + index * sizeof(*map));
717 if (!map->output_reference ||
718 !(map->flags & ACPI_IORT_ID_SINGLE_MAPPING)) {
719 pr_err(FW_BUG "[node %p type %d] Invalid MSI mapping\n",
724 msi_parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
725 map->output_reference);
727 if (!msi_parent || msi_parent->type != ACPI_IORT_NODE_ITS_GROUP)
730 /* Move to ITS specific data */
731 its = (struct acpi_iort_its_group *)msi_parent->node_data;
733 iort_fwnode = iort_find_domain_token(its->identifiers[0]);
737 domain = irq_find_matching_fwnode(iort_fwnode, DOMAIN_BUS_PLATFORM_MSI);
739 dev_set_msi_domain(dev, domain);
743 * iort_get_platform_device_domain() - Find MSI domain related to a
745 * @dev: the dev pointer associated with the platform device
747 * Returns: the MSI domain for this device, NULL otherwise
749 static struct irq_domain *iort_get_platform_device_domain(struct device *dev)
751 struct acpi_iort_node *node, *msi_parent = NULL;
752 struct fwnode_handle *iort_fwnode;
753 struct acpi_iort_its_group *its;
756 /* find its associated iort node */
757 node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
758 iort_match_node_callback, dev);
762 /* then find its msi parent node */
763 for (i = 0; i < node->mapping_count; i++) {
764 msi_parent = iort_node_map_platform_id(node, NULL,
773 /* Move to ITS specific data */
774 its = (struct acpi_iort_its_group *)msi_parent->node_data;
776 iort_fwnode = iort_find_domain_token(its->identifiers[0]);
780 return irq_find_matching_fwnode(iort_fwnode, DOMAIN_BUS_PLATFORM_MSI);
783 void acpi_configure_pmsi_domain(struct device *dev)
785 struct irq_domain *msi_domain;
787 msi_domain = iort_get_platform_device_domain(dev);
789 dev_set_msi_domain(dev, msi_domain);
792 static int __maybe_unused __get_pci_rid(struct pci_dev *pdev, u16 alias,
801 #ifdef CONFIG_IOMMU_API
802 static struct acpi_iort_node *iort_get_msi_resv_iommu(struct device *dev)
804 struct acpi_iort_node *iommu;
805 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
807 iommu = iort_get_iort_node(fwspec->iommu_fwnode);
809 if (iommu && (iommu->type == ACPI_IORT_NODE_SMMU_V3)) {
810 struct acpi_iort_smmu_v3 *smmu;
812 smmu = (struct acpi_iort_smmu_v3 *)iommu->node_data;
813 if (smmu->model == ACPI_IORT_SMMU_V3_HISILICON_HI161X)
820 static inline const struct iommu_ops *iort_fwspec_iommu_ops(struct device *dev)
822 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
824 return (fwspec && fwspec->ops) ? fwspec->ops : NULL;
827 static inline int iort_add_device_replay(const struct iommu_ops *ops,
832 if (dev->bus && !device_iommu_mapped(dev))
833 err = iommu_probe_device(dev);
839 * iort_iommu_msi_get_resv_regions - Reserved region driver helper
840 * @dev: Device from iommu_get_resv_regions()
841 * @head: Reserved region list from iommu_get_resv_regions()
843 * Returns: Number of msi reserved regions on success (0 if platform
844 * doesn't require the reservation or no associated msi regions),
845 * appropriate error value otherwise. The ITS interrupt translation
846 * spaces (ITS_base + SZ_64K, SZ_64K) associated with the device
847 * are the msi reserved regions.
849 int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head)
851 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
852 struct acpi_iort_its_group *its;
853 struct acpi_iort_node *iommu_node, *its_node = NULL;
856 iommu_node = iort_get_msi_resv_iommu(dev);
861 * Current logic to reserve ITS regions relies on HW topologies
862 * where a given PCI or named component maps its IDs to only one
863 * ITS group; if a PCI or named component can map its IDs to
864 * different ITS groups through IORT mappings this function has
865 * to be reworked to ensure we reserve regions for all ITS groups
866 * a given PCI or named component may map IDs to.
869 for (i = 0; i < fwspec->num_ids; i++) {
870 its_node = iort_node_map_id(iommu_node,
872 NULL, IORT_MSI_TYPE);
880 /* Move to ITS specific data */
881 its = (struct acpi_iort_its_group *)its_node->node_data;
883 for (i = 0; i < its->its_count; i++) {
886 if (!iort_find_its_base(its->identifiers[i], &base)) {
887 int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
888 struct iommu_resv_region *region;
890 region = iommu_alloc_resv_region(base + SZ_64K, SZ_64K,
891 prot, IOMMU_RESV_MSI);
893 list_add_tail(®ion->list, head);
899 return (resv == its->its_count) ? resv : -ENODEV;
902 static inline bool iort_iommu_driver_enabled(u8 type)
905 case ACPI_IORT_NODE_SMMU_V3:
906 return IS_ENABLED(CONFIG_ARM_SMMU_V3);
907 case ACPI_IORT_NODE_SMMU:
908 return IS_ENABLED(CONFIG_ARM_SMMU);
910 pr_warn("IORT node type %u does not describe an SMMU\n", type);
915 static int arm_smmu_iort_xlate(struct device *dev, u32 streamid,
916 struct fwnode_handle *fwnode,
917 const struct iommu_ops *ops)
919 int ret = iommu_fwspec_init(dev, fwnode, ops);
922 ret = iommu_fwspec_add_ids(dev, &streamid, 1);
927 static bool iort_pci_rc_supports_ats(struct acpi_iort_node *node)
929 struct acpi_iort_root_complex *pci_rc;
931 pci_rc = (struct acpi_iort_root_complex *)node->node_data;
932 return pci_rc->ats_attribute & ACPI_IORT_ATS_SUPPORTED;
935 static int iort_iommu_xlate(struct device *dev, struct acpi_iort_node *node,
938 const struct iommu_ops *ops;
939 struct fwnode_handle *iort_fwnode;
944 iort_fwnode = iort_get_fwnode(node);
949 * If the ops look-up fails, this means that either
950 * the SMMU drivers have not been probed yet or that
951 * the SMMU drivers are not built in the kernel;
952 * Depending on whether the SMMU drivers are built-in
953 * in the kernel or not, defer the IOMMU configuration
956 ops = iommu_ops_from_fwnode(iort_fwnode);
958 return iort_iommu_driver_enabled(node->type) ?
959 -EPROBE_DEFER : -ENODEV;
961 return arm_smmu_iort_xlate(dev, streamid, iort_fwnode, ops);
964 struct iort_pci_alias_info {
966 struct acpi_iort_node *node;
969 static int iort_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data)
971 struct iort_pci_alias_info *info = data;
972 struct acpi_iort_node *parent;
975 parent = iort_node_map_id(info->node, alias, &streamid,
977 return iort_iommu_xlate(info->dev, parent, streamid);
980 static void iort_named_component_init(struct device *dev,
981 struct acpi_iort_node *node)
983 struct acpi_iort_named_component *nc;
984 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
989 nc = (struct acpi_iort_named_component *)node->node_data;
990 fwspec->num_pasid_bits = FIELD_GET(ACPI_IORT_NC_PASID_BITS,
995 * iort_iommu_configure - Set-up IOMMU configuration for a device.
997 * @dev: device to configure
999 * Returns: iommu_ops pointer on configuration success
1000 * NULL on configuration failure
1002 const struct iommu_ops *iort_iommu_configure(struct device *dev)
1004 struct acpi_iort_node *node, *parent;
1005 const struct iommu_ops *ops;
1010 * If we already translated the fwspec there
1011 * is nothing left to do, return the iommu_ops.
1013 ops = iort_fwspec_iommu_ops(dev);
1017 if (dev_is_pci(dev)) {
1018 struct pci_bus *bus = to_pci_dev(dev)->bus;
1019 struct iort_pci_alias_info info = { .dev = dev };
1021 node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
1022 iort_match_node_callback, &bus->dev);
1027 err = pci_for_each_dma_alias(to_pci_dev(dev),
1028 iort_pci_iommu_init, &info);
1030 if (!err && iort_pci_rc_supports_ats(node))
1031 dev->iommu_fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
1035 node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
1036 iort_match_node_callback, dev);
1041 parent = iort_node_map_platform_id(node, &streamid,
1046 err = iort_iommu_xlate(dev, parent, streamid);
1047 } while (parent && !err);
1050 iort_named_component_init(dev, node);
1054 * If we have reason to believe the IOMMU driver missed the initial
1055 * add_device callback for dev, replay it to get things in order.
1058 ops = iort_fwspec_iommu_ops(dev);
1059 err = iort_add_device_replay(ops, dev);
1062 /* Ignore all other errors apart from EPROBE_DEFER */
1063 if (err == -EPROBE_DEFER) {
1066 dev_dbg(dev, "Adding to IOMMU failed: %d\n", err);
1073 static inline const struct iommu_ops *iort_fwspec_iommu_ops(struct device *dev)
1075 static inline int iort_add_device_replay(const struct iommu_ops *ops,
1078 int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head)
1080 const struct iommu_ops *iort_iommu_configure(struct device *dev)
1084 static int nc_dma_get_range(struct device *dev, u64 *size)
1086 struct acpi_iort_node *node;
1087 struct acpi_iort_named_component *ncomp;
1089 node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
1090 iort_match_node_callback, dev);
1094 ncomp = (struct acpi_iort_named_component *)node->node_data;
1096 *size = ncomp->memory_address_limit >= 64 ? U64_MAX :
1097 1ULL<<ncomp->memory_address_limit;
1102 static int rc_dma_get_range(struct device *dev, u64 *size)
1104 struct acpi_iort_node *node;
1105 struct acpi_iort_root_complex *rc;
1106 struct pci_bus *pbus = to_pci_dev(dev)->bus;
1108 node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
1109 iort_match_node_callback, &pbus->dev);
1110 if (!node || node->revision < 1)
1113 rc = (struct acpi_iort_root_complex *)node->node_data;
1115 *size = rc->memory_address_limit >= 64 ? U64_MAX :
1116 1ULL<<rc->memory_address_limit;
1122 * iort_dma_setup() - Set-up device DMA parameters.
1124 * @dev: device to configure
1125 * @dma_addr: device DMA address result pointer
1126 * @size: DMA range size result pointer
1128 void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size)
1130 u64 end, mask, dmaaddr = 0, size = 0, offset = 0;
1134 * If @dev is expected to be DMA-capable then the bus code that created
1135 * it should have initialised its dma_mask pointer by this point. For
1136 * now, we'll continue the legacy behaviour of coercing it to the
1137 * coherent mask if not, but we'll no longer do so quietly.
1139 if (!dev->dma_mask) {
1140 dev_warn(dev, "DMA mask not set\n");
1141 dev->dma_mask = &dev->coherent_dma_mask;
1144 if (dev->coherent_dma_mask)
1145 size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1);
1149 if (dev_is_pci(dev)) {
1150 ret = acpi_dma_get_range(dev, &dmaaddr, &offset, &size);
1152 ret = rc_dma_get_range(dev, &size);
1154 ret = nc_dma_get_range(dev, &size);
1159 * Limit coherent and dma mask based on size retrieved from
1162 end = dmaaddr + size - 1;
1163 mask = DMA_BIT_MASK(ilog2(end) + 1);
1164 dev->bus_dma_limit = end;
1165 dev->coherent_dma_mask = mask;
1166 *dev->dma_mask = mask;
1169 *dma_addr = dmaaddr;
1172 dev->dma_pfn_offset = PFN_DOWN(offset);
1173 dev_dbg(dev, "dma_pfn_offset(%#08llx)\n", offset);
1176 static void __init acpi_iort_register_irq(int hwirq, const char *name,
1178 struct resource *res)
1180 int irq = acpi_register_gsi(NULL, hwirq, trigger,
1184 pr_err("could not register gsi hwirq %d name [%s]\n", hwirq,
1191 res->flags = IORESOURCE_IRQ;
1195 static int __init arm_smmu_v3_count_resources(struct acpi_iort_node *node)
1197 struct acpi_iort_smmu_v3 *smmu;
1198 /* Always present mem resource */
1201 /* Retrieve SMMUv3 specific data */
1202 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1204 if (smmu->event_gsiv)
1210 if (smmu->gerr_gsiv)
1213 if (smmu->sync_gsiv)
1219 static bool arm_smmu_v3_is_combined_irq(struct acpi_iort_smmu_v3 *smmu)
1222 * Cavium ThunderX2 implementation doesn't not support unique
1223 * irq line. Use single irq line for all the SMMUv3 interrupts.
1225 if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
1229 * ThunderX2 doesn't support MSIs from the SMMU, so we're checking
1232 return smmu->event_gsiv == smmu->pri_gsiv &&
1233 smmu->event_gsiv == smmu->gerr_gsiv &&
1234 smmu->event_gsiv == smmu->sync_gsiv;
1237 static unsigned long arm_smmu_v3_resource_size(struct acpi_iort_smmu_v3 *smmu)
1240 * Override the size, for Cavium ThunderX2 implementation
1241 * which doesn't support the page 1 SMMU register space.
1243 if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
1249 static void __init arm_smmu_v3_init_resources(struct resource *res,
1250 struct acpi_iort_node *node)
1252 struct acpi_iort_smmu_v3 *smmu;
1255 /* Retrieve SMMUv3 specific data */
1256 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1258 res[num_res].start = smmu->base_address;
1259 res[num_res].end = smmu->base_address +
1260 arm_smmu_v3_resource_size(smmu) - 1;
1261 res[num_res].flags = IORESOURCE_MEM;
1264 if (arm_smmu_v3_is_combined_irq(smmu)) {
1265 if (smmu->event_gsiv)
1266 acpi_iort_register_irq(smmu->event_gsiv, "combined",
1267 ACPI_EDGE_SENSITIVE,
1271 if (smmu->event_gsiv)
1272 acpi_iort_register_irq(smmu->event_gsiv, "eventq",
1273 ACPI_EDGE_SENSITIVE,
1277 acpi_iort_register_irq(smmu->pri_gsiv, "priq",
1278 ACPI_EDGE_SENSITIVE,
1281 if (smmu->gerr_gsiv)
1282 acpi_iort_register_irq(smmu->gerr_gsiv, "gerror",
1283 ACPI_EDGE_SENSITIVE,
1286 if (smmu->sync_gsiv)
1287 acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync",
1288 ACPI_EDGE_SENSITIVE,
1293 static void __init arm_smmu_v3_dma_configure(struct device *dev,
1294 struct acpi_iort_node *node)
1296 struct acpi_iort_smmu_v3 *smmu;
1297 enum dev_dma_attr attr;
1299 /* Retrieve SMMUv3 specific data */
1300 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1302 attr = (smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE) ?
1303 DEV_DMA_COHERENT : DEV_DMA_NON_COHERENT;
1305 /* We expect the dma masks to be equivalent for all SMMUv3 set-ups */
1306 dev->dma_mask = &dev->coherent_dma_mask;
1308 /* Configure DMA for the page table walker */
1309 acpi_dma_configure(dev, attr);
1312 #if defined(CONFIG_ACPI_NUMA)
1314 * set numa proximity domain for smmuv3 device
1316 static int __init arm_smmu_v3_set_proximity(struct device *dev,
1317 struct acpi_iort_node *node)
1319 struct acpi_iort_smmu_v3 *smmu;
1321 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1322 if (smmu->flags & ACPI_IORT_SMMU_V3_PXM_VALID) {
1323 int dev_node = acpi_map_pxm_to_node(smmu->pxm);
1325 if (dev_node != NUMA_NO_NODE && !node_online(dev_node))
1328 set_dev_node(dev, dev_node);
1329 pr_info("SMMU-v3[%llx] Mapped to Proximity domain %d\n",
1336 #define arm_smmu_v3_set_proximity NULL
1339 static int __init arm_smmu_count_resources(struct acpi_iort_node *node)
1341 struct acpi_iort_smmu *smmu;
1343 /* Retrieve SMMU specific data */
1344 smmu = (struct acpi_iort_smmu *)node->node_data;
1347 * Only consider the global fault interrupt and ignore the
1348 * configuration access interrupt.
1350 * MMIO address and global fault interrupt resources are always
1351 * present so add them to the context interrupt count as a static
1354 return smmu->context_interrupt_count + 2;
1357 static void __init arm_smmu_init_resources(struct resource *res,
1358 struct acpi_iort_node *node)
1360 struct acpi_iort_smmu *smmu;
1361 int i, hw_irq, trigger, num_res = 0;
1362 u64 *ctx_irq, *glb_irq;
1364 /* Retrieve SMMU specific data */
1365 smmu = (struct acpi_iort_smmu *)node->node_data;
1367 res[num_res].start = smmu->base_address;
1368 res[num_res].end = smmu->base_address + smmu->span - 1;
1369 res[num_res].flags = IORESOURCE_MEM;
1372 glb_irq = ACPI_ADD_PTR(u64, node, smmu->global_interrupt_offset);
1374 hw_irq = IORT_IRQ_MASK(glb_irq[0]);
1375 trigger = IORT_IRQ_TRIGGER_MASK(glb_irq[0]);
1377 acpi_iort_register_irq(hw_irq, "arm-smmu-global", trigger,
1381 ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset);
1382 for (i = 0; i < smmu->context_interrupt_count; i++) {
1383 hw_irq = IORT_IRQ_MASK(ctx_irq[i]);
1384 trigger = IORT_IRQ_TRIGGER_MASK(ctx_irq[i]);
1386 acpi_iort_register_irq(hw_irq, "arm-smmu-context", trigger,
1391 static void __init arm_smmu_dma_configure(struct device *dev,
1392 struct acpi_iort_node *node)
1394 struct acpi_iort_smmu *smmu;
1395 enum dev_dma_attr attr;
1397 /* Retrieve SMMU specific data */
1398 smmu = (struct acpi_iort_smmu *)node->node_data;
1400 attr = (smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK) ?
1401 DEV_DMA_COHERENT : DEV_DMA_NON_COHERENT;
1403 /* We expect the dma masks to be equivalent for SMMU set-ups */
1404 dev->dma_mask = &dev->coherent_dma_mask;
1406 /* Configure DMA for the page table walker */
1407 acpi_dma_configure(dev, attr);
1410 static int __init arm_smmu_v3_pmcg_count_resources(struct acpi_iort_node *node)
1412 struct acpi_iort_pmcg *pmcg;
1414 /* Retrieve PMCG specific data */
1415 pmcg = (struct acpi_iort_pmcg *)node->node_data;
1418 * There are always 2 memory resources.
1419 * If the overflow_gsiv is present then add that for a total of 3.
1421 return pmcg->overflow_gsiv ? 3 : 2;
1424 static void __init arm_smmu_v3_pmcg_init_resources(struct resource *res,
1425 struct acpi_iort_node *node)
1427 struct acpi_iort_pmcg *pmcg;
1429 /* Retrieve PMCG specific data */
1430 pmcg = (struct acpi_iort_pmcg *)node->node_data;
1432 res[0].start = pmcg->page0_base_address;
1433 res[0].end = pmcg->page0_base_address + SZ_4K - 1;
1434 res[0].flags = IORESOURCE_MEM;
1435 res[1].start = pmcg->page1_base_address;
1436 res[1].end = pmcg->page1_base_address + SZ_4K - 1;
1437 res[1].flags = IORESOURCE_MEM;
1439 if (pmcg->overflow_gsiv)
1440 acpi_iort_register_irq(pmcg->overflow_gsiv, "overflow",
1441 ACPI_EDGE_SENSITIVE, &res[2]);
1444 static struct acpi_platform_list pmcg_plat_info[] __initdata = {
1445 /* HiSilicon Hip08 Platform */
1446 {"HISI ", "HIP08 ", 0, ACPI_SIG_IORT, greater_than_or_equal,
1447 "Erratum #162001800", IORT_SMMU_V3_PMCG_HISI_HIP08},
1451 static int __init arm_smmu_v3_pmcg_add_platdata(struct platform_device *pdev)
1456 idx = acpi_match_platform_list(pmcg_plat_info);
1458 model = pmcg_plat_info[idx].data;
1460 model = IORT_SMMU_V3_PMCG_GENERIC;
1462 return platform_device_add_data(pdev, &model, sizeof(model));
1465 struct iort_dev_config {
1467 int (*dev_init)(struct acpi_iort_node *node);
1468 void (*dev_dma_configure)(struct device *dev,
1469 struct acpi_iort_node *node);
1470 int (*dev_count_resources)(struct acpi_iort_node *node);
1471 void (*dev_init_resources)(struct resource *res,
1472 struct acpi_iort_node *node);
1473 int (*dev_set_proximity)(struct device *dev,
1474 struct acpi_iort_node *node);
1475 int (*dev_add_platdata)(struct platform_device *pdev);
1478 static const struct iort_dev_config iort_arm_smmu_v3_cfg __initconst = {
1479 .name = "arm-smmu-v3",
1480 .dev_dma_configure = arm_smmu_v3_dma_configure,
1481 .dev_count_resources = arm_smmu_v3_count_resources,
1482 .dev_init_resources = arm_smmu_v3_init_resources,
1483 .dev_set_proximity = arm_smmu_v3_set_proximity,
1486 static const struct iort_dev_config iort_arm_smmu_cfg __initconst = {
1488 .dev_dma_configure = arm_smmu_dma_configure,
1489 .dev_count_resources = arm_smmu_count_resources,
1490 .dev_init_resources = arm_smmu_init_resources,
1493 static const struct iort_dev_config iort_arm_smmu_v3_pmcg_cfg __initconst = {
1494 .name = "arm-smmu-v3-pmcg",
1495 .dev_count_resources = arm_smmu_v3_pmcg_count_resources,
1496 .dev_init_resources = arm_smmu_v3_pmcg_init_resources,
1497 .dev_add_platdata = arm_smmu_v3_pmcg_add_platdata,
1500 static __init const struct iort_dev_config *iort_get_dev_cfg(
1501 struct acpi_iort_node *node)
1503 switch (node->type) {
1504 case ACPI_IORT_NODE_SMMU_V3:
1505 return &iort_arm_smmu_v3_cfg;
1506 case ACPI_IORT_NODE_SMMU:
1507 return &iort_arm_smmu_cfg;
1508 case ACPI_IORT_NODE_PMCG:
1509 return &iort_arm_smmu_v3_pmcg_cfg;
1516 * iort_add_platform_device() - Allocate a platform device for IORT node
1517 * @node: Pointer to device ACPI IORT node
1519 * Returns: 0 on success, <0 failure
1521 static int __init iort_add_platform_device(struct acpi_iort_node *node,
1522 const struct iort_dev_config *ops)
1524 struct fwnode_handle *fwnode;
1525 struct platform_device *pdev;
1529 pdev = platform_device_alloc(ops->name, PLATFORM_DEVID_AUTO);
1533 if (ops->dev_set_proximity) {
1534 ret = ops->dev_set_proximity(&pdev->dev, node);
1539 count = ops->dev_count_resources(node);
1541 r = kcalloc(count, sizeof(*r), GFP_KERNEL);
1547 ops->dev_init_resources(r, node);
1549 ret = platform_device_add_resources(pdev, r, count);
1551 * Resources are duplicated in platform_device_add_resources,
1552 * free their allocated memory
1560 * Platform devices based on PMCG nodes uses platform_data to
1561 * pass the hardware model info to the driver. For others, add
1562 * a copy of IORT node pointer to platform_data to be used to
1563 * retrieve IORT data information.
1565 if (ops->dev_add_platdata)
1566 ret = ops->dev_add_platdata(pdev);
1568 ret = platform_device_add_data(pdev, &node, sizeof(node));
1573 fwnode = iort_get_fwnode(node);
1580 pdev->dev.fwnode = fwnode;
1582 if (ops->dev_dma_configure)
1583 ops->dev_dma_configure(&pdev->dev, node);
1585 iort_set_device_domain(&pdev->dev, node);
1587 ret = platform_device_add(pdev);
1589 goto dma_deconfigure;
1594 arch_teardown_dma_ops(&pdev->dev);
1596 platform_device_put(pdev);
1602 static void __init iort_enable_acs(struct acpi_iort_node *iort_node)
1604 static bool acs_enabled __initdata;
1609 if (iort_node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
1610 struct acpi_iort_node *parent;
1611 struct acpi_iort_id_mapping *map;
1614 map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, iort_node,
1615 iort_node->mapping_offset);
1617 for (i = 0; i < iort_node->mapping_count; i++, map++) {
1618 if (!map->output_reference)
1621 parent = ACPI_ADD_PTR(struct acpi_iort_node,
1622 iort_table, map->output_reference);
1624 * If we detect a RC->SMMU mapping, make sure
1625 * we enable ACS on the system.
1627 if ((parent->type == ACPI_IORT_NODE_SMMU) ||
1628 (parent->type == ACPI_IORT_NODE_SMMU_V3)) {
1637 static inline void iort_enable_acs(struct acpi_iort_node *iort_node) { }
1640 static void __init iort_init_platform_devices(void)
1642 struct acpi_iort_node *iort_node, *iort_end;
1643 struct acpi_table_iort *iort;
1644 struct fwnode_handle *fwnode;
1646 const struct iort_dev_config *ops;
1649 * iort_table and iort both point to the start of IORT table, but
1650 * have different struct types
1652 iort = (struct acpi_table_iort *)iort_table;
1654 /* Get the first IORT node */
1655 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
1657 iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort,
1658 iort_table->length);
1660 for (i = 0; i < iort->node_count; i++) {
1661 if (iort_node >= iort_end) {
1662 pr_err("iort node pointer overflows, bad table\n");
1666 iort_enable_acs(iort_node);
1668 ops = iort_get_dev_cfg(iort_node);
1670 fwnode = acpi_alloc_fwnode_static();
1674 iort_set_fwnode(iort_node, fwnode);
1676 ret = iort_add_platform_device(iort_node, ops);
1678 iort_delete_fwnode(iort_node);
1679 acpi_free_fwnode_static(fwnode);
1684 iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
1689 void __init acpi_iort_init(void)
1693 status = acpi_get_table(ACPI_SIG_IORT, 0, &iort_table);
1694 if (ACPI_FAILURE(status)) {
1695 if (status != AE_NOT_FOUND) {
1696 const char *msg = acpi_format_exception(status);
1698 pr_err("Failed to get table, %s\n", msg);
1704 iort_check_id_count_workaround(iort_table);
1705 iort_init_platform_devices();