2 * EIM driver for Freescale's i.MX chips
4 * Copyright (C) 2013 Freescale Semiconductor, Inc.
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
10 #include <linux/module.h>
11 #include <linux/clk.h>
13 #include <linux/of_device.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
16 #include <linux/regmap.h>
18 struct imx_weim_devtype {
19 unsigned int cs_count;
20 unsigned int cs_regs_count;
21 unsigned int cs_stride;
24 static const struct imx_weim_devtype imx1_weim_devtype = {
30 static const struct imx_weim_devtype imx27_weim_devtype = {
36 static const struct imx_weim_devtype imx50_weim_devtype = {
42 static const struct imx_weim_devtype imx51_weim_devtype = {
48 #define MAX_CS_REGS_COUNT 6
49 #define MAX_CS_COUNT 6
54 u32 regs[MAX_CS_REGS_COUNT];
57 struct cs_timing_state {
58 struct cs_timing cs[MAX_CS_COUNT];
61 static const struct of_device_id weim_id_table[] = {
63 { .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, },
65 { .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, },
67 { .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, },
68 { .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, },
70 { .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, },
73 MODULE_DEVICE_TABLE(of, weim_id_table);
75 static int __init imx_weim_gpr_setup(struct platform_device *pdev)
77 struct device_node *np = pdev->dev.of_node;
78 struct property *prop;
82 05, /* CS0(128M) CS1(0M) CS2(0M) CS3(0M) */
83 033, /* CS0(64M) CS1(64M) CS2(0M) CS3(0M) */
84 0113, /* CS0(64M) CS1(32M) CS2(32M) CS3(0M) */
85 01111, /* CS0(32M) CS1(32M) CS2(32M) CS3(32M) */
92 gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr");
94 dev_dbg(&pdev->dev, "failed to find weim-cs-gpr\n");
98 of_property_for_each_u32(np, "ranges", prop, p, val) {
101 } else if (i % 4 == 3 && val) {
102 val = (val / SZ_32M) | 1;
103 gprval |= val << cs * 3;
111 for (i = 0; i < ARRAY_SIZE(gprvals); i++) {
112 if (gprval == gprvals[i]) {
113 /* Found it. Set up IOMUXC_GPR1[11:0] with it. */
114 regmap_update_bits(gpr, IOMUXC_GPR1, 0xfff, gprval);
120 dev_err(&pdev->dev, "Invalid 'ranges' configuration\n");
124 /* Parse and set the timing for this device. */
125 static int __init weim_timing_setup(struct device *dev,
126 struct device_node *np, void __iomem *base,
127 const struct imx_weim_devtype *devtype,
128 struct cs_timing_state *ts)
130 u32 cs_idx, value[MAX_CS_REGS_COUNT];
132 int reg_idx, num_regs;
133 struct cs_timing *cst;
135 if (WARN_ON(devtype->cs_regs_count > MAX_CS_REGS_COUNT))
137 if (WARN_ON(devtype->cs_count > MAX_CS_COUNT))
140 ret = of_property_read_u32_array(np, "fsl,weim-cs-timing",
141 value, devtype->cs_regs_count);
146 * the child node's "reg" property may contain multiple address ranges,
147 * extract the chip select for each.
149 num_regs = of_property_count_elems_of_size(np, "reg", OF_REG_SIZE);
154 for (reg_idx = 0; reg_idx < num_regs; reg_idx++) {
155 /* get the CS index from this child node's "reg" property. */
156 ret = of_property_read_u32_index(np, "reg",
157 reg_idx * OF_REG_SIZE, &cs_idx);
161 if (cs_idx >= devtype->cs_count)
164 /* prevent re-configuring a CS that's already been configured */
165 cst = &ts->cs[cs_idx];
166 if (cst->is_applied && memcmp(value, cst->regs,
167 devtype->cs_regs_count * sizeof(u32))) {
168 dev_err(dev, "fsl,weim-cs-timing conflict on %pOF", np);
172 /* set the timing for WEIM */
173 for (i = 0; i < devtype->cs_regs_count; i++)
175 base + cs_idx * devtype->cs_stride + i * 4);
176 if (!cst->is_applied) {
177 cst->is_applied = true;
178 memcpy(cst->regs, value,
179 devtype->cs_regs_count * sizeof(u32));
186 static int __init weim_parse_dt(struct platform_device *pdev,
189 const struct of_device_id *of_id = of_match_device(weim_id_table,
191 const struct imx_weim_devtype *devtype = of_id->data;
192 struct device_node *child;
193 int ret, have_child = 0;
194 struct cs_timing_state ts = {};
196 if (devtype == &imx50_weim_devtype) {
197 ret = imx_weim_gpr_setup(pdev);
202 for_each_available_child_of_node(pdev->dev.of_node, child) {
203 ret = weim_timing_setup(&pdev->dev, child, base, devtype, &ts);
205 dev_warn(&pdev->dev, "%pOF set timing failed.\n",
212 ret = of_platform_default_populate(pdev->dev.of_node,
215 dev_err(&pdev->dev, "%pOF fail to create devices.\n",
220 static int __init weim_probe(struct platform_device *pdev)
222 struct resource *res;
227 /* get the resource */
228 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
229 base = devm_ioremap_resource(&pdev->dev, res);
231 return PTR_ERR(base);
234 clk = devm_clk_get(&pdev->dev, NULL);
238 ret = clk_prepare_enable(clk);
242 /* parse the device node */
243 ret = weim_parse_dt(pdev, base);
245 clk_disable_unprepare(clk);
247 dev_info(&pdev->dev, "Driver registered.\n");
252 static struct platform_driver weim_driver = {
255 .of_match_table = weim_id_table,
258 module_platform_driver_probe(weim_driver, weim_probe);
260 MODULE_AUTHOR("Freescale Semiconductor Inc.");
261 MODULE_DESCRIPTION("i.MX EIM Controller Driver");
262 MODULE_LICENSE("GPL");