2 * Copyright (C) 2014 Intel Corporation
5 * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
7 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
9 * This device driver implements the TPM interface as defined in
10 * the TCG CRB 2.0 TPM specification.
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; version 2
18 #include <linux/acpi.h>
19 #include <linux/highmem.h>
20 #include <linux/rculist.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
25 #define ACPI_SIG_TPM2 "TPM2"
27 static const u8 CRB_ACPI_START_UUID[] = {
28 /* 0000 */ 0xAB, 0x6C, 0xBF, 0x6B, 0x63, 0x54, 0x14, 0x47,
29 /* 0008 */ 0xB7, 0xCD, 0xF0, 0x20, 0x3C, 0x03, 0x68, 0xD4
33 CRB_ACPI_START_REVISION_ID = 1,
34 CRB_ACPI_START_INDEX = 1,
38 CRB_CA_REQ_GO_IDLE = BIT(0),
39 CRB_CA_REQ_CMD_READY = BIT(1),
43 CRB_CA_STS_ERROR = BIT(0),
44 CRB_CA_STS_TPM_IDLE = BIT(1),
48 CRB_START_INVOKE = BIT(0),
52 CRB_CANCEL_INVOKE = BIT(0),
55 struct crb_control_area {
70 CRB_STS_COMPLETE = BIT(0),
74 CRB_FL_ACPI_START = BIT(0),
75 CRB_FL_CRB_START = BIT(1),
81 struct crb_control_area __iomem *cca;
86 static SIMPLE_DEV_PM_OPS(crb_pm, tpm_pm_suspend, tpm_pm_resume);
88 static u8 crb_status(struct tpm_chip *chip)
90 struct crb_priv *priv = chip->vendor.priv;
93 if ((ioread32(&priv->cca->start) & CRB_START_INVOKE) !=
95 sts |= CRB_STS_COMPLETE;
100 static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count)
102 struct crb_priv *priv = chip->vendor.priv;
103 unsigned int expected;
109 if (ioread32(&priv->cca->sts) & CRB_CA_STS_ERROR)
112 memcpy_fromio(buf, priv->rsp, 6);
113 expected = be32_to_cpup((__be32 *) &buf[2]);
115 if (expected > count)
118 memcpy_fromio(&buf[6], &priv->rsp[6], expected - 6);
123 static int crb_do_acpi_start(struct tpm_chip *chip)
125 union acpi_object *obj;
128 obj = acpi_evaluate_dsm(chip->acpi_dev_handle,
130 CRB_ACPI_START_REVISION_ID,
131 CRB_ACPI_START_INDEX,
135 rc = obj->integer.value == 0 ? 0 : -ENXIO;
140 static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len)
142 struct crb_priv *priv = chip->vendor.priv;
145 if (len > ioread32(&priv->cca->cmd_size)) {
147 "invalid command count value %x %zx\n",
149 (size_t) ioread32(&priv->cca->cmd_size));
153 memcpy_toio(priv->cmd, buf, len);
155 /* Make sure that cmd is populated before issuing start. */
158 if (priv->flags & CRB_FL_CRB_START)
159 iowrite32(cpu_to_le32(CRB_START_INVOKE), &priv->cca->start);
161 if (priv->flags & CRB_FL_ACPI_START)
162 rc = crb_do_acpi_start(chip);
167 static void crb_cancel(struct tpm_chip *chip)
169 struct crb_priv *priv = chip->vendor.priv;
171 iowrite32(cpu_to_le32(CRB_CANCEL_INVOKE), &priv->cca->cancel);
173 /* Make sure that cmd is populated before issuing cancel. */
176 if ((priv->flags & CRB_FL_ACPI_START) && crb_do_acpi_start(chip))
177 dev_err(&chip->dev, "ACPI Start failed\n");
179 iowrite32(0, &priv->cca->cancel);
182 static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
184 struct crb_priv *priv = chip->vendor.priv;
185 u32 cancel = ioread32(&priv->cca->cancel);
187 return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;
190 static const struct tpm_class_ops tpm_crb = {
191 .status = crb_status,
194 .cancel = crb_cancel,
195 .req_canceled = crb_req_canceled,
196 .req_complete_mask = CRB_STS_COMPLETE,
197 .req_complete_val = CRB_STS_COMPLETE,
200 static int crb_init(struct acpi_device *device, struct crb_priv *priv)
202 struct tpm_chip *chip;
205 chip = tpmm_chip_alloc(&device->dev, &tpm_crb);
207 return PTR_ERR(chip);
209 chip->vendor.priv = priv;
210 chip->acpi_dev_handle = device->handle;
211 chip->flags = TPM_CHIP_FLAG_TPM2;
213 rc = tpm_get_timeouts(chip);
217 rc = tpm2_do_selftest(chip);
221 return tpm_chip_register(chip);
224 static int crb_check_resource(struct acpi_resource *ares, void *data)
226 struct resource *io_res = data;
229 if (acpi_dev_resource_memory(ares, &res)) {
237 static void __iomem *crb_map_res(struct device *dev, struct crb_priv *priv,
238 struct resource *io_res, u64 start, u32 size)
240 struct resource new_res = {
242 .end = start + size - 1,
243 .flags = IORESOURCE_MEM,
246 /* Detect a 64 bit address on a 32 bit system */
247 if (start != new_res.start)
248 return ERR_PTR(-EINVAL);
250 if (!resource_contains(io_res, &new_res))
251 return devm_ioremap_resource(dev, &new_res);
253 return priv->iobase + (new_res.start - io_res->start);
256 static int crb_map_io(struct acpi_device *device, struct crb_priv *priv,
257 struct acpi_table_tpm2 *buf)
259 struct list_head resources;
260 struct resource io_res;
261 struct device *dev = &device->dev;
265 INIT_LIST_HEAD(&resources);
266 ret = acpi_dev_get_resources(device, &resources, crb_check_resource,
270 acpi_dev_free_resource_list(&resources);
272 if (resource_type(&io_res) != IORESOURCE_MEM) {
274 FW_BUG "TPM2 ACPI table does not define a memory resource\n");
278 priv->iobase = devm_ioremap_resource(dev, &io_res);
279 if (IS_ERR(priv->iobase))
280 return PTR_ERR(priv->iobase);
282 priv->cca = crb_map_res(dev, priv, &io_res, buf->control_address,
284 if (IS_ERR(priv->cca))
285 return PTR_ERR(priv->cca);
287 pa = ((u64) ioread32(&priv->cca->cmd_pa_high) << 32) |
288 (u64) ioread32(&priv->cca->cmd_pa_low);
289 priv->cmd = crb_map_res(dev, priv, &io_res, pa,
290 ioread32(&priv->cca->cmd_size));
291 if (IS_ERR(priv->cmd))
292 return PTR_ERR(priv->cmd);
294 memcpy_fromio(&pa, &priv->cca->rsp_pa, 8);
295 pa = le64_to_cpu(pa);
296 priv->rsp = crb_map_res(dev, priv, &io_res, pa,
297 ioread32(&priv->cca->rsp_size));
298 return PTR_ERR_OR_ZERO(priv->rsp);
301 static int crb_acpi_add(struct acpi_device *device)
303 struct acpi_table_tpm2 *buf;
304 struct crb_priv *priv;
305 struct device *dev = &device->dev;
310 status = acpi_get_table(ACPI_SIG_TPM2, 1,
311 (struct acpi_table_header **) &buf);
312 if (ACPI_FAILURE(status) || buf->header.length < sizeof(*buf)) {
313 dev_err(dev, FW_BUG "failed to get TPM2 ACPI table\n");
317 /* Should the FIFO driver handle this? */
318 sm = buf->start_method;
319 if (sm == ACPI_TPM2_MEMORY_MAPPED)
322 priv = devm_kzalloc(dev, sizeof(struct crb_priv), GFP_KERNEL);
326 /* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs
327 * report only ACPI start but in practice seems to require both
328 * ACPI start and CRB start.
330 if (sm == ACPI_TPM2_COMMAND_BUFFER || sm == ACPI_TPM2_MEMORY_MAPPED ||
331 !strcmp(acpi_device_hid(device), "MSFT0101"))
332 priv->flags |= CRB_FL_CRB_START;
334 if (sm == ACPI_TPM2_START_METHOD ||
335 sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD)
336 priv->flags |= CRB_FL_ACPI_START;
338 rc = crb_map_io(device, priv, buf);
342 return crb_init(device, priv);
345 static int crb_acpi_remove(struct acpi_device *device)
347 struct device *dev = &device->dev;
348 struct tpm_chip *chip = dev_get_drvdata(dev);
350 tpm_chip_unregister(chip);
355 static struct acpi_device_id crb_device_ids[] = {
359 MODULE_DEVICE_TABLE(acpi, crb_device_ids);
361 static struct acpi_driver crb_acpi_driver = {
363 .ids = crb_device_ids,
366 .remove = crb_acpi_remove,
373 module_acpi_driver(crb_acpi_driver);
374 MODULE_AUTHOR("Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>");
375 MODULE_DESCRIPTION("TPM2 Driver");
376 MODULE_VERSION("0.1");
377 MODULE_LICENSE("GPL");