1 # SPDX-License-Identifier: GPL-2.0
7 config HAVE_CLK_PREPARE
12 select HAVE_CLK_PREPARE
17 The common clock framework is a single definition of struct
18 clk, useful across many platforms, as well as an
19 implementation of the clock API in include/linux/clk.h.
20 Architectures utilizing the common struct clk should select
23 menu "Common Clock Framework"
26 config COMMON_CLK_WM831X
27 tristate "Clock driver for WM831x/2x PMICs"
30 Supports the clocking subsystem of the WM831x/2x series of
31 PMICs from Wolfson Microelectronics.
33 source "drivers/clk/versatile/Kconfig"
36 bool "PLL Driver for HSDK platform"
37 depends on OF || COMPILE_TEST
39 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
42 config COMMON_CLK_MAX77686
43 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
44 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
46 This driver supports Maxim 77620/77686/77802 crystal oscillator
49 config COMMON_CLK_MAX9485
50 tristate "Maxim 9485 Programmable Clock Generator"
53 This driver supports Maxim 9485 Programmable Audio Clock Generator
55 config COMMON_CLK_RK808
56 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
59 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
60 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
61 Clkout1 is always on, Clkout2 can off by control register.
63 config COMMON_CLK_HI655X
64 tristate "Clock driver for Hi655x" if EXPERT
65 depends on (MFD_HI655X_PMIC || COMPILE_TEST)
67 default MFD_HI655X_PMIC
69 This driver supports the hi655x PMIC clock. This
70 multi-function device has one fixed-rate oscillator, clocked
73 config COMMON_CLK_SCMI
74 tristate "Clock driver controlled via SCMI interface"
75 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
77 This driver provides support for clocks that are controlled
78 by firmware that implements the SCMI interface.
80 This driver uses SCMI Message Protocol to interact with the
81 firmware providing all the clock controls.
83 config COMMON_CLK_SCPI
84 tristate "Clock driver controlled via SCPI interface"
85 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
87 This driver provides support for clocks that are controlled
88 by firmware that implements the SCPI interface.
90 This driver uses SCPI Message Protocol to interact with the
91 firmware providing all the clock controls.
93 config COMMON_CLK_SI5341
94 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
98 This driver supports Silicon Labs Si5341 and Si5340 programmable clock
99 generators. Not all features of these chips are currently supported
100 by the driver, in particular it only supports XTAL input. The chip can
101 be pre-programmed to support other configurations and features not yet
102 implemented in the driver.
104 config COMMON_CLK_SI5351
105 tristate "Clock driver for SiLabs 5351A/B/C"
110 This driver supports Silicon Labs 5351A/B/C programmable clock
113 config COMMON_CLK_SI514
114 tristate "Clock driver for SiLabs 514 devices"
119 This driver supports the Silicon Labs 514 programmable clock
122 config COMMON_CLK_SI544
123 tristate "Clock driver for SiLabs 544 devices"
127 This driver supports the Silicon Labs 544 programmable clock
130 config COMMON_CLK_SI570
131 tristate "Clock driver for SiLabs 570 and compatible devices"
136 This driver supports Silicon Labs 570/571/598/599 programmable
139 config COMMON_CLK_CDCE706
140 tristate "Clock driver for TI CDCE706 clock synthesizer"
145 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
147 config COMMON_CLK_CDCE925
148 tristate "Clock driver for TI CDCE913/925/937/949 devices"
153 This driver supports the TI CDCE913/925/937/949 programmable clock
154 synthesizer. Each chip has different number of PLLs and outputs.
155 For example, the CDCE925 contains two PLLs with spread-spectrum
156 clocking support and five output dividers. The driver only supports
157 the following setup, and uses a fixed setting for the output muxes.
158 Y1 is derived from the input clock
159 Y2 and Y3 derive from PLL1
160 Y4 and Y5 derive from PLL2
161 Given a target output frequency, the driver will set the PLL and
162 divider to best approximate the desired output.
164 config COMMON_CLK_CS2000_CP
165 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
168 If you say yes here you get support for the CS2000 clock multiplier.
170 config COMMON_CLK_GEMINI
171 bool "Clock driver for Cortina Systems Gemini SoC"
172 depends on ARCH_GEMINI || COMPILE_TEST
174 select RESET_CONTROLLER
176 This driver supports the SoC clocks on the Cortina Systems Gemini
177 platform, also known as SL3516 or CS3516.
179 config COMMON_CLK_ASPEED
180 bool "Clock driver for Aspeed BMC SoCs"
181 depends on ARCH_ASPEED || COMPILE_TEST
184 select RESET_CONTROLLER
186 This driver supports the SoC clocks on the Aspeed BMC platforms.
188 The G4 and G5 series, including the ast2400 and ast2500, are supported
191 config COMMON_CLK_S2MPS11
192 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
193 depends on MFD_SEC_CORE || COMPILE_TEST
195 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
196 clock. These multi-function devices have two (S2MPS14) or three
197 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
200 tristate "External McPDM functional clock from twl6040"
201 depends on TWL6040_CORE
203 Enable the external functional clock support on OMAP4+ platforms for
204 McPDM. McPDM module is using the external bit clock on the McPDM bus
207 config COMMON_CLK_AXI_CLKGEN
208 tristate "AXI clkgen driver"
209 depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
211 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
212 FPGAs. It is commonly used in Analog Devices' reference designs.
215 bool "Clock driver for Freescale QorIQ platforms"
216 depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
218 This adds the clock driver support for Freescale QorIQ platforms
219 using common clock framework.
221 config COMMON_CLK_XGENE
222 bool "Clock driver for APM XGene SoC"
224 depends on ARM64 || COMPILE_TEST
226 Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
228 config COMMON_CLK_LOCHNAGAR
229 tristate "Cirrus Logic Lochnagar clock driver"
230 depends on MFD_LOCHNAGAR
232 This driver supports the clocking features of the Cirrus Logic
233 Lochnagar audio development board.
235 config COMMON_CLK_NXP
236 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
237 select REGMAP_MMIO if ARCH_LPC32XX
238 select MFD_SYSCON if ARCH_LPC18XX
240 Support for clock providers on NXP platforms.
242 config COMMON_CLK_PALMAS
243 tristate "Clock driver for TI Palmas devices"
244 depends on MFD_PALMAS
246 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
247 using common clock framework.
249 config COMMON_CLK_PWM
250 tristate "Clock driver for PWMs used as clock outputs"
253 Adapter driver so that any PWM output can be (mis)used as clock signal
256 config COMMON_CLK_PXA
257 def_bool COMMON_CLK && ARCH_PXA
259 Support for the Marvell PXA SoC.
261 config COMMON_CLK_PIC32
262 def_bool COMMON_CLK && MACH_PIC32
264 config COMMON_CLK_OXNAS
265 bool "Clock driver for the OXNAS SoC Family"
266 depends on ARCH_OXNAS || COMPILE_TEST
269 Support for the OXNAS SoC Family clocks.
271 config COMMON_CLK_VC5
272 tristate "Clock driver for IDT VersaClock 5,6 devices"
277 This driver supports the IDT VersaClock 5 and VersaClock 6
278 programmable clock generators.
280 config COMMON_CLK_STM32MP157
281 def_bool COMMON_CLK && MACH_STM32MP157
283 Support for stm32mp157 SoC family clocks
285 config COMMON_CLK_STM32F
286 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
288 Support for stm32f4 and stm32f7 SoC families clocks
290 config COMMON_CLK_STM32H7
291 def_bool COMMON_CLK && MACH_STM32H743
293 Support for stm32h7 SoC family clocks
295 config COMMON_CLK_BD718XX
296 tristate "Clock driver for ROHM BD718x7 PMIC"
297 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528
299 This driver supports ROHM BD71837, ROHM BD71847 and
300 ROHM BD70528 PMICs clock gates.
302 config COMMON_CLK_FIXED_MMIO
303 bool "Clock driver for Memory Mapped Fixed values"
304 depends on COMMON_CLK && OF
306 Support for Memory Mapped IO Fixed clocks
308 source "drivers/clk/actions/Kconfig"
309 source "drivers/clk/analogbits/Kconfig"
310 source "drivers/clk/bcm/Kconfig"
311 source "drivers/clk/hisilicon/Kconfig"
312 source "drivers/clk/imgtec/Kconfig"
313 source "drivers/clk/imx/Kconfig"
314 source "drivers/clk/ingenic/Kconfig"
315 source "drivers/clk/keystone/Kconfig"
316 source "drivers/clk/mediatek/Kconfig"
317 source "drivers/clk/meson/Kconfig"
318 source "drivers/clk/mvebu/Kconfig"
319 source "drivers/clk/qcom/Kconfig"
320 source "drivers/clk/renesas/Kconfig"
321 source "drivers/clk/samsung/Kconfig"
322 source "drivers/clk/sifive/Kconfig"
323 source "drivers/clk/sprd/Kconfig"
324 source "drivers/clk/sunxi/Kconfig"
325 source "drivers/clk/sunxi-ng/Kconfig"
326 source "drivers/clk/tegra/Kconfig"
327 source "drivers/clk/ti/Kconfig"
328 source "drivers/clk/uniphier/Kconfig"
329 source "drivers/clk/zynqmp/Kconfig"