1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/clk-provider.h>
7 #include <linux/slab.h>
8 #include <linux/spinlock.h>
12 #define CCDR_MMDC_CH0_MASK BIT(17)
13 #define CCDR_MMDC_CH1_MASK BIT(16)
15 DEFINE_SPINLOCK(imx_ccm_lock);
17 void __init imx_mmdc_mask_handshake(void __iomem *ccm_base,
22 reg = readl_relaxed(ccm_base + CCM_CCDR);
23 reg |= chn == 0 ? CCDR_MMDC_CH0_MASK : CCDR_MMDC_CH1_MASK;
24 writel_relaxed(reg, ccm_base + CCM_CCDR);
27 void imx_check_clocks(struct clk *clks[], unsigned int count)
31 for (i = 0; i < count; i++)
33 pr_err("i.MX clk %u: register failed with %ld\n",
37 void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count)
41 for (i = 0; i < count; i++)
43 pr_err("i.MX clk %u: register failed with %ld\n",
47 static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
49 struct of_phandle_args phandle;
50 struct clk *clk = ERR_PTR(-ENODEV);
53 path = kasprintf(GFP_KERNEL, "/clocks/%s", name);
55 return ERR_PTR(-ENOMEM);
57 phandle.np = of_find_node_by_path(path);
61 clk = of_clk_get_from_provider(&phandle);
62 of_node_put(phandle.np);
67 struct clk * __init imx_obtain_fixed_clock(
68 const char *name, unsigned long rate)
72 clk = imx_obtain_fixed_clock_from_dt(name);
74 clk = imx_clk_fixed(name, rate);
78 struct clk_hw * __init imx_obtain_fixed_clock_hw(
79 const char *name, unsigned long rate)
83 clk = imx_obtain_fixed_clock_from_dt(name);
85 clk = imx_clk_fixed(name, rate);
86 return __clk_get_hw(clk);
89 struct clk_hw * __init imx_obtain_fixed_clk_hw(struct device_node *np,
94 clk = of_clk_get_by_name(np, name);
96 return ERR_PTR(-ENOENT);
98 return __clk_get_hw(clk);
102 * This fixups the register CCM_CSCMR1 write value.
103 * The write/read/divider values of the aclk_podf field
104 * of that register have the relationship described by
105 * the following table:
107 * write value read value divider
115 * 3b'111 3b'001 2(default)
117 * That's why we do the xor operation below.
119 #define CSCMR1_FIXUP 0x00600000
121 void imx_cscmr1_fixup(u32 *val)
123 *val ^= CSCMR1_FIXUP;
127 static int imx_keep_uart_clocks;
128 static struct clk ** const *imx_uart_clocks;
130 static int __init imx_keep_uart_clocks_param(char *str)
132 imx_keep_uart_clocks = 1;
136 __setup_param("earlycon", imx_keep_uart_earlycon,
137 imx_keep_uart_clocks_param, 0);
138 __setup_param("earlyprintk", imx_keep_uart_earlyprintk,
139 imx_keep_uart_clocks_param, 0);
141 void imx_register_uart_clocks(struct clk ** const clks[])
143 if (imx_keep_uart_clocks) {
146 imx_uart_clocks = clks;
147 for (i = 0; imx_uart_clocks[i]; i++)
148 clk_prepare_enable(*imx_uart_clocks[i]);
152 static int __init imx_clk_disable_uart(void)
154 if (imx_keep_uart_clocks && imx_uart_clocks) {
157 for (i = 0; imx_uart_clocks[i]; i++)
158 clk_disable_unprepare(*imx_uart_clocks[i]);
163 late_initcall_sync(imx_clk_disable_uart);