1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012, 2013, NVIDIA CORPORATION. All rights reserved.
7 #include <linux/clk-provider.h>
9 #include <linux/of_address.h>
10 #include <linux/delay.h>
11 #include <linux/export.h>
12 #include <linux/clk/tegra.h>
18 #define OSC_CTRL_OSC_FREQ_SHIFT 28
19 #define OSC_CTRL_PLL_REF_DIV_SHIFT 26
21 int __init tegra_osc_clk_init(void __iomem *clk_base, struct tegra_clk *clks,
22 unsigned long *input_freqs, unsigned int num,
23 unsigned int clk_m_div, unsigned long *osc_freq,
24 unsigned long *pll_ref_freq)
26 struct clk *clk, *osc;
31 val = readl_relaxed(clk_base + OSC_CTRL);
32 osc_idx = val >> OSC_CTRL_OSC_FREQ_SHIFT;
35 *osc_freq = input_freqs[osc_idx];
44 osc = clk_register_fixed_rate(NULL, "osc", NULL, 0, *osc_freq);
46 dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m, clks);
50 clk = clk_register_fixed_factor(NULL, "clk_m", "osc",
55 val = (val >> OSC_CTRL_PLL_REF_DIV_SHIFT) & 3;
56 pll_ref_div = 1 << val;
57 dt_clk = tegra_lookup_dt_id(tegra_clk_pll_ref, clks);
61 clk = clk_register_fixed_factor(NULL, "pll_ref", "osc",
66 *pll_ref_freq = *osc_freq / pll_ref_div;
71 void __init tegra_fixed_clk_init(struct tegra_clk *tegra_clks)
77 dt_clk = tegra_lookup_dt_id(tegra_clk_clk_32k, tegra_clks);
79 clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768);
84 dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m_div2, tegra_clks);
86 clk = clk_register_fixed_factor(NULL, "clk_m_div2", "clk_m",
87 CLK_SET_RATE_PARENT, 1, 2);
92 dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m_div4, tegra_clks);
94 clk = clk_register_fixed_factor(NULL, "clk_m_div4", "clk_m",
95 CLK_SET_RATE_PARENT, 1, 4);