1 // SPDX-License-Identifier: GPL-2.0
5 * Support for ATMEL DES/TDES HW acceleration.
7 * Copyright (c) 2012 Eukréa Electromatique - ATMEL
8 * Author: Nicolas Royer <nicolas@eukrea.com>
10 * Some ideas are from omap-aes.c drivers.
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <linux/err.h>
18 #include <linux/clk.h>
20 #include <linux/hw_random.h>
21 #include <linux/platform_device.h>
23 #include <linux/device.h>
24 #include <linux/init.h>
25 #include <linux/errno.h>
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/scatterlist.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/of_device.h>
31 #include <linux/delay.h>
32 #include <linux/crypto.h>
33 #include <linux/cryptohash.h>
34 #include <crypto/scatterwalk.h>
35 #include <crypto/algapi.h>
36 #include <crypto/internal/des.h>
37 #include <crypto/hash.h>
38 #include <crypto/internal/hash.h>
39 #include <crypto/internal/skcipher.h>
40 #include <linux/platform_data/crypto-atmel.h>
41 #include "atmel-tdes-regs.h"
44 #define TDES_FLAGS_MODE_MASK 0x00ff
45 #define TDES_FLAGS_ENCRYPT BIT(0)
46 #define TDES_FLAGS_CBC BIT(1)
47 #define TDES_FLAGS_CFB BIT(2)
48 #define TDES_FLAGS_CFB8 BIT(3)
49 #define TDES_FLAGS_CFB16 BIT(4)
50 #define TDES_FLAGS_CFB32 BIT(5)
51 #define TDES_FLAGS_CFB64 BIT(6)
52 #define TDES_FLAGS_OFB BIT(7)
54 #define TDES_FLAGS_INIT BIT(16)
55 #define TDES_FLAGS_FAST BIT(17)
56 #define TDES_FLAGS_BUSY BIT(18)
57 #define TDES_FLAGS_DMA BIT(19)
59 #define ATMEL_TDES_QUEUE_LENGTH 50
61 #define CFB8_BLOCK_SIZE 1
62 #define CFB16_BLOCK_SIZE 2
63 #define CFB32_BLOCK_SIZE 4
65 struct atmel_tdes_caps {
70 struct atmel_tdes_dev;
72 struct atmel_tdes_ctx {
73 struct atmel_tdes_dev *dd;
76 u32 key[DES3_EDE_KEY_SIZE / sizeof(u32)];
82 struct atmel_tdes_reqctx {
86 struct atmel_tdes_dma {
87 struct dma_chan *chan;
88 struct dma_slave_config dma_conf;
91 struct atmel_tdes_dev {
92 struct list_head list;
93 unsigned long phys_base;
94 void __iomem *io_base;
96 struct atmel_tdes_ctx *ctx;
105 struct crypto_queue queue;
107 struct tasklet_struct done_task;
108 struct tasklet_struct queue_task;
110 struct skcipher_request *req;
113 struct scatterlist *in_sg;
114 unsigned int nb_in_sg;
116 struct scatterlist *out_sg;
117 unsigned int nb_out_sg;
125 dma_addr_t dma_addr_in;
126 struct atmel_tdes_dma dma_lch_in;
130 dma_addr_t dma_addr_out;
131 struct atmel_tdes_dma dma_lch_out;
133 struct atmel_tdes_caps caps;
138 struct atmel_tdes_drv {
139 struct list_head dev_list;
143 static struct atmel_tdes_drv atmel_tdes = {
144 .dev_list = LIST_HEAD_INIT(atmel_tdes.dev_list),
145 .lock = __SPIN_LOCK_UNLOCKED(atmel_tdes.lock),
148 static int atmel_tdes_sg_copy(struct scatterlist **sg, size_t *offset,
149 void *buf, size_t buflen, size_t total, int out)
151 size_t count, off = 0;
153 while (buflen && total) {
154 count = min((*sg)->length - *offset, total);
155 count = min(count, buflen);
160 scatterwalk_map_and_copy(buf + off, *sg, *offset, count, out);
167 if (*offset == (*sg)->length) {
179 static inline u32 atmel_tdes_read(struct atmel_tdes_dev *dd, u32 offset)
181 return readl_relaxed(dd->io_base + offset);
184 static inline void atmel_tdes_write(struct atmel_tdes_dev *dd,
185 u32 offset, u32 value)
187 writel_relaxed(value, dd->io_base + offset);
190 static void atmel_tdes_write_n(struct atmel_tdes_dev *dd, u32 offset,
191 u32 *value, int count)
193 for (; count--; value++, offset += 4)
194 atmel_tdes_write(dd, offset, *value);
197 static struct atmel_tdes_dev *atmel_tdes_find_dev(struct atmel_tdes_ctx *ctx)
199 struct atmel_tdes_dev *tdes_dd = NULL;
200 struct atmel_tdes_dev *tmp;
202 spin_lock_bh(&atmel_tdes.lock);
204 list_for_each_entry(tmp, &atmel_tdes.dev_list, list) {
212 spin_unlock_bh(&atmel_tdes.lock);
217 static int atmel_tdes_hw_init(struct atmel_tdes_dev *dd)
221 err = clk_prepare_enable(dd->iclk);
225 if (!(dd->flags & TDES_FLAGS_INIT)) {
226 atmel_tdes_write(dd, TDES_CR, TDES_CR_SWRST);
227 dd->flags |= TDES_FLAGS_INIT;
234 static inline unsigned int atmel_tdes_get_version(struct atmel_tdes_dev *dd)
236 return atmel_tdes_read(dd, TDES_HW_VERSION) & 0x00000fff;
239 static void atmel_tdes_hw_version_init(struct atmel_tdes_dev *dd)
241 atmel_tdes_hw_init(dd);
243 dd->hw_version = atmel_tdes_get_version(dd);
246 "version: 0x%x\n", dd->hw_version);
248 clk_disable_unprepare(dd->iclk);
251 static void atmel_tdes_dma_callback(void *data)
253 struct atmel_tdes_dev *dd = data;
255 /* dma_lch_out - completed */
256 tasklet_schedule(&dd->done_task);
259 static int atmel_tdes_write_ctrl(struct atmel_tdes_dev *dd)
262 u32 valcr = 0, valmr = TDES_MR_SMOD_PDC;
264 err = atmel_tdes_hw_init(dd);
269 if (!dd->caps.has_dma)
270 atmel_tdes_write(dd, TDES_PTCR,
271 TDES_PTCR_TXTDIS | TDES_PTCR_RXTDIS);
273 /* MR register must be set before IV registers */
274 if (dd->ctx->keylen > (DES_KEY_SIZE << 1)) {
275 valmr |= TDES_MR_KEYMOD_3KEY;
276 valmr |= TDES_MR_TDESMOD_TDES;
277 } else if (dd->ctx->keylen > DES_KEY_SIZE) {
278 valmr |= TDES_MR_KEYMOD_2KEY;
279 valmr |= TDES_MR_TDESMOD_TDES;
281 valmr |= TDES_MR_TDESMOD_DES;
284 if (dd->flags & TDES_FLAGS_CBC) {
285 valmr |= TDES_MR_OPMOD_CBC;
286 } else if (dd->flags & TDES_FLAGS_CFB) {
287 valmr |= TDES_MR_OPMOD_CFB;
289 if (dd->flags & TDES_FLAGS_CFB8)
290 valmr |= TDES_MR_CFBS_8b;
291 else if (dd->flags & TDES_FLAGS_CFB16)
292 valmr |= TDES_MR_CFBS_16b;
293 else if (dd->flags & TDES_FLAGS_CFB32)
294 valmr |= TDES_MR_CFBS_32b;
295 else if (dd->flags & TDES_FLAGS_CFB64)
296 valmr |= TDES_MR_CFBS_64b;
297 } else if (dd->flags & TDES_FLAGS_OFB) {
298 valmr |= TDES_MR_OPMOD_OFB;
301 if ((dd->flags & TDES_FLAGS_ENCRYPT) || (dd->flags & TDES_FLAGS_OFB))
302 valmr |= TDES_MR_CYPHER_ENC;
304 atmel_tdes_write(dd, TDES_CR, valcr);
305 atmel_tdes_write(dd, TDES_MR, valmr);
307 atmel_tdes_write_n(dd, TDES_KEY1W1R, dd->ctx->key,
308 dd->ctx->keylen >> 2);
310 if (((dd->flags & TDES_FLAGS_CBC) || (dd->flags & TDES_FLAGS_CFB) ||
311 (dd->flags & TDES_FLAGS_OFB)) && dd->req->iv) {
312 atmel_tdes_write_n(dd, TDES_IV1R, (void *)dd->req->iv, 2);
318 static int atmel_tdes_crypt_pdc_stop(struct atmel_tdes_dev *dd)
323 atmel_tdes_write(dd, TDES_PTCR, TDES_PTCR_TXTDIS|TDES_PTCR_RXTDIS);
325 if (dd->flags & TDES_FLAGS_FAST) {
326 dma_unmap_sg(dd->dev, dd->out_sg, 1, DMA_FROM_DEVICE);
327 dma_unmap_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
329 dma_sync_single_for_device(dd->dev, dd->dma_addr_out,
330 dd->dma_size, DMA_FROM_DEVICE);
333 count = atmel_tdes_sg_copy(&dd->out_sg, &dd->out_offset,
334 dd->buf_out, dd->buflen, dd->dma_size, 1);
335 if (count != dd->dma_size) {
337 pr_err("not all data converted: %zu\n", count);
344 static int atmel_tdes_buff_init(struct atmel_tdes_dev *dd)
348 dd->buf_in = (void *)__get_free_pages(GFP_KERNEL, 0);
349 dd->buf_out = (void *)__get_free_pages(GFP_KERNEL, 0);
350 dd->buflen = PAGE_SIZE;
351 dd->buflen &= ~(DES_BLOCK_SIZE - 1);
353 if (!dd->buf_in || !dd->buf_out) {
354 dev_err(dd->dev, "unable to alloc pages.\n");
359 dd->dma_addr_in = dma_map_single(dd->dev, dd->buf_in,
360 dd->buflen, DMA_TO_DEVICE);
361 if (dma_mapping_error(dd->dev, dd->dma_addr_in)) {
362 dev_err(dd->dev, "dma %zd bytes error\n", dd->buflen);
367 dd->dma_addr_out = dma_map_single(dd->dev, dd->buf_out,
368 dd->buflen, DMA_FROM_DEVICE);
369 if (dma_mapping_error(dd->dev, dd->dma_addr_out)) {
370 dev_err(dd->dev, "dma %zd bytes error\n", dd->buflen);
378 dma_unmap_single(dd->dev, dd->dma_addr_in, dd->buflen,
382 free_page((unsigned long)dd->buf_out);
383 free_page((unsigned long)dd->buf_in);
385 pr_err("error: %d\n", err);
389 static void atmel_tdes_buff_cleanup(struct atmel_tdes_dev *dd)
391 dma_unmap_single(dd->dev, dd->dma_addr_out, dd->buflen,
393 dma_unmap_single(dd->dev, dd->dma_addr_in, dd->buflen,
395 free_page((unsigned long)dd->buf_out);
396 free_page((unsigned long)dd->buf_in);
399 static int atmel_tdes_crypt_pdc(struct crypto_tfm *tfm, dma_addr_t dma_addr_in,
400 dma_addr_t dma_addr_out, int length)
402 struct atmel_tdes_ctx *ctx = crypto_tfm_ctx(tfm);
403 struct atmel_tdes_dev *dd = ctx->dd;
406 dd->dma_size = length;
408 if (!(dd->flags & TDES_FLAGS_FAST)) {
409 dma_sync_single_for_device(dd->dev, dma_addr_in, length,
413 if ((dd->flags & TDES_FLAGS_CFB) && (dd->flags & TDES_FLAGS_CFB8))
414 len32 = DIV_ROUND_UP(length, sizeof(u8));
415 else if ((dd->flags & TDES_FLAGS_CFB) && (dd->flags & TDES_FLAGS_CFB16))
416 len32 = DIV_ROUND_UP(length, sizeof(u16));
418 len32 = DIV_ROUND_UP(length, sizeof(u32));
420 atmel_tdes_write(dd, TDES_PTCR, TDES_PTCR_TXTDIS|TDES_PTCR_RXTDIS);
421 atmel_tdes_write(dd, TDES_TPR, dma_addr_in);
422 atmel_tdes_write(dd, TDES_TCR, len32);
423 atmel_tdes_write(dd, TDES_RPR, dma_addr_out);
424 atmel_tdes_write(dd, TDES_RCR, len32);
426 /* Enable Interrupt */
427 atmel_tdes_write(dd, TDES_IER, TDES_INT_ENDRX);
429 /* Start DMA transfer */
430 atmel_tdes_write(dd, TDES_PTCR, TDES_PTCR_TXTEN | TDES_PTCR_RXTEN);
435 static int atmel_tdes_crypt_dma(struct crypto_tfm *tfm, dma_addr_t dma_addr_in,
436 dma_addr_t dma_addr_out, int length)
438 struct atmel_tdes_ctx *ctx = crypto_tfm_ctx(tfm);
439 struct atmel_tdes_dev *dd = ctx->dd;
440 struct scatterlist sg[2];
441 struct dma_async_tx_descriptor *in_desc, *out_desc;
443 dd->dma_size = length;
445 if (!(dd->flags & TDES_FLAGS_FAST)) {
446 dma_sync_single_for_device(dd->dev, dma_addr_in, length,
450 if (dd->flags & TDES_FLAGS_CFB8) {
451 dd->dma_lch_in.dma_conf.dst_addr_width =
452 DMA_SLAVE_BUSWIDTH_1_BYTE;
453 dd->dma_lch_out.dma_conf.src_addr_width =
454 DMA_SLAVE_BUSWIDTH_1_BYTE;
455 } else if (dd->flags & TDES_FLAGS_CFB16) {
456 dd->dma_lch_in.dma_conf.dst_addr_width =
457 DMA_SLAVE_BUSWIDTH_2_BYTES;
458 dd->dma_lch_out.dma_conf.src_addr_width =
459 DMA_SLAVE_BUSWIDTH_2_BYTES;
461 dd->dma_lch_in.dma_conf.dst_addr_width =
462 DMA_SLAVE_BUSWIDTH_4_BYTES;
463 dd->dma_lch_out.dma_conf.src_addr_width =
464 DMA_SLAVE_BUSWIDTH_4_BYTES;
467 dmaengine_slave_config(dd->dma_lch_in.chan, &dd->dma_lch_in.dma_conf);
468 dmaengine_slave_config(dd->dma_lch_out.chan, &dd->dma_lch_out.dma_conf);
470 dd->flags |= TDES_FLAGS_DMA;
472 sg_init_table(&sg[0], 1);
473 sg_dma_address(&sg[0]) = dma_addr_in;
474 sg_dma_len(&sg[0]) = length;
476 sg_init_table(&sg[1], 1);
477 sg_dma_address(&sg[1]) = dma_addr_out;
478 sg_dma_len(&sg[1]) = length;
480 in_desc = dmaengine_prep_slave_sg(dd->dma_lch_in.chan, &sg[0],
482 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
486 out_desc = dmaengine_prep_slave_sg(dd->dma_lch_out.chan, &sg[1],
488 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
492 out_desc->callback = atmel_tdes_dma_callback;
493 out_desc->callback_param = dd;
495 dmaengine_submit(out_desc);
496 dma_async_issue_pending(dd->dma_lch_out.chan);
498 dmaengine_submit(in_desc);
499 dma_async_issue_pending(dd->dma_lch_in.chan);
504 static int atmel_tdes_crypt_start(struct atmel_tdes_dev *dd)
506 struct crypto_tfm *tfm = crypto_skcipher_tfm(
507 crypto_skcipher_reqtfm(dd->req));
508 int err, fast = 0, in, out;
510 dma_addr_t addr_in, addr_out;
512 if ((!dd->in_offset) && (!dd->out_offset)) {
513 /* check for alignment */
514 in = IS_ALIGNED((u32)dd->in_sg->offset, sizeof(u32)) &&
515 IS_ALIGNED(dd->in_sg->length, dd->ctx->block_size);
516 out = IS_ALIGNED((u32)dd->out_sg->offset, sizeof(u32)) &&
517 IS_ALIGNED(dd->out_sg->length, dd->ctx->block_size);
520 if (sg_dma_len(dd->in_sg) != sg_dma_len(dd->out_sg))
526 count = min_t(size_t, dd->total, sg_dma_len(dd->in_sg));
527 count = min_t(size_t, count, sg_dma_len(dd->out_sg));
529 err = dma_map_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
531 dev_err(dd->dev, "dma_map_sg() error\n");
535 err = dma_map_sg(dd->dev, dd->out_sg, 1,
538 dev_err(dd->dev, "dma_map_sg() error\n");
539 dma_unmap_sg(dd->dev, dd->in_sg, 1,
544 addr_in = sg_dma_address(dd->in_sg);
545 addr_out = sg_dma_address(dd->out_sg);
547 dd->flags |= TDES_FLAGS_FAST;
550 /* use cache buffers */
551 count = atmel_tdes_sg_copy(&dd->in_sg, &dd->in_offset,
552 dd->buf_in, dd->buflen, dd->total, 0);
554 addr_in = dd->dma_addr_in;
555 addr_out = dd->dma_addr_out;
557 dd->flags &= ~TDES_FLAGS_FAST;
562 if (dd->caps.has_dma)
563 err = atmel_tdes_crypt_dma(tfm, addr_in, addr_out, count);
565 err = atmel_tdes_crypt_pdc(tfm, addr_in, addr_out, count);
567 if (err && (dd->flags & TDES_FLAGS_FAST)) {
568 dma_unmap_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
569 dma_unmap_sg(dd->dev, dd->out_sg, 1, DMA_TO_DEVICE);
575 static void atmel_tdes_finish_req(struct atmel_tdes_dev *dd, int err)
577 struct skcipher_request *req = dd->req;
579 clk_disable_unprepare(dd->iclk);
581 dd->flags &= ~TDES_FLAGS_BUSY;
583 req->base.complete(&req->base, err);
586 static int atmel_tdes_handle_queue(struct atmel_tdes_dev *dd,
587 struct skcipher_request *req)
589 struct crypto_async_request *async_req, *backlog;
590 struct atmel_tdes_ctx *ctx;
591 struct atmel_tdes_reqctx *rctx;
595 spin_lock_irqsave(&dd->lock, flags);
597 ret = crypto_enqueue_request(&dd->queue, &req->base);
598 if (dd->flags & TDES_FLAGS_BUSY) {
599 spin_unlock_irqrestore(&dd->lock, flags);
602 backlog = crypto_get_backlog(&dd->queue);
603 async_req = crypto_dequeue_request(&dd->queue);
605 dd->flags |= TDES_FLAGS_BUSY;
606 spin_unlock_irqrestore(&dd->lock, flags);
612 backlog->complete(backlog, -EINPROGRESS);
614 req = skcipher_request_cast(async_req);
616 /* assign new request to device */
618 dd->total = req->cryptlen;
620 dd->in_sg = req->src;
622 dd->out_sg = req->dst;
624 rctx = skcipher_request_ctx(req);
625 ctx = crypto_skcipher_ctx(crypto_skcipher_reqtfm(req));
626 rctx->mode &= TDES_FLAGS_MODE_MASK;
627 dd->flags = (dd->flags & ~TDES_FLAGS_MODE_MASK) | rctx->mode;
631 err = atmel_tdes_write_ctrl(dd);
633 err = atmel_tdes_crypt_start(dd);
635 /* des_task will not finish it, so do it here */
636 atmel_tdes_finish_req(dd, err);
637 tasklet_schedule(&dd->queue_task);
643 static int atmel_tdes_crypt_dma_stop(struct atmel_tdes_dev *dd)
648 if (dd->flags & TDES_FLAGS_DMA) {
650 if (dd->flags & TDES_FLAGS_FAST) {
651 dma_unmap_sg(dd->dev, dd->out_sg, 1, DMA_FROM_DEVICE);
652 dma_unmap_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
654 dma_sync_single_for_device(dd->dev, dd->dma_addr_out,
655 dd->dma_size, DMA_FROM_DEVICE);
658 count = atmel_tdes_sg_copy(&dd->out_sg, &dd->out_offset,
659 dd->buf_out, dd->buflen, dd->dma_size, 1);
660 if (count != dd->dma_size) {
662 pr_err("not all data converted: %zu\n", count);
669 static int atmel_tdes_crypt(struct skcipher_request *req, unsigned long mode)
671 struct atmel_tdes_ctx *ctx = crypto_skcipher_ctx(
672 crypto_skcipher_reqtfm(req));
673 struct atmel_tdes_reqctx *rctx = skcipher_request_ctx(req);
675 if (mode & TDES_FLAGS_CFB8) {
676 if (!IS_ALIGNED(req->cryptlen, CFB8_BLOCK_SIZE)) {
677 pr_err("request size is not exact amount of CFB8 blocks\n");
680 ctx->block_size = CFB8_BLOCK_SIZE;
681 } else if (mode & TDES_FLAGS_CFB16) {
682 if (!IS_ALIGNED(req->cryptlen, CFB16_BLOCK_SIZE)) {
683 pr_err("request size is not exact amount of CFB16 blocks\n");
686 ctx->block_size = CFB16_BLOCK_SIZE;
687 } else if (mode & TDES_FLAGS_CFB32) {
688 if (!IS_ALIGNED(req->cryptlen, CFB32_BLOCK_SIZE)) {
689 pr_err("request size is not exact amount of CFB32 blocks\n");
692 ctx->block_size = CFB32_BLOCK_SIZE;
694 if (!IS_ALIGNED(req->cryptlen, DES_BLOCK_SIZE)) {
695 pr_err("request size is not exact amount of DES blocks\n");
698 ctx->block_size = DES_BLOCK_SIZE;
703 return atmel_tdes_handle_queue(ctx->dd, req);
706 static bool atmel_tdes_filter(struct dma_chan *chan, void *slave)
708 struct at_dma_slave *sl = slave;
710 if (sl && sl->dma_dev == chan->device->dev) {
718 static int atmel_tdes_dma_init(struct atmel_tdes_dev *dd,
719 struct crypto_platform_data *pdata)
724 dma_cap_set(DMA_SLAVE, mask);
726 /* Try to grab 2 DMA channels */
727 dd->dma_lch_in.chan = dma_request_slave_channel_compat(mask,
728 atmel_tdes_filter, &pdata->dma_slave->rxdata, dd->dev, "tx");
729 if (!dd->dma_lch_in.chan)
732 dd->dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
733 dd->dma_lch_in.dma_conf.dst_addr = dd->phys_base +
735 dd->dma_lch_in.dma_conf.src_maxburst = 1;
736 dd->dma_lch_in.dma_conf.src_addr_width =
737 DMA_SLAVE_BUSWIDTH_4_BYTES;
738 dd->dma_lch_in.dma_conf.dst_maxburst = 1;
739 dd->dma_lch_in.dma_conf.dst_addr_width =
740 DMA_SLAVE_BUSWIDTH_4_BYTES;
741 dd->dma_lch_in.dma_conf.device_fc = false;
743 dd->dma_lch_out.chan = dma_request_slave_channel_compat(mask,
744 atmel_tdes_filter, &pdata->dma_slave->txdata, dd->dev, "rx");
745 if (!dd->dma_lch_out.chan)
748 dd->dma_lch_out.dma_conf.direction = DMA_DEV_TO_MEM;
749 dd->dma_lch_out.dma_conf.src_addr = dd->phys_base +
751 dd->dma_lch_out.dma_conf.src_maxburst = 1;
752 dd->dma_lch_out.dma_conf.src_addr_width =
753 DMA_SLAVE_BUSWIDTH_4_BYTES;
754 dd->dma_lch_out.dma_conf.dst_maxburst = 1;
755 dd->dma_lch_out.dma_conf.dst_addr_width =
756 DMA_SLAVE_BUSWIDTH_4_BYTES;
757 dd->dma_lch_out.dma_conf.device_fc = false;
762 dma_release_channel(dd->dma_lch_in.chan);
764 dev_warn(dd->dev, "no DMA channel available\n");
768 static void atmel_tdes_dma_cleanup(struct atmel_tdes_dev *dd)
770 dma_release_channel(dd->dma_lch_in.chan);
771 dma_release_channel(dd->dma_lch_out.chan);
774 static int atmel_des_setkey(struct crypto_skcipher *tfm, const u8 *key,
777 struct atmel_tdes_ctx *ctx = crypto_skcipher_ctx(tfm);
780 err = verify_skcipher_des_key(tfm, key);
784 memcpy(ctx->key, key, keylen);
785 ctx->keylen = keylen;
790 static int atmel_tdes_setkey(struct crypto_skcipher *tfm, const u8 *key,
793 struct atmel_tdes_ctx *ctx = crypto_skcipher_ctx(tfm);
796 err = verify_skcipher_des3_key(tfm, key);
800 memcpy(ctx->key, key, keylen);
801 ctx->keylen = keylen;
806 static int atmel_tdes_ecb_encrypt(struct skcipher_request *req)
808 return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT);
811 static int atmel_tdes_ecb_decrypt(struct skcipher_request *req)
813 return atmel_tdes_crypt(req, 0);
816 static int atmel_tdes_cbc_encrypt(struct skcipher_request *req)
818 return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_CBC);
821 static int atmel_tdes_cbc_decrypt(struct skcipher_request *req)
823 return atmel_tdes_crypt(req, TDES_FLAGS_CBC);
825 static int atmel_tdes_cfb_encrypt(struct skcipher_request *req)
827 return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_CFB);
830 static int atmel_tdes_cfb_decrypt(struct skcipher_request *req)
832 return atmel_tdes_crypt(req, TDES_FLAGS_CFB);
835 static int atmel_tdes_cfb8_encrypt(struct skcipher_request *req)
837 return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_CFB |
841 static int atmel_tdes_cfb8_decrypt(struct skcipher_request *req)
843 return atmel_tdes_crypt(req, TDES_FLAGS_CFB | TDES_FLAGS_CFB8);
846 static int atmel_tdes_cfb16_encrypt(struct skcipher_request *req)
848 return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_CFB |
852 static int atmel_tdes_cfb16_decrypt(struct skcipher_request *req)
854 return atmel_tdes_crypt(req, TDES_FLAGS_CFB | TDES_FLAGS_CFB16);
857 static int atmel_tdes_cfb32_encrypt(struct skcipher_request *req)
859 return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_CFB |
863 static int atmel_tdes_cfb32_decrypt(struct skcipher_request *req)
865 return atmel_tdes_crypt(req, TDES_FLAGS_CFB | TDES_FLAGS_CFB32);
868 static int atmel_tdes_ofb_encrypt(struct skcipher_request *req)
870 return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_OFB);
873 static int atmel_tdes_ofb_decrypt(struct skcipher_request *req)
875 return atmel_tdes_crypt(req, TDES_FLAGS_OFB);
878 static int atmel_tdes_init_tfm(struct crypto_skcipher *tfm)
880 struct atmel_tdes_ctx *ctx = crypto_skcipher_ctx(tfm);
881 struct atmel_tdes_dev *dd;
883 crypto_skcipher_set_reqsize(tfm, sizeof(struct atmel_tdes_reqctx));
885 dd = atmel_tdes_find_dev(ctx);
892 static struct skcipher_alg tdes_algs[] = {
894 .base.cra_name = "ecb(des)",
895 .base.cra_driver_name = "atmel-ecb-des",
896 .base.cra_priority = 100,
897 .base.cra_flags = CRYPTO_ALG_ASYNC,
898 .base.cra_blocksize = DES_BLOCK_SIZE,
899 .base.cra_ctxsize = sizeof(struct atmel_tdes_ctx),
900 .base.cra_alignmask = 0x7,
901 .base.cra_module = THIS_MODULE,
903 .init = atmel_tdes_init_tfm,
904 .min_keysize = DES_KEY_SIZE,
905 .max_keysize = DES_KEY_SIZE,
906 .setkey = atmel_des_setkey,
907 .encrypt = atmel_tdes_ecb_encrypt,
908 .decrypt = atmel_tdes_ecb_decrypt,
911 .base.cra_name = "cbc(des)",
912 .base.cra_driver_name = "atmel-cbc-des",
913 .base.cra_priority = 100,
914 .base.cra_flags = CRYPTO_ALG_ASYNC,
915 .base.cra_blocksize = DES_BLOCK_SIZE,
916 .base.cra_ctxsize = sizeof(struct atmel_tdes_ctx),
917 .base.cra_alignmask = 0x7,
918 .base.cra_module = THIS_MODULE,
920 .init = atmel_tdes_init_tfm,
921 .min_keysize = DES_KEY_SIZE,
922 .max_keysize = DES_KEY_SIZE,
923 .ivsize = DES_BLOCK_SIZE,
924 .setkey = atmel_des_setkey,
925 .encrypt = atmel_tdes_cbc_encrypt,
926 .decrypt = atmel_tdes_cbc_decrypt,
929 .base.cra_name = "cfb(des)",
930 .base.cra_driver_name = "atmel-cfb-des",
931 .base.cra_priority = 100,
932 .base.cra_flags = CRYPTO_ALG_ASYNC,
933 .base.cra_blocksize = DES_BLOCK_SIZE,
934 .base.cra_ctxsize = sizeof(struct atmel_tdes_ctx),
935 .base.cra_alignmask = 0x7,
936 .base.cra_module = THIS_MODULE,
938 .init = atmel_tdes_init_tfm,
939 .min_keysize = DES_KEY_SIZE,
940 .max_keysize = DES_KEY_SIZE,
941 .ivsize = DES_BLOCK_SIZE,
942 .setkey = atmel_des_setkey,
943 .encrypt = atmel_tdes_cfb_encrypt,
944 .decrypt = atmel_tdes_cfb_decrypt,
947 .base.cra_name = "cfb8(des)",
948 .base.cra_driver_name = "atmel-cfb8-des",
949 .base.cra_priority = 100,
950 .base.cra_flags = CRYPTO_ALG_ASYNC,
951 .base.cra_blocksize = CFB8_BLOCK_SIZE,
952 .base.cra_ctxsize = sizeof(struct atmel_tdes_ctx),
953 .base.cra_alignmask = 0,
954 .base.cra_module = THIS_MODULE,
956 .init = atmel_tdes_init_tfm,
957 .min_keysize = DES_KEY_SIZE,
958 .max_keysize = DES_KEY_SIZE,
959 .ivsize = DES_BLOCK_SIZE,
960 .setkey = atmel_des_setkey,
961 .encrypt = atmel_tdes_cfb8_encrypt,
962 .decrypt = atmel_tdes_cfb8_decrypt,
965 .base.cra_name = "cfb16(des)",
966 .base.cra_driver_name = "atmel-cfb16-des",
967 .base.cra_priority = 100,
968 .base.cra_flags = CRYPTO_ALG_ASYNC,
969 .base.cra_blocksize = CFB16_BLOCK_SIZE,
970 .base.cra_ctxsize = sizeof(struct atmel_tdes_ctx),
971 .base.cra_alignmask = 0x1,
972 .base.cra_module = THIS_MODULE,
974 .init = atmel_tdes_init_tfm,
975 .min_keysize = DES_KEY_SIZE,
976 .max_keysize = DES_KEY_SIZE,
977 .ivsize = DES_BLOCK_SIZE,
978 .setkey = atmel_des_setkey,
979 .encrypt = atmel_tdes_cfb16_encrypt,
980 .decrypt = atmel_tdes_cfb16_decrypt,
983 .base.cra_name = "cfb32(des)",
984 .base.cra_driver_name = "atmel-cfb32-des",
985 .base.cra_priority = 100,
986 .base.cra_flags = CRYPTO_ALG_ASYNC,
987 .base.cra_blocksize = CFB32_BLOCK_SIZE,
988 .base.cra_ctxsize = sizeof(struct atmel_tdes_ctx),
989 .base.cra_alignmask = 0x3,
990 .base.cra_module = THIS_MODULE,
992 .init = atmel_tdes_init_tfm,
993 .min_keysize = DES_KEY_SIZE,
994 .max_keysize = DES_KEY_SIZE,
995 .ivsize = DES_BLOCK_SIZE,
996 .setkey = atmel_des_setkey,
997 .encrypt = atmel_tdes_cfb32_encrypt,
998 .decrypt = atmel_tdes_cfb32_decrypt,
1001 .base.cra_name = "ofb(des)",
1002 .base.cra_driver_name = "atmel-ofb-des",
1003 .base.cra_priority = 100,
1004 .base.cra_flags = CRYPTO_ALG_ASYNC,
1005 .base.cra_blocksize = DES_BLOCK_SIZE,
1006 .base.cra_ctxsize = sizeof(struct atmel_tdes_ctx),
1007 .base.cra_alignmask = 0x7,
1008 .base.cra_module = THIS_MODULE,
1010 .init = atmel_tdes_init_tfm,
1011 .min_keysize = DES_KEY_SIZE,
1012 .max_keysize = DES_KEY_SIZE,
1013 .ivsize = DES_BLOCK_SIZE,
1014 .setkey = atmel_des_setkey,
1015 .encrypt = atmel_tdes_ofb_encrypt,
1016 .decrypt = atmel_tdes_ofb_decrypt,
1019 .base.cra_name = "ecb(des3_ede)",
1020 .base.cra_driver_name = "atmel-ecb-tdes",
1021 .base.cra_priority = 100,
1022 .base.cra_flags = CRYPTO_ALG_ASYNC,
1023 .base.cra_blocksize = DES_BLOCK_SIZE,
1024 .base.cra_ctxsize = sizeof(struct atmel_tdes_ctx),
1025 .base.cra_alignmask = 0x7,
1026 .base.cra_module = THIS_MODULE,
1028 .init = atmel_tdes_init_tfm,
1029 .min_keysize = DES3_EDE_KEY_SIZE,
1030 .max_keysize = DES3_EDE_KEY_SIZE,
1031 .setkey = atmel_tdes_setkey,
1032 .encrypt = atmel_tdes_ecb_encrypt,
1033 .decrypt = atmel_tdes_ecb_decrypt,
1036 .base.cra_name = "cbc(des3_ede)",
1037 .base.cra_driver_name = "atmel-cbc-tdes",
1038 .base.cra_priority = 100,
1039 .base.cra_flags = CRYPTO_ALG_ASYNC,
1040 .base.cra_blocksize = DES_BLOCK_SIZE,
1041 .base.cra_ctxsize = sizeof(struct atmel_tdes_ctx),
1042 .base.cra_alignmask = 0x7,
1043 .base.cra_module = THIS_MODULE,
1045 .init = atmel_tdes_init_tfm,
1046 .min_keysize = DES3_EDE_KEY_SIZE,
1047 .max_keysize = DES3_EDE_KEY_SIZE,
1048 .setkey = atmel_tdes_setkey,
1049 .encrypt = atmel_tdes_cbc_encrypt,
1050 .decrypt = atmel_tdes_cbc_decrypt,
1051 .ivsize = DES_BLOCK_SIZE,
1054 .base.cra_name = "ofb(des3_ede)",
1055 .base.cra_driver_name = "atmel-ofb-tdes",
1056 .base.cra_priority = 100,
1057 .base.cra_flags = CRYPTO_ALG_ASYNC,
1058 .base.cra_blocksize = DES_BLOCK_SIZE,
1059 .base.cra_ctxsize = sizeof(struct atmel_tdes_ctx),
1060 .base.cra_alignmask = 0x7,
1061 .base.cra_module = THIS_MODULE,
1063 .init = atmel_tdes_init_tfm,
1064 .min_keysize = DES3_EDE_KEY_SIZE,
1065 .max_keysize = DES3_EDE_KEY_SIZE,
1066 .setkey = atmel_tdes_setkey,
1067 .encrypt = atmel_tdes_ofb_encrypt,
1068 .decrypt = atmel_tdes_ofb_decrypt,
1069 .ivsize = DES_BLOCK_SIZE,
1073 static void atmel_tdes_queue_task(unsigned long data)
1075 struct atmel_tdes_dev *dd = (struct atmel_tdes_dev *)data;
1077 atmel_tdes_handle_queue(dd, NULL);
1080 static void atmel_tdes_done_task(unsigned long data)
1082 struct atmel_tdes_dev *dd = (struct atmel_tdes_dev *) data;
1085 if (!(dd->flags & TDES_FLAGS_DMA))
1086 err = atmel_tdes_crypt_pdc_stop(dd);
1088 err = atmel_tdes_crypt_dma_stop(dd);
1090 err = dd->err ? : err;
1092 if (dd->total && !err) {
1093 if (dd->flags & TDES_FLAGS_FAST) {
1094 dd->in_sg = sg_next(dd->in_sg);
1095 dd->out_sg = sg_next(dd->out_sg);
1096 if (!dd->in_sg || !dd->out_sg)
1100 err = atmel_tdes_crypt_start(dd);
1102 return; /* DMA started. Not fininishing. */
1105 atmel_tdes_finish_req(dd, err);
1106 atmel_tdes_handle_queue(dd, NULL);
1109 static irqreturn_t atmel_tdes_irq(int irq, void *dev_id)
1111 struct atmel_tdes_dev *tdes_dd = dev_id;
1114 reg = atmel_tdes_read(tdes_dd, TDES_ISR);
1115 if (reg & atmel_tdes_read(tdes_dd, TDES_IMR)) {
1116 atmel_tdes_write(tdes_dd, TDES_IDR, reg);
1117 if (TDES_FLAGS_BUSY & tdes_dd->flags)
1118 tasklet_schedule(&tdes_dd->done_task);
1120 dev_warn(tdes_dd->dev, "TDES interrupt when no active requests.\n");
1127 static void atmel_tdes_unregister_algs(struct atmel_tdes_dev *dd)
1131 for (i = 0; i < ARRAY_SIZE(tdes_algs); i++)
1132 crypto_unregister_skcipher(&tdes_algs[i]);
1135 static int atmel_tdes_register_algs(struct atmel_tdes_dev *dd)
1139 for (i = 0; i < ARRAY_SIZE(tdes_algs); i++) {
1140 err = crypto_register_skcipher(&tdes_algs[i]);
1148 for (j = 0; j < i; j++)
1149 crypto_unregister_skcipher(&tdes_algs[j]);
1154 static void atmel_tdes_get_cap(struct atmel_tdes_dev *dd)
1157 dd->caps.has_dma = 0;
1158 dd->caps.has_cfb_3keys = 0;
1160 /* keep only major version number */
1161 switch (dd->hw_version & 0xf00) {
1163 dd->caps.has_dma = 1;
1164 dd->caps.has_cfb_3keys = 1;
1170 "Unmanaged tdes version, set minimum capabilities\n");
1175 #if defined(CONFIG_OF)
1176 static const struct of_device_id atmel_tdes_dt_ids[] = {
1177 { .compatible = "atmel,at91sam9g46-tdes" },
1180 MODULE_DEVICE_TABLE(of, atmel_tdes_dt_ids);
1182 static struct crypto_platform_data *atmel_tdes_of_init(struct platform_device *pdev)
1184 struct device_node *np = pdev->dev.of_node;
1185 struct crypto_platform_data *pdata;
1188 dev_err(&pdev->dev, "device node not found\n");
1189 return ERR_PTR(-EINVAL);
1192 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1194 return ERR_PTR(-ENOMEM);
1196 pdata->dma_slave = devm_kzalloc(&pdev->dev,
1197 sizeof(*(pdata->dma_slave)),
1199 if (!pdata->dma_slave)
1200 return ERR_PTR(-ENOMEM);
1204 #else /* CONFIG_OF */
1205 static inline struct crypto_platform_data *atmel_tdes_of_init(struct platform_device *pdev)
1207 return ERR_PTR(-EINVAL);
1211 static int atmel_tdes_probe(struct platform_device *pdev)
1213 struct atmel_tdes_dev *tdes_dd;
1214 struct crypto_platform_data *pdata;
1215 struct device *dev = &pdev->dev;
1216 struct resource *tdes_res;
1219 tdes_dd = devm_kmalloc(&pdev->dev, sizeof(*tdes_dd), GFP_KERNEL);
1220 if (tdes_dd == NULL) {
1227 platform_set_drvdata(pdev, tdes_dd);
1229 INIT_LIST_HEAD(&tdes_dd->list);
1230 spin_lock_init(&tdes_dd->lock);
1232 tasklet_init(&tdes_dd->done_task, atmel_tdes_done_task,
1233 (unsigned long)tdes_dd);
1234 tasklet_init(&tdes_dd->queue_task, atmel_tdes_queue_task,
1235 (unsigned long)tdes_dd);
1237 crypto_init_queue(&tdes_dd->queue, ATMEL_TDES_QUEUE_LENGTH);
1239 /* Get the base address */
1240 tdes_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1242 dev_err(dev, "no MEM resource info\n");
1246 tdes_dd->phys_base = tdes_res->start;
1249 tdes_dd->irq = platform_get_irq(pdev, 0);
1250 if (tdes_dd->irq < 0) {
1255 err = devm_request_irq(&pdev->dev, tdes_dd->irq, atmel_tdes_irq,
1256 IRQF_SHARED, "atmel-tdes", tdes_dd);
1258 dev_err(dev, "unable to request tdes irq.\n");
1262 /* Initializing the clock */
1263 tdes_dd->iclk = devm_clk_get(&pdev->dev, "tdes_clk");
1264 if (IS_ERR(tdes_dd->iclk)) {
1265 dev_err(dev, "clock initialization failed.\n");
1266 err = PTR_ERR(tdes_dd->iclk);
1270 tdes_dd->io_base = devm_ioremap_resource(&pdev->dev, tdes_res);
1271 if (IS_ERR(tdes_dd->io_base)) {
1272 dev_err(dev, "can't ioremap\n");
1273 err = PTR_ERR(tdes_dd->io_base);
1277 atmel_tdes_hw_version_init(tdes_dd);
1279 atmel_tdes_get_cap(tdes_dd);
1281 err = atmel_tdes_buff_init(tdes_dd);
1285 if (tdes_dd->caps.has_dma) {
1286 pdata = pdev->dev.platform_data;
1288 pdata = atmel_tdes_of_init(pdev);
1289 if (IS_ERR(pdata)) {
1290 dev_err(&pdev->dev, "platform data not available\n");
1291 err = PTR_ERR(pdata);
1295 if (!pdata->dma_slave) {
1299 err = atmel_tdes_dma_init(tdes_dd, pdata);
1303 dev_info(dev, "using %s, %s for DMA transfers\n",
1304 dma_chan_name(tdes_dd->dma_lch_in.chan),
1305 dma_chan_name(tdes_dd->dma_lch_out.chan));
1308 spin_lock(&atmel_tdes.lock);
1309 list_add_tail(&tdes_dd->list, &atmel_tdes.dev_list);
1310 spin_unlock(&atmel_tdes.lock);
1312 err = atmel_tdes_register_algs(tdes_dd);
1316 dev_info(dev, "Atmel DES/TDES\n");
1321 spin_lock(&atmel_tdes.lock);
1322 list_del(&tdes_dd->list);
1323 spin_unlock(&atmel_tdes.lock);
1324 if (tdes_dd->caps.has_dma)
1325 atmel_tdes_dma_cleanup(tdes_dd);
1328 atmel_tdes_buff_cleanup(tdes_dd);
1331 tasklet_kill(&tdes_dd->done_task);
1332 tasklet_kill(&tdes_dd->queue_task);
1334 dev_err(dev, "initialization failed.\n");
1339 static int atmel_tdes_remove(struct platform_device *pdev)
1341 struct atmel_tdes_dev *tdes_dd;
1343 tdes_dd = platform_get_drvdata(pdev);
1346 spin_lock(&atmel_tdes.lock);
1347 list_del(&tdes_dd->list);
1348 spin_unlock(&atmel_tdes.lock);
1350 atmel_tdes_unregister_algs(tdes_dd);
1352 tasklet_kill(&tdes_dd->done_task);
1353 tasklet_kill(&tdes_dd->queue_task);
1355 if (tdes_dd->caps.has_dma)
1356 atmel_tdes_dma_cleanup(tdes_dd);
1358 atmel_tdes_buff_cleanup(tdes_dd);
1363 static struct platform_driver atmel_tdes_driver = {
1364 .probe = atmel_tdes_probe,
1365 .remove = atmel_tdes_remove,
1367 .name = "atmel_tdes",
1368 .of_match_table = of_match_ptr(atmel_tdes_dt_ids),
1372 module_platform_driver(atmel_tdes_driver);
1374 MODULE_DESCRIPTION("Atmel DES/TDES hw acceleration support.");
1375 MODULE_LICENSE("GPL v2");
1376 MODULE_AUTHOR("Nicolas Royer - Eukréa Electromatique");