1 # SPDX-License-Identifier: GPL-2.0-only
3 # DMA engine configuration
7 bool "DMA Engine support"
10 DMA engines can do asynchronous data transfers without
11 involving the host CPU. Currently, this framework can be
12 used to offload memory copies in the network stack and
13 RAID operations in the MD driver. This menu only presents
14 DMA Device drivers supported by the configured arch, it may
15 be empty in some cases.
17 config DMADEVICES_DEBUG
18 bool "DMA Engine debugging"
19 depends on DMADEVICES != n
21 This is an option for use by developers; most people should
22 say N here. This enables DMA engine core and driver debugging.
24 config DMADEVICES_VDEBUG
25 bool "DMA Engine verbose debugging"
26 depends on DMADEVICES_DEBUG != n
28 This is an option for use by developers; most people should
29 say N here. This enables deeper (more verbose) debugging of
30 the DMA engine core and drivers.
38 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
41 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
47 config DMA_VIRTUAL_CHANNELS
61 tristate "Altera / Intel mSGDMA Engine"
64 Enable support for Altera / Intel mSGDMA controller.
67 bool "ARM PrimeCell PL080 or PL081 support"
70 select DMA_VIRTUAL_CHANNELS
72 Say yes if your platform has a PL08x DMAC device which can
73 provide DMA engine support. This includes the original ARM
74 PL080 and PL081, Samsungs PL080 derivative and Faraday
75 Technology's FTDMAC020 PL080 derivative.
77 config AMCC_PPC440SPE_ADMA
78 tristate "AMCC PPC440SPe ADMA support"
79 depends on 440SPe || 440SP
81 select DMA_ENGINE_RAID
82 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
83 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
85 Enable support for the AMCC PPC440SPe RAID engines.
88 tristate "Atmel AHB DMA support"
92 Support the Atmel AHB DMA controller.
95 tristate "Atmel XDMA support"
99 Support the Atmel XDMA controller.
102 tristate "Analog Devices AXI-DMAC DMA support"
103 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST
105 select DMA_VIRTUAL_CHANNELS
108 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
109 controller is often used in Analog Device's reference designs for FPGA
113 tristate "Broadcom SBA RAID engine support"
114 depends on ARM64 || COMPILE_TEST
115 depends on MAILBOX && RAID6_PQ
117 select DMA_ENGINE_RAID
118 select ASYNC_TX_DISABLE_XOR_VAL_DMA
119 select ASYNC_TX_DISABLE_PQ_VAL_DMA
120 default m if ARCH_BCM_IPROC
122 Enable support for Broadcom SBA RAID Engine. The SBA RAID
123 engine is available on most of the Broadcom iProc SoCs. It
124 has the capability to offload memcpy, xor and pq computation
128 bool "ST-Ericsson COH901318 DMA support"
130 depends on ARCH_U300 || COMPILE_TEST
132 Enable support for ST-Ericsson COH 901 318 DMA.
135 tristate "BCM2835 DMA engine support"
136 depends on ARCH_BCM2835
138 select DMA_VIRTUAL_CHANNELS
141 tristate "JZ4780 DMA support"
142 depends on MIPS || COMPILE_TEST
144 select DMA_VIRTUAL_CHANNELS
146 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
147 If you have a board based on such a SoC and wish to use DMA for
148 devices which can use the DMA controller, say Y or M here.
151 tristate "SA-11x0 DMA support"
152 depends on ARCH_SA1100 || COMPILE_TEST
154 select DMA_VIRTUAL_CHANNELS
156 Support the DMA engine found on Intel StrongARM SA-1100 and
157 SA-1110 SoCs. This DMA engine can only be used with on-chip
161 tristate "Allwinner A10 DMA SoCs support"
162 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
163 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
165 select DMA_VIRTUAL_CHANNELS
167 Enable support for the DMA controller present in the sun4i,
168 sun5i and sun7i Allwinner ARM SoCs.
171 tristate "Allwinner A31 SoCs DMA support"
172 depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
173 depends on RESET_CONTROLLER
175 select DMA_VIRTUAL_CHANNELS
177 Support for the DMA engine first found in Allwinner A31 SoCs.
180 tristate "Synopsys DesignWare AXI DMA support"
181 depends on OF || COMPILE_TEST
183 select DMA_VIRTUAL_CHANNELS
185 Enable support for Synopsys DesignWare AXI DMA controller.
186 NOTE: This driver wasn't tested on 64 bit platform because
187 of lack 64 bit platform with Synopsys DW AXI DMAC.
190 bool "Cirrus Logic EP93xx DMA support"
191 depends on ARCH_EP93XX || COMPILE_TEST
194 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
197 tristate "Freescale Elo series DMA support"
200 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
202 Enable support for the Freescale Elo series DMA controllers.
203 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
204 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
205 some Txxx and Bxxx parts.
208 tristate "Freescale eDMA engine support"
211 select DMA_VIRTUAL_CHANNELS
213 Support the Freescale eDMA engine with programmable channel
214 multiplexing capability for DMA request sources(slot).
215 This module can be found on Freescale Vybrid and LS-1 SoCs.
218 tristate "NXP Layerscape qDMA engine support"
219 depends on ARM || ARM64
221 select DMA_VIRTUAL_CHANNELS
222 select DMA_ENGINE_RAID
223 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
225 Support the NXP Layerscape qDMA engine with command queue and legacy mode.
226 Channel virtualization is supported through enqueuing of DMA jobs to,
227 or dequeuing DMA jobs from, different work queues.
228 This module can be found on NXP Layerscape SoCs.
229 The qdma driver only work on SoCs with a DPAA hardware block.
232 tristate "Freescale RAID engine Support"
233 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
235 select DMA_ENGINE_RAID
237 Enable support for Freescale RAID Engine. RAID Engine is
238 available on some QorIQ SoCs (like P5020/P5040). It has
239 the capability to offload memcpy, xor and pq computation
243 tristate "IMG MDC support"
244 depends on MIPS || COMPILE_TEST
245 depends on MFD_SYSCON
247 select DMA_VIRTUAL_CHANNELS
249 Enable support for the IMG multi-threaded DMA controller (MDC).
252 tristate "i.MX DMA support"
256 Support the i.MX DMA engine. This engine is integrated into
257 Freescale i.MX1/21/27 chips.
260 tristate "i.MX SDMA support"
263 select DMA_VIRTUAL_CHANNELS
265 Support the i.MX SDMA engine. This engine is integrated into
266 Freescale i.MX25/31/35/51/53/6 chips.
269 tristate "Intel integrated DMA 64-bit support"
271 select DMA_VIRTUAL_CHANNELS
273 Enable DMA support for Intel Low Power Subsystem such as found on
277 tristate "Intel I/OAT DMA support"
278 depends on PCI && X86_64
280 select DMA_ENGINE_RAID
283 Enable support for the Intel(R) I/OAT DMA engine present
284 in recent Intel Xeon chipsets.
286 Say Y here if you have such a chipset.
290 config INTEL_IOP_ADMA
291 tristate "Intel IOP32x ADMA support"
292 depends on ARCH_IOP32X || COMPILE_TEST
294 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
296 Enable support for the Intel(R) IOP Series RAID engines.
298 config INTEL_MIC_X100_DMA
299 tristate "Intel MIC X100 DMA Driver"
300 depends on 64BIT && X86 && INTEL_MIC_BUS
303 This enables DMA support for the Intel Many Integrated Core
304 (MIC) family of PCIe form factor coprocessor X100 devices that
305 run a 64 bit Linux OS. This driver will be used by both MIC
306 host and card drivers.
308 If you are building host kernel with a MIC device or a card
309 kernel for a MIC device, then say M (recommended) or Y, else
310 say N. If unsure say N.
312 More information about the Intel MIC family as well as the Linux
313 OS and tools for MIC to use with this driver are available from
314 <http://software.intel.com/en-us/mic-developer>.
317 tristate "Hisilicon K3 DMA support"
318 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
320 select DMA_VIRTUAL_CHANNELS
322 Support the DMA engine for Hisilicon K3 platform
325 config LPC18XX_DMAMUX
326 bool "NXP LPC18xx/43xx DMA MUX for PL080"
327 depends on ARCH_LPC18XX || COMPILE_TEST
328 depends on OF && AMBA_PL08X
331 Enable support for DMA on NXP LPC18xx/43xx platforms
332 with PL080 and multiplexed DMA request lines.
335 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
336 depends on M5441x || COMPILE_TEST
338 select DMA_VIRTUAL_CHANNELS
340 Support the Freescale ColdFire eDMA engine, 64-channel
341 implementation that performs complex data transfers with
342 minimal intervention from a host processor.
343 This module can be found on Freescale ColdFire mcf5441x SoCs.
346 bool "MMP PDMA support"
347 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
350 Support the MMP PDMA engine for PXA and MMP platform.
353 bool "MMP Two-Channel DMA support"
354 depends on ARCH_MMP || COMPILE_TEST
356 select MMP_SRAM if ARCH_MMP
357 select GENERIC_ALLOCATOR
359 Support the MMP Two-Channel DMA engine.
360 This engine used for MMP Audio DMA and pxa910 SQU.
361 It needs sram driver under mach-mmp.
364 tristate "MOXART DMA support"
365 depends on ARCH_MOXART
367 select DMA_VIRTUAL_CHANNELS
369 Enable support for the MOXA ART SoC DMA controller.
371 Say Y here if you enabled MMP ADMA, otherwise say N.
374 tristate "Freescale MPC512x built-in DMA engine support"
375 depends on PPC_MPC512x || PPC_MPC831x
378 Enable support for the Freescale MPC512x built-in DMA engine.
381 bool "Marvell XOR engine support"
382 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
384 select DMA_ENGINE_RAID
385 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
387 Enable support for the Marvell XOR engine.
390 bool "Marvell XOR engine version 2 support "
393 select DMA_ENGINE_RAID
394 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
395 select GENERIC_MSI_IRQ_DOMAIN
397 Enable support for the Marvell version 2 XOR engine.
399 This engine provides acceleration for copy, XOR and RAID6
400 operations, and is available on Marvell Armada 7K and 8K
404 bool "MXS DMA support"
405 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
409 Support the MXS DMA engine. This engine including APBH-DMA
410 and APBX-DMA is integrated into some Freescale chips.
413 bool "MX3x Image Processing Unit support"
418 If you plan to use the Image Processing unit in the i.MX3x, say
419 Y here. If unsure, select Y.
422 int "Number of dynamically mapped interrupts for IPU"
427 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
428 To avoid bloating the irq_desc[] array we allocate a sufficient
429 number of IRQ slots and map them dynamically to specific sources.
432 tristate "Renesas Type-AXI NBPF DMA support"
434 depends on ARM || COMPILE_TEST
436 Support for "Type-AXI" NBPF DMA IPs from Renesas
439 tristate "Actions Semi Owl SoCs DMA support"
440 depends on ARCH_ACTIONS
442 select DMA_VIRTUAL_CHANNELS
444 Enable support for the Actions Semi Owl SoCs DMA controller.
447 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
448 depends on PCI && (X86_32 || COMPILE_TEST)
451 Enable support for Intel EG20T PCH DMA engine.
453 This driver also can be used for LAPIS Semiconductor IOH(Input/
454 Output Hub), ML7213, ML7223 and ML7831.
455 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
456 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
457 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
458 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
461 tristate "DMA API Driver for PL330"
465 Select if your platform has one or more PL330 DMACs.
466 You need to provide platform specific settings via
467 platform_data for a dma-pl330 device.
470 bool "PXA DMA support"
471 depends on (ARCH_MMP || ARCH_PXA)
473 select DMA_VIRTUAL_CHANNELS
475 Support the DMA engine for PXA. It is also compatible with MMP PDMA
476 platform. The internal DMA IP of all PXA variants is supported, with
477 16 to 32 channels for peripheral to memory or memory to memory
481 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
485 Enable support for the CSR SiRFprimaII DMA engine.
488 bool "ST-Ericsson DMA40 support"
489 depends on ARCH_U8500
492 Support for ST-Ericsson DMA40 controller
495 tristate "ST FDMA dmaengine support"
497 depends on REMOTEPROC
498 select ST_SLIM_REMOTEPROC
500 select DMA_VIRTUAL_CHANNELS
502 Enable support for ST FDMA controller.
503 It supports 16 independent DMA channels, accepts up to 32 DMA requests
505 Say Y here if you have such a chipset.
509 bool "STMicroelectronics STM32 DMA support"
510 depends on ARCH_STM32 || COMPILE_TEST
512 select DMA_VIRTUAL_CHANNELS
514 Enable support for the on-chip DMA controller on STMicroelectronics
516 If you have a board based on such a MCU and wish to use DMA say Y
520 bool "STMicroelectronics STM32 dma multiplexer support"
521 depends on STM32_DMA || COMPILE_TEST
523 Enable support for the on-chip DMA multiplexer on STMicroelectronics
525 If you have a board based on such a MCU and wish to use DMAMUX say Y
529 bool "STMicroelectronics STM32 master dma support"
530 depends on ARCH_STM32 || COMPILE_TEST
533 select DMA_VIRTUAL_CHANNELS
535 Enable support for the on-chip MDMA controller on STMicroelectronics
537 If you have a board based on STM32 SoC and wish to use the master DMA
541 tristate "Spreadtrum DMA support"
542 depends on ARCH_SPRD || COMPILE_TEST
544 select DMA_VIRTUAL_CHANNELS
546 Enable support for the on-chip DMA controller on Spreadtrum platform.
549 bool "Samsung S3C24XX DMA support"
550 depends on ARCH_S3C24XX || COMPILE_TEST
552 select DMA_VIRTUAL_CHANNELS
554 Support for the Samsung S3C24XX DMA controller driver. The
555 DMA controller is having multiple DMA channels which can be
556 configured for different peripherals like audio, UART, SPI.
557 The DMA controller can transfer data from memory to peripheral,
558 periphal to memory, periphal to periphal and memory to memory.
561 tristate "Toshiba TXx9 SoC DMA support"
562 depends on MACH_TX49XX || MACH_TX39XX
565 Support the TXx9 SoC internal DMA controller. This can be
566 integrated in chips such as the Toshiba TX4927/38/39.
568 config TEGRA20_APB_DMA
569 bool "NVIDIA Tegra20 APB DMA support"
570 depends on ARCH_TEGRA
573 Support for the NVIDIA Tegra20 APB DMA controller driver. The
574 DMA controller is having multiple DMA channel which can be
575 configured for different peripherals like audio, UART, SPI,
576 I2C etc which is in APB bus.
577 This DMA controller transfers data from memory to peripheral fifo
578 or vice versa. It does not support memory to memory data transfer.
581 tristate "NVIDIA Tegra210 ADMA support"
582 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
584 select DMA_VIRTUAL_CHANNELS
586 Support for the NVIDIA Tegra210 ADMA controller driver. The
587 DMA controller has multiple DMA channels and is used to service
588 various audio clients in the Tegra210 audio processing engine
589 (APE). This DMA controller transfers data from memory to
590 peripheral and vice versa. It does not support memory to
591 memory data transfer.
594 tristate "Timberdale FPGA DMA support"
595 depends on MFD_TIMBERDALE || COMPILE_TEST
598 Enable support for the Timberdale FPGA DMA engine.
600 config UNIPHIER_MDMAC
601 tristate "UniPhier MIO DMAC"
602 depends on ARCH_UNIPHIER || COMPILE_TEST
605 select DMA_VIRTUAL_CHANNELS
607 Enable support for the MIO DMAC (Media I/O DMA controller) on the
608 UniPhier platform. This DMA controller is used as the external
609 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
612 tristate "APM X-Gene DMA support"
613 depends on ARCH_XGENE || COMPILE_TEST
615 select DMA_ENGINE_RAID
616 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
618 Enable support for the APM X-Gene SoC DMA engine.
621 tristate "Xilinx AXI DMAS Engine"
622 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
625 Enable support for Xilinx AXI VDMA Soft IP.
627 AXI VDMA engine provides high-bandwidth direct memory access
628 between memory and AXI4-Stream video type target
629 peripherals including peripherals which support AXI4-
630 Stream Video Protocol. It has two stream interfaces/
631 channels, Memory Mapped to Stream (MM2S) and Stream to
632 Memory Mapped (S2MM) for the data transfers.
633 AXI CDMA engine provides high-bandwidth direct memory access
634 between a memory-mapped source address and a memory-mapped
636 AXI DMA engine provides high-bandwidth one dimensional direct
637 memory access between memory and AXI4-Stream target peripherals.
639 config XILINX_ZYNQMP_DMA
640 tristate "Xilinx ZynqMP DMA Engine"
641 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
644 Enable support for Xilinx ZynqMP DMA controller.
647 tristate "ZTE ZX DMA support"
648 depends on ARCH_ZX || COMPILE_TEST
650 select DMA_VIRTUAL_CHANNELS
652 Support the DMA engine for ZTE ZX family platform devices.
656 source "drivers/dma/bestcomm/Kconfig"
658 source "drivers/dma/mediatek/Kconfig"
660 source "drivers/dma/qcom/Kconfig"
662 source "drivers/dma/dw/Kconfig"
664 source "drivers/dma/dw-edma/Kconfig"
666 source "drivers/dma/hsu/Kconfig"
668 source "drivers/dma/sh/Kconfig"
670 source "drivers/dma/ti/Kconfig"
673 comment "DMA Clients"
674 depends on DMA_ENGINE
677 bool "Async_tx: Offload support for the async_tx api"
678 depends on DMA_ENGINE
680 This allows the async_tx api to take advantage of offload engines for
681 memcpy, memset, xor, and raid6 p+q operations. If your platform has
682 a dma engine that can perform raid operations and you have enabled
688 tristate "DMA Test client"
689 depends on DMA_ENGINE
690 select DMA_ENGINE_RAID
692 Simple DMA test client. Say N unless you're debugging a
695 config DMA_ENGINE_RAID