2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
37 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
40 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
46 config DMA_VIRTUAL_CHANNELS
60 tristate "Altera / Intel mSGDMA Engine"
63 Enable support for Altera / Intel mSGDMA controller.
66 bool "ARM PrimeCell PL080 or PL081 support"
69 select DMA_VIRTUAL_CHANNELS
71 Say yes if your platform has a PL08x DMAC device which can
72 provide DMA engine support. This includes the original ARM
73 PL080 and PL081, Samsungs PL080 derivative and Faraday
74 Technology's FTDMAC020 PL080 derivative.
76 config AMCC_PPC440SPE_ADMA
77 tristate "AMCC PPC440SPe ADMA support"
78 depends on 440SPe || 440SP
80 select DMA_ENGINE_RAID
81 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
82 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
84 Enable support for the AMCC PPC440SPe RAID engines.
87 tristate "Atmel AHB DMA support"
91 Support the Atmel AHB DMA controller.
94 tristate "Atmel XDMA support"
98 Support the Atmel XDMA controller.
101 tristate "Analog Devices AXI-DMAC DMA support"
102 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST
104 select DMA_VIRTUAL_CHANNELS
106 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
107 controller is often used in Analog Device's reference designs for FPGA
111 tristate "Broadcom SBA RAID engine support"
112 depends on ARM64 || COMPILE_TEST
113 depends on MAILBOX && RAID6_PQ
115 select DMA_ENGINE_RAID
116 select ASYNC_TX_DISABLE_XOR_VAL_DMA
117 select ASYNC_TX_DISABLE_PQ_VAL_DMA
118 default m if ARCH_BCM_IPROC
120 Enable support for Broadcom SBA RAID Engine. The SBA RAID
121 engine is available on most of the Broadcom iProc SoCs. It
122 has the capability to offload memcpy, xor and pq computation
126 bool "ST-Ericsson COH901318 DMA support"
128 depends on ARCH_U300 || COMPILE_TEST
130 Enable support for ST-Ericsson COH 901 318 DMA.
133 tristate "BCM2835 DMA engine support"
134 depends on ARCH_BCM2835
136 select DMA_VIRTUAL_CHANNELS
139 tristate "JZ4740 DMA support"
140 depends on MACH_JZ4740 || COMPILE_TEST
142 select DMA_VIRTUAL_CHANNELS
145 tristate "JZ4780 DMA support"
146 depends on MIPS || COMPILE_TEST
148 select DMA_VIRTUAL_CHANNELS
150 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
151 If you have a board based on such a SoC and wish to use DMA for
152 devices which can use the DMA controller, say Y or M here.
155 tristate "SA-11x0 DMA support"
156 depends on ARCH_SA1100 || COMPILE_TEST
158 select DMA_VIRTUAL_CHANNELS
160 Support the DMA engine found on Intel StrongARM SA-1100 and
161 SA-1110 SoCs. This DMA engine can only be used with on-chip
165 tristate "Allwinner A10 DMA SoCs support"
166 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
167 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
169 select DMA_VIRTUAL_CHANNELS
171 Enable support for the DMA controller present in the sun4i,
172 sun5i and sun7i Allwinner ARM SoCs.
175 tristate "Allwinner A31 SoCs DMA support"
176 depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
177 depends on RESET_CONTROLLER
179 select DMA_VIRTUAL_CHANNELS
181 Support for the DMA engine first found in Allwinner A31 SoCs.
184 tristate "Synopsys DesignWare AXI DMA support"
185 depends on OF || COMPILE_TEST
187 select DMA_VIRTUAL_CHANNELS
189 Enable support for Synopsys DesignWare AXI DMA controller.
190 NOTE: This driver wasn't tested on 64 bit platform because
191 of lack 64 bit platform with Synopsys DW AXI DMAC.
194 bool "Cirrus Logic EP93xx DMA support"
195 depends on ARCH_EP93XX || COMPILE_TEST
198 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
201 tristate "Freescale Elo series DMA support"
204 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
206 Enable support for the Freescale Elo series DMA controllers.
207 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
208 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
209 some Txxx and Bxxx parts.
212 tristate "Freescale eDMA engine support"
215 select DMA_VIRTUAL_CHANNELS
217 Support the Freescale eDMA engine with programmable channel
218 multiplexing capability for DMA request sources(slot).
219 This module can be found on Freescale Vybrid and LS-1 SoCs.
222 tristate "NXP Layerscape qDMA engine support"
223 depends on ARM || ARM64
225 select DMA_VIRTUAL_CHANNELS
226 select DMA_ENGINE_RAID
227 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
229 Support the NXP Layerscape qDMA engine with command queue and legacy mode.
230 Channel virtualization is supported through enqueuing of DMA jobs to,
231 or dequeuing DMA jobs from, different work queues.
232 This module can be found on NXP Layerscape SoCs.
233 The qdma driver only work on SoCs with a DPAA hardware block.
236 tristate "Freescale RAID engine Support"
237 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
239 select DMA_ENGINE_RAID
241 Enable support for Freescale RAID Engine. RAID Engine is
242 available on some QorIQ SoCs (like P5020/P5040). It has
243 the capability to offload memcpy, xor and pq computation
247 tristate "IMG MDC support"
248 depends on MIPS || COMPILE_TEST
249 depends on MFD_SYSCON
251 select DMA_VIRTUAL_CHANNELS
253 Enable support for the IMG multi-threaded DMA controller (MDC).
256 tristate "i.MX DMA support"
260 Support the i.MX DMA engine. This engine is integrated into
261 Freescale i.MX1/21/27 chips.
264 tristate "i.MX SDMA support"
267 select DMA_VIRTUAL_CHANNELS
269 Support the i.MX SDMA engine. This engine is integrated into
270 Freescale i.MX25/31/35/51/53/6 chips.
273 tristate "Intel integrated DMA 64-bit support"
275 select DMA_VIRTUAL_CHANNELS
277 Enable DMA support for Intel Low Power Subsystem such as found on
281 tristate "Intel I/OAT DMA support"
282 depends on PCI && X86_64
284 select DMA_ENGINE_RAID
287 Enable support for the Intel(R) I/OAT DMA engine present
288 in recent Intel Xeon chipsets.
290 Say Y here if you have such a chipset.
294 config INTEL_IOP_ADMA
295 tristate "Intel IOP ADMA support"
296 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
298 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
300 Enable support for the Intel(R) IOP Series RAID engines.
302 config INTEL_MIC_X100_DMA
303 tristate "Intel MIC X100 DMA Driver"
304 depends on 64BIT && X86 && INTEL_MIC_BUS
307 This enables DMA support for the Intel Many Integrated Core
308 (MIC) family of PCIe form factor coprocessor X100 devices that
309 run a 64 bit Linux OS. This driver will be used by both MIC
310 host and card drivers.
312 If you are building host kernel with a MIC device or a card
313 kernel for a MIC device, then say M (recommended) or Y, else
314 say N. If unsure say N.
316 More information about the Intel MIC family as well as the Linux
317 OS and tools for MIC to use with this driver are available from
318 <http://software.intel.com/en-us/mic-developer>.
321 tristate "Hisilicon K3 DMA support"
322 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
324 select DMA_VIRTUAL_CHANNELS
326 Support the DMA engine for Hisilicon K3 platform
329 config LPC18XX_DMAMUX
330 bool "NXP LPC18xx/43xx DMA MUX for PL080"
331 depends on ARCH_LPC18XX || COMPILE_TEST
332 depends on OF && AMBA_PL08X
335 Enable support for DMA on NXP LPC18xx/43xx platforms
336 with PL080 and multiplexed DMA request lines.
339 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
340 depends on M5441x || COMPILE_TEST
342 select DMA_VIRTUAL_CHANNELS
344 Support the Freescale ColdFire eDMA engine, 64-channel
345 implementation that performs complex data transfers with
346 minimal intervention from a host processor.
347 This module can be found on Freescale ColdFire mcf5441x SoCs.
350 bool "MMP PDMA support"
351 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
354 Support the MMP PDMA engine for PXA and MMP platform.
357 bool "MMP Two-Channel DMA support"
358 depends on ARCH_MMP || COMPILE_TEST
360 select MMP_SRAM if ARCH_MMP
361 select GENERIC_ALLOCATOR
363 Support the MMP Two-Channel DMA engine.
364 This engine used for MMP Audio DMA and pxa910 SQU.
365 It needs sram driver under mach-mmp.
368 tristate "MOXART DMA support"
369 depends on ARCH_MOXART
371 select DMA_VIRTUAL_CHANNELS
373 Enable support for the MOXA ART SoC DMA controller.
375 Say Y here if you enabled MMP ADMA, otherwise say N.
378 tristate "Freescale MPC512x built-in DMA engine support"
379 depends on PPC_MPC512x || PPC_MPC831x
382 Enable support for the Freescale MPC512x built-in DMA engine.
385 bool "Marvell XOR engine support"
386 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
388 select DMA_ENGINE_RAID
389 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
391 Enable support for the Marvell XOR engine.
394 bool "Marvell XOR engine version 2 support "
397 select DMA_ENGINE_RAID
398 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
399 select GENERIC_MSI_IRQ_DOMAIN
401 Enable support for the Marvell version 2 XOR engine.
403 This engine provides acceleration for copy, XOR and RAID6
404 operations, and is available on Marvell Armada 7K and 8K
408 bool "MXS DMA support"
409 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
413 Support the MXS DMA engine. This engine including APBH-DMA
414 and APBX-DMA is integrated into some Freescale chips.
417 bool "MX3x Image Processing Unit support"
422 If you plan to use the Image Processing unit in the i.MX3x, say
423 Y here. If unsure, select Y.
426 int "Number of dynamically mapped interrupts for IPU"
431 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
432 To avoid bloating the irq_desc[] array we allocate a sufficient
433 number of IRQ slots and map them dynamically to specific sources.
436 tristate "Renesas Type-AXI NBPF DMA support"
438 depends on ARM || COMPILE_TEST
440 Support for "Type-AXI" NBPF DMA IPs from Renesas
443 tristate "Actions Semi Owl SoCs DMA support"
444 depends on ARCH_ACTIONS
446 select DMA_VIRTUAL_CHANNELS
448 Enable support for the Actions Semi Owl SoCs DMA controller.
451 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
452 depends on PCI && (X86_32 || COMPILE_TEST)
455 Enable support for Intel EG20T PCH DMA engine.
457 This driver also can be used for LAPIS Semiconductor IOH(Input/
458 Output Hub), ML7213, ML7223 and ML7831.
459 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
460 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
461 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
462 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
465 tristate "DMA API Driver for PL330"
469 Select if your platform has one or more PL330 DMACs.
470 You need to provide platform specific settings via
471 platform_data for a dma-pl330 device.
474 bool "PXA DMA support"
475 depends on (ARCH_MMP || ARCH_PXA)
477 select DMA_VIRTUAL_CHANNELS
479 Support the DMA engine for PXA. It is also compatible with MMP PDMA
480 platform. The internal DMA IP of all PXA variants is supported, with
481 16 to 32 channels for peripheral to memory or memory to memory
485 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
489 Enable support for the CSR SiRFprimaII DMA engine.
492 bool "ST-Ericsson DMA40 support"
493 depends on ARCH_U8500
496 Support for ST-Ericsson DMA40 controller
499 tristate "ST FDMA dmaengine support"
501 depends on REMOTEPROC
502 select ST_SLIM_REMOTEPROC
504 select DMA_VIRTUAL_CHANNELS
506 Enable support for ST FDMA controller.
507 It supports 16 independent DMA channels, accepts up to 32 DMA requests
509 Say Y here if you have such a chipset.
513 bool "STMicroelectronics STM32 DMA support"
514 depends on ARCH_STM32 || COMPILE_TEST
516 select DMA_VIRTUAL_CHANNELS
518 Enable support for the on-chip DMA controller on STMicroelectronics
520 If you have a board based on such a MCU and wish to use DMA say Y
524 bool "STMicroelectronics STM32 dma multiplexer support"
525 depends on STM32_DMA || COMPILE_TEST
527 Enable support for the on-chip DMA multiplexer on STMicroelectronics
529 If you have a board based on such a MCU and wish to use DMAMUX say Y
533 bool "STMicroelectronics STM32 master dma support"
534 depends on ARCH_STM32 || COMPILE_TEST
537 select DMA_VIRTUAL_CHANNELS
539 Enable support for the on-chip MDMA controller on STMicroelectronics
541 If you have a board based on STM32 SoC and wish to use the master DMA
545 tristate "Spreadtrum DMA support"
546 depends on ARCH_SPRD || COMPILE_TEST
548 select DMA_VIRTUAL_CHANNELS
550 Enable support for the on-chip DMA controller on Spreadtrum platform.
553 bool "Samsung S3C24XX DMA support"
554 depends on ARCH_S3C24XX || COMPILE_TEST
556 select DMA_VIRTUAL_CHANNELS
558 Support for the Samsung S3C24XX DMA controller driver. The
559 DMA controller is having multiple DMA channels which can be
560 configured for different peripherals like audio, UART, SPI.
561 The DMA controller can transfer data from memory to peripheral,
562 periphal to memory, periphal to periphal and memory to memory.
565 tristate "Toshiba TXx9 SoC DMA support"
566 depends on MACH_TX49XX || MACH_TX39XX
569 Support the TXx9 SoC internal DMA controller. This can be
570 integrated in chips such as the Toshiba TX4927/38/39.
572 config TEGRA20_APB_DMA
573 bool "NVIDIA Tegra20 APB DMA support"
574 depends on ARCH_TEGRA
577 Support for the NVIDIA Tegra20 APB DMA controller driver. The
578 DMA controller is having multiple DMA channel which can be
579 configured for different peripherals like audio, UART, SPI,
580 I2C etc which is in APB bus.
581 This DMA controller transfers data from memory to peripheral fifo
582 or vice versa. It does not support memory to memory data transfer.
585 tristate "NVIDIA Tegra210 ADMA support"
586 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK
588 select DMA_VIRTUAL_CHANNELS
590 Support for the NVIDIA Tegra210 ADMA controller driver. The
591 DMA controller has multiple DMA channels and is used to service
592 various audio clients in the Tegra210 audio processing engine
593 (APE). This DMA controller transfers data from memory to
594 peripheral and vice versa. It does not support memory to
595 memory data transfer.
598 tristate "Timberdale FPGA DMA support"
599 depends on MFD_TIMBERDALE || COMPILE_TEST
602 Enable support for the Timberdale FPGA DMA engine.
604 config UNIPHIER_MDMAC
605 tristate "UniPhier MIO DMAC"
606 depends on ARCH_UNIPHIER || COMPILE_TEST
609 select DMA_VIRTUAL_CHANNELS
611 Enable support for the MIO DMAC (Media I/O DMA controller) on the
612 UniPhier platform. This DMA controller is used as the external
613 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
616 tristate "APM X-Gene DMA support"
617 depends on ARCH_XGENE || COMPILE_TEST
619 select DMA_ENGINE_RAID
620 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
622 Enable support for the APM X-Gene SoC DMA engine.
625 tristate "Xilinx AXI DMAS Engine"
626 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
629 Enable support for Xilinx AXI VDMA Soft IP.
631 AXI VDMA engine provides high-bandwidth direct memory access
632 between memory and AXI4-Stream video type target
633 peripherals including peripherals which support AXI4-
634 Stream Video Protocol. It has two stream interfaces/
635 channels, Memory Mapped to Stream (MM2S) and Stream to
636 Memory Mapped (S2MM) for the data transfers.
637 AXI CDMA engine provides high-bandwidth direct memory access
638 between a memory-mapped source address and a memory-mapped
640 AXI DMA engine provides high-bandwidth one dimensional direct
641 memory access between memory and AXI4-Stream target peripherals.
643 config XILINX_ZYNQMP_DMA
644 tristate "Xilinx ZynqMP DMA Engine"
645 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
648 Enable support for Xilinx ZynqMP DMA controller.
651 tristate "ZTE ZX DMA support"
652 depends on ARCH_ZX || COMPILE_TEST
654 select DMA_VIRTUAL_CHANNELS
656 Support the DMA engine for ZTE ZX family platform devices.
660 source "drivers/dma/bestcomm/Kconfig"
662 source "drivers/dma/mediatek/Kconfig"
664 source "drivers/dma/qcom/Kconfig"
666 source "drivers/dma/dw/Kconfig"
668 source "drivers/dma/hsu/Kconfig"
670 source "drivers/dma/sh/Kconfig"
672 source "drivers/dma/ti/Kconfig"
675 comment "DMA Clients"
676 depends on DMA_ENGINE
679 bool "Async_tx: Offload support for the async_tx api"
680 depends on DMA_ENGINE
682 This allows the async_tx api to take advantage of offload engines for
683 memcpy, memset, xor, and raid6 p+q operations. If your platform has
684 a dma engine that can perform raid operations and you have enabled
690 tristate "DMA Test client"
691 depends on DMA_ENGINE
692 select DMA_ENGINE_RAID
694 Simple DMA test client. Say N unless you're debugging a
697 config DMA_ENGINE_RAID