drivers/dma/dw/dw.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 // Copyright (C) 2007-2008 Atmel Corporation
   3 // Copyright (C) 2010-2011 ST Microelectronics
   4 // Copyright (C) 2013,2018 Intel Corporation
   5
   6 #include <linux/bitops.h>
   7 #include <linux/errno.h>
   8 #include <linux/slab.h>
   9 #include <linux/types.h>
  10
  11 #include "internal.h"
  12
  13 static void dw_dma_initialize_chan(struct dw_dma_chan *dwc)
  14 {
  15         struct dw_dma *dw = to_dw_dma(dwc->chan.device);
  16         u32 cfghi = DWC_CFGH_FIFO_MODE;
  17         u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
  18         bool hs_polarity = dwc->dws.hs_polarity;
  19
  20         cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id);
  21         cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id);
  22         cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl);
  23
  24         /* Set polarity of handshake interface */
  25         cfglo |= hs_polarity ? DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0;
  26
  27         channel_writel(dwc, CFG_LO, cfglo);
  28         channel_writel(dwc, CFG_HI, cfghi);
  29 }
  30
  31 static void dw_dma_suspend_chan(struct dw_dma_chan *dwc, bool drain)
  32 {
  33         u32 cfglo = channel_readl(dwc, CFG_LO);
  34
  35         channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP);
  36 }
  37
  38 static void dw_dma_resume_chan(struct dw_dma_chan *dwc, bool drain)
  39 {
  40         u32 cfglo = channel_readl(dwc, CFG_LO);
  41
  42         channel_writel(dwc, CFG_LO, cfglo & ~DWC_CFGL_CH_SUSP);
  43 }
  44
  45 static u32 dw_dma_bytes2block(struct dw_dma_chan *dwc,
  46                               size_t bytes, unsigned int width, size_t *len)
  47 {
  48         u32 block;
  49
  50         if ((bytes >> width) > dwc->block_size) {
  51                 block = dwc->block_size;
  52                 *len = dwc->block_size << width;
  53         } else {
  54                 block = bytes >> width;
  55                 *len = bytes;
  56         }
  57
  58         return block;
  59 }
  60
  61 static size_t dw_dma_block2bytes(struct dw_dma_chan *dwc, u32 block, u32 width)
  62 {
  63         return DWC_CTLH_BLOCK_TS(block) << width;
  64 }
  65
  66 static void dw_dma_encode_maxburst(struct dw_dma_chan *dwc, u32 *maxburst)
  67 {
  68         /*
  69          * Fix burst size according to dw_dmac. We need to convert them as:
  70          * 1 -> 0, 4 -> 1, 8 -> 2, 16 -> 3.
  71          */
  72         *maxburst = *maxburst > 1 ? fls(*maxburst) - 2 : 0;
  73 }
  74
  75 static void dw_dma_set_device_name(struct dw_dma *dw, int id)
  76 {
  77         snprintf(dw->name, sizeof(dw->name), "dw:dmac%d", id);
  78 }
  79
  80 static void dw_dma_disable(struct dw_dma *dw)
  81 {
  82         do_dw_dma_off(dw);
  83 }
  84
  85 static void dw_dma_enable(struct dw_dma *dw)
  86 {
  87         do_dw_dma_on(dw);
  88 }
  89
  90 int dw_dma_probe(struct dw_dma_chip *chip)
  91 {
  92         struct dw_dma *dw;
  93
  94         dw = devm_kzalloc(chip->dev, sizeof(*dw), GFP_KERNEL);
  95         if (!dw)
  96                 return -ENOMEM;
  97
  98         /* Channel operations */
  99         dw->initialize_chan = dw_dma_initialize_chan;
 100         dw->suspend_chan = dw_dma_suspend_chan;
 101         dw->resume_chan = dw_dma_resume_chan;
 102         dw->encode_maxburst = dw_dma_encode_maxburst;
 103         dw->bytes2block = dw_dma_bytes2block;
 104         dw->block2bytes = dw_dma_block2bytes;
 105
 106         /* Device operations */
 107         dw->set_device_name = dw_dma_set_device_name;
 108         dw->disable = dw_dma_disable;
 109         dw->enable = dw_dma_enable;
 110
 111         chip->dw = dw;
 112         return do_dma_probe(chip);
 113 }
 114 EXPORT_SYMBOL_GPL(dw_dma_probe);
 115
 116 int dw_dma_remove(struct dw_dma_chip *chip)
 117 {
 118         return do_dma_remove(chip);
 119 }
 120 EXPORT_SYMBOL_GPL(dw_dma_remove);