drivers/dma/sh/shdma-r8a73a4.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Renesas SuperH DMA Engine support for r8a73a4 (APE6) SoCs
   4  *
   5  * Copyright (C) 2013 Renesas Electronics, Inc.
   6  */
   7 #include <linux/sh_dma.h>
   8
   9 #include "shdma-arm.h"
  10
  11 static const unsigned int dma_ts_shift[] = SH_DMAE_TS_SHIFT;
  12
  13 static const struct sh_dmae_slave_config dma_slaves[] = {
  14         {
  15                 .chcr           = CHCR_TX(XMIT_SZ_32BIT),
  16                 .mid_rid        = 0xd1,         /* MMC0 Tx */
  17         }, {
  18                 .chcr           = CHCR_RX(XMIT_SZ_32BIT),
  19                 .mid_rid        = 0xd2,         /* MMC0 Rx */
  20         }, {
  21                 .chcr           = CHCR_TX(XMIT_SZ_32BIT),
  22                 .mid_rid        = 0xe1,         /* MMC1 Tx */
  23         }, {
  24                 .chcr           = CHCR_RX(XMIT_SZ_32BIT),
  25                 .mid_rid        = 0xe2,         /* MMC1 Rx */
  26         },
  27 };
  28
  29 #define DMAE_CHANNEL(a, b)                              \
  30         {                                               \
  31                 .offset         = (a) - 0x20,           \
  32                 .dmars          = (a) - 0x20 + 0x40,    \
  33                 .chclr_bit      = (b),                  \
  34                 .chclr_offset   = 0x80 - 0x20,          \
  35         }
  36
  37 static const struct sh_dmae_channel dma_channels[] = {
  38         DMAE_CHANNEL(0x8000, 0),
  39         DMAE_CHANNEL(0x8080, 1),
  40         DMAE_CHANNEL(0x8100, 2),
  41         DMAE_CHANNEL(0x8180, 3),
  42         DMAE_CHANNEL(0x8200, 4),
  43         DMAE_CHANNEL(0x8280, 5),
  44         DMAE_CHANNEL(0x8300, 6),
  45         DMAE_CHANNEL(0x8380, 7),
  46         DMAE_CHANNEL(0x8400, 8),
  47         DMAE_CHANNEL(0x8480, 9),
  48         DMAE_CHANNEL(0x8500, 10),
  49         DMAE_CHANNEL(0x8580, 11),
  50         DMAE_CHANNEL(0x8600, 12),
  51         DMAE_CHANNEL(0x8680, 13),
  52         DMAE_CHANNEL(0x8700, 14),
  53         DMAE_CHANNEL(0x8780, 15),
  54         DMAE_CHANNEL(0x8800, 16),
  55         DMAE_CHANNEL(0x8880, 17),
  56         DMAE_CHANNEL(0x8900, 18),
  57         DMAE_CHANNEL(0x8980, 19),
  58 };
  59
  60 const struct sh_dmae_pdata r8a73a4_dma_pdata = {
  61         .slave          = dma_slaves,
  62         .slave_num      = ARRAY_SIZE(dma_slaves),
  63         .channel        = dma_channels,
  64         .channel_num    = ARRAY_SIZE(dma_channels),
  65         .ts_low_shift   = TS_LOW_SHIFT,
  66         .ts_low_mask    = TS_LOW_BIT << TS_LOW_SHIFT,
  67         .ts_high_shift  = TS_HI_SHIFT,
  68         .ts_high_mask   = TS_HI_BIT << TS_HI_SHIFT,
  69         .ts_shift       = dma_ts_shift,
  70         .ts_shift_num   = ARRAY_SIZE(dma_ts_shift),
  71         .dmaor_init     = DMAOR_DME,
  72         .chclr_present  = 1,
  73         .chclr_bitwise  = 1,
  74 };