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[linux.git] / drivers / dma-buf / dma-fence.c
1 /*
2  * Fence mechanism for dma-buf and to allow for asynchronous dma access
3  *
4  * Copyright (C) 2012 Canonical Ltd
5  * Copyright (C) 2012 Texas Instruments
6  *
7  * Authors:
8  * Rob Clark <robdclark@gmail.com>
9  * Maarten Lankhorst <maarten.lankhorst@canonical.com>
10  *
11  * This program is free software; you can redistribute it and/or modify it
12  * under the terms of the GNU General Public License version 2 as published by
13  * the Free Software Foundation.
14  *
15  * This program is distributed in the hope that it will be useful, but WITHOUT
16  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
18  * more details.
19  */
20
21 #include <linux/slab.h>
22 #include <linux/export.h>
23 #include <linux/atomic.h>
24 #include <linux/dma-fence.h>
25 #include <linux/sched/signal.h>
26
27 #define CREATE_TRACE_POINTS
28 #include <trace/events/dma_fence.h>
29
30 EXPORT_TRACEPOINT_SYMBOL(dma_fence_emit);
31 EXPORT_TRACEPOINT_SYMBOL(dma_fence_enable_signal);
32
33 /*
34  * fence context counter: each execution context should have its own
35  * fence context, this allows checking if fences belong to the same
36  * context or not. One device can have multiple separate contexts,
37  * and they're used if some engine can run independently of another.
38  */
39 static atomic64_t dma_fence_context_counter = ATOMIC64_INIT(0);
40
41 /**
42  * DOC: DMA fences overview
43  *
44  * DMA fences, represented by &struct dma_fence, are the kernel internal
45  * synchronization primitive for DMA operations like GPU rendering, video
46  * encoding/decoding, or displaying buffers on a screen.
47  *
48  * A fence is initialized using dma_fence_init() and completed using
49  * dma_fence_signal(). Fences are associated with a context, allocated through
50  * dma_fence_context_alloc(), and all fences on the same context are
51  * fully ordered.
52  *
53  * Since the purposes of fences is to facilitate cross-device and
54  * cross-application synchronization, there's multiple ways to use one:
55  *
56  * - Individual fences can be exposed as a &sync_file, accessed as a file
57  *   descriptor from userspace, created by calling sync_file_create(). This is
58  *   called explicit fencing, since userspace passes around explicit
59  *   synchronization points.
60  *
61  * - Some subsystems also have their own explicit fencing primitives, like
62  *   &drm_syncobj. Compared to &sync_file, a &drm_syncobj allows the underlying
63  *   fence to be updated.
64  *
65  * - Then there's also implicit fencing, where the synchronization points are
66  *   implicitly passed around as part of shared &dma_buf instances. Such
67  *   implicit fences are stored in &struct reservation_object through the
68  *   &dma_buf.resv pointer.
69  */
70
71 /**
72  * dma_fence_context_alloc - allocate an array of fence contexts
73  * @num: amount of contexts to allocate
74  *
75  * This function will return the first index of the number of fence contexts
76  * allocated.  The fence context is used for setting &dma_fence.context to a
77  * unique number by passing the context to dma_fence_init().
78  */
79 u64 dma_fence_context_alloc(unsigned num)
80 {
81         WARN_ON(!num);
82         return atomic64_add_return(num, &dma_fence_context_counter) - num;
83 }
84 EXPORT_SYMBOL(dma_fence_context_alloc);
85
86 /**
87  * dma_fence_signal_locked - signal completion of a fence
88  * @fence: the fence to signal
89  *
90  * Signal completion for software callbacks on a fence, this will unblock
91  * dma_fence_wait() calls and run all the callbacks added with
92  * dma_fence_add_callback(). Can be called multiple times, but since a fence
93  * can only go from the unsignaled to the signaled state and not back, it will
94  * only be effective the first time.
95  *
96  * Unlike dma_fence_signal(), this function must be called with &dma_fence.lock
97  * held.
98  *
99  * Returns 0 on success and a negative error value when @fence has been
100  * signalled already.
101  */
102 int dma_fence_signal_locked(struct dma_fence *fence)
103 {
104         struct dma_fence_cb *cur, *tmp;
105         int ret = 0;
106
107         lockdep_assert_held(fence->lock);
108
109         if (WARN_ON(!fence))
110                 return -EINVAL;
111
112         if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
113                 ret = -EINVAL;
114
115                 /*
116                  * we might have raced with the unlocked dma_fence_signal,
117                  * still run through all callbacks
118                  */
119         } else {
120                 fence->timestamp = ktime_get();
121                 set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags);
122                 trace_dma_fence_signaled(fence);
123         }
124
125         list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) {
126                 list_del_init(&cur->node);
127                 cur->func(fence, cur);
128         }
129         return ret;
130 }
131 EXPORT_SYMBOL(dma_fence_signal_locked);
132
133 /**
134  * dma_fence_signal - signal completion of a fence
135  * @fence: the fence to signal
136  *
137  * Signal completion for software callbacks on a fence, this will unblock
138  * dma_fence_wait() calls and run all the callbacks added with
139  * dma_fence_add_callback(). Can be called multiple times, but since a fence
140  * can only go from the unsignaled to the signaled state and not back, it will
141  * only be effective the first time.
142  *
143  * Returns 0 on success and a negative error value when @fence has been
144  * signalled already.
145  */
146 int dma_fence_signal(struct dma_fence *fence)
147 {
148         unsigned long flags;
149
150         if (!fence)
151                 return -EINVAL;
152
153         if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
154                 return -EINVAL;
155
156         fence->timestamp = ktime_get();
157         set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags);
158         trace_dma_fence_signaled(fence);
159
160         if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &fence->flags)) {
161                 struct dma_fence_cb *cur, *tmp;
162
163                 spin_lock_irqsave(fence->lock, flags);
164                 list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) {
165                         list_del_init(&cur->node);
166                         cur->func(fence, cur);
167                 }
168                 spin_unlock_irqrestore(fence->lock, flags);
169         }
170         return 0;
171 }
172 EXPORT_SYMBOL(dma_fence_signal);
173
174 /**
175  * dma_fence_wait_timeout - sleep until the fence gets signaled
176  * or until timeout elapses
177  * @fence: the fence to wait on
178  * @intr: if true, do an interruptible wait
179  * @timeout: timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
180  *
181  * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the
182  * remaining timeout in jiffies on success. Other error values may be
183  * returned on custom implementations.
184  *
185  * Performs a synchronous wait on this fence. It is assumed the caller
186  * directly or indirectly (buf-mgr between reservation and committing)
187  * holds a reference to the fence, otherwise the fence might be
188  * freed before return, resulting in undefined behavior.
189  *
190  * See also dma_fence_wait() and dma_fence_wait_any_timeout().
191  */
192 signed long
193 dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout)
194 {
195         signed long ret;
196
197         if (WARN_ON(timeout < 0))
198                 return -EINVAL;
199
200         trace_dma_fence_wait_start(fence);
201         if (fence->ops->wait)
202                 ret = fence->ops->wait(fence, intr, timeout);
203         else
204                 ret = dma_fence_default_wait(fence, intr, timeout);
205         trace_dma_fence_wait_end(fence);
206         return ret;
207 }
208 EXPORT_SYMBOL(dma_fence_wait_timeout);
209
210 /**
211  * dma_fence_release - default relese function for fences
212  * @kref: &dma_fence.recfount
213  *
214  * This is the default release functions for &dma_fence. Drivers shouldn't call
215  * this directly, but instead call dma_fence_put().
216  */
217 void dma_fence_release(struct kref *kref)
218 {
219         struct dma_fence *fence =
220                 container_of(kref, struct dma_fence, refcount);
221
222         trace_dma_fence_destroy(fence);
223
224         /* Failed to signal before release, could be a refcounting issue */
225         WARN_ON(!list_empty(&fence->cb_list));
226
227         if (fence->ops->release)
228                 fence->ops->release(fence);
229         else
230                 dma_fence_free(fence);
231 }
232 EXPORT_SYMBOL(dma_fence_release);
233
234 /**
235  * dma_fence_free - default release function for &dma_fence.
236  * @fence: fence to release
237  *
238  * This is the default implementation for &dma_fence_ops.release. It calls
239  * kfree_rcu() on @fence.
240  */
241 void dma_fence_free(struct dma_fence *fence)
242 {
243         kfree_rcu(fence, rcu);
244 }
245 EXPORT_SYMBOL(dma_fence_free);
246
247 /**
248  * dma_fence_enable_sw_signaling - enable signaling on fence
249  * @fence: the fence to enable
250  *
251  * This will request for sw signaling to be enabled, to make the fence
252  * complete as soon as possible. This calls &dma_fence_ops.enable_signaling
253  * internally.
254  */
255 void dma_fence_enable_sw_signaling(struct dma_fence *fence)
256 {
257         unsigned long flags;
258
259         if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
260                               &fence->flags) &&
261             !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) &&
262             fence->ops->enable_signaling) {
263                 trace_dma_fence_enable_signal(fence);
264
265                 spin_lock_irqsave(fence->lock, flags);
266
267                 if (!fence->ops->enable_signaling(fence))
268                         dma_fence_signal_locked(fence);
269
270                 spin_unlock_irqrestore(fence->lock, flags);
271         }
272 }
273 EXPORT_SYMBOL(dma_fence_enable_sw_signaling);
274
275 /**
276  * dma_fence_add_callback - add a callback to be called when the fence
277  * is signaled
278  * @fence: the fence to wait on
279  * @cb: the callback to register
280  * @func: the function to call
281  *
282  * @cb will be initialized by dma_fence_add_callback(), no initialization
283  * by the caller is required. Any number of callbacks can be registered
284  * to a fence, but a callback can only be registered to one fence at a time.
285  *
286  * Note that the callback can be called from an atomic context.  If
287  * fence is already signaled, this function will return -ENOENT (and
288  * *not* call the callback).
289  *
290  * Add a software callback to the fence. Same restrictions apply to
291  * refcount as it does to dma_fence_wait(), however the caller doesn't need to
292  * keep a refcount to fence afterward dma_fence_add_callback() has returned:
293  * when software access is enabled, the creator of the fence is required to keep
294  * the fence alive until after it signals with dma_fence_signal(). The callback
295  * itself can be called from irq context.
296  *
297  * Returns 0 in case of success, -ENOENT if the fence is already signaled
298  * and -EINVAL in case of error.
299  */
300 int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb,
301                            dma_fence_func_t func)
302 {
303         unsigned long flags;
304         int ret = 0;
305         bool was_set;
306
307         if (WARN_ON(!fence || !func))
308                 return -EINVAL;
309
310         if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
311                 INIT_LIST_HEAD(&cb->node);
312                 return -ENOENT;
313         }
314
315         spin_lock_irqsave(fence->lock, flags);
316
317         was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
318                                    &fence->flags);
319
320         if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
321                 ret = -ENOENT;
322         else if (!was_set && fence->ops->enable_signaling) {
323                 trace_dma_fence_enable_signal(fence);
324
325                 if (!fence->ops->enable_signaling(fence)) {
326                         dma_fence_signal_locked(fence);
327                         ret = -ENOENT;
328                 }
329         }
330
331         if (!ret) {
332                 cb->func = func;
333                 list_add_tail(&cb->node, &fence->cb_list);
334         } else
335                 INIT_LIST_HEAD(&cb->node);
336         spin_unlock_irqrestore(fence->lock, flags);
337
338         return ret;
339 }
340 EXPORT_SYMBOL(dma_fence_add_callback);
341
342 /**
343  * dma_fence_get_status - returns the status upon completion
344  * @fence: the dma_fence to query
345  *
346  * This wraps dma_fence_get_status_locked() to return the error status
347  * condition on a signaled fence. See dma_fence_get_status_locked() for more
348  * details.
349  *
350  * Returns 0 if the fence has not yet been signaled, 1 if the fence has
351  * been signaled without an error condition, or a negative error code
352  * if the fence has been completed in err.
353  */
354 int dma_fence_get_status(struct dma_fence *fence)
355 {
356         unsigned long flags;
357         int status;
358
359         spin_lock_irqsave(fence->lock, flags);
360         status = dma_fence_get_status_locked(fence);
361         spin_unlock_irqrestore(fence->lock, flags);
362
363         return status;
364 }
365 EXPORT_SYMBOL(dma_fence_get_status);
366
367 /**
368  * dma_fence_remove_callback - remove a callback from the signaling list
369  * @fence: the fence to wait on
370  * @cb: the callback to remove
371  *
372  * Remove a previously queued callback from the fence. This function returns
373  * true if the callback is successfully removed, or false if the fence has
374  * already been signaled.
375  *
376  * *WARNING*:
377  * Cancelling a callback should only be done if you really know what you're
378  * doing, since deadlocks and race conditions could occur all too easily. For
379  * this reason, it should only ever be done on hardware lockup recovery,
380  * with a reference held to the fence.
381  *
382  * Behaviour is undefined if @cb has not been added to @fence using
383  * dma_fence_add_callback() beforehand.
384  */
385 bool
386 dma_fence_remove_callback(struct dma_fence *fence, struct dma_fence_cb *cb)
387 {
388         unsigned long flags;
389         bool ret;
390
391         spin_lock_irqsave(fence->lock, flags);
392
393         ret = !list_empty(&cb->node);
394         if (ret)
395                 list_del_init(&cb->node);
396
397         spin_unlock_irqrestore(fence->lock, flags);
398
399         return ret;
400 }
401 EXPORT_SYMBOL(dma_fence_remove_callback);
402
403 struct default_wait_cb {
404         struct dma_fence_cb base;
405         struct task_struct *task;
406 };
407
408 static void
409 dma_fence_default_wait_cb(struct dma_fence *fence, struct dma_fence_cb *cb)
410 {
411         struct default_wait_cb *wait =
412                 container_of(cb, struct default_wait_cb, base);
413
414         wake_up_state(wait->task, TASK_NORMAL);
415 }
416
417 /**
418  * dma_fence_default_wait - default sleep until the fence gets signaled
419  * or until timeout elapses
420  * @fence: the fence to wait on
421  * @intr: if true, do an interruptible wait
422  * @timeout: timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
423  *
424  * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the
425  * remaining timeout in jiffies on success. If timeout is zero the value one is
426  * returned if the fence is already signaled for consistency with other
427  * functions taking a jiffies timeout.
428  */
429 signed long
430 dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout)
431 {
432         struct default_wait_cb cb;
433         unsigned long flags;
434         signed long ret = timeout ? timeout : 1;
435         bool was_set;
436
437         if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
438                 return ret;
439
440         spin_lock_irqsave(fence->lock, flags);
441
442         if (intr && signal_pending(current)) {
443                 ret = -ERESTARTSYS;
444                 goto out;
445         }
446
447         was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
448                                    &fence->flags);
449
450         if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
451                 goto out;
452
453         if (!was_set && fence->ops->enable_signaling) {
454                 trace_dma_fence_enable_signal(fence);
455
456                 if (!fence->ops->enable_signaling(fence)) {
457                         dma_fence_signal_locked(fence);
458                         goto out;
459                 }
460         }
461
462         if (!timeout) {
463                 ret = 0;
464                 goto out;
465         }
466
467         cb.base.func = dma_fence_default_wait_cb;
468         cb.task = current;
469         list_add(&cb.base.node, &fence->cb_list);
470
471         while (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) && ret > 0) {
472                 if (intr)
473                         __set_current_state(TASK_INTERRUPTIBLE);
474                 else
475                         __set_current_state(TASK_UNINTERRUPTIBLE);
476                 spin_unlock_irqrestore(fence->lock, flags);
477
478                 ret = schedule_timeout(ret);
479
480                 spin_lock_irqsave(fence->lock, flags);
481                 if (ret > 0 && intr && signal_pending(current))
482                         ret = -ERESTARTSYS;
483         }
484
485         if (!list_empty(&cb.base.node))
486                 list_del(&cb.base.node);
487         __set_current_state(TASK_RUNNING);
488
489 out:
490         spin_unlock_irqrestore(fence->lock, flags);
491         return ret;
492 }
493 EXPORT_SYMBOL(dma_fence_default_wait);
494
495 static bool
496 dma_fence_test_signaled_any(struct dma_fence **fences, uint32_t count,
497                             uint32_t *idx)
498 {
499         int i;
500
501         for (i = 0; i < count; ++i) {
502                 struct dma_fence *fence = fences[i];
503                 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
504                         if (idx)
505                                 *idx = i;
506                         return true;
507                 }
508         }
509         return false;
510 }
511
512 /**
513  * dma_fence_wait_any_timeout - sleep until any fence gets signaled
514  * or until timeout elapses
515  * @fences: array of fences to wait on
516  * @count: number of fences to wait on
517  * @intr: if true, do an interruptible wait
518  * @timeout: timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
519  * @idx: used to store the first signaled fence index, meaningful only on
520  *      positive return
521  *
522  * Returns -EINVAL on custom fence wait implementation, -ERESTARTSYS if
523  * interrupted, 0 if the wait timed out, or the remaining timeout in jiffies
524  * on success.
525  *
526  * Synchronous waits for the first fence in the array to be signaled. The
527  * caller needs to hold a reference to all fences in the array, otherwise a
528  * fence might be freed before return, resulting in undefined behavior.
529  *
530  * See also dma_fence_wait() and dma_fence_wait_timeout().
531  */
532 signed long
533 dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count,
534                            bool intr, signed long timeout, uint32_t *idx)
535 {
536         struct default_wait_cb *cb;
537         signed long ret = timeout;
538         unsigned i;
539
540         if (WARN_ON(!fences || !count || timeout < 0))
541                 return -EINVAL;
542
543         if (timeout == 0) {
544                 for (i = 0; i < count; ++i)
545                         if (dma_fence_is_signaled(fences[i])) {
546                                 if (idx)
547                                         *idx = i;
548                                 return 1;
549                         }
550
551                 return 0;
552         }
553
554         cb = kcalloc(count, sizeof(struct default_wait_cb), GFP_KERNEL);
555         if (cb == NULL) {
556                 ret = -ENOMEM;
557                 goto err_free_cb;
558         }
559
560         for (i = 0; i < count; ++i) {
561                 struct dma_fence *fence = fences[i];
562
563                 cb[i].task = current;
564                 if (dma_fence_add_callback(fence, &cb[i].base,
565                                            dma_fence_default_wait_cb)) {
566                         /* This fence is already signaled */
567                         if (idx)
568                                 *idx = i;
569                         goto fence_rm_cb;
570                 }
571         }
572
573         while (ret > 0) {
574                 if (intr)
575                         set_current_state(TASK_INTERRUPTIBLE);
576                 else
577                         set_current_state(TASK_UNINTERRUPTIBLE);
578
579                 if (dma_fence_test_signaled_any(fences, count, idx))
580                         break;
581
582                 ret = schedule_timeout(ret);
583
584                 if (ret > 0 && intr && signal_pending(current))
585                         ret = -ERESTARTSYS;
586         }
587
588         __set_current_state(TASK_RUNNING);
589
590 fence_rm_cb:
591         while (i-- > 0)
592                 dma_fence_remove_callback(fences[i], &cb[i].base);
593
594 err_free_cb:
595         kfree(cb);
596
597         return ret;
598 }
599 EXPORT_SYMBOL(dma_fence_wait_any_timeout);
600
601 /**
602  * dma_fence_init - Initialize a custom fence.
603  * @fence: the fence to initialize
604  * @ops: the dma_fence_ops for operations on this fence
605  * @lock: the irqsafe spinlock to use for locking this fence
606  * @context: the execution context this fence is run on
607  * @seqno: a linear increasing sequence number for this context
608  *
609  * Initializes an allocated fence, the caller doesn't have to keep its
610  * refcount after committing with this fence, but it will need to hold a
611  * refcount again if &dma_fence_ops.enable_signaling gets called.
612  *
613  * context and seqno are used for easy comparison between fences, allowing
614  * to check which fence is later by simply using dma_fence_later().
615  */
616 void
617 dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
618                spinlock_t *lock, u64 context, unsigned seqno)
619 {
620         BUG_ON(!lock);
621         BUG_ON(!ops || !ops->get_driver_name || !ops->get_timeline_name);
622
623         kref_init(&fence->refcount);
624         fence->ops = ops;
625         INIT_LIST_HEAD(&fence->cb_list);
626         fence->lock = lock;
627         fence->context = context;
628         fence->seqno = seqno;
629         fence->flags = 0UL;
630         fence->error = 0;
631
632         trace_dma_fence_init(fence);
633 }
634 EXPORT_SYMBOL(dma_fence_init);