drivers/gpio/gpio-pca953x.c

   1 /*
   2  *  PCA953x 4/8/16/24/40 bit I/O ports
   3  *
   4  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
   5  *  Copyright (C) 2007 Marvell International Ltd.
   6  *
   7  *  Derived from drivers/i2c/chips/pca9539.c
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License as published by
  11  *  the Free Software Foundation; version 2 of the License.
  12  */
  13
  14 #include <linux/acpi.h>
  15 #include <linux/gpio/driver.h>
  16 #include <linux/gpio/consumer.h>
  17 #include <linux/i2c.h>
  18 #include <linux/init.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/module.h>
  21 #include <linux/of_platform.h>
  22 #include <linux/platform_data/pca953x.h>
  23 #include <linux/regmap.h>
  24 #include <linux/regulator/consumer.h>
  25 #include <linux/slab.h>
  26
  27 #include <asm/unaligned.h>
  28
  29 #define PCA953X_INPUT           0x00
  30 #define PCA953X_OUTPUT          0x01
  31 #define PCA953X_INVERT          0x02
  32 #define PCA953X_DIRECTION       0x03
  33
  34 #define REG_ADDR_MASK           0x3f
  35 #define REG_ADDR_EXT            0x40
  36 #define REG_ADDR_AI             0x80
  37
  38 #define PCA957X_IN              0x00
  39 #define PCA957X_INVRT           0x01
  40 #define PCA957X_BKEN            0x02
  41 #define PCA957X_PUPD            0x03
  42 #define PCA957X_CFG             0x04
  43 #define PCA957X_OUT             0x05
  44 #define PCA957X_MSK             0x06
  45 #define PCA957X_INTS            0x07
  46
  47 #define PCAL953X_OUT_STRENGTH   0x20
  48 #define PCAL953X_IN_LATCH       0x22
  49 #define PCAL953X_PULL_EN        0x23
  50 #define PCAL953X_PULL_SEL       0x24
  51 #define PCAL953X_INT_MASK       0x25
  52 #define PCAL953X_INT_STAT       0x26
  53 #define PCAL953X_OUT_CONF       0x27
  54
  55 #define PCAL6524_INT_EDGE       0x28
  56 #define PCAL6524_INT_CLR        0x2a
  57 #define PCAL6524_IN_STATUS      0x2b
  58 #define PCAL6524_OUT_INDCONF    0x2c
  59 #define PCAL6524_DEBOUNCE       0x2d
  60
  61 #define PCA_GPIO_MASK           0x00FF
  62
  63 #define PCAL_GPIO_MASK          0x1f
  64 #define PCAL_PINCTRL_MASK       0x60
  65
  66 #define PCA_INT                 0x0100
  67 #define PCA_PCAL                0x0200
  68 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
  69 #define PCA953X_TYPE            0x1000
  70 #define PCA957X_TYPE            0x2000
  71 #define PCA_TYPE_MASK           0xF000
  72
  73 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
  74
  75 static const struct i2c_device_id pca953x_id[] = {
  76         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
  77         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
  78         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
  79         { "pca9536", 4  | PCA953X_TYPE, },
  80         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
  81         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
  82         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
  83         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
  84         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
  85         { "pca9556", 8  | PCA953X_TYPE, },
  86         { "pca9557", 8  | PCA953X_TYPE, },
  87         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
  88         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
  89         { "pca9698", 40 | PCA953X_TYPE, },
  90
  91         { "pcal6524", 24 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
  92         { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
  93
  94         { "max7310", 8  | PCA953X_TYPE, },
  95         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
  96         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
  97         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
  98         { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
  99         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
 100         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
 101         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
 102         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
 103         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
 104         { "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
 105         { "xra1202", 8  | PCA953X_TYPE },
 106         { }
 107 };
 108 MODULE_DEVICE_TABLE(i2c, pca953x_id);
 109
 110 static const struct acpi_device_id pca953x_acpi_ids[] = {
 111         { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
 112         { }
 113 };
 114 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
 115
 116 #define MAX_BANK 5
 117 #define BANK_SZ 8
 118
 119 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
 120
 121 struct pca953x_reg_config {
 122         int direction;
 123         int output;
 124         int input;
 125         int invert;
 126 };
 127
 128 static const struct pca953x_reg_config pca953x_regs = {
 129         .direction = PCA953X_DIRECTION,
 130         .output = PCA953X_OUTPUT,
 131         .input = PCA953X_INPUT,
 132         .invert = PCA953X_INVERT,
 133 };
 134
 135 static const struct pca953x_reg_config pca957x_regs = {
 136         .direction = PCA957X_CFG,
 137         .output = PCA957X_OUT,
 138         .input = PCA957X_IN,
 139         .invert = PCA957X_INVRT,
 140 };
 141
 142 struct pca953x_chip {
 143         unsigned gpio_start;
 144         struct mutex i2c_lock;
 145         struct regmap *regmap;
 146
 147 #ifdef CONFIG_GPIO_PCA953X_IRQ
 148         struct mutex irq_lock;
 149         u8 irq_mask[MAX_BANK];
 150         u8 irq_stat[MAX_BANK];
 151         u8 irq_trig_raise[MAX_BANK];
 152         u8 irq_trig_fall[MAX_BANK];
 153         struct irq_chip irq_chip;
 154 #endif
 155
 156         struct i2c_client *client;
 157         struct gpio_chip gpio_chip;
 158         const char *const *names;
 159         unsigned long driver_data;
 160         struct regulator *regulator;
 161
 162         const struct pca953x_reg_config *regs;
 163 };
 164
 165 static int pca953x_bank_shift(struct pca953x_chip *chip)
 166 {
 167         return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 168 }
 169
 170 #define PCA953x_BANK_INPUT      BIT(0)
 171 #define PCA953x_BANK_OUTPUT     BIT(1)
 172 #define PCA953x_BANK_POLARITY   BIT(2)
 173 #define PCA953x_BANK_CONFIG     BIT(3)
 174
 175 #define PCA957x_BANK_INPUT      BIT(0)
 176 #define PCA957x_BANK_POLARITY   BIT(1)
 177 #define PCA957x_BANK_BUSHOLD    BIT(2)
 178 #define PCA957x_BANK_CONFIG     BIT(4)
 179 #define PCA957x_BANK_OUTPUT     BIT(5)
 180
 181 #define PCAL9xxx_BANK_IN_LATCH  BIT(8 + 2)
 182 #define PCAL9xxx_BANK_PULL_EN   BIT(8 + 3)
 183 #define PCAL9xxx_BANK_PULL_SEL  BIT(8 + 4)
 184 #define PCAL9xxx_BANK_IRQ_MASK  BIT(8 + 5)
 185 #define PCAL9xxx_BANK_IRQ_STAT  BIT(8 + 6)
 186
 187 /*
 188  * We care about the following registers:
 189  * - Standard set, below 0x40, each port can be replicated up to 8 times
 190  *   - PCA953x standard
 191  *     Input port                       0x00 + 0 * bank_size    R
 192  *     Output port                      0x00 + 1 * bank_size    RW
 193  *     Polarity Inversion port          0x00 + 2 * bank_size    RW
 194  *     Configuration port               0x00 + 3 * bank_size    RW
 195  *   - PCA957x with mixed up registers
 196  *     Input port                       0x00 + 0 * bank_size    R
 197  *     Polarity Inversion port          0x00 + 1 * bank_size    RW
 198  *     Bus hold port                    0x00 + 2 * bank_size    RW
 199  *     Configuration port               0x00 + 4 * bank_size    RW
 200  *     Output port                      0x00 + 5 * bank_size    RW
 201  *
 202  * - Extended set, above 0x40, often chip specific.
 203  *   - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
 204  *     Input latch register             0x40 + 2 * bank_size    RW
 205  *     Pull-up/pull-down enable reg     0x40 + 3 * bank_size    RW
 206  *     Pull-up/pull-down select reg     0x40 + 4 * bank_size    RW
 207  *     Interrupt mask register          0x40 + 5 * bank_size    RW
 208  *     Interrupt status register        0x40 + 6 * bank_size    R
 209  *
 210  * - Registers with bit 0x80 set, the AI bit
 211  *   The bit is cleared and the registers fall into one of the
 212  *   categories above.
 213  */
 214
 215 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
 216                                    u32 checkbank)
 217 {
 218         int bank_shift = pca953x_bank_shift(chip);
 219         int bank = (reg & REG_ADDR_MASK) >> bank_shift;
 220         int offset = reg & (BIT(bank_shift) - 1);
 221
 222         /* Special PCAL extended register check. */
 223         if (reg & REG_ADDR_EXT) {
 224                 if (!(chip->driver_data & PCA_PCAL))
 225                         return false;
 226                 bank += 8;
 227         }
 228
 229         /* Register is not in the matching bank. */
 230         if (!(BIT(bank) & checkbank))
 231                 return false;
 232
 233         /* Register is not within allowed range of bank. */
 234         if (offset >= NBANK(chip))
 235                 return false;
 236
 237         return true;
 238 }
 239
 240 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
 241 {
 242         struct pca953x_chip *chip = dev_get_drvdata(dev);
 243         u32 bank;
 244
 245         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 246                 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
 247                        PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
 248         } else {
 249                 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
 250                        PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
 251                        PCA957x_BANK_BUSHOLD;
 252         }
 253
 254         if (chip->driver_data & PCA_PCAL) {
 255                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 256                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
 257                         PCAL9xxx_BANK_IRQ_STAT;
 258         }
 259
 260         return pca953x_check_register(chip, reg, bank);
 261 }
 262
 263 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
 264 {
 265         struct pca953x_chip *chip = dev_get_drvdata(dev);
 266         u32 bank;
 267
 268         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 269                 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
 270                         PCA953x_BANK_CONFIG;
 271         } else {
 272                 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
 273                         PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
 274         }
 275
 276         if (chip->driver_data & PCA_PCAL)
 277                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 278                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
 279
 280         return pca953x_check_register(chip, reg, bank);
 281 }
 282
 283 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
 284 {
 285         struct pca953x_chip *chip = dev_get_drvdata(dev);
 286         u32 bank;
 287
 288         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
 289                 bank = PCA953x_BANK_INPUT;
 290         else
 291                 bank = PCA957x_BANK_INPUT;
 292
 293         if (chip->driver_data & PCA_PCAL)
 294                 bank |= PCAL9xxx_BANK_IRQ_STAT;
 295
 296         return pca953x_check_register(chip, reg, bank);
 297 }
 298
 299 const struct regmap_config pca953x_i2c_regmap = {
 300         .reg_bits = 8,
 301         .val_bits = 8,
 302
 303         .readable_reg = pca953x_readable_register,
 304         .writeable_reg = pca953x_writeable_register,
 305         .volatile_reg = pca953x_volatile_register,
 306
 307         .cache_type = REGCACHE_RBTREE,
 308         .max_register = 0x7f,
 309 };
 310
 311 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
 312                               bool write, bool addrinc)
 313 {
 314         int bank_shift = pca953x_bank_shift(chip);
 315         int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
 316         int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
 317         u8 regaddr = pinctrl | addr | (off / BANK_SZ);
 318
 319         /* Single byte read doesn't need AI bit set. */
 320         if (!addrinc)
 321                 return regaddr;
 322
 323         /* Chips with 24 and more GPIOs always support Auto Increment */
 324         if (write && NBANK(chip) > 2)
 325                 regaddr |= REG_ADDR_AI;
 326
 327         /* PCA9575 needs address-increment on multi-byte writes */
 328         if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
 329                 regaddr |= REG_ADDR_AI;
 330
 331         return regaddr;
 332 }
 333
 334 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
 335 {
 336         u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true);
 337         int ret;
 338
 339         ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip));
 340         if (ret < 0) {
 341                 dev_err(&chip->client->dev, "failed writing register\n");
 342                 return ret;
 343         }
 344
 345         return 0;
 346 }
 347
 348 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
 349 {
 350         u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true);
 351         int ret;
 352
 353         ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip));
 354         if (ret < 0) {
 355                 dev_err(&chip->client->dev, "failed reading register\n");
 356                 return ret;
 357         }
 358
 359         return 0;
 360 }
 361
 362 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
 363 {
 364         struct pca953x_chip *chip = gpiochip_get_data(gc);
 365         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
 366                                         true, false);
 367         u8 bit = BIT(off % BANK_SZ);
 368         int ret;
 369
 370         mutex_lock(&chip->i2c_lock);
 371         ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
 372         mutex_unlock(&chip->i2c_lock);
 373         return ret;
 374 }
 375
 376 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
 377                 unsigned off, int val)
 378 {
 379         struct pca953x_chip *chip = gpiochip_get_data(gc);
 380         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
 381                                         true, false);
 382         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
 383                                         true, false);
 384         u8 bit = BIT(off % BANK_SZ);
 385         int ret;
 386
 387         mutex_lock(&chip->i2c_lock);
 388         /* set output level */
 389         ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 390         if (ret)
 391                 goto exit;
 392
 393         /* then direction */
 394         ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
 395 exit:
 396         mutex_unlock(&chip->i2c_lock);
 397         return ret;
 398 }
 399
 400 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
 401 {
 402         struct pca953x_chip *chip = gpiochip_get_data(gc);
 403         u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off,
 404                                        true, false);
 405         u8 bit = BIT(off % BANK_SZ);
 406         u32 reg_val;
 407         int ret;
 408
 409         mutex_lock(&chip->i2c_lock);
 410         ret = regmap_read(chip->regmap, inreg, &reg_val);
 411         mutex_unlock(&chip->i2c_lock);
 412         if (ret < 0) {
 413                 /* NOTE:  diagnostic already emitted; that's all we should
 414                  * do unless gpio_*_value_cansleep() calls become different
 415                  * from their nonsleeping siblings (and report faults).
 416                  */
 417                 return 0;
 418         }
 419
 420         return !!(reg_val & bit);
 421 }
 422
 423 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
 424 {
 425         struct pca953x_chip *chip = gpiochip_get_data(gc);
 426         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
 427                                         true, false);
 428         u8 bit = BIT(off % BANK_SZ);
 429
 430         mutex_lock(&chip->i2c_lock);
 431         regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 432         mutex_unlock(&chip->i2c_lock);
 433 }
 434
 435 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
 436 {
 437         struct pca953x_chip *chip = gpiochip_get_data(gc);
 438         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
 439                                         true, false);
 440         u8 bit = BIT(off % BANK_SZ);
 441         u32 reg_val;
 442         int ret;
 443
 444         mutex_lock(&chip->i2c_lock);
 445         ret = regmap_read(chip->regmap, dirreg, &reg_val);
 446         mutex_unlock(&chip->i2c_lock);
 447         if (ret < 0)
 448                 return ret;
 449
 450         return !!(reg_val & bit);
 451 }
 452
 453 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
 454                                       unsigned long *mask, unsigned long *bits)
 455 {
 456         struct pca953x_chip *chip = gpiochip_get_data(gc);
 457         unsigned int bank_mask, bank_val;
 458         int bank;
 459         u8 reg_val[MAX_BANK];
 460         int ret;
 461
 462         mutex_lock(&chip->i2c_lock);
 463         ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
 464         if (ret)
 465                 goto exit;
 466
 467         for (bank = 0; bank < NBANK(chip); bank++) {
 468                 bank_mask = mask[bank / sizeof(*mask)] >>
 469                            ((bank % sizeof(*mask)) * 8);
 470                 if (bank_mask) {
 471                         bank_val = bits[bank / sizeof(*bits)] >>
 472                                   ((bank % sizeof(*bits)) * 8);
 473                         bank_val &= bank_mask;
 474                         reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
 475                 }
 476         }
 477
 478         pca953x_write_regs(chip, chip->regs->output, reg_val);
 479 exit:
 480         mutex_unlock(&chip->i2c_lock);
 481 }
 482
 483 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
 484                                          unsigned int offset,
 485                                          unsigned long config)
 486 {
 487         u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset,
 488                                              true, false);
 489         u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset,
 490                                               true, false);
 491         u8 bit = BIT(offset % BANK_SZ);
 492         int ret;
 493
 494         /*
 495          * pull-up/pull-down configuration requires PCAL extended
 496          * registers
 497          */
 498         if (!(chip->driver_data & PCA_PCAL))
 499                 return -ENOTSUPP;
 500
 501         mutex_lock(&chip->i2c_lock);
 502
 503         /* Disable pull-up/pull-down */
 504         ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
 505         if (ret)
 506                 goto exit;
 507
 508         /* Configure pull-up/pull-down */
 509         if (config == PIN_CONFIG_BIAS_PULL_UP)
 510                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
 511         else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
 512                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
 513         if (ret)
 514                 goto exit;
 515
 516         /* Enable pull-up/pull-down */
 517         ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
 518
 519 exit:
 520         mutex_unlock(&chip->i2c_lock);
 521         return ret;
 522 }
 523
 524 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
 525                                    unsigned long config)
 526 {
 527         struct pca953x_chip *chip = gpiochip_get_data(gc);
 528
 529         switch (config) {
 530         case PIN_CONFIG_BIAS_PULL_UP:
 531         case PIN_CONFIG_BIAS_PULL_DOWN:
 532                 return pca953x_gpio_set_pull_up_down(chip, offset, config);
 533         default:
 534                 return -ENOTSUPP;
 535         }
 536 }
 537
 538 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
 539 {
 540         struct gpio_chip *gc;
 541
 542         gc = &chip->gpio_chip;
 543
 544         gc->direction_input  = pca953x_gpio_direction_input;
 545         gc->direction_output = pca953x_gpio_direction_output;
 546         gc->get = pca953x_gpio_get_value;
 547         gc->set = pca953x_gpio_set_value;
 548         gc->get_direction = pca953x_gpio_get_direction;
 549         gc->set_multiple = pca953x_gpio_set_multiple;
 550         gc->set_config = pca953x_gpio_set_config;
 551         gc->can_sleep = true;
 552
 553         gc->base = chip->gpio_start;
 554         gc->ngpio = gpios;
 555         gc->label = dev_name(&chip->client->dev);
 556         gc->parent = &chip->client->dev;
 557         gc->owner = THIS_MODULE;
 558         gc->names = chip->names;
 559 }
 560
 561 #ifdef CONFIG_GPIO_PCA953X_IRQ
 562 static void pca953x_irq_mask(struct irq_data *d)
 563 {
 564         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 565         struct pca953x_chip *chip = gpiochip_get_data(gc);
 566
 567         chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
 568 }
 569
 570 static void pca953x_irq_unmask(struct irq_data *d)
 571 {
 572         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 573         struct pca953x_chip *chip = gpiochip_get_data(gc);
 574
 575         chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
 576 }
 577
 578 static void pca953x_irq_bus_lock(struct irq_data *d)
 579 {
 580         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 581         struct pca953x_chip *chip = gpiochip_get_data(gc);
 582
 583         mutex_lock(&chip->irq_lock);
 584 }
 585
 586 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 587 {
 588         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 589         struct pca953x_chip *chip = gpiochip_get_data(gc);
 590         u8 new_irqs;
 591         int level, i;
 592         u8 invert_irq_mask[MAX_BANK];
 593         int reg_direction[MAX_BANK];
 594
 595         regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
 596                          NBANK(chip));
 597
 598         if (chip->driver_data & PCA_PCAL) {
 599                 /* Enable latch on interrupt-enabled inputs */
 600                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
 601
 602                 for (i = 0; i < NBANK(chip); i++)
 603                         invert_irq_mask[i] = ~chip->irq_mask[i];
 604
 605                 /* Unmask enabled interrupts */
 606                 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
 607         }
 608
 609         /* Look for any newly setup interrupt */
 610         for (i = 0; i < NBANK(chip); i++) {
 611                 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
 612                 new_irqs &= reg_direction[i];
 613
 614                 while (new_irqs) {
 615                         level = __ffs(new_irqs);
 616                         pca953x_gpio_direction_input(&chip->gpio_chip,
 617                                                         level + (BANK_SZ * i));
 618                         new_irqs &= ~(1 << level);
 619                 }
 620         }
 621
 622         mutex_unlock(&chip->irq_lock);
 623 }
 624
 625 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
 626 {
 627         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 628         struct pca953x_chip *chip = gpiochip_get_data(gc);
 629         int bank_nb = d->hwirq / BANK_SZ;
 630         u8 mask = 1 << (d->hwirq % BANK_SZ);
 631
 632         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
 633                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
 634                         d->irq, type);
 635                 return -EINVAL;
 636         }
 637
 638         if (type & IRQ_TYPE_EDGE_FALLING)
 639                 chip->irq_trig_fall[bank_nb] |= mask;
 640         else
 641                 chip->irq_trig_fall[bank_nb] &= ~mask;
 642
 643         if (type & IRQ_TYPE_EDGE_RISING)
 644                 chip->irq_trig_raise[bank_nb] |= mask;
 645         else
 646                 chip->irq_trig_raise[bank_nb] &= ~mask;
 647
 648         return 0;
 649 }
 650
 651 static void pca953x_irq_shutdown(struct irq_data *d)
 652 {
 653         struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
 654         u8 mask = 1 << (d->hwirq % BANK_SZ);
 655
 656         chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
 657         chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
 658 }
 659
 660 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
 661 {
 662         u8 cur_stat[MAX_BANK];
 663         u8 old_stat[MAX_BANK];
 664         bool pending_seen = false;
 665         bool trigger_seen = false;
 666         u8 trigger[MAX_BANK];
 667         int reg_direction[MAX_BANK];
 668         int ret, i;
 669
 670         if (chip->driver_data & PCA_PCAL) {
 671                 /* Read the current interrupt status from the device */
 672                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
 673                 if (ret)
 674                         return false;
 675
 676                 /* Check latched inputs and clear interrupt status */
 677                 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
 678                 if (ret)
 679                         return false;
 680
 681                 for (i = 0; i < NBANK(chip); i++) {
 682                         /* Apply filter for rising/falling edge selection */
 683                         pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
 684                                 (cur_stat[i] & chip->irq_trig_raise[i]);
 685                         pending[i] &= trigger[i];
 686                         if (pending[i])
 687                                 pending_seen = true;
 688                 }
 689
 690                 return pending_seen;
 691         }
 692
 693         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 694         if (ret)
 695                 return false;
 696
 697         /* Remove output pins from the equation */
 698         regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
 699                          NBANK(chip));
 700         for (i = 0; i < NBANK(chip); i++)
 701                 cur_stat[i] &= reg_direction[i];
 702
 703         memcpy(old_stat, chip->irq_stat, NBANK(chip));
 704
 705         for (i = 0; i < NBANK(chip); i++) {
 706                 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
 707                 if (trigger[i])
 708                         trigger_seen = true;
 709         }
 710
 711         if (!trigger_seen)
 712                 return false;
 713
 714         memcpy(chip->irq_stat, cur_stat, NBANK(chip));
 715
 716         for (i = 0; i < NBANK(chip); i++) {
 717                 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
 718                         (cur_stat[i] & chip->irq_trig_raise[i]);
 719                 pending[i] &= trigger[i];
 720                 if (pending[i])
 721                         pending_seen = true;
 722         }
 723
 724         return pending_seen;
 725 }
 726
 727 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 728 {
 729         struct pca953x_chip *chip = devid;
 730         u8 pending[MAX_BANK];
 731         u8 level;
 732         unsigned nhandled = 0;
 733         int i;
 734
 735         if (!pca953x_irq_pending(chip, pending))
 736                 return IRQ_NONE;
 737
 738         for (i = 0; i < NBANK(chip); i++) {
 739                 while (pending[i]) {
 740                         level = __ffs(pending[i]);
 741                         handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
 742                                                         level + (BANK_SZ * i)));
 743                         pending[i] &= ~(1 << level);
 744                         nhandled++;
 745                 }
 746         }
 747
 748         return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
 749 }
 750
 751 static int pca953x_irq_setup(struct pca953x_chip *chip,
 752                              int irq_base)
 753 {
 754         struct i2c_client *client = chip->client;
 755         struct irq_chip *irq_chip = &chip->irq_chip;
 756         int reg_direction[MAX_BANK];
 757         int ret, i;
 758
 759         if (!client->irq)
 760                 return 0;
 761
 762         if (irq_base == -1)
 763                 return 0;
 764
 765         if (!(chip->driver_data & PCA_INT))
 766                 return 0;
 767
 768         ret = pca953x_read_regs(chip, chip->regs->input, chip->irq_stat);
 769         if (ret)
 770                 return ret;
 771
 772         /*
 773          * There is no way to know which GPIO line generated the
 774          * interrupt.  We have to rely on the previous read for
 775          * this purpose.
 776          */
 777         regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
 778                          NBANK(chip));
 779         for (i = 0; i < NBANK(chip); i++)
 780                 chip->irq_stat[i] &= reg_direction[i];
 781         mutex_init(&chip->irq_lock);
 782
 783         ret = devm_request_threaded_irq(&client->dev, client->irq,
 784                                         NULL, pca953x_irq_handler,
 785                                         IRQF_TRIGGER_LOW | IRQF_ONESHOT |
 786                                         IRQF_SHARED,
 787                                         dev_name(&client->dev), chip);
 788         if (ret) {
 789                 dev_err(&client->dev, "failed to request irq %d\n",
 790                         client->irq);
 791                 return ret;
 792         }
 793
 794         irq_chip->name = dev_name(&chip->client->dev);
 795         irq_chip->irq_mask = pca953x_irq_mask;
 796         irq_chip->irq_unmask = pca953x_irq_unmask;
 797         irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
 798         irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
 799         irq_chip->irq_set_type = pca953x_irq_set_type;
 800         irq_chip->irq_shutdown = pca953x_irq_shutdown;
 801
 802         ret =  gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
 803                                            irq_base, handle_simple_irq,
 804                                            IRQ_TYPE_NONE);
 805         if (ret) {
 806                 dev_err(&client->dev,
 807                         "could not connect irqchip to gpiochip\n");
 808                 return ret;
 809         }
 810
 811         gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
 812
 813         return 0;
 814 }
 815
 816 #else /* CONFIG_GPIO_PCA953X_IRQ */
 817 static int pca953x_irq_setup(struct pca953x_chip *chip,
 818                              int irq_base)
 819 {
 820         struct i2c_client *client = chip->client;
 821
 822         if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
 823                 dev_warn(&client->dev, "interrupt support not compiled in\n");
 824
 825         return 0;
 826 }
 827 #endif
 828
 829 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
 830 {
 831         int ret;
 832         u8 val[MAX_BANK];
 833
 834         ret = regcache_sync_region(chip->regmap, chip->regs->output,
 835                                    chip->regs->output + NBANK(chip));
 836         if (ret != 0)
 837                 goto out;
 838
 839         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
 840                                    chip->regs->direction + NBANK(chip));
 841         if (ret != 0)
 842                 goto out;
 843
 844         /* set platform specific polarity inversion */
 845         if (invert)
 846                 memset(val, 0xFF, NBANK(chip));
 847         else
 848                 memset(val, 0, NBANK(chip));
 849
 850         ret = pca953x_write_regs(chip, chip->regs->invert, val);
 851 out:
 852         return ret;
 853 }
 854
 855 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
 856 {
 857         int ret;
 858         u8 val[MAX_BANK];
 859
 860         ret = device_pca95xx_init(chip, invert);
 861         if (ret)
 862                 goto out;
 863
 864         /* To enable register 6, 7 to control pull up and pull down */
 865         memset(val, 0x02, NBANK(chip));
 866         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
 867         if (ret)
 868                 goto out;
 869
 870         return 0;
 871 out:
 872         return ret;
 873 }
 874
 875 static const struct of_device_id pca953x_dt_ids[];
 876
 877 static int pca953x_probe(struct i2c_client *client,
 878                                    const struct i2c_device_id *i2c_id)
 879 {
 880         struct pca953x_platform_data *pdata;
 881         struct pca953x_chip *chip;
 882         int irq_base = 0;
 883         int ret;
 884         u32 invert = 0;
 885         struct regulator *reg;
 886
 887         chip = devm_kzalloc(&client->dev,
 888                         sizeof(struct pca953x_chip), GFP_KERNEL);
 889         if (chip == NULL)
 890                 return -ENOMEM;
 891
 892         pdata = dev_get_platdata(&client->dev);
 893         if (pdata) {
 894                 irq_base = pdata->irq_base;
 895                 chip->gpio_start = pdata->gpio_base;
 896                 invert = pdata->invert;
 897                 chip->names = pdata->names;
 898         } else {
 899                 struct gpio_desc *reset_gpio;
 900
 901                 chip->gpio_start = -1;
 902                 irq_base = 0;
 903
 904                 /*
 905                  * See if we need to de-assert a reset pin.
 906                  *
 907                  * There is no known ACPI-enabled platforms that are
 908                  * using "reset" GPIO. Otherwise any of those platform
 909                  * must use _DSD method with corresponding property.
 910                  */
 911                 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
 912                                                      GPIOD_OUT_LOW);
 913                 if (IS_ERR(reset_gpio))
 914                         return PTR_ERR(reset_gpio);
 915         }
 916
 917         chip->client = client;
 918
 919         reg = devm_regulator_get(&client->dev, "vcc");
 920         if (IS_ERR(reg)) {
 921                 ret = PTR_ERR(reg);
 922                 if (ret != -EPROBE_DEFER)
 923                         dev_err(&client->dev, "reg get err: %d\n", ret);
 924                 return ret;
 925         }
 926         ret = regulator_enable(reg);
 927         if (ret) {
 928                 dev_err(&client->dev, "reg en err: %d\n", ret);
 929                 return ret;
 930         }
 931         chip->regulator = reg;
 932
 933         if (i2c_id) {
 934                 chip->driver_data = i2c_id->driver_data;
 935         } else {
 936                 const struct acpi_device_id *acpi_id;
 937                 struct device *dev = &client->dev;
 938
 939                 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
 940                 if (!chip->driver_data) {
 941                         acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
 942                         if (!acpi_id) {
 943                                 ret = -ENODEV;
 944                                 goto err_exit;
 945                         }
 946
 947                         chip->driver_data = acpi_id->driver_data;
 948                 }
 949         }
 950
 951         i2c_set_clientdata(client, chip);
 952
 953         chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap);
 954         if (IS_ERR(chip->regmap)) {
 955                 ret = PTR_ERR(chip->regmap);
 956                 goto err_exit;
 957         }
 958
 959         regcache_mark_dirty(chip->regmap);
 960
 961         mutex_init(&chip->i2c_lock);
 962         /*
 963          * In case we have an i2c-mux controlled by a GPIO provided by an
 964          * expander using the same driver higher on the device tree, read the
 965          * i2c adapter nesting depth and use the retrieved value as lockdep
 966          * subclass for chip->i2c_lock.
 967          *
 968          * REVISIT: This solution is not complete. It protects us from lockdep
 969          * false positives when the expander controlling the i2c-mux is on
 970          * a different level on the device tree, but not when it's on the same
 971          * level on a different branch (in which case the subclass number
 972          * would be the same).
 973          *
 974          * TODO: Once a correct solution is developed, a similar fix should be
 975          * applied to all other i2c-controlled GPIO expanders (and potentially
 976          * regmap-i2c).
 977          */
 978         lockdep_set_subclass(&chip->i2c_lock,
 979                              i2c_adapter_depth(client->adapter));
 980
 981         /* initialize cached registers from their original values.
 982          * we can't share this chip with another i2c master.
 983          */
 984         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
 985
 986         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 987                 chip->regs = &pca953x_regs;
 988                 ret = device_pca95xx_init(chip, invert);
 989         } else {
 990                 chip->regs = &pca957x_regs;
 991                 ret = device_pca957x_init(chip, invert);
 992         }
 993         if (ret)
 994                 goto err_exit;
 995
 996         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
 997         if (ret)
 998                 goto err_exit;
 999
1000         ret = pca953x_irq_setup(chip, irq_base);
1001         if (ret)
1002                 goto err_exit;
1003
1004         if (pdata && pdata->setup) {
1005                 ret = pdata->setup(client, chip->gpio_chip.base,
1006                                 chip->gpio_chip.ngpio, pdata->context);
1007                 if (ret < 0)
1008                         dev_warn(&client->dev, "setup failed, %d\n", ret);
1009         }
1010
1011         return 0;
1012
1013 err_exit:
1014         regulator_disable(chip->regulator);
1015         return ret;
1016 }
1017
1018 static int pca953x_remove(struct i2c_client *client)
1019 {
1020         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1021         struct pca953x_chip *chip = i2c_get_clientdata(client);
1022         int ret;
1023
1024         if (pdata && pdata->teardown) {
1025                 ret = pdata->teardown(client, chip->gpio_chip.base,
1026                                 chip->gpio_chip.ngpio, pdata->context);
1027                 if (ret < 0)
1028                         dev_err(&client->dev, "%s failed, %d\n",
1029                                         "teardown", ret);
1030         } else {
1031                 ret = 0;
1032         }
1033
1034         regulator_disable(chip->regulator);
1035
1036         return ret;
1037 }
1038
1039 #ifdef CONFIG_PM_SLEEP
1040 static int pca953x_regcache_sync(struct device *dev)
1041 {
1042         struct pca953x_chip *chip = dev_get_drvdata(dev);
1043         int ret;
1044
1045         /*
1046          * The ordering between direction and output is important,
1047          * sync these registers first and only then sync the rest.
1048          */
1049         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1050                                    chip->regs->direction + NBANK(chip));
1051         if (ret != 0) {
1052                 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1053                 return ret;
1054         }
1055
1056         ret = regcache_sync_region(chip->regmap, chip->regs->output,
1057                                    chip->regs->output + NBANK(chip));
1058         if (ret != 0) {
1059                 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1060                 return ret;
1061         }
1062
1063 #ifdef CONFIG_GPIO_PCA953X_IRQ
1064         if (chip->driver_data & PCA_PCAL) {
1065                 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1066                                            PCAL953X_IN_LATCH + NBANK(chip));
1067                 if (ret != 0) {
1068                         dev_err(dev, "Failed to sync INT latch registers: %d\n",
1069                                 ret);
1070                         return ret;
1071                 }
1072
1073                 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1074                                            PCAL953X_INT_MASK + NBANK(chip));
1075                 if (ret != 0) {
1076                         dev_err(dev, "Failed to sync INT mask registers: %d\n",
1077                                 ret);
1078                         return ret;
1079                 }
1080         }
1081 #endif
1082
1083         return 0;
1084 }
1085
1086 static int pca953x_suspend(struct device *dev)
1087 {
1088         struct pca953x_chip *chip = dev_get_drvdata(dev);
1089
1090         regcache_cache_only(chip->regmap, true);
1091
1092         regulator_disable(chip->regulator);
1093
1094         return 0;
1095 }
1096
1097 static int pca953x_resume(struct device *dev)
1098 {
1099         struct pca953x_chip *chip = dev_get_drvdata(dev);
1100         int ret;
1101
1102         ret = regulator_enable(chip->regulator);
1103         if (ret != 0) {
1104                 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1105                 return 0;
1106         }
1107
1108         regcache_cache_only(chip->regmap, false);
1109         regcache_mark_dirty(chip->regmap);
1110         ret = pca953x_regcache_sync(dev);
1111         if (ret)
1112                 return ret;
1113
1114         ret = regcache_sync(chip->regmap);
1115         if (ret != 0) {
1116                 dev_err(dev, "Failed to restore register map: %d\n", ret);
1117                 return ret;
1118         }
1119
1120         return 0;
1121 }
1122 #endif
1123
1124 /* convenience to stop overlong match-table lines */
1125 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1126 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1127
1128 static const struct of_device_id pca953x_dt_ids[] = {
1129         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1130         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1131         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1132         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1133         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1134         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1135         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1136         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1137         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1138         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1139         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1140         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1141         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1142         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1143
1144         { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1145         { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1146
1147         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1148         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1149         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1150         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1151         { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1152
1153         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1154         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1155         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1156         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1157         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1158
1159         { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1160
1161         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1162         { }
1163 };
1164
1165 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1166
1167 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1168
1169 static struct i2c_driver pca953x_driver = {
1170         .driver = {
1171                 .name   = "pca953x",
1172                 .pm     = &pca953x_pm_ops,
1173                 .of_match_table = pca953x_dt_ids,
1174                 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1175         },
1176         .probe          = pca953x_probe,
1177         .remove         = pca953x_remove,
1178         .id_table       = pca953x_id,
1179 };
1180
1181 static int __init pca953x_init(void)
1182 {
1183         return i2c_add_driver(&pca953x_driver);
1184 }
1185 /* register after i2c postcore initcall and before
1186  * subsys initcalls that may rely on these GPIOs
1187  */
1188 subsys_initcall(pca953x_init);
1189
1190 static void __exit pca953x_exit(void)
1191 {
1192         i2c_del_driver(&pca953x_driver);
1193 }
1194 module_exit(pca953x_exit);
1195
1196 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1197 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1198 MODULE_LICENSE("GPL");