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[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_job.c
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  *
23  */
24 #include <linux/kthread.h>
25 #include <linux/wait.h>
26 #include <linux/sched.h>
27 #include <drm/drmP.h>
28 #include "amdgpu.h"
29 #include "amdgpu_trace.h"
30
31 static void amdgpu_job_timedout(struct amd_sched_job *s_job)
32 {
33         struct amdgpu_job *job = container_of(s_job, struct amdgpu_job, base);
34
35         DRM_ERROR("ring %s timeout, last signaled seq=%u, last emitted seq=%u\n",
36                   job->base.sched->name,
37                   atomic_read(&job->ring->fence_drv.last_seq),
38                   job->ring->fence_drv.sync_seq);
39
40         amdgpu_gpu_recover(job->adev, job);
41 }
42
43 int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
44                      struct amdgpu_job **job, struct amdgpu_vm *vm)
45 {
46         size_t size = sizeof(struct amdgpu_job);
47
48         if (num_ibs == 0)
49                 return -EINVAL;
50
51         size += sizeof(struct amdgpu_ib) * num_ibs;
52
53         *job = kzalloc(size, GFP_KERNEL);
54         if (!*job)
55                 return -ENOMEM;
56
57         (*job)->adev = adev;
58         (*job)->vm = vm;
59         (*job)->ibs = (void *)&(*job)[1];
60         (*job)->num_ibs = num_ibs;
61
62         amdgpu_sync_create(&(*job)->sync);
63         amdgpu_sync_create(&(*job)->dep_sync);
64         amdgpu_sync_create(&(*job)->sched_sync);
65         (*job)->vram_lost_counter = atomic_read(&adev->vram_lost_counter);
66
67         return 0;
68 }
69
70 int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
71                              struct amdgpu_job **job)
72 {
73         int r;
74
75         r = amdgpu_job_alloc(adev, 1, job, NULL);
76         if (r)
77                 return r;
78
79         r = amdgpu_ib_get(adev, NULL, size, &(*job)->ibs[0]);
80         if (r)
81                 kfree(*job);
82         else
83                 (*job)->vm_pd_addr = adev->gart.table_addr;
84
85         return r;
86 }
87
88 void amdgpu_job_free_resources(struct amdgpu_job *job)
89 {
90         struct dma_fence *f;
91         unsigned i;
92
93         /* use sched fence if available */
94         f = job->base.s_fence ? &job->base.s_fence->finished : job->fence;
95
96         for (i = 0; i < job->num_ibs; ++i)
97                 amdgpu_ib_free(job->adev, &job->ibs[i], f);
98 }
99
100 static void amdgpu_job_free_cb(struct amd_sched_job *s_job)
101 {
102         struct amdgpu_job *job = container_of(s_job, struct amdgpu_job, base);
103
104         amdgpu_ring_priority_put(job->ring, s_job->s_priority);
105         dma_fence_put(job->fence);
106         amdgpu_sync_free(&job->sync);
107         amdgpu_sync_free(&job->dep_sync);
108         amdgpu_sync_free(&job->sched_sync);
109         kfree(job);
110 }
111
112 void amdgpu_job_free(struct amdgpu_job *job)
113 {
114         amdgpu_job_free_resources(job);
115
116         dma_fence_put(job->fence);
117         amdgpu_sync_free(&job->sync);
118         amdgpu_sync_free(&job->dep_sync);
119         amdgpu_sync_free(&job->sched_sync);
120         kfree(job);
121 }
122
123 int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
124                       struct amd_sched_entity *entity, void *owner,
125                       struct dma_fence **f)
126 {
127         int r;
128         job->ring = ring;
129
130         if (!f)
131                 return -EINVAL;
132
133         r = amd_sched_job_init(&job->base, &ring->sched, entity, owner);
134         if (r)
135                 return r;
136
137         job->owner = owner;
138         job->fence_ctx = entity->fence_context;
139         *f = dma_fence_get(&job->base.s_fence->finished);
140         amdgpu_job_free_resources(job);
141         amdgpu_ring_priority_get(job->ring, job->base.s_priority);
142         amd_sched_entity_push_job(&job->base, entity);
143
144         return 0;
145 }
146
147 static struct dma_fence *amdgpu_job_dependency(struct amd_sched_job *sched_job,
148                                                struct amd_sched_entity *s_entity)
149 {
150         struct amdgpu_job *job = to_amdgpu_job(sched_job);
151         struct amdgpu_vm *vm = job->vm;
152
153         struct dma_fence *fence = amdgpu_sync_get_fence(&job->dep_sync);
154         int r;
155
156         if (amd_sched_dependency_optimized(fence, s_entity)) {
157                 r = amdgpu_sync_fence(job->adev, &job->sched_sync, fence);
158                 if (r)
159                         DRM_ERROR("Error adding fence to sync (%d)\n", r);
160         }
161         if (!fence)
162                 fence = amdgpu_sync_get_fence(&job->sync);
163         while (fence == NULL && vm && !job->vm_id) {
164                 struct amdgpu_ring *ring = job->ring;
165
166                 r = amdgpu_vm_grab_id(vm, ring, &job->sync,
167                                       &job->base.s_fence->finished,
168                                       job);
169                 if (r)
170                         DRM_ERROR("Error getting VM ID (%d)\n", r);
171
172                 fence = amdgpu_sync_get_fence(&job->sync);
173         }
174
175         return fence;
176 }
177
178 static struct dma_fence *amdgpu_job_run(struct amd_sched_job *sched_job)
179 {
180         struct dma_fence *fence = NULL, *finished;
181         struct amdgpu_device *adev;
182         struct amdgpu_job *job;
183         int r;
184
185         if (!sched_job) {
186                 DRM_ERROR("job is null\n");
187                 return NULL;
188         }
189         job = to_amdgpu_job(sched_job);
190         finished = &job->base.s_fence->finished;
191         adev = job->adev;
192
193         BUG_ON(amdgpu_sync_peek_fence(&job->sync, NULL));
194
195         trace_amdgpu_sched_run_job(job);
196
197         if (job->vram_lost_counter != atomic_read(&adev->vram_lost_counter))
198                 dma_fence_set_error(finished, -ECANCELED);/* skip IB as well if VRAM lost */
199
200         if (finished->error < 0) {
201                 DRM_INFO("Skip scheduling IBs!\n");
202         } else {
203                 r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, job,
204                                        &fence);
205                 if (r)
206                         DRM_ERROR("Error scheduling IBs (%d)\n", r);
207         }
208         /* if gpu reset, hw fence will be replaced here */
209         dma_fence_put(job->fence);
210         job->fence = dma_fence_get(fence);
211
212         amdgpu_job_free_resources(job);
213         return fence;
214 }
215
216 const struct amd_sched_backend_ops amdgpu_sched_ops = {
217         .dependency = amdgpu_job_dependency,
218         .run_job = amdgpu_job_run,
219         .timedout_job = amdgpu_job_timedout,
220         .free_job = amdgpu_job_free_cb
221 };