2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include <linux/string.h>
27 #include <linux/acpi.h>
28 #include <linux/version.h>
29 #include <linux/i2c.h>
31 #include <drm/drm_probe_helper.h>
32 #include <drm/amdgpu_drm.h>
33 #include <drm/drm_edid.h>
35 #include "dm_services.h"
38 #include "amdgpu_dm.h"
39 #include "amdgpu_dm_irq.h"
41 #include "dm_helpers.h"
43 /* dm_helpers_parse_edid_caps
47 * @edid: [in] pointer to edid
48 * edid_caps: [in] pointer to edid caps
52 enum dc_edid_status dm_helpers_parse_edid_caps(
53 struct dc_context *ctx,
54 const struct dc_edid *edid,
55 struct dc_edid_caps *edid_caps)
57 struct edid *edid_buf = (struct edid *) edid->raw_edid;
65 enum dc_edid_status result = EDID_OK;
67 if (!edid_caps || !edid)
68 return EDID_BAD_INPUT;
70 if (!drm_edid_is_valid(edid_buf))
71 result = EDID_BAD_CHECKSUM;
73 edid_caps->manufacturer_id = (uint16_t) edid_buf->mfg_id[0] |
74 ((uint16_t) edid_buf->mfg_id[1])<<8;
75 edid_caps->product_id = (uint16_t) edid_buf->prod_code[0] |
76 ((uint16_t) edid_buf->prod_code[1])<<8;
77 edid_caps->serial_number = edid_buf->serial;
78 edid_caps->manufacture_week = edid_buf->mfg_week;
79 edid_caps->manufacture_year = edid_buf->mfg_year;
81 /* One of the four detailed_timings stores the monitor name. It's
82 * stored in an array of length 13. */
83 for (i = 0; i < 4; i++) {
84 if (edid_buf->detailed_timings[i].data.other_data.type == 0xfc) {
85 while (j < 13 && edid_buf->detailed_timings[i].data.other_data.data.str.str[j]) {
86 if (edid_buf->detailed_timings[i].data.other_data.data.str.str[j] == '\n')
89 edid_caps->display_name[j] =
90 edid_buf->detailed_timings[i].data.other_data.data.str.str[j];
96 edid_caps->edid_hdmi = drm_detect_hdmi_monitor(
97 (struct edid *) edid->raw_edid);
99 sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads);
100 if (sad_count <= 0) {
101 DRM_INFO("SADs count is: %d, don't need to read it\n",
106 edid_caps->audio_mode_count = sad_count < DC_MAX_AUDIO_DESC_COUNT ? sad_count : DC_MAX_AUDIO_DESC_COUNT;
107 for (i = 0; i < edid_caps->audio_mode_count; ++i) {
108 struct cea_sad *sad = &sads[i];
110 edid_caps->audio_modes[i].format_code = sad->format;
111 edid_caps->audio_modes[i].channel_count = sad->channels + 1;
112 edid_caps->audio_modes[i].sample_rate = sad->freq;
113 edid_caps->audio_modes[i].sample_size = sad->byte2;
116 sadb_count = drm_edid_to_speaker_allocation((struct edid *) edid->raw_edid, &sadb);
118 if (sadb_count < 0) {
119 DRM_ERROR("Couldn't read Speaker Allocation Data Block: %d\n", sadb_count);
124 edid_caps->speaker_flags = sadb[0];
126 edid_caps->speaker_flags = DEFAULT_SPEAKER_LOCATION;
134 static void get_payload_table(
135 struct amdgpu_dm_connector *aconnector,
136 struct dp_mst_stream_allocation_table *proposed_table)
139 struct drm_dp_mst_topology_mgr *mst_mgr =
140 &aconnector->mst_port->mst_mgr;
142 mutex_lock(&mst_mgr->payload_lock);
144 proposed_table->stream_count = 0;
146 /* number of active streams */
147 for (i = 0; i < mst_mgr->max_payloads; i++) {
148 if (mst_mgr->payloads[i].num_slots == 0)
149 break; /* end of vcp_id table */
151 ASSERT(mst_mgr->payloads[i].payload_state !=
152 DP_PAYLOAD_DELETE_LOCAL);
154 if (mst_mgr->payloads[i].payload_state == DP_PAYLOAD_LOCAL ||
155 mst_mgr->payloads[i].payload_state ==
158 struct dp_mst_stream_allocation *sa =
159 &proposed_table->stream_allocations[
160 proposed_table->stream_count];
162 sa->slot_count = mst_mgr->payloads[i].num_slots;
163 sa->vcp_id = mst_mgr->proposed_vcpis[i]->vcpi;
164 proposed_table->stream_count++;
168 mutex_unlock(&mst_mgr->payload_lock);
171 void dm_helpers_dp_update_branch_info(
172 struct dc_context *ctx,
173 const struct dc_link *link)
177 * Writes payload allocation table in immediate downstream device.
179 bool dm_helpers_dp_mst_write_payload_allocation_table(
180 struct dc_context *ctx,
181 const struct dc_stream_state *stream,
182 struct dp_mst_stream_allocation_table *proposed_table,
185 struct amdgpu_dm_connector *aconnector;
186 struct drm_dp_mst_topology_mgr *mst_mgr;
187 struct drm_dp_mst_port *mst_port;
194 aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
196 if (!aconnector || !aconnector->mst_port)
199 mst_mgr = &aconnector->mst_port->mst_mgr;
201 if (!mst_mgr->mst_state)
204 mst_port = aconnector->port;
207 clock = stream->timing.pix_clk_100hz / 10;
209 switch (stream->timing.display_color_depth) {
211 case COLOR_DEPTH_666:
214 case COLOR_DEPTH_888:
217 case COLOR_DEPTH_101010:
220 case COLOR_DEPTH_121212:
223 case COLOR_DEPTH_141414:
226 case COLOR_DEPTH_161616:
236 /* TODO need to know link rate */
238 pbn = drm_dp_calc_pbn_mode(clock, bpp);
240 slots = drm_dp_find_vcpi_slots(mst_mgr, pbn);
241 ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port, pbn, slots);
247 drm_dp_mst_reset_vcpi_slots(mst_mgr, mst_port);
250 ret = drm_dp_update_payload_part1(mst_mgr);
252 /* mst_mgr->->payloads are VC payload notify MST branch using DPCD or
253 * AUX message. The sequence is slot 1-63 allocated sequence for each
254 * stream. AMD ASIC stream slot allocation should follow the same
255 * sequence. copy DRM MST allocation to dc */
257 get_payload_table(aconnector, proposed_table);
266 * poll pending down reply
268 void dm_helpers_dp_mst_poll_pending_down_reply(
269 struct dc_context *ctx,
270 const struct dc_link *link)
274 * Clear payload allocation table before enable MST DP link.
276 void dm_helpers_dp_mst_clear_payload_allocation_table(
277 struct dc_context *ctx,
278 const struct dc_link *link)
282 * Polls for ACT (allocation change trigger) handled and sends
283 * ALLOCATE_PAYLOAD message.
285 bool dm_helpers_dp_mst_poll_for_allocation_change_trigger(
286 struct dc_context *ctx,
287 const struct dc_stream_state *stream)
289 struct amdgpu_dm_connector *aconnector;
290 struct drm_dp_mst_topology_mgr *mst_mgr;
293 aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
295 if (!aconnector || !aconnector->mst_port)
298 mst_mgr = &aconnector->mst_port->mst_mgr;
300 if (!mst_mgr->mst_state)
303 ret = drm_dp_check_act_status(mst_mgr);
311 bool dm_helpers_dp_mst_send_payload_allocation(
312 struct dc_context *ctx,
313 const struct dc_stream_state *stream,
316 struct amdgpu_dm_connector *aconnector;
317 struct drm_dp_mst_topology_mgr *mst_mgr;
318 struct drm_dp_mst_port *mst_port;
321 aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
323 if (!aconnector || !aconnector->mst_port)
326 mst_port = aconnector->port;
328 mst_mgr = &aconnector->mst_port->mst_mgr;
330 if (!mst_mgr->mst_state)
333 ret = drm_dp_update_payload_part2(mst_mgr);
339 drm_dp_mst_deallocate_vcpi(mst_mgr, mst_port);
344 void dm_dtn_log_begin(struct dc_context *ctx,
345 struct dc_log_buffer_ctx *log_ctx)
347 static const char msg[] = "[dtn begin]\n";
354 dm_dtn_log_append_v(ctx, log_ctx, "%s", msg);
357 void dm_dtn_log_append_v(struct dc_context *ctx,
358 struct dc_log_buffer_ctx *log_ctx,
359 const char *msg, ...)
366 /* No context, redirect to dmesg. */
367 struct va_format vaf;
373 pr_info("%pV", &vaf);
379 /* Measure the output. */
381 n = vsnprintf(NULL, 0, msg, args);
387 /* Reallocate the string buffer as needed. */
388 total = log_ctx->pos + n + 1;
390 if (total > log_ctx->size) {
391 char *buf = (char *)kvcalloc(total, sizeof(char), GFP_KERNEL);
394 memcpy(buf, log_ctx->buf, log_ctx->pos);
398 log_ctx->size = total;
405 /* Write the formatted string to the log buffer. */
408 log_ctx->buf + log_ctx->pos,
409 log_ctx->size - log_ctx->pos,
418 void dm_dtn_log_end(struct dc_context *ctx,
419 struct dc_log_buffer_ctx *log_ctx)
421 static const char msg[] = "[dtn end]\n";
428 dm_dtn_log_append_v(ctx, log_ctx, "%s", msg);
431 bool dm_helpers_dp_mst_start_top_mgr(
432 struct dc_context *ctx,
433 const struct dc_link *link,
436 struct amdgpu_dm_connector *aconnector = link->priv;
439 DRM_ERROR("Failed to found connector for link!");
444 DRM_INFO("DM_MST: Differing MST start on aconnector: %p [id: %d]\n",
445 aconnector, aconnector->base.base.id);
449 DRM_INFO("DM_MST: starting TM on aconnector: %p [id: %d]\n",
450 aconnector, aconnector->base.base.id);
452 return (drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, true) == 0);
455 void dm_helpers_dp_mst_stop_top_mgr(
456 struct dc_context *ctx,
457 const struct dc_link *link)
459 struct amdgpu_dm_connector *aconnector = link->priv;
462 DRM_ERROR("Failed to found connector for link!");
466 DRM_INFO("DM_MST: stopping TM on aconnector: %p [id: %d]\n",
467 aconnector, aconnector->base.base.id);
469 if (aconnector->mst_mgr.mst_state == true)
470 drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, false);
473 bool dm_helpers_dp_read_dpcd(
474 struct dc_context *ctx,
475 const struct dc_link *link,
481 struct amdgpu_dm_connector *aconnector = link->priv;
484 DRM_ERROR("Failed to found connector for link!");
488 return drm_dp_dpcd_read(&aconnector->dm_dp_aux.aux, address,
492 bool dm_helpers_dp_write_dpcd(
493 struct dc_context *ctx,
494 const struct dc_link *link,
499 struct amdgpu_dm_connector *aconnector = link->priv;
502 DRM_ERROR("Failed to found connector for link!");
506 return drm_dp_dpcd_write(&aconnector->dm_dp_aux.aux,
507 address, (uint8_t *)data, size) > 0;
510 bool dm_helpers_submit_i2c(
511 struct dc_context *ctx,
512 const struct dc_link *link,
513 struct i2c_command *cmd)
515 struct amdgpu_dm_connector *aconnector = link->priv;
516 struct i2c_msg *msgs;
518 int num = cmd->number_of_payloads;
522 DRM_ERROR("Failed to found connector for link!");
526 msgs = kcalloc(num, sizeof(struct i2c_msg), GFP_KERNEL);
531 for (i = 0; i < num; i++) {
532 msgs[i].flags = cmd->payloads[i].write ? 0 : I2C_M_RD;
533 msgs[i].addr = cmd->payloads[i].address;
534 msgs[i].len = cmd->payloads[i].length;
535 msgs[i].buf = cmd->payloads[i].data;
538 result = i2c_transfer(&aconnector->i2c->base, msgs, num) == num;
544 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
545 bool dm_helpers_dp_write_dsc_enable(
546 struct dc_context *ctx,
547 const struct dc_stream_state *stream,
551 uint8_t enable_dsc = enable ? 1 : 0;
553 return dm_helpers_dp_write_dpcd(ctx, stream->sink->link, DP_DSC_ENABLE, &enable_dsc, 1);
557 bool dm_helpers_is_dp_sink_present(struct dc_link *link)
559 bool dp_sink_present;
560 struct amdgpu_dm_connector *aconnector = link->priv;
563 BUG_ON("Failed to found connector for link!");
567 mutex_lock(&aconnector->dm_dp_aux.aux.hw_mutex);
568 dp_sink_present = dc_link_is_dp_sink_present(link);
569 mutex_unlock(&aconnector->dm_dp_aux.aux.hw_mutex);
570 return dp_sink_present;
573 enum dc_edid_status dm_helpers_read_local_edid(
574 struct dc_context *ctx,
575 struct dc_link *link,
576 struct dc_sink *sink)
578 struct amdgpu_dm_connector *aconnector = link->priv;
579 struct i2c_adapter *ddc;
581 enum dc_edid_status edid_status;
585 ddc = &aconnector->dm_dp_aux.aux.ddc;
587 ddc = &aconnector->i2c->base;
589 /* some dongles read edid incorrectly the first time,
590 * do check sum and retry to make sure read correct edid.
594 edid = drm_get_edid(&aconnector->base, ddc);
597 return EDID_NO_RESPONSE;
599 sink->dc_edid.length = EDID_LENGTH * (edid->extensions + 1);
600 memmove(sink->dc_edid.raw_edid, (uint8_t *)edid, sink->dc_edid.length);
602 /* We don't need the original edid anymore */
605 edid_status = dm_helpers_parse_edid_caps(
610 } while (edid_status == EDID_BAD_CHECKSUM && --retry > 0);
612 if (edid_status != EDID_OK)
613 DRM_ERROR("EDID err: %d, on connector: %s",
615 aconnector->base.name);
616 if (link->aux_mode) {
617 union test_request test_request = { {0} };
618 union test_response test_response = { {0} };
620 dm_helpers_dp_read_dpcd(ctx,
624 sizeof(union test_request));
626 if (!test_request.bits.EDID_READ)
629 test_response.bits.EDID_CHECKSUM_WRITE = 1;
631 dm_helpers_dp_write_dpcd(ctx,
633 DP_TEST_EDID_CHECKSUM,
634 &sink->dc_edid.raw_edid[sink->dc_edid.length-1],
637 dm_helpers_dp_write_dpcd(ctx,
641 sizeof(test_response));
648 void dm_set_dcn_clocks(struct dc_context *ctx, struct dc_clocks *clks)
650 /* TODO: something */