drivers/gpu/drm/amd/display/dc/i2caux/engine.h

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef __DAL_ENGINE_H__
  27 #define __DAL_ENGINE_H__
  28
  29 enum i2caux_transaction_operation {
  30         I2CAUX_TRANSACTION_READ,
  31         I2CAUX_TRANSACTION_WRITE
  32 };
  33
  34 enum i2caux_transaction_address_space {
  35         I2CAUX_TRANSACTION_ADDRESS_SPACE_I2C = 1,
  36         I2CAUX_TRANSACTION_ADDRESS_SPACE_DPCD
  37 };
  38
  39 struct i2caux_transaction_payload {
  40         enum i2caux_transaction_address_space address_space;
  41         uint32_t address;
  42         uint32_t length;
  43         uint8_t *data;
  44 };
  45
  46 enum i2caux_transaction_status {
  47         I2CAUX_TRANSACTION_STATUS_UNKNOWN = (-1L),
  48         I2CAUX_TRANSACTION_STATUS_SUCCEEDED,
  49         I2CAUX_TRANSACTION_STATUS_FAILED_CHANNEL_BUSY,
  50         I2CAUX_TRANSACTION_STATUS_FAILED_TIMEOUT,
  51         I2CAUX_TRANSACTION_STATUS_FAILED_PROTOCOL_ERROR,
  52         I2CAUX_TRANSACTION_STATUS_FAILED_NACK,
  53         I2CAUX_TRANSACTION_STATUS_FAILED_INCOMPLETE,
  54         I2CAUX_TRANSACTION_STATUS_FAILED_OPERATION,
  55         I2CAUX_TRANSACTION_STATUS_FAILED_INVALID_OPERATION,
  56         I2CAUX_TRANSACTION_STATUS_FAILED_BUFFER_OVERFLOW,
  57         I2CAUX_TRANSACTION_STATUS_FAILED_HPD_DISCON
  58 };
  59
  60 struct i2caux_transaction_request {
  61         enum i2caux_transaction_operation operation;
  62         struct i2caux_transaction_payload payload;
  63         enum i2caux_transaction_status status;
  64 };
  65
  66 enum i2caux_engine_type {
  67         I2CAUX_ENGINE_TYPE_UNKNOWN = (-1L),
  68         I2CAUX_ENGINE_TYPE_AUX,
  69         I2CAUX_ENGINE_TYPE_I2C_DDC_HW,
  70         I2CAUX_ENGINE_TYPE_I2C_GENERIC_HW,
  71         I2CAUX_ENGINE_TYPE_I2C_SW
  72 };
  73
  74 enum i2c_default_speed {
  75         I2CAUX_DEFAULT_I2C_HW_SPEED = 50,
  76         I2CAUX_DEFAULT_I2C_SW_SPEED = 50
  77 };
  78
  79 enum i2caux_transaction_action {
  80         I2CAUX_TRANSACTION_ACTION_I2C_WRITE = 0x00,
  81         I2CAUX_TRANSACTION_ACTION_I2C_READ = 0x10,
  82         I2CAUX_TRANSACTION_ACTION_I2C_STATUS_REQUEST = 0x20,
  83
  84         I2CAUX_TRANSACTION_ACTION_I2C_WRITE_MOT = 0x40,
  85         I2CAUX_TRANSACTION_ACTION_I2C_READ_MOT = 0x50,
  86         I2CAUX_TRANSACTION_ACTION_I2C_STATUS_REQUEST_MOT = 0x60,
  87
  88         I2CAUX_TRANSACTION_ACTION_DP_WRITE = 0x80,
  89         I2CAUX_TRANSACTION_ACTION_DP_READ = 0x90
  90 };
  91
  92 struct engine;
  93
  94 struct engine_funcs {
  95         enum i2caux_engine_type (*get_engine_type)(
  96                 const struct engine *engine);
  97         bool (*acquire)(
  98                 struct engine *engine,
  99                 struct ddc *ddc);
 100         bool (*submit_request)(
 101                 struct engine *engine,
 102                 struct i2caux_transaction_request *request,
 103                 bool middle_of_transaction);
 104         void (*release_engine)(
 105                 struct engine *engine);
 106 };
 107
 108 struct engine {
 109         const struct engine_funcs *funcs;
 110         struct ddc *ddc;
 111         struct dc_context *ctx;
 112 };
 113
 114 void dal_i2caux_construct_engine(
 115         struct engine *engine,
 116         struct dc_context *ctx);
 117
 118 void dal_i2caux_destruct_engine(
 119         struct engine *engine);
 120
 121 #endif