2 * Copyright 2016 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
24 #include "vega10_thermal.h"
25 #include "vega10_hwmgr.h"
26 #include "vega10_ppsmc.h"
27 #include "vega10_inc.h"
28 #include "soc15_common.h"
31 static int vega10_get_current_rpm(struct pp_hwmgr *hwmgr, uint32_t *current_rpm)
33 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentRpm);
34 *current_rpm = smum_get_argument(hwmgr);
38 int vega10_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr,
39 struct phm_fan_speed_info *fan_speed_info)
42 if (hwmgr->thermal_controller.fanInfo.bNoFan)
45 fan_speed_info->supports_percent_read = true;
46 fan_speed_info->supports_percent_write = true;
47 fan_speed_info->min_percent = 0;
48 fan_speed_info->max_percent = 100;
50 if (PP_CAP(PHM_PlatformCaps_FanSpeedInTableIsRPM) &&
51 hwmgr->thermal_controller.fanInfo.
52 ucTachometerPulsesPerRevolution) {
53 fan_speed_info->supports_rpm_read = true;
54 fan_speed_info->supports_rpm_write = true;
55 fan_speed_info->min_rpm =
56 hwmgr->thermal_controller.fanInfo.ulMinRPM;
57 fan_speed_info->max_rpm =
58 hwmgr->thermal_controller.fanInfo.ulMaxRPM;
60 fan_speed_info->min_rpm = 0;
61 fan_speed_info->max_rpm = 0;
67 int vega10_fan_ctrl_get_fan_speed_percent(struct pp_hwmgr *hwmgr,
73 if (hwmgr->thermal_controller.fanInfo.bNoFan)
76 if (vega10_get_current_rpm(hwmgr, ¤t_rpm))
79 if (hwmgr->thermal_controller.
80 advanceFanControlParameters.usMaxFanRPM != 0)
81 percent = current_rpm * 100 /
82 hwmgr->thermal_controller.
83 advanceFanControlParameters.usMaxFanRPM;
85 *speed = percent > 100 ? 100 : percent;
90 int vega10_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed)
92 struct amdgpu_device *adev = hwmgr->adev;
93 struct vega10_hwmgr *data = hwmgr->backend;
95 uint32_t crystal_clock_freq;
98 if (hwmgr->thermal_controller.fanInfo.bNoFan)
101 if (data->smu_features[GNLD_FAN_CONTROL].supported) {
102 result = vega10_get_current_rpm(hwmgr, speed);
105 REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_TACH_STATUS),
109 if (tach_period == 0)
112 crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
114 *speed = 60 * crystal_clock_freq * 10000 / tach_period;
121 * Set Fan Speed Control to static mode,
122 * so that the user can decide what speed to use.
123 * @param hwmgr the address of the powerplay hardware manager.
124 * mode the fan control mode, 0 default, 1 by percent, 5, by RPM
125 * @exception Should always succeed.
127 int vega10_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode)
129 struct amdgpu_device *adev = hwmgr->adev;
131 if (hwmgr->fan_ctrl_is_in_default_mode) {
132 hwmgr->fan_ctrl_default_mode =
133 REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL2),
134 CG_FDO_CTRL2, FDO_PWM_MODE);
136 REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL2),
138 hwmgr->fan_ctrl_is_in_default_mode = false;
141 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,
142 REG_SET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL2),
143 CG_FDO_CTRL2, TMIN, 0));
144 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,
145 REG_SET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL2),
146 CG_FDO_CTRL2, FDO_PWM_MODE, mode));
152 * Reset Fan Speed Control to default mode.
153 * @param hwmgr the address of the powerplay hardware manager.
154 * @exception Should always succeed.
156 int vega10_fan_ctrl_set_default_mode(struct pp_hwmgr *hwmgr)
158 struct amdgpu_device *adev = hwmgr->adev;
160 if (!hwmgr->fan_ctrl_is_in_default_mode) {
161 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,
162 REG_SET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL2),
163 CG_FDO_CTRL2, FDO_PWM_MODE,
164 hwmgr->fan_ctrl_default_mode));
165 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,
166 REG_SET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL2),
168 hwmgr->tmin << CG_FDO_CTRL2__TMIN__SHIFT));
169 hwmgr->fan_ctrl_is_in_default_mode = true;
176 * @fn vega10_enable_fan_control_feature
177 * @brief Enables the SMC Fan Control Feature.
179 * @param hwmgr - the address of the powerplay hardware manager.
180 * @return 0 on success. -1 otherwise.
182 static int vega10_enable_fan_control_feature(struct pp_hwmgr *hwmgr)
184 struct vega10_hwmgr *data = hwmgr->backend;
186 if (data->smu_features[GNLD_FAN_CONTROL].supported) {
187 PP_ASSERT_WITH_CODE(!vega10_enable_smc_features(
189 data->smu_features[GNLD_FAN_CONTROL].
191 "Attempt to Enable FAN CONTROL feature Failed!",
193 data->smu_features[GNLD_FAN_CONTROL].enabled = true;
199 static int vega10_disable_fan_control_feature(struct pp_hwmgr *hwmgr)
201 struct vega10_hwmgr *data = hwmgr->backend;
203 if (data->smu_features[GNLD_FAN_CONTROL].supported) {
204 PP_ASSERT_WITH_CODE(!vega10_enable_smc_features(
206 data->smu_features[GNLD_FAN_CONTROL].
208 "Attempt to Enable FAN CONTROL feature Failed!",
210 data->smu_features[GNLD_FAN_CONTROL].enabled = false;
216 int vega10_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr)
218 if (hwmgr->thermal_controller.fanInfo.bNoFan)
221 PP_ASSERT_WITH_CODE(!vega10_enable_fan_control_feature(hwmgr),
222 "Attempt to Enable SMC FAN CONTROL Feature Failed!",
229 int vega10_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr)
231 struct vega10_hwmgr *data = hwmgr->backend;
233 if (hwmgr->thermal_controller.fanInfo.bNoFan)
236 if (data->smu_features[GNLD_FAN_CONTROL].supported) {
237 PP_ASSERT_WITH_CODE(!vega10_disable_fan_control_feature(hwmgr),
238 "Attempt to Disable SMC FAN CONTROL Feature Failed!",
245 * Set Fan Speed in percent.
246 * @param hwmgr the address of the powerplay hardware manager.
247 * @param speed is the percentage value (0% - 100%) to be set.
248 * @exception Fails is the 100% setting appears to be 0.
250 int vega10_fan_ctrl_set_fan_speed_percent(struct pp_hwmgr *hwmgr,
253 struct amdgpu_device *adev = hwmgr->adev;
258 if (hwmgr->thermal_controller.fanInfo.bNoFan)
264 if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
265 vega10_fan_ctrl_stop_smc_fan_control(hwmgr);
267 duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1),
268 CG_FDO_CTRL1, FMAX_DUTY100);
273 tmp64 = (uint64_t)speed * duty100;
275 duty = (uint32_t)tmp64;
277 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL0,
278 REG_SET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL0),
279 CG_FDO_CTRL0, FDO_STATIC_DUTY, duty));
281 return vega10_fan_ctrl_set_static_mode(hwmgr, FDO_PWM_MODE_STATIC);
285 * Reset Fan Speed to default.
286 * @param hwmgr the address of the powerplay hardware manager.
287 * @exception Always succeeds.
289 int vega10_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr)
291 if (hwmgr->thermal_controller.fanInfo.bNoFan)
294 if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
295 return vega10_fan_ctrl_start_smc_fan_control(hwmgr);
297 return vega10_fan_ctrl_set_default_mode(hwmgr);
301 * Set Fan Speed in RPM.
302 * @param hwmgr the address of the powerplay hardware manager.
303 * @param speed is the percentage value (min - max) to be set.
304 * @exception Fails is the speed not lie between min and max.
306 int vega10_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed)
308 struct amdgpu_device *adev = hwmgr->adev;
309 uint32_t tach_period;
310 uint32_t crystal_clock_freq;
313 if (hwmgr->thermal_controller.fanInfo.bNoFan ||
314 (speed < hwmgr->thermal_controller.fanInfo.ulMinRPM) ||
315 (speed > hwmgr->thermal_controller.fanInfo.ulMaxRPM))
318 if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
319 result = vega10_fan_ctrl_stop_smc_fan_control(hwmgr);
322 crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
323 tach_period = 60 * crystal_clock_freq * 10000 / (8 * speed);
324 WREG32_SOC15(THM, 0, mmCG_TACH_STATUS,
325 REG_SET_FIELD(RREG32_SOC15(THM, 0, mmCG_TACH_STATUS),
326 CG_TACH_STATUS, TACH_PERIOD,
329 return vega10_fan_ctrl_set_static_mode(hwmgr, FDO_PWM_MODE_STATIC_RPM);
333 * Reads the remote temperature from the SIslands thermal controller.
335 * @param hwmgr The address of the hardware manager.
337 int vega10_thermal_get_temperature(struct pp_hwmgr *hwmgr)
339 struct amdgpu_device *adev = hwmgr->adev;
342 temp = RREG32_SOC15(THM, 0, mmCG_MULT_THERMAL_STATUS);
344 temp = (temp & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >>
345 CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT;
349 temp *= PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
355 * Set the requested temperature range for high and low alert signals
357 * @param hwmgr The address of the hardware manager.
358 * @param range Temperature range to be programmed for
359 * high and low alert signals
360 * @exception PP_Result_BadInput if the input data is not valid.
362 static int vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
363 struct PP_TemperatureRange *range)
365 struct amdgpu_device *adev = hwmgr->adev;
366 int low = VEGA10_THERMAL_MINIMUM_ALERT_TEMP *
367 PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
368 int high = VEGA10_THERMAL_MAXIMUM_ALERT_TEMP *
369 PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
372 if (low < range->min)
374 if (high > range->max)
380 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL);
382 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
383 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
384 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
385 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
386 val &= (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK) &
387 (~THM_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK) &
388 (~THM_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK);
390 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);
396 * Programs thermal controller one-time setting registers
398 * @param hwmgr The address of the hardware manager.
400 static int vega10_thermal_initialize(struct pp_hwmgr *hwmgr)
402 struct amdgpu_device *adev = hwmgr->adev;
404 if (hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution) {
405 WREG32_SOC15(THM, 0, mmCG_TACH_CTRL,
406 REG_SET_FIELD(RREG32_SOC15(THM, 0, mmCG_TACH_CTRL),
407 CG_TACH_CTRL, EDGE_PER_REV,
408 hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution - 1));
411 WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,
412 REG_SET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL2),
413 CG_FDO_CTRL2, TACH_PWM_RESP_RATE, 0x28));
419 * Enable thermal alerts on the RV770 thermal controller.
421 * @param hwmgr The address of the hardware manager.
423 static int vega10_thermal_enable_alert(struct pp_hwmgr *hwmgr)
425 struct amdgpu_device *adev = hwmgr->adev;
426 struct vega10_hwmgr *data = hwmgr->backend;
429 if (data->smu_features[GNLD_FW_CTF].supported) {
430 if (data->smu_features[GNLD_FW_CTF].enabled)
431 printk("[Thermal_EnableAlert] FW CTF Already Enabled!\n");
433 PP_ASSERT_WITH_CODE(!vega10_enable_smc_features(hwmgr,
435 data->smu_features[GNLD_FW_CTF].smu_feature_bitmap),
436 "Attempt to Enable FW CTF feature Failed!",
438 data->smu_features[GNLD_FW_CTF].enabled = true;
441 val |= (1 << THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT);
442 val |= (1 << THM_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT);
443 val |= (1 << THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT);
445 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);
451 * Disable thermal alerts on the RV770 thermal controller.
452 * @param hwmgr The address of the hardware manager.
454 int vega10_thermal_disable_alert(struct pp_hwmgr *hwmgr)
456 struct amdgpu_device *adev = hwmgr->adev;
457 struct vega10_hwmgr *data = hwmgr->backend;
459 if (data->smu_features[GNLD_FW_CTF].supported) {
460 if (!data->smu_features[GNLD_FW_CTF].enabled)
461 printk("[Thermal_EnableAlert] FW CTF Already disabled!\n");
464 PP_ASSERT_WITH_CODE(!vega10_enable_smc_features(hwmgr,
466 data->smu_features[GNLD_FW_CTF].smu_feature_bitmap),
467 "Attempt to disable FW CTF feature Failed!",
469 data->smu_features[GNLD_FW_CTF].enabled = false;
472 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0);
478 * Uninitialize the thermal controller.
479 * Currently just disables alerts.
480 * @param hwmgr The address of the hardware manager.
482 int vega10_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr)
484 int result = vega10_thermal_disable_alert(hwmgr);
486 if (!hwmgr->thermal_controller.fanInfo.bNoFan)
487 vega10_fan_ctrl_set_default_mode(hwmgr);
493 * Set up the fan table to control the fan using the SMC.
494 * @param hwmgr the address of the powerplay hardware manager.
495 * @param pInput the pointer to input data
496 * @param pOutput the pointer to output data
497 * @param pStorage the pointer to temporary storage
498 * @param Result the last failure code
499 * @return result from set temperature range routine
501 int vega10_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
504 struct vega10_hwmgr *data = hwmgr->backend;
505 PPTable_t *table = &(data->smc_state_table.pp_table);
507 if (!data->smu_features[GNLD_FAN_CONTROL].supported)
510 table->FanMaximumRpm = (uint16_t)hwmgr->thermal_controller.
511 advanceFanControlParameters.usMaxFanRPM;
512 table->FanThrottlingRpm = hwmgr->thermal_controller.
513 advanceFanControlParameters.usFanRPMMaxLimit;
514 table->FanAcousticLimitRpm = (uint16_t)(hwmgr->thermal_controller.
515 advanceFanControlParameters.ulMinFanSCLKAcousticLimit);
516 table->FanTargetTemperature = hwmgr->thermal_controller.
517 advanceFanControlParameters.usTMax;
519 smum_send_msg_to_smc_with_parameter(hwmgr,
520 PPSMC_MSG_SetFanTemperatureTarget,
521 (uint32_t)table->FanTargetTemperature);
523 table->FanPwmMin = hwmgr->thermal_controller.
524 advanceFanControlParameters.usPWMMin * 255 / 100;
525 table->FanTargetGfxclk = (uint16_t)(hwmgr->thermal_controller.
526 advanceFanControlParameters.ulTargetGfxClk);
527 table->FanGainEdge = hwmgr->thermal_controller.
528 advanceFanControlParameters.usFanGainEdge;
529 table->FanGainHotspot = hwmgr->thermal_controller.
530 advanceFanControlParameters.usFanGainHotspot;
531 table->FanGainLiquid = hwmgr->thermal_controller.
532 advanceFanControlParameters.usFanGainLiquid;
533 table->FanGainVrVddc = hwmgr->thermal_controller.
534 advanceFanControlParameters.usFanGainVrVddc;
535 table->FanGainVrMvdd = hwmgr->thermal_controller.
536 advanceFanControlParameters.usFanGainVrMvdd;
537 table->FanGainPlx = hwmgr->thermal_controller.
538 advanceFanControlParameters.usFanGainPlx;
539 table->FanGainHbm = hwmgr->thermal_controller.
540 advanceFanControlParameters.usFanGainHbm;
541 table->FanZeroRpmEnable = hwmgr->thermal_controller.
542 advanceFanControlParameters.ucEnableZeroRPM;
543 table->FanStopTemp = hwmgr->thermal_controller.
544 advanceFanControlParameters.usZeroRPMStopTemperature;
545 table->FanStartTemp = hwmgr->thermal_controller.
546 advanceFanControlParameters.usZeroRPMStartTemperature;
548 ret = smum_smc_table_manager(hwmgr,
549 (uint8_t *)(&(data->smc_state_table.pp_table)),
552 pr_info("Failed to update Fan Control Table in PPTable!");
558 * Start the fan control on the SMC.
559 * @param hwmgr the address of the powerplay hardware manager.
560 * @param pInput the pointer to input data
561 * @param pOutput the pointer to output data
562 * @param pStorage the pointer to temporary storage
563 * @param Result the last failure code
564 * @return result from set temperature range routine
566 int vega10_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr)
568 /* If the fantable setup has failed we could have disabled
569 * PHM_PlatformCaps_MicrocodeFanControl even after
570 * this function was included in the table.
571 * Make sure that we still think controlling the fan is OK.
573 if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
574 vega10_fan_ctrl_start_smc_fan_control(hwmgr);
580 int vega10_start_thermal_controller(struct pp_hwmgr *hwmgr,
581 struct PP_TemperatureRange *range)
588 vega10_thermal_initialize(hwmgr);
589 ret = vega10_thermal_set_temperature_range(hwmgr, range);
593 vega10_thermal_enable_alert(hwmgr);
594 /* We should restrict performance levels to low before we halt the SMC.
595 * On the other hand we are still in boot state when we do this
596 * so it would be pointless.
597 * If this assumption changes we have to revisit this table.
599 ret = vega10_thermal_setup_fan_table(hwmgr);
603 vega10_thermal_start_smc_fan_control(hwmgr);
611 int vega10_thermal_ctrl_uninitialize_thermal_controller(struct pp_hwmgr *hwmgr)
613 if (!hwmgr->thermal_controller.fanInfo.bNoFan) {
614 vega10_fan_ctrl_set_default_mode(hwmgr);
615 vega10_fan_ctrl_stop_smc_fan_control(hwmgr);