drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c

   1 /*
   2  * Copyright 2018 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23 #include <linux/module.h>
  24 #include <linux/slab.h>
  25 #include <linux/fb.h>
  26
  27 #include "smu11_driver_if.h"
  28 #include "vega20_processpptables.h"
  29 #include "ppatomfwctrl.h"
  30 #include "atomfirmware.h"
  31 #include "pp_debug.h"
  32 #include "cgs_common.h"
  33 #include "vega20_pptable.h"
  34
  35 static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable,
  36                 enum phm_platform_caps cap)
  37 {
  38         if (enable)
  39                 phm_cap_set(hwmgr->platform_descriptor.platformCaps, cap);
  40         else
  41                 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, cap);
  42 }
  43
  44 static const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
  45 {
  46         int index = GetIndexIntoMasterDataTable(powerplayinfo);
  47
  48         u16 size;
  49         u8 frev, crev;
  50         const void *table_address = hwmgr->soft_pp_table;
  51
  52         if (!table_address) {
  53                 table_address = (ATOM_Vega20_POWERPLAYTABLE *)
  54                                 smu_atom_get_data_table(hwmgr->adev, index,
  55                                                 &size, &frev, &crev);
  56
  57                 hwmgr->soft_pp_table = table_address;
  58                 hwmgr->soft_pp_table_size = size;
  59         }
  60
  61         return table_address;
  62 }
  63
  64 #if 0
  65 static void dump_pptable(PPTable_t *pptable)
  66 {
  67         int i;
  68
  69         pr_info("Version = 0x%08x\n", pptable->Version);
  70
  71         pr_info("FeaturesToRun[0] = 0x%08x\n", pptable->FeaturesToRun[0]);
  72         pr_info("FeaturesToRun[1] = 0x%08x\n", pptable->FeaturesToRun[1]);
  73
  74         pr_info("SocketPowerLimitAc0 = %d\n", pptable->SocketPowerLimitAc0);
  75         pr_info("SocketPowerLimitAc0Tau = %d\n", pptable->SocketPowerLimitAc0Tau);
  76         pr_info("SocketPowerLimitAc1 = %d\n", pptable->SocketPowerLimitAc1);
  77         pr_info("SocketPowerLimitAc1Tau = %d\n", pptable->SocketPowerLimitAc1Tau);
  78         pr_info("SocketPowerLimitAc2 = %d\n", pptable->SocketPowerLimitAc2);
  79         pr_info("SocketPowerLimitAc2Tau = %d\n", pptable->SocketPowerLimitAc2Tau);
  80         pr_info("SocketPowerLimitAc3 = %d\n", pptable->SocketPowerLimitAc3);
  81         pr_info("SocketPowerLimitAc3Tau = %d\n", pptable->SocketPowerLimitAc3Tau);
  82         pr_info("SocketPowerLimitDc = %d\n", pptable->SocketPowerLimitDc);
  83         pr_info("SocketPowerLimitDcTau = %d\n", pptable->SocketPowerLimitDcTau);
  84         pr_info("TdcLimitSoc = %d\n", pptable->TdcLimitSoc);
  85         pr_info("TdcLimitSocTau = %d\n", pptable->TdcLimitSocTau);
  86         pr_info("TdcLimitGfx = %d\n", pptable->TdcLimitGfx);
  87         pr_info("TdcLimitGfxTau = %d\n", pptable->TdcLimitGfxTau);
  88
  89         pr_info("TedgeLimit = %d\n", pptable->TedgeLimit);
  90         pr_info("ThotspotLimit = %d\n", pptable->ThotspotLimit);
  91         pr_info("ThbmLimit = %d\n", pptable->ThbmLimit);
  92         pr_info("Tvr_gfxLimit = %d\n", pptable->Tvr_gfxLimit);
  93         pr_info("Tvr_memLimit = %d\n", pptable->Tvr_memLimit);
  94         pr_info("Tliquid1Limit = %d\n", pptable->Tliquid1Limit);
  95         pr_info("Tliquid2Limit = %d\n", pptable->Tliquid2Limit);
  96         pr_info("TplxLimit = %d\n", pptable->TplxLimit);
  97         pr_info("FitLimit = %d\n", pptable->FitLimit);
  98
  99         pr_info("PpmPowerLimit = %d\n", pptable->PpmPowerLimit);
 100         pr_info("PpmTemperatureThreshold = %d\n", pptable->PpmTemperatureThreshold);
 101
 102         pr_info("MemoryOnPackage = 0x%02x\n", pptable->MemoryOnPackage);
 103         pr_info("padding8_limits = 0x%02x\n", pptable->padding8_limits);
 104         pr_info("Tvr_SocLimit = %d\n", pptable->Tvr_SocLimit);
 105
 106         pr_info("UlvVoltageOffsetSoc = %d\n", pptable->UlvVoltageOffsetSoc);
 107         pr_info("UlvVoltageOffsetGfx = %d\n", pptable->UlvVoltageOffsetGfx);
 108
 109         pr_info("UlvSmnclkDid = %d\n", pptable->UlvSmnclkDid);
 110         pr_info("UlvMp1clkDid = %d\n", pptable->UlvMp1clkDid);
 111         pr_info("UlvGfxclkBypass = %d\n", pptable->UlvGfxclkBypass);
 112         pr_info("Padding234 = 0x%02x\n", pptable->Padding234);
 113
 114         pr_info("MinVoltageGfx = %d\n", pptable->MinVoltageGfx);
 115         pr_info("MinVoltageSoc = %d\n", pptable->MinVoltageSoc);
 116         pr_info("MaxVoltageGfx = %d\n", pptable->MaxVoltageGfx);
 117         pr_info("MaxVoltageSoc = %d\n", pptable->MaxVoltageSoc);
 118
 119         pr_info("LoadLineResistanceGfx = %d\n", pptable->LoadLineResistanceGfx);
 120         pr_info("LoadLineResistanceSoc = %d\n", pptable->LoadLineResistanceSoc);
 121
 122         pr_info("[PPCLK_GFXCLK]\n"
 123                         "  .VoltageMode          = 0x%02x\n"
 124                         "  .SnapToDiscrete       = 0x%02x\n"
 125                         "  .NumDiscreteLevels    = 0x%02x\n"
 126                         "  .padding              = 0x%02x\n"
 127                         "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
 128                         "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
 129                         pptable->DpmDescriptor[PPCLK_GFXCLK].VoltageMode,
 130                         pptable->DpmDescriptor[PPCLK_GFXCLK].SnapToDiscrete,
 131                         pptable->DpmDescriptor[PPCLK_GFXCLK].NumDiscreteLevels,
 132                         pptable->DpmDescriptor[PPCLK_GFXCLK].padding,
 133                         pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.m,
 134                         pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.b,
 135                         pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.a,
 136                         pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.b,
 137                         pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.c);
 138
 139         pr_info("[PPCLK_VCLK]\n"
 140                         "  .VoltageMode          = 0x%02x\n"
 141                         "  .SnapToDiscrete       = 0x%02x\n"
 142                         "  .NumDiscreteLevels    = 0x%02x\n"
 143                         "  .padding              = 0x%02x\n"
 144                         "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
 145                         "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
 146                         pptable->DpmDescriptor[PPCLK_VCLK].VoltageMode,
 147                         pptable->DpmDescriptor[PPCLK_VCLK].SnapToDiscrete,
 148                         pptable->DpmDescriptor[PPCLK_VCLK].NumDiscreteLevels,
 149                         pptable->DpmDescriptor[PPCLK_VCLK].padding,
 150                         pptable->DpmDescriptor[PPCLK_VCLK].ConversionToAvfsClk.m,
 151                         pptable->DpmDescriptor[PPCLK_VCLK].ConversionToAvfsClk.b,
 152                         pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.a,
 153                         pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.b,
 154                         pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.c);
 155
 156         pr_info("[PPCLK_DCLK]\n"
 157                         "  .VoltageMode          = 0x%02x\n"
 158                         "  .SnapToDiscrete       = 0x%02x\n"
 159                         "  .NumDiscreteLevels    = 0x%02x\n"
 160                         "  .padding              = 0x%02x\n"
 161                         "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
 162                         "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
 163                         pptable->DpmDescriptor[PPCLK_DCLK].VoltageMode,
 164                         pptable->DpmDescriptor[PPCLK_DCLK].SnapToDiscrete,
 165                         pptable->DpmDescriptor[PPCLK_DCLK].NumDiscreteLevels,
 166                         pptable->DpmDescriptor[PPCLK_DCLK].padding,
 167                         pptable->DpmDescriptor[PPCLK_DCLK].ConversionToAvfsClk.m,
 168                         pptable->DpmDescriptor[PPCLK_DCLK].ConversionToAvfsClk.b,
 169                         pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.a,
 170                         pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.b,
 171                         pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.c);
 172
 173         pr_info("[PPCLK_ECLK]\n"
 174                         "  .VoltageMode          = 0x%02x\n"
 175                         "  .SnapToDiscrete       = 0x%02x\n"
 176                         "  .NumDiscreteLevels    = 0x%02x\n"
 177                         "  .padding              = 0x%02x\n"
 178                         "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
 179                         "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
 180                         pptable->DpmDescriptor[PPCLK_ECLK].VoltageMode,
 181                         pptable->DpmDescriptor[PPCLK_ECLK].SnapToDiscrete,
 182                         pptable->DpmDescriptor[PPCLK_ECLK].NumDiscreteLevels,
 183                         pptable->DpmDescriptor[PPCLK_ECLK].padding,
 184                         pptable->DpmDescriptor[PPCLK_ECLK].ConversionToAvfsClk.m,
 185                         pptable->DpmDescriptor[PPCLK_ECLK].ConversionToAvfsClk.b,
 186                         pptable->DpmDescriptor[PPCLK_ECLK].SsCurve.a,
 187                         pptable->DpmDescriptor[PPCLK_ECLK].SsCurve.b,
 188                         pptable->DpmDescriptor[PPCLK_ECLK].SsCurve.c);
 189
 190         pr_info("[PPCLK_SOCCLK]\n"
 191                         "  .VoltageMode          = 0x%02x\n"
 192                         "  .SnapToDiscrete       = 0x%02x\n"
 193                         "  .NumDiscreteLevels    = 0x%02x\n"
 194                         "  .padding              = 0x%02x\n"
 195                         "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
 196                         "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
 197                         pptable->DpmDescriptor[PPCLK_SOCCLK].VoltageMode,
 198                         pptable->DpmDescriptor[PPCLK_SOCCLK].SnapToDiscrete,
 199                         pptable->DpmDescriptor[PPCLK_SOCCLK].NumDiscreteLevels,
 200                         pptable->DpmDescriptor[PPCLK_SOCCLK].padding,
 201                         pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.m,
 202                         pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.b,
 203                         pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.a,
 204                         pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.b,
 205                         pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.c);
 206
 207         pr_info("[PPCLK_UCLK]\n"
 208                         "  .VoltageMode          = 0x%02x\n"
 209                         "  .SnapToDiscrete       = 0x%02x\n"
 210                         "  .NumDiscreteLevels    = 0x%02x\n"
 211                         "  .padding              = 0x%02x\n"
 212                         "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
 213                         "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
 214                         pptable->DpmDescriptor[PPCLK_UCLK].VoltageMode,
 215                         pptable->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete,
 216                         pptable->DpmDescriptor[PPCLK_UCLK].NumDiscreteLevels,
 217                         pptable->DpmDescriptor[PPCLK_UCLK].padding,
 218                         pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.m,
 219                         pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.b,
 220                         pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.a,
 221                         pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.b,
 222                         pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.c);
 223
 224         pr_info("[PPCLK_DCEFCLK]\n"
 225                         "  .VoltageMode          = 0x%02x\n"
 226                         "  .SnapToDiscrete       = 0x%02x\n"
 227                         "  .NumDiscreteLevels    = 0x%02x\n"
 228                         "  .padding              = 0x%02x\n"
 229                         "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
 230                         "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
 231                         pptable->DpmDescriptor[PPCLK_DCEFCLK].VoltageMode,
 232                         pptable->DpmDescriptor[PPCLK_DCEFCLK].SnapToDiscrete,
 233                         pptable->DpmDescriptor[PPCLK_DCEFCLK].NumDiscreteLevels,
 234                         pptable->DpmDescriptor[PPCLK_DCEFCLK].padding,
 235                         pptable->DpmDescriptor[PPCLK_DCEFCLK].ConversionToAvfsClk.m,
 236                         pptable->DpmDescriptor[PPCLK_DCEFCLK].ConversionToAvfsClk.b,
 237                         pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.a,
 238                         pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.b,
 239                         pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.c);
 240
 241         pr_info("[PPCLK_DISPCLK]\n"
 242                         "  .VoltageMode          = 0x%02x\n"
 243                         "  .SnapToDiscrete       = 0x%02x\n"
 244                         "  .NumDiscreteLevels    = 0x%02x\n"
 245                         "  .padding              = 0x%02x\n"
 246                         "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
 247                         "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
 248                         pptable->DpmDescriptor[PPCLK_DISPCLK].VoltageMode,
 249                         pptable->DpmDescriptor[PPCLK_DISPCLK].SnapToDiscrete,
 250                         pptable->DpmDescriptor[PPCLK_DISPCLK].NumDiscreteLevels,
 251                         pptable->DpmDescriptor[PPCLK_DISPCLK].padding,
 252                         pptable->DpmDescriptor[PPCLK_DISPCLK].ConversionToAvfsClk.m,
 253                         pptable->DpmDescriptor[PPCLK_DISPCLK].ConversionToAvfsClk.b,
 254                         pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.a,
 255                         pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.b,
 256                         pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.c);
 257
 258         pr_info("[PPCLK_PIXCLK]\n"
 259                         "  .VoltageMode          = 0x%02x\n"
 260                         "  .SnapToDiscrete       = 0x%02x\n"
 261                         "  .NumDiscreteLevels    = 0x%02x\n"
 262                         "  .padding              = 0x%02x\n"
 263                         "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
 264                         "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
 265                         pptable->DpmDescriptor[PPCLK_PIXCLK].VoltageMode,
 266                         pptable->DpmDescriptor[PPCLK_PIXCLK].SnapToDiscrete,
 267                         pptable->DpmDescriptor[PPCLK_PIXCLK].NumDiscreteLevels,
 268                         pptable->DpmDescriptor[PPCLK_PIXCLK].padding,
 269                         pptable->DpmDescriptor[PPCLK_PIXCLK].ConversionToAvfsClk.m,
 270                         pptable->DpmDescriptor[PPCLK_PIXCLK].ConversionToAvfsClk.b,
 271                         pptable->DpmDescriptor[PPCLK_PIXCLK].SsCurve.a,
 272                         pptable->DpmDescriptor[PPCLK_PIXCLK].SsCurve.b,
 273                         pptable->DpmDescriptor[PPCLK_PIXCLK].SsCurve.c);
 274
 275         pr_info("[PPCLK_PHYCLK]\n"
 276                         "  .VoltageMode          = 0x%02x\n"
 277                         "  .SnapToDiscrete       = 0x%02x\n"
 278                         "  .NumDiscreteLevels    = 0x%02x\n"
 279                         "  .padding              = 0x%02x\n"
 280                         "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
 281                         "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
 282                         pptable->DpmDescriptor[PPCLK_PHYCLK].VoltageMode,
 283                         pptable->DpmDescriptor[PPCLK_PHYCLK].SnapToDiscrete,
 284                         pptable->DpmDescriptor[PPCLK_PHYCLK].NumDiscreteLevels,
 285                         pptable->DpmDescriptor[PPCLK_PHYCLK].padding,
 286                         pptable->DpmDescriptor[PPCLK_PHYCLK].ConversionToAvfsClk.m,
 287                         pptable->DpmDescriptor[PPCLK_PHYCLK].ConversionToAvfsClk.b,
 288                         pptable->DpmDescriptor[PPCLK_PHYCLK].SsCurve.a,
 289                         pptable->DpmDescriptor[PPCLK_PHYCLK].SsCurve.b,
 290                         pptable->DpmDescriptor[PPCLK_PHYCLK].SsCurve.c);
 291
 292         pr_info("[PPCLK_FCLK]\n"
 293                         "  .VoltageMode          = 0x%02x\n"
 294                         "  .SnapToDiscrete       = 0x%02x\n"
 295                         "  .NumDiscreteLevels    = 0x%02x\n"
 296                         "  .padding              = 0x%02x\n"
 297                         "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
 298                         "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
 299                         pptable->DpmDescriptor[PPCLK_FCLK].VoltageMode,
 300                         pptable->DpmDescriptor[PPCLK_FCLK].SnapToDiscrete,
 301                         pptable->DpmDescriptor[PPCLK_FCLK].NumDiscreteLevels,
 302                         pptable->DpmDescriptor[PPCLK_FCLK].padding,
 303                         pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.m,
 304                         pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.b,
 305                         pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.a,
 306                         pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.b,
 307                         pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.c);
 308
 309
 310         pr_info("FreqTableGfx\n");
 311         for (i = 0; i < NUM_GFXCLK_DPM_LEVELS; i++)
 312                 pr_info("  .[%02d] = %d\n", i, pptable->FreqTableGfx[i]);
 313
 314         pr_info("FreqTableVclk\n");
 315         for (i = 0; i < NUM_VCLK_DPM_LEVELS; i++)
 316                 pr_info("  .[%02d] = %d\n", i, pptable->FreqTableVclk[i]);
 317
 318         pr_info("FreqTableDclk\n");
 319         for (i = 0; i < NUM_DCLK_DPM_LEVELS; i++)
 320                 pr_info("  .[%02d] = %d\n", i, pptable->FreqTableDclk[i]);
 321
 322         pr_info("FreqTableEclk\n");
 323         for (i = 0; i < NUM_ECLK_DPM_LEVELS; i++)
 324                 pr_info("  .[%02d] = %d\n", i, pptable->FreqTableEclk[i]);
 325
 326         pr_info("FreqTableSocclk\n");
 327         for (i = 0; i < NUM_SOCCLK_DPM_LEVELS; i++)
 328                 pr_info("  .[%02d] = %d\n", i, pptable->FreqTableSocclk[i]);
 329
 330         pr_info("FreqTableUclk\n");
 331         for (i = 0; i < NUM_UCLK_DPM_LEVELS; i++)
 332                 pr_info("  .[%02d] = %d\n", i, pptable->FreqTableUclk[i]);
 333
 334         pr_info("FreqTableFclk\n");
 335         for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++)
 336                 pr_info("  .[%02d] = %d\n", i, pptable->FreqTableFclk[i]);
 337
 338         pr_info("FreqTableDcefclk\n");
 339         for (i = 0; i < NUM_DCEFCLK_DPM_LEVELS; i++)
 340                 pr_info("  .[%02d] = %d\n", i, pptable->FreqTableDcefclk[i]);
 341
 342         pr_info("FreqTableDispclk\n");
 343         for (i = 0; i < NUM_DISPCLK_DPM_LEVELS; i++)
 344                 pr_info("  .[%02d] = %d\n", i, pptable->FreqTableDispclk[i]);
 345
 346         pr_info("FreqTablePixclk\n");
 347         for (i = 0; i < NUM_PIXCLK_DPM_LEVELS; i++)
 348                 pr_info("  .[%02d] = %d\n", i, pptable->FreqTablePixclk[i]);
 349
 350         pr_info("FreqTablePhyclk\n");
 351         for (i = 0; i < NUM_PHYCLK_DPM_LEVELS; i++)
 352                 pr_info("  .[%02d] = %d\n", i, pptable->FreqTablePhyclk[i]);
 353
 354         pr_info("DcModeMaxFreq[PPCLK_GFXCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_GFXCLK]);
 355         pr_info("DcModeMaxFreq[PPCLK_VCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_VCLK]);
 356         pr_info("DcModeMaxFreq[PPCLK_DCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_DCLK]);
 357         pr_info("DcModeMaxFreq[PPCLK_ECLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_ECLK]);
 358         pr_info("DcModeMaxFreq[PPCLK_SOCCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_SOCCLK]);
 359         pr_info("DcModeMaxFreq[PPCLK_UCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_UCLK]);
 360         pr_info("DcModeMaxFreq[PPCLK_DCEFCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_DCEFCLK]);
 361         pr_info("DcModeMaxFreq[PPCLK_DISPCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_DISPCLK]);
 362         pr_info("DcModeMaxFreq[PPCLK_PIXCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_PIXCLK]);
 363         pr_info("DcModeMaxFreq[PPCLK_PHYCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_PHYCLK]);
 364         pr_info("DcModeMaxFreq[PPCLK_FCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_FCLK]);
 365         pr_info("Padding8_Clks = %d\n", pptable->Padding8_Clks);
 366
 367         pr_info("Mp0clkFreq\n");
 368         for (i = 0; i < NUM_MP0CLK_DPM_LEVELS; i++)
 369                 pr_info("  .[%d] = %d\n", i, pptable->Mp0clkFreq[i]);
 370
 371         pr_info("Mp0DpmVoltage\n");
 372         for (i = 0; i < NUM_MP0CLK_DPM_LEVELS; i++)
 373                 pr_info("  .[%d] = %d\n", i, pptable->Mp0DpmVoltage[i]);
 374
 375         pr_info("GfxclkFidle = 0x%x\n", pptable->GfxclkFidle);
 376         pr_info("GfxclkSlewRate = 0x%x\n", pptable->GfxclkSlewRate);
 377         pr_info("CksEnableFreq = 0x%x\n", pptable->CksEnableFreq);
 378         pr_info("Padding789 = 0x%x\n", pptable->Padding789);
 379         pr_info("CksVoltageOffset[a = 0x%08x b = 0x%08x c = 0x%08x]\n",
 380                         pptable->CksVoltageOffset.a,
 381                         pptable->CksVoltageOffset.b,
 382                         pptable->CksVoltageOffset.c);
 383         pr_info("Padding567[0] = 0x%x\n", pptable->Padding567[0]);
 384         pr_info("Padding567[1] = 0x%x\n", pptable->Padding567[1]);
 385         pr_info("Padding567[2] = 0x%x\n", pptable->Padding567[2]);
 386         pr_info("Padding567[3] = 0x%x\n", pptable->Padding567[3]);
 387         pr_info("GfxclkDsMaxFreq = %d\n", pptable->GfxclkDsMaxFreq);
 388         pr_info("GfxclkSource = 0x%x\n", pptable->GfxclkSource);
 389         pr_info("Padding456 = 0x%x\n", pptable->Padding456);
 390
 391         pr_info("LowestUclkReservedForUlv = %d\n", pptable->LowestUclkReservedForUlv);
 392         pr_info("Padding8_Uclk[0] = 0x%x\n", pptable->Padding8_Uclk[0]);
 393         pr_info("Padding8_Uclk[1] = 0x%x\n", pptable->Padding8_Uclk[1]);
 394         pr_info("Padding8_Uclk[2] = 0x%x\n", pptable->Padding8_Uclk[2]);
 395
 396         pr_info("PcieGenSpeed\n");
 397         for (i = 0; i < NUM_LINK_LEVELS; i++)
 398                 pr_info("  .[%d] = %d\n", i, pptable->PcieGenSpeed[i]);
 399
 400         pr_info("PcieLaneCount\n");
 401         for (i = 0; i < NUM_LINK_LEVELS; i++)
 402                 pr_info("  .[%d] = %d\n", i, pptable->PcieLaneCount[i]);
 403
 404         pr_info("LclkFreq\n");
 405         for (i = 0; i < NUM_LINK_LEVELS; i++)
 406                 pr_info("  .[%d] = %d\n", i, pptable->LclkFreq[i]);
 407
 408         pr_info("EnableTdpm = %d\n", pptable->EnableTdpm);
 409         pr_info("TdpmHighHystTemperature = %d\n", pptable->TdpmHighHystTemperature);
 410         pr_info("TdpmLowHystTemperature = %d\n", pptable->TdpmLowHystTemperature);
 411         pr_info("GfxclkFreqHighTempLimit = %d\n", pptable->GfxclkFreqHighTempLimit);
 412
 413         pr_info("FanStopTemp = %d\n", pptable->FanStopTemp);
 414         pr_info("FanStartTemp = %d\n", pptable->FanStartTemp);
 415
 416         pr_info("FanGainEdge = %d\n", pptable->FanGainEdge);
 417         pr_info("FanGainHotspot = %d\n", pptable->FanGainHotspot);
 418         pr_info("FanGainLiquid = %d\n", pptable->FanGainLiquid);
 419         pr_info("FanGainVrGfx = %d\n", pptable->FanGainVrGfx);
 420         pr_info("FanGainVrSoc = %d\n", pptable->FanGainVrSoc);
 421         pr_info("FanGainPlx = %d\n", pptable->FanGainPlx);
 422         pr_info("FanGainHbm = %d\n", pptable->FanGainHbm);
 423         pr_info("FanPwmMin = %d\n", pptable->FanPwmMin);
 424         pr_info("FanAcousticLimitRpm = %d\n", pptable->FanAcousticLimitRpm);
 425         pr_info("FanThrottlingRpm = %d\n", pptable->FanThrottlingRpm);
 426         pr_info("FanMaximumRpm = %d\n", pptable->FanMaximumRpm);
 427         pr_info("FanTargetTemperature = %d\n", pptable->FanTargetTemperature);
 428         pr_info("FanTargetGfxclk = %d\n", pptable->FanTargetGfxclk);
 429         pr_info("FanZeroRpmEnable = %d\n", pptable->FanZeroRpmEnable);
 430         pr_info("FanTachEdgePerRev = %d\n", pptable->FanTachEdgePerRev);
 431
 432         pr_info("FuzzyFan_ErrorSetDelta = %d\n", pptable->FuzzyFan_ErrorSetDelta);
 433         pr_info("FuzzyFan_ErrorRateSetDelta = %d\n", pptable->FuzzyFan_ErrorRateSetDelta);
 434         pr_info("FuzzyFan_PwmSetDelta = %d\n", pptable->FuzzyFan_PwmSetDelta);
 435         pr_info("FuzzyFan_Reserved = %d\n", pptable->FuzzyFan_Reserved);
 436
 437         pr_info("OverrideAvfsGb[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_GFX]);
 438         pr_info("OverrideAvfsGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_SOC]);
 439         pr_info("Padding8_Avfs[0] = %d\n", pptable->Padding8_Avfs[0]);
 440         pr_info("Padding8_Avfs[1] = %d\n", pptable->Padding8_Avfs[1]);
 441
 442         pr_info("qAvfsGb[AVFS_VOLTAGE_GFX]{a = 0x%x b = 0x%x c = 0x%x}\n",
 443                         pptable->qAvfsGb[AVFS_VOLTAGE_GFX].a,
 444                         pptable->qAvfsGb[AVFS_VOLTAGE_GFX].b,
 445                         pptable->qAvfsGb[AVFS_VOLTAGE_GFX].c);
 446         pr_info("qAvfsGb[AVFS_VOLTAGE_SOC]{a = 0x%x b = 0x%x c = 0x%x}\n",
 447                         pptable->qAvfsGb[AVFS_VOLTAGE_SOC].a,
 448                         pptable->qAvfsGb[AVFS_VOLTAGE_SOC].b,
 449                         pptable->qAvfsGb[AVFS_VOLTAGE_SOC].c);
 450         pr_info("dBtcGbGfxCksOn{a = 0x%x b = 0x%x c = 0x%x}\n",
 451                         pptable->dBtcGbGfxCksOn.a,
 452                         pptable->dBtcGbGfxCksOn.b,
 453                         pptable->dBtcGbGfxCksOn.c);
 454         pr_info("dBtcGbGfxCksOff{a = 0x%x b = 0x%x c = 0x%x}\n",
 455                         pptable->dBtcGbGfxCksOff.a,
 456                         pptable->dBtcGbGfxCksOff.b,
 457                         pptable->dBtcGbGfxCksOff.c);
 458         pr_info("dBtcGbGfxAfll{a = 0x%x b = 0x%x c = 0x%x}\n",
 459                         pptable->dBtcGbGfxAfll.a,
 460                         pptable->dBtcGbGfxAfll.b,
 461                         pptable->dBtcGbGfxAfll.c);
 462         pr_info("dBtcGbSoc{a = 0x%x b = 0x%x c = 0x%x}\n",
 463                         pptable->dBtcGbSoc.a,
 464                         pptable->dBtcGbSoc.b,
 465                         pptable->dBtcGbSoc.c);
 466         pr_info("qAgingGb[AVFS_VOLTAGE_GFX]{m = 0x%x b = 0x%x}\n",
 467                         pptable->qAgingGb[AVFS_VOLTAGE_GFX].m,
 468                         pptable->qAgingGb[AVFS_VOLTAGE_GFX].b);
 469         pr_info("qAgingGb[AVFS_VOLTAGE_SOC]{m = 0x%x b = 0x%x}\n",
 470                         pptable->qAgingGb[AVFS_VOLTAGE_SOC].m,
 471                         pptable->qAgingGb[AVFS_VOLTAGE_SOC].b);
 472
 473         pr_info("qStaticVoltageOffset[AVFS_VOLTAGE_GFX]{a = 0x%x b = 0x%x c = 0x%x}\n",
 474                         pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].a,
 475                         pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].b,
 476                         pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].c);
 477         pr_info("qStaticVoltageOffset[AVFS_VOLTAGE_SOC]{a = 0x%x b = 0x%x c = 0x%x}\n",
 478                         pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].a,
 479                         pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].b,
 480                         pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].c);
 481
 482         pr_info("DcTol[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_GFX]);
 483         pr_info("DcTol[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_SOC]);
 484
 485         pr_info("DcBtcEnabled[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_GFX]);
 486         pr_info("DcBtcEnabled[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_SOC]);
 487         pr_info("Padding8_GfxBtc[0] = 0x%x\n", pptable->Padding8_GfxBtc[0]);
 488         pr_info("Padding8_GfxBtc[1] = 0x%x\n", pptable->Padding8_GfxBtc[1]);
 489
 490         pr_info("DcBtcMin[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_GFX]);
 491         pr_info("DcBtcMin[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_SOC]);
 492         pr_info("DcBtcMax[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_GFX]);
 493         pr_info("DcBtcMax[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_SOC]);
 494
 495         pr_info("XgmiLinkSpeed\n");
 496         for (i = 0; i < NUM_XGMI_LEVELS; i++)
 497                 pr_info("  .[%d] = %d\n", i, pptable->XgmiLinkSpeed[i]);
 498         pr_info("XgmiLinkWidth\n");
 499         for (i = 0; i < NUM_XGMI_LEVELS; i++)
 500                 pr_info("  .[%d] = %d\n", i, pptable->XgmiLinkWidth[i]);
 501         pr_info("XgmiFclkFreq\n");
 502         for (i = 0; i < NUM_XGMI_LEVELS; i++)
 503                 pr_info("  .[%d] = %d\n", i, pptable->XgmiFclkFreq[i]);
 504         pr_info("XgmiUclkFreq\n");
 505         for (i = 0; i < NUM_XGMI_LEVELS; i++)
 506                 pr_info("  .[%d] = %d\n", i, pptable->XgmiUclkFreq[i]);
 507         pr_info("XgmiSocclkFreq\n");
 508         for (i = 0; i < NUM_XGMI_LEVELS; i++)
 509                 pr_info("  .[%d] = %d\n", i, pptable->XgmiSocclkFreq[i]);
 510         pr_info("XgmiSocVoltage\n");
 511         for (i = 0; i < NUM_XGMI_LEVELS; i++)
 512                 pr_info("  .[%d] = %d\n", i, pptable->XgmiSocVoltage[i]);
 513
 514         pr_info("DebugOverrides = 0x%x\n", pptable->DebugOverrides);
 515         pr_info("ReservedEquation0{a = 0x%x b = 0x%x c = 0x%x}\n",
 516                         pptable->ReservedEquation0.a,
 517                         pptable->ReservedEquation0.b,
 518                         pptable->ReservedEquation0.c);
 519         pr_info("ReservedEquation1{a = 0x%x b = 0x%x c = 0x%x}\n",
 520                         pptable->ReservedEquation1.a,
 521                         pptable->ReservedEquation1.b,
 522                         pptable->ReservedEquation1.c);
 523         pr_info("ReservedEquation2{a = 0x%x b = 0x%x c = 0x%x}\n",
 524                         pptable->ReservedEquation2.a,
 525                         pptable->ReservedEquation2.b,
 526                         pptable->ReservedEquation2.c);
 527         pr_info("ReservedEquation3{a = 0x%x b = 0x%x c = 0x%x}\n",
 528                         pptable->ReservedEquation3.a,
 529                         pptable->ReservedEquation3.b,
 530                         pptable->ReservedEquation3.c);
 531
 532         pr_info("MinVoltageUlvGfx = %d\n", pptable->MinVoltageUlvGfx);
 533         pr_info("MinVoltageUlvSoc = %d\n", pptable->MinVoltageUlvSoc);
 534
 535         pr_info("MGpuFanBoostLimitRpm = %d\n", pptable->MGpuFanBoostLimitRpm);
 536         pr_info("padding16_Fan = %d\n", pptable->padding16_Fan);
 537
 538         pr_info("FanGainVrMem0 = %d\n", pptable->FanGainVrMem0);
 539         pr_info("FanGainVrMem0 = %d\n", pptable->FanGainVrMem0);
 540
 541         pr_info("DcBtcGb[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_GFX]);
 542         pr_info("DcBtcGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_SOC]);
 543
 544         for (i = 0; i < 11; i++)
 545                 pr_info("Reserved[%d] = 0x%x\n", i, pptable->Reserved[i]);
 546
 547         for (i = 0; i < 3; i++)
 548                 pr_info("Padding32[%d] = 0x%x\n", i, pptable->Padding32[i]);
 549
 550         pr_info("MaxVoltageStepGfx = 0x%x\n", pptable->MaxVoltageStepGfx);
 551         pr_info("MaxVoltageStepSoc = 0x%x\n", pptable->MaxVoltageStepSoc);
 552
 553         pr_info("VddGfxVrMapping = 0x%x\n", pptable->VddGfxVrMapping);
 554         pr_info("VddSocVrMapping = 0x%x\n", pptable->VddSocVrMapping);
 555         pr_info("VddMem0VrMapping = 0x%x\n", pptable->VddMem0VrMapping);
 556         pr_info("VddMem1VrMapping = 0x%x\n", pptable->VddMem1VrMapping);
 557
 558         pr_info("GfxUlvPhaseSheddingMask = 0x%x\n", pptable->GfxUlvPhaseSheddingMask);
 559         pr_info("SocUlvPhaseSheddingMask = 0x%x\n", pptable->SocUlvPhaseSheddingMask);
 560         pr_info("ExternalSensorPresent = 0x%x\n", pptable->ExternalSensorPresent);
 561         pr_info("Padding8_V = 0x%x\n", pptable->Padding8_V);
 562
 563         pr_info("GfxMaxCurrent = 0x%x\n", pptable->GfxMaxCurrent);
 564         pr_info("GfxOffset = 0x%x\n", pptable->GfxOffset);
 565         pr_info("Padding_TelemetryGfx = 0x%x\n", pptable->Padding_TelemetryGfx);
 566
 567         pr_info("SocMaxCurrent = 0x%x\n", pptable->SocMaxCurrent);
 568         pr_info("SocOffset = 0x%x\n", pptable->SocOffset);
 569         pr_info("Padding_TelemetrySoc = 0x%x\n", pptable->Padding_TelemetrySoc);
 570
 571         pr_info("Mem0MaxCurrent = 0x%x\n", pptable->Mem0MaxCurrent);
 572         pr_info("Mem0Offset = 0x%x\n", pptable->Mem0Offset);
 573         pr_info("Padding_TelemetryMem0 = 0x%x\n", pptable->Padding_TelemetryMem0);
 574
 575         pr_info("Mem1MaxCurrent = 0x%x\n", pptable->Mem1MaxCurrent);
 576         pr_info("Mem1Offset = 0x%x\n", pptable->Mem1Offset);
 577         pr_info("Padding_TelemetryMem1 = 0x%x\n", pptable->Padding_TelemetryMem1);
 578
 579         pr_info("AcDcGpio = %d\n", pptable->AcDcGpio);
 580         pr_info("AcDcPolarity = %d\n", pptable->AcDcPolarity);
 581         pr_info("VR0HotGpio = %d\n", pptable->VR0HotGpio);
 582         pr_info("VR0HotPolarity = %d\n", pptable->VR0HotPolarity);
 583
 584         pr_info("VR1HotGpio = %d\n", pptable->VR1HotGpio);
 585         pr_info("VR1HotPolarity = %d\n", pptable->VR1HotPolarity);
 586         pr_info("Padding1 = 0x%x\n", pptable->Padding1);
 587         pr_info("Padding2 = 0x%x\n", pptable->Padding2);
 588
 589         pr_info("LedPin0 = %d\n", pptable->LedPin0);
 590         pr_info("LedPin1 = %d\n", pptable->LedPin1);
 591         pr_info("LedPin2 = %d\n", pptable->LedPin2);
 592         pr_info("padding8_4 = 0x%x\n", pptable->padding8_4);
 593
 594         pr_info("PllGfxclkSpreadEnabled = %d\n", pptable->PllGfxclkSpreadEnabled);
 595         pr_info("PllGfxclkSpreadPercent = %d\n", pptable->PllGfxclkSpreadPercent);
 596         pr_info("PllGfxclkSpreadFreq = %d\n", pptable->PllGfxclkSpreadFreq);
 597
 598         pr_info("UclkSpreadEnabled = %d\n", pptable->UclkSpreadEnabled);
 599         pr_info("UclkSpreadPercent = %d\n", pptable->UclkSpreadPercent);
 600         pr_info("UclkSpreadFreq = %d\n", pptable->UclkSpreadFreq);
 601
 602         pr_info("FclkSpreadEnabled = %d\n", pptable->FclkSpreadEnabled);
 603         pr_info("FclkSpreadPercent = %d\n", pptable->FclkSpreadPercent);
 604         pr_info("FclkSpreadFreq = %d\n", pptable->FclkSpreadFreq);
 605
 606         pr_info("FllGfxclkSpreadEnabled = %d\n", pptable->FllGfxclkSpreadEnabled);
 607         pr_info("FllGfxclkSpreadPercent = %d\n", pptable->FllGfxclkSpreadPercent);
 608         pr_info("FllGfxclkSpreadFreq = %d\n", pptable->FllGfxclkSpreadFreq);
 609
 610         for (i = 0; i < I2C_CONTROLLER_NAME_COUNT; i++) {
 611                 pr_info("I2cControllers[%d]:\n", i);
 612                 pr_info("                   .Enabled = %d\n",
 613                                 pptable->I2cControllers[i].Enabled);
 614                 pr_info("                   .SlaveAddress = 0x%x\n",
 615                                 pptable->I2cControllers[i].SlaveAddress);
 616                 pr_info("                   .ControllerPort = %d\n",
 617                                 pptable->I2cControllers[i].ControllerPort);
 618                 pr_info("                   .ControllerName = %d\n",
 619                                 pptable->I2cControllers[i].ControllerName);
 620                 pr_info("                   .ThermalThrottler = %d\n",
 621                                 pptable->I2cControllers[i].ThermalThrottler);
 622                 pr_info("                   .I2cProtocol = %d\n",
 623                                 pptable->I2cControllers[i].I2cProtocol);
 624                 pr_info("                   .I2cSpeed = %d\n",
 625                                 pptable->I2cControllers[i].I2cSpeed);
 626         }
 627
 628         for (i = 0; i < 10; i++)
 629                 pr_info("BoardReserved[%d] = 0x%x\n", i, pptable->BoardReserved[i]);
 630
 631         for (i = 0; i < 8; i++)
 632                 pr_info("MmHubPadding[%d] = 0x%x\n", i, pptable->MmHubPadding[i]);
 633 }
 634 #endif
 635
 636 static int check_powerplay_tables(
 637                 struct pp_hwmgr *hwmgr,
 638                 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table)
 639 {
 640         PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >=
 641                 ATOM_VEGA20_TABLE_REVISION_VEGA20),
 642                 "Unsupported PPTable format!", return -1);
 643         PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0,
 644                 "Invalid PowerPlay Table!", return -1);
 645         PP_ASSERT_WITH_CODE(powerplay_table->smcPPTable.Version == PPTABLE_V20_SMU_VERSION,
 646                 "Unmatch PPTable version, vbios update may be needed!", return -1);
 647
 648         //dump_pptable(&powerplay_table->smcPPTable);
 649
 650         return 0;
 651 }
 652
 653 static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps)
 654 {
 655         set_hw_cap(
 656                 hwmgr,
 657                 0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_POWERPLAY),
 658                 PHM_PlatformCaps_PowerPlaySupport);
 659
 660         set_hw_cap(
 661                 hwmgr,
 662                 0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_SBIOSPOWERSOURCE),
 663                 PHM_PlatformCaps_BiosPowerSourceControl);
 664
 665         set_hw_cap(
 666                 hwmgr,
 667                 0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_BACO),
 668                 PHM_PlatformCaps_BACO);
 669
 670         set_hw_cap(
 671                 hwmgr,
 672                 0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_BAMACO),
 673                  PHM_PlatformCaps_BAMACO);
 674
 675         return 0;
 676 }
 677
 678 static int copy_overdrive_feature_capabilities_array(
 679                 struct pp_hwmgr *hwmgr,
 680                 uint8_t **pptable_info_array,
 681                 const uint8_t *pptable_array,
 682                 uint8_t od_feature_count)
 683 {
 684         uint32_t array_size, i;
 685         uint8_t *table;
 686         bool od_supported = false;
 687
 688         array_size = sizeof(uint8_t) * od_feature_count;
 689         table = kzalloc(array_size, GFP_KERNEL);
 690         if (NULL == table)
 691                 return -ENOMEM;
 692
 693         for (i = 0; i < od_feature_count; i++) {
 694                 table[i] = le32_to_cpu(pptable_array[i]);
 695                 if (table[i])
 696                         od_supported = true;
 697         }
 698
 699         *pptable_info_array = table;
 700
 701         if (od_supported)
 702                 phm_cap_set(hwmgr->platform_descriptor.platformCaps,
 703                                 PHM_PlatformCaps_ACOverdriveSupport);
 704
 705         return 0;
 706 }
 707
 708 static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable)
 709 {
 710         struct atom_smc_dpm_info_v4_4 *smc_dpm_table;
 711         int index = GetIndexIntoMasterDataTable(smc_dpm_info);
 712         int i;
 713
 714         PP_ASSERT_WITH_CODE(
 715                 smc_dpm_table = smu_atom_get_data_table(hwmgr->adev, index, NULL, NULL, NULL),
 716                 "[appendVbiosPPTable] Failed to retrieve Smc Dpm Table from VBIOS!",
 717                 return -1);
 718
 719         memset(ppsmc_pptable->Padding32,
 720                         0,
 721                         sizeof(struct atom_smc_dpm_info_v4_4) -
 722                         sizeof(struct atom_common_table_header));
 723         ppsmc_pptable->MaxVoltageStepGfx = smc_dpm_table->maxvoltagestepgfx;
 724         ppsmc_pptable->MaxVoltageStepSoc = smc_dpm_table->maxvoltagestepsoc;
 725
 726         ppsmc_pptable->VddGfxVrMapping = smc_dpm_table->vddgfxvrmapping;
 727         ppsmc_pptable->VddSocVrMapping = smc_dpm_table->vddsocvrmapping;
 728         ppsmc_pptable->VddMem0VrMapping = smc_dpm_table->vddmem0vrmapping;
 729         ppsmc_pptable->VddMem1VrMapping = smc_dpm_table->vddmem1vrmapping;
 730
 731         ppsmc_pptable->GfxUlvPhaseSheddingMask = smc_dpm_table->gfxulvphasesheddingmask;
 732         ppsmc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table->soculvphasesheddingmask;
 733         ppsmc_pptable->ExternalSensorPresent = smc_dpm_table->externalsensorpresent;
 734
 735         ppsmc_pptable->GfxMaxCurrent = smc_dpm_table->gfxmaxcurrent;
 736         ppsmc_pptable->GfxOffset = smc_dpm_table->gfxoffset;
 737         ppsmc_pptable->Padding_TelemetryGfx = smc_dpm_table->padding_telemetrygfx;
 738
 739         ppsmc_pptable->SocMaxCurrent = smc_dpm_table->socmaxcurrent;
 740         ppsmc_pptable->SocOffset = smc_dpm_table->socoffset;
 741         ppsmc_pptable->Padding_TelemetrySoc = smc_dpm_table->padding_telemetrysoc;
 742
 743         ppsmc_pptable->Mem0MaxCurrent = smc_dpm_table->mem0maxcurrent;
 744         ppsmc_pptable->Mem0Offset = smc_dpm_table->mem0offset;
 745         ppsmc_pptable->Padding_TelemetryMem0 = smc_dpm_table->padding_telemetrymem0;
 746
 747         ppsmc_pptable->Mem1MaxCurrent = smc_dpm_table->mem1maxcurrent;
 748         ppsmc_pptable->Mem1Offset = smc_dpm_table->mem1offset;
 749         ppsmc_pptable->Padding_TelemetryMem1 = smc_dpm_table->padding_telemetrymem1;
 750
 751         ppsmc_pptable->AcDcGpio = smc_dpm_table->acdcgpio;
 752         ppsmc_pptable->AcDcPolarity = smc_dpm_table->acdcpolarity;
 753         ppsmc_pptable->VR0HotGpio = smc_dpm_table->vr0hotgpio;
 754         ppsmc_pptable->VR0HotPolarity = smc_dpm_table->vr0hotpolarity;
 755
 756         ppsmc_pptable->VR1HotGpio = smc_dpm_table->vr1hotgpio;
 757         ppsmc_pptable->VR1HotPolarity = smc_dpm_table->vr1hotpolarity;
 758         ppsmc_pptable->Padding1 = smc_dpm_table->padding1;
 759         ppsmc_pptable->Padding2 = smc_dpm_table->padding2;
 760
 761         ppsmc_pptable->LedPin0 = smc_dpm_table->ledpin0;
 762         ppsmc_pptable->LedPin1 = smc_dpm_table->ledpin1;
 763         ppsmc_pptable->LedPin2 = smc_dpm_table->ledpin2;
 764
 765         ppsmc_pptable->PllGfxclkSpreadEnabled = smc_dpm_table->pllgfxclkspreadenabled;
 766         ppsmc_pptable->PllGfxclkSpreadPercent = smc_dpm_table->pllgfxclkspreadpercent;
 767         ppsmc_pptable->PllGfxclkSpreadFreq = smc_dpm_table->pllgfxclkspreadfreq;
 768
 769         ppsmc_pptable->UclkSpreadEnabled = 0;
 770         ppsmc_pptable->UclkSpreadPercent = smc_dpm_table->uclkspreadpercent;
 771         ppsmc_pptable->UclkSpreadFreq = smc_dpm_table->uclkspreadfreq;
 772
 773         ppsmc_pptable->FclkSpreadEnabled = smc_dpm_table->fclkspreadenabled;
 774         ppsmc_pptable->FclkSpreadPercent = smc_dpm_table->fclkspreadpercent;
 775         ppsmc_pptable->FclkSpreadFreq = smc_dpm_table->fclkspreadfreq;
 776
 777         ppsmc_pptable->FllGfxclkSpreadEnabled = smc_dpm_table->fllgfxclkspreadenabled;
 778         ppsmc_pptable->FllGfxclkSpreadPercent = smc_dpm_table->fllgfxclkspreadpercent;
 779         ppsmc_pptable->FllGfxclkSpreadFreq = smc_dpm_table->fllgfxclkspreadfreq;
 780
 781         if ((smc_dpm_table->table_header.format_revision == 4) &&
 782             (smc_dpm_table->table_header.content_revision == 4)) {
 783                 for (i = 0; i < I2C_CONTROLLER_NAME_COUNT; i++) {
 784                         ppsmc_pptable->I2cControllers[i].Enabled =
 785                                 smc_dpm_table->i2ccontrollers[i].enabled;
 786                         ppsmc_pptable->I2cControllers[i].SlaveAddress =
 787                                 smc_dpm_table->i2ccontrollers[i].slaveaddress;
 788                         ppsmc_pptable->I2cControllers[i].ControllerPort =
 789                                 smc_dpm_table->i2ccontrollers[i].controllerport;
 790                         ppsmc_pptable->I2cControllers[i].ThermalThrottler =
 791                                 smc_dpm_table->i2ccontrollers[i].thermalthrottler;
 792                         ppsmc_pptable->I2cControllers[i].I2cProtocol =
 793                                 smc_dpm_table->i2ccontrollers[i].i2cprotocol;
 794                         ppsmc_pptable->I2cControllers[i].I2cSpeed =
 795                                 smc_dpm_table->i2ccontrollers[i].i2cspeed;
 796                 }
 797         }
 798
 799         return 0;
 800 }
 801
 802 #define VEGA20_ENGINECLOCK_HARDMAX 198000
 803 static int init_powerplay_table_information(
 804                 struct pp_hwmgr *hwmgr,
 805                 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table)
 806 {
 807         struct phm_ppt_v3_information *pptable_information =
 808                 (struct phm_ppt_v3_information *)hwmgr->pptable;
 809         uint32_t disable_power_control = 0;
 810         uint32_t od_feature_count, od_setting_count, power_saving_clock_count;
 811         int result;
 812
 813         hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType;
 814         pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType;
 815         hwmgr->thermal_controller.fanInfo.ulMinRPM = 0;
 816         hwmgr->thermal_controller.fanInfo.ulMaxRPM = powerplay_table->smcPPTable.FanMaximumRpm;
 817
 818         set_hw_cap(hwmgr,
 819                 ATOM_VEGA20_PP_THERMALCONTROLLER_NONE != hwmgr->thermal_controller.ucType,
 820                 PHM_PlatformCaps_ThermalController);
 821
 822         phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl);
 823
 824         if (powerplay_table->OverDrive8Table.ucODTableRevision == 1) {
 825                 od_feature_count =
 826                         (le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount) >
 827                          ATOM_VEGA20_ODFEATURE_COUNT) ?
 828                         ATOM_VEGA20_ODFEATURE_COUNT :
 829                         le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount);
 830                 od_setting_count =
 831                         (le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount) >
 832                          ATOM_VEGA20_ODSETTING_COUNT) ?
 833                         ATOM_VEGA20_ODSETTING_COUNT :
 834                         le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount);
 835
 836                 copy_overdrive_feature_capabilities_array(hwmgr,
 837                                 &pptable_information->od_feature_capabilities,
 838                                 powerplay_table->OverDrive8Table.ODFeatureCapabilities,
 839                                 od_feature_count);
 840                 phm_copy_overdrive_settings_limits_array(hwmgr,
 841                                 &pptable_information->od_settings_max,
 842                                 powerplay_table->OverDrive8Table.ODSettingsMax,
 843                                 od_setting_count);
 844                 phm_copy_overdrive_settings_limits_array(hwmgr,
 845                                 &pptable_information->od_settings_min,
 846                                 powerplay_table->OverDrive8Table.ODSettingsMin,
 847                                 od_setting_count);
 848         }
 849
 850         pptable_information->us_small_power_limit1 = le16_to_cpu(powerplay_table->usSmallPowerLimit1);
 851         pptable_information->us_small_power_limit2 = le16_to_cpu(powerplay_table->usSmallPowerLimit2);
 852         pptable_information->us_boost_power_limit = le16_to_cpu(powerplay_table->usBoostPowerLimit);
 853         pptable_information->us_od_turbo_power_limit = le16_to_cpu(powerplay_table->usODTurboPowerLimit);
 854         pptable_information->us_od_powersave_power_limit = le16_to_cpu(powerplay_table->usODPowerSavePowerLimit);
 855
 856         pptable_information->us_software_shutdown_temp = le16_to_cpu(powerplay_table->usSoftwareShutdownTemp);
 857
 858         hwmgr->platform_descriptor.TDPODLimit = le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingsMax[ATOM_VEGA20_ODSETTING_POWERPERCENTAGE]);
 859
 860         disable_power_control = 0;
 861         if (!disable_power_control && hwmgr->platform_descriptor.TDPODLimit)
 862                 /* enable TDP overdrive (PowerControl) feature as well if supported */
 863                 phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PowerControl);
 864
 865         if (powerplay_table->PowerSavingClockTable.ucTableRevision == 1) {
 866                 power_saving_clock_count =
 867                         (le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount) >=
 868                          ATOM_VEGA20_PPCLOCK_COUNT) ?
 869                         ATOM_VEGA20_PPCLOCK_COUNT :
 870                         le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount);
 871                 phm_copy_clock_limits_array(hwmgr,
 872                                 &pptable_information->power_saving_clock_max,
 873                                 powerplay_table->PowerSavingClockTable.PowerSavingClockMax,
 874                                 power_saving_clock_count);
 875                 phm_copy_clock_limits_array(hwmgr,
 876                                 &pptable_information->power_saving_clock_min,
 877                                 powerplay_table->PowerSavingClockTable.PowerSavingClockMin,
 878                                 power_saving_clock_count);
 879         }
 880
 881         pptable_information->smc_pptable = (PPTable_t *)kmalloc(sizeof(PPTable_t), GFP_KERNEL);
 882         if (pptable_information->smc_pptable == NULL)
 883                 return -ENOMEM;
 884
 885         if (powerplay_table->smcPPTable.Version <= 2)
 886                 memcpy(pptable_information->smc_pptable,
 887                                 &(powerplay_table->smcPPTable),
 888                                 sizeof(PPTable_t) -
 889                                 sizeof(I2cControllerConfig_t) * I2C_CONTROLLER_NAME_COUNT);
 890         else
 891                 memcpy(pptable_information->smc_pptable,
 892                                 &(powerplay_table->smcPPTable),
 893                                 sizeof(PPTable_t));
 894
 895         result = append_vbios_pptable(hwmgr, (pptable_information->smc_pptable));
 896
 897         return result;
 898 }
 899
 900 static int vega20_pp_tables_initialize(struct pp_hwmgr *hwmgr)
 901 {
 902         int result = 0;
 903         const ATOM_Vega20_POWERPLAYTABLE *powerplay_table;
 904
 905         hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v3_information), GFP_KERNEL);
 906         PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL),
 907                 "Failed to allocate hwmgr->pptable!", return -ENOMEM);
 908
 909         powerplay_table = get_powerplay_table(hwmgr);
 910         PP_ASSERT_WITH_CODE((powerplay_table != NULL),
 911                 "Missing PowerPlay Table!", return -1);
 912
 913         result = check_powerplay_tables(hwmgr, powerplay_table);
 914         PP_ASSERT_WITH_CODE((result == 0),
 915                 "check_powerplay_tables failed", return result);
 916
 917         result = set_platform_caps(hwmgr,
 918                         le32_to_cpu(powerplay_table->ulPlatformCaps));
 919         PP_ASSERT_WITH_CODE((result == 0),
 920                 "set_platform_caps failed", return result);
 921
 922         result = init_powerplay_table_information(hwmgr, powerplay_table);
 923         PP_ASSERT_WITH_CODE((result == 0),
 924                 "init_powerplay_table_information failed", return result);
 925
 926         return result;
 927 }
 928
 929 static int vega20_pp_tables_uninitialize(struct pp_hwmgr *hwmgr)
 930 {
 931         struct phm_ppt_v3_information *pp_table_info =
 932                         (struct phm_ppt_v3_information *)(hwmgr->pptable);
 933
 934         kfree(pp_table_info->power_saving_clock_max);
 935         pp_table_info->power_saving_clock_max = NULL;
 936
 937         kfree(pp_table_info->power_saving_clock_min);
 938         pp_table_info->power_saving_clock_min = NULL;
 939
 940         kfree(pp_table_info->od_feature_capabilities);
 941         pp_table_info->od_feature_capabilities = NULL;
 942
 943         kfree(pp_table_info->od_settings_max);
 944         pp_table_info->od_settings_max = NULL;
 945
 946         kfree(pp_table_info->od_settings_min);
 947         pp_table_info->od_settings_min = NULL;
 948
 949         kfree(pp_table_info->smc_pptable);
 950         pp_table_info->smc_pptable = NULL;
 951
 952         kfree(hwmgr->pptable);
 953         hwmgr->pptable = NULL;
 954
 955         return 0;
 956 }
 957
 958 const struct pp_table_func vega20_pptable_funcs = {
 959         .pptable_init = vega20_pp_tables_initialize,
 960         .pptable_fini = vega20_pp_tables_uninitialize,
 961 };