drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c

   1 /*
   2  * Copyright 2018 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #include "vega20_thermal.h"
  25 #include "vega20_hwmgr.h"
  26 #include "vega20_smumgr.h"
  27 #include "vega20_ppsmc.h"
  28 #include "vega20_inc.h"
  29 #include "soc15_common.h"
  30 #include "pp_debug.h"
  31
  32 static int vega20_get_current_rpm(struct pp_hwmgr *hwmgr, uint32_t *current_rpm)
  33 {
  34         int ret = 0;
  35
  36         PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr,
  37                                 PPSMC_MSG_GetCurrentRpm)) == 0,
  38                         "Attempt to get current RPM from SMC Failed!",
  39                         return ret);
  40         PP_ASSERT_WITH_CODE((ret = vega20_read_arg_from_smc(hwmgr,
  41                         current_rpm)) == 0,
  42                         "Attempt to read current RPM from SMC Failed!",
  43                         return ret);
  44
  45         return 0;
  46 }
  47
  48 int vega20_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr,
  49                 struct phm_fan_speed_info *fan_speed_info)
  50 {
  51         memset(fan_speed_info, 0, sizeof(*fan_speed_info));
  52         fan_speed_info->supports_percent_read = false;
  53         fan_speed_info->supports_percent_write = false;
  54         fan_speed_info->supports_rpm_read = true;
  55         fan_speed_info->supports_rpm_write = true;
  56
  57         return 0;
  58 }
  59
  60 int vega20_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed)
  61 {
  62         *speed = 0;
  63
  64         return vega20_get_current_rpm(hwmgr, speed);
  65 }
  66
  67 /**
  68 * Reads the remote temperature from the SIslands thermal controller.
  69 *
  70 * @param    hwmgr The address of the hardware manager.
  71 */
  72 int vega20_thermal_get_temperature(struct pp_hwmgr *hwmgr)
  73 {
  74         struct amdgpu_device *adev = hwmgr->adev;
  75         int temp = 0;
  76
  77         temp = RREG32_SOC15(THM, 0, mmCG_MULT_THERMAL_STATUS);
  78
  79         temp = (temp & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >>
  80                         CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT;
  81
  82         temp = temp & 0x1ff;
  83
  84         temp *= PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
  85         return temp;
  86 }
  87
  88 /**
  89 * Set the requested temperature range for high and low alert signals
  90 *
  91 * @param    hwmgr The address of the hardware manager.
  92 * @param    range Temperature range to be programmed for
  93 *           high and low alert signals
  94 * @exception PP_Result_BadInput if the input data is not valid.
  95 */
  96 static int vega20_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
  97                 struct PP_TemperatureRange *range)
  98 {
  99         struct amdgpu_device *adev = hwmgr->adev;
 100         int low = VEGA20_THERMAL_MINIMUM_ALERT_TEMP *
 101                         PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
 102         int high = VEGA20_THERMAL_MAXIMUM_ALERT_TEMP *
 103                         PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
 104         uint32_t val;
 105
 106         if (low < range->min)
 107                 low = range->min;
 108         if (high > range->max)
 109                 high = range->max;
 110
 111         if (low > high)
 112                 return -EINVAL;
 113
 114         val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL);
 115
 116         val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
 117         val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
 118         val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
 119         val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
 120         val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
 121
 122         WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);
 123
 124         return 0;
 125 }
 126
 127 /**
 128 * Enable thermal alerts on the RV770 thermal controller.
 129 *
 130 * @param    hwmgr The address of the hardware manager.
 131 */
 132 static int vega20_thermal_enable_alert(struct pp_hwmgr *hwmgr)
 133 {
 134         struct amdgpu_device *adev = hwmgr->adev;
 135         uint32_t val = 0;
 136
 137         val |= (1 << THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT);
 138         val |= (1 << THM_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT);
 139         val |= (1 << THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT);
 140
 141         WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);
 142
 143         return 0;
 144 }
 145
 146 /**
 147 * Disable thermal alerts on the RV770 thermal controller.
 148 * @param    hwmgr The address of the hardware manager.
 149 */
 150 int vega20_thermal_disable_alert(struct pp_hwmgr *hwmgr)
 151 {
 152         struct amdgpu_device *adev = hwmgr->adev;
 153
 154         WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0);
 155
 156         return 0;
 157 }
 158
 159 /**
 160 * Uninitialize the thermal controller.
 161 * Currently just disables alerts.
 162 * @param    hwmgr The address of the hardware manager.
 163 */
 164 int vega20_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr)
 165 {
 166         int result = vega20_thermal_disable_alert(hwmgr);
 167
 168         return result;
 169 }
 170
 171 /**
 172 * Set up the fan table to control the fan using the SMC.
 173 * @param    hwmgr  the address of the powerplay hardware manager.
 174 * @param    pInput the pointer to input data
 175 * @param    pOutput the pointer to output data
 176 * @param    pStorage the pointer to temporary storage
 177 * @param    Result the last failure code
 178 * @return   result from set temperature range routine
 179 */
 180 static int vega20_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
 181 {
 182         int ret;
 183         struct vega20_hwmgr *data = (struct vega20_hwmgr *)(hwmgr->backend);
 184         PPTable_t *table = &(data->smc_state_table.pp_table);
 185
 186         ret = smum_send_msg_to_smc_with_parameter(hwmgr,
 187                                 PPSMC_MSG_SetFanTemperatureTarget,
 188                                 (uint32_t)table->FanTargetTemperature);
 189
 190         return ret;
 191 }
 192
 193 int vega20_start_thermal_controller(struct pp_hwmgr *hwmgr,
 194                                 struct PP_TemperatureRange *range)
 195 {
 196         int ret = 0;
 197
 198         if (range == NULL)
 199                 return -EINVAL;
 200
 201         ret = vega20_thermal_set_temperature_range(hwmgr, range);
 202         if (ret)
 203                 return ret;
 204
 205         ret = vega20_thermal_enable_alert(hwmgr);
 206         if (ret)
 207                 return ret;
 208
 209         ret = vega20_thermal_setup_fan_table(hwmgr);
 210
 211         return ret;
 212 };