drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
   4  * Author: James.Qian.Wang <james.qian.wang@arm.com>
   5  *
   6  */
   7 #include <linux/clk.h>
   8 #include <linux/pm_runtime.h>
   9 #include <linux/spinlock.h>
  10
  11 #include <drm/drm_atomic.h>
  12 #include <drm/drm_atomic_helper.h>
  13 #include <drm/drm_crtc_helper.h>
  14 #include <drm/drm_plane_helper.h>
  15 #include <drm/drm_print.h>
  16 #include <drm/drm_vblank.h>
  17
  18 #include "komeda_dev.h"
  19 #include "komeda_kms.h"
  20
  21 static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st)
  22 {
  23         u64 pxlclk, aclk;
  24
  25         if (!kcrtc_st->base.active) {
  26                 kcrtc_st->clock_ratio = 0;
  27                 return;
  28         }
  29
  30         pxlclk = kcrtc_st->base.adjusted_mode.clock * 1000;
  31         aclk = komeda_calc_aclk(kcrtc_st) << 32;
  32
  33         do_div(aclk, pxlclk);
  34         kcrtc_st->clock_ratio = aclk;
  35 }
  36
  37 /**
  38  * komeda_crtc_atomic_check - build display output data flow
  39  * @crtc: DRM crtc
  40  * @state: the crtc state object
  41  *
  42  * crtc_atomic_check is the final check stage, so beside build a display data
  43  * pipeline according to the crtc_state, but still needs to release or disable
  44  * the unclaimed pipeline resources.
  45  *
  46  * RETURNS:
  47  * Zero for success or -errno
  48  */
  49 static int
  50 komeda_crtc_atomic_check(struct drm_crtc *crtc,
  51                          struct drm_crtc_state *state)
  52 {
  53         struct komeda_crtc *kcrtc = to_kcrtc(crtc);
  54         struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(state);
  55         int err;
  56
  57         if (drm_atomic_crtc_needs_modeset(state))
  58                 komeda_crtc_update_clock_ratio(kcrtc_st);
  59
  60         if (state->active) {
  61                 err = komeda_build_display_data_flow(kcrtc, kcrtc_st);
  62                 if (err)
  63                         return err;
  64         }
  65
  66         /* release unclaimed pipeline resources */
  67         err = komeda_release_unclaimed_resources(kcrtc->master, kcrtc_st);
  68         if (err)
  69                 return err;
  70
  71         return 0;
  72 }
  73
  74 unsigned long komeda_calc_aclk(struct komeda_crtc_state *kcrtc_st)
  75 {
  76         struct komeda_dev *mdev = kcrtc_st->base.crtc->dev->dev_private;
  77         unsigned long pxlclk = kcrtc_st->base.adjusted_mode.clock;
  78
  79         return clk_round_rate(mdev->aclk, pxlclk * 1000);
  80 }
  81
  82 /* For active a crtc, mainly need two parts of preparation
  83  * 1. adjust display operation mode.
  84  * 2. enable needed clk
  85  */
  86 static int
  87 komeda_crtc_prepare(struct komeda_crtc *kcrtc)
  88 {
  89         struct komeda_dev *mdev = kcrtc->base.dev->dev_private;
  90         struct komeda_pipeline *master = kcrtc->master;
  91         struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(kcrtc->base.state);
  92         unsigned long pxlclk_rate = kcrtc_st->base.adjusted_mode.clock * 1000;
  93         u32 new_mode;
  94         int err;
  95
  96         mutex_lock(&mdev->lock);
  97
  98         new_mode = mdev->dpmode | BIT(master->id);
  99         if (WARN_ON(new_mode == mdev->dpmode)) {
 100                 err = 0;
 101                 goto unlock;
 102         }
 103
 104         err = mdev->funcs->change_opmode(mdev, new_mode);
 105         if (err) {
 106                 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,",
 107                           mdev->dpmode, new_mode);
 108                 goto unlock;
 109         }
 110
 111         mdev->dpmode = new_mode;
 112         /* Only need to enable aclk on single display mode, but no need to
 113          * enable aclk it on dual display mode, since the dual mode always
 114          * switch from single display mode, the aclk already enabled, no need
 115          * to enable it again.
 116          */
 117         if (new_mode != KOMEDA_MODE_DUAL_DISP) {
 118                 err = clk_set_rate(mdev->aclk, komeda_calc_aclk(kcrtc_st));
 119                 if (err)
 120                         DRM_ERROR("failed to set aclk.\n");
 121                 err = clk_prepare_enable(mdev->aclk);
 122                 if (err)
 123                         DRM_ERROR("failed to enable aclk.\n");
 124         }
 125
 126         err = clk_set_rate(master->pxlclk, pxlclk_rate);
 127         if (err)
 128                 DRM_ERROR("failed to set pxlclk for pipe%d\n", master->id);
 129         err = clk_prepare_enable(master->pxlclk);
 130         if (err)
 131                 DRM_ERROR("failed to enable pxl clk for pipe%d.\n", master->id);
 132
 133 unlock:
 134         mutex_unlock(&mdev->lock);
 135
 136         return err;
 137 }
 138
 139 static int
 140 komeda_crtc_unprepare(struct komeda_crtc *kcrtc)
 141 {
 142         struct komeda_dev *mdev = kcrtc->base.dev->dev_private;
 143         struct komeda_pipeline *master = kcrtc->master;
 144         u32 new_mode;
 145         int err;
 146
 147         mutex_lock(&mdev->lock);
 148
 149         new_mode = mdev->dpmode & (~BIT(master->id));
 150
 151         if (WARN_ON(new_mode == mdev->dpmode)) {
 152                 err = 0;
 153                 goto unlock;
 154         }
 155
 156         err = mdev->funcs->change_opmode(mdev, new_mode);
 157         if (err) {
 158                 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,",
 159                           mdev->dpmode, new_mode);
 160                 goto unlock;
 161         }
 162
 163         mdev->dpmode = new_mode;
 164
 165         clk_disable_unprepare(master->pxlclk);
 166         if (new_mode == KOMEDA_MODE_INACTIVE)
 167                 clk_disable_unprepare(mdev->aclk);
 168
 169 unlock:
 170         mutex_unlock(&mdev->lock);
 171
 172         return err;
 173 }
 174
 175 void komeda_crtc_handle_event(struct komeda_crtc   *kcrtc,
 176                               struct komeda_events *evts)
 177 {
 178         struct drm_crtc *crtc = &kcrtc->base;
 179         u32 events = evts->pipes[kcrtc->master->id];
 180
 181         if (events & KOMEDA_EVENT_VSYNC)
 182                 drm_crtc_handle_vblank(crtc);
 183
 184         if (events & KOMEDA_EVENT_EOW) {
 185                 struct komeda_wb_connector *wb_conn = kcrtc->wb_conn;
 186
 187                 if (wb_conn)
 188                         drm_writeback_signal_completion(&wb_conn->base, 0);
 189                 else
 190                         DRM_WARN("CRTC[%d]: EOW happen but no wb_connector.\n",
 191                                  drm_crtc_index(&kcrtc->base));
 192         }
 193         /* will handle it together with the write back support */
 194         if (events & KOMEDA_EVENT_EOW)
 195                 DRM_DEBUG("EOW.\n");
 196
 197         if (events & KOMEDA_EVENT_FLIP) {
 198                 unsigned long flags;
 199                 struct drm_pending_vblank_event *event;
 200
 201                 spin_lock_irqsave(&crtc->dev->event_lock, flags);
 202                 if (kcrtc->disable_done) {
 203                         complete_all(kcrtc->disable_done);
 204                         kcrtc->disable_done = NULL;
 205                 } else if (crtc->state->event) {
 206                         event = crtc->state->event;
 207                         /*
 208                          * Consume event before notifying drm core that flip
 209                          * happened.
 210                          */
 211                         crtc->state->event = NULL;
 212                         drm_crtc_send_vblank_event(crtc, event);
 213                 } else {
 214                         DRM_WARN("CRTC[%d]: FLIP happen but no pending commit.\n",
 215                                  drm_crtc_index(&kcrtc->base));
 216                 }
 217                 spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
 218         }
 219 }
 220
 221 static void
 222 komeda_crtc_do_flush(struct drm_crtc *crtc,
 223                      struct drm_crtc_state *old)
 224 {
 225         struct komeda_crtc *kcrtc = to_kcrtc(crtc);
 226         struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(crtc->state);
 227         struct komeda_dev *mdev = kcrtc->base.dev->dev_private;
 228         struct komeda_pipeline *master = kcrtc->master;
 229         struct komeda_wb_connector *wb_conn = kcrtc->wb_conn;
 230         struct drm_connector_state *conn_st;
 231
 232         DRM_DEBUG_ATOMIC("CRTC%d_FLUSH: active_pipes: 0x%x, affected: 0x%x.\n",
 233                          drm_crtc_index(crtc),
 234                          kcrtc_st->active_pipes, kcrtc_st->affected_pipes);
 235
 236         /* step 1: update the pipeline/component state to HW */
 237         if (has_bit(master->id, kcrtc_st->affected_pipes))
 238                 komeda_pipeline_update(master, old->state);
 239
 240         conn_st = wb_conn ? wb_conn->base.base.state : NULL;
 241         if (conn_st && conn_st->writeback_job)
 242                 drm_writeback_queue_job(&wb_conn->base, conn_st);
 243
 244         /* step 2: notify the HW to kickoff the update */
 245         mdev->funcs->flush(mdev, master->id, kcrtc_st->active_pipes);
 246 }
 247
 248 static void
 249 komeda_crtc_atomic_enable(struct drm_crtc *crtc,
 250                           struct drm_crtc_state *old)
 251 {
 252         komeda_crtc_prepare(to_kcrtc(crtc));
 253         drm_crtc_vblank_on(crtc);
 254         komeda_crtc_do_flush(crtc, old);
 255 }
 256
 257 static void
 258 komeda_crtc_atomic_disable(struct drm_crtc *crtc,
 259                            struct drm_crtc_state *old)
 260 {
 261         struct komeda_crtc *kcrtc = to_kcrtc(crtc);
 262         struct komeda_crtc_state *old_st = to_kcrtc_st(old);
 263         struct komeda_dev *mdev = crtc->dev->dev_private;
 264         struct komeda_pipeline *master = kcrtc->master;
 265         struct completion *disable_done = &crtc->state->commit->flip_done;
 266         struct completion temp;
 267         int timeout;
 268
 269         DRM_DEBUG_ATOMIC("CRTC%d_DISABLE: active_pipes: 0x%x, affected: 0x%x.\n",
 270                          drm_crtc_index(crtc),
 271                          old_st->active_pipes, old_st->affected_pipes);
 272
 273         if (has_bit(master->id, old_st->active_pipes))
 274                 komeda_pipeline_disable(master, old->state);
 275
 276         /* crtc_disable has two scenarios according to the state->active switch.
 277          * 1. active -> inactive
 278          *    this commit is a disable commit. and the commit will be finished
 279          *    or done after the disable operation. on this case we can directly
 280          *    use the crtc->state->event to tracking the HW disable operation.
 281          * 2. active -> active
 282          *    the crtc->commit is not for disable, but a modeset operation when
 283          *    crtc is active, such commit actually has been completed by 3
 284          *    DRM operations:
 285          *    crtc_disable, update_planes(crtc_flush), crtc_enable
 286          *    so on this case the crtc->commit is for the whole process.
 287          *    we can not use it for tracing the disable, we need a temporary
 288          *    flip_done for tracing the disable. and crtc->state->event for
 289          *    the crtc_enable operation.
 290          *    That's also the reason why skip modeset commit in
 291          *    komeda_crtc_atomic_flush()
 292          */
 293         if (crtc->state->active) {
 294                 struct komeda_pipeline_state *pipe_st;
 295                 /* clear the old active_comps to zero */
 296                 pipe_st = komeda_pipeline_get_old_state(master, old->state);
 297                 pipe_st->active_comps = 0;
 298
 299                 init_completion(&temp);
 300                 kcrtc->disable_done = &temp;
 301                 disable_done = &temp;
 302         }
 303
 304         mdev->funcs->flush(mdev, master->id, 0);
 305
 306         /* wait the disable take affect.*/
 307         timeout = wait_for_completion_timeout(disable_done, HZ);
 308         if (timeout == 0) {
 309                 DRM_ERROR("disable pipeline%d timeout.\n", kcrtc->master->id);
 310                 if (crtc->state->active) {
 311                         unsigned long flags;
 312
 313                         spin_lock_irqsave(&crtc->dev->event_lock, flags);
 314                         kcrtc->disable_done = NULL;
 315                         spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
 316                 }
 317         }
 318
 319         drm_crtc_vblank_off(crtc);
 320         komeda_crtc_unprepare(kcrtc);
 321 }
 322
 323 static void
 324 komeda_crtc_atomic_flush(struct drm_crtc *crtc,
 325                          struct drm_crtc_state *old)
 326 {
 327         /* commit with modeset will be handled in enable/disable */
 328         if (drm_atomic_crtc_needs_modeset(crtc->state))
 329                 return;
 330
 331         komeda_crtc_do_flush(crtc, old);
 332 }
 333
 334 static enum drm_mode_status
 335 komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m)
 336 {
 337         struct komeda_dev *mdev = crtc->dev->dev_private;
 338         struct komeda_crtc *kcrtc = to_kcrtc(crtc);
 339         struct komeda_pipeline *master = kcrtc->master;
 340         long mode_clk, pxlclk;
 341
 342         if (m->flags & DRM_MODE_FLAG_INTERLACE)
 343                 return MODE_NO_INTERLACE;
 344
 345         mode_clk = m->clock * 1000;
 346         pxlclk = clk_round_rate(master->pxlclk, mode_clk);
 347         if (pxlclk != mode_clk) {
 348                 DRM_DEBUG_ATOMIC("pxlclk doesn't support %ld Hz\n", mode_clk);
 349
 350                 return MODE_NOCLOCK;
 351         }
 352
 353         /* main engine clock must be faster than pxlclk*/
 354         if (clk_round_rate(mdev->aclk, mode_clk) < pxlclk) {
 355                 DRM_DEBUG_ATOMIC("engine clk can't satisfy the requirement of %s-clk: %ld.\n",
 356                                  m->name, pxlclk);
 357
 358                 return MODE_CLOCK_HIGH;
 359         }
 360
 361         return MODE_OK;
 362 }
 363
 364 static bool komeda_crtc_mode_fixup(struct drm_crtc *crtc,
 365                                    const struct drm_display_mode *m,
 366                                    struct drm_display_mode *adjusted_mode)
 367 {
 368         struct komeda_crtc *kcrtc = to_kcrtc(crtc);
 369         struct komeda_pipeline *master = kcrtc->master;
 370         long mode_clk = m->clock * 1000;
 371
 372         adjusted_mode->clock = clk_round_rate(master->pxlclk, mode_clk) / 1000;
 373
 374         return true;
 375 }
 376
 377 static const struct drm_crtc_helper_funcs komeda_crtc_helper_funcs = {
 378         .atomic_check   = komeda_crtc_atomic_check,
 379         .atomic_flush   = komeda_crtc_atomic_flush,
 380         .atomic_enable  = komeda_crtc_atomic_enable,
 381         .atomic_disable = komeda_crtc_atomic_disable,
 382         .mode_valid     = komeda_crtc_mode_valid,
 383         .mode_fixup     = komeda_crtc_mode_fixup,
 384 };
 385
 386 static void komeda_crtc_reset(struct drm_crtc *crtc)
 387 {
 388         struct komeda_crtc_state *state;
 389
 390         if (crtc->state)
 391                 __drm_atomic_helper_crtc_destroy_state(crtc->state);
 392
 393         kfree(to_kcrtc_st(crtc->state));
 394         crtc->state = NULL;
 395
 396         state = kzalloc(sizeof(*state), GFP_KERNEL);
 397         if (state) {
 398                 crtc->state = &state->base;
 399                 crtc->state->crtc = crtc;
 400         }
 401 }
 402
 403 static struct drm_crtc_state *
 404 komeda_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
 405 {
 406         struct komeda_crtc_state *old = to_kcrtc_st(crtc->state);
 407         struct komeda_crtc_state *new;
 408
 409         new = kzalloc(sizeof(*new), GFP_KERNEL);
 410         if (!new)
 411                 return NULL;
 412
 413         __drm_atomic_helper_crtc_duplicate_state(crtc, &new->base);
 414
 415         new->affected_pipes = old->active_pipes;
 416         new->clock_ratio = old->clock_ratio;
 417
 418         return &new->base;
 419 }
 420
 421 static void komeda_crtc_atomic_destroy_state(struct drm_crtc *crtc,
 422                                              struct drm_crtc_state *state)
 423 {
 424         __drm_atomic_helper_crtc_destroy_state(state);
 425         kfree(to_kcrtc_st(state));
 426 }
 427
 428 static int komeda_crtc_vblank_enable(struct drm_crtc *crtc)
 429 {
 430         struct komeda_dev *mdev = crtc->dev->dev_private;
 431         struct komeda_crtc *kcrtc = to_kcrtc(crtc);
 432
 433         mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, true);
 434         return 0;
 435 }
 436
 437 static void komeda_crtc_vblank_disable(struct drm_crtc *crtc)
 438 {
 439         struct komeda_dev *mdev = crtc->dev->dev_private;
 440         struct komeda_crtc *kcrtc = to_kcrtc(crtc);
 441
 442         mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, false);
 443 }
 444
 445 static int
 446 komeda_crtc_atomic_get_property(struct drm_crtc *crtc,
 447                                 const struct drm_crtc_state *state,
 448                                 struct drm_property *property, uint64_t *val)
 449 {
 450         struct komeda_crtc *kcrtc = to_kcrtc(crtc);
 451         struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(state);
 452
 453         if (property == kcrtc->clock_ratio_property) {
 454                 *val = kcrtc_st->clock_ratio;
 455         } else {
 456                 DRM_DEBUG_DRIVER("Unknown property %s\n", property->name);
 457                 return -EINVAL;
 458         }
 459
 460         return 0;
 461 }
 462
 463 static const struct drm_crtc_funcs komeda_crtc_funcs = {
 464         .gamma_set              = drm_atomic_helper_legacy_gamma_set,
 465         .destroy                = drm_crtc_cleanup,
 466         .set_config             = drm_atomic_helper_set_config,
 467         .page_flip              = drm_atomic_helper_page_flip,
 468         .reset                  = komeda_crtc_reset,
 469         .atomic_duplicate_state = komeda_crtc_atomic_duplicate_state,
 470         .atomic_destroy_state   = komeda_crtc_atomic_destroy_state,
 471         .enable_vblank          = komeda_crtc_vblank_enable,
 472         .disable_vblank         = komeda_crtc_vblank_disable,
 473         .atomic_get_property    = komeda_crtc_atomic_get_property,
 474 };
 475
 476 int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms,
 477                            struct komeda_dev *mdev)
 478 {
 479         struct komeda_crtc *crtc;
 480         struct komeda_pipeline *master;
 481         char str[16];
 482         int i;
 483
 484         kms->n_crtcs = 0;
 485
 486         for (i = 0; i < mdev->n_pipelines; i++) {
 487                 crtc = &kms->crtcs[kms->n_crtcs];
 488                 master = mdev->pipelines[i];
 489
 490                 crtc->master = master;
 491                 crtc->slave  = NULL;
 492
 493                 if (crtc->slave)
 494                         sprintf(str, "pipe-%d", crtc->slave->id);
 495                 else
 496                         sprintf(str, "None");
 497
 498                 DRM_INFO("crtc%d: master(pipe-%d) slave(%s) output: %s.\n",
 499                          kms->n_crtcs, master->id, str,
 500                          master->of_output_dev ?
 501                          master->of_output_dev->full_name : "None");
 502
 503                 kms->n_crtcs++;
 504         }
 505
 506         return 0;
 507 }
 508
 509 static int komeda_crtc_create_clock_ratio_property(struct komeda_crtc *kcrtc)
 510 {
 511         struct drm_crtc *crtc = &kcrtc->base;
 512         struct drm_property *prop;
 513
 514         prop = drm_property_create_range(crtc->dev, DRM_MODE_PROP_ATOMIC,
 515                                          "CLOCK_RATIO", 0, U64_MAX);
 516         if (!prop)
 517                 return -ENOMEM;
 518
 519         drm_object_attach_property(&crtc->base, prop, 0);
 520         kcrtc->clock_ratio_property = prop;
 521
 522         return 0;
 523 }
 524
 525 static struct drm_plane *
 526 get_crtc_primary(struct komeda_kms_dev *kms, struct komeda_crtc *crtc)
 527 {
 528         struct komeda_plane *kplane;
 529         struct drm_plane *plane;
 530
 531         drm_for_each_plane(plane, &kms->base) {
 532                 if (plane->type != DRM_PLANE_TYPE_PRIMARY)
 533                         continue;
 534
 535                 kplane = to_kplane(plane);
 536                 /* only master can be primary */
 537                 if (kplane->layer->base.pipeline == crtc->master)
 538                         return plane;
 539         }
 540
 541         return NULL;
 542 }
 543
 544 static int komeda_crtc_add(struct komeda_kms_dev *kms,
 545                            struct komeda_crtc *kcrtc)
 546 {
 547         struct drm_crtc *crtc = &kcrtc->base;
 548         int err;
 549
 550         err = drm_crtc_init_with_planes(&kms->base, crtc,
 551                                         get_crtc_primary(kms, kcrtc), NULL,
 552                                         &komeda_crtc_funcs, NULL);
 553         if (err)
 554                 return err;
 555
 556         drm_crtc_helper_add(crtc, &komeda_crtc_helper_funcs);
 557         drm_crtc_vblank_reset(crtc);
 558
 559         crtc->port = kcrtc->master->of_output_port;
 560
 561         err = komeda_crtc_create_clock_ratio_property(kcrtc);
 562         if (err)
 563                 return err;
 564
 565         return 0;
 566 }
 567
 568 int komeda_kms_add_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev)
 569 {
 570         int i, err;
 571
 572         for (i = 0; i < kms->n_crtcs; i++) {
 573                 err = komeda_crtc_add(kms, &kms->crtcs[i]);
 574                 if (err)
 575                         return err;
 576         }
 577
 578         return 0;
 579 }