drivers/gpu/drm/arm/display/komeda/komeda_dev.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
   4  * Author: James.Qian.Wang <james.qian.wang@arm.com>
   5  *
   6  */
   7 #include <linux/io.h>
   8 #include <linux/of_device.h>
   9 #include <linux/of_graph.h>
  10 #include <linux/platform_device.h>
  11 #ifdef CONFIG_DEBUG_FS
  12 #include <linux/debugfs.h>
  13 #include <linux/seq_file.h>
  14 #endif
  15
  16 #include <drm/drm_print.h>
  17
  18 #include "komeda_dev.h"
  19
  20 static int komeda_register_show(struct seq_file *sf, void *x)
  21 {
  22         struct komeda_dev *mdev = sf->private;
  23         int i;
  24
  25         if (mdev->funcs->dump_register)
  26                 mdev->funcs->dump_register(mdev, sf);
  27
  28         for (i = 0; i < mdev->n_pipelines; i++)
  29                 komeda_pipeline_dump_register(mdev->pipelines[i], sf);
  30
  31         return 0;
  32 }
  33
  34 static int komeda_register_open(struct inode *inode, struct file *filp)
  35 {
  36         return single_open(filp, komeda_register_show, inode->i_private);
  37 }
  38
  39 static const struct file_operations komeda_register_fops = {
  40         .owner          = THIS_MODULE,
  41         .open           = komeda_register_open,
  42         .read           = seq_read,
  43         .llseek         = seq_lseek,
  44         .release        = single_release,
  45 };
  46
  47 static void komeda_debugfs_init(struct komeda_dev *mdev)
  48 {
  49         if (!debugfs_initialized())
  50                 return;
  51
  52         mdev->debugfs_root = debugfs_create_dir("komeda", NULL);
  53         if (IS_ERR_OR_NULL(mdev->debugfs_root))
  54                 return;
  55
  56         debugfs_create_file("register", 0444, mdev->debugfs_root,
  57                             mdev, &komeda_register_fops);
  58 }
  59
  60 static int komeda_parse_pipe_dt(struct komeda_dev *mdev, struct device_node *np)
  61 {
  62         struct komeda_pipeline *pipe;
  63         struct clk *clk;
  64         u32 pipe_id;
  65         int ret = 0;
  66
  67         ret = of_property_read_u32(np, "reg", &pipe_id);
  68         if (ret != 0 || pipe_id >= mdev->n_pipelines)
  69                 return -EINVAL;
  70
  71         pipe = mdev->pipelines[pipe_id];
  72
  73         clk = of_clk_get_by_name(np, "aclk");
  74         if (IS_ERR(clk)) {
  75                 DRM_ERROR("get aclk for pipeline %d failed!\n", pipe_id);
  76                 return PTR_ERR(clk);
  77         }
  78         pipe->aclk = clk;
  79
  80         clk = of_clk_get_by_name(np, "pxclk");
  81         if (IS_ERR(clk)) {
  82                 DRM_ERROR("get pxclk for pipeline %d failed!\n", pipe_id);
  83                 return PTR_ERR(clk);
  84         }
  85         pipe->pxlclk = clk;
  86
  87         /* enum ports */
  88         pipe->of_output_dev =
  89                 of_graph_get_remote_node(np, KOMEDA_OF_PORT_OUTPUT, 0);
  90         pipe->of_output_port =
  91                 of_graph_get_port_by_id(np, KOMEDA_OF_PORT_OUTPUT);
  92
  93         pipe->of_node = np;
  94
  95         return 0;
  96 }
  97
  98 static int komeda_parse_dt(struct device *dev, struct komeda_dev *mdev)
  99 {
 100         struct platform_device *pdev = to_platform_device(dev);
 101         struct device_node *child, *np = dev->of_node;
 102         struct clk *clk;
 103         int ret;
 104
 105         clk = devm_clk_get(dev, "mclk");
 106         if (IS_ERR(clk))
 107                 return PTR_ERR(clk);
 108
 109         mdev->mclk = clk;
 110         mdev->irq  = platform_get_irq(pdev, 0);
 111         if (mdev->irq < 0) {
 112                 DRM_ERROR("could not get IRQ number.\n");
 113                 return mdev->irq;
 114         }
 115
 116         for_each_available_child_of_node(np, child) {
 117                 if (of_node_cmp(child->name, "pipeline") == 0) {
 118                         ret = komeda_parse_pipe_dt(mdev, child);
 119                         if (ret) {
 120                                 DRM_ERROR("parse pipeline dt error!\n");
 121                                 of_node_put(child);
 122                                 break;
 123                         }
 124                 }
 125         }
 126
 127         return ret;
 128 }
 129
 130 struct komeda_dev *komeda_dev_create(struct device *dev)
 131 {
 132         struct platform_device *pdev = to_platform_device(dev);
 133         const struct komeda_product_data *product;
 134         struct komeda_dev *mdev;
 135         struct resource *io_res;
 136         int err = 0;
 137
 138         product = of_device_get_match_data(dev);
 139         if (!product)
 140                 return ERR_PTR(-ENODEV);
 141
 142         io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 143         if (!io_res) {
 144                 DRM_ERROR("No registers defined.\n");
 145                 return ERR_PTR(-ENODEV);
 146         }
 147
 148         mdev = devm_kzalloc(dev, sizeof(*mdev), GFP_KERNEL);
 149         if (!mdev)
 150                 return ERR_PTR(-ENOMEM);
 151
 152         mdev->dev = dev;
 153         mdev->reg_base = devm_ioremap_resource(dev, io_res);
 154         if (IS_ERR(mdev->reg_base)) {
 155                 DRM_ERROR("Map register space failed.\n");
 156                 err = PTR_ERR(mdev->reg_base);
 157                 mdev->reg_base = NULL;
 158                 goto err_cleanup;
 159         }
 160
 161         mdev->pclk = devm_clk_get(dev, "pclk");
 162         if (IS_ERR(mdev->pclk)) {
 163                 DRM_ERROR("Get APB clk failed.\n");
 164                 err = PTR_ERR(mdev->pclk);
 165                 mdev->pclk = NULL;
 166                 goto err_cleanup;
 167         }
 168
 169         /* Enable APB clock to access the registers */
 170         clk_prepare_enable(mdev->pclk);
 171
 172         mdev->funcs = product->identify(mdev->reg_base, &mdev->chip);
 173         if (!komeda_product_match(mdev, product->product_id)) {
 174                 DRM_ERROR("DT configured %x mismatch with real HW %x.\n",
 175                           product->product_id,
 176                           MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id));
 177                 err = -ENODEV;
 178                 goto err_cleanup;
 179         }
 180
 181         DRM_INFO("Found ARM Mali-D%x version r%dp%d\n",
 182                  MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id),
 183                  MALIDP_CORE_ID_MAJOR(mdev->chip.core_id),
 184                  MALIDP_CORE_ID_MINOR(mdev->chip.core_id));
 185
 186         mdev->funcs->init_format_table(mdev);
 187
 188         err = mdev->funcs->enum_resources(mdev);
 189         if (err) {
 190                 DRM_ERROR("enumerate display resource failed.\n");
 191                 goto err_cleanup;
 192         }
 193
 194         err = komeda_parse_dt(dev, mdev);
 195         if (err) {
 196                 DRM_ERROR("parse device tree failed.\n");
 197                 goto err_cleanup;
 198         }
 199
 200         err = komeda_assemble_pipelines(mdev);
 201         if (err) {
 202                 DRM_ERROR("assemble display pipelines failed.\n");
 203                 goto err_cleanup;
 204         }
 205
 206 #ifdef CONFIG_DEBUG_FS
 207         komeda_debugfs_init(mdev);
 208 #endif
 209
 210         return mdev;
 211
 212 err_cleanup:
 213         komeda_dev_destroy(mdev);
 214         return ERR_PTR(err);
 215 }
 216
 217 void komeda_dev_destroy(struct komeda_dev *mdev)
 218 {
 219         struct device *dev = mdev->dev;
 220         struct komeda_dev_funcs *funcs = mdev->funcs;
 221         int i;
 222
 223 #ifdef CONFIG_DEBUG_FS
 224         debugfs_remove_recursive(mdev->debugfs_root);
 225 #endif
 226
 227         for (i = 0; i < mdev->n_pipelines; i++) {
 228                 komeda_pipeline_destroy(mdev, mdev->pipelines[i]);
 229                 mdev->pipelines[i] = NULL;
 230         }
 231
 232         mdev->n_pipelines = 0;
 233
 234         if (funcs && funcs->cleanup)
 235                 funcs->cleanup(mdev);
 236
 237         if (mdev->reg_base) {
 238                 devm_iounmap(dev, mdev->reg_base);
 239                 mdev->reg_base = NULL;
 240         }
 241
 242         if (mdev->mclk) {
 243                 devm_clk_put(dev, mdev->mclk);
 244                 mdev->mclk = NULL;
 245         }
 246
 247         if (mdev->pclk) {
 248                 clk_disable_unprepare(mdev->pclk);
 249                 devm_clk_put(dev, mdev->pclk);
 250                 mdev->pclk = NULL;
 251         }
 252
 253         devm_kfree(dev, mdev);
 254 }