drivers/gpu/drm/arm/display/komeda/komeda_dev.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
   4  * Author: James.Qian.Wang <james.qian.wang@arm.com>
   5  *
   6  */
   7 #include <linux/io.h>
   8 #include <linux/of_device.h>
   9 #include <linux/of_graph.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/dma-mapping.h>
  12 #ifdef CONFIG_DEBUG_FS
  13 #include <linux/debugfs.h>
  14 #include <linux/seq_file.h>
  15 #endif
  16
  17 #include <drm/drm_print.h>
  18
  19 #include "komeda_dev.h"
  20
  21 static int komeda_register_show(struct seq_file *sf, void *x)
  22 {
  23         struct komeda_dev *mdev = sf->private;
  24         int i;
  25
  26         if (mdev->funcs->dump_register)
  27                 mdev->funcs->dump_register(mdev, sf);
  28
  29         for (i = 0; i < mdev->n_pipelines; i++)
  30                 komeda_pipeline_dump_register(mdev->pipelines[i], sf);
  31
  32         return 0;
  33 }
  34
  35 static int komeda_register_open(struct inode *inode, struct file *filp)
  36 {
  37         return single_open(filp, komeda_register_show, inode->i_private);
  38 }
  39
  40 static const struct file_operations komeda_register_fops = {
  41         .owner          = THIS_MODULE,
  42         .open           = komeda_register_open,
  43         .read           = seq_read,
  44         .llseek         = seq_lseek,
  45         .release        = single_release,
  46 };
  47
  48 #ifdef CONFIG_DEBUG_FS
  49 static void komeda_debugfs_init(struct komeda_dev *mdev)
  50 {
  51         if (!debugfs_initialized())
  52                 return;
  53
  54         mdev->debugfs_root = debugfs_create_dir("komeda", NULL);
  55         if (IS_ERR_OR_NULL(mdev->debugfs_root))
  56                 return;
  57
  58         debugfs_create_file("register", 0444, mdev->debugfs_root,
  59                             mdev, &komeda_register_fops);
  60 }
  61 #endif
  62
  63 static ssize_t
  64 core_id_show(struct device *dev, struct device_attribute *attr, char *buf)
  65 {
  66         struct komeda_dev *mdev = dev_to_mdev(dev);
  67
  68         return snprintf(buf, PAGE_SIZE, "0x%08x\n", mdev->chip.core_id);
  69 }
  70 static DEVICE_ATTR_RO(core_id);
  71
  72 static ssize_t
  73 config_id_show(struct device *dev, struct device_attribute *attr, char *buf)
  74 {
  75         struct komeda_dev *mdev = dev_to_mdev(dev);
  76         struct komeda_pipeline *pipe = mdev->pipelines[0];
  77         union komeda_config_id config_id;
  78         int i;
  79
  80         memset(&config_id, 0, sizeof(config_id));
  81
  82         config_id.max_line_sz = pipe->layers[0]->hsize_in.end;
  83         config_id.n_pipelines = mdev->n_pipelines;
  84         config_id.n_scalers = pipe->n_scalers;
  85         config_id.n_layers = pipe->n_layers;
  86         config_id.n_richs = 0;
  87         for (i = 0; i < pipe->n_layers; i++) {
  88                 if (pipe->layers[i]->layer_type == KOMEDA_FMT_RICH_LAYER)
  89                         config_id.n_richs++;
  90         }
  91         return snprintf(buf, PAGE_SIZE, "0x%08x\n", config_id.value);
  92 }
  93 static DEVICE_ATTR_RO(config_id);
  94
  95 static struct attribute *komeda_sysfs_entries[] = {
  96         &dev_attr_core_id.attr,
  97         &dev_attr_config_id.attr,
  98         NULL,
  99 };
 100
 101 static struct attribute_group komeda_sysfs_attr_group = {
 102         .attrs = komeda_sysfs_entries,
 103 };
 104
 105 static int komeda_parse_pipe_dt(struct komeda_dev *mdev, struct device_node *np)
 106 {
 107         struct komeda_pipeline *pipe;
 108         struct clk *clk;
 109         u32 pipe_id;
 110         int ret = 0;
 111
 112         ret = of_property_read_u32(np, "reg", &pipe_id);
 113         if (ret != 0 || pipe_id >= mdev->n_pipelines)
 114                 return -EINVAL;
 115
 116         pipe = mdev->pipelines[pipe_id];
 117
 118         clk = of_clk_get_by_name(np, "aclk");
 119         if (IS_ERR(clk)) {
 120                 DRM_ERROR("get aclk for pipeline %d failed!\n", pipe_id);
 121                 return PTR_ERR(clk);
 122         }
 123         pipe->aclk = clk;
 124
 125         clk = of_clk_get_by_name(np, "pxclk");
 126         if (IS_ERR(clk)) {
 127                 DRM_ERROR("get pxclk for pipeline %d failed!\n", pipe_id);
 128                 return PTR_ERR(clk);
 129         }
 130         pipe->pxlclk = clk;
 131
 132         /* enum ports */
 133         pipe->of_output_dev =
 134                 of_graph_get_remote_node(np, KOMEDA_OF_PORT_OUTPUT, 0);
 135         pipe->of_output_port =
 136                 of_graph_get_port_by_id(np, KOMEDA_OF_PORT_OUTPUT);
 137
 138         pipe->of_node = np;
 139
 140         return 0;
 141 }
 142
 143 static int komeda_parse_dt(struct device *dev, struct komeda_dev *mdev)
 144 {
 145         struct platform_device *pdev = to_platform_device(dev);
 146         struct device_node *child, *np = dev->of_node;
 147         struct clk *clk;
 148         int ret;
 149
 150         clk = devm_clk_get(dev, "mclk");
 151         if (IS_ERR(clk))
 152                 return PTR_ERR(clk);
 153
 154         mdev->mclk = clk;
 155         mdev->irq  = platform_get_irq(pdev, 0);
 156         if (mdev->irq < 0) {
 157                 DRM_ERROR("could not get IRQ number.\n");
 158                 return mdev->irq;
 159         }
 160
 161         for_each_available_child_of_node(np, child) {
 162                 if (of_node_cmp(child->name, "pipeline") == 0) {
 163                         ret = komeda_parse_pipe_dt(mdev, child);
 164                         if (ret) {
 165                                 DRM_ERROR("parse pipeline dt error!\n");
 166                                 of_node_put(child);
 167                                 break;
 168                         }
 169                 }
 170         }
 171
 172         return ret;
 173 }
 174
 175 struct komeda_dev *komeda_dev_create(struct device *dev)
 176 {
 177         struct platform_device *pdev = to_platform_device(dev);
 178         const struct komeda_product_data *product;
 179         struct komeda_dev *mdev;
 180         struct resource *io_res;
 181         int err = 0;
 182
 183         product = of_device_get_match_data(dev);
 184         if (!product)
 185                 return ERR_PTR(-ENODEV);
 186
 187         io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 188         if (!io_res) {
 189                 DRM_ERROR("No registers defined.\n");
 190                 return ERR_PTR(-ENODEV);
 191         }
 192
 193         mdev = devm_kzalloc(dev, sizeof(*mdev), GFP_KERNEL);
 194         if (!mdev)
 195                 return ERR_PTR(-ENOMEM);
 196
 197         mutex_init(&mdev->lock);
 198
 199         mdev->dev = dev;
 200         mdev->reg_base = devm_ioremap_resource(dev, io_res);
 201         if (IS_ERR(mdev->reg_base)) {
 202                 DRM_ERROR("Map register space failed.\n");
 203                 err = PTR_ERR(mdev->reg_base);
 204                 mdev->reg_base = NULL;
 205                 goto err_cleanup;
 206         }
 207
 208         mdev->pclk = devm_clk_get(dev, "pclk");
 209         if (IS_ERR(mdev->pclk)) {
 210                 DRM_ERROR("Get APB clk failed.\n");
 211                 err = PTR_ERR(mdev->pclk);
 212                 mdev->pclk = NULL;
 213                 goto err_cleanup;
 214         }
 215
 216         /* Enable APB clock to access the registers */
 217         clk_prepare_enable(mdev->pclk);
 218
 219         mdev->funcs = product->identify(mdev->reg_base, &mdev->chip);
 220         if (!komeda_product_match(mdev, product->product_id)) {
 221                 DRM_ERROR("DT configured %x mismatch with real HW %x.\n",
 222                           product->product_id,
 223                           MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id));
 224                 err = -ENODEV;
 225                 goto err_cleanup;
 226         }
 227
 228         DRM_INFO("Found ARM Mali-D%x version r%dp%d\n",
 229                  MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id),
 230                  MALIDP_CORE_ID_MAJOR(mdev->chip.core_id),
 231                  MALIDP_CORE_ID_MINOR(mdev->chip.core_id));
 232
 233         mdev->funcs->init_format_table(mdev);
 234
 235         err = mdev->funcs->enum_resources(mdev);
 236         if (err) {
 237                 DRM_ERROR("enumerate display resource failed.\n");
 238                 goto err_cleanup;
 239         }
 240
 241         err = komeda_parse_dt(dev, mdev);
 242         if (err) {
 243                 DRM_ERROR("parse device tree failed.\n");
 244                 goto err_cleanup;
 245         }
 246
 247         err = komeda_assemble_pipelines(mdev);
 248         if (err) {
 249                 DRM_ERROR("assemble display pipelines failed.\n");
 250                 goto err_cleanup;
 251         }
 252
 253         dev->dma_parms = &mdev->dma_parms;
 254         dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
 255
 256         err = sysfs_create_group(&dev->kobj, &komeda_sysfs_attr_group);
 257         if (err) {
 258                 DRM_ERROR("create sysfs group failed.\n");
 259                 goto err_cleanup;
 260         }
 261
 262 #ifdef CONFIG_DEBUG_FS
 263         komeda_debugfs_init(mdev);
 264 #endif
 265
 266         return mdev;
 267
 268 err_cleanup:
 269         komeda_dev_destroy(mdev);
 270         return ERR_PTR(err);
 271 }
 272
 273 void komeda_dev_destroy(struct komeda_dev *mdev)
 274 {
 275         struct device *dev = mdev->dev;
 276         const struct komeda_dev_funcs *funcs = mdev->funcs;
 277         int i;
 278
 279         sysfs_remove_group(&dev->kobj, &komeda_sysfs_attr_group);
 280
 281 #ifdef CONFIG_DEBUG_FS
 282         debugfs_remove_recursive(mdev->debugfs_root);
 283 #endif
 284
 285         for (i = 0; i < mdev->n_pipelines; i++) {
 286                 komeda_pipeline_destroy(mdev, mdev->pipelines[i]);
 287                 mdev->pipelines[i] = NULL;
 288         }
 289
 290         mdev->n_pipelines = 0;
 291
 292         if (funcs && funcs->cleanup)
 293                 funcs->cleanup(mdev);
 294
 295         if (mdev->reg_base) {
 296                 devm_iounmap(dev, mdev->reg_base);
 297                 mdev->reg_base = NULL;
 298         }
 299
 300         if (mdev->mclk) {
 301                 devm_clk_put(dev, mdev->mclk);
 302                 mdev->mclk = NULL;
 303         }
 304
 305         if (mdev->pclk) {
 306                 clk_disable_unprepare(mdev->pclk);
 307                 devm_clk_put(dev, mdev->pclk);
 308                 mdev->pclk = NULL;
 309         }
 310
 311         devm_kfree(dev, mdev);
 312 }