drivers/gpu/drm/arm/display/komeda/komeda_dev.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
   4  * Author: James.Qian.Wang <james.qian.wang@arm.com>
   5  *
   6  */
   7 #include <linux/io.h>
   8 #include <linux/of_device.h>
   9 #include <linux/of_graph.h>
  10 #include <linux/platform_device.h>
  11 #ifdef CONFIG_DEBUG_FS
  12 #include <linux/debugfs.h>
  13 #include <linux/seq_file.h>
  14 #endif
  15
  16 #include <drm/drm_print.h>
  17
  18 #include "komeda_dev.h"
  19
  20 static int komeda_register_show(struct seq_file *sf, void *x)
  21 {
  22         struct komeda_dev *mdev = sf->private;
  23         int i;
  24
  25         if (mdev->funcs->dump_register)
  26                 mdev->funcs->dump_register(mdev, sf);
  27
  28         for (i = 0; i < mdev->n_pipelines; i++)
  29                 komeda_pipeline_dump_register(mdev->pipelines[i], sf);
  30
  31         return 0;
  32 }
  33
  34 static int komeda_register_open(struct inode *inode, struct file *filp)
  35 {
  36         return single_open(filp, komeda_register_show, inode->i_private);
  37 }
  38
  39 static const struct file_operations komeda_register_fops = {
  40         .owner          = THIS_MODULE,
  41         .open           = komeda_register_open,
  42         .read           = seq_read,
  43         .llseek         = seq_lseek,
  44         .release        = single_release,
  45 };
  46
  47 #ifdef CONFIG_DEBUG_FS
  48 static void komeda_debugfs_init(struct komeda_dev *mdev)
  49 {
  50         if (!debugfs_initialized())
  51                 return;
  52
  53         mdev->debugfs_root = debugfs_create_dir("komeda", NULL);
  54         if (IS_ERR_OR_NULL(mdev->debugfs_root))
  55                 return;
  56
  57         debugfs_create_file("register", 0444, mdev->debugfs_root,
  58                             mdev, &komeda_register_fops);
  59 }
  60 #endif
  61
  62 static ssize_t
  63 core_id_show(struct device *dev, struct device_attribute *attr, char *buf)
  64 {
  65         struct komeda_dev *mdev = dev_to_mdev(dev);
  66
  67         return snprintf(buf, PAGE_SIZE, "0x%08x\n", mdev->chip.core_id);
  68 }
  69 static DEVICE_ATTR_RO(core_id);
  70
  71 static ssize_t
  72 config_id_show(struct device *dev, struct device_attribute *attr, char *buf)
  73 {
  74         struct komeda_dev *mdev = dev_to_mdev(dev);
  75         struct komeda_pipeline *pipe = mdev->pipelines[0];
  76         union komeda_config_id config_id;
  77         int i;
  78
  79         memset(&config_id, 0, sizeof(config_id));
  80
  81         config_id.max_line_sz = pipe->layers[0]->hsize_in.end;
  82         config_id.n_pipelines = mdev->n_pipelines;
  83         config_id.n_scalers = pipe->n_scalers;
  84         config_id.n_layers = pipe->n_layers;
  85         config_id.n_richs = 0;
  86         for (i = 0; i < pipe->n_layers; i++) {
  87                 if (pipe->layers[i]->layer_type == KOMEDA_FMT_RICH_LAYER)
  88                         config_id.n_richs++;
  89         }
  90         return snprintf(buf, PAGE_SIZE, "0x%08x\n", config_id.value);
  91 }
  92 static DEVICE_ATTR_RO(config_id);
  93
  94 static struct attribute *komeda_sysfs_entries[] = {
  95         &dev_attr_core_id.attr,
  96         &dev_attr_config_id.attr,
  97         NULL,
  98 };
  99
 100 static struct attribute_group komeda_sysfs_attr_group = {
 101         .attrs = komeda_sysfs_entries,
 102 };
 103
 104 static int komeda_parse_pipe_dt(struct komeda_dev *mdev, struct device_node *np)
 105 {
 106         struct komeda_pipeline *pipe;
 107         struct clk *clk;
 108         u32 pipe_id;
 109         int ret = 0;
 110
 111         ret = of_property_read_u32(np, "reg", &pipe_id);
 112         if (ret != 0 || pipe_id >= mdev->n_pipelines)
 113                 return -EINVAL;
 114
 115         pipe = mdev->pipelines[pipe_id];
 116
 117         clk = of_clk_get_by_name(np, "aclk");
 118         if (IS_ERR(clk)) {
 119                 DRM_ERROR("get aclk for pipeline %d failed!\n", pipe_id);
 120                 return PTR_ERR(clk);
 121         }
 122         pipe->aclk = clk;
 123
 124         clk = of_clk_get_by_name(np, "pxclk");
 125         if (IS_ERR(clk)) {
 126                 DRM_ERROR("get pxclk for pipeline %d failed!\n", pipe_id);
 127                 return PTR_ERR(clk);
 128         }
 129         pipe->pxlclk = clk;
 130
 131         /* enum ports */
 132         pipe->of_output_dev =
 133                 of_graph_get_remote_node(np, KOMEDA_OF_PORT_OUTPUT, 0);
 134         pipe->of_output_port =
 135                 of_graph_get_port_by_id(np, KOMEDA_OF_PORT_OUTPUT);
 136
 137         pipe->of_node = np;
 138
 139         return 0;
 140 }
 141
 142 static int komeda_parse_dt(struct device *dev, struct komeda_dev *mdev)
 143 {
 144         struct platform_device *pdev = to_platform_device(dev);
 145         struct device_node *child, *np = dev->of_node;
 146         struct clk *clk;
 147         int ret;
 148
 149         clk = devm_clk_get(dev, "mclk");
 150         if (IS_ERR(clk))
 151                 return PTR_ERR(clk);
 152
 153         mdev->mclk = clk;
 154         mdev->irq  = platform_get_irq(pdev, 0);
 155         if (mdev->irq < 0) {
 156                 DRM_ERROR("could not get IRQ number.\n");
 157                 return mdev->irq;
 158         }
 159
 160         for_each_available_child_of_node(np, child) {
 161                 if (of_node_cmp(child->name, "pipeline") == 0) {
 162                         ret = komeda_parse_pipe_dt(mdev, child);
 163                         if (ret) {
 164                                 DRM_ERROR("parse pipeline dt error!\n");
 165                                 of_node_put(child);
 166                                 break;
 167                         }
 168                 }
 169         }
 170
 171         return ret;
 172 }
 173
 174 struct komeda_dev *komeda_dev_create(struct device *dev)
 175 {
 176         struct platform_device *pdev = to_platform_device(dev);
 177         const struct komeda_product_data *product;
 178         struct komeda_dev *mdev;
 179         struct resource *io_res;
 180         int err = 0;
 181
 182         product = of_device_get_match_data(dev);
 183         if (!product)
 184                 return ERR_PTR(-ENODEV);
 185
 186         io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 187         if (!io_res) {
 188                 DRM_ERROR("No registers defined.\n");
 189                 return ERR_PTR(-ENODEV);
 190         }
 191
 192         mdev = devm_kzalloc(dev, sizeof(*mdev), GFP_KERNEL);
 193         if (!mdev)
 194                 return ERR_PTR(-ENOMEM);
 195
 196         mutex_init(&mdev->lock);
 197
 198         mdev->dev = dev;
 199         mdev->reg_base = devm_ioremap_resource(dev, io_res);
 200         if (IS_ERR(mdev->reg_base)) {
 201                 DRM_ERROR("Map register space failed.\n");
 202                 err = PTR_ERR(mdev->reg_base);
 203                 mdev->reg_base = NULL;
 204                 goto err_cleanup;
 205         }
 206
 207         mdev->pclk = devm_clk_get(dev, "pclk");
 208         if (IS_ERR(mdev->pclk)) {
 209                 DRM_ERROR("Get APB clk failed.\n");
 210                 err = PTR_ERR(mdev->pclk);
 211                 mdev->pclk = NULL;
 212                 goto err_cleanup;
 213         }
 214
 215         /* Enable APB clock to access the registers */
 216         clk_prepare_enable(mdev->pclk);
 217
 218         mdev->funcs = product->identify(mdev->reg_base, &mdev->chip);
 219         if (!komeda_product_match(mdev, product->product_id)) {
 220                 DRM_ERROR("DT configured %x mismatch with real HW %x.\n",
 221                           product->product_id,
 222                           MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id));
 223                 err = -ENODEV;
 224                 goto err_cleanup;
 225         }
 226
 227         DRM_INFO("Found ARM Mali-D%x version r%dp%d\n",
 228                  MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id),
 229                  MALIDP_CORE_ID_MAJOR(mdev->chip.core_id),
 230                  MALIDP_CORE_ID_MINOR(mdev->chip.core_id));
 231
 232         mdev->funcs->init_format_table(mdev);
 233
 234         err = mdev->funcs->enum_resources(mdev);
 235         if (err) {
 236                 DRM_ERROR("enumerate display resource failed.\n");
 237                 goto err_cleanup;
 238         }
 239
 240         err = komeda_parse_dt(dev, mdev);
 241         if (err) {
 242                 DRM_ERROR("parse device tree failed.\n");
 243                 goto err_cleanup;
 244         }
 245
 246         err = komeda_assemble_pipelines(mdev);
 247         if (err) {
 248                 DRM_ERROR("assemble display pipelines failed.\n");
 249                 goto err_cleanup;
 250         }
 251
 252         err = sysfs_create_group(&dev->kobj, &komeda_sysfs_attr_group);
 253         if (err) {
 254                 DRM_ERROR("create sysfs group failed.\n");
 255                 goto err_cleanup;
 256         }
 257
 258 #ifdef CONFIG_DEBUG_FS
 259         komeda_debugfs_init(mdev);
 260 #endif
 261
 262         return mdev;
 263
 264 err_cleanup:
 265         komeda_dev_destroy(mdev);
 266         return ERR_PTR(err);
 267 }
 268
 269 void komeda_dev_destroy(struct komeda_dev *mdev)
 270 {
 271         struct device *dev = mdev->dev;
 272         struct komeda_dev_funcs *funcs = mdev->funcs;
 273         int i;
 274
 275         sysfs_remove_group(&dev->kobj, &komeda_sysfs_attr_group);
 276
 277 #ifdef CONFIG_DEBUG_FS
 278         debugfs_remove_recursive(mdev->debugfs_root);
 279 #endif
 280
 281         for (i = 0; i < mdev->n_pipelines; i++) {
 282                 komeda_pipeline_destroy(mdev, mdev->pipelines[i]);
 283                 mdev->pipelines[i] = NULL;
 284         }
 285
 286         mdev->n_pipelines = 0;
 287
 288         if (funcs && funcs->cleanup)
 289                 funcs->cleanup(mdev);
 290
 291         if (mdev->reg_base) {
 292                 devm_iounmap(dev, mdev->reg_base);
 293                 mdev->reg_base = NULL;
 294         }
 295
 296         if (mdev->mclk) {
 297                 devm_clk_put(dev, mdev->mclk);
 298                 mdev->mclk = NULL;
 299         }
 300
 301         if (mdev->pclk) {
 302                 clk_disable_unprepare(mdev->pclk);
 303                 devm_clk_put(dev, mdev->pclk);
 304                 mdev->pclk = NULL;
 305         }
 306
 307         devm_kfree(dev, mdev);
 308 }