2 * ARM HDLCD Controller register definition
5 #ifndef __HDLCD_DRV_H__
6 #define __HDLCD_DRV_H__
8 struct hdlcd_drm_private {
11 struct drm_fbdev_cma *fbdev;
13 struct drm_plane *plane;
14 struct drm_atomic_state *state;
15 #ifdef CONFIG_DEBUG_FS
16 atomic_t buffer_underrun_count;
17 atomic_t bus_error_count;
19 atomic_t dma_end_count;
23 #define crtc_to_hdlcd_priv(x) container_of(x, struct hdlcd_drm_private, crtc)
25 static inline void hdlcd_write(struct hdlcd_drm_private *hdlcd,
26 unsigned int reg, u32 value)
28 writel(value, hdlcd->mmio + reg);
31 static inline u32 hdlcd_read(struct hdlcd_drm_private *hdlcd, unsigned int reg)
33 return readl(hdlcd->mmio + reg);
36 int hdlcd_setup_crtc(struct drm_device *dev);
37 void hdlcd_set_scanout(struct hdlcd_drm_private *hdlcd);
39 #endif /* __HDLCD_DRV_H__ */