drivers/gpu/drm/i915/display/intel_hdcp.c

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * Copyright (C) 2017 Google, Inc.
   4  *
   5  * Authors:
   6  * Sean Paul <seanpaul@chromium.org>
   7  */
   8
   9 #include <linux/component.h>
  10 #include <linux/i2c.h>
  11 #include <linux/random.h>
  12
  13 #include <drm/drm_hdcp.h>
  14 #include <drm/i915_component.h>
  15
  16 #include "i915_reg.h"
  17 #include "intel_drv.h"
  18 #include "intel_hdcp.h"
  19 #include "intel_sideband.h"
  20
  21 #define KEY_LOAD_TRIES  5
  22 #define ENCRYPT_STATUS_CHANGE_TIMEOUT_MS        50
  23 #define HDCP2_LC_RETRY_CNT                      3
  24
  25 static
  26 bool intel_hdcp_is_ksv_valid(u8 *ksv)
  27 {
  28         int i, ones = 0;
  29         /* KSV has 20 1's and 20 0's */
  30         for (i = 0; i < DRM_HDCP_KSV_LEN; i++)
  31                 ones += hweight8(ksv[i]);
  32         if (ones != 20)
  33                 return false;
  34
  35         return true;
  36 }
  37
  38 static
  39 int intel_hdcp_read_valid_bksv(struct intel_digital_port *intel_dig_port,
  40                                const struct intel_hdcp_shim *shim, u8 *bksv)
  41 {
  42         int ret, i, tries = 2;
  43
  44         /* HDCP spec states that we must retry the bksv if it is invalid */
  45         for (i = 0; i < tries; i++) {
  46                 ret = shim->read_bksv(intel_dig_port, bksv);
  47                 if (ret)
  48                         return ret;
  49                 if (intel_hdcp_is_ksv_valid(bksv))
  50                         break;
  51         }
  52         if (i == tries) {
  53                 DRM_DEBUG_KMS("Bksv is invalid\n");
  54                 return -ENODEV;
  55         }
  56
  57         return 0;
  58 }
  59
  60 /* Is HDCP1.4 capable on Platform and Sink */
  61 bool intel_hdcp_capable(struct intel_connector *connector)
  62 {
  63         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
  64         const struct intel_hdcp_shim *shim = connector->hdcp.shim;
  65         bool capable = false;
  66         u8 bksv[5];
  67
  68         if (!shim)
  69                 return capable;
  70
  71         if (shim->hdcp_capable) {
  72                 shim->hdcp_capable(intel_dig_port, &capable);
  73         } else {
  74                 if (!intel_hdcp_read_valid_bksv(intel_dig_port, shim, bksv))
  75                         capable = true;
  76         }
  77
  78         return capable;
  79 }
  80
  81 /* Is HDCP2.2 capable on Platform and Sink */
  82 bool intel_hdcp2_capable(struct intel_connector *connector)
  83 {
  84         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  85         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
  86         struct intel_hdcp *hdcp = &connector->hdcp;
  87         bool capable = false;
  88
  89         /* I915 support for HDCP2.2 */
  90         if (!hdcp->hdcp2_supported)
  91                 return false;
  92
  93         /* MEI interface is solid */
  94         mutex_lock(&dev_priv->hdcp_comp_mutex);
  95         if (!dev_priv->hdcp_comp_added ||  !dev_priv->hdcp_master) {
  96                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
  97                 return false;
  98         }
  99         mutex_unlock(&dev_priv->hdcp_comp_mutex);
 100
 101         /* Sink's capability for HDCP2.2 */
 102         hdcp->shim->hdcp_2_2_capable(intel_dig_port, &capable);
 103
 104         return capable;
 105 }
 106
 107 static inline bool intel_hdcp_in_use(struct intel_connector *connector)
 108 {
 109         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 110         enum port port = connector->encoder->port;
 111         u32 reg;
 112
 113         reg = I915_READ(PORT_HDCP_STATUS(port));
 114         return reg & HDCP_STATUS_ENC;
 115 }
 116
 117 static inline bool intel_hdcp2_in_use(struct intel_connector *connector)
 118 {
 119         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 120         enum port port = connector->encoder->port;
 121         u32 reg;
 122
 123         reg = I915_READ(HDCP2_STATUS_DDI(port));
 124         return reg & LINK_ENCRYPTION_STATUS;
 125 }
 126
 127 static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port,
 128                                     const struct intel_hdcp_shim *shim)
 129 {
 130         int ret, read_ret;
 131         bool ksv_ready;
 132
 133         /* Poll for ksv list ready (spec says max time allowed is 5s) */
 134         ret = __wait_for(read_ret = shim->read_ksv_ready(intel_dig_port,
 135                                                          &ksv_ready),
 136                          read_ret || ksv_ready, 5 * 1000 * 1000, 1000,
 137                          100 * 1000);
 138         if (ret)
 139                 return ret;
 140         if (read_ret)
 141                 return read_ret;
 142         if (!ksv_ready)
 143                 return -ETIMEDOUT;
 144
 145         return 0;
 146 }
 147
 148 static bool hdcp_key_loadable(struct drm_i915_private *dev_priv)
 149 {
 150         struct i915_power_domains *power_domains = &dev_priv->power_domains;
 151         struct i915_power_well *power_well;
 152         enum i915_power_well_id id;
 153         bool enabled = false;
 154
 155         /*
 156          * On HSW and BDW, Display HW loads the Key as soon as Display resumes.
 157          * On all BXT+, SW can load the keys only when the PW#1 is turned on.
 158          */
 159         if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
 160                 id = HSW_DISP_PW_GLOBAL;
 161         else
 162                 id = SKL_DISP_PW_1;
 163
 164         mutex_lock(&power_domains->lock);
 165
 166         /* PG1 (power well #1) needs to be enabled */
 167         for_each_power_well(dev_priv, power_well) {
 168                 if (power_well->desc->id == id) {
 169                         enabled = power_well->desc->ops->is_enabled(dev_priv,
 170                                                                     power_well);
 171                         break;
 172                 }
 173         }
 174         mutex_unlock(&power_domains->lock);
 175
 176         /*
 177          * Another req for hdcp key loadability is enabled state of pll for
 178          * cdclk. Without active crtc we wont land here. So we are assuming that
 179          * cdclk is already on.
 180          */
 181
 182         return enabled;
 183 }
 184
 185 static void intel_hdcp_clear_keys(struct drm_i915_private *dev_priv)
 186 {
 187         I915_WRITE(HDCP_KEY_CONF, HDCP_CLEAR_KEYS_TRIGGER);
 188         I915_WRITE(HDCP_KEY_STATUS, HDCP_KEY_LOAD_DONE | HDCP_KEY_LOAD_STATUS |
 189                    HDCP_FUSE_IN_PROGRESS | HDCP_FUSE_ERROR | HDCP_FUSE_DONE);
 190 }
 191
 192 static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
 193 {
 194         int ret;
 195         u32 val;
 196
 197         val = I915_READ(HDCP_KEY_STATUS);
 198         if ((val & HDCP_KEY_LOAD_DONE) && (val & HDCP_KEY_LOAD_STATUS))
 199                 return 0;
 200
 201         /*
 202          * On HSW and BDW HW loads the HDCP1.4 Key when Display comes
 203          * out of reset. So if Key is not already loaded, its an error state.
 204          */
 205         if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
 206                 if (!(I915_READ(HDCP_KEY_STATUS) & HDCP_KEY_LOAD_DONE))
 207                         return -ENXIO;
 208
 209         /*
 210          * Initiate loading the HDCP key from fuses.
 211          *
 212          * BXT+ platforms, HDCP key needs to be loaded by SW. Only Gen 9
 213          * platforms except BXT and GLK, differ in the key load trigger process
 214          * from other platforms. So GEN9_BC uses the GT Driver Mailbox i/f.
 215          */
 216         if (IS_GEN9_BC(dev_priv)) {
 217                 ret = sandybridge_pcode_write(dev_priv,
 218                                               SKL_PCODE_LOAD_HDCP_KEYS, 1);
 219                 if (ret) {
 220                         DRM_ERROR("Failed to initiate HDCP key load (%d)\n",
 221                                   ret);
 222                         return ret;
 223                 }
 224         } else {
 225                 I915_WRITE(HDCP_KEY_CONF, HDCP_KEY_LOAD_TRIGGER);
 226         }
 227
 228         /* Wait for the keys to load (500us) */
 229         ret = __intel_wait_for_register(&dev_priv->uncore, HDCP_KEY_STATUS,
 230                                         HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
 231                                         10, 1, &val);
 232         if (ret)
 233                 return ret;
 234         else if (!(val & HDCP_KEY_LOAD_STATUS))
 235                 return -ENXIO;
 236
 237         /* Send Aksv over to PCH display for use in authentication */
 238         I915_WRITE(HDCP_KEY_CONF, HDCP_AKSV_SEND_TRIGGER);
 239
 240         return 0;
 241 }
 242
 243 /* Returns updated SHA-1 index */
 244 static int intel_write_sha_text(struct drm_i915_private *dev_priv, u32 sha_text)
 245 {
 246         I915_WRITE(HDCP_SHA_TEXT, sha_text);
 247         if (intel_wait_for_register(&dev_priv->uncore, HDCP_REP_CTL,
 248                                     HDCP_SHA1_READY, HDCP_SHA1_READY, 1)) {
 249                 DRM_ERROR("Timed out waiting for SHA1 ready\n");
 250                 return -ETIMEDOUT;
 251         }
 252         return 0;
 253 }
 254
 255 static
 256 u32 intel_hdcp_get_repeater_ctl(struct intel_digital_port *intel_dig_port)
 257 {
 258         enum port port = intel_dig_port->base.port;
 259         switch (port) {
 260         case PORT_A:
 261                 return HDCP_DDIA_REP_PRESENT | HDCP_DDIA_SHA1_M0;
 262         case PORT_B:
 263                 return HDCP_DDIB_REP_PRESENT | HDCP_DDIB_SHA1_M0;
 264         case PORT_C:
 265                 return HDCP_DDIC_REP_PRESENT | HDCP_DDIC_SHA1_M0;
 266         case PORT_D:
 267                 return HDCP_DDID_REP_PRESENT | HDCP_DDID_SHA1_M0;
 268         case PORT_E:
 269                 return HDCP_DDIE_REP_PRESENT | HDCP_DDIE_SHA1_M0;
 270         default:
 271                 break;
 272         }
 273         DRM_ERROR("Unknown port %d\n", port);
 274         return -EINVAL;
 275 }
 276
 277 static
 278 int intel_hdcp_validate_v_prime(struct intel_digital_port *intel_dig_port,
 279                                 const struct intel_hdcp_shim *shim,
 280                                 u8 *ksv_fifo, u8 num_downstream, u8 *bstatus)
 281 {
 282         struct drm_i915_private *dev_priv;
 283         u32 vprime, sha_text, sha_leftovers, rep_ctl;
 284         int ret, i, j, sha_idx;
 285
 286         dev_priv = intel_dig_port->base.base.dev->dev_private;
 287
 288         /* Process V' values from the receiver */
 289         for (i = 0; i < DRM_HDCP_V_PRIME_NUM_PARTS; i++) {
 290                 ret = shim->read_v_prime_part(intel_dig_port, i, &vprime);
 291                 if (ret)
 292                         return ret;
 293                 I915_WRITE(HDCP_SHA_V_PRIME(i), vprime);
 294         }
 295
 296         /*
 297          * We need to write the concatenation of all device KSVs, BINFO (DP) ||
 298          * BSTATUS (HDMI), and M0 (which is added via HDCP_REP_CTL). This byte
 299          * stream is written via the HDCP_SHA_TEXT register in 32-bit
 300          * increments. Every 64 bytes, we need to write HDCP_REP_CTL again. This
 301          * index will keep track of our progress through the 64 bytes as well as
 302          * helping us work the 40-bit KSVs through our 32-bit register.
 303          *
 304          * NOTE: data passed via HDCP_SHA_TEXT should be big-endian
 305          */
 306         sha_idx = 0;
 307         sha_text = 0;
 308         sha_leftovers = 0;
 309         rep_ctl = intel_hdcp_get_repeater_ctl(intel_dig_port);
 310         I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
 311         for (i = 0; i < num_downstream; i++) {
 312                 unsigned int sha_empty;
 313                 u8 *ksv = &ksv_fifo[i * DRM_HDCP_KSV_LEN];
 314
 315                 /* Fill up the empty slots in sha_text and write it out */
 316                 sha_empty = sizeof(sha_text) - sha_leftovers;
 317                 for (j = 0; j < sha_empty; j++)
 318                         sha_text |= ksv[j] << ((sizeof(sha_text) - j - 1) * 8);
 319
 320                 ret = intel_write_sha_text(dev_priv, sha_text);
 321                 if (ret < 0)
 322                         return ret;
 323
 324                 /* Programming guide writes this every 64 bytes */
 325                 sha_idx += sizeof(sha_text);
 326                 if (!(sha_idx % 64))
 327                         I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
 328
 329                 /* Store the leftover bytes from the ksv in sha_text */
 330                 sha_leftovers = DRM_HDCP_KSV_LEN - sha_empty;
 331                 sha_text = 0;
 332                 for (j = 0; j < sha_leftovers; j++)
 333                         sha_text |= ksv[sha_empty + j] <<
 334                                         ((sizeof(sha_text) - j - 1) * 8);
 335
 336                 /*
 337                  * If we still have room in sha_text for more data, continue.
 338                  * Otherwise, write it out immediately.
 339                  */
 340                 if (sizeof(sha_text) > sha_leftovers)
 341                         continue;
 342
 343                 ret = intel_write_sha_text(dev_priv, sha_text);
 344                 if (ret < 0)
 345                         return ret;
 346                 sha_leftovers = 0;
 347                 sha_text = 0;
 348                 sha_idx += sizeof(sha_text);
 349         }
 350
 351         /*
 352          * We need to write BINFO/BSTATUS, and M0 now. Depending on how many
 353          * bytes are leftover from the last ksv, we might be able to fit them
 354          * all in sha_text (first 2 cases), or we might need to split them up
 355          * into 2 writes (last 2 cases).
 356          */
 357         if (sha_leftovers == 0) {
 358                 /* Write 16 bits of text, 16 bits of M0 */
 359                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_16);
 360                 ret = intel_write_sha_text(dev_priv,
 361                                            bstatus[0] << 8 | bstatus[1]);
 362                 if (ret < 0)
 363                         return ret;
 364                 sha_idx += sizeof(sha_text);
 365
 366                 /* Write 32 bits of M0 */
 367                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_0);
 368                 ret = intel_write_sha_text(dev_priv, 0);
 369                 if (ret < 0)
 370                         return ret;
 371                 sha_idx += sizeof(sha_text);
 372
 373                 /* Write 16 bits of M0 */
 374                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_16);
 375                 ret = intel_write_sha_text(dev_priv, 0);
 376                 if (ret < 0)
 377                         return ret;
 378                 sha_idx += sizeof(sha_text);
 379
 380         } else if (sha_leftovers == 1) {
 381                 /* Write 24 bits of text, 8 bits of M0 */
 382                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_24);
 383                 sha_text |= bstatus[0] << 16 | bstatus[1] << 8;
 384                 /* Only 24-bits of data, must be in the LSB */
 385                 sha_text = (sha_text & 0xffffff00) >> 8;
 386                 ret = intel_write_sha_text(dev_priv, sha_text);
 387                 if (ret < 0)
 388                         return ret;
 389                 sha_idx += sizeof(sha_text);
 390
 391                 /* Write 32 bits of M0 */
 392                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_0);
 393                 ret = intel_write_sha_text(dev_priv, 0);
 394                 if (ret < 0)
 395                         return ret;
 396                 sha_idx += sizeof(sha_text);
 397
 398                 /* Write 24 bits of M0 */
 399                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_8);
 400                 ret = intel_write_sha_text(dev_priv, 0);
 401                 if (ret < 0)
 402                         return ret;
 403                 sha_idx += sizeof(sha_text);
 404
 405         } else if (sha_leftovers == 2) {
 406                 /* Write 32 bits of text */
 407                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
 408                 sha_text |= bstatus[0] << 24 | bstatus[1] << 16;
 409                 ret = intel_write_sha_text(dev_priv, sha_text);
 410                 if (ret < 0)
 411                         return ret;
 412                 sha_idx += sizeof(sha_text);
 413
 414                 /* Write 64 bits of M0 */
 415                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_0);
 416                 for (i = 0; i < 2; i++) {
 417                         ret = intel_write_sha_text(dev_priv, 0);
 418                         if (ret < 0)
 419                                 return ret;
 420                         sha_idx += sizeof(sha_text);
 421                 }
 422         } else if (sha_leftovers == 3) {
 423                 /* Write 32 bits of text */
 424                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
 425                 sha_text |= bstatus[0] << 24;
 426                 ret = intel_write_sha_text(dev_priv, sha_text);
 427                 if (ret < 0)
 428                         return ret;
 429                 sha_idx += sizeof(sha_text);
 430
 431                 /* Write 8 bits of text, 24 bits of M0 */
 432                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_8);
 433                 ret = intel_write_sha_text(dev_priv, bstatus[1]);
 434                 if (ret < 0)
 435                         return ret;
 436                 sha_idx += sizeof(sha_text);
 437
 438                 /* Write 32 bits of M0 */
 439                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_0);
 440                 ret = intel_write_sha_text(dev_priv, 0);
 441                 if (ret < 0)
 442                         return ret;
 443                 sha_idx += sizeof(sha_text);
 444
 445                 /* Write 8 bits of M0 */
 446                 I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_24);
 447                 ret = intel_write_sha_text(dev_priv, 0);
 448                 if (ret < 0)
 449                         return ret;
 450                 sha_idx += sizeof(sha_text);
 451         } else {
 452                 DRM_DEBUG_KMS("Invalid number of leftovers %d\n",
 453                               sha_leftovers);
 454                 return -EINVAL;
 455         }
 456
 457         I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
 458         /* Fill up to 64-4 bytes with zeros (leave the last write for length) */
 459         while ((sha_idx % 64) < (64 - sizeof(sha_text))) {
 460                 ret = intel_write_sha_text(dev_priv, 0);
 461                 if (ret < 0)
 462                         return ret;
 463                 sha_idx += sizeof(sha_text);
 464         }
 465
 466         /*
 467          * Last write gets the length of the concatenation in bits. That is:
 468          *  - 5 bytes per device
 469          *  - 10 bytes for BINFO/BSTATUS(2), M0(8)
 470          */
 471         sha_text = (num_downstream * 5 + 10) * 8;
 472         ret = intel_write_sha_text(dev_priv, sha_text);
 473         if (ret < 0)
 474                 return ret;
 475
 476         /* Tell the HW we're done with the hash and wait for it to ACK */
 477         I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_COMPLETE_HASH);
 478         if (intel_wait_for_register(&dev_priv->uncore, HDCP_REP_CTL,
 479                                     HDCP_SHA1_COMPLETE,
 480                                     HDCP_SHA1_COMPLETE, 1)) {
 481                 DRM_ERROR("Timed out waiting for SHA1 complete\n");
 482                 return -ETIMEDOUT;
 483         }
 484         if (!(I915_READ(HDCP_REP_CTL) & HDCP_SHA1_V_MATCH)) {
 485                 DRM_DEBUG_KMS("SHA-1 mismatch, HDCP failed\n");
 486                 return -ENXIO;
 487         }
 488
 489         return 0;
 490 }
 491
 492 /* Implements Part 2 of the HDCP authorization procedure */
 493 static
 494 int intel_hdcp_auth_downstream(struct intel_connector *connector)
 495 {
 496         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 497         const struct intel_hdcp_shim *shim = connector->hdcp.shim;
 498         struct drm_device *dev = connector->base.dev;
 499         u8 bstatus[2], num_downstream, *ksv_fifo;
 500         int ret, i, tries = 3;
 501
 502         ret = intel_hdcp_poll_ksv_fifo(intel_dig_port, shim);
 503         if (ret) {
 504                 DRM_DEBUG_KMS("KSV list failed to become ready (%d)\n", ret);
 505                 return ret;
 506         }
 507
 508         ret = shim->read_bstatus(intel_dig_port, bstatus);
 509         if (ret)
 510                 return ret;
 511
 512         if (DRM_HDCP_MAX_DEVICE_EXCEEDED(bstatus[0]) ||
 513             DRM_HDCP_MAX_CASCADE_EXCEEDED(bstatus[1])) {
 514                 DRM_DEBUG_KMS("Max Topology Limit Exceeded\n");
 515                 return -EPERM;
 516         }
 517
 518         /*
 519          * When repeater reports 0 device count, HDCP1.4 spec allows disabling
 520          * the HDCP encryption. That implies that repeater can't have its own
 521          * display. As there is no consumption of encrypted content in the
 522          * repeater with 0 downstream devices, we are failing the
 523          * authentication.
 524          */
 525         num_downstream = DRM_HDCP_NUM_DOWNSTREAM(bstatus[0]);
 526         if (num_downstream == 0) {
 527                 DRM_DEBUG_KMS("Repeater with zero downstream devices\n");
 528                 return -EINVAL;
 529         }
 530
 531         ksv_fifo = kcalloc(DRM_HDCP_KSV_LEN, num_downstream, GFP_KERNEL);
 532         if (!ksv_fifo) {
 533                 DRM_DEBUG_KMS("Out of mem: ksv_fifo\n");
 534                 return -ENOMEM;
 535         }
 536
 537         ret = shim->read_ksv_fifo(intel_dig_port, num_downstream, ksv_fifo);
 538         if (ret)
 539                 goto err;
 540
 541         if (drm_hdcp_check_ksvs_revoked(dev, ksv_fifo, num_downstream)) {
 542                 DRM_ERROR("Revoked Ksv(s) in ksv_fifo\n");
 543                 ret = -EPERM;
 544                 goto err;
 545         }
 546
 547         /*
 548          * When V prime mismatches, DP Spec mandates re-read of
 549          * V prime atleast twice.
 550          */
 551         for (i = 0; i < tries; i++) {
 552                 ret = intel_hdcp_validate_v_prime(intel_dig_port, shim,
 553                                                   ksv_fifo, num_downstream,
 554                                                   bstatus);
 555                 if (!ret)
 556                         break;
 557         }
 558
 559         if (i == tries) {
 560                 DRM_DEBUG_KMS("V Prime validation failed.(%d)\n", ret);
 561                 goto err;
 562         }
 563
 564         DRM_DEBUG_KMS("HDCP is enabled (%d downstream devices)\n",
 565                       num_downstream);
 566         ret = 0;
 567 err:
 568         kfree(ksv_fifo);
 569         return ret;
 570 }
 571
 572 /* Implements Part 1 of the HDCP authorization procedure */
 573 static int intel_hdcp_auth(struct intel_connector *connector)
 574 {
 575         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 576         struct intel_hdcp *hdcp = &connector->hdcp;
 577         struct drm_device *dev = connector->base.dev;
 578         const struct intel_hdcp_shim *shim = hdcp->shim;
 579         struct drm_i915_private *dev_priv;
 580         enum port port;
 581         unsigned long r0_prime_gen_start;
 582         int ret, i, tries = 2;
 583         union {
 584                 u32 reg[2];
 585                 u8 shim[DRM_HDCP_AN_LEN];
 586         } an;
 587         union {
 588                 u32 reg[2];
 589                 u8 shim[DRM_HDCP_KSV_LEN];
 590         } bksv;
 591         union {
 592                 u32 reg;
 593                 u8 shim[DRM_HDCP_RI_LEN];
 594         } ri;
 595         bool repeater_present, hdcp_capable;
 596
 597         dev_priv = intel_dig_port->base.base.dev->dev_private;
 598
 599         port = intel_dig_port->base.port;
 600
 601         /*
 602          * Detects whether the display is HDCP capable. Although we check for
 603          * valid Bksv below, the HDCP over DP spec requires that we check
 604          * whether the display supports HDCP before we write An. For HDMI
 605          * displays, this is not necessary.
 606          */
 607         if (shim->hdcp_capable) {
 608                 ret = shim->hdcp_capable(intel_dig_port, &hdcp_capable);
 609                 if (ret)
 610                         return ret;
 611                 if (!hdcp_capable) {
 612                         DRM_DEBUG_KMS("Panel is not HDCP capable\n");
 613                         return -EINVAL;
 614                 }
 615         }
 616
 617         /* Initialize An with 2 random values and acquire it */
 618         for (i = 0; i < 2; i++)
 619                 I915_WRITE(PORT_HDCP_ANINIT(port), get_random_u32());
 620         I915_WRITE(PORT_HDCP_CONF(port), HDCP_CONF_CAPTURE_AN);
 621
 622         /* Wait for An to be acquired */
 623         if (intel_wait_for_register(&dev_priv->uncore, PORT_HDCP_STATUS(port),
 624                                     HDCP_STATUS_AN_READY,
 625                                     HDCP_STATUS_AN_READY, 1)) {
 626                 DRM_ERROR("Timed out waiting for An\n");
 627                 return -ETIMEDOUT;
 628         }
 629
 630         an.reg[0] = I915_READ(PORT_HDCP_ANLO(port));
 631         an.reg[1] = I915_READ(PORT_HDCP_ANHI(port));
 632         ret = shim->write_an_aksv(intel_dig_port, an.shim);
 633         if (ret)
 634                 return ret;
 635
 636         r0_prime_gen_start = jiffies;
 637
 638         memset(&bksv, 0, sizeof(bksv));
 639
 640         ret = intel_hdcp_read_valid_bksv(intel_dig_port, shim, bksv.shim);
 641         if (ret < 0)
 642                 return ret;
 643
 644         if (drm_hdcp_check_ksvs_revoked(dev, bksv.shim, 1)) {
 645                 DRM_ERROR("BKSV is revoked\n");
 646                 return -EPERM;
 647         }
 648
 649         I915_WRITE(PORT_HDCP_BKSVLO(port), bksv.reg[0]);
 650         I915_WRITE(PORT_HDCP_BKSVHI(port), bksv.reg[1]);
 651
 652         ret = shim->repeater_present(intel_dig_port, &repeater_present);
 653         if (ret)
 654                 return ret;
 655         if (repeater_present)
 656                 I915_WRITE(HDCP_REP_CTL,
 657                            intel_hdcp_get_repeater_ctl(intel_dig_port));
 658
 659         ret = shim->toggle_signalling(intel_dig_port, true);
 660         if (ret)
 661                 return ret;
 662
 663         I915_WRITE(PORT_HDCP_CONF(port), HDCP_CONF_AUTH_AND_ENC);
 664
 665         /* Wait for R0 ready */
 666         if (wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
 667                      (HDCP_STATUS_R0_READY | HDCP_STATUS_ENC), 1)) {
 668                 DRM_ERROR("Timed out waiting for R0 ready\n");
 669                 return -ETIMEDOUT;
 670         }
 671
 672         /*
 673          * Wait for R0' to become available. The spec says 100ms from Aksv, but
 674          * some monitors can take longer than this. We'll set the timeout at
 675          * 300ms just to be sure.
 676          *
 677          * On DP, there's an R0_READY bit available but no such bit
 678          * exists on HDMI. Since the upper-bound is the same, we'll just do
 679          * the stupid thing instead of polling on one and not the other.
 680          */
 681         wait_remaining_ms_from_jiffies(r0_prime_gen_start, 300);
 682
 683         tries = 3;
 684
 685         /*
 686          * DP HDCP Spec mandates the two more reattempt to read R0, incase
 687          * of R0 mismatch.
 688          */
 689         for (i = 0; i < tries; i++) {
 690                 ri.reg = 0;
 691                 ret = shim->read_ri_prime(intel_dig_port, ri.shim);
 692                 if (ret)
 693                         return ret;
 694                 I915_WRITE(PORT_HDCP_RPRIME(port), ri.reg);
 695
 696                 /* Wait for Ri prime match */
 697                 if (!wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
 698                     (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1))
 699                         break;
 700         }
 701
 702         if (i == tries) {
 703                 DRM_DEBUG_KMS("Timed out waiting for Ri prime match (%x)\n",
 704                               I915_READ(PORT_HDCP_STATUS(port)));
 705                 return -ETIMEDOUT;
 706         }
 707
 708         /* Wait for encryption confirmation */
 709         if (intel_wait_for_register(&dev_priv->uncore, PORT_HDCP_STATUS(port),
 710                                     HDCP_STATUS_ENC, HDCP_STATUS_ENC,
 711                                     ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
 712                 DRM_ERROR("Timed out waiting for encryption\n");
 713                 return -ETIMEDOUT;
 714         }
 715
 716         /*
 717          * XXX: If we have MST-connected devices, we need to enable encryption
 718          * on those as well.
 719          */
 720
 721         if (repeater_present)
 722                 return intel_hdcp_auth_downstream(connector);
 723
 724         DRM_DEBUG_KMS("HDCP is enabled (no repeater present)\n");
 725         return 0;
 726 }
 727
 728 static int _intel_hdcp_disable(struct intel_connector *connector)
 729 {
 730         struct intel_hdcp *hdcp = &connector->hdcp;
 731         struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
 732         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 733         enum port port = intel_dig_port->base.port;
 734         int ret;
 735
 736         DRM_DEBUG_KMS("[%s:%d] HDCP is being disabled...\n",
 737                       connector->base.name, connector->base.base.id);
 738
 739         hdcp->hdcp_encrypted = false;
 740         I915_WRITE(PORT_HDCP_CONF(port), 0);
 741         if (intel_wait_for_register(&dev_priv->uncore,
 742                                     PORT_HDCP_STATUS(port), ~0, 0,
 743                                     ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
 744                 DRM_ERROR("Failed to disable HDCP, timeout clearing status\n");
 745                 return -ETIMEDOUT;
 746         }
 747
 748         ret = hdcp->shim->toggle_signalling(intel_dig_port, false);
 749         if (ret) {
 750                 DRM_ERROR("Failed to disable HDCP signalling\n");
 751                 return ret;
 752         }
 753
 754         DRM_DEBUG_KMS("HDCP is disabled\n");
 755         return 0;
 756 }
 757
 758 static int _intel_hdcp_enable(struct intel_connector *connector)
 759 {
 760         struct intel_hdcp *hdcp = &connector->hdcp;
 761         struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
 762         int i, ret, tries = 3;
 763
 764         DRM_DEBUG_KMS("[%s:%d] HDCP is being enabled...\n",
 765                       connector->base.name, connector->base.base.id);
 766
 767         if (!hdcp_key_loadable(dev_priv)) {
 768                 DRM_ERROR("HDCP key Load is not possible\n");
 769                 return -ENXIO;
 770         }
 771
 772         for (i = 0; i < KEY_LOAD_TRIES; i++) {
 773                 ret = intel_hdcp_load_keys(dev_priv);
 774                 if (!ret)
 775                         break;
 776                 intel_hdcp_clear_keys(dev_priv);
 777         }
 778         if (ret) {
 779                 DRM_ERROR("Could not load HDCP keys, (%d)\n", ret);
 780                 return ret;
 781         }
 782
 783         /* Incase of authentication failures, HDCP spec expects reauth. */
 784         for (i = 0; i < tries; i++) {
 785                 ret = intel_hdcp_auth(connector);
 786                 if (!ret) {
 787                         hdcp->hdcp_encrypted = true;
 788                         return 0;
 789                 }
 790
 791                 DRM_DEBUG_KMS("HDCP Auth failure (%d)\n", ret);
 792
 793                 /* Ensuring HDCP encryption and signalling are stopped. */
 794                 _intel_hdcp_disable(connector);
 795         }
 796
 797         DRM_DEBUG_KMS("HDCP authentication failed (%d tries/%d)\n", tries, ret);
 798         return ret;
 799 }
 800
 801 static inline
 802 struct intel_connector *intel_hdcp_to_connector(struct intel_hdcp *hdcp)
 803 {
 804         return container_of(hdcp, struct intel_connector, hdcp);
 805 }
 806
 807 /* Implements Part 3 of the HDCP authorization procedure */
 808 static int intel_hdcp_check_link(struct intel_connector *connector)
 809 {
 810         struct intel_hdcp *hdcp = &connector->hdcp;
 811         struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
 812         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 813         enum port port = intel_dig_port->base.port;
 814         int ret = 0;
 815
 816         mutex_lock(&hdcp->mutex);
 817
 818         /* Check_link valid only when HDCP1.4 is enabled */
 819         if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
 820             !hdcp->hdcp_encrypted) {
 821                 ret = -EINVAL;
 822                 goto out;
 823         }
 824
 825         if (WARN_ON(!intel_hdcp_in_use(connector))) {
 826                 DRM_ERROR("%s:%d HDCP link stopped encryption,%x\n",
 827                           connector->base.name, connector->base.base.id,
 828                           I915_READ(PORT_HDCP_STATUS(port)));
 829                 ret = -ENXIO;
 830                 hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
 831                 schedule_work(&hdcp->prop_work);
 832                 goto out;
 833         }
 834
 835         if (hdcp->shim->check_link(intel_dig_port)) {
 836                 if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
 837                         hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
 838                         schedule_work(&hdcp->prop_work);
 839                 }
 840                 goto out;
 841         }
 842
 843         DRM_DEBUG_KMS("[%s:%d] HDCP link failed, retrying authentication\n",
 844                       connector->base.name, connector->base.base.id);
 845
 846         ret = _intel_hdcp_disable(connector);
 847         if (ret) {
 848                 DRM_ERROR("Failed to disable hdcp (%d)\n", ret);
 849                 hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
 850                 schedule_work(&hdcp->prop_work);
 851                 goto out;
 852         }
 853
 854         ret = _intel_hdcp_enable(connector);
 855         if (ret) {
 856                 DRM_ERROR("Failed to enable hdcp (%d)\n", ret);
 857                 hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
 858                 schedule_work(&hdcp->prop_work);
 859                 goto out;
 860         }
 861
 862 out:
 863         mutex_unlock(&hdcp->mutex);
 864         return ret;
 865 }
 866
 867 static void intel_hdcp_prop_work(struct work_struct *work)
 868 {
 869         struct intel_hdcp *hdcp = container_of(work, struct intel_hdcp,
 870                                                prop_work);
 871         struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
 872         struct drm_device *dev = connector->base.dev;
 873         struct drm_connector_state *state;
 874
 875         drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
 876         mutex_lock(&hdcp->mutex);
 877
 878         /*
 879          * This worker is only used to flip between ENABLED/DESIRED. Either of
 880          * those to UNDESIRED is handled by core. If value == UNDESIRED,
 881          * we're running just after hdcp has been disabled, so just exit
 882          */
 883         if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
 884                 state = connector->base.state;
 885                 state->content_protection = hdcp->value;
 886         }
 887
 888         mutex_unlock(&hdcp->mutex);
 889         drm_modeset_unlock(&dev->mode_config.connection_mutex);
 890 }
 891
 892 bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port)
 893 {
 894         /* PORT E doesn't have HDCP, and PORT F is disabled */
 895         return INTEL_GEN(dev_priv) >= 9 && port < PORT_E;
 896 }
 897
 898 static int
 899 hdcp2_prepare_ake_init(struct intel_connector *connector,
 900                        struct hdcp2_ake_init *ake_data)
 901 {
 902         struct hdcp_port_data *data = &connector->hdcp.port_data;
 903         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 904         struct i915_hdcp_comp_master *comp;
 905         int ret;
 906
 907         mutex_lock(&dev_priv->hdcp_comp_mutex);
 908         comp = dev_priv->hdcp_master;
 909
 910         if (!comp || !comp->ops) {
 911                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
 912                 return -EINVAL;
 913         }
 914
 915         ret = comp->ops->initiate_hdcp2_session(comp->mei_dev, data, ake_data);
 916         if (ret)
 917                 DRM_DEBUG_KMS("Prepare_ake_init failed. %d\n", ret);
 918         mutex_unlock(&dev_priv->hdcp_comp_mutex);
 919
 920         return ret;
 921 }
 922
 923 static int
 924 hdcp2_verify_rx_cert_prepare_km(struct intel_connector *connector,
 925                                 struct hdcp2_ake_send_cert *rx_cert,
 926                                 bool *paired,
 927                                 struct hdcp2_ake_no_stored_km *ek_pub_km,
 928                                 size_t *msg_sz)
 929 {
 930         struct hdcp_port_data *data = &connector->hdcp.port_data;
 931         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 932         struct i915_hdcp_comp_master *comp;
 933         int ret;
 934
 935         mutex_lock(&dev_priv->hdcp_comp_mutex);
 936         comp = dev_priv->hdcp_master;
 937
 938         if (!comp || !comp->ops) {
 939                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
 940                 return -EINVAL;
 941         }
 942
 943         ret = comp->ops->verify_receiver_cert_prepare_km(comp->mei_dev, data,
 944                                                          rx_cert, paired,
 945                                                          ek_pub_km, msg_sz);
 946         if (ret < 0)
 947                 DRM_DEBUG_KMS("Verify rx_cert failed. %d\n", ret);
 948         mutex_unlock(&dev_priv->hdcp_comp_mutex);
 949
 950         return ret;
 951 }
 952
 953 static int hdcp2_verify_hprime(struct intel_connector *connector,
 954                                struct hdcp2_ake_send_hprime *rx_hprime)
 955 {
 956         struct hdcp_port_data *data = &connector->hdcp.port_data;
 957         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 958         struct i915_hdcp_comp_master *comp;
 959         int ret;
 960
 961         mutex_lock(&dev_priv->hdcp_comp_mutex);
 962         comp = dev_priv->hdcp_master;
 963
 964         if (!comp || !comp->ops) {
 965                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
 966                 return -EINVAL;
 967         }
 968
 969         ret = comp->ops->verify_hprime(comp->mei_dev, data, rx_hprime);
 970         if (ret < 0)
 971                 DRM_DEBUG_KMS("Verify hprime failed. %d\n", ret);
 972         mutex_unlock(&dev_priv->hdcp_comp_mutex);
 973
 974         return ret;
 975 }
 976
 977 static int
 978 hdcp2_store_pairing_info(struct intel_connector *connector,
 979                          struct hdcp2_ake_send_pairing_info *pairing_info)
 980 {
 981         struct hdcp_port_data *data = &connector->hdcp.port_data;
 982         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 983         struct i915_hdcp_comp_master *comp;
 984         int ret;
 985
 986         mutex_lock(&dev_priv->hdcp_comp_mutex);
 987         comp = dev_priv->hdcp_master;
 988
 989         if (!comp || !comp->ops) {
 990                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
 991                 return -EINVAL;
 992         }
 993
 994         ret = comp->ops->store_pairing_info(comp->mei_dev, data, pairing_info);
 995         if (ret < 0)
 996                 DRM_DEBUG_KMS("Store pairing info failed. %d\n", ret);
 997         mutex_unlock(&dev_priv->hdcp_comp_mutex);
 998
 999         return ret;
1000 }
1001
1002 static int
1003 hdcp2_prepare_lc_init(struct intel_connector *connector,
1004                       struct hdcp2_lc_init *lc_init)
1005 {
1006         struct hdcp_port_data *data = &connector->hdcp.port_data;
1007         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1008         struct i915_hdcp_comp_master *comp;
1009         int ret;
1010
1011         mutex_lock(&dev_priv->hdcp_comp_mutex);
1012         comp = dev_priv->hdcp_master;
1013
1014         if (!comp || !comp->ops) {
1015                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
1016                 return -EINVAL;
1017         }
1018
1019         ret = comp->ops->initiate_locality_check(comp->mei_dev, data, lc_init);
1020         if (ret < 0)
1021                 DRM_DEBUG_KMS("Prepare lc_init failed. %d\n", ret);
1022         mutex_unlock(&dev_priv->hdcp_comp_mutex);
1023
1024         return ret;
1025 }
1026
1027 static int
1028 hdcp2_verify_lprime(struct intel_connector *connector,
1029                     struct hdcp2_lc_send_lprime *rx_lprime)
1030 {
1031         struct hdcp_port_data *data = &connector->hdcp.port_data;
1032         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1033         struct i915_hdcp_comp_master *comp;
1034         int ret;
1035
1036         mutex_lock(&dev_priv->hdcp_comp_mutex);
1037         comp = dev_priv->hdcp_master;
1038
1039         if (!comp || !comp->ops) {
1040                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
1041                 return -EINVAL;
1042         }
1043
1044         ret = comp->ops->verify_lprime(comp->mei_dev, data, rx_lprime);
1045         if (ret < 0)
1046                 DRM_DEBUG_KMS("Verify L_Prime failed. %d\n", ret);
1047         mutex_unlock(&dev_priv->hdcp_comp_mutex);
1048
1049         return ret;
1050 }
1051
1052 static int hdcp2_prepare_skey(struct intel_connector *connector,
1053                               struct hdcp2_ske_send_eks *ske_data)
1054 {
1055         struct hdcp_port_data *data = &connector->hdcp.port_data;
1056         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1057         struct i915_hdcp_comp_master *comp;
1058         int ret;
1059
1060         mutex_lock(&dev_priv->hdcp_comp_mutex);
1061         comp = dev_priv->hdcp_master;
1062
1063         if (!comp || !comp->ops) {
1064                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
1065                 return -EINVAL;
1066         }
1067
1068         ret = comp->ops->get_session_key(comp->mei_dev, data, ske_data);
1069         if (ret < 0)
1070                 DRM_DEBUG_KMS("Get session key failed. %d\n", ret);
1071         mutex_unlock(&dev_priv->hdcp_comp_mutex);
1072
1073         return ret;
1074 }
1075
1076 static int
1077 hdcp2_verify_rep_topology_prepare_ack(struct intel_connector *connector,
1078                                       struct hdcp2_rep_send_receiverid_list
1079                                                                 *rep_topology,
1080                                       struct hdcp2_rep_send_ack *rep_send_ack)
1081 {
1082         struct hdcp_port_data *data = &connector->hdcp.port_data;
1083         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1084         struct i915_hdcp_comp_master *comp;
1085         int ret;
1086
1087         mutex_lock(&dev_priv->hdcp_comp_mutex);
1088         comp = dev_priv->hdcp_master;
1089
1090         if (!comp || !comp->ops) {
1091                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
1092                 return -EINVAL;
1093         }
1094
1095         ret = comp->ops->repeater_check_flow_prepare_ack(comp->mei_dev, data,
1096                                                          rep_topology,
1097                                                          rep_send_ack);
1098         if (ret < 0)
1099                 DRM_DEBUG_KMS("Verify rep topology failed. %d\n", ret);
1100         mutex_unlock(&dev_priv->hdcp_comp_mutex);
1101
1102         return ret;
1103 }
1104
1105 static int
1106 hdcp2_verify_mprime(struct intel_connector *connector,
1107                     struct hdcp2_rep_stream_ready *stream_ready)
1108 {
1109         struct hdcp_port_data *data = &connector->hdcp.port_data;
1110         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1111         struct i915_hdcp_comp_master *comp;
1112         int ret;
1113
1114         mutex_lock(&dev_priv->hdcp_comp_mutex);
1115         comp = dev_priv->hdcp_master;
1116
1117         if (!comp || !comp->ops) {
1118                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
1119                 return -EINVAL;
1120         }
1121
1122         ret = comp->ops->verify_mprime(comp->mei_dev, data, stream_ready);
1123         if (ret < 0)
1124                 DRM_DEBUG_KMS("Verify mprime failed. %d\n", ret);
1125         mutex_unlock(&dev_priv->hdcp_comp_mutex);
1126
1127         return ret;
1128 }
1129
1130 static int hdcp2_authenticate_port(struct intel_connector *connector)
1131 {
1132         struct hdcp_port_data *data = &connector->hdcp.port_data;
1133         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1134         struct i915_hdcp_comp_master *comp;
1135         int ret;
1136
1137         mutex_lock(&dev_priv->hdcp_comp_mutex);
1138         comp = dev_priv->hdcp_master;
1139
1140         if (!comp || !comp->ops) {
1141                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
1142                 return -EINVAL;
1143         }
1144
1145         ret = comp->ops->enable_hdcp_authentication(comp->mei_dev, data);
1146         if (ret < 0)
1147                 DRM_DEBUG_KMS("Enable hdcp auth failed. %d\n", ret);
1148         mutex_unlock(&dev_priv->hdcp_comp_mutex);
1149
1150         return ret;
1151 }
1152
1153 static int hdcp2_close_mei_session(struct intel_connector *connector)
1154 {
1155         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1156         struct i915_hdcp_comp_master *comp;
1157         int ret;
1158
1159         mutex_lock(&dev_priv->hdcp_comp_mutex);
1160         comp = dev_priv->hdcp_master;
1161
1162         if (!comp || !comp->ops) {
1163                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
1164                 return -EINVAL;
1165         }
1166
1167         ret = comp->ops->close_hdcp_session(comp->mei_dev,
1168                                              &connector->hdcp.port_data);
1169         mutex_unlock(&dev_priv->hdcp_comp_mutex);
1170
1171         return ret;
1172 }
1173
1174 static int hdcp2_deauthenticate_port(struct intel_connector *connector)
1175 {
1176         return hdcp2_close_mei_session(connector);
1177 }
1178
1179 /* Authentication flow starts from here */
1180 static int hdcp2_authentication_key_exchange(struct intel_connector *connector)
1181 {
1182         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
1183         struct intel_hdcp *hdcp = &connector->hdcp;
1184         struct drm_device *dev = connector->base.dev;
1185         union {
1186                 struct hdcp2_ake_init ake_init;
1187                 struct hdcp2_ake_send_cert send_cert;
1188                 struct hdcp2_ake_no_stored_km no_stored_km;
1189                 struct hdcp2_ake_send_hprime send_hprime;
1190                 struct hdcp2_ake_send_pairing_info pairing_info;
1191         } msgs;
1192         const struct intel_hdcp_shim *shim = hdcp->shim;
1193         size_t size;
1194         int ret;
1195
1196         /* Init for seq_num */
1197         hdcp->seq_num_v = 0;
1198         hdcp->seq_num_m = 0;
1199
1200         ret = hdcp2_prepare_ake_init(connector, &msgs.ake_init);
1201         if (ret < 0)
1202                 return ret;
1203
1204         ret = shim->write_2_2_msg(intel_dig_port, &msgs.ake_init,
1205                                   sizeof(msgs.ake_init));
1206         if (ret < 0)
1207                 return ret;
1208
1209         ret = shim->read_2_2_msg(intel_dig_port, HDCP_2_2_AKE_SEND_CERT,
1210                                  &msgs.send_cert, sizeof(msgs.send_cert));
1211         if (ret < 0)
1212                 return ret;
1213
1214         if (msgs.send_cert.rx_caps[0] != HDCP_2_2_RX_CAPS_VERSION_VAL) {
1215                 DRM_DEBUG_KMS("cert.rx_caps dont claim HDCP2.2\n");
1216                 return -EINVAL;
1217         }
1218
1219         hdcp->is_repeater = HDCP_2_2_RX_REPEATER(msgs.send_cert.rx_caps[2]);
1220
1221         if (drm_hdcp_check_ksvs_revoked(dev, msgs.send_cert.cert_rx.receiver_id,
1222                                         1)) {
1223                 DRM_ERROR("Receiver ID is revoked\n");
1224                 return -EPERM;
1225         }
1226
1227         /*
1228          * Here msgs.no_stored_km will hold msgs corresponding to the km
1229          * stored also.
1230          */
1231         ret = hdcp2_verify_rx_cert_prepare_km(connector, &msgs.send_cert,
1232                                               &hdcp->is_paired,
1233                                               &msgs.no_stored_km, &size);
1234         if (ret < 0)
1235                 return ret;
1236
1237         ret = shim->write_2_2_msg(intel_dig_port, &msgs.no_stored_km, size);
1238         if (ret < 0)
1239                 return ret;
1240
1241         ret = shim->read_2_2_msg(intel_dig_port, HDCP_2_2_AKE_SEND_HPRIME,
1242                                  &msgs.send_hprime, sizeof(msgs.send_hprime));
1243         if (ret < 0)
1244                 return ret;
1245
1246         ret = hdcp2_verify_hprime(connector, &msgs.send_hprime);
1247         if (ret < 0)
1248                 return ret;
1249
1250         if (!hdcp->is_paired) {
1251                 /* Pairing is required */
1252                 ret = shim->read_2_2_msg(intel_dig_port,
1253                                          HDCP_2_2_AKE_SEND_PAIRING_INFO,
1254                                          &msgs.pairing_info,
1255                                          sizeof(msgs.pairing_info));
1256                 if (ret < 0)
1257                         return ret;
1258
1259                 ret = hdcp2_store_pairing_info(connector, &msgs.pairing_info);
1260                 if (ret < 0)
1261                         return ret;
1262                 hdcp->is_paired = true;
1263         }
1264
1265         return 0;
1266 }
1267
1268 static int hdcp2_locality_check(struct intel_connector *connector)
1269 {
1270         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
1271         struct intel_hdcp *hdcp = &connector->hdcp;
1272         union {
1273                 struct hdcp2_lc_init lc_init;
1274                 struct hdcp2_lc_send_lprime send_lprime;
1275         } msgs;
1276         const struct intel_hdcp_shim *shim = hdcp->shim;
1277         int tries = HDCP2_LC_RETRY_CNT, ret, i;
1278
1279         for (i = 0; i < tries; i++) {
1280                 ret = hdcp2_prepare_lc_init(connector, &msgs.lc_init);
1281                 if (ret < 0)
1282                         continue;
1283
1284                 ret = shim->write_2_2_msg(intel_dig_port, &msgs.lc_init,
1285                                       sizeof(msgs.lc_init));
1286                 if (ret < 0)
1287                         continue;
1288
1289                 ret = shim->read_2_2_msg(intel_dig_port,
1290                                          HDCP_2_2_LC_SEND_LPRIME,
1291                                          &msgs.send_lprime,
1292                                          sizeof(msgs.send_lprime));
1293                 if (ret < 0)
1294                         continue;
1295
1296                 ret = hdcp2_verify_lprime(connector, &msgs.send_lprime);
1297                 if (!ret)
1298                         break;
1299         }
1300
1301         return ret;
1302 }
1303
1304 static int hdcp2_session_key_exchange(struct intel_connector *connector)
1305 {
1306         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
1307         struct intel_hdcp *hdcp = &connector->hdcp;
1308         struct hdcp2_ske_send_eks send_eks;
1309         int ret;
1310
1311         ret = hdcp2_prepare_skey(connector, &send_eks);
1312         if (ret < 0)
1313                 return ret;
1314
1315         ret = hdcp->shim->write_2_2_msg(intel_dig_port, &send_eks,
1316                                         sizeof(send_eks));
1317         if (ret < 0)
1318                 return ret;
1319
1320         return 0;
1321 }
1322
1323 static
1324 int hdcp2_propagate_stream_management_info(struct intel_connector *connector)
1325 {
1326         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
1327         struct intel_hdcp *hdcp = &connector->hdcp;
1328         union {
1329                 struct hdcp2_rep_stream_manage stream_manage;
1330                 struct hdcp2_rep_stream_ready stream_ready;
1331         } msgs;
1332         const struct intel_hdcp_shim *shim = hdcp->shim;
1333         int ret;
1334
1335         /* Prepare RepeaterAuth_Stream_Manage msg */
1336         msgs.stream_manage.msg_id = HDCP_2_2_REP_STREAM_MANAGE;
1337         drm_hdcp_cpu_to_be24(msgs.stream_manage.seq_num_m, hdcp->seq_num_m);
1338
1339         /* K no of streams is fixed as 1. Stored as big-endian. */
1340         msgs.stream_manage.k = cpu_to_be16(1);
1341
1342         /* For HDMI this is forced to be 0x0. For DP SST also this is 0x0. */
1343         msgs.stream_manage.streams[0].stream_id = 0;
1344         msgs.stream_manage.streams[0].stream_type = hdcp->content_type;
1345
1346         /* Send it to Repeater */
1347         ret = shim->write_2_2_msg(intel_dig_port, &msgs.stream_manage,
1348                                   sizeof(msgs.stream_manage));
1349         if (ret < 0)
1350                 return ret;
1351
1352         ret = shim->read_2_2_msg(intel_dig_port, HDCP_2_2_REP_STREAM_READY,
1353                                  &msgs.stream_ready, sizeof(msgs.stream_ready));
1354         if (ret < 0)
1355                 return ret;
1356
1357         hdcp->port_data.seq_num_m = hdcp->seq_num_m;
1358         hdcp->port_data.streams[0].stream_type = hdcp->content_type;
1359
1360         ret = hdcp2_verify_mprime(connector, &msgs.stream_ready);
1361         if (ret < 0)
1362                 return ret;
1363
1364         hdcp->seq_num_m++;
1365
1366         if (hdcp->seq_num_m > HDCP_2_2_SEQ_NUM_MAX) {
1367                 DRM_DEBUG_KMS("seq_num_m roll over.\n");
1368                 return -1;
1369         }
1370
1371         return 0;
1372 }
1373
1374 static
1375 int hdcp2_authenticate_repeater_topology(struct intel_connector *connector)
1376 {
1377         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
1378         struct intel_hdcp *hdcp = &connector->hdcp;
1379         struct drm_device *dev = connector->base.dev;
1380         union {
1381                 struct hdcp2_rep_send_receiverid_list recvid_list;
1382                 struct hdcp2_rep_send_ack rep_ack;
1383         } msgs;
1384         const struct intel_hdcp_shim *shim = hdcp->shim;
1385         u32 seq_num_v, device_cnt;
1386         u8 *rx_info;
1387         int ret;
1388
1389         ret = shim->read_2_2_msg(intel_dig_port, HDCP_2_2_REP_SEND_RECVID_LIST,
1390                                  &msgs.recvid_list, sizeof(msgs.recvid_list));
1391         if (ret < 0)
1392                 return ret;
1393
1394         rx_info = msgs.recvid_list.rx_info;
1395
1396         if (HDCP_2_2_MAX_CASCADE_EXCEEDED(rx_info[1]) ||
1397             HDCP_2_2_MAX_DEVS_EXCEEDED(rx_info[1])) {
1398                 DRM_DEBUG_KMS("Topology Max Size Exceeded\n");
1399                 return -EINVAL;
1400         }
1401
1402         /* Converting and Storing the seq_num_v to local variable as DWORD */
1403         seq_num_v =
1404                 drm_hdcp_be24_to_cpu((const u8 *)msgs.recvid_list.seq_num_v);
1405
1406         if (seq_num_v < hdcp->seq_num_v) {
1407                 /* Roll over of the seq_num_v from repeater. Reauthenticate. */
1408                 DRM_DEBUG_KMS("Seq_num_v roll over.\n");
1409                 return -EINVAL;
1410         }
1411
1412         device_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 |
1413                       HDCP_2_2_DEV_COUNT_LO(rx_info[1]));
1414         if (drm_hdcp_check_ksvs_revoked(dev, msgs.recvid_list.receiver_ids,
1415                                         device_cnt)) {
1416                 DRM_ERROR("Revoked receiver ID(s) is in list\n");
1417                 return -EPERM;
1418         }
1419
1420         ret = hdcp2_verify_rep_topology_prepare_ack(connector,
1421                                                     &msgs.recvid_list,
1422                                                     &msgs.rep_ack);
1423         if (ret < 0)
1424                 return ret;
1425
1426         hdcp->seq_num_v = seq_num_v;
1427         ret = shim->write_2_2_msg(intel_dig_port, &msgs.rep_ack,
1428                                   sizeof(msgs.rep_ack));
1429         if (ret < 0)
1430                 return ret;
1431
1432         return 0;
1433 }
1434
1435 static int hdcp2_authenticate_repeater(struct intel_connector *connector)
1436 {
1437         int ret;
1438
1439         ret = hdcp2_authenticate_repeater_topology(connector);
1440         if (ret < 0)
1441                 return ret;
1442
1443         return hdcp2_propagate_stream_management_info(connector);
1444 }
1445
1446 static int hdcp2_authenticate_sink(struct intel_connector *connector)
1447 {
1448         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
1449         struct intel_hdcp *hdcp = &connector->hdcp;
1450         const struct intel_hdcp_shim *shim = hdcp->shim;
1451         int ret;
1452
1453         ret = hdcp2_authentication_key_exchange(connector);
1454         if (ret < 0) {
1455                 DRM_DEBUG_KMS("AKE Failed. Err : %d\n", ret);
1456                 return ret;
1457         }
1458
1459         ret = hdcp2_locality_check(connector);
1460         if (ret < 0) {
1461                 DRM_DEBUG_KMS("Locality Check failed. Err : %d\n", ret);
1462                 return ret;
1463         }
1464
1465         ret = hdcp2_session_key_exchange(connector);
1466         if (ret < 0) {
1467                 DRM_DEBUG_KMS("SKE Failed. Err : %d\n", ret);
1468                 return ret;
1469         }
1470
1471         if (shim->config_stream_type) {
1472                 ret = shim->config_stream_type(intel_dig_port,
1473                                                hdcp->is_repeater,
1474                                                hdcp->content_type);
1475                 if (ret < 0)
1476                         return ret;
1477         }
1478
1479         if (hdcp->is_repeater) {
1480                 ret = hdcp2_authenticate_repeater(connector);
1481                 if (ret < 0) {
1482                         DRM_DEBUG_KMS("Repeater Auth Failed. Err: %d\n", ret);
1483                         return ret;
1484                 }
1485         }
1486
1487         hdcp->port_data.streams[0].stream_type = hdcp->content_type;
1488         ret = hdcp2_authenticate_port(connector);
1489         if (ret < 0)
1490                 return ret;
1491
1492         return ret;
1493 }
1494
1495 static int hdcp2_enable_encryption(struct intel_connector *connector)
1496 {
1497         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
1498         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1499         struct intel_hdcp *hdcp = &connector->hdcp;
1500         enum port port = connector->encoder->port;
1501         int ret;
1502
1503         WARN_ON(I915_READ(HDCP2_STATUS_DDI(port)) & LINK_ENCRYPTION_STATUS);
1504
1505         if (hdcp->shim->toggle_signalling) {
1506                 ret = hdcp->shim->toggle_signalling(intel_dig_port, true);
1507                 if (ret) {
1508                         DRM_ERROR("Failed to enable HDCP signalling. %d\n",
1509                                   ret);
1510                         return ret;
1511                 }
1512         }
1513
1514         if (I915_READ(HDCP2_STATUS_DDI(port)) & LINK_AUTH_STATUS) {
1515                 /* Link is Authenticated. Now set for Encryption */
1516                 I915_WRITE(HDCP2_CTL_DDI(port),
1517                            I915_READ(HDCP2_CTL_DDI(port)) |
1518                            CTL_LINK_ENCRYPTION_REQ);
1519         }
1520
1521         ret = intel_wait_for_register(&dev_priv->uncore, HDCP2_STATUS_DDI(port),
1522                                       LINK_ENCRYPTION_STATUS,
1523                                       LINK_ENCRYPTION_STATUS,
1524                                       ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
1525
1526         return ret;
1527 }
1528
1529 static int hdcp2_disable_encryption(struct intel_connector *connector)
1530 {
1531         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
1532         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1533         struct intel_hdcp *hdcp = &connector->hdcp;
1534         enum port port = connector->encoder->port;
1535         int ret;
1536
1537         WARN_ON(!(I915_READ(HDCP2_STATUS_DDI(port)) & LINK_ENCRYPTION_STATUS));
1538
1539         I915_WRITE(HDCP2_CTL_DDI(port),
1540                    I915_READ(HDCP2_CTL_DDI(port)) & ~CTL_LINK_ENCRYPTION_REQ);
1541
1542         ret = intel_wait_for_register(&dev_priv->uncore, HDCP2_STATUS_DDI(port),
1543                                       LINK_ENCRYPTION_STATUS, 0x0,
1544                                       ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
1545         if (ret == -ETIMEDOUT)
1546                 DRM_DEBUG_KMS("Disable Encryption Timedout");
1547
1548         if (hdcp->shim->toggle_signalling) {
1549                 ret = hdcp->shim->toggle_signalling(intel_dig_port, false);
1550                 if (ret) {
1551                         DRM_ERROR("Failed to disable HDCP signalling. %d\n",
1552                                   ret);
1553                         return ret;
1554                 }
1555         }
1556
1557         return ret;
1558 }
1559
1560 static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
1561 {
1562         int ret, i, tries = 3;
1563
1564         for (i = 0; i < tries; i++) {
1565                 ret = hdcp2_authenticate_sink(connector);
1566                 if (!ret)
1567                         break;
1568
1569                 /* Clearing the mei hdcp session */
1570                 DRM_DEBUG_KMS("HDCP2.2 Auth %d of %d Failed.(%d)\n",
1571                               i + 1, tries, ret);
1572                 if (hdcp2_deauthenticate_port(connector) < 0)
1573                         DRM_DEBUG_KMS("Port deauth failed.\n");
1574         }
1575
1576         if (i != tries) {
1577                 /*
1578                  * Ensuring the required 200mSec min time interval between
1579                  * Session Key Exchange and encryption.
1580                  */
1581                 msleep(HDCP_2_2_DELAY_BEFORE_ENCRYPTION_EN);
1582                 ret = hdcp2_enable_encryption(connector);
1583                 if (ret < 0) {
1584                         DRM_DEBUG_KMS("Encryption Enable Failed.(%d)\n", ret);
1585                         if (hdcp2_deauthenticate_port(connector) < 0)
1586                                 DRM_DEBUG_KMS("Port deauth failed.\n");
1587                 }
1588         }
1589
1590         return ret;
1591 }
1592
1593 static int _intel_hdcp2_enable(struct intel_connector *connector)
1594 {
1595         struct intel_hdcp *hdcp = &connector->hdcp;
1596         int ret;
1597
1598         DRM_DEBUG_KMS("[%s:%d] HDCP2.2 is being enabled. Type: %d\n",
1599                       connector->base.name, connector->base.base.id,
1600                       hdcp->content_type);
1601
1602         ret = hdcp2_authenticate_and_encrypt(connector);
1603         if (ret) {
1604                 DRM_DEBUG_KMS("HDCP2 Type%d  Enabling Failed. (%d)\n",
1605                               hdcp->content_type, ret);
1606                 return ret;
1607         }
1608
1609         DRM_DEBUG_KMS("[%s:%d] HDCP2.2 is enabled. Type %d\n",
1610                       connector->base.name, connector->base.base.id,
1611                       hdcp->content_type);
1612
1613         hdcp->hdcp2_encrypted = true;
1614         return 0;
1615 }
1616
1617 static int _intel_hdcp2_disable(struct intel_connector *connector)
1618 {
1619         int ret;
1620
1621         DRM_DEBUG_KMS("[%s:%d] HDCP2.2 is being Disabled\n",
1622                       connector->base.name, connector->base.base.id);
1623
1624         ret = hdcp2_disable_encryption(connector);
1625
1626         if (hdcp2_deauthenticate_port(connector) < 0)
1627                 DRM_DEBUG_KMS("Port deauth failed.\n");
1628
1629         connector->hdcp.hdcp2_encrypted = false;
1630
1631         return ret;
1632 }
1633
1634 /* Implements the Link Integrity Check for HDCP2.2 */
1635 static int intel_hdcp2_check_link(struct intel_connector *connector)
1636 {
1637         struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
1638         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1639         struct intel_hdcp *hdcp = &connector->hdcp;
1640         enum port port = connector->encoder->port;
1641         int ret = 0;
1642
1643         mutex_lock(&hdcp->mutex);
1644
1645         /* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
1646         if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
1647             !hdcp->hdcp2_encrypted) {
1648                 ret = -EINVAL;
1649                 goto out;
1650         }
1651
1652         if (WARN_ON(!intel_hdcp2_in_use(connector))) {
1653                 DRM_ERROR("HDCP2.2 link stopped the encryption, %x\n",
1654                           I915_READ(HDCP2_STATUS_DDI(port)));
1655                 ret = -ENXIO;
1656                 hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
1657                 schedule_work(&hdcp->prop_work);
1658                 goto out;
1659         }
1660
1661         ret = hdcp->shim->check_2_2_link(intel_dig_port);
1662         if (ret == HDCP_LINK_PROTECTED) {
1663                 if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
1664                         hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
1665                         schedule_work(&hdcp->prop_work);
1666                 }
1667                 goto out;
1668         }
1669
1670         if (ret == HDCP_TOPOLOGY_CHANGE) {
1671                 if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
1672                         goto out;
1673
1674                 DRM_DEBUG_KMS("HDCP2.2 Downstream topology change\n");
1675                 ret = hdcp2_authenticate_repeater_topology(connector);
1676                 if (!ret) {
1677                         hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
1678                         schedule_work(&hdcp->prop_work);
1679                         goto out;
1680                 }
1681                 DRM_DEBUG_KMS("[%s:%d] Repeater topology auth failed.(%d)\n",
1682                               connector->base.name, connector->base.base.id,
1683                               ret);
1684         } else {
1685                 DRM_DEBUG_KMS("[%s:%d] HDCP2.2 link failed, retrying auth\n",
1686                               connector->base.name, connector->base.base.id);
1687         }
1688
1689         ret = _intel_hdcp2_disable(connector);
1690         if (ret) {
1691                 DRM_ERROR("[%s:%d] Failed to disable hdcp2.2 (%d)\n",
1692                           connector->base.name, connector->base.base.id, ret);
1693                 hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
1694                 schedule_work(&hdcp->prop_work);
1695                 goto out;
1696         }
1697
1698         ret = _intel_hdcp2_enable(connector);
1699         if (ret) {
1700                 DRM_DEBUG_KMS("[%s:%d] Failed to enable hdcp2.2 (%d)\n",
1701                               connector->base.name, connector->base.base.id,
1702                               ret);
1703                 hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
1704                 schedule_work(&hdcp->prop_work);
1705                 goto out;
1706         }
1707
1708 out:
1709         mutex_unlock(&hdcp->mutex);
1710         return ret;
1711 }
1712
1713 static void intel_hdcp_check_work(struct work_struct *work)
1714 {
1715         struct intel_hdcp *hdcp = container_of(to_delayed_work(work),
1716                                                struct intel_hdcp,
1717                                                check_work);
1718         struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
1719
1720         if (!intel_hdcp2_check_link(connector))
1721                 schedule_delayed_work(&hdcp->check_work,
1722                                       DRM_HDCP2_CHECK_PERIOD_MS);
1723         else if (!intel_hdcp_check_link(connector))
1724                 schedule_delayed_work(&hdcp->check_work,
1725                                       DRM_HDCP_CHECK_PERIOD_MS);
1726 }
1727
1728 static int i915_hdcp_component_bind(struct device *i915_kdev,
1729                                     struct device *mei_kdev, void *data)
1730 {
1731         struct drm_i915_private *dev_priv = kdev_to_i915(i915_kdev);
1732
1733         DRM_DEBUG("I915 HDCP comp bind\n");
1734         mutex_lock(&dev_priv->hdcp_comp_mutex);
1735         dev_priv->hdcp_master = (struct i915_hdcp_comp_master *)data;
1736         dev_priv->hdcp_master->mei_dev = mei_kdev;
1737         mutex_unlock(&dev_priv->hdcp_comp_mutex);
1738
1739         return 0;
1740 }
1741
1742 static void i915_hdcp_component_unbind(struct device *i915_kdev,
1743                                        struct device *mei_kdev, void *data)
1744 {
1745         struct drm_i915_private *dev_priv = kdev_to_i915(i915_kdev);
1746
1747         DRM_DEBUG("I915 HDCP comp unbind\n");
1748         mutex_lock(&dev_priv->hdcp_comp_mutex);
1749         dev_priv->hdcp_master = NULL;
1750         mutex_unlock(&dev_priv->hdcp_comp_mutex);
1751 }
1752
1753 static const struct component_ops i915_hdcp_component_ops = {
1754         .bind   = i915_hdcp_component_bind,
1755         .unbind = i915_hdcp_component_unbind,
1756 };
1757
1758 static inline int initialize_hdcp_port_data(struct intel_connector *connector)
1759 {
1760         struct intel_hdcp *hdcp = &connector->hdcp;
1761         struct hdcp_port_data *data = &hdcp->port_data;
1762
1763         data->port = connector->encoder->port;
1764         data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
1765         data->protocol = (u8)hdcp->shim->protocol;
1766
1767         data->k = 1;
1768         if (!data->streams)
1769                 data->streams = kcalloc(data->k,
1770                                         sizeof(struct hdcp2_streamid_type),
1771                                         GFP_KERNEL);
1772         if (!data->streams) {
1773                 DRM_ERROR("Out of Memory\n");
1774                 return -ENOMEM;
1775         }
1776
1777         data->streams[0].stream_id = 0;
1778         data->streams[0].stream_type = hdcp->content_type;
1779
1780         return 0;
1781 }
1782
1783 static bool is_hdcp2_supported(struct drm_i915_private *dev_priv)
1784 {
1785         if (!IS_ENABLED(CONFIG_INTEL_MEI_HDCP))
1786                 return false;
1787
1788         return (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv) ||
1789                 IS_KABYLAKE(dev_priv));
1790 }
1791
1792 void intel_hdcp_component_init(struct drm_i915_private *dev_priv)
1793 {
1794         int ret;
1795
1796         if (!is_hdcp2_supported(dev_priv))
1797                 return;
1798
1799         mutex_lock(&dev_priv->hdcp_comp_mutex);
1800         WARN_ON(dev_priv->hdcp_comp_added);
1801
1802         dev_priv->hdcp_comp_added = true;
1803         mutex_unlock(&dev_priv->hdcp_comp_mutex);
1804         ret = component_add_typed(dev_priv->drm.dev, &i915_hdcp_component_ops,
1805                                   I915_COMPONENT_HDCP);
1806         if (ret < 0) {
1807                 DRM_DEBUG_KMS("Failed at component add(%d)\n", ret);
1808                 mutex_lock(&dev_priv->hdcp_comp_mutex);
1809                 dev_priv->hdcp_comp_added = false;
1810                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
1811                 return;
1812         }
1813 }
1814
1815 static void intel_hdcp2_init(struct intel_connector *connector)
1816 {
1817         struct intel_hdcp *hdcp = &connector->hdcp;
1818         int ret;
1819
1820         ret = initialize_hdcp_port_data(connector);
1821         if (ret) {
1822                 DRM_DEBUG_KMS("Mei hdcp data init failed\n");
1823                 return;
1824         }
1825
1826         hdcp->hdcp2_supported = true;
1827 }
1828
1829 int intel_hdcp_init(struct intel_connector *connector,
1830                     const struct intel_hdcp_shim *shim)
1831 {
1832         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1833         struct intel_hdcp *hdcp = &connector->hdcp;
1834         int ret;
1835
1836         if (!shim)
1837                 return -EINVAL;
1838
1839         ret = drm_connector_attach_content_protection_property(&connector->base);
1840         if (ret)
1841                 return ret;
1842
1843         hdcp->shim = shim;
1844         mutex_init(&hdcp->mutex);
1845         INIT_DELAYED_WORK(&hdcp->check_work, intel_hdcp_check_work);
1846         INIT_WORK(&hdcp->prop_work, intel_hdcp_prop_work);
1847
1848         if (is_hdcp2_supported(dev_priv))
1849                 intel_hdcp2_init(connector);
1850         init_waitqueue_head(&hdcp->cp_irq_queue);
1851
1852         return 0;
1853 }
1854
1855 int intel_hdcp_enable(struct intel_connector *connector)
1856 {
1857         struct intel_hdcp *hdcp = &connector->hdcp;
1858         unsigned long check_link_interval = DRM_HDCP_CHECK_PERIOD_MS;
1859         int ret = -EINVAL;
1860
1861         if (!hdcp->shim)
1862                 return -ENOENT;
1863
1864         mutex_lock(&hdcp->mutex);
1865         WARN_ON(hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);
1866
1867         /*
1868          * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
1869          * is capable of HDCP2.2, it is preferred to use HDCP2.2.
1870          */
1871         if (intel_hdcp2_capable(connector)) {
1872                 ret = _intel_hdcp2_enable(connector);
1873                 if (!ret)
1874                         check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
1875         }
1876
1877         /* When HDCP2.2 fails, HDCP1.4 will be attempted */
1878         if (ret && intel_hdcp_capable(connector)) {
1879                 ret = _intel_hdcp_enable(connector);
1880         }
1881
1882         if (!ret) {
1883                 schedule_delayed_work(&hdcp->check_work, check_link_interval);
1884                 hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
1885                 schedule_work(&hdcp->prop_work);
1886         }
1887
1888         mutex_unlock(&hdcp->mutex);
1889         return ret;
1890 }
1891
1892 int intel_hdcp_disable(struct intel_connector *connector)
1893 {
1894         struct intel_hdcp *hdcp = &connector->hdcp;
1895         int ret = 0;
1896
1897         if (!hdcp->shim)
1898                 return -ENOENT;
1899
1900         mutex_lock(&hdcp->mutex);
1901
1902         if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
1903                 hdcp->value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED;
1904                 if (hdcp->hdcp2_encrypted)
1905                         ret = _intel_hdcp2_disable(connector);
1906                 else if (hdcp->hdcp_encrypted)
1907                         ret = _intel_hdcp_disable(connector);
1908         }
1909
1910         mutex_unlock(&hdcp->mutex);
1911         cancel_delayed_work_sync(&hdcp->check_work);
1912         return ret;
1913 }
1914
1915 void intel_hdcp_component_fini(struct drm_i915_private *dev_priv)
1916 {
1917         mutex_lock(&dev_priv->hdcp_comp_mutex);
1918         if (!dev_priv->hdcp_comp_added) {
1919                 mutex_unlock(&dev_priv->hdcp_comp_mutex);
1920                 return;
1921         }
1922
1923         dev_priv->hdcp_comp_added = false;
1924         mutex_unlock(&dev_priv->hdcp_comp_mutex);
1925
1926         component_del(dev_priv->drm.dev, &i915_hdcp_component_ops);
1927 }
1928
1929 void intel_hdcp_cleanup(struct intel_connector *connector)
1930 {
1931         if (!connector->hdcp.shim)
1932                 return;
1933
1934         mutex_lock(&connector->hdcp.mutex);
1935         kfree(connector->hdcp.port_data.streams);
1936         mutex_unlock(&connector->hdcp.mutex);
1937 }
1938
1939 void intel_hdcp_atomic_check(struct drm_connector *connector,
1940                              struct drm_connector_state *old_state,
1941                              struct drm_connector_state *new_state)
1942 {
1943         u64 old_cp = old_state->content_protection;
1944         u64 new_cp = new_state->content_protection;
1945         struct drm_crtc_state *crtc_state;
1946
1947         if (!new_state->crtc) {
1948                 /*
1949                  * If the connector is being disabled with CP enabled, mark it
1950                  * desired so it's re-enabled when the connector is brought back
1951                  */
1952                 if (old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED)
1953                         new_state->content_protection =
1954                                 DRM_MODE_CONTENT_PROTECTION_DESIRED;
1955                 return;
1956         }
1957
1958         /*
1959          * Nothing to do if the state didn't change, or HDCP was activated since
1960          * the last commit
1961          */
1962         if (old_cp == new_cp ||
1963             (old_cp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
1964              new_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED))
1965                 return;
1966
1967         crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
1968                                                    new_state->crtc);
1969         crtc_state->mode_changed = true;
1970 }
1971
1972 /* Handles the CP_IRQ raised from the DP HDCP sink */
1973 void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
1974 {
1975         struct intel_hdcp *hdcp = &connector->hdcp;
1976
1977         if (!hdcp->shim)
1978                 return;
1979
1980         atomic_inc(&connector->hdcp.cp_irq_count);
1981         wake_up_all(&connector->hdcp.cp_irq_queue);
1982
1983         schedule_delayed_work(&hdcp->check_work, 0);
1984 }