drivers/gpu/drm/i915/gem/i915_gem_context.c

   1 /*
   2  * SPDX-License-Identifier: MIT
   3  *
   4  * Copyright © 2011-2012 Intel Corporation
   5  */
   6
   7 /*
   8  * This file implements HW context support. On gen5+ a HW context consists of an
   9  * opaque GPU object which is referenced at times of context saves and restores.
  10  * With RC6 enabled, the context is also referenced as the GPU enters and exists
  11  * from RC6 (GPU has it's own internal power context, except on gen5). Though
  12  * something like a context does exist for the media ring, the code only
  13  * supports contexts for the render ring.
  14  *
  15  * In software, there is a distinction between contexts created by the user,
  16  * and the default HW context. The default HW context is used by GPU clients
  17  * that do not request setup of their own hardware context. The default
  18  * context's state is never restored to help prevent programming errors. This
  19  * would happen if a client ran and piggy-backed off another clients GPU state.
  20  * The default context only exists to give the GPU some offset to load as the
  21  * current to invoke a save of the context we actually care about. In fact, the
  22  * code could likely be constructed, albeit in a more complicated fashion, to
  23  * never use the default context, though that limits the driver's ability to
  24  * swap out, and/or destroy other contexts.
  25  *
  26  * All other contexts are created as a request by the GPU client. These contexts
  27  * store GPU state, and thus allow GPU clients to not re-emit state (and
  28  * potentially query certain state) at any time. The kernel driver makes
  29  * certain that the appropriate commands are inserted.
  30  *
  31  * The context life cycle is semi-complicated in that context BOs may live
  32  * longer than the context itself because of the way the hardware, and object
  33  * tracking works. Below is a very crude representation of the state machine
  34  * describing the context life.
  35  *                                         refcount     pincount     active
  36  * S0: initial state                          0            0           0
  37  * S1: context created                        1            0           0
  38  * S2: context is currently running           2            1           X
  39  * S3: GPU referenced, but not current        2            0           1
  40  * S4: context is current, but destroyed      1            1           0
  41  * S5: like S3, but destroyed                 1            0           1
  42  *
  43  * The most common (but not all) transitions:
  44  * S0->S1: client creates a context
  45  * S1->S2: client submits execbuf with context
  46  * S2->S3: other clients submits execbuf with context
  47  * S3->S1: context object was retired
  48  * S3->S2: clients submits another execbuf
  49  * S2->S4: context destroy called with current context
  50  * S3->S5->S0: destroy path
  51  * S4->S5->S0: destroy path on current context
  52  *
  53  * There are two confusing terms used above:
  54  *  The "current context" means the context which is currently running on the
  55  *  GPU. The GPU has loaded its state already and has stored away the gtt
  56  *  offset of the BO. The GPU is not actively referencing the data at this
  57  *  offset, but it will on the next context switch. The only way to avoid this
  58  *  is to do a GPU reset.
  59  *
  60  *  An "active context' is one which was previously the "current context" and is
  61  *  on the active list waiting for the next context switch to occur. Until this
  62  *  happens, the object must remain at the same gtt offset. It is therefore
  63  *  possible to destroy a context, but it is still active.
  64  *
  65  */
  66
  67 #include <linux/log2.h>
  68 #include <linux/nospec.h>
  69
  70 #include <drm/i915_drm.h>
  71
  72 #include "gt/intel_lrc_reg.h"
  73
  74 #include "i915_gem_context.h"
  75 #include "i915_globals.h"
  76 #include "i915_trace.h"
  77 #include "i915_user_extensions.h"
  78
  79 #define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1
  80
  81 static struct i915_global_gem_context {
  82         struct i915_global base;
  83         struct kmem_cache *slab_luts;
  84 } global;
  85
  86 struct i915_lut_handle *i915_lut_handle_alloc(void)
  87 {
  88         return kmem_cache_alloc(global.slab_luts, GFP_KERNEL);
  89 }
  90
  91 void i915_lut_handle_free(struct i915_lut_handle *lut)
  92 {
  93         return kmem_cache_free(global.slab_luts, lut);
  94 }
  95
  96 static void lut_close(struct i915_gem_context *ctx)
  97 {
  98         struct radix_tree_iter iter;
  99         void __rcu **slot;
 100
 101         lockdep_assert_held(&ctx->mutex);
 102
 103         rcu_read_lock();
 104         radix_tree_for_each_slot(slot, &ctx->handles_vma, &iter, 0) {
 105                 struct i915_vma *vma = rcu_dereference_raw(*slot);
 106                 struct drm_i915_gem_object *obj = vma->obj;
 107                 struct i915_lut_handle *lut;
 108
 109                 if (!kref_get_unless_zero(&obj->base.refcount))
 110                         continue;
 111
 112                 rcu_read_unlock();
 113                 i915_gem_object_lock(obj);
 114                 list_for_each_entry(lut, &obj->lut_list, obj_link) {
 115                         if (lut->ctx != ctx)
 116                                 continue;
 117
 118                         if (lut->handle != iter.index)
 119                                 continue;
 120
 121                         list_del(&lut->obj_link);
 122                         break;
 123                 }
 124                 i915_gem_object_unlock(obj);
 125                 rcu_read_lock();
 126
 127                 if (&lut->obj_link != &obj->lut_list) {
 128                         i915_lut_handle_free(lut);
 129                         radix_tree_iter_delete(&ctx->handles_vma, &iter, slot);
 130                         if (atomic_dec_and_test(&vma->open_count) &&
 131                             !i915_vma_is_ggtt(vma))
 132                                 i915_vma_close(vma);
 133                         i915_gem_object_put(obj);
 134                 }
 135
 136                 i915_gem_object_put(obj);
 137         }
 138         rcu_read_unlock();
 139 }
 140
 141 static struct intel_context *
 142 lookup_user_engine(struct i915_gem_context *ctx,
 143                    unsigned long flags,
 144                    const struct i915_engine_class_instance *ci)
 145 #define LOOKUP_USER_INDEX BIT(0)
 146 {
 147         int idx;
 148
 149         if (!!(flags & LOOKUP_USER_INDEX) != i915_gem_context_user_engines(ctx))
 150                 return ERR_PTR(-EINVAL);
 151
 152         if (!i915_gem_context_user_engines(ctx)) {
 153                 struct intel_engine_cs *engine;
 154
 155                 engine = intel_engine_lookup_user(ctx->i915,
 156                                                   ci->engine_class,
 157                                                   ci->engine_instance);
 158                 if (!engine)
 159                         return ERR_PTR(-EINVAL);
 160
 161                 idx = engine->id;
 162         } else {
 163                 idx = ci->engine_instance;
 164         }
 165
 166         return i915_gem_context_get_engine(ctx, idx);
 167 }
 168
 169 static inline int new_hw_id(struct drm_i915_private *i915, gfp_t gfp)
 170 {
 171         unsigned int max;
 172
 173         lockdep_assert_held(&i915->contexts.mutex);
 174
 175         if (INTEL_GEN(i915) >= 11)
 176                 max = GEN11_MAX_CONTEXT_HW_ID;
 177         else if (USES_GUC_SUBMISSION(i915))
 178                 /*
 179                  * When using GuC in proxy submission, GuC consumes the
 180                  * highest bit in the context id to indicate proxy submission.
 181                  */
 182                 max = MAX_GUC_CONTEXT_HW_ID;
 183         else
 184                 max = MAX_CONTEXT_HW_ID;
 185
 186         return ida_simple_get(&i915->contexts.hw_ida, 0, max, gfp);
 187 }
 188
 189 static int steal_hw_id(struct drm_i915_private *i915)
 190 {
 191         struct i915_gem_context *ctx, *cn;
 192         LIST_HEAD(pinned);
 193         int id = -ENOSPC;
 194
 195         lockdep_assert_held(&i915->contexts.mutex);
 196
 197         list_for_each_entry_safe(ctx, cn,
 198                                  &i915->contexts.hw_id_list, hw_id_link) {
 199                 if (atomic_read(&ctx->hw_id_pin_count)) {
 200                         list_move_tail(&ctx->hw_id_link, &pinned);
 201                         continue;
 202                 }
 203
 204                 GEM_BUG_ON(!ctx->hw_id); /* perma-pinned kernel context */
 205                 list_del_init(&ctx->hw_id_link);
 206                 id = ctx->hw_id;
 207                 break;
 208         }
 209
 210         /*
 211          * Remember how far we got up on the last repossesion scan, so the
 212          * list is kept in a "least recently scanned" order.
 213          */
 214         list_splice_tail(&pinned, &i915->contexts.hw_id_list);
 215         return id;
 216 }
 217
 218 static int assign_hw_id(struct drm_i915_private *i915, unsigned int *out)
 219 {
 220         int ret;
 221
 222         lockdep_assert_held(&i915->contexts.mutex);
 223
 224         /*
 225          * We prefer to steal/stall ourselves and our users over that of the
 226          * entire system. That may be a little unfair to our users, and
 227          * even hurt high priority clients. The choice is whether to oomkill
 228          * something else, or steal a context id.
 229          */
 230         ret = new_hw_id(i915, GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN);
 231         if (unlikely(ret < 0)) {
 232                 ret = steal_hw_id(i915);
 233                 if (ret < 0) /* once again for the correct errno code */
 234                         ret = new_hw_id(i915, GFP_KERNEL);
 235                 if (ret < 0)
 236                         return ret;
 237         }
 238
 239         *out = ret;
 240         return 0;
 241 }
 242
 243 static void release_hw_id(struct i915_gem_context *ctx)
 244 {
 245         struct drm_i915_private *i915 = ctx->i915;
 246
 247         if (list_empty(&ctx->hw_id_link))
 248                 return;
 249
 250         mutex_lock(&i915->contexts.mutex);
 251         if (!list_empty(&ctx->hw_id_link)) {
 252                 ida_simple_remove(&i915->contexts.hw_ida, ctx->hw_id);
 253                 list_del_init(&ctx->hw_id_link);
 254         }
 255         mutex_unlock(&i915->contexts.mutex);
 256 }
 257
 258 static void __free_engines(struct i915_gem_engines *e, unsigned int count)
 259 {
 260         while (count--) {
 261                 if (!e->engines[count])
 262                         continue;
 263
 264                 intel_context_put(e->engines[count]);
 265         }
 266         kfree(e);
 267 }
 268
 269 static void free_engines(struct i915_gem_engines *e)
 270 {
 271         __free_engines(e, e->num_engines);
 272 }
 273
 274 static void free_engines_rcu(struct rcu_head *rcu)
 275 {
 276         free_engines(container_of(rcu, struct i915_gem_engines, rcu));
 277 }
 278
 279 static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx)
 280 {
 281         struct intel_engine_cs *engine;
 282         struct i915_gem_engines *e;
 283         enum intel_engine_id id;
 284
 285         e = kzalloc(struct_size(e, engines, I915_NUM_ENGINES), GFP_KERNEL);
 286         if (!e)
 287                 return ERR_PTR(-ENOMEM);
 288
 289         init_rcu_head(&e->rcu);
 290         for_each_engine(engine, ctx->i915, id) {
 291                 struct intel_context *ce;
 292
 293                 ce = intel_context_create(ctx, engine);
 294                 if (IS_ERR(ce)) {
 295                         __free_engines(e, id);
 296                         return ERR_CAST(ce);
 297                 }
 298
 299                 e->engines[id] = ce;
 300         }
 301         e->num_engines = id;
 302
 303         return e;
 304 }
 305
 306 static void i915_gem_context_free(struct i915_gem_context *ctx)
 307 {
 308         lockdep_assert_held(&ctx->i915->drm.struct_mutex);
 309         GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
 310
 311         release_hw_id(ctx);
 312         i915_ppgtt_put(ctx->ppgtt);
 313
 314         free_engines(rcu_access_pointer(ctx->engines));
 315         mutex_destroy(&ctx->engines_mutex);
 316
 317         if (ctx->timeline)
 318                 i915_timeline_put(ctx->timeline);
 319
 320         kfree(ctx->name);
 321         put_pid(ctx->pid);
 322
 323         list_del(&ctx->link);
 324         mutex_destroy(&ctx->mutex);
 325
 326         kfree_rcu(ctx, rcu);
 327 }
 328
 329 static void contexts_free(struct drm_i915_private *i915)
 330 {
 331         struct llist_node *freed = llist_del_all(&i915->contexts.free_list);
 332         struct i915_gem_context *ctx, *cn;
 333
 334         lockdep_assert_held(&i915->drm.struct_mutex);
 335
 336         llist_for_each_entry_safe(ctx, cn, freed, free_link)
 337                 i915_gem_context_free(ctx);
 338 }
 339
 340 static void contexts_free_first(struct drm_i915_private *i915)
 341 {
 342         struct i915_gem_context *ctx;
 343         struct llist_node *freed;
 344
 345         lockdep_assert_held(&i915->drm.struct_mutex);
 346
 347         freed = llist_del_first(&i915->contexts.free_list);
 348         if (!freed)
 349                 return;
 350
 351         ctx = container_of(freed, typeof(*ctx), free_link);
 352         i915_gem_context_free(ctx);
 353 }
 354
 355 static void contexts_free_worker(struct work_struct *work)
 356 {
 357         struct drm_i915_private *i915 =
 358                 container_of(work, typeof(*i915), contexts.free_work);
 359
 360         mutex_lock(&i915->drm.struct_mutex);
 361         contexts_free(i915);
 362         mutex_unlock(&i915->drm.struct_mutex);
 363 }
 364
 365 void i915_gem_context_release(struct kref *ref)
 366 {
 367         struct i915_gem_context *ctx = container_of(ref, typeof(*ctx), ref);
 368         struct drm_i915_private *i915 = ctx->i915;
 369
 370         trace_i915_context_free(ctx);
 371         if (llist_add(&ctx->free_link, &i915->contexts.free_list))
 372                 queue_work(i915->wq, &i915->contexts.free_work);
 373 }
 374
 375 static void context_close(struct i915_gem_context *ctx)
 376 {
 377         mutex_lock(&ctx->mutex);
 378
 379         i915_gem_context_set_closed(ctx);
 380         ctx->file_priv = ERR_PTR(-EBADF);
 381
 382         /*
 383          * This context will never again be assinged to HW, so we can
 384          * reuse its ID for the next context.
 385          */
 386         release_hw_id(ctx);
 387
 388         /*
 389          * The LUT uses the VMA as a backpointer to unref the object,
 390          * so we need to clear the LUT before we close all the VMA (inside
 391          * the ppgtt).
 392          */
 393         lut_close(ctx);
 394
 395         mutex_unlock(&ctx->mutex);
 396         i915_gem_context_put(ctx);
 397 }
 398
 399 static u32 default_desc_template(const struct drm_i915_private *i915,
 400                                  const struct i915_hw_ppgtt *ppgtt)
 401 {
 402         u32 address_mode;
 403         u32 desc;
 404
 405         desc = GEN8_CTX_VALID | GEN8_CTX_PRIVILEGE;
 406
 407         address_mode = INTEL_LEGACY_32B_CONTEXT;
 408         if (ppgtt && i915_vm_is_4lvl(&ppgtt->vm))
 409                 address_mode = INTEL_LEGACY_64B_CONTEXT;
 410         desc |= address_mode << GEN8_CTX_ADDRESSING_MODE_SHIFT;
 411
 412         if (IS_GEN(i915, 8))
 413                 desc |= GEN8_CTX_L3LLC_COHERENT;
 414
 415         /* TODO: WaDisableLiteRestore when we start using semaphore
 416          * signalling between Command Streamers
 417          * ring->ctx_desc_template |= GEN8_CTX_FORCE_RESTORE;
 418          */
 419
 420         return desc;
 421 }
 422
 423 static struct i915_gem_context *
 424 __create_context(struct drm_i915_private *dev_priv)
 425 {
 426         struct i915_gem_context *ctx;
 427         struct i915_gem_engines *e;
 428         int err;
 429         int i;
 430
 431         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 432         if (!ctx)
 433                 return ERR_PTR(-ENOMEM);
 434
 435         kref_init(&ctx->ref);
 436         list_add_tail(&ctx->link, &dev_priv->contexts.list);
 437         ctx->i915 = dev_priv;
 438         ctx->sched.priority = I915_USER_PRIORITY(I915_PRIORITY_NORMAL);
 439         mutex_init(&ctx->mutex);
 440
 441         mutex_init(&ctx->engines_mutex);
 442         e = default_engines(ctx);
 443         if (IS_ERR(e)) {
 444                 err = PTR_ERR(e);
 445                 goto err_free;
 446         }
 447         RCU_INIT_POINTER(ctx->engines, e);
 448
 449         INIT_RADIX_TREE(&ctx->handles_vma, GFP_KERNEL);
 450         INIT_LIST_HEAD(&ctx->hw_id_link);
 451
 452         /* NB: Mark all slices as needing a remap so that when the context first
 453          * loads it will restore whatever remap state already exists. If there
 454          * is no remap info, it will be a NOP. */
 455         ctx->remap_slice = ALL_L3_SLICES(dev_priv);
 456
 457         i915_gem_context_set_bannable(ctx);
 458         i915_gem_context_set_recoverable(ctx);
 459
 460         ctx->ring_size = 4 * PAGE_SIZE;
 461         ctx->desc_template =
 462                 default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt);
 463
 464         for (i = 0; i < ARRAY_SIZE(ctx->hang_timestamp); i++)
 465                 ctx->hang_timestamp[i] = jiffies - CONTEXT_FAST_HANG_JIFFIES;
 466
 467         return ctx;
 468
 469 err_free:
 470         kfree(ctx);
 471         return ERR_PTR(err);
 472 }
 473
 474 static struct i915_hw_ppgtt *
 475 __set_ppgtt(struct i915_gem_context *ctx, struct i915_hw_ppgtt *ppgtt)
 476 {
 477         struct i915_hw_ppgtt *old = ctx->ppgtt;
 478
 479         ctx->ppgtt = i915_ppgtt_get(ppgtt);
 480         ctx->desc_template = default_desc_template(ctx->i915, ppgtt);
 481
 482         return old;
 483 }
 484
 485 static void __assign_ppgtt(struct i915_gem_context *ctx,
 486                            struct i915_hw_ppgtt *ppgtt)
 487 {
 488         if (ppgtt == ctx->ppgtt)
 489                 return;
 490
 491         ppgtt = __set_ppgtt(ctx, ppgtt);
 492         if (ppgtt)
 493                 i915_ppgtt_put(ppgtt);
 494 }
 495
 496 static struct i915_gem_context *
 497 i915_gem_create_context(struct drm_i915_private *dev_priv, unsigned int flags)
 498 {
 499         struct i915_gem_context *ctx;
 500
 501         lockdep_assert_held(&dev_priv->drm.struct_mutex);
 502
 503         if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE &&
 504             !HAS_EXECLISTS(dev_priv))
 505                 return ERR_PTR(-EINVAL);
 506
 507         /* Reap the most stale context */
 508         contexts_free_first(dev_priv);
 509
 510         ctx = __create_context(dev_priv);
 511         if (IS_ERR(ctx))
 512                 return ctx;
 513
 514         if (HAS_FULL_PPGTT(dev_priv)) {
 515                 struct i915_hw_ppgtt *ppgtt;
 516
 517                 ppgtt = i915_ppgtt_create(dev_priv);
 518                 if (IS_ERR(ppgtt)) {
 519                         DRM_DEBUG_DRIVER("PPGTT setup failed (%ld)\n",
 520                                          PTR_ERR(ppgtt));
 521                         context_close(ctx);
 522                         return ERR_CAST(ppgtt);
 523                 }
 524
 525                 __assign_ppgtt(ctx, ppgtt);
 526                 i915_ppgtt_put(ppgtt);
 527         }
 528
 529         if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE) {
 530                 struct i915_timeline *timeline;
 531
 532                 timeline = i915_timeline_create(dev_priv, NULL);
 533                 if (IS_ERR(timeline)) {
 534                         context_close(ctx);
 535                         return ERR_CAST(timeline);
 536                 }
 537
 538                 ctx->timeline = timeline;
 539         }
 540
 541         trace_i915_context_create(ctx);
 542
 543         return ctx;
 544 }
 545
 546 /**
 547  * i915_gem_context_create_gvt - create a GVT GEM context
 548  * @dev: drm device *
 549  *
 550  * This function is used to create a GVT specific GEM context.
 551  *
 552  * Returns:
 553  * pointer to i915_gem_context on success, error pointer if failed
 554  *
 555  */
 556 struct i915_gem_context *
 557 i915_gem_context_create_gvt(struct drm_device *dev)
 558 {
 559         struct i915_gem_context *ctx;
 560         int ret;
 561
 562         if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
 563                 return ERR_PTR(-ENODEV);
 564
 565         ret = i915_mutex_lock_interruptible(dev);
 566         if (ret)
 567                 return ERR_PTR(ret);
 568
 569         ctx = i915_gem_create_context(to_i915(dev), 0);
 570         if (IS_ERR(ctx))
 571                 goto out;
 572
 573         ret = i915_gem_context_pin_hw_id(ctx);
 574         if (ret) {
 575                 context_close(ctx);
 576                 ctx = ERR_PTR(ret);
 577                 goto out;
 578         }
 579
 580         ctx->file_priv = ERR_PTR(-EBADF);
 581         i915_gem_context_set_closed(ctx); /* not user accessible */
 582         i915_gem_context_clear_bannable(ctx);
 583         i915_gem_context_set_force_single_submission(ctx);
 584         if (!USES_GUC_SUBMISSION(to_i915(dev)))
 585                 ctx->ring_size = 512 * PAGE_SIZE; /* Max ring buffer size */
 586
 587         GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
 588 out:
 589         mutex_unlock(&dev->struct_mutex);
 590         return ctx;
 591 }
 592
 593 static void
 594 destroy_kernel_context(struct i915_gem_context **ctxp)
 595 {
 596         struct i915_gem_context *ctx;
 597
 598         /* Keep the context ref so that we can free it immediately ourselves */
 599         ctx = i915_gem_context_get(fetch_and_zero(ctxp));
 600         GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
 601
 602         context_close(ctx);
 603         i915_gem_context_free(ctx);
 604 }
 605
 606 struct i915_gem_context *
 607 i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio)
 608 {
 609         struct i915_gem_context *ctx;
 610         int err;
 611
 612         ctx = i915_gem_create_context(i915, 0);
 613         if (IS_ERR(ctx))
 614                 return ctx;
 615
 616         err = i915_gem_context_pin_hw_id(ctx);
 617         if (err) {
 618                 destroy_kernel_context(&ctx);
 619                 return ERR_PTR(err);
 620         }
 621
 622         i915_gem_context_clear_bannable(ctx);
 623         ctx->sched.priority = I915_USER_PRIORITY(prio);
 624         ctx->ring_size = PAGE_SIZE;
 625
 626         GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
 627
 628         return ctx;
 629 }
 630
 631 static void init_contexts(struct drm_i915_private *i915)
 632 {
 633         mutex_init(&i915->contexts.mutex);
 634         INIT_LIST_HEAD(&i915->contexts.list);
 635
 636         /* Using the simple ida interface, the max is limited by sizeof(int) */
 637         BUILD_BUG_ON(MAX_CONTEXT_HW_ID > INT_MAX);
 638         BUILD_BUG_ON(GEN11_MAX_CONTEXT_HW_ID > INT_MAX);
 639         ida_init(&i915->contexts.hw_ida);
 640         INIT_LIST_HEAD(&i915->contexts.hw_id_list);
 641
 642         INIT_WORK(&i915->contexts.free_work, contexts_free_worker);
 643         init_llist_head(&i915->contexts.free_list);
 644 }
 645
 646 static bool needs_preempt_context(struct drm_i915_private *i915)
 647 {
 648         return HAS_EXECLISTS(i915);
 649 }
 650
 651 int i915_gem_contexts_init(struct drm_i915_private *dev_priv)
 652 {
 653         struct i915_gem_context *ctx;
 654
 655         /* Reassure ourselves we are only called once */
 656         GEM_BUG_ON(dev_priv->kernel_context);
 657         GEM_BUG_ON(dev_priv->preempt_context);
 658
 659         intel_engine_init_ctx_wa(dev_priv->engine[RCS0]);
 660         init_contexts(dev_priv);
 661
 662         /* lowest priority; idle task */
 663         ctx = i915_gem_context_create_kernel(dev_priv, I915_PRIORITY_MIN);
 664         if (IS_ERR(ctx)) {
 665                 DRM_ERROR("Failed to create default global context\n");
 666                 return PTR_ERR(ctx);
 667         }
 668         /*
 669          * For easy recognisablity, we want the kernel context to be 0 and then
 670          * all user contexts will have non-zero hw_id. Kernel contexts are
 671          * permanently pinned, so that we never suffer a stall and can
 672          * use them from any allocation context (e.g. for evicting other
 673          * contexts and from inside the shrinker).
 674          */
 675         GEM_BUG_ON(ctx->hw_id);
 676         GEM_BUG_ON(!atomic_read(&ctx->hw_id_pin_count));
 677         dev_priv->kernel_context = ctx;
 678
 679         /* highest priority; preempting task */
 680         if (needs_preempt_context(dev_priv)) {
 681                 ctx = i915_gem_context_create_kernel(dev_priv, INT_MAX);
 682                 if (!IS_ERR(ctx))
 683                         dev_priv->preempt_context = ctx;
 684                 else
 685                         DRM_ERROR("Failed to create preempt context; disabling preemption\n");
 686         }
 687
 688         DRM_DEBUG_DRIVER("%s context support initialized\n",
 689                          DRIVER_CAPS(dev_priv)->has_logical_contexts ?
 690                          "logical" : "fake");
 691         return 0;
 692 }
 693
 694 void i915_gem_contexts_lost(struct drm_i915_private *dev_priv)
 695 {
 696         struct intel_engine_cs *engine;
 697         enum intel_engine_id id;
 698
 699         lockdep_assert_held(&dev_priv->drm.struct_mutex);
 700
 701         for_each_engine(engine, dev_priv, id)
 702                 intel_engine_lost_context(engine);
 703 }
 704
 705 void i915_gem_contexts_fini(struct drm_i915_private *i915)
 706 {
 707         lockdep_assert_held(&i915->drm.struct_mutex);
 708
 709         if (i915->preempt_context)
 710                 destroy_kernel_context(&i915->preempt_context);
 711         destroy_kernel_context(&i915->kernel_context);
 712
 713         /* Must free all deferred contexts (via flush_workqueue) first */
 714         GEM_BUG_ON(!list_empty(&i915->contexts.hw_id_list));
 715         ida_destroy(&i915->contexts.hw_ida);
 716 }
 717
 718 static int context_idr_cleanup(int id, void *p, void *data)
 719 {
 720         context_close(p);
 721         return 0;
 722 }
 723
 724 static int vm_idr_cleanup(int id, void *p, void *data)
 725 {
 726         i915_ppgtt_put(p);
 727         return 0;
 728 }
 729
 730 static int gem_context_register(struct i915_gem_context *ctx,
 731                                 struct drm_i915_file_private *fpriv)
 732 {
 733         int ret;
 734
 735         ctx->file_priv = fpriv;
 736         if (ctx->ppgtt)
 737                 ctx->ppgtt->vm.file = fpriv;
 738
 739         ctx->pid = get_task_pid(current, PIDTYPE_PID);
 740         ctx->name = kasprintf(GFP_KERNEL, "%s[%d]",
 741                               current->comm, pid_nr(ctx->pid));
 742         if (!ctx->name) {
 743                 ret = -ENOMEM;
 744                 goto err_pid;
 745         }
 746
 747         /* And finally expose ourselves to userspace via the idr */
 748         mutex_lock(&fpriv->context_idr_lock);
 749         ret = idr_alloc(&fpriv->context_idr, ctx, 0, 0, GFP_KERNEL);
 750         mutex_unlock(&fpriv->context_idr_lock);
 751         if (ret >= 0)
 752                 goto out;
 753
 754         kfree(fetch_and_zero(&ctx->name));
 755 err_pid:
 756         put_pid(fetch_and_zero(&ctx->pid));
 757 out:
 758         return ret;
 759 }
 760
 761 int i915_gem_context_open(struct drm_i915_private *i915,
 762                           struct drm_file *file)
 763 {
 764         struct drm_i915_file_private *file_priv = file->driver_priv;
 765         struct i915_gem_context *ctx;
 766         int err;
 767
 768         mutex_init(&file_priv->context_idr_lock);
 769         mutex_init(&file_priv->vm_idr_lock);
 770
 771         idr_init(&file_priv->context_idr);
 772         idr_init_base(&file_priv->vm_idr, 1);
 773
 774         mutex_lock(&i915->drm.struct_mutex);
 775         ctx = i915_gem_create_context(i915, 0);
 776         mutex_unlock(&i915->drm.struct_mutex);
 777         if (IS_ERR(ctx)) {
 778                 err = PTR_ERR(ctx);
 779                 goto err;
 780         }
 781
 782         err = gem_context_register(ctx, file_priv);
 783         if (err < 0)
 784                 goto err_ctx;
 785
 786         GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
 787         GEM_BUG_ON(err > 0);
 788
 789         return 0;
 790
 791 err_ctx:
 792         context_close(ctx);
 793 err:
 794         idr_destroy(&file_priv->vm_idr);
 795         idr_destroy(&file_priv->context_idr);
 796         mutex_destroy(&file_priv->vm_idr_lock);
 797         mutex_destroy(&file_priv->context_idr_lock);
 798         return err;
 799 }
 800
 801 void i915_gem_context_close(struct drm_file *file)
 802 {
 803         struct drm_i915_file_private *file_priv = file->driver_priv;
 804
 805         idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
 806         idr_destroy(&file_priv->context_idr);
 807         mutex_destroy(&file_priv->context_idr_lock);
 808
 809         idr_for_each(&file_priv->vm_idr, vm_idr_cleanup, NULL);
 810         idr_destroy(&file_priv->vm_idr);
 811         mutex_destroy(&file_priv->vm_idr_lock);
 812 }
 813
 814 int i915_gem_vm_create_ioctl(struct drm_device *dev, void *data,
 815                              struct drm_file *file)
 816 {
 817         struct drm_i915_private *i915 = to_i915(dev);
 818         struct drm_i915_gem_vm_control *args = data;
 819         struct drm_i915_file_private *file_priv = file->driver_priv;
 820         struct i915_hw_ppgtt *ppgtt;
 821         int err;
 822
 823         if (!HAS_FULL_PPGTT(i915))
 824                 return -ENODEV;
 825
 826         if (args->flags)
 827                 return -EINVAL;
 828
 829         ppgtt = i915_ppgtt_create(i915);
 830         if (IS_ERR(ppgtt))
 831                 return PTR_ERR(ppgtt);
 832
 833         ppgtt->vm.file = file_priv;
 834
 835         if (args->extensions) {
 836                 err = i915_user_extensions(u64_to_user_ptr(args->extensions),
 837                                            NULL, 0,
 838                                            ppgtt);
 839                 if (err)
 840                         goto err_put;
 841         }
 842
 843         err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
 844         if (err)
 845                 goto err_put;
 846
 847         err = idr_alloc(&file_priv->vm_idr, ppgtt, 0, 0, GFP_KERNEL);
 848         if (err < 0)
 849                 goto err_unlock;
 850
 851         GEM_BUG_ON(err == 0); /* reserved for invalid/unassigned ppgtt */
 852
 853         mutex_unlock(&file_priv->vm_idr_lock);
 854
 855         args->vm_id = err;
 856         return 0;
 857
 858 err_unlock:
 859         mutex_unlock(&file_priv->vm_idr_lock);
 860 err_put:
 861         i915_ppgtt_put(ppgtt);
 862         return err;
 863 }
 864
 865 int i915_gem_vm_destroy_ioctl(struct drm_device *dev, void *data,
 866                               struct drm_file *file)
 867 {
 868         struct drm_i915_file_private *file_priv = file->driver_priv;
 869         struct drm_i915_gem_vm_control *args = data;
 870         struct i915_hw_ppgtt *ppgtt;
 871         int err;
 872         u32 id;
 873
 874         if (args->flags)
 875                 return -EINVAL;
 876
 877         if (args->extensions)
 878                 return -EINVAL;
 879
 880         id = args->vm_id;
 881         if (!id)
 882                 return -ENOENT;
 883
 884         err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
 885         if (err)
 886                 return err;
 887
 888         ppgtt = idr_remove(&file_priv->vm_idr, id);
 889
 890         mutex_unlock(&file_priv->vm_idr_lock);
 891         if (!ppgtt)
 892                 return -ENOENT;
 893
 894         i915_ppgtt_put(ppgtt);
 895         return 0;
 896 }
 897
 898 struct context_barrier_task {
 899         struct i915_active base;
 900         void (*task)(void *data);
 901         void *data;
 902 };
 903
 904 static void cb_retire(struct i915_active *base)
 905 {
 906         struct context_barrier_task *cb = container_of(base, typeof(*cb), base);
 907
 908         if (cb->task)
 909                 cb->task(cb->data);
 910
 911         i915_active_fini(&cb->base);
 912         kfree(cb);
 913 }
 914
 915 I915_SELFTEST_DECLARE(static intel_engine_mask_t context_barrier_inject_fault);
 916 static int context_barrier_task(struct i915_gem_context *ctx,
 917                                 intel_engine_mask_t engines,
 918                                 bool (*skip)(struct intel_context *ce, void *data),
 919                                 int (*emit)(struct i915_request *rq, void *data),
 920                                 void (*task)(void *data),
 921                                 void *data)
 922 {
 923         struct drm_i915_private *i915 = ctx->i915;
 924         struct context_barrier_task *cb;
 925         struct i915_gem_engines_iter it;
 926         struct intel_context *ce;
 927         int err = 0;
 928
 929         lockdep_assert_held(&i915->drm.struct_mutex);
 930         GEM_BUG_ON(!task);
 931
 932         cb = kmalloc(sizeof(*cb), GFP_KERNEL);
 933         if (!cb)
 934                 return -ENOMEM;
 935
 936         i915_active_init(i915, &cb->base, cb_retire);
 937         i915_active_acquire(&cb->base);
 938
 939         for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
 940                 struct i915_request *rq;
 941
 942                 if (I915_SELFTEST_ONLY(context_barrier_inject_fault &
 943                                        ce->engine->mask)) {
 944                         err = -ENXIO;
 945                         break;
 946                 }
 947
 948                 if (!(ce->engine->mask & engines))
 949                         continue;
 950
 951                 if (skip && skip(ce, data))
 952                         continue;
 953
 954                 rq = intel_context_create_request(ce);
 955                 if (IS_ERR(rq)) {
 956                         err = PTR_ERR(rq);
 957                         break;
 958                 }
 959
 960                 err = 0;
 961                 if (emit)
 962                         err = emit(rq, data);
 963                 if (err == 0)
 964                         err = i915_active_ref(&cb->base, rq->fence.context, rq);
 965
 966                 i915_request_add(rq);
 967                 if (err)
 968                         break;
 969         }
 970         i915_gem_context_unlock_engines(ctx);
 971
 972         cb->task = err ? NULL : task; /* caller needs to unwind instead */
 973         cb->data = data;
 974
 975         i915_active_release(&cb->base);
 976
 977         return err;
 978 }
 979
 980 static int get_ppgtt(struct drm_i915_file_private *file_priv,
 981                      struct i915_gem_context *ctx,
 982                      struct drm_i915_gem_context_param *args)
 983 {
 984         struct i915_hw_ppgtt *ppgtt;
 985         int ret;
 986
 987         if (!ctx->ppgtt)
 988                 return -ENODEV;
 989
 990         /* XXX rcu acquire? */
 991         ret = mutex_lock_interruptible(&ctx->i915->drm.struct_mutex);
 992         if (ret)
 993                 return ret;
 994
 995         ppgtt = i915_ppgtt_get(ctx->ppgtt);
 996         mutex_unlock(&ctx->i915->drm.struct_mutex);
 997
 998         ret = mutex_lock_interruptible(&file_priv->vm_idr_lock);
 999         if (ret)
1000                 goto err_put;
1001
1002         ret = idr_alloc(&file_priv->vm_idr, ppgtt, 0, 0, GFP_KERNEL);
1003         GEM_BUG_ON(!ret);
1004         if (ret < 0)
1005                 goto err_unlock;
1006
1007         i915_ppgtt_get(ppgtt);
1008
1009         args->size = 0;
1010         args->value = ret;
1011
1012         ret = 0;
1013 err_unlock:
1014         mutex_unlock(&file_priv->vm_idr_lock);
1015 err_put:
1016         i915_ppgtt_put(ppgtt);
1017         return ret;
1018 }
1019
1020 static void set_ppgtt_barrier(void *data)
1021 {
1022         struct i915_hw_ppgtt *old = data;
1023
1024         if (INTEL_GEN(old->vm.i915) < 8)
1025                 gen6_ppgtt_unpin_all(old);
1026
1027         i915_ppgtt_put(old);
1028 }
1029
1030 static int emit_ppgtt_update(struct i915_request *rq, void *data)
1031 {
1032         struct i915_hw_ppgtt *ppgtt = rq->gem_context->ppgtt;
1033         struct intel_engine_cs *engine = rq->engine;
1034         u32 base = engine->mmio_base;
1035         u32 *cs;
1036         int i;
1037
1038         if (i915_vm_is_4lvl(&ppgtt->vm)) {
1039                 const dma_addr_t pd_daddr = px_dma(&ppgtt->pml4);
1040
1041                 cs = intel_ring_begin(rq, 6);
1042                 if (IS_ERR(cs))
1043                         return PTR_ERR(cs);
1044
1045                 *cs++ = MI_LOAD_REGISTER_IMM(2);
1046
1047                 *cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_UDW(base, 0));
1048                 *cs++ = upper_32_bits(pd_daddr);
1049                 *cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_LDW(base, 0));
1050                 *cs++ = lower_32_bits(pd_daddr);
1051
1052                 *cs++ = MI_NOOP;
1053                 intel_ring_advance(rq, cs);
1054         } else if (HAS_LOGICAL_RING_CONTEXTS(engine->i915)) {
1055                 cs = intel_ring_begin(rq, 4 * GEN8_3LVL_PDPES + 2);
1056                 if (IS_ERR(cs))
1057                         return PTR_ERR(cs);
1058
1059                 *cs++ = MI_LOAD_REGISTER_IMM(2 * GEN8_3LVL_PDPES);
1060                 for (i = GEN8_3LVL_PDPES; i--; ) {
1061                         const dma_addr_t pd_daddr = i915_page_dir_dma_addr(ppgtt, i);
1062
1063                         *cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_UDW(base, i));
1064                         *cs++ = upper_32_bits(pd_daddr);
1065                         *cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_LDW(base, i));
1066                         *cs++ = lower_32_bits(pd_daddr);
1067                 }
1068                 *cs++ = MI_NOOP;
1069                 intel_ring_advance(rq, cs);
1070         } else {
1071                 /* ppGTT is not part of the legacy context image */
1072                 gen6_ppgtt_pin(ppgtt);
1073         }
1074
1075         return 0;
1076 }
1077
1078 static bool skip_ppgtt_update(struct intel_context *ce, void *data)
1079 {
1080         if (HAS_LOGICAL_RING_CONTEXTS(ce->engine->i915))
1081                 return !ce->state;
1082         else
1083                 return !atomic_read(&ce->pin_count);
1084 }
1085
1086 static int set_ppgtt(struct drm_i915_file_private *file_priv,
1087                      struct i915_gem_context *ctx,
1088                      struct drm_i915_gem_context_param *args)
1089 {
1090         struct i915_hw_ppgtt *ppgtt, *old;
1091         int err;
1092
1093         if (args->size)
1094                 return -EINVAL;
1095
1096         if (!ctx->ppgtt)
1097                 return -ENODEV;
1098
1099         if (upper_32_bits(args->value))
1100                 return -ENOENT;
1101
1102         err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
1103         if (err)
1104                 return err;
1105
1106         ppgtt = idr_find(&file_priv->vm_idr, args->value);
1107         if (ppgtt)
1108                 i915_ppgtt_get(ppgtt);
1109         mutex_unlock(&file_priv->vm_idr_lock);
1110         if (!ppgtt)
1111                 return -ENOENT;
1112
1113         err = mutex_lock_interruptible(&ctx->i915->drm.struct_mutex);
1114         if (err)
1115                 goto out;
1116
1117         if (ppgtt == ctx->ppgtt)
1118                 goto unlock;
1119
1120         /* Teardown the existing obj:vma cache, it will have to be rebuilt. */
1121         mutex_lock(&ctx->mutex);
1122         lut_close(ctx);
1123         mutex_unlock(&ctx->mutex);
1124
1125         old = __set_ppgtt(ctx, ppgtt);
1126
1127         /*
1128          * We need to flush any requests using the current ppgtt before
1129          * we release it as the requests do not hold a reference themselves,
1130          * only indirectly through the context.
1131          */
1132         err = context_barrier_task(ctx, ALL_ENGINES,
1133                                    skip_ppgtt_update,
1134                                    emit_ppgtt_update,
1135                                    set_ppgtt_barrier,
1136                                    old);
1137         if (err) {
1138                 ctx->ppgtt = old;
1139                 ctx->desc_template = default_desc_template(ctx->i915, old);
1140                 i915_ppgtt_put(ppgtt);
1141         }
1142
1143 unlock:
1144         mutex_unlock(&ctx->i915->drm.struct_mutex);
1145
1146 out:
1147         i915_ppgtt_put(ppgtt);
1148         return err;
1149 }
1150
1151 static int gen8_emit_rpcs_config(struct i915_request *rq,
1152                                  struct intel_context *ce,
1153                                  struct intel_sseu sseu)
1154 {
1155         u64 offset;
1156         u32 *cs;
1157
1158         cs = intel_ring_begin(rq, 4);
1159         if (IS_ERR(cs))
1160                 return PTR_ERR(cs);
1161
1162         offset = i915_ggtt_offset(ce->state) +
1163                  LRC_STATE_PN * PAGE_SIZE +
1164                  (CTX_R_PWR_CLK_STATE + 1) * 4;
1165
1166         *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
1167         *cs++ = lower_32_bits(offset);
1168         *cs++ = upper_32_bits(offset);
1169         *cs++ = intel_sseu_make_rpcs(rq->i915, &sseu);
1170
1171         intel_ring_advance(rq, cs);
1172
1173         return 0;
1174 }
1175
1176 static int
1177 gen8_modify_rpcs(struct intel_context *ce, struct intel_sseu sseu)
1178 {
1179         struct i915_request *rq;
1180         int ret;
1181
1182         lockdep_assert_held(&ce->pin_mutex);
1183
1184         /*
1185          * If the context is not idle, we have to submit an ordered request to
1186          * modify its context image via the kernel context (writing to our own
1187          * image, or into the registers directory, does not stick). Pristine
1188          * and idle contexts will be configured on pinning.
1189          */
1190         if (!intel_context_is_pinned(ce))
1191                 return 0;
1192
1193         rq = i915_request_create(ce->engine->kernel_context);
1194         if (IS_ERR(rq))
1195                 return PTR_ERR(rq);
1196
1197         /* Queue this switch after all other activity by this context. */
1198         ret = i915_active_request_set(&ce->ring->timeline->last_request, rq);
1199         if (ret)
1200                 goto out_add;
1201
1202         ret = gen8_emit_rpcs_config(rq, ce, sseu);
1203         if (ret)
1204                 goto out_add;
1205
1206         /*
1207          * Guarantee context image and the timeline remains pinned until the
1208          * modifying request is retired by setting the ce activity tracker.
1209          *
1210          * But we only need to take one pin on the account of it. Or in other
1211          * words transfer the pinned ce object to tracked active request.
1212          */
1213         if (!i915_active_request_isset(&ce->active_tracker))
1214                 __intel_context_pin(ce);
1215         __i915_active_request_set(&ce->active_tracker, rq);
1216
1217 out_add:
1218         i915_request_add(rq);
1219         return ret;
1220 }
1221
1222 static int
1223 __intel_context_reconfigure_sseu(struct intel_context *ce,
1224                                  struct intel_sseu sseu)
1225 {
1226         int ret;
1227
1228         GEM_BUG_ON(INTEL_GEN(ce->gem_context->i915) < 8);
1229
1230         ret = intel_context_lock_pinned(ce);
1231         if (ret)
1232                 return ret;
1233
1234         /* Nothing to do if unmodified. */
1235         if (!memcmp(&ce->sseu, &sseu, sizeof(sseu)))
1236                 goto unlock;
1237
1238         ret = gen8_modify_rpcs(ce, sseu);
1239         if (!ret)
1240                 ce->sseu = sseu;
1241
1242 unlock:
1243         intel_context_unlock_pinned(ce);
1244         return ret;
1245 }
1246
1247 static int
1248 intel_context_reconfigure_sseu(struct intel_context *ce, struct intel_sseu sseu)
1249 {
1250         struct drm_i915_private *i915 = ce->gem_context->i915;
1251         int ret;
1252
1253         ret = mutex_lock_interruptible(&i915->drm.struct_mutex);
1254         if (ret)
1255                 return ret;
1256
1257         ret = __intel_context_reconfigure_sseu(ce, sseu);
1258
1259         mutex_unlock(&i915->drm.struct_mutex);
1260
1261         return ret;
1262 }
1263
1264 static int
1265 user_to_context_sseu(struct drm_i915_private *i915,
1266                      const struct drm_i915_gem_context_param_sseu *user,
1267                      struct intel_sseu *context)
1268 {
1269         const struct sseu_dev_info *device = &RUNTIME_INFO(i915)->sseu;
1270
1271         /* No zeros in any field. */
1272         if (!user->slice_mask || !user->subslice_mask ||
1273             !user->min_eus_per_subslice || !user->max_eus_per_subslice)
1274                 return -EINVAL;
1275
1276         /* Max > min. */
1277         if (user->max_eus_per_subslice < user->min_eus_per_subslice)
1278                 return -EINVAL;
1279
1280         /*
1281          * Some future proofing on the types since the uAPI is wider than the
1282          * current internal implementation.
1283          */
1284         if (overflows_type(user->slice_mask, context->slice_mask) ||
1285             overflows_type(user->subslice_mask, context->subslice_mask) ||
1286             overflows_type(user->min_eus_per_subslice,
1287                            context->min_eus_per_subslice) ||
1288             overflows_type(user->max_eus_per_subslice,
1289                            context->max_eus_per_subslice))
1290                 return -EINVAL;
1291
1292         /* Check validity against hardware. */
1293         if (user->slice_mask & ~device->slice_mask)
1294                 return -EINVAL;
1295
1296         if (user->subslice_mask & ~device->subslice_mask[0])
1297                 return -EINVAL;
1298
1299         if (user->max_eus_per_subslice > device->max_eus_per_subslice)
1300                 return -EINVAL;
1301
1302         context->slice_mask = user->slice_mask;
1303         context->subslice_mask = user->subslice_mask;
1304         context->min_eus_per_subslice = user->min_eus_per_subslice;
1305         context->max_eus_per_subslice = user->max_eus_per_subslice;
1306
1307         /* Part specific restrictions. */
1308         if (IS_GEN(i915, 11)) {
1309                 unsigned int hw_s = hweight8(device->slice_mask);
1310                 unsigned int hw_ss_per_s = hweight8(device->subslice_mask[0]);
1311                 unsigned int req_s = hweight8(context->slice_mask);
1312                 unsigned int req_ss = hweight8(context->subslice_mask);
1313
1314                 /*
1315                  * Only full subslice enablement is possible if more than one
1316                  * slice is turned on.
1317                  */
1318                 if (req_s > 1 && req_ss != hw_ss_per_s)
1319                         return -EINVAL;
1320
1321                 /*
1322                  * If more than four (SScount bitfield limit) subslices are
1323                  * requested then the number has to be even.
1324                  */
1325                 if (req_ss > 4 && (req_ss & 1))
1326                         return -EINVAL;
1327
1328                 /*
1329                  * If only one slice is enabled and subslice count is below the
1330                  * device full enablement, it must be at most half of the all
1331                  * available subslices.
1332                  */
1333                 if (req_s == 1 && req_ss < hw_ss_per_s &&
1334                     req_ss > (hw_ss_per_s / 2))
1335                         return -EINVAL;
1336
1337                 /* ABI restriction - VME use case only. */
1338
1339                 /* All slices or one slice only. */
1340                 if (req_s != 1 && req_s != hw_s)
1341                         return -EINVAL;
1342
1343                 /*
1344                  * Half subslices or full enablement only when one slice is
1345                  * enabled.
1346                  */
1347                 if (req_s == 1 &&
1348                     (req_ss != hw_ss_per_s && req_ss != (hw_ss_per_s / 2)))
1349                         return -EINVAL;
1350
1351                 /* No EU configuration changes. */
1352                 if ((user->min_eus_per_subslice !=
1353                      device->max_eus_per_subslice) ||
1354                     (user->max_eus_per_subslice !=
1355                      device->max_eus_per_subslice))
1356                         return -EINVAL;
1357         }
1358
1359         return 0;
1360 }
1361
1362 static int set_sseu(struct i915_gem_context *ctx,
1363                     struct drm_i915_gem_context_param *args)
1364 {
1365         struct drm_i915_private *i915 = ctx->i915;
1366         struct drm_i915_gem_context_param_sseu user_sseu;
1367         struct intel_context *ce;
1368         struct intel_sseu sseu;
1369         unsigned long lookup;
1370         int ret;
1371
1372         if (args->size < sizeof(user_sseu))
1373                 return -EINVAL;
1374
1375         if (!IS_GEN(i915, 11))
1376                 return -ENODEV;
1377
1378         if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
1379                            sizeof(user_sseu)))
1380                 return -EFAULT;
1381
1382         if (user_sseu.rsvd)
1383                 return -EINVAL;
1384
1385         if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
1386                 return -EINVAL;
1387
1388         lookup = 0;
1389         if (user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX)
1390                 lookup |= LOOKUP_USER_INDEX;
1391
1392         ce = lookup_user_engine(ctx, lookup, &user_sseu.engine);
1393         if (IS_ERR(ce))
1394                 return PTR_ERR(ce);
1395
1396         /* Only render engine supports RPCS configuration. */
1397         if (ce->engine->class != RENDER_CLASS) {
1398                 ret = -ENODEV;
1399                 goto out_ce;
1400         }
1401
1402         ret = user_to_context_sseu(i915, &user_sseu, &sseu);
1403         if (ret)
1404                 goto out_ce;
1405
1406         ret = intel_context_reconfigure_sseu(ce, sseu);
1407         if (ret)
1408                 goto out_ce;
1409
1410         args->size = sizeof(user_sseu);
1411
1412 out_ce:
1413         intel_context_put(ce);
1414         return ret;
1415 }
1416
1417 struct set_engines {
1418         struct i915_gem_context *ctx;
1419         struct i915_gem_engines *engines;
1420 };
1421
1422 static int
1423 set_engines__load_balance(struct i915_user_extension __user *base, void *data)
1424 {
1425         struct i915_context_engines_load_balance __user *ext =
1426                 container_of_user(base, typeof(*ext), base);
1427         const struct set_engines *set = data;
1428         struct intel_engine_cs *stack[16];
1429         struct intel_engine_cs **siblings;
1430         struct intel_context *ce;
1431         u16 num_siblings, idx;
1432         unsigned int n;
1433         int err;
1434
1435         if (!HAS_EXECLISTS(set->ctx->i915))
1436                 return -ENODEV;
1437
1438         if (USES_GUC_SUBMISSION(set->ctx->i915))
1439                 return -ENODEV; /* not implement yet */
1440
1441         if (get_user(idx, &ext->engine_index))
1442                 return -EFAULT;
1443
1444         if (idx >= set->engines->num_engines) {
1445                 DRM_DEBUG("Invalid placement value, %d >= %d\n",
1446                           idx, set->engines->num_engines);
1447                 return -EINVAL;
1448         }
1449
1450         idx = array_index_nospec(idx, set->engines->num_engines);
1451         if (set->engines->engines[idx]) {
1452                 DRM_DEBUG("Invalid placement[%d], already occupied\n", idx);
1453                 return -EEXIST;
1454         }
1455
1456         if (get_user(num_siblings, &ext->num_siblings))
1457                 return -EFAULT;
1458
1459         err = check_user_mbz(&ext->flags);
1460         if (err)
1461                 return err;
1462
1463         err = check_user_mbz(&ext->mbz64);
1464         if (err)
1465                 return err;
1466
1467         siblings = stack;
1468         if (num_siblings > ARRAY_SIZE(stack)) {
1469                 siblings = kmalloc_array(num_siblings,
1470                                          sizeof(*siblings),
1471                                          GFP_KERNEL);
1472                 if (!siblings)
1473                         return -ENOMEM;
1474         }
1475
1476         for (n = 0; n < num_siblings; n++) {
1477                 struct i915_engine_class_instance ci;
1478
1479                 if (copy_from_user(&ci, &ext->engines[n], sizeof(ci))) {
1480                         err = -EFAULT;
1481                         goto out_siblings;
1482                 }
1483
1484                 siblings[n] = intel_engine_lookup_user(set->ctx->i915,
1485                                                        ci.engine_class,
1486                                                        ci.engine_instance);
1487                 if (!siblings[n]) {
1488                         DRM_DEBUG("Invalid sibling[%d]: { class:%d, inst:%d }\n",
1489                                   n, ci.engine_class, ci.engine_instance);
1490                         err = -EINVAL;
1491                         goto out_siblings;
1492                 }
1493         }
1494
1495         ce = intel_execlists_create_virtual(set->ctx, siblings, n);
1496         if (IS_ERR(ce)) {
1497                 err = PTR_ERR(ce);
1498                 goto out_siblings;
1499         }
1500
1501         if (cmpxchg(&set->engines->engines[idx], NULL, ce)) {
1502                 intel_context_put(ce);
1503                 err = -EEXIST;
1504                 goto out_siblings;
1505         }
1506
1507 out_siblings:
1508         if (siblings != stack)
1509                 kfree(siblings);
1510
1511         return err;
1512 }
1513
1514 static int
1515 set_engines__bond(struct i915_user_extension __user *base, void *data)
1516 {
1517         struct i915_context_engines_bond __user *ext =
1518                 container_of_user(base, typeof(*ext), base);
1519         const struct set_engines *set = data;
1520         struct i915_engine_class_instance ci;
1521         struct intel_engine_cs *virtual;
1522         struct intel_engine_cs *master;
1523         u16 idx, num_bonds;
1524         int err, n;
1525
1526         if (get_user(idx, &ext->virtual_index))
1527                 return -EFAULT;
1528
1529         if (idx >= set->engines->num_engines) {
1530                 DRM_DEBUG("Invalid index for virtual engine: %d >= %d\n",
1531                           idx, set->engines->num_engines);
1532                 return -EINVAL;
1533         }
1534
1535         idx = array_index_nospec(idx, set->engines->num_engines);
1536         if (!set->engines->engines[idx]) {
1537                 DRM_DEBUG("Invalid engine at %d\n", idx);
1538                 return -EINVAL;
1539         }
1540         virtual = set->engines->engines[idx]->engine;
1541
1542         err = check_user_mbz(&ext->flags);
1543         if (err)
1544                 return err;
1545
1546         for (n = 0; n < ARRAY_SIZE(ext->mbz64); n++) {
1547                 err = check_user_mbz(&ext->mbz64[n]);
1548                 if (err)
1549                         return err;
1550         }
1551
1552         if (copy_from_user(&ci, &ext->master, sizeof(ci)))
1553                 return -EFAULT;
1554
1555         master = intel_engine_lookup_user(set->ctx->i915,
1556                                           ci.engine_class, ci.engine_instance);
1557         if (!master) {
1558                 DRM_DEBUG("Unrecognised master engine: { class:%u, instance:%u }\n",
1559                           ci.engine_class, ci.engine_instance);
1560                 return -EINVAL;
1561         }
1562
1563         if (get_user(num_bonds, &ext->num_bonds))
1564                 return -EFAULT;
1565
1566         for (n = 0; n < num_bonds; n++) {
1567                 struct intel_engine_cs *bond;
1568
1569                 if (copy_from_user(&ci, &ext->engines[n], sizeof(ci)))
1570                         return -EFAULT;
1571
1572                 bond = intel_engine_lookup_user(set->ctx->i915,
1573                                                 ci.engine_class,
1574                                                 ci.engine_instance);
1575                 if (!bond) {
1576                         DRM_DEBUG("Unrecognised engine[%d] for bonding: { class:%d, instance: %d }\n",
1577                                   n, ci.engine_class, ci.engine_instance);
1578                         return -EINVAL;
1579                 }
1580
1581                 /*
1582                  * A non-virtual engine has no siblings to choose between; and
1583                  * a submit fence will always be directed to the one engine.
1584                  */
1585                 if (intel_engine_is_virtual(virtual)) {
1586                         err = intel_virtual_engine_attach_bond(virtual,
1587                                                                master,
1588                                                                bond);
1589                         if (err)
1590                                 return err;
1591                 }
1592         }
1593
1594         return 0;
1595 }
1596
1597 static const i915_user_extension_fn set_engines__extensions[] = {
1598         [I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE] = set_engines__load_balance,
1599         [I915_CONTEXT_ENGINES_EXT_BOND] = set_engines__bond,
1600 };
1601
1602 static int
1603 set_engines(struct i915_gem_context *ctx,
1604             const struct drm_i915_gem_context_param *args)
1605 {
1606         struct i915_context_param_engines __user *user =
1607                 u64_to_user_ptr(args->value);
1608         struct set_engines set = { .ctx = ctx };
1609         unsigned int num_engines, n;
1610         u64 extensions;
1611         int err;
1612
1613         if (!args->size) { /* switch back to legacy user_ring_map */
1614                 if (!i915_gem_context_user_engines(ctx))
1615                         return 0;
1616
1617                 set.engines = default_engines(ctx);
1618                 if (IS_ERR(set.engines))
1619                         return PTR_ERR(set.engines);
1620
1621                 goto replace;
1622         }
1623
1624         BUILD_BUG_ON(!IS_ALIGNED(sizeof(*user), sizeof(*user->engines)));
1625         if (args->size < sizeof(*user) ||
1626             !IS_ALIGNED(args->size, sizeof(*user->engines))) {
1627                 DRM_DEBUG("Invalid size for engine array: %d\n",
1628                           args->size);
1629                 return -EINVAL;
1630         }
1631
1632         /*
1633          * Note that I915_EXEC_RING_MASK limits execbuf to only using the
1634          * first 64 engines defined here.
1635          */
1636         num_engines = (args->size - sizeof(*user)) / sizeof(*user->engines);
1637
1638         set.engines = kmalloc(struct_size(set.engines, engines, num_engines),
1639                               GFP_KERNEL);
1640         if (!set.engines)
1641                 return -ENOMEM;
1642
1643         init_rcu_head(&set.engines->rcu);
1644         for (n = 0; n < num_engines; n++) {
1645                 struct i915_engine_class_instance ci;
1646                 struct intel_engine_cs *engine;
1647
1648                 if (copy_from_user(&ci, &user->engines[n], sizeof(ci))) {
1649                         __free_engines(set.engines, n);
1650                         return -EFAULT;
1651                 }
1652
1653                 if (ci.engine_class == (u16)I915_ENGINE_CLASS_INVALID &&
1654                     ci.engine_instance == (u16)I915_ENGINE_CLASS_INVALID_NONE) {
1655                         set.engines->engines[n] = NULL;
1656                         continue;
1657                 }
1658
1659                 engine = intel_engine_lookup_user(ctx->i915,
1660                                                   ci.engine_class,
1661                                                   ci.engine_instance);
1662                 if (!engine) {
1663                         DRM_DEBUG("Invalid engine[%d]: { class:%d, instance:%d }\n",
1664                                   n, ci.engine_class, ci.engine_instance);
1665                         __free_engines(set.engines, n);
1666                         return -ENOENT;
1667                 }
1668
1669                 set.engines->engines[n] = intel_context_create(ctx, engine);
1670                 if (!set.engines->engines[n]) {
1671                         __free_engines(set.engines, n);
1672                         return -ENOMEM;
1673                 }
1674         }
1675         set.engines->num_engines = num_engines;
1676
1677         err = -EFAULT;
1678         if (!get_user(extensions, &user->extensions))
1679                 err = i915_user_extensions(u64_to_user_ptr(extensions),
1680                                            set_engines__extensions,
1681                                            ARRAY_SIZE(set_engines__extensions),
1682                                            &set);
1683         if (err) {
1684                 free_engines(set.engines);
1685                 return err;
1686         }
1687
1688 replace:
1689         mutex_lock(&ctx->engines_mutex);
1690         if (args->size)
1691                 i915_gem_context_set_user_engines(ctx);
1692         else
1693                 i915_gem_context_clear_user_engines(ctx);
1694         rcu_swap_protected(ctx->engines, set.engines, 1);
1695         mutex_unlock(&ctx->engines_mutex);
1696
1697         call_rcu(&set.engines->rcu, free_engines_rcu);
1698
1699         return 0;
1700 }
1701
1702 static struct i915_gem_engines *
1703 __copy_engines(struct i915_gem_engines *e)
1704 {
1705         struct i915_gem_engines *copy;
1706         unsigned int n;
1707
1708         copy = kmalloc(struct_size(e, engines, e->num_engines), GFP_KERNEL);
1709         if (!copy)
1710                 return ERR_PTR(-ENOMEM);
1711
1712         init_rcu_head(&copy->rcu);
1713         for (n = 0; n < e->num_engines; n++) {
1714                 if (e->engines[n])
1715                         copy->engines[n] = intel_context_get(e->engines[n]);
1716                 else
1717                         copy->engines[n] = NULL;
1718         }
1719         copy->num_engines = n;
1720
1721         return copy;
1722 }
1723
1724 static int
1725 get_engines(struct i915_gem_context *ctx,
1726             struct drm_i915_gem_context_param *args)
1727 {
1728         struct i915_context_param_engines __user *user;
1729         struct i915_gem_engines *e;
1730         size_t n, count, size;
1731         int err = 0;
1732
1733         err = mutex_lock_interruptible(&ctx->engines_mutex);
1734         if (err)
1735                 return err;
1736
1737         e = NULL;
1738         if (i915_gem_context_user_engines(ctx))
1739                 e = __copy_engines(i915_gem_context_engines(ctx));
1740         mutex_unlock(&ctx->engines_mutex);
1741         if (IS_ERR_OR_NULL(e)) {
1742                 args->size = 0;
1743                 return PTR_ERR_OR_ZERO(e);
1744         }
1745
1746         count = e->num_engines;
1747
1748         /* Be paranoid in case we have an impedance mismatch */
1749         if (!check_struct_size(user, engines, count, &size)) {
1750                 err = -EINVAL;
1751                 goto err_free;
1752         }
1753         if (overflows_type(size, args->size)) {
1754                 err = -EINVAL;
1755                 goto err_free;
1756         }
1757
1758         if (!args->size) {
1759                 args->size = size;
1760                 goto err_free;
1761         }
1762
1763         if (args->size < size) {
1764                 err = -EINVAL;
1765                 goto err_free;
1766         }
1767
1768         user = u64_to_user_ptr(args->value);
1769         if (!access_ok(user, size)) {
1770                 err = -EFAULT;
1771                 goto err_free;
1772         }
1773
1774         if (put_user(0, &user->extensions)) {
1775                 err = -EFAULT;
1776                 goto err_free;
1777         }
1778
1779         for (n = 0; n < count; n++) {
1780                 struct i915_engine_class_instance ci = {
1781                         .engine_class = I915_ENGINE_CLASS_INVALID,
1782                         .engine_instance = I915_ENGINE_CLASS_INVALID_NONE,
1783                 };
1784
1785                 if (e->engines[n]) {
1786                         ci.engine_class = e->engines[n]->engine->uabi_class;
1787                         ci.engine_instance = e->engines[n]->engine->instance;
1788                 }
1789
1790                 if (copy_to_user(&user->engines[n], &ci, sizeof(ci))) {
1791                         err = -EFAULT;
1792                         goto err_free;
1793                 }
1794         }
1795
1796         args->size = size;
1797
1798 err_free:
1799         free_engines(e);
1800         return err;
1801 }
1802
1803 static int ctx_setparam(struct drm_i915_file_private *fpriv,
1804                         struct i915_gem_context *ctx,
1805                         struct drm_i915_gem_context_param *args)
1806 {
1807         int ret = 0;
1808
1809         switch (args->param) {
1810         case I915_CONTEXT_PARAM_NO_ZEROMAP:
1811                 if (args->size)
1812                         ret = -EINVAL;
1813                 else if (args->value)
1814                         set_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
1815                 else
1816                         clear_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
1817                 break;
1818
1819         case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
1820                 if (args->size)
1821                         ret = -EINVAL;
1822                 else if (args->value)
1823                         i915_gem_context_set_no_error_capture(ctx);
1824                 else
1825                         i915_gem_context_clear_no_error_capture(ctx);
1826                 break;
1827
1828         case I915_CONTEXT_PARAM_BANNABLE:
1829                 if (args->size)
1830                         ret = -EINVAL;
1831                 else if (!capable(CAP_SYS_ADMIN) && !args->value)
1832                         ret = -EPERM;
1833                 else if (args->value)
1834                         i915_gem_context_set_bannable(ctx);
1835                 else
1836                         i915_gem_context_clear_bannable(ctx);
1837                 break;
1838
1839         case I915_CONTEXT_PARAM_RECOVERABLE:
1840                 if (args->size)
1841                         ret = -EINVAL;
1842                 else if (args->value)
1843                         i915_gem_context_set_recoverable(ctx);
1844                 else
1845                         i915_gem_context_clear_recoverable(ctx);
1846                 break;
1847
1848         case I915_CONTEXT_PARAM_PRIORITY:
1849                 {
1850                         s64 priority = args->value;
1851
1852                         if (args->size)
1853                                 ret = -EINVAL;
1854                         else if (!(ctx->i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
1855                                 ret = -ENODEV;
1856                         else if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
1857                                  priority < I915_CONTEXT_MIN_USER_PRIORITY)
1858                                 ret = -EINVAL;
1859                         else if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
1860                                  !capable(CAP_SYS_NICE))
1861                                 ret = -EPERM;
1862                         else
1863                                 ctx->sched.priority =
1864                                         I915_USER_PRIORITY(priority);
1865                 }
1866                 break;
1867
1868         case I915_CONTEXT_PARAM_SSEU:
1869                 ret = set_sseu(ctx, args);
1870                 break;
1871
1872         case I915_CONTEXT_PARAM_VM:
1873                 ret = set_ppgtt(fpriv, ctx, args);
1874                 break;
1875
1876         case I915_CONTEXT_PARAM_ENGINES:
1877                 ret = set_engines(ctx, args);
1878                 break;
1879
1880         case I915_CONTEXT_PARAM_BAN_PERIOD:
1881         default:
1882                 ret = -EINVAL;
1883                 break;
1884         }
1885
1886         return ret;
1887 }
1888
1889 struct create_ext {
1890         struct i915_gem_context *ctx;
1891         struct drm_i915_file_private *fpriv;
1892 };
1893
1894 static int create_setparam(struct i915_user_extension __user *ext, void *data)
1895 {
1896         struct drm_i915_gem_context_create_ext_setparam local;
1897         const struct create_ext *arg = data;
1898
1899         if (copy_from_user(&local, ext, sizeof(local)))
1900                 return -EFAULT;
1901
1902         if (local.param.ctx_id)
1903                 return -EINVAL;
1904
1905         return ctx_setparam(arg->fpriv, arg->ctx, &local.param);
1906 }
1907
1908 static int clone_engines(struct i915_gem_context *dst,
1909                          struct i915_gem_context *src)
1910 {
1911         struct i915_gem_engines *e = i915_gem_context_lock_engines(src);
1912         struct i915_gem_engines *clone;
1913         bool user_engines;
1914         unsigned long n;
1915
1916         clone = kmalloc(struct_size(e, engines, e->num_engines), GFP_KERNEL);
1917         if (!clone)
1918                 goto err_unlock;
1919
1920         init_rcu_head(&clone->rcu);
1921         for (n = 0; n < e->num_engines; n++) {
1922                 struct intel_engine_cs *engine;
1923
1924                 if (!e->engines[n]) {
1925                         clone->engines[n] = NULL;
1926                         continue;
1927                 }
1928                 engine = e->engines[n]->engine;
1929
1930                 /*
1931                  * Virtual engines are singletons; they can only exist
1932                  * inside a single context, because they embed their
1933                  * HW context... As each virtual context implies a single
1934                  * timeline (each engine can only dequeue a single request
1935                  * at any time), it would be surprising for two contexts
1936                  * to use the same engine. So let's create a copy of
1937                  * the virtual engine instead.
1938                  */
1939                 if (intel_engine_is_virtual(engine))
1940                         clone->engines[n] =
1941                                 intel_execlists_clone_virtual(dst, engine);
1942                 else
1943                         clone->engines[n] = intel_context_create(dst, engine);
1944                 if (IS_ERR_OR_NULL(clone->engines[n])) {
1945                         __free_engines(clone, n);
1946                         goto err_unlock;
1947                 }
1948         }
1949         clone->num_engines = n;
1950
1951         user_engines = i915_gem_context_user_engines(src);
1952         i915_gem_context_unlock_engines(src);
1953
1954         free_engines(dst->engines);
1955         RCU_INIT_POINTER(dst->engines, clone);
1956         if (user_engines)
1957                 i915_gem_context_set_user_engines(dst);
1958         else
1959                 i915_gem_context_clear_user_engines(dst);
1960         return 0;
1961
1962 err_unlock:
1963         i915_gem_context_unlock_engines(src);
1964         return -ENOMEM;
1965 }
1966
1967 static int clone_flags(struct i915_gem_context *dst,
1968                        struct i915_gem_context *src)
1969 {
1970         dst->user_flags = src->user_flags;
1971         return 0;
1972 }
1973
1974 static int clone_schedattr(struct i915_gem_context *dst,
1975                            struct i915_gem_context *src)
1976 {
1977         dst->sched = src->sched;
1978         return 0;
1979 }
1980
1981 static int clone_sseu(struct i915_gem_context *dst,
1982                       struct i915_gem_context *src)
1983 {
1984         struct i915_gem_engines *e = i915_gem_context_lock_engines(src);
1985         struct i915_gem_engines *clone;
1986         unsigned long n;
1987         int err;
1988
1989         clone = dst->engines; /* no locking required; sole access */
1990         if (e->num_engines != clone->num_engines) {
1991                 err = -EINVAL;
1992                 goto unlock;
1993         }
1994
1995         for (n = 0; n < e->num_engines; n++) {
1996                 struct intel_context *ce = e->engines[n];
1997
1998                 if (clone->engines[n]->engine->class != ce->engine->class) {
1999                         /* Must have compatible engine maps! */
2000                         err = -EINVAL;
2001                         goto unlock;
2002                 }
2003
2004                 /* serialises with set_sseu */
2005                 err = intel_context_lock_pinned(ce);
2006                 if (err)
2007                         goto unlock;
2008
2009                 clone->engines[n]->sseu = ce->sseu;
2010                 intel_context_unlock_pinned(ce);
2011         }
2012
2013         err = 0;
2014 unlock:
2015         i915_gem_context_unlock_engines(src);
2016         return err;
2017 }
2018
2019 static int clone_timeline(struct i915_gem_context *dst,
2020                           struct i915_gem_context *src)
2021 {
2022         if (src->timeline) {
2023                 GEM_BUG_ON(src->timeline == dst->timeline);
2024
2025                 if (dst->timeline)
2026                         i915_timeline_put(dst->timeline);
2027                 dst->timeline = i915_timeline_get(src->timeline);
2028         }
2029
2030         return 0;
2031 }
2032
2033 static int clone_vm(struct i915_gem_context *dst,
2034                     struct i915_gem_context *src)
2035 {
2036         struct i915_hw_ppgtt *ppgtt;
2037
2038         rcu_read_lock();
2039         do {
2040                 ppgtt = READ_ONCE(src->ppgtt);
2041                 if (!ppgtt)
2042                         break;
2043
2044                 if (!kref_get_unless_zero(&ppgtt->ref))
2045                         continue;
2046
2047                 /*
2048                  * This ppgtt may have be reallocated between
2049                  * the read and the kref, and reassigned to a third
2050                  * context. In order to avoid inadvertent sharing
2051                  * of this ppgtt with that third context (and not
2052                  * src), we have to confirm that we have the same
2053                  * ppgtt after passing through the strong memory
2054                  * barrier implied by a successful
2055                  * kref_get_unless_zero().
2056                  *
2057                  * Once we have acquired the current ppgtt of src,
2058                  * we no longer care if it is released from src, as
2059                  * it cannot be reallocated elsewhere.
2060                  */
2061
2062                 if (ppgtt == READ_ONCE(src->ppgtt))
2063                         break;
2064
2065                 i915_ppgtt_put(ppgtt);
2066         } while (1);
2067         rcu_read_unlock();
2068
2069         if (ppgtt) {
2070                 __assign_ppgtt(dst, ppgtt);
2071                 i915_ppgtt_put(ppgtt);
2072         }
2073
2074         return 0;
2075 }
2076
2077 static int create_clone(struct i915_user_extension __user *ext, void *data)
2078 {
2079         static int (* const fn[])(struct i915_gem_context *dst,
2080                                   struct i915_gem_context *src) = {
2081 #define MAP(x, y) [ilog2(I915_CONTEXT_CLONE_##x)] = y
2082                 MAP(ENGINES, clone_engines),
2083                 MAP(FLAGS, clone_flags),
2084                 MAP(SCHEDATTR, clone_schedattr),
2085                 MAP(SSEU, clone_sseu),
2086                 MAP(TIMELINE, clone_timeline),
2087                 MAP(VM, clone_vm),
2088 #undef MAP
2089         };
2090         struct drm_i915_gem_context_create_ext_clone local;
2091         const struct create_ext *arg = data;
2092         struct i915_gem_context *dst = arg->ctx;
2093         struct i915_gem_context *src;
2094         int err, bit;
2095
2096         if (copy_from_user(&local, ext, sizeof(local)))
2097                 return -EFAULT;
2098
2099         BUILD_BUG_ON(GENMASK(BITS_PER_TYPE(local.flags) - 1, ARRAY_SIZE(fn)) !=
2100                      I915_CONTEXT_CLONE_UNKNOWN);
2101
2102         if (local.flags & I915_CONTEXT_CLONE_UNKNOWN)
2103                 return -EINVAL;
2104
2105         if (local.rsvd)
2106                 return -EINVAL;
2107
2108         rcu_read_lock();
2109         src = __i915_gem_context_lookup_rcu(arg->fpriv, local.clone_id);
2110         rcu_read_unlock();
2111         if (!src)
2112                 return -ENOENT;
2113
2114         GEM_BUG_ON(src == dst);
2115
2116         for (bit = 0; bit < ARRAY_SIZE(fn); bit++) {
2117                 if (!(local.flags & BIT(bit)))
2118                         continue;
2119
2120                 err = fn[bit](dst, src);
2121                 if (err)
2122                         return err;
2123         }
2124
2125         return 0;
2126 }
2127
2128 static const i915_user_extension_fn create_extensions[] = {
2129         [I915_CONTEXT_CREATE_EXT_SETPARAM] = create_setparam,
2130         [I915_CONTEXT_CREATE_EXT_CLONE] = create_clone,
2131 };
2132
2133 static bool client_is_banned(struct drm_i915_file_private *file_priv)
2134 {
2135         return atomic_read(&file_priv->ban_score) >= I915_CLIENT_SCORE_BANNED;
2136 }
2137
2138 int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
2139                                   struct drm_file *file)
2140 {
2141         struct drm_i915_private *i915 = to_i915(dev);
2142         struct drm_i915_gem_context_create_ext *args = data;
2143         struct create_ext ext_data;
2144         int ret;
2145
2146         if (!DRIVER_CAPS(i915)->has_logical_contexts)
2147                 return -ENODEV;
2148
2149         if (args->flags & I915_CONTEXT_CREATE_FLAGS_UNKNOWN)
2150                 return -EINVAL;
2151
2152         ret = i915_terminally_wedged(i915);
2153         if (ret)
2154                 return ret;
2155
2156         ext_data.fpriv = file->driver_priv;
2157         if (client_is_banned(ext_data.fpriv)) {
2158                 DRM_DEBUG("client %s[%d] banned from creating ctx\n",
2159                           current->comm,
2160                           pid_nr(get_task_pid(current, PIDTYPE_PID)));
2161                 return -EIO;
2162         }
2163
2164         ret = i915_mutex_lock_interruptible(dev);
2165         if (ret)
2166                 return ret;
2167
2168         ext_data.ctx = i915_gem_create_context(i915, args->flags);
2169         mutex_unlock(&dev->struct_mutex);
2170         if (IS_ERR(ext_data.ctx))
2171                 return PTR_ERR(ext_data.ctx);
2172
2173         if (args->flags & I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS) {
2174                 ret = i915_user_extensions(u64_to_user_ptr(args->extensions),
2175                                            create_extensions,
2176                                            ARRAY_SIZE(create_extensions),
2177                                            &ext_data);
2178                 if (ret)
2179                         goto err_ctx;
2180         }
2181
2182         ret = gem_context_register(ext_data.ctx, ext_data.fpriv);
2183         if (ret < 0)
2184                 goto err_ctx;
2185
2186         args->ctx_id = ret;
2187         DRM_DEBUG("HW context %d created\n", args->ctx_id);
2188
2189         return 0;
2190
2191 err_ctx:
2192         context_close(ext_data.ctx);
2193         return ret;
2194 }
2195
2196 int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
2197                                    struct drm_file *file)
2198 {
2199         struct drm_i915_gem_context_destroy *args = data;
2200         struct drm_i915_file_private *file_priv = file->driver_priv;
2201         struct i915_gem_context *ctx;
2202
2203         if (args->pad != 0)
2204                 return -EINVAL;
2205
2206         if (!args->ctx_id)
2207                 return -ENOENT;
2208
2209         if (mutex_lock_interruptible(&file_priv->context_idr_lock))
2210                 return -EINTR;
2211
2212         ctx = idr_remove(&file_priv->context_idr, args->ctx_id);
2213         mutex_unlock(&file_priv->context_idr_lock);
2214         if (!ctx)
2215                 return -ENOENT;
2216
2217         context_close(ctx);
2218         return 0;
2219 }
2220
2221 static int get_sseu(struct i915_gem_context *ctx,
2222                     struct drm_i915_gem_context_param *args)
2223 {
2224         struct drm_i915_gem_context_param_sseu user_sseu;
2225         struct intel_context *ce;
2226         unsigned long lookup;
2227         int err;
2228
2229         if (args->size == 0)
2230                 goto out;
2231         else if (args->size < sizeof(user_sseu))
2232                 return -EINVAL;
2233
2234         if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
2235                            sizeof(user_sseu)))
2236                 return -EFAULT;
2237
2238         if (user_sseu.rsvd)
2239                 return -EINVAL;
2240
2241         if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
2242                 return -EINVAL;
2243
2244         lookup = 0;
2245         if (user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX)
2246                 lookup |= LOOKUP_USER_INDEX;
2247
2248         ce = lookup_user_engine(ctx, lookup, &user_sseu.engine);
2249         if (IS_ERR(ce))
2250                 return PTR_ERR(ce);
2251
2252         err = intel_context_lock_pinned(ce); /* serialises with set_sseu */
2253         if (err) {
2254                 intel_context_put(ce);
2255                 return err;
2256         }
2257
2258         user_sseu.slice_mask = ce->sseu.slice_mask;
2259         user_sseu.subslice_mask = ce->sseu.subslice_mask;
2260         user_sseu.min_eus_per_subslice = ce->sseu.min_eus_per_subslice;
2261         user_sseu.max_eus_per_subslice = ce->sseu.max_eus_per_subslice;
2262
2263         intel_context_unlock_pinned(ce);
2264         intel_context_put(ce);
2265
2266         if (copy_to_user(u64_to_user_ptr(args->value), &user_sseu,
2267                          sizeof(user_sseu)))
2268                 return -EFAULT;
2269
2270 out:
2271         args->size = sizeof(user_sseu);
2272
2273         return 0;
2274 }
2275
2276 int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
2277                                     struct drm_file *file)
2278 {
2279         struct drm_i915_file_private *file_priv = file->driver_priv;
2280         struct drm_i915_gem_context_param *args = data;
2281         struct i915_gem_context *ctx;
2282         int ret = 0;
2283
2284         ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
2285         if (!ctx)
2286                 return -ENOENT;
2287
2288         switch (args->param) {
2289         case I915_CONTEXT_PARAM_NO_ZEROMAP:
2290                 args->size = 0;
2291                 args->value = test_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
2292                 break;
2293
2294         case I915_CONTEXT_PARAM_GTT_SIZE:
2295                 args->size = 0;
2296                 if (ctx->ppgtt)
2297                         args->value = ctx->ppgtt->vm.total;
2298                 else if (to_i915(dev)->mm.aliasing_ppgtt)
2299                         args->value = to_i915(dev)->mm.aliasing_ppgtt->vm.total;
2300                 else
2301                         args->value = to_i915(dev)->ggtt.vm.total;
2302                 break;
2303
2304         case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
2305                 args->size = 0;
2306                 args->value = i915_gem_context_no_error_capture(ctx);
2307                 break;
2308
2309         case I915_CONTEXT_PARAM_BANNABLE:
2310                 args->size = 0;
2311                 args->value = i915_gem_context_is_bannable(ctx);
2312                 break;
2313
2314         case I915_CONTEXT_PARAM_RECOVERABLE:
2315                 args->size = 0;
2316                 args->value = i915_gem_context_is_recoverable(ctx);
2317                 break;
2318
2319         case I915_CONTEXT_PARAM_PRIORITY:
2320                 args->size = 0;
2321                 args->value = ctx->sched.priority >> I915_USER_PRIORITY_SHIFT;
2322                 break;
2323
2324         case I915_CONTEXT_PARAM_SSEU:
2325                 ret = get_sseu(ctx, args);
2326                 break;
2327
2328         case I915_CONTEXT_PARAM_VM:
2329                 ret = get_ppgtt(file_priv, ctx, args);
2330                 break;
2331
2332         case I915_CONTEXT_PARAM_ENGINES:
2333                 ret = get_engines(ctx, args);
2334                 break;
2335
2336         case I915_CONTEXT_PARAM_BAN_PERIOD:
2337         default:
2338                 ret = -EINVAL;
2339                 break;
2340         }
2341
2342         i915_gem_context_put(ctx);
2343         return ret;
2344 }
2345
2346 int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
2347                                     struct drm_file *file)
2348 {
2349         struct drm_i915_file_private *file_priv = file->driver_priv;
2350         struct drm_i915_gem_context_param *args = data;
2351         struct i915_gem_context *ctx;
2352         int ret;
2353
2354         ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
2355         if (!ctx)
2356                 return -ENOENT;
2357
2358         ret = ctx_setparam(file_priv, ctx, args);
2359
2360         i915_gem_context_put(ctx);
2361         return ret;
2362 }
2363
2364 int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
2365                                        void *data, struct drm_file *file)
2366 {
2367         struct drm_i915_private *dev_priv = to_i915(dev);
2368         struct drm_i915_reset_stats *args = data;
2369         struct i915_gem_context *ctx;
2370         int ret;
2371
2372         if (args->flags || args->pad)
2373                 return -EINVAL;
2374
2375         ret = -ENOENT;
2376         rcu_read_lock();
2377         ctx = __i915_gem_context_lookup_rcu(file->driver_priv, args->ctx_id);
2378         if (!ctx)
2379                 goto out;
2380
2381         /*
2382          * We opt for unserialised reads here. This may result in tearing
2383          * in the extremely unlikely event of a GPU hang on this context
2384          * as we are querying them. If we need that extra layer of protection,
2385          * we should wrap the hangstats with a seqlock.
2386          */
2387
2388         if (capable(CAP_SYS_ADMIN))
2389                 args->reset_count = i915_reset_count(&dev_priv->gpu_error);
2390         else
2391                 args->reset_count = 0;
2392
2393         args->batch_active = atomic_read(&ctx->guilty_count);
2394         args->batch_pending = atomic_read(&ctx->active_count);
2395
2396         ret = 0;
2397 out:
2398         rcu_read_unlock();
2399         return ret;
2400 }
2401
2402 int __i915_gem_context_pin_hw_id(struct i915_gem_context *ctx)
2403 {
2404         struct drm_i915_private *i915 = ctx->i915;
2405         int err = 0;
2406
2407         mutex_lock(&i915->contexts.mutex);
2408
2409         GEM_BUG_ON(i915_gem_context_is_closed(ctx));
2410
2411         if (list_empty(&ctx->hw_id_link)) {
2412                 GEM_BUG_ON(atomic_read(&ctx->hw_id_pin_count));
2413
2414                 err = assign_hw_id(i915, &ctx->hw_id);
2415                 if (err)
2416                         goto out_unlock;
2417
2418                 list_add_tail(&ctx->hw_id_link, &i915->contexts.hw_id_list);
2419         }
2420
2421         GEM_BUG_ON(atomic_read(&ctx->hw_id_pin_count) == ~0u);
2422         atomic_inc(&ctx->hw_id_pin_count);
2423
2424 out_unlock:
2425         mutex_unlock(&i915->contexts.mutex);
2426         return err;
2427 }
2428
2429 /* GEM context-engines iterator: for_each_gem_engine() */
2430 struct intel_context *
2431 i915_gem_engines_iter_next(struct i915_gem_engines_iter *it)
2432 {
2433         const struct i915_gem_engines *e = it->engines;
2434         struct intel_context *ctx;
2435
2436         do {
2437                 if (it->idx >= e->num_engines)
2438                         return NULL;
2439
2440                 ctx = e->engines[it->idx++];
2441         } while (!ctx);
2442
2443         return ctx;
2444 }
2445
2446 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
2447 #include "selftests/mock_context.c"
2448 #include "selftests/i915_gem_context.c"
2449 #endif
2450
2451 static void i915_global_gem_context_shrink(void)
2452 {
2453         kmem_cache_shrink(global.slab_luts);
2454 }
2455
2456 static void i915_global_gem_context_exit(void)
2457 {
2458         kmem_cache_destroy(global.slab_luts);
2459 }
2460
2461 static struct i915_global_gem_context global = { {
2462         .shrink = i915_global_gem_context_shrink,
2463         .exit = i915_global_gem_context_exit,
2464 } };
2465
2466 int __init i915_global_gem_context_init(void)
2467 {
2468         global.slab_luts = KMEM_CACHE(i915_lut_handle, 0);
2469         if (!global.slab_luts)
2470                 return -ENOMEM;
2471
2472         i915_global_register(&global.base);
2473         return 0;
2474 }