drivers/gpu/drm/i915/gem/i915_gem_context.c

   1 /*
   2  * SPDX-License-Identifier: MIT
   3  *
   4  * Copyright © 2011-2012 Intel Corporation
   5  */
   6
   7 /*
   8  * This file implements HW context support. On gen5+ a HW context consists of an
   9  * opaque GPU object which is referenced at times of context saves and restores.
  10  * With RC6 enabled, the context is also referenced as the GPU enters and exists
  11  * from RC6 (GPU has it's own internal power context, except on gen5). Though
  12  * something like a context does exist for the media ring, the code only
  13  * supports contexts for the render ring.
  14  *
  15  * In software, there is a distinction between contexts created by the user,
  16  * and the default HW context. The default HW context is used by GPU clients
  17  * that do not request setup of their own hardware context. The default
  18  * context's state is never restored to help prevent programming errors. This
  19  * would happen if a client ran and piggy-backed off another clients GPU state.
  20  * The default context only exists to give the GPU some offset to load as the
  21  * current to invoke a save of the context we actually care about. In fact, the
  22  * code could likely be constructed, albeit in a more complicated fashion, to
  23  * never use the default context, though that limits the driver's ability to
  24  * swap out, and/or destroy other contexts.
  25  *
  26  * All other contexts are created as a request by the GPU client. These contexts
  27  * store GPU state, and thus allow GPU clients to not re-emit state (and
  28  * potentially query certain state) at any time. The kernel driver makes
  29  * certain that the appropriate commands are inserted.
  30  *
  31  * The context life cycle is semi-complicated in that context BOs may live
  32  * longer than the context itself because of the way the hardware, and object
  33  * tracking works. Below is a very crude representation of the state machine
  34  * describing the context life.
  35  *                                         refcount     pincount     active
  36  * S0: initial state                          0            0           0
  37  * S1: context created                        1            0           0
  38  * S2: context is currently running           2            1           X
  39  * S3: GPU referenced, but not current        2            0           1
  40  * S4: context is current, but destroyed      1            1           0
  41  * S5: like S3, but destroyed                 1            0           1
  42  *
  43  * The most common (but not all) transitions:
  44  * S0->S1: client creates a context
  45  * S1->S2: client submits execbuf with context
  46  * S2->S3: other clients submits execbuf with context
  47  * S3->S1: context object was retired
  48  * S3->S2: clients submits another execbuf
  49  * S2->S4: context destroy called with current context
  50  * S3->S5->S0: destroy path
  51  * S4->S5->S0: destroy path on current context
  52  *
  53  * There are two confusing terms used above:
  54  *  The "current context" means the context which is currently running on the
  55  *  GPU. The GPU has loaded its state already and has stored away the gtt
  56  *  offset of the BO. The GPU is not actively referencing the data at this
  57  *  offset, but it will on the next context switch. The only way to avoid this
  58  *  is to do a GPU reset.
  59  *
  60  *  An "active context' is one which was previously the "current context" and is
  61  *  on the active list waiting for the next context switch to occur. Until this
  62  *  happens, the object must remain at the same gtt offset. It is therefore
  63  *  possible to destroy a context, but it is still active.
  64  *
  65  */
  66
  67 #include <linux/log2.h>
  68 #include <linux/nospec.h>
  69
  70 #include <drm/i915_drm.h>
  71
  72 #include "gt/intel_lrc_reg.h"
  73
  74 #include "i915_gem_context.h"
  75 #include "i915_globals.h"
  76 #include "i915_trace.h"
  77 #include "i915_user_extensions.h"
  78
  79 #define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1
  80
  81 static struct i915_global_gem_context {
  82         struct i915_global base;
  83         struct kmem_cache *slab_luts;
  84 } global;
  85
  86 struct i915_lut_handle *i915_lut_handle_alloc(void)
  87 {
  88         return kmem_cache_alloc(global.slab_luts, GFP_KERNEL);
  89 }
  90
  91 void i915_lut_handle_free(struct i915_lut_handle *lut)
  92 {
  93         return kmem_cache_free(global.slab_luts, lut);
  94 }
  95
  96 static void lut_close(struct i915_gem_context *ctx)
  97 {
  98         struct radix_tree_iter iter;
  99         void __rcu **slot;
 100
 101         lockdep_assert_held(&ctx->mutex);
 102
 103         rcu_read_lock();
 104         radix_tree_for_each_slot(slot, &ctx->handles_vma, &iter, 0) {
 105                 struct i915_vma *vma = rcu_dereference_raw(*slot);
 106                 struct drm_i915_gem_object *obj = vma->obj;
 107                 struct i915_lut_handle *lut;
 108
 109                 if (!kref_get_unless_zero(&obj->base.refcount))
 110                         continue;
 111
 112                 rcu_read_unlock();
 113                 i915_gem_object_lock(obj);
 114                 list_for_each_entry(lut, &obj->lut_list, obj_link) {
 115                         if (lut->ctx != ctx)
 116                                 continue;
 117
 118                         if (lut->handle != iter.index)
 119                                 continue;
 120
 121                         list_del(&lut->obj_link);
 122                         break;
 123                 }
 124                 i915_gem_object_unlock(obj);
 125                 rcu_read_lock();
 126
 127                 if (&lut->obj_link != &obj->lut_list) {
 128                         i915_lut_handle_free(lut);
 129                         radix_tree_iter_delete(&ctx->handles_vma, &iter, slot);
 130                         if (atomic_dec_and_test(&vma->open_count) &&
 131                             !i915_vma_is_ggtt(vma))
 132                                 i915_vma_close(vma);
 133                         i915_gem_object_put(obj);
 134                 }
 135
 136                 i915_gem_object_put(obj);
 137         }
 138         rcu_read_unlock();
 139 }
 140
 141 static struct intel_context *
 142 lookup_user_engine(struct i915_gem_context *ctx,
 143                    unsigned long flags,
 144                    const struct i915_engine_class_instance *ci)
 145 #define LOOKUP_USER_INDEX BIT(0)
 146 {
 147         int idx;
 148
 149         if (!!(flags & LOOKUP_USER_INDEX) != i915_gem_context_user_engines(ctx))
 150                 return ERR_PTR(-EINVAL);
 151
 152         if (!i915_gem_context_user_engines(ctx)) {
 153                 struct intel_engine_cs *engine;
 154
 155                 engine = intel_engine_lookup_user(ctx->i915,
 156                                                   ci->engine_class,
 157                                                   ci->engine_instance);
 158                 if (!engine)
 159                         return ERR_PTR(-EINVAL);
 160
 161                 idx = engine->id;
 162         } else {
 163                 idx = ci->engine_instance;
 164         }
 165
 166         return i915_gem_context_get_engine(ctx, idx);
 167 }
 168
 169 static inline int new_hw_id(struct drm_i915_private *i915, gfp_t gfp)
 170 {
 171         unsigned int max;
 172
 173         lockdep_assert_held(&i915->contexts.mutex);
 174
 175         if (INTEL_GEN(i915) >= 11)
 176                 max = GEN11_MAX_CONTEXT_HW_ID;
 177         else if (USES_GUC_SUBMISSION(i915))
 178                 /*
 179                  * When using GuC in proxy submission, GuC consumes the
 180                  * highest bit in the context id to indicate proxy submission.
 181                  */
 182                 max = MAX_GUC_CONTEXT_HW_ID;
 183         else
 184                 max = MAX_CONTEXT_HW_ID;
 185
 186         return ida_simple_get(&i915->contexts.hw_ida, 0, max, gfp);
 187 }
 188
 189 static int steal_hw_id(struct drm_i915_private *i915)
 190 {
 191         struct i915_gem_context *ctx, *cn;
 192         LIST_HEAD(pinned);
 193         int id = -ENOSPC;
 194
 195         lockdep_assert_held(&i915->contexts.mutex);
 196
 197         list_for_each_entry_safe(ctx, cn,
 198                                  &i915->contexts.hw_id_list, hw_id_link) {
 199                 if (atomic_read(&ctx->hw_id_pin_count)) {
 200                         list_move_tail(&ctx->hw_id_link, &pinned);
 201                         continue;
 202                 }
 203
 204                 GEM_BUG_ON(!ctx->hw_id); /* perma-pinned kernel context */
 205                 list_del_init(&ctx->hw_id_link);
 206                 id = ctx->hw_id;
 207                 break;
 208         }
 209
 210         /*
 211          * Remember how far we got up on the last repossesion scan, so the
 212          * list is kept in a "least recently scanned" order.
 213          */
 214         list_splice_tail(&pinned, &i915->contexts.hw_id_list);
 215         return id;
 216 }
 217
 218 static int assign_hw_id(struct drm_i915_private *i915, unsigned int *out)
 219 {
 220         int ret;
 221
 222         lockdep_assert_held(&i915->contexts.mutex);
 223
 224         /*
 225          * We prefer to steal/stall ourselves and our users over that of the
 226          * entire system. That may be a little unfair to our users, and
 227          * even hurt high priority clients. The choice is whether to oomkill
 228          * something else, or steal a context id.
 229          */
 230         ret = new_hw_id(i915, GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN);
 231         if (unlikely(ret < 0)) {
 232                 ret = steal_hw_id(i915);
 233                 if (ret < 0) /* once again for the correct errno code */
 234                         ret = new_hw_id(i915, GFP_KERNEL);
 235                 if (ret < 0)
 236                         return ret;
 237         }
 238
 239         *out = ret;
 240         return 0;
 241 }
 242
 243 static void release_hw_id(struct i915_gem_context *ctx)
 244 {
 245         struct drm_i915_private *i915 = ctx->i915;
 246
 247         if (list_empty(&ctx->hw_id_link))
 248                 return;
 249
 250         mutex_lock(&i915->contexts.mutex);
 251         if (!list_empty(&ctx->hw_id_link)) {
 252                 ida_simple_remove(&i915->contexts.hw_ida, ctx->hw_id);
 253                 list_del_init(&ctx->hw_id_link);
 254         }
 255         mutex_unlock(&i915->contexts.mutex);
 256 }
 257
 258 static void __free_engines(struct i915_gem_engines *e, unsigned int count)
 259 {
 260         while (count--) {
 261                 if (!e->engines[count])
 262                         continue;
 263
 264                 intel_context_put(e->engines[count]);
 265         }
 266         kfree(e);
 267 }
 268
 269 static void free_engines(struct i915_gem_engines *e)
 270 {
 271         __free_engines(e, e->num_engines);
 272 }
 273
 274 static void free_engines_rcu(struct rcu_head *rcu)
 275 {
 276         free_engines(container_of(rcu, struct i915_gem_engines, rcu));
 277 }
 278
 279 static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx)
 280 {
 281         struct intel_engine_cs *engine;
 282         struct i915_gem_engines *e;
 283         enum intel_engine_id id;
 284
 285         e = kzalloc(struct_size(e, engines, I915_NUM_ENGINES), GFP_KERNEL);
 286         if (!e)
 287                 return ERR_PTR(-ENOMEM);
 288
 289         init_rcu_head(&e->rcu);
 290         for_each_engine(engine, ctx->i915, id) {
 291                 struct intel_context *ce;
 292
 293                 ce = intel_context_create(ctx, engine);
 294                 if (IS_ERR(ce)) {
 295                         __free_engines(e, id);
 296                         return ERR_CAST(ce);
 297                 }
 298
 299                 e->engines[id] = ce;
 300         }
 301         e->num_engines = id;
 302
 303         return e;
 304 }
 305
 306 static void i915_gem_context_free(struct i915_gem_context *ctx)
 307 {
 308         lockdep_assert_held(&ctx->i915->drm.struct_mutex);
 309         GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
 310
 311         release_hw_id(ctx);
 312         if (ctx->vm)
 313                 i915_vm_put(ctx->vm);
 314
 315         free_engines(rcu_access_pointer(ctx->engines));
 316         mutex_destroy(&ctx->engines_mutex);
 317
 318         if (ctx->timeline)
 319                 i915_timeline_put(ctx->timeline);
 320
 321         kfree(ctx->name);
 322         put_pid(ctx->pid);
 323
 324         list_del(&ctx->link);
 325         mutex_destroy(&ctx->mutex);
 326
 327         kfree_rcu(ctx, rcu);
 328 }
 329
 330 static void contexts_free(struct drm_i915_private *i915)
 331 {
 332         struct llist_node *freed = llist_del_all(&i915->contexts.free_list);
 333         struct i915_gem_context *ctx, *cn;
 334
 335         lockdep_assert_held(&i915->drm.struct_mutex);
 336
 337         llist_for_each_entry_safe(ctx, cn, freed, free_link)
 338                 i915_gem_context_free(ctx);
 339 }
 340
 341 static void contexts_free_first(struct drm_i915_private *i915)
 342 {
 343         struct i915_gem_context *ctx;
 344         struct llist_node *freed;
 345
 346         lockdep_assert_held(&i915->drm.struct_mutex);
 347
 348         freed = llist_del_first(&i915->contexts.free_list);
 349         if (!freed)
 350                 return;
 351
 352         ctx = container_of(freed, typeof(*ctx), free_link);
 353         i915_gem_context_free(ctx);
 354 }
 355
 356 static void contexts_free_worker(struct work_struct *work)
 357 {
 358         struct drm_i915_private *i915 =
 359                 container_of(work, typeof(*i915), contexts.free_work);
 360
 361         mutex_lock(&i915->drm.struct_mutex);
 362         contexts_free(i915);
 363         mutex_unlock(&i915->drm.struct_mutex);
 364 }
 365
 366 void i915_gem_context_release(struct kref *ref)
 367 {
 368         struct i915_gem_context *ctx = container_of(ref, typeof(*ctx), ref);
 369         struct drm_i915_private *i915 = ctx->i915;
 370
 371         trace_i915_context_free(ctx);
 372         if (llist_add(&ctx->free_link, &i915->contexts.free_list))
 373                 queue_work(i915->wq, &i915->contexts.free_work);
 374 }
 375
 376 static void context_close(struct i915_gem_context *ctx)
 377 {
 378         mutex_lock(&ctx->mutex);
 379
 380         i915_gem_context_set_closed(ctx);
 381         ctx->file_priv = ERR_PTR(-EBADF);
 382
 383         /*
 384          * This context will never again be assinged to HW, so we can
 385          * reuse its ID for the next context.
 386          */
 387         release_hw_id(ctx);
 388
 389         /*
 390          * The LUT uses the VMA as a backpointer to unref the object,
 391          * so we need to clear the LUT before we close all the VMA (inside
 392          * the ppgtt).
 393          */
 394         lut_close(ctx);
 395
 396         mutex_unlock(&ctx->mutex);
 397         i915_gem_context_put(ctx);
 398 }
 399
 400 static u32 default_desc_template(const struct drm_i915_private *i915,
 401                                  const struct i915_address_space *vm)
 402 {
 403         u32 address_mode;
 404         u32 desc;
 405
 406         desc = GEN8_CTX_VALID | GEN8_CTX_PRIVILEGE;
 407
 408         address_mode = INTEL_LEGACY_32B_CONTEXT;
 409         if (vm && i915_vm_is_4lvl(vm))
 410                 address_mode = INTEL_LEGACY_64B_CONTEXT;
 411         desc |= address_mode << GEN8_CTX_ADDRESSING_MODE_SHIFT;
 412
 413         if (IS_GEN(i915, 8))
 414                 desc |= GEN8_CTX_L3LLC_COHERENT;
 415
 416         /* TODO: WaDisableLiteRestore when we start using semaphore
 417          * signalling between Command Streamers
 418          * ring->ctx_desc_template |= GEN8_CTX_FORCE_RESTORE;
 419          */
 420
 421         return desc;
 422 }
 423
 424 static struct i915_gem_context *
 425 __create_context(struct drm_i915_private *i915)
 426 {
 427         struct i915_gem_context *ctx;
 428         struct i915_gem_engines *e;
 429         int err;
 430         int i;
 431
 432         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 433         if (!ctx)
 434                 return ERR_PTR(-ENOMEM);
 435
 436         kref_init(&ctx->ref);
 437         list_add_tail(&ctx->link, &i915->contexts.list);
 438         ctx->i915 = i915;
 439         ctx->sched.priority = I915_USER_PRIORITY(I915_PRIORITY_NORMAL);
 440         mutex_init(&ctx->mutex);
 441
 442         mutex_init(&ctx->engines_mutex);
 443         e = default_engines(ctx);
 444         if (IS_ERR(e)) {
 445                 err = PTR_ERR(e);
 446                 goto err_free;
 447         }
 448         RCU_INIT_POINTER(ctx->engines, e);
 449
 450         INIT_RADIX_TREE(&ctx->handles_vma, GFP_KERNEL);
 451         INIT_LIST_HEAD(&ctx->hw_id_link);
 452
 453         /* NB: Mark all slices as needing a remap so that when the context first
 454          * loads it will restore whatever remap state already exists. If there
 455          * is no remap info, it will be a NOP. */
 456         ctx->remap_slice = ALL_L3_SLICES(i915);
 457
 458         i915_gem_context_set_bannable(ctx);
 459         i915_gem_context_set_recoverable(ctx);
 460
 461         ctx->ring_size = 4 * PAGE_SIZE;
 462         ctx->desc_template =
 463                 default_desc_template(i915, &i915->mm.aliasing_ppgtt->vm);
 464
 465         for (i = 0; i < ARRAY_SIZE(ctx->hang_timestamp); i++)
 466                 ctx->hang_timestamp[i] = jiffies - CONTEXT_FAST_HANG_JIFFIES;
 467
 468         return ctx;
 469
 470 err_free:
 471         kfree(ctx);
 472         return ERR_PTR(err);
 473 }
 474
 475 static struct i915_address_space *
 476 __set_ppgtt(struct i915_gem_context *ctx, struct i915_address_space *vm)
 477 {
 478         struct i915_address_space *old = ctx->vm;
 479
 480         ctx->vm = i915_vm_get(vm);
 481         ctx->desc_template = default_desc_template(ctx->i915, vm);
 482
 483         return old;
 484 }
 485
 486 static void __assign_ppgtt(struct i915_gem_context *ctx,
 487                            struct i915_address_space *vm)
 488 {
 489         if (vm == ctx->vm)
 490                 return;
 491
 492         vm = __set_ppgtt(ctx, vm);
 493         if (vm)
 494                 i915_vm_put(vm);
 495 }
 496
 497 static struct i915_gem_context *
 498 i915_gem_create_context(struct drm_i915_private *dev_priv, unsigned int flags)
 499 {
 500         struct i915_gem_context *ctx;
 501
 502         lockdep_assert_held(&dev_priv->drm.struct_mutex);
 503
 504         if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE &&
 505             !HAS_EXECLISTS(dev_priv))
 506                 return ERR_PTR(-EINVAL);
 507
 508         /* Reap the most stale context */
 509         contexts_free_first(dev_priv);
 510
 511         ctx = __create_context(dev_priv);
 512         if (IS_ERR(ctx))
 513                 return ctx;
 514
 515         if (HAS_FULL_PPGTT(dev_priv)) {
 516                 struct i915_hw_ppgtt *ppgtt;
 517
 518                 ppgtt = i915_ppgtt_create(dev_priv);
 519                 if (IS_ERR(ppgtt)) {
 520                         DRM_DEBUG_DRIVER("PPGTT setup failed (%ld)\n",
 521                                          PTR_ERR(ppgtt));
 522                         context_close(ctx);
 523                         return ERR_CAST(ppgtt);
 524                 }
 525
 526                 __assign_ppgtt(ctx, &ppgtt->vm);
 527                 i915_vm_put(&ppgtt->vm);
 528         }
 529
 530         if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE) {
 531                 struct i915_timeline *timeline;
 532
 533                 timeline = i915_timeline_create(dev_priv, NULL);
 534                 if (IS_ERR(timeline)) {
 535                         context_close(ctx);
 536                         return ERR_CAST(timeline);
 537                 }
 538
 539                 ctx->timeline = timeline;
 540         }
 541
 542         trace_i915_context_create(ctx);
 543
 544         return ctx;
 545 }
 546
 547 /**
 548  * i915_gem_context_create_gvt - create a GVT GEM context
 549  * @dev: drm device *
 550  *
 551  * This function is used to create a GVT specific GEM context.
 552  *
 553  * Returns:
 554  * pointer to i915_gem_context on success, error pointer if failed
 555  *
 556  */
 557 struct i915_gem_context *
 558 i915_gem_context_create_gvt(struct drm_device *dev)
 559 {
 560         struct i915_gem_context *ctx;
 561         int ret;
 562
 563         if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
 564                 return ERR_PTR(-ENODEV);
 565
 566         ret = i915_mutex_lock_interruptible(dev);
 567         if (ret)
 568                 return ERR_PTR(ret);
 569
 570         ctx = i915_gem_create_context(to_i915(dev), 0);
 571         if (IS_ERR(ctx))
 572                 goto out;
 573
 574         ret = i915_gem_context_pin_hw_id(ctx);
 575         if (ret) {
 576                 context_close(ctx);
 577                 ctx = ERR_PTR(ret);
 578                 goto out;
 579         }
 580
 581         ctx->file_priv = ERR_PTR(-EBADF);
 582         i915_gem_context_set_closed(ctx); /* not user accessible */
 583         i915_gem_context_clear_bannable(ctx);
 584         i915_gem_context_set_force_single_submission(ctx);
 585         if (!USES_GUC_SUBMISSION(to_i915(dev)))
 586                 ctx->ring_size = 512 * PAGE_SIZE; /* Max ring buffer size */
 587
 588         GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
 589 out:
 590         mutex_unlock(&dev->struct_mutex);
 591         return ctx;
 592 }
 593
 594 static void
 595 destroy_kernel_context(struct i915_gem_context **ctxp)
 596 {
 597         struct i915_gem_context *ctx;
 598
 599         /* Keep the context ref so that we can free it immediately ourselves */
 600         ctx = i915_gem_context_get(fetch_and_zero(ctxp));
 601         GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
 602
 603         context_close(ctx);
 604         i915_gem_context_free(ctx);
 605 }
 606
 607 struct i915_gem_context *
 608 i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio)
 609 {
 610         struct i915_gem_context *ctx;
 611         int err;
 612
 613         ctx = i915_gem_create_context(i915, 0);
 614         if (IS_ERR(ctx))
 615                 return ctx;
 616
 617         err = i915_gem_context_pin_hw_id(ctx);
 618         if (err) {
 619                 destroy_kernel_context(&ctx);
 620                 return ERR_PTR(err);
 621         }
 622
 623         i915_gem_context_clear_bannable(ctx);
 624         ctx->sched.priority = I915_USER_PRIORITY(prio);
 625         ctx->ring_size = PAGE_SIZE;
 626
 627         GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
 628
 629         return ctx;
 630 }
 631
 632 static void init_contexts(struct drm_i915_private *i915)
 633 {
 634         mutex_init(&i915->contexts.mutex);
 635         INIT_LIST_HEAD(&i915->contexts.list);
 636
 637         /* Using the simple ida interface, the max is limited by sizeof(int) */
 638         BUILD_BUG_ON(MAX_CONTEXT_HW_ID > INT_MAX);
 639         BUILD_BUG_ON(GEN11_MAX_CONTEXT_HW_ID > INT_MAX);
 640         ida_init(&i915->contexts.hw_ida);
 641         INIT_LIST_HEAD(&i915->contexts.hw_id_list);
 642
 643         INIT_WORK(&i915->contexts.free_work, contexts_free_worker);
 644         init_llist_head(&i915->contexts.free_list);
 645 }
 646
 647 static bool needs_preempt_context(struct drm_i915_private *i915)
 648 {
 649         return HAS_EXECLISTS(i915);
 650 }
 651
 652 int i915_gem_contexts_init(struct drm_i915_private *dev_priv)
 653 {
 654         struct i915_gem_context *ctx;
 655
 656         /* Reassure ourselves we are only called once */
 657         GEM_BUG_ON(dev_priv->kernel_context);
 658         GEM_BUG_ON(dev_priv->preempt_context);
 659
 660         intel_engine_init_ctx_wa(dev_priv->engine[RCS0]);
 661         init_contexts(dev_priv);
 662
 663         /* lowest priority; idle task */
 664         ctx = i915_gem_context_create_kernel(dev_priv, I915_PRIORITY_MIN);
 665         if (IS_ERR(ctx)) {
 666                 DRM_ERROR("Failed to create default global context\n");
 667                 return PTR_ERR(ctx);
 668         }
 669         /*
 670          * For easy recognisablity, we want the kernel context to be 0 and then
 671          * all user contexts will have non-zero hw_id. Kernel contexts are
 672          * permanently pinned, so that we never suffer a stall and can
 673          * use them from any allocation context (e.g. for evicting other
 674          * contexts and from inside the shrinker).
 675          */
 676         GEM_BUG_ON(ctx->hw_id);
 677         GEM_BUG_ON(!atomic_read(&ctx->hw_id_pin_count));
 678         dev_priv->kernel_context = ctx;
 679
 680         /* highest priority; preempting task */
 681         if (needs_preempt_context(dev_priv)) {
 682                 ctx = i915_gem_context_create_kernel(dev_priv, INT_MAX);
 683                 if (!IS_ERR(ctx))
 684                         dev_priv->preempt_context = ctx;
 685                 else
 686                         DRM_ERROR("Failed to create preempt context; disabling preemption\n");
 687         }
 688
 689         DRM_DEBUG_DRIVER("%s context support initialized\n",
 690                          DRIVER_CAPS(dev_priv)->has_logical_contexts ?
 691                          "logical" : "fake");
 692         return 0;
 693 }
 694
 695 void i915_gem_contexts_lost(struct drm_i915_private *dev_priv)
 696 {
 697         struct intel_engine_cs *engine;
 698         enum intel_engine_id id;
 699
 700         lockdep_assert_held(&dev_priv->drm.struct_mutex);
 701
 702         for_each_engine(engine, dev_priv, id)
 703                 intel_engine_lost_context(engine);
 704 }
 705
 706 void i915_gem_contexts_fini(struct drm_i915_private *i915)
 707 {
 708         lockdep_assert_held(&i915->drm.struct_mutex);
 709
 710         if (i915->preempt_context)
 711                 destroy_kernel_context(&i915->preempt_context);
 712         destroy_kernel_context(&i915->kernel_context);
 713
 714         /* Must free all deferred contexts (via flush_workqueue) first */
 715         GEM_BUG_ON(!list_empty(&i915->contexts.hw_id_list));
 716         ida_destroy(&i915->contexts.hw_ida);
 717 }
 718
 719 static int context_idr_cleanup(int id, void *p, void *data)
 720 {
 721         context_close(p);
 722         return 0;
 723 }
 724
 725 static int vm_idr_cleanup(int id, void *p, void *data)
 726 {
 727         i915_vm_put(p);
 728         return 0;
 729 }
 730
 731 static int gem_context_register(struct i915_gem_context *ctx,
 732                                 struct drm_i915_file_private *fpriv)
 733 {
 734         int ret;
 735
 736         ctx->file_priv = fpriv;
 737         if (ctx->vm)
 738                 ctx->vm->file = fpriv;
 739
 740         ctx->pid = get_task_pid(current, PIDTYPE_PID);
 741         ctx->name = kasprintf(GFP_KERNEL, "%s[%d]",
 742                               current->comm, pid_nr(ctx->pid));
 743         if (!ctx->name) {
 744                 ret = -ENOMEM;
 745                 goto err_pid;
 746         }
 747
 748         /* And finally expose ourselves to userspace via the idr */
 749         mutex_lock(&fpriv->context_idr_lock);
 750         ret = idr_alloc(&fpriv->context_idr, ctx, 0, 0, GFP_KERNEL);
 751         mutex_unlock(&fpriv->context_idr_lock);
 752         if (ret >= 0)
 753                 goto out;
 754
 755         kfree(fetch_and_zero(&ctx->name));
 756 err_pid:
 757         put_pid(fetch_and_zero(&ctx->pid));
 758 out:
 759         return ret;
 760 }
 761
 762 int i915_gem_context_open(struct drm_i915_private *i915,
 763                           struct drm_file *file)
 764 {
 765         struct drm_i915_file_private *file_priv = file->driver_priv;
 766         struct i915_gem_context *ctx;
 767         int err;
 768
 769         mutex_init(&file_priv->context_idr_lock);
 770         mutex_init(&file_priv->vm_idr_lock);
 771
 772         idr_init(&file_priv->context_idr);
 773         idr_init_base(&file_priv->vm_idr, 1);
 774
 775         mutex_lock(&i915->drm.struct_mutex);
 776         ctx = i915_gem_create_context(i915, 0);
 777         mutex_unlock(&i915->drm.struct_mutex);
 778         if (IS_ERR(ctx)) {
 779                 err = PTR_ERR(ctx);
 780                 goto err;
 781         }
 782
 783         err = gem_context_register(ctx, file_priv);
 784         if (err < 0)
 785                 goto err_ctx;
 786
 787         GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
 788         GEM_BUG_ON(err > 0);
 789
 790         return 0;
 791
 792 err_ctx:
 793         context_close(ctx);
 794 err:
 795         idr_destroy(&file_priv->vm_idr);
 796         idr_destroy(&file_priv->context_idr);
 797         mutex_destroy(&file_priv->vm_idr_lock);
 798         mutex_destroy(&file_priv->context_idr_lock);
 799         return err;
 800 }
 801
 802 void i915_gem_context_close(struct drm_file *file)
 803 {
 804         struct drm_i915_file_private *file_priv = file->driver_priv;
 805
 806         idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
 807         idr_destroy(&file_priv->context_idr);
 808         mutex_destroy(&file_priv->context_idr_lock);
 809
 810         idr_for_each(&file_priv->vm_idr, vm_idr_cleanup, NULL);
 811         idr_destroy(&file_priv->vm_idr);
 812         mutex_destroy(&file_priv->vm_idr_lock);
 813 }
 814
 815 int i915_gem_vm_create_ioctl(struct drm_device *dev, void *data,
 816                              struct drm_file *file)
 817 {
 818         struct drm_i915_private *i915 = to_i915(dev);
 819         struct drm_i915_gem_vm_control *args = data;
 820         struct drm_i915_file_private *file_priv = file->driver_priv;
 821         struct i915_hw_ppgtt *ppgtt;
 822         int err;
 823
 824         if (!HAS_FULL_PPGTT(i915))
 825                 return -ENODEV;
 826
 827         if (args->flags)
 828                 return -EINVAL;
 829
 830         ppgtt = i915_ppgtt_create(i915);
 831         if (IS_ERR(ppgtt))
 832                 return PTR_ERR(ppgtt);
 833
 834         ppgtt->vm.file = file_priv;
 835
 836         if (args->extensions) {
 837                 err = i915_user_extensions(u64_to_user_ptr(args->extensions),
 838                                            NULL, 0,
 839                                            ppgtt);
 840                 if (err)
 841                         goto err_put;
 842         }
 843
 844         err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
 845         if (err)
 846                 goto err_put;
 847
 848         err = idr_alloc(&file_priv->vm_idr, &ppgtt->vm, 0, 0, GFP_KERNEL);
 849         if (err < 0)
 850                 goto err_unlock;
 851
 852         GEM_BUG_ON(err == 0); /* reserved for invalid/unassigned ppgtt */
 853
 854         mutex_unlock(&file_priv->vm_idr_lock);
 855
 856         args->vm_id = err;
 857         return 0;
 858
 859 err_unlock:
 860         mutex_unlock(&file_priv->vm_idr_lock);
 861 err_put:
 862         i915_vm_put(&ppgtt->vm);
 863         return err;
 864 }
 865
 866 int i915_gem_vm_destroy_ioctl(struct drm_device *dev, void *data,
 867                               struct drm_file *file)
 868 {
 869         struct drm_i915_file_private *file_priv = file->driver_priv;
 870         struct drm_i915_gem_vm_control *args = data;
 871         struct i915_address_space *vm;
 872         int err;
 873         u32 id;
 874
 875         if (args->flags)
 876                 return -EINVAL;
 877
 878         if (args->extensions)
 879                 return -EINVAL;
 880
 881         id = args->vm_id;
 882         if (!id)
 883                 return -ENOENT;
 884
 885         err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
 886         if (err)
 887                 return err;
 888
 889         vm = idr_remove(&file_priv->vm_idr, id);
 890
 891         mutex_unlock(&file_priv->vm_idr_lock);
 892         if (!vm)
 893                 return -ENOENT;
 894
 895         i915_vm_put(vm);
 896         return 0;
 897 }
 898
 899 struct context_barrier_task {
 900         struct i915_active base;
 901         void (*task)(void *data);
 902         void *data;
 903 };
 904
 905 static void cb_retire(struct i915_active *base)
 906 {
 907         struct context_barrier_task *cb = container_of(base, typeof(*cb), base);
 908
 909         if (cb->task)
 910                 cb->task(cb->data);
 911
 912         i915_active_fini(&cb->base);
 913         kfree(cb);
 914 }
 915
 916 I915_SELFTEST_DECLARE(static intel_engine_mask_t context_barrier_inject_fault);
 917 static int context_barrier_task(struct i915_gem_context *ctx,
 918                                 intel_engine_mask_t engines,
 919                                 bool (*skip)(struct intel_context *ce, void *data),
 920                                 int (*emit)(struct i915_request *rq, void *data),
 921                                 void (*task)(void *data),
 922                                 void *data)
 923 {
 924         struct drm_i915_private *i915 = ctx->i915;
 925         struct context_barrier_task *cb;
 926         struct i915_gem_engines_iter it;
 927         struct intel_context *ce;
 928         int err = 0;
 929
 930         lockdep_assert_held(&i915->drm.struct_mutex);
 931         GEM_BUG_ON(!task);
 932
 933         cb = kmalloc(sizeof(*cb), GFP_KERNEL);
 934         if (!cb)
 935                 return -ENOMEM;
 936
 937         i915_active_init(i915, &cb->base, cb_retire);
 938         i915_active_acquire(&cb->base);
 939
 940         for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
 941                 struct i915_request *rq;
 942
 943                 if (I915_SELFTEST_ONLY(context_barrier_inject_fault &
 944                                        ce->engine->mask)) {
 945                         err = -ENXIO;
 946                         break;
 947                 }
 948
 949                 if (!(ce->engine->mask & engines))
 950                         continue;
 951
 952                 if (skip && skip(ce, data))
 953                         continue;
 954
 955                 rq = intel_context_create_request(ce);
 956                 if (IS_ERR(rq)) {
 957                         err = PTR_ERR(rq);
 958                         break;
 959                 }
 960
 961                 err = 0;
 962                 if (emit)
 963                         err = emit(rq, data);
 964                 if (err == 0)
 965                         err = i915_active_ref(&cb->base, rq->fence.context, rq);
 966
 967                 i915_request_add(rq);
 968                 if (err)
 969                         break;
 970         }
 971         i915_gem_context_unlock_engines(ctx);
 972
 973         cb->task = err ? NULL : task; /* caller needs to unwind instead */
 974         cb->data = data;
 975
 976         i915_active_release(&cb->base);
 977
 978         return err;
 979 }
 980
 981 static int get_ppgtt(struct drm_i915_file_private *file_priv,
 982                      struct i915_gem_context *ctx,
 983                      struct drm_i915_gem_context_param *args)
 984 {
 985         struct i915_address_space *vm;
 986         int ret;
 987
 988         if (!ctx->vm)
 989                 return -ENODEV;
 990
 991         /* XXX rcu acquire? */
 992         ret = mutex_lock_interruptible(&ctx->i915->drm.struct_mutex);
 993         if (ret)
 994                 return ret;
 995
 996         vm = i915_vm_get(ctx->vm);
 997         mutex_unlock(&ctx->i915->drm.struct_mutex);
 998
 999         ret = mutex_lock_interruptible(&file_priv->vm_idr_lock);
1000         if (ret)
1001                 goto err_put;
1002
1003         ret = idr_alloc(&file_priv->vm_idr, vm, 0, 0, GFP_KERNEL);
1004         GEM_BUG_ON(!ret);
1005         if (ret < 0)
1006                 goto err_unlock;
1007
1008         i915_vm_get(vm);
1009
1010         args->size = 0;
1011         args->value = ret;
1012
1013         ret = 0;
1014 err_unlock:
1015         mutex_unlock(&file_priv->vm_idr_lock);
1016 err_put:
1017         i915_vm_put(vm);
1018         return ret;
1019 }
1020
1021 static void set_ppgtt_barrier(void *data)
1022 {
1023         struct i915_address_space *old = data;
1024
1025         if (INTEL_GEN(old->i915) < 8)
1026                 gen6_ppgtt_unpin_all(i915_vm_to_ppgtt(old));
1027
1028         i915_vm_put(old);
1029 }
1030
1031 static int emit_ppgtt_update(struct i915_request *rq, void *data)
1032 {
1033         struct i915_address_space *vm = rq->gem_context->vm;
1034         struct intel_engine_cs *engine = rq->engine;
1035         u32 base = engine->mmio_base;
1036         u32 *cs;
1037         int i;
1038
1039         if (i915_vm_is_4lvl(vm)) {
1040                 struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
1041                 const dma_addr_t pd_daddr = px_dma(&ppgtt->pml4);
1042
1043                 cs = intel_ring_begin(rq, 6);
1044                 if (IS_ERR(cs))
1045                         return PTR_ERR(cs);
1046
1047                 *cs++ = MI_LOAD_REGISTER_IMM(2);
1048
1049                 *cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_UDW(base, 0));
1050                 *cs++ = upper_32_bits(pd_daddr);
1051                 *cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_LDW(base, 0));
1052                 *cs++ = lower_32_bits(pd_daddr);
1053
1054                 *cs++ = MI_NOOP;
1055                 intel_ring_advance(rq, cs);
1056         } else if (HAS_LOGICAL_RING_CONTEXTS(engine->i915)) {
1057                 struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
1058
1059                 cs = intel_ring_begin(rq, 4 * GEN8_3LVL_PDPES + 2);
1060                 if (IS_ERR(cs))
1061                         return PTR_ERR(cs);
1062
1063                 *cs++ = MI_LOAD_REGISTER_IMM(2 * GEN8_3LVL_PDPES);
1064                 for (i = GEN8_3LVL_PDPES; i--; ) {
1065                         const dma_addr_t pd_daddr = i915_page_dir_dma_addr(ppgtt, i);
1066
1067                         *cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_UDW(base, i));
1068                         *cs++ = upper_32_bits(pd_daddr);
1069                         *cs++ = i915_mmio_reg_offset(GEN8_RING_PDP_LDW(base, i));
1070                         *cs++ = lower_32_bits(pd_daddr);
1071                 }
1072                 *cs++ = MI_NOOP;
1073                 intel_ring_advance(rq, cs);
1074         } else {
1075                 /* ppGTT is not part of the legacy context image */
1076                 gen6_ppgtt_pin(i915_vm_to_ppgtt(vm));
1077         }
1078
1079         return 0;
1080 }
1081
1082 static bool skip_ppgtt_update(struct intel_context *ce, void *data)
1083 {
1084         if (HAS_LOGICAL_RING_CONTEXTS(ce->engine->i915))
1085                 return !ce->state;
1086         else
1087                 return !atomic_read(&ce->pin_count);
1088 }
1089
1090 static int set_ppgtt(struct drm_i915_file_private *file_priv,
1091                      struct i915_gem_context *ctx,
1092                      struct drm_i915_gem_context_param *args)
1093 {
1094         struct i915_address_space *vm, *old;
1095         int err;
1096
1097         if (args->size)
1098                 return -EINVAL;
1099
1100         if (!ctx->vm)
1101                 return -ENODEV;
1102
1103         if (upper_32_bits(args->value))
1104                 return -ENOENT;
1105
1106         err = mutex_lock_interruptible(&file_priv->vm_idr_lock);
1107         if (err)
1108                 return err;
1109
1110         vm = idr_find(&file_priv->vm_idr, args->value);
1111         if (vm)
1112                 i915_vm_get(vm);
1113         mutex_unlock(&file_priv->vm_idr_lock);
1114         if (!vm)
1115                 return -ENOENT;
1116
1117         err = mutex_lock_interruptible(&ctx->i915->drm.struct_mutex);
1118         if (err)
1119                 goto out;
1120
1121         if (vm == ctx->vm)
1122                 goto unlock;
1123
1124         /* Teardown the existing obj:vma cache, it will have to be rebuilt. */
1125         mutex_lock(&ctx->mutex);
1126         lut_close(ctx);
1127         mutex_unlock(&ctx->mutex);
1128
1129         old = __set_ppgtt(ctx, vm);
1130
1131         /*
1132          * We need to flush any requests using the current ppgtt before
1133          * we release it as the requests do not hold a reference themselves,
1134          * only indirectly through the context.
1135          */
1136         err = context_barrier_task(ctx, ALL_ENGINES,
1137                                    skip_ppgtt_update,
1138                                    emit_ppgtt_update,
1139                                    set_ppgtt_barrier,
1140                                    old);
1141         if (err) {
1142                 ctx->vm = old;
1143                 ctx->desc_template = default_desc_template(ctx->i915, old);
1144                 i915_vm_put(vm);
1145         }
1146
1147 unlock:
1148         mutex_unlock(&ctx->i915->drm.struct_mutex);
1149
1150 out:
1151         i915_vm_put(vm);
1152         return err;
1153 }
1154
1155 static int gen8_emit_rpcs_config(struct i915_request *rq,
1156                                  struct intel_context *ce,
1157                                  struct intel_sseu sseu)
1158 {
1159         u64 offset;
1160         u32 *cs;
1161
1162         cs = intel_ring_begin(rq, 4);
1163         if (IS_ERR(cs))
1164                 return PTR_ERR(cs);
1165
1166         offset = i915_ggtt_offset(ce->state) +
1167                  LRC_STATE_PN * PAGE_SIZE +
1168                  (CTX_R_PWR_CLK_STATE + 1) * 4;
1169
1170         *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
1171         *cs++ = lower_32_bits(offset);
1172         *cs++ = upper_32_bits(offset);
1173         *cs++ = intel_sseu_make_rpcs(rq->i915, &sseu);
1174
1175         intel_ring_advance(rq, cs);
1176
1177         return 0;
1178 }
1179
1180 static int
1181 gen8_modify_rpcs(struct intel_context *ce, struct intel_sseu sseu)
1182 {
1183         struct i915_request *rq;
1184         int ret;
1185
1186         lockdep_assert_held(&ce->pin_mutex);
1187
1188         /*
1189          * If the context is not idle, we have to submit an ordered request to
1190          * modify its context image via the kernel context (writing to our own
1191          * image, or into the registers directory, does not stick). Pristine
1192          * and idle contexts will be configured on pinning.
1193          */
1194         if (!intel_context_is_pinned(ce))
1195                 return 0;
1196
1197         rq = i915_request_create(ce->engine->kernel_context);
1198         if (IS_ERR(rq))
1199                 return PTR_ERR(rq);
1200
1201         /* Queue this switch after all other activity by this context. */
1202         ret = i915_active_request_set(&ce->ring->timeline->last_request, rq);
1203         if (ret)
1204                 goto out_add;
1205
1206         ret = gen8_emit_rpcs_config(rq, ce, sseu);
1207         if (ret)
1208                 goto out_add;
1209
1210         /*
1211          * Guarantee context image and the timeline remains pinned until the
1212          * modifying request is retired by setting the ce activity tracker.
1213          *
1214          * But we only need to take one pin on the account of it. Or in other
1215          * words transfer the pinned ce object to tracked active request.
1216          */
1217         if (!i915_active_request_isset(&ce->active_tracker))
1218                 __intel_context_pin(ce);
1219         __i915_active_request_set(&ce->active_tracker, rq);
1220
1221 out_add:
1222         i915_request_add(rq);
1223         return ret;
1224 }
1225
1226 static int
1227 __intel_context_reconfigure_sseu(struct intel_context *ce,
1228                                  struct intel_sseu sseu)
1229 {
1230         int ret;
1231
1232         GEM_BUG_ON(INTEL_GEN(ce->gem_context->i915) < 8);
1233
1234         ret = intel_context_lock_pinned(ce);
1235         if (ret)
1236                 return ret;
1237
1238         /* Nothing to do if unmodified. */
1239         if (!memcmp(&ce->sseu, &sseu, sizeof(sseu)))
1240                 goto unlock;
1241
1242         ret = gen8_modify_rpcs(ce, sseu);
1243         if (!ret)
1244                 ce->sseu = sseu;
1245
1246 unlock:
1247         intel_context_unlock_pinned(ce);
1248         return ret;
1249 }
1250
1251 static int
1252 intel_context_reconfigure_sseu(struct intel_context *ce, struct intel_sseu sseu)
1253 {
1254         struct drm_i915_private *i915 = ce->gem_context->i915;
1255         int ret;
1256
1257         ret = mutex_lock_interruptible(&i915->drm.struct_mutex);
1258         if (ret)
1259                 return ret;
1260
1261         ret = __intel_context_reconfigure_sseu(ce, sseu);
1262
1263         mutex_unlock(&i915->drm.struct_mutex);
1264
1265         return ret;
1266 }
1267
1268 static int
1269 user_to_context_sseu(struct drm_i915_private *i915,
1270                      const struct drm_i915_gem_context_param_sseu *user,
1271                      struct intel_sseu *context)
1272 {
1273         const struct sseu_dev_info *device = &RUNTIME_INFO(i915)->sseu;
1274
1275         /* No zeros in any field. */
1276         if (!user->slice_mask || !user->subslice_mask ||
1277             !user->min_eus_per_subslice || !user->max_eus_per_subslice)
1278                 return -EINVAL;
1279
1280         /* Max > min. */
1281         if (user->max_eus_per_subslice < user->min_eus_per_subslice)
1282                 return -EINVAL;
1283
1284         /*
1285          * Some future proofing on the types since the uAPI is wider than the
1286          * current internal implementation.
1287          */
1288         if (overflows_type(user->slice_mask, context->slice_mask) ||
1289             overflows_type(user->subslice_mask, context->subslice_mask) ||
1290             overflows_type(user->min_eus_per_subslice,
1291                            context->min_eus_per_subslice) ||
1292             overflows_type(user->max_eus_per_subslice,
1293                            context->max_eus_per_subslice))
1294                 return -EINVAL;
1295
1296         /* Check validity against hardware. */
1297         if (user->slice_mask & ~device->slice_mask)
1298                 return -EINVAL;
1299
1300         if (user->subslice_mask & ~device->subslice_mask[0])
1301                 return -EINVAL;
1302
1303         if (user->max_eus_per_subslice > device->max_eus_per_subslice)
1304                 return -EINVAL;
1305
1306         context->slice_mask = user->slice_mask;
1307         context->subslice_mask = user->subslice_mask;
1308         context->min_eus_per_subslice = user->min_eus_per_subslice;
1309         context->max_eus_per_subslice = user->max_eus_per_subslice;
1310
1311         /* Part specific restrictions. */
1312         if (IS_GEN(i915, 11)) {
1313                 unsigned int hw_s = hweight8(device->slice_mask);
1314                 unsigned int hw_ss_per_s = hweight8(device->subslice_mask[0]);
1315                 unsigned int req_s = hweight8(context->slice_mask);
1316                 unsigned int req_ss = hweight8(context->subslice_mask);
1317
1318                 /*
1319                  * Only full subslice enablement is possible if more than one
1320                  * slice is turned on.
1321                  */
1322                 if (req_s > 1 && req_ss != hw_ss_per_s)
1323                         return -EINVAL;
1324
1325                 /*
1326                  * If more than four (SScount bitfield limit) subslices are
1327                  * requested then the number has to be even.
1328                  */
1329                 if (req_ss > 4 && (req_ss & 1))
1330                         return -EINVAL;
1331
1332                 /*
1333                  * If only one slice is enabled and subslice count is below the
1334                  * device full enablement, it must be at most half of the all
1335                  * available subslices.
1336                  */
1337                 if (req_s == 1 && req_ss < hw_ss_per_s &&
1338                     req_ss > (hw_ss_per_s / 2))
1339                         return -EINVAL;
1340
1341                 /* ABI restriction - VME use case only. */
1342
1343                 /* All slices or one slice only. */
1344                 if (req_s != 1 && req_s != hw_s)
1345                         return -EINVAL;
1346
1347                 /*
1348                  * Half subslices or full enablement only when one slice is
1349                  * enabled.
1350                  */
1351                 if (req_s == 1 &&
1352                     (req_ss != hw_ss_per_s && req_ss != (hw_ss_per_s / 2)))
1353                         return -EINVAL;
1354
1355                 /* No EU configuration changes. */
1356                 if ((user->min_eus_per_subslice !=
1357                      device->max_eus_per_subslice) ||
1358                     (user->max_eus_per_subslice !=
1359                      device->max_eus_per_subslice))
1360                         return -EINVAL;
1361         }
1362
1363         return 0;
1364 }
1365
1366 static int set_sseu(struct i915_gem_context *ctx,
1367                     struct drm_i915_gem_context_param *args)
1368 {
1369         struct drm_i915_private *i915 = ctx->i915;
1370         struct drm_i915_gem_context_param_sseu user_sseu;
1371         struct intel_context *ce;
1372         struct intel_sseu sseu;
1373         unsigned long lookup;
1374         int ret;
1375
1376         if (args->size < sizeof(user_sseu))
1377                 return -EINVAL;
1378
1379         if (!IS_GEN(i915, 11))
1380                 return -ENODEV;
1381
1382         if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
1383                            sizeof(user_sseu)))
1384                 return -EFAULT;
1385
1386         if (user_sseu.rsvd)
1387                 return -EINVAL;
1388
1389         if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
1390                 return -EINVAL;
1391
1392         lookup = 0;
1393         if (user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX)
1394                 lookup |= LOOKUP_USER_INDEX;
1395
1396         ce = lookup_user_engine(ctx, lookup, &user_sseu.engine);
1397         if (IS_ERR(ce))
1398                 return PTR_ERR(ce);
1399
1400         /* Only render engine supports RPCS configuration. */
1401         if (ce->engine->class != RENDER_CLASS) {
1402                 ret = -ENODEV;
1403                 goto out_ce;
1404         }
1405
1406         ret = user_to_context_sseu(i915, &user_sseu, &sseu);
1407         if (ret)
1408                 goto out_ce;
1409
1410         ret = intel_context_reconfigure_sseu(ce, sseu);
1411         if (ret)
1412                 goto out_ce;
1413
1414         args->size = sizeof(user_sseu);
1415
1416 out_ce:
1417         intel_context_put(ce);
1418         return ret;
1419 }
1420
1421 struct set_engines {
1422         struct i915_gem_context *ctx;
1423         struct i915_gem_engines *engines;
1424 };
1425
1426 static int
1427 set_engines__load_balance(struct i915_user_extension __user *base, void *data)
1428 {
1429         struct i915_context_engines_load_balance __user *ext =
1430                 container_of_user(base, typeof(*ext), base);
1431         const struct set_engines *set = data;
1432         struct intel_engine_cs *stack[16];
1433         struct intel_engine_cs **siblings;
1434         struct intel_context *ce;
1435         u16 num_siblings, idx;
1436         unsigned int n;
1437         int err;
1438
1439         if (!HAS_EXECLISTS(set->ctx->i915))
1440                 return -ENODEV;
1441
1442         if (USES_GUC_SUBMISSION(set->ctx->i915))
1443                 return -ENODEV; /* not implement yet */
1444
1445         if (get_user(idx, &ext->engine_index))
1446                 return -EFAULT;
1447
1448         if (idx >= set->engines->num_engines) {
1449                 DRM_DEBUG("Invalid placement value, %d >= %d\n",
1450                           idx, set->engines->num_engines);
1451                 return -EINVAL;
1452         }
1453
1454         idx = array_index_nospec(idx, set->engines->num_engines);
1455         if (set->engines->engines[idx]) {
1456                 DRM_DEBUG("Invalid placement[%d], already occupied\n", idx);
1457                 return -EEXIST;
1458         }
1459
1460         if (get_user(num_siblings, &ext->num_siblings))
1461                 return -EFAULT;
1462
1463         err = check_user_mbz(&ext->flags);
1464         if (err)
1465                 return err;
1466
1467         err = check_user_mbz(&ext->mbz64);
1468         if (err)
1469                 return err;
1470
1471         siblings = stack;
1472         if (num_siblings > ARRAY_SIZE(stack)) {
1473                 siblings = kmalloc_array(num_siblings,
1474                                          sizeof(*siblings),
1475                                          GFP_KERNEL);
1476                 if (!siblings)
1477                         return -ENOMEM;
1478         }
1479
1480         for (n = 0; n < num_siblings; n++) {
1481                 struct i915_engine_class_instance ci;
1482
1483                 if (copy_from_user(&ci, &ext->engines[n], sizeof(ci))) {
1484                         err = -EFAULT;
1485                         goto out_siblings;
1486                 }
1487
1488                 siblings[n] = intel_engine_lookup_user(set->ctx->i915,
1489                                                        ci.engine_class,
1490                                                        ci.engine_instance);
1491                 if (!siblings[n]) {
1492                         DRM_DEBUG("Invalid sibling[%d]: { class:%d, inst:%d }\n",
1493                                   n, ci.engine_class, ci.engine_instance);
1494                         err = -EINVAL;
1495                         goto out_siblings;
1496                 }
1497         }
1498
1499         ce = intel_execlists_create_virtual(set->ctx, siblings, n);
1500         if (IS_ERR(ce)) {
1501                 err = PTR_ERR(ce);
1502                 goto out_siblings;
1503         }
1504
1505         if (cmpxchg(&set->engines->engines[idx], NULL, ce)) {
1506                 intel_context_put(ce);
1507                 err = -EEXIST;
1508                 goto out_siblings;
1509         }
1510
1511 out_siblings:
1512         if (siblings != stack)
1513                 kfree(siblings);
1514
1515         return err;
1516 }
1517
1518 static int
1519 set_engines__bond(struct i915_user_extension __user *base, void *data)
1520 {
1521         struct i915_context_engines_bond __user *ext =
1522                 container_of_user(base, typeof(*ext), base);
1523         const struct set_engines *set = data;
1524         struct i915_engine_class_instance ci;
1525         struct intel_engine_cs *virtual;
1526         struct intel_engine_cs *master;
1527         u16 idx, num_bonds;
1528         int err, n;
1529
1530         if (get_user(idx, &ext->virtual_index))
1531                 return -EFAULT;
1532
1533         if (idx >= set->engines->num_engines) {
1534                 DRM_DEBUG("Invalid index for virtual engine: %d >= %d\n",
1535                           idx, set->engines->num_engines);
1536                 return -EINVAL;
1537         }
1538
1539         idx = array_index_nospec(idx, set->engines->num_engines);
1540         if (!set->engines->engines[idx]) {
1541                 DRM_DEBUG("Invalid engine at %d\n", idx);
1542                 return -EINVAL;
1543         }
1544         virtual = set->engines->engines[idx]->engine;
1545
1546         err = check_user_mbz(&ext->flags);
1547         if (err)
1548                 return err;
1549
1550         for (n = 0; n < ARRAY_SIZE(ext->mbz64); n++) {
1551                 err = check_user_mbz(&ext->mbz64[n]);
1552                 if (err)
1553                         return err;
1554         }
1555
1556         if (copy_from_user(&ci, &ext->master, sizeof(ci)))
1557                 return -EFAULT;
1558
1559         master = intel_engine_lookup_user(set->ctx->i915,
1560                                           ci.engine_class, ci.engine_instance);
1561         if (!master) {
1562                 DRM_DEBUG("Unrecognised master engine: { class:%u, instance:%u }\n",
1563                           ci.engine_class, ci.engine_instance);
1564                 return -EINVAL;
1565         }
1566
1567         if (get_user(num_bonds, &ext->num_bonds))
1568                 return -EFAULT;
1569
1570         for (n = 0; n < num_bonds; n++) {
1571                 struct intel_engine_cs *bond;
1572
1573                 if (copy_from_user(&ci, &ext->engines[n], sizeof(ci)))
1574                         return -EFAULT;
1575
1576                 bond = intel_engine_lookup_user(set->ctx->i915,
1577                                                 ci.engine_class,
1578                                                 ci.engine_instance);
1579                 if (!bond) {
1580                         DRM_DEBUG("Unrecognised engine[%d] for bonding: { class:%d, instance: %d }\n",
1581                                   n, ci.engine_class, ci.engine_instance);
1582                         return -EINVAL;
1583                 }
1584
1585                 /*
1586                  * A non-virtual engine has no siblings to choose between; and
1587                  * a submit fence will always be directed to the one engine.
1588                  */
1589                 if (intel_engine_is_virtual(virtual)) {
1590                         err = intel_virtual_engine_attach_bond(virtual,
1591                                                                master,
1592                                                                bond);
1593                         if (err)
1594                                 return err;
1595                 }
1596         }
1597
1598         return 0;
1599 }
1600
1601 static const i915_user_extension_fn set_engines__extensions[] = {
1602         [I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE] = set_engines__load_balance,
1603         [I915_CONTEXT_ENGINES_EXT_BOND] = set_engines__bond,
1604 };
1605
1606 static int
1607 set_engines(struct i915_gem_context *ctx,
1608             const struct drm_i915_gem_context_param *args)
1609 {
1610         struct i915_context_param_engines __user *user =
1611                 u64_to_user_ptr(args->value);
1612         struct set_engines set = { .ctx = ctx };
1613         unsigned int num_engines, n;
1614         u64 extensions;
1615         int err;
1616
1617         if (!args->size) { /* switch back to legacy user_ring_map */
1618                 if (!i915_gem_context_user_engines(ctx))
1619                         return 0;
1620
1621                 set.engines = default_engines(ctx);
1622                 if (IS_ERR(set.engines))
1623                         return PTR_ERR(set.engines);
1624
1625                 goto replace;
1626         }
1627
1628         BUILD_BUG_ON(!IS_ALIGNED(sizeof(*user), sizeof(*user->engines)));
1629         if (args->size < sizeof(*user) ||
1630             !IS_ALIGNED(args->size, sizeof(*user->engines))) {
1631                 DRM_DEBUG("Invalid size for engine array: %d\n",
1632                           args->size);
1633                 return -EINVAL;
1634         }
1635
1636         /*
1637          * Note that I915_EXEC_RING_MASK limits execbuf to only using the
1638          * first 64 engines defined here.
1639          */
1640         num_engines = (args->size - sizeof(*user)) / sizeof(*user->engines);
1641
1642         set.engines = kmalloc(struct_size(set.engines, engines, num_engines),
1643                               GFP_KERNEL);
1644         if (!set.engines)
1645                 return -ENOMEM;
1646
1647         init_rcu_head(&set.engines->rcu);
1648         for (n = 0; n < num_engines; n++) {
1649                 struct i915_engine_class_instance ci;
1650                 struct intel_engine_cs *engine;
1651
1652                 if (copy_from_user(&ci, &user->engines[n], sizeof(ci))) {
1653                         __free_engines(set.engines, n);
1654                         return -EFAULT;
1655                 }
1656
1657                 if (ci.engine_class == (u16)I915_ENGINE_CLASS_INVALID &&
1658                     ci.engine_instance == (u16)I915_ENGINE_CLASS_INVALID_NONE) {
1659                         set.engines->engines[n] = NULL;
1660                         continue;
1661                 }
1662
1663                 engine = intel_engine_lookup_user(ctx->i915,
1664                                                   ci.engine_class,
1665                                                   ci.engine_instance);
1666                 if (!engine) {
1667                         DRM_DEBUG("Invalid engine[%d]: { class:%d, instance:%d }\n",
1668                                   n, ci.engine_class, ci.engine_instance);
1669                         __free_engines(set.engines, n);
1670                         return -ENOENT;
1671                 }
1672
1673                 set.engines->engines[n] = intel_context_create(ctx, engine);
1674                 if (!set.engines->engines[n]) {
1675                         __free_engines(set.engines, n);
1676                         return -ENOMEM;
1677                 }
1678         }
1679         set.engines->num_engines = num_engines;
1680
1681         err = -EFAULT;
1682         if (!get_user(extensions, &user->extensions))
1683                 err = i915_user_extensions(u64_to_user_ptr(extensions),
1684                                            set_engines__extensions,
1685                                            ARRAY_SIZE(set_engines__extensions),
1686                                            &set);
1687         if (err) {
1688                 free_engines(set.engines);
1689                 return err;
1690         }
1691
1692 replace:
1693         mutex_lock(&ctx->engines_mutex);
1694         if (args->size)
1695                 i915_gem_context_set_user_engines(ctx);
1696         else
1697                 i915_gem_context_clear_user_engines(ctx);
1698         rcu_swap_protected(ctx->engines, set.engines, 1);
1699         mutex_unlock(&ctx->engines_mutex);
1700
1701         call_rcu(&set.engines->rcu, free_engines_rcu);
1702
1703         return 0;
1704 }
1705
1706 static struct i915_gem_engines *
1707 __copy_engines(struct i915_gem_engines *e)
1708 {
1709         struct i915_gem_engines *copy;
1710         unsigned int n;
1711
1712         copy = kmalloc(struct_size(e, engines, e->num_engines), GFP_KERNEL);
1713         if (!copy)
1714                 return ERR_PTR(-ENOMEM);
1715
1716         init_rcu_head(&copy->rcu);
1717         for (n = 0; n < e->num_engines; n++) {
1718                 if (e->engines[n])
1719                         copy->engines[n] = intel_context_get(e->engines[n]);
1720                 else
1721                         copy->engines[n] = NULL;
1722         }
1723         copy->num_engines = n;
1724
1725         return copy;
1726 }
1727
1728 static int
1729 get_engines(struct i915_gem_context *ctx,
1730             struct drm_i915_gem_context_param *args)
1731 {
1732         struct i915_context_param_engines __user *user;
1733         struct i915_gem_engines *e;
1734         size_t n, count, size;
1735         int err = 0;
1736
1737         err = mutex_lock_interruptible(&ctx->engines_mutex);
1738         if (err)
1739                 return err;
1740
1741         e = NULL;
1742         if (i915_gem_context_user_engines(ctx))
1743                 e = __copy_engines(i915_gem_context_engines(ctx));
1744         mutex_unlock(&ctx->engines_mutex);
1745         if (IS_ERR_OR_NULL(e)) {
1746                 args->size = 0;
1747                 return PTR_ERR_OR_ZERO(e);
1748         }
1749
1750         count = e->num_engines;
1751
1752         /* Be paranoid in case we have an impedance mismatch */
1753         if (!check_struct_size(user, engines, count, &size)) {
1754                 err = -EINVAL;
1755                 goto err_free;
1756         }
1757         if (overflows_type(size, args->size)) {
1758                 err = -EINVAL;
1759                 goto err_free;
1760         }
1761
1762         if (!args->size) {
1763                 args->size = size;
1764                 goto err_free;
1765         }
1766
1767         if (args->size < size) {
1768                 err = -EINVAL;
1769                 goto err_free;
1770         }
1771
1772         user = u64_to_user_ptr(args->value);
1773         if (!access_ok(user, size)) {
1774                 err = -EFAULT;
1775                 goto err_free;
1776         }
1777
1778         if (put_user(0, &user->extensions)) {
1779                 err = -EFAULT;
1780                 goto err_free;
1781         }
1782
1783         for (n = 0; n < count; n++) {
1784                 struct i915_engine_class_instance ci = {
1785                         .engine_class = I915_ENGINE_CLASS_INVALID,
1786                         .engine_instance = I915_ENGINE_CLASS_INVALID_NONE,
1787                 };
1788
1789                 if (e->engines[n]) {
1790                         ci.engine_class = e->engines[n]->engine->uabi_class;
1791                         ci.engine_instance = e->engines[n]->engine->instance;
1792                 }
1793
1794                 if (copy_to_user(&user->engines[n], &ci, sizeof(ci))) {
1795                         err = -EFAULT;
1796                         goto err_free;
1797                 }
1798         }
1799
1800         args->size = size;
1801
1802 err_free:
1803         free_engines(e);
1804         return err;
1805 }
1806
1807 static int ctx_setparam(struct drm_i915_file_private *fpriv,
1808                         struct i915_gem_context *ctx,
1809                         struct drm_i915_gem_context_param *args)
1810 {
1811         int ret = 0;
1812
1813         switch (args->param) {
1814         case I915_CONTEXT_PARAM_NO_ZEROMAP:
1815                 if (args->size)
1816                         ret = -EINVAL;
1817                 else if (args->value)
1818                         set_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
1819                 else
1820                         clear_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
1821                 break;
1822
1823         case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
1824                 if (args->size)
1825                         ret = -EINVAL;
1826                 else if (args->value)
1827                         i915_gem_context_set_no_error_capture(ctx);
1828                 else
1829                         i915_gem_context_clear_no_error_capture(ctx);
1830                 break;
1831
1832         case I915_CONTEXT_PARAM_BANNABLE:
1833                 if (args->size)
1834                         ret = -EINVAL;
1835                 else if (!capable(CAP_SYS_ADMIN) && !args->value)
1836                         ret = -EPERM;
1837                 else if (args->value)
1838                         i915_gem_context_set_bannable(ctx);
1839                 else
1840                         i915_gem_context_clear_bannable(ctx);
1841                 break;
1842
1843         case I915_CONTEXT_PARAM_RECOVERABLE:
1844                 if (args->size)
1845                         ret = -EINVAL;
1846                 else if (args->value)
1847                         i915_gem_context_set_recoverable(ctx);
1848                 else
1849                         i915_gem_context_clear_recoverable(ctx);
1850                 break;
1851
1852         case I915_CONTEXT_PARAM_PRIORITY:
1853                 {
1854                         s64 priority = args->value;
1855
1856                         if (args->size)
1857                                 ret = -EINVAL;
1858                         else if (!(ctx->i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
1859                                 ret = -ENODEV;
1860                         else if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
1861                                  priority < I915_CONTEXT_MIN_USER_PRIORITY)
1862                                 ret = -EINVAL;
1863                         else if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
1864                                  !capable(CAP_SYS_NICE))
1865                                 ret = -EPERM;
1866                         else
1867                                 ctx->sched.priority =
1868                                         I915_USER_PRIORITY(priority);
1869                 }
1870                 break;
1871
1872         case I915_CONTEXT_PARAM_SSEU:
1873                 ret = set_sseu(ctx, args);
1874                 break;
1875
1876         case I915_CONTEXT_PARAM_VM:
1877                 ret = set_ppgtt(fpriv, ctx, args);
1878                 break;
1879
1880         case I915_CONTEXT_PARAM_ENGINES:
1881                 ret = set_engines(ctx, args);
1882                 break;
1883
1884         case I915_CONTEXT_PARAM_BAN_PERIOD:
1885         default:
1886                 ret = -EINVAL;
1887                 break;
1888         }
1889
1890         return ret;
1891 }
1892
1893 struct create_ext {
1894         struct i915_gem_context *ctx;
1895         struct drm_i915_file_private *fpriv;
1896 };
1897
1898 static int create_setparam(struct i915_user_extension __user *ext, void *data)
1899 {
1900         struct drm_i915_gem_context_create_ext_setparam local;
1901         const struct create_ext *arg = data;
1902
1903         if (copy_from_user(&local, ext, sizeof(local)))
1904                 return -EFAULT;
1905
1906         if (local.param.ctx_id)
1907                 return -EINVAL;
1908
1909         return ctx_setparam(arg->fpriv, arg->ctx, &local.param);
1910 }
1911
1912 static int clone_engines(struct i915_gem_context *dst,
1913                          struct i915_gem_context *src)
1914 {
1915         struct i915_gem_engines *e = i915_gem_context_lock_engines(src);
1916         struct i915_gem_engines *clone;
1917         bool user_engines;
1918         unsigned long n;
1919
1920         clone = kmalloc(struct_size(e, engines, e->num_engines), GFP_KERNEL);
1921         if (!clone)
1922                 goto err_unlock;
1923
1924         init_rcu_head(&clone->rcu);
1925         for (n = 0; n < e->num_engines; n++) {
1926                 struct intel_engine_cs *engine;
1927
1928                 if (!e->engines[n]) {
1929                         clone->engines[n] = NULL;
1930                         continue;
1931                 }
1932                 engine = e->engines[n]->engine;
1933
1934                 /*
1935                  * Virtual engines are singletons; they can only exist
1936                  * inside a single context, because they embed their
1937                  * HW context... As each virtual context implies a single
1938                  * timeline (each engine can only dequeue a single request
1939                  * at any time), it would be surprising for two contexts
1940                  * to use the same engine. So let's create a copy of
1941                  * the virtual engine instead.
1942                  */
1943                 if (intel_engine_is_virtual(engine))
1944                         clone->engines[n] =
1945                                 intel_execlists_clone_virtual(dst, engine);
1946                 else
1947                         clone->engines[n] = intel_context_create(dst, engine);
1948                 if (IS_ERR_OR_NULL(clone->engines[n])) {
1949                         __free_engines(clone, n);
1950                         goto err_unlock;
1951                 }
1952         }
1953         clone->num_engines = n;
1954
1955         user_engines = i915_gem_context_user_engines(src);
1956         i915_gem_context_unlock_engines(src);
1957
1958         free_engines(dst->engines);
1959         RCU_INIT_POINTER(dst->engines, clone);
1960         if (user_engines)
1961                 i915_gem_context_set_user_engines(dst);
1962         else
1963                 i915_gem_context_clear_user_engines(dst);
1964         return 0;
1965
1966 err_unlock:
1967         i915_gem_context_unlock_engines(src);
1968         return -ENOMEM;
1969 }
1970
1971 static int clone_flags(struct i915_gem_context *dst,
1972                        struct i915_gem_context *src)
1973 {
1974         dst->user_flags = src->user_flags;
1975         return 0;
1976 }
1977
1978 static int clone_schedattr(struct i915_gem_context *dst,
1979                            struct i915_gem_context *src)
1980 {
1981         dst->sched = src->sched;
1982         return 0;
1983 }
1984
1985 static int clone_sseu(struct i915_gem_context *dst,
1986                       struct i915_gem_context *src)
1987 {
1988         struct i915_gem_engines *e = i915_gem_context_lock_engines(src);
1989         struct i915_gem_engines *clone;
1990         unsigned long n;
1991         int err;
1992
1993         clone = dst->engines; /* no locking required; sole access */
1994         if (e->num_engines != clone->num_engines) {
1995                 err = -EINVAL;
1996                 goto unlock;
1997         }
1998
1999         for (n = 0; n < e->num_engines; n++) {
2000                 struct intel_context *ce = e->engines[n];
2001
2002                 if (clone->engines[n]->engine->class != ce->engine->class) {
2003                         /* Must have compatible engine maps! */
2004                         err = -EINVAL;
2005                         goto unlock;
2006                 }
2007
2008                 /* serialises with set_sseu */
2009                 err = intel_context_lock_pinned(ce);
2010                 if (err)
2011                         goto unlock;
2012
2013                 clone->engines[n]->sseu = ce->sseu;
2014                 intel_context_unlock_pinned(ce);
2015         }
2016
2017         err = 0;
2018 unlock:
2019         i915_gem_context_unlock_engines(src);
2020         return err;
2021 }
2022
2023 static int clone_timeline(struct i915_gem_context *dst,
2024                           struct i915_gem_context *src)
2025 {
2026         if (src->timeline) {
2027                 GEM_BUG_ON(src->timeline == dst->timeline);
2028
2029                 if (dst->timeline)
2030                         i915_timeline_put(dst->timeline);
2031                 dst->timeline = i915_timeline_get(src->timeline);
2032         }
2033
2034         return 0;
2035 }
2036
2037 static int clone_vm(struct i915_gem_context *dst,
2038                     struct i915_gem_context *src)
2039 {
2040         struct i915_address_space *vm;
2041
2042         rcu_read_lock();
2043         do {
2044                 vm = READ_ONCE(src->vm);
2045                 if (!vm)
2046                         break;
2047
2048                 if (!kref_get_unless_zero(&vm->ref))
2049                         continue;
2050
2051                 /*
2052                  * This ppgtt may have be reallocated between
2053                  * the read and the kref, and reassigned to a third
2054                  * context. In order to avoid inadvertent sharing
2055                  * of this ppgtt with that third context (and not
2056                  * src), we have to confirm that we have the same
2057                  * ppgtt after passing through the strong memory
2058                  * barrier implied by a successful
2059                  * kref_get_unless_zero().
2060                  *
2061                  * Once we have acquired the current ppgtt of src,
2062                  * we no longer care if it is released from src, as
2063                  * it cannot be reallocated elsewhere.
2064                  */
2065
2066                 if (vm == READ_ONCE(src->vm))
2067                         break;
2068
2069                 i915_vm_put(vm);
2070         } while (1);
2071         rcu_read_unlock();
2072
2073         if (vm) {
2074                 __assign_ppgtt(dst, vm);
2075                 i915_vm_put(vm);
2076         }
2077
2078         return 0;
2079 }
2080
2081 static int create_clone(struct i915_user_extension __user *ext, void *data)
2082 {
2083         static int (* const fn[])(struct i915_gem_context *dst,
2084                                   struct i915_gem_context *src) = {
2085 #define MAP(x, y) [ilog2(I915_CONTEXT_CLONE_##x)] = y
2086                 MAP(ENGINES, clone_engines),
2087                 MAP(FLAGS, clone_flags),
2088                 MAP(SCHEDATTR, clone_schedattr),
2089                 MAP(SSEU, clone_sseu),
2090                 MAP(TIMELINE, clone_timeline),
2091                 MAP(VM, clone_vm),
2092 #undef MAP
2093         };
2094         struct drm_i915_gem_context_create_ext_clone local;
2095         const struct create_ext *arg = data;
2096         struct i915_gem_context *dst = arg->ctx;
2097         struct i915_gem_context *src;
2098         int err, bit;
2099
2100         if (copy_from_user(&local, ext, sizeof(local)))
2101                 return -EFAULT;
2102
2103         BUILD_BUG_ON(GENMASK(BITS_PER_TYPE(local.flags) - 1, ARRAY_SIZE(fn)) !=
2104                      I915_CONTEXT_CLONE_UNKNOWN);
2105
2106         if (local.flags & I915_CONTEXT_CLONE_UNKNOWN)
2107                 return -EINVAL;
2108
2109         if (local.rsvd)
2110                 return -EINVAL;
2111
2112         rcu_read_lock();
2113         src = __i915_gem_context_lookup_rcu(arg->fpriv, local.clone_id);
2114         rcu_read_unlock();
2115         if (!src)
2116                 return -ENOENT;
2117
2118         GEM_BUG_ON(src == dst);
2119
2120         for (bit = 0; bit < ARRAY_SIZE(fn); bit++) {
2121                 if (!(local.flags & BIT(bit)))
2122                         continue;
2123
2124                 err = fn[bit](dst, src);
2125                 if (err)
2126                         return err;
2127         }
2128
2129         return 0;
2130 }
2131
2132 static const i915_user_extension_fn create_extensions[] = {
2133         [I915_CONTEXT_CREATE_EXT_SETPARAM] = create_setparam,
2134         [I915_CONTEXT_CREATE_EXT_CLONE] = create_clone,
2135 };
2136
2137 static bool client_is_banned(struct drm_i915_file_private *file_priv)
2138 {
2139         return atomic_read(&file_priv->ban_score) >= I915_CLIENT_SCORE_BANNED;
2140 }
2141
2142 int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
2143                                   struct drm_file *file)
2144 {
2145         struct drm_i915_private *i915 = to_i915(dev);
2146         struct drm_i915_gem_context_create_ext *args = data;
2147         struct create_ext ext_data;
2148         int ret;
2149
2150         if (!DRIVER_CAPS(i915)->has_logical_contexts)
2151                 return -ENODEV;
2152
2153         if (args->flags & I915_CONTEXT_CREATE_FLAGS_UNKNOWN)
2154                 return -EINVAL;
2155
2156         ret = i915_terminally_wedged(i915);
2157         if (ret)
2158                 return ret;
2159
2160         ext_data.fpriv = file->driver_priv;
2161         if (client_is_banned(ext_data.fpriv)) {
2162                 DRM_DEBUG("client %s[%d] banned from creating ctx\n",
2163                           current->comm,
2164                           pid_nr(get_task_pid(current, PIDTYPE_PID)));
2165                 return -EIO;
2166         }
2167
2168         ret = i915_mutex_lock_interruptible(dev);
2169         if (ret)
2170                 return ret;
2171
2172         ext_data.ctx = i915_gem_create_context(i915, args->flags);
2173         mutex_unlock(&dev->struct_mutex);
2174         if (IS_ERR(ext_data.ctx))
2175                 return PTR_ERR(ext_data.ctx);
2176
2177         if (args->flags & I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS) {
2178                 ret = i915_user_extensions(u64_to_user_ptr(args->extensions),
2179                                            create_extensions,
2180                                            ARRAY_SIZE(create_extensions),
2181                                            &ext_data);
2182                 if (ret)
2183                         goto err_ctx;
2184         }
2185
2186         ret = gem_context_register(ext_data.ctx, ext_data.fpriv);
2187         if (ret < 0)
2188                 goto err_ctx;
2189
2190         args->ctx_id = ret;
2191         DRM_DEBUG("HW context %d created\n", args->ctx_id);
2192
2193         return 0;
2194
2195 err_ctx:
2196         context_close(ext_data.ctx);
2197         return ret;
2198 }
2199
2200 int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
2201                                    struct drm_file *file)
2202 {
2203         struct drm_i915_gem_context_destroy *args = data;
2204         struct drm_i915_file_private *file_priv = file->driver_priv;
2205         struct i915_gem_context *ctx;
2206
2207         if (args->pad != 0)
2208                 return -EINVAL;
2209
2210         if (!args->ctx_id)
2211                 return -ENOENT;
2212
2213         if (mutex_lock_interruptible(&file_priv->context_idr_lock))
2214                 return -EINTR;
2215
2216         ctx = idr_remove(&file_priv->context_idr, args->ctx_id);
2217         mutex_unlock(&file_priv->context_idr_lock);
2218         if (!ctx)
2219                 return -ENOENT;
2220
2221         context_close(ctx);
2222         return 0;
2223 }
2224
2225 static int get_sseu(struct i915_gem_context *ctx,
2226                     struct drm_i915_gem_context_param *args)
2227 {
2228         struct drm_i915_gem_context_param_sseu user_sseu;
2229         struct intel_context *ce;
2230         unsigned long lookup;
2231         int err;
2232
2233         if (args->size == 0)
2234                 goto out;
2235         else if (args->size < sizeof(user_sseu))
2236                 return -EINVAL;
2237
2238         if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
2239                            sizeof(user_sseu)))
2240                 return -EFAULT;
2241
2242         if (user_sseu.rsvd)
2243                 return -EINVAL;
2244
2245         if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
2246                 return -EINVAL;
2247
2248         lookup = 0;
2249         if (user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX)
2250                 lookup |= LOOKUP_USER_INDEX;
2251
2252         ce = lookup_user_engine(ctx, lookup, &user_sseu.engine);
2253         if (IS_ERR(ce))
2254                 return PTR_ERR(ce);
2255
2256         err = intel_context_lock_pinned(ce); /* serialises with set_sseu */
2257         if (err) {
2258                 intel_context_put(ce);
2259                 return err;
2260         }
2261
2262         user_sseu.slice_mask = ce->sseu.slice_mask;
2263         user_sseu.subslice_mask = ce->sseu.subslice_mask;
2264         user_sseu.min_eus_per_subslice = ce->sseu.min_eus_per_subslice;
2265         user_sseu.max_eus_per_subslice = ce->sseu.max_eus_per_subslice;
2266
2267         intel_context_unlock_pinned(ce);
2268         intel_context_put(ce);
2269
2270         if (copy_to_user(u64_to_user_ptr(args->value), &user_sseu,
2271                          sizeof(user_sseu)))
2272                 return -EFAULT;
2273
2274 out:
2275         args->size = sizeof(user_sseu);
2276
2277         return 0;
2278 }
2279
2280 int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
2281                                     struct drm_file *file)
2282 {
2283         struct drm_i915_file_private *file_priv = file->driver_priv;
2284         struct drm_i915_gem_context_param *args = data;
2285         struct i915_gem_context *ctx;
2286         int ret = 0;
2287
2288         ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
2289         if (!ctx)
2290                 return -ENOENT;
2291
2292         switch (args->param) {
2293         case I915_CONTEXT_PARAM_NO_ZEROMAP:
2294                 args->size = 0;
2295                 args->value = test_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags);
2296                 break;
2297
2298         case I915_CONTEXT_PARAM_GTT_SIZE:
2299                 args->size = 0;
2300                 if (ctx->vm)
2301                         args->value = ctx->vm->total;
2302                 else if (to_i915(dev)->mm.aliasing_ppgtt)
2303                         args->value = to_i915(dev)->mm.aliasing_ppgtt->vm.total;
2304                 else
2305                         args->value = to_i915(dev)->ggtt.vm.total;
2306                 break;
2307
2308         case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
2309                 args->size = 0;
2310                 args->value = i915_gem_context_no_error_capture(ctx);
2311                 break;
2312
2313         case I915_CONTEXT_PARAM_BANNABLE:
2314                 args->size = 0;
2315                 args->value = i915_gem_context_is_bannable(ctx);
2316                 break;
2317
2318         case I915_CONTEXT_PARAM_RECOVERABLE:
2319                 args->size = 0;
2320                 args->value = i915_gem_context_is_recoverable(ctx);
2321                 break;
2322
2323         case I915_CONTEXT_PARAM_PRIORITY:
2324                 args->size = 0;
2325                 args->value = ctx->sched.priority >> I915_USER_PRIORITY_SHIFT;
2326                 break;
2327
2328         case I915_CONTEXT_PARAM_SSEU:
2329                 ret = get_sseu(ctx, args);
2330                 break;
2331
2332         case I915_CONTEXT_PARAM_VM:
2333                 ret = get_ppgtt(file_priv, ctx, args);
2334                 break;
2335
2336         case I915_CONTEXT_PARAM_ENGINES:
2337                 ret = get_engines(ctx, args);
2338                 break;
2339
2340         case I915_CONTEXT_PARAM_BAN_PERIOD:
2341         default:
2342                 ret = -EINVAL;
2343                 break;
2344         }
2345
2346         i915_gem_context_put(ctx);
2347         return ret;
2348 }
2349
2350 int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
2351                                     struct drm_file *file)
2352 {
2353         struct drm_i915_file_private *file_priv = file->driver_priv;
2354         struct drm_i915_gem_context_param *args = data;
2355         struct i915_gem_context *ctx;
2356         int ret;
2357
2358         ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
2359         if (!ctx)
2360                 return -ENOENT;
2361
2362         ret = ctx_setparam(file_priv, ctx, args);
2363
2364         i915_gem_context_put(ctx);
2365         return ret;
2366 }
2367
2368 int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
2369                                        void *data, struct drm_file *file)
2370 {
2371         struct drm_i915_private *dev_priv = to_i915(dev);
2372         struct drm_i915_reset_stats *args = data;
2373         struct i915_gem_context *ctx;
2374         int ret;
2375
2376         if (args->flags || args->pad)
2377                 return -EINVAL;
2378
2379         ret = -ENOENT;
2380         rcu_read_lock();
2381         ctx = __i915_gem_context_lookup_rcu(file->driver_priv, args->ctx_id);
2382         if (!ctx)
2383                 goto out;
2384
2385         /*
2386          * We opt for unserialised reads here. This may result in tearing
2387          * in the extremely unlikely event of a GPU hang on this context
2388          * as we are querying them. If we need that extra layer of protection,
2389          * we should wrap the hangstats with a seqlock.
2390          */
2391
2392         if (capable(CAP_SYS_ADMIN))
2393                 args->reset_count = i915_reset_count(&dev_priv->gpu_error);
2394         else
2395                 args->reset_count = 0;
2396
2397         args->batch_active = atomic_read(&ctx->guilty_count);
2398         args->batch_pending = atomic_read(&ctx->active_count);
2399
2400         ret = 0;
2401 out:
2402         rcu_read_unlock();
2403         return ret;
2404 }
2405
2406 int __i915_gem_context_pin_hw_id(struct i915_gem_context *ctx)
2407 {
2408         struct drm_i915_private *i915 = ctx->i915;
2409         int err = 0;
2410
2411         mutex_lock(&i915->contexts.mutex);
2412
2413         GEM_BUG_ON(i915_gem_context_is_closed(ctx));
2414
2415         if (list_empty(&ctx->hw_id_link)) {
2416                 GEM_BUG_ON(atomic_read(&ctx->hw_id_pin_count));
2417
2418                 err = assign_hw_id(i915, &ctx->hw_id);
2419                 if (err)
2420                         goto out_unlock;
2421
2422                 list_add_tail(&ctx->hw_id_link, &i915->contexts.hw_id_list);
2423         }
2424
2425         GEM_BUG_ON(atomic_read(&ctx->hw_id_pin_count) == ~0u);
2426         atomic_inc(&ctx->hw_id_pin_count);
2427
2428 out_unlock:
2429         mutex_unlock(&i915->contexts.mutex);
2430         return err;
2431 }
2432
2433 /* GEM context-engines iterator: for_each_gem_engine() */
2434 struct intel_context *
2435 i915_gem_engines_iter_next(struct i915_gem_engines_iter *it)
2436 {
2437         const struct i915_gem_engines *e = it->engines;
2438         struct intel_context *ctx;
2439
2440         do {
2441                 if (it->idx >= e->num_engines)
2442                         return NULL;
2443
2444                 ctx = e->engines[it->idx++];
2445         } while (!ctx);
2446
2447         return ctx;
2448 }
2449
2450 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
2451 #include "selftests/mock_context.c"
2452 #include "selftests/i915_gem_context.c"
2453 #endif
2454
2455 static void i915_global_gem_context_shrink(void)
2456 {
2457         kmem_cache_shrink(global.slab_luts);
2458 }
2459
2460 static void i915_global_gem_context_exit(void)
2461 {
2462         kmem_cache_destroy(global.slab_luts);
2463 }
2464
2465 static struct i915_global_gem_context global = { {
2466         .shrink = i915_global_gem_context_shrink,
2467         .exit = i915_global_gem_context_exit,
2468 } };
2469
2470 int __init i915_global_gem_context_init(void)
2471 {
2472         global.slab_luts = KMEM_CACHE(i915_lut_handle, 0);
2473         if (!global.slab_luts)
2474                 return -ENOMEM;
2475
2476         i915_global_register(&global.base);
2477         return 0;
2478 }