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24 * Robert Bragg <robert@sixbynine.org>
29 * DOC: i915 Perf Overview
31 * Gen graphics supports a large number of performance counters that can help
32 * driver and application developers understand and optimize their use of the
35 * This i915 perf interface enables userspace to configure and open a file
36 * descriptor representing a stream of GPU metrics which can then be read() as
37 * a stream of sample records.
39 * The interface is particularly suited to exposing buffered metrics that are
40 * captured by DMA from the GPU, unsynchronized with and unrelated to the CPU.
42 * Streams representing a single context are accessible to applications with a
43 * corresponding drm file descriptor, such that OpenGL can use the interface
44 * without special privileges. Access to system-wide metrics requires root
45 * privileges by default, unless changed via the dev.i915.perf_event_paranoid
51 * DOC: i915 Perf History and Comparison with Core Perf
53 * The interface was initially inspired by the core Perf infrastructure but
54 * some notable differences are:
56 * i915 perf file descriptors represent a "stream" instead of an "event"; where
57 * a perf event primarily corresponds to a single 64bit value, while a stream
58 * might sample sets of tightly-coupled counters, depending on the
59 * configuration. For example the Gen OA unit isn't designed to support
60 * orthogonal configurations of individual counters; it's configured for a set
61 * of related counters. Samples for an i915 perf stream capturing OA metrics
62 * will include a set of counter values packed in a compact HW specific format.
63 * The OA unit supports a number of different packing formats which can be
64 * selected by the user opening the stream. Perf has support for grouping
65 * events, but each event in the group is configured, validated and
66 * authenticated individually with separate system calls.
68 * i915 perf stream configurations are provided as an array of u64 (key,value)
69 * pairs, instead of a fixed struct with multiple miscellaneous config members,
70 * interleaved with event-type specific members.
72 * i915 perf doesn't support exposing metrics via an mmap'd circular buffer.
73 * The supported metrics are being written to memory by the GPU unsynchronized
74 * with the CPU, using HW specific packing formats for counter sets. Sometimes
75 * the constraints on HW configuration require reports to be filtered before it
76 * would be acceptable to expose them to unprivileged applications - to hide
77 * the metrics of other processes/contexts. For these use cases a read() based
78 * interface is a good fit, and provides an opportunity to filter data as it
79 * gets copied from the GPU mapped buffers to userspace buffers.
82 * Issues hit with first prototype based on Core Perf
83 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
85 * The first prototype of this driver was based on the core perf
86 * infrastructure, and while we did make that mostly work, with some changes to
87 * perf, we found we were breaking or working around too many assumptions baked
88 * into perf's currently cpu centric design.
90 * In the end we didn't see a clear benefit to making perf's implementation and
91 * interface more complex by changing design assumptions while we knew we still
92 * wouldn't be able to use any existing perf based userspace tools.
94 * Also considering the Gen specific nature of the Observability hardware and
95 * how userspace will sometimes need to combine i915 perf OA metrics with
96 * side-band OA data captured via MI_REPORT_PERF_COUNT commands; we're
97 * expecting the interface to be used by a platform specific userspace such as
98 * OpenGL or tools. This is to say; we aren't inherently missing out on having
99 * a standard vendor/architecture agnostic interface by not using perf.
102 * For posterity, in case we might re-visit trying to adapt core perf to be
103 * better suited to exposing i915 metrics these were the main pain points we
106 * - The perf based OA PMU driver broke some significant design assumptions:
108 * Existing perf pmus are used for profiling work on a cpu and we were
109 * introducing the idea of _IS_DEVICE pmus with different security
110 * implications, the need to fake cpu-related data (such as user/kernel
111 * registers) to fit with perf's current design, and adding _DEVICE records
112 * as a way to forward device-specific status records.
114 * The OA unit writes reports of counters into a circular buffer, without
115 * involvement from the CPU, making our PMU driver the first of a kind.
117 * Given the way we were periodically forward data from the GPU-mapped, OA
118 * buffer to perf's buffer, those bursts of sample writes looked to perf like
119 * we were sampling too fast and so we had to subvert its throttling checks.
121 * Perf supports groups of counters and allows those to be read via
122 * transactions internally but transactions currently seem designed to be
123 * explicitly initiated from the cpu (say in response to a userspace read())
124 * and while we could pull a report out of the OA buffer we can't
125 * trigger a report from the cpu on demand.
127 * Related to being report based; the OA counters are configured in HW as a
128 * set while perf generally expects counter configurations to be orthogonal.
129 * Although counters can be associated with a group leader as they are
130 * opened, there's no clear precedent for being able to provide group-wide
131 * configuration attributes (for example we want to let userspace choose the
132 * OA unit report format used to capture all counters in a set, or specify a
133 * GPU context to filter metrics on). We avoided using perf's grouping
134 * feature and forwarded OA reports to userspace via perf's 'raw' sample
135 * field. This suited our userspace well considering how coupled the counters
136 * are when dealing with normalizing. It would be inconvenient to split
137 * counters up into separate events, only to require userspace to recombine
138 * them. For Mesa it's also convenient to be forwarded raw, periodic reports
139 * for combining with the side-band raw reports it captures using
140 * MI_REPORT_PERF_COUNT commands.
142 * - As a side note on perf's grouping feature; there was also some concern
143 * that using PERF_FORMAT_GROUP as a way to pack together counter values
144 * would quite drastically inflate our sample sizes, which would likely
145 * lower the effective sampling resolutions we could use when the available
146 * memory bandwidth is limited.
148 * With the OA unit's report formats, counters are packed together as 32
149 * or 40bit values, with the largest report size being 256 bytes.
151 * PERF_FORMAT_GROUP values are 64bit, but there doesn't appear to be a
152 * documented ordering to the values, implying PERF_FORMAT_ID must also be
153 * used to add a 64bit ID before each value; giving 16 bytes per counter.
155 * Related to counter orthogonality; we can't time share the OA unit, while
156 * event scheduling is a central design idea within perf for allowing
157 * userspace to open + enable more events than can be configured in HW at any
158 * one time. The OA unit is not designed to allow re-configuration while in
159 * use. We can't reconfigure the OA unit without losing internal OA unit
160 * state which we can't access explicitly to save and restore. Reconfiguring
161 * the OA unit is also relatively slow, involving ~100 register writes. From
162 * userspace Mesa also depends on a stable OA configuration when emitting
163 * MI_REPORT_PERF_COUNT commands and importantly the OA unit can't be
164 * disabled while there are outstanding MI_RPC commands lest we hang the
167 * The contents of sample records aren't extensible by device drivers (i.e.
168 * the sample_type bits). As an example; Sourab Gupta had been looking to
169 * attach GPU timestamps to our OA samples. We were shoehorning OA reports
170 * into sample records by using the 'raw' field, but it's tricky to pack more
171 * than one thing into this field because events/core.c currently only lets a
172 * pmu give a single raw data pointer plus len which will be copied into the
173 * ring buffer. To include more than the OA report we'd have to copy the
174 * report into an intermediate larger buffer. I'd been considering allowing a
175 * vector of data+len values to be specified for copying the raw data, but
176 * it felt like a kludge to being using the raw field for this purpose.
178 * - It felt like our perf based PMU was making some technical compromises
179 * just for the sake of using perf:
181 * perf_event_open() requires events to either relate to a pid or a specific
182 * cpu core, while our device pmu related to neither. Events opened with a
183 * pid will be automatically enabled/disabled according to the scheduling of
184 * that process - so not appropriate for us. When an event is related to a
185 * cpu id, perf ensures pmu methods will be invoked via an inter process
186 * interrupt on that core. To avoid invasive changes our userspace opened OA
187 * perf events for a specific cpu. This was workable but it meant the
188 * majority of the OA driver ran in atomic context, including all OA report
189 * forwarding, which wasn't really necessary in our case and seems to make
190 * our locking requirements somewhat complex as we handled the interaction
191 * with the rest of the i915 driver.
194 #include <linux/anon_inodes.h>
195 #include <linux/sizes.h>
196 #include <linux/uuid.h>
198 #include "gem/i915_gem_context.h"
199 #include "gem/i915_gem_pm.h"
200 #include "gt/intel_lrc_reg.h"
202 #include "i915_drv.h"
203 #include "i915_perf.h"
204 #include "oa/i915_oa_hsw.h"
205 #include "oa/i915_oa_bdw.h"
206 #include "oa/i915_oa_chv.h"
207 #include "oa/i915_oa_sklgt2.h"
208 #include "oa/i915_oa_sklgt3.h"
209 #include "oa/i915_oa_sklgt4.h"
210 #include "oa/i915_oa_bxt.h"
211 #include "oa/i915_oa_kblgt2.h"
212 #include "oa/i915_oa_kblgt3.h"
213 #include "oa/i915_oa_glk.h"
214 #include "oa/i915_oa_cflgt2.h"
215 #include "oa/i915_oa_cflgt3.h"
216 #include "oa/i915_oa_cnl.h"
217 #include "oa/i915_oa_icl.h"
219 /* HW requires this to be a power of two, between 128k and 16M, though driver
220 * is currently generally designed assuming the largest 16M size is used such
221 * that the overflow cases are unlikely in normal operation.
223 #define OA_BUFFER_SIZE SZ_16M
225 #define OA_TAKEN(tail, head) ((tail - head) & (OA_BUFFER_SIZE - 1))
228 * DOC: OA Tail Pointer Race
230 * There's a HW race condition between OA unit tail pointer register updates and
231 * writes to memory whereby the tail pointer can sometimes get ahead of what's
232 * been written out to the OA buffer so far (in terms of what's visible to the
235 * Although this can be observed explicitly while copying reports to userspace
236 * by checking for a zeroed report-id field in tail reports, we want to account
237 * for this earlier, as part of the oa_buffer_check to avoid lots of redundant
240 * In effect we define a tail pointer for reading that lags the real tail
241 * pointer by at least %OA_TAIL_MARGIN_NSEC nanoseconds, which gives enough
242 * time for the corresponding reports to become visible to the CPU.
244 * To manage this we actually track two tail pointers:
245 * 1) An 'aging' tail with an associated timestamp that is tracked until we
246 * can trust the corresponding data is visible to the CPU; at which point
247 * it is considered 'aged'.
248 * 2) An 'aged' tail that can be used for read()ing.
250 * The two separate pointers let us decouple read()s from tail pointer aging.
252 * The tail pointers are checked and updated at a limited rate within a hrtimer
253 * callback (the same callback that is used for delivering EPOLLIN events)
255 * Initially the tails are marked invalid with %INVALID_TAIL_PTR which
256 * indicates that an updated tail pointer is needed.
258 * Most of the implementation details for this workaround are in
259 * oa_buffer_check_unlocked() and _append_oa_reports()
261 * Note for posterity: previously the driver used to define an effective tail
262 * pointer that lagged the real pointer by a 'tail margin' measured in bytes
263 * derived from %OA_TAIL_MARGIN_NSEC and the configured sampling frequency.
264 * This was flawed considering that the OA unit may also automatically generate
265 * non-periodic reports (such as on context switch) or the OA unit may be
266 * enabled without any periodic sampling.
268 #define OA_TAIL_MARGIN_NSEC 100000ULL
269 #define INVALID_TAIL_PTR 0xffffffff
271 /* frequency for checking whether the OA unit has written new reports to the
272 * circular OA buffer...
274 #define POLL_FREQUENCY 200
275 #define POLL_PERIOD (NSEC_PER_SEC / POLL_FREQUENCY)
277 /* for sysctl proc_dointvec_minmax of dev.i915.perf_stream_paranoid */
278 static u32 i915_perf_stream_paranoid = true;
280 /* The maximum exponent the hardware accepts is 63 (essentially it selects one
281 * of the 64bit timestamp bits to trigger reports from) but there's currently
282 * no known use case for sampling as infrequently as once per 47 thousand years.
284 * Since the timestamps included in OA reports are only 32bits it seems
285 * reasonable to limit the OA exponent where it's still possible to account for
286 * overflow in OA report timestamps.
288 #define OA_EXPONENT_MAX 31
290 #define INVALID_CTX_ID 0xffffffff
292 /* On Gen8+ automatically triggered OA reports include a 'reason' field... */
293 #define OAREPORT_REASON_MASK 0x3f
294 #define OAREPORT_REASON_SHIFT 19
295 #define OAREPORT_REASON_TIMER (1<<0)
296 #define OAREPORT_REASON_CTX_SWITCH (1<<3)
297 #define OAREPORT_REASON_CLK_RATIO (1<<5)
300 /* For sysctl proc_dointvec_minmax of i915_oa_max_sample_rate
302 * The highest sampling frequency we can theoretically program the OA unit
303 * with is always half the timestamp frequency: E.g. 6.25Mhz for Haswell.
305 * Initialized just before we register the sysctl parameter.
307 static int oa_sample_rate_hard_limit;
309 /* Theoretically we can program the OA unit to sample every 160ns but don't
310 * allow that by default unless root...
312 * The default threshold of 100000Hz is based on perf's similar
313 * kernel.perf_event_max_sample_rate sysctl parameter.
315 static u32 i915_oa_max_sample_rate = 100000;
317 /* XXX: beware if future OA HW adds new report formats that the current
318 * code assumes all reports have a power-of-two size and ~(size - 1) can
319 * be used as a mask to align the OA tail pointer.
321 static const struct i915_oa_format hsw_oa_formats[I915_OA_FORMAT_MAX] = {
322 [I915_OA_FORMAT_A13] = { 0, 64 },
323 [I915_OA_FORMAT_A29] = { 1, 128 },
324 [I915_OA_FORMAT_A13_B8_C8] = { 2, 128 },
325 /* A29_B8_C8 Disallowed as 192 bytes doesn't factor into buffer size */
326 [I915_OA_FORMAT_B4_C8] = { 4, 64 },
327 [I915_OA_FORMAT_A45_B8_C8] = { 5, 256 },
328 [I915_OA_FORMAT_B4_C8_A16] = { 6, 128 },
329 [I915_OA_FORMAT_C4_B8] = { 7, 64 },
332 static const struct i915_oa_format gen8_plus_oa_formats[I915_OA_FORMAT_MAX] = {
333 [I915_OA_FORMAT_A12] = { 0, 64 },
334 [I915_OA_FORMAT_A12_B8_C8] = { 2, 128 },
335 [I915_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
336 [I915_OA_FORMAT_C4_B8] = { 7, 64 },
339 #define SAMPLE_OA_REPORT (1<<0)
342 * struct perf_open_properties - for validated properties given to open a stream
343 * @sample_flags: `DRM_I915_PERF_PROP_SAMPLE_*` properties are tracked as flags
344 * @single_context: Whether a single or all gpu contexts should be monitored
345 * @ctx_handle: A gem ctx handle for use with @single_context
346 * @metrics_set: An ID for an OA unit metric set advertised via sysfs
347 * @oa_format: An OA unit HW report format
348 * @oa_periodic: Whether to enable periodic OA unit sampling
349 * @oa_period_exponent: The OA unit sampling period is derived from this
351 * As read_properties_unlocked() enumerates and validates the properties given
352 * to open a stream of metrics the configuration is built up in the structure
353 * which starts out zero initialized.
355 struct perf_open_properties {
358 u64 single_context:1;
361 /* OA sampling state */
365 int oa_period_exponent;
368 static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer);
370 static void free_oa_config(struct drm_i915_private *dev_priv,
371 struct i915_oa_config *oa_config)
373 if (!PTR_ERR(oa_config->flex_regs))
374 kfree(oa_config->flex_regs);
375 if (!PTR_ERR(oa_config->b_counter_regs))
376 kfree(oa_config->b_counter_regs);
377 if (!PTR_ERR(oa_config->mux_regs))
378 kfree(oa_config->mux_regs);
382 static void put_oa_config(struct drm_i915_private *dev_priv,
383 struct i915_oa_config *oa_config)
385 if (!atomic_dec_and_test(&oa_config->ref_count))
388 free_oa_config(dev_priv, oa_config);
391 static int get_oa_config(struct drm_i915_private *dev_priv,
393 struct i915_oa_config **out_config)
397 if (metrics_set == 1) {
398 *out_config = &dev_priv->perf.test_config;
399 atomic_inc(&dev_priv->perf.test_config.ref_count);
403 ret = mutex_lock_interruptible(&dev_priv->perf.metrics_lock);
407 *out_config = idr_find(&dev_priv->perf.metrics_idr, metrics_set);
411 atomic_inc(&(*out_config)->ref_count);
413 mutex_unlock(&dev_priv->perf.metrics_lock);
418 static u32 gen8_oa_hw_tail_read(struct i915_perf_stream *stream)
420 struct drm_i915_private *dev_priv = stream->dev_priv;
422 return I915_READ(GEN8_OATAILPTR) & GEN8_OATAILPTR_MASK;
425 static u32 gen7_oa_hw_tail_read(struct i915_perf_stream *stream)
427 struct drm_i915_private *dev_priv = stream->dev_priv;
428 u32 oastatus1 = I915_READ(GEN7_OASTATUS1);
430 return oastatus1 & GEN7_OASTATUS1_TAIL_MASK;
434 * oa_buffer_check_unlocked - check for data and update tail ptr state
435 * @stream: i915 stream instance
437 * This is either called via fops (for blocking reads in user ctx) or the poll
438 * check hrtimer (atomic ctx) to check the OA buffer tail pointer and check
439 * if there is data available for userspace to read.
441 * This function is central to providing a workaround for the OA unit tail
442 * pointer having a race with respect to what data is visible to the CPU.
443 * It is responsible for reading tail pointers from the hardware and giving
444 * the pointers time to 'age' before they are made available for reading.
445 * (See description of OA_TAIL_MARGIN_NSEC above for further details.)
447 * Besides returning true when there is data available to read() this function
448 * also has the side effect of updating the oa_buffer.tails[], .aging_timestamp
449 * and .aged_tail_idx state used for reading.
451 * Note: It's safe to read OA config state here unlocked, assuming that this is
452 * only called while the stream is enabled, while the global OA configuration
455 * Returns: %true if the OA buffer contains data, else %false
457 static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
459 struct drm_i915_private *dev_priv = stream->dev_priv;
460 int report_size = stream->oa_buffer.format_size;
462 unsigned int aged_idx;
463 u32 head, hw_tail, aged_tail, aging_tail;
466 /* We have to consider the (unlikely) possibility that read() errors
467 * could result in an OA buffer reset which might reset the head,
468 * tails[] and aged_tail state.
470 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
472 /* NB: The head we observe here might effectively be a little out of
473 * date (between head and tails[aged_idx].offset if there is currently
474 * a read() in progress.
476 head = stream->oa_buffer.head;
478 aged_idx = stream->oa_buffer.aged_tail_idx;
479 aged_tail = stream->oa_buffer.tails[aged_idx].offset;
480 aging_tail = stream->oa_buffer.tails[!aged_idx].offset;
482 hw_tail = dev_priv->perf.ops.oa_hw_tail_read(stream);
484 /* The tail pointer increases in 64 byte increments,
485 * not in report_size steps...
487 hw_tail &= ~(report_size - 1);
489 now = ktime_get_mono_fast_ns();
491 /* Update the aged tail
493 * Flip the tail pointer available for read()s once the aging tail is
494 * old enough to trust that the corresponding data will be visible to
497 * Do this before updating the aging pointer in case we may be able to
498 * immediately start aging a new pointer too (if new data has become
499 * available) without needing to wait for a later hrtimer callback.
501 if (aging_tail != INVALID_TAIL_PTR &&
502 ((now - stream->oa_buffer.aging_timestamp) >
503 OA_TAIL_MARGIN_NSEC)) {
506 stream->oa_buffer.aged_tail_idx = aged_idx;
508 aged_tail = aging_tail;
510 /* Mark that we need a new pointer to start aging... */
511 stream->oa_buffer.tails[!aged_idx].offset = INVALID_TAIL_PTR;
512 aging_tail = INVALID_TAIL_PTR;
515 /* Update the aging tail
517 * We throttle aging tail updates until we have a new tail that
518 * represents >= one report more data than is already available for
519 * reading. This ensures there will be enough data for a successful
520 * read once this new pointer has aged and ensures we will give the new
521 * pointer time to age.
523 if (aging_tail == INVALID_TAIL_PTR &&
524 (aged_tail == INVALID_TAIL_PTR ||
525 OA_TAKEN(hw_tail, aged_tail) >= report_size)) {
526 struct i915_vma *vma = stream->oa_buffer.vma;
527 u32 gtt_offset = i915_ggtt_offset(vma);
529 /* Be paranoid and do a bounds check on the pointer read back
530 * from hardware, just in case some spurious hardware condition
531 * could put the tail out of bounds...
533 if (hw_tail >= gtt_offset &&
534 hw_tail < (gtt_offset + OA_BUFFER_SIZE)) {
535 stream->oa_buffer.tails[!aged_idx].offset =
536 aging_tail = hw_tail;
537 stream->oa_buffer.aging_timestamp = now;
539 DRM_ERROR("Ignoring spurious out of range OA buffer tail pointer = %u\n",
544 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
546 return aged_tail == INVALID_TAIL_PTR ?
547 false : OA_TAKEN(aged_tail, head) >= report_size;
551 * append_oa_status - Appends a status record to a userspace read() buffer.
552 * @stream: An i915-perf stream opened for OA metrics
553 * @buf: destination buffer given by userspace
554 * @count: the number of bytes userspace wants to read
555 * @offset: (inout): the current position for writing into @buf
556 * @type: The kind of status to report to userspace
558 * Writes a status record (such as `DRM_I915_PERF_RECORD_OA_REPORT_LOST`)
559 * into the userspace read() buffer.
561 * The @buf @offset will only be updated on success.
563 * Returns: 0 on success, negative error code on failure.
565 static int append_oa_status(struct i915_perf_stream *stream,
569 enum drm_i915_perf_record_type type)
571 struct drm_i915_perf_record_header header = { type, 0, sizeof(header) };
573 if ((count - *offset) < header.size)
576 if (copy_to_user(buf + *offset, &header, sizeof(header)))
579 (*offset) += header.size;
585 * append_oa_sample - Copies single OA report into userspace read() buffer.
586 * @stream: An i915-perf stream opened for OA metrics
587 * @buf: destination buffer given by userspace
588 * @count: the number of bytes userspace wants to read
589 * @offset: (inout): the current position for writing into @buf
590 * @report: A single OA report to (optionally) include as part of the sample
592 * The contents of a sample are configured through `DRM_I915_PERF_PROP_SAMPLE_*`
593 * properties when opening a stream, tracked as `stream->sample_flags`. This
594 * function copies the requested components of a single sample to the given
597 * The @buf @offset will only be updated on success.
599 * Returns: 0 on success, negative error code on failure.
601 static int append_oa_sample(struct i915_perf_stream *stream,
607 int report_size = stream->oa_buffer.format_size;
608 struct drm_i915_perf_record_header header;
609 u32 sample_flags = stream->sample_flags;
611 header.type = DRM_I915_PERF_RECORD_SAMPLE;
613 header.size = stream->sample_size;
615 if ((count - *offset) < header.size)
619 if (copy_to_user(buf, &header, sizeof(header)))
621 buf += sizeof(header);
623 if (sample_flags & SAMPLE_OA_REPORT) {
624 if (copy_to_user(buf, report, report_size))
628 (*offset) += header.size;
634 * Copies all buffered OA reports into userspace read() buffer.
635 * @stream: An i915-perf stream opened for OA metrics
636 * @buf: destination buffer given by userspace
637 * @count: the number of bytes userspace wants to read
638 * @offset: (inout): the current position for writing into @buf
640 * Notably any error condition resulting in a short read (-%ENOSPC or
641 * -%EFAULT) will be returned even though one or more records may
642 * have been successfully copied. In this case it's up to the caller
643 * to decide if the error should be squashed before returning to
646 * Note: reports are consumed from the head, and appended to the
647 * tail, so the tail chases the head?... If you think that's mad
648 * and back-to-front you're not alone, but this follows the
649 * Gen PRM naming convention.
651 * Returns: 0 on success, negative error code on failure.
653 static int gen8_append_oa_reports(struct i915_perf_stream *stream,
658 struct drm_i915_private *dev_priv = stream->dev_priv;
659 int report_size = stream->oa_buffer.format_size;
660 u8 *oa_buf_base = stream->oa_buffer.vaddr;
661 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
662 u32 mask = (OA_BUFFER_SIZE - 1);
663 size_t start_offset = *offset;
665 unsigned int aged_tail_idx;
670 if (WARN_ON(!stream->enabled))
673 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
675 head = stream->oa_buffer.head;
676 aged_tail_idx = stream->oa_buffer.aged_tail_idx;
677 tail = stream->oa_buffer.tails[aged_tail_idx].offset;
679 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
682 * An invalid tail pointer here means we're still waiting for the poll
683 * hrtimer callback to give us a pointer
685 if (tail == INVALID_TAIL_PTR)
689 * NB: oa_buffer.head/tail include the gtt_offset which we don't want
690 * while indexing relative to oa_buf_base.
696 * An out of bounds or misaligned head or tail pointer implies a driver
697 * bug since we validate + align the tail pointers we read from the
698 * hardware and we are in full control of the head pointer which should
699 * only be incremented by multiples of the report size (notably also
700 * all a power of two).
702 if (WARN_ONCE(head > OA_BUFFER_SIZE || head % report_size ||
703 tail > OA_BUFFER_SIZE || tail % report_size,
704 "Inconsistent OA buffer pointers: head = %u, tail = %u\n",
710 (taken = OA_TAKEN(tail, head));
711 head = (head + report_size) & mask) {
712 u8 *report = oa_buf_base + head;
713 u32 *report32 = (void *)report;
718 * All the report sizes factor neatly into the buffer
719 * size so we never expect to see a report split
720 * between the beginning and end of the buffer.
722 * Given the initial alignment check a misalignment
723 * here would imply a driver bug that would result
726 if (WARN_ON((OA_BUFFER_SIZE - head) < report_size)) {
727 DRM_ERROR("Spurious OA head ptr: non-integral report offset\n");
732 * The reason field includes flags identifying what
733 * triggered this specific report (mostly timer
734 * triggered or e.g. due to a context switch).
736 * This field is never expected to be zero so we can
737 * check that the report isn't invalid before copying
740 reason = ((report32[0] >> OAREPORT_REASON_SHIFT) &
741 OAREPORT_REASON_MASK);
743 if (__ratelimit(&dev_priv->perf.spurious_report_rs))
744 DRM_NOTE("Skipping spurious, invalid OA report\n");
748 ctx_id = report32[2] & stream->specific_ctx_id_mask;
751 * Squash whatever is in the CTX_ID field if it's marked as
752 * invalid to be sure we avoid false-positive, single-context
755 * Note: that we don't clear the valid_ctx_bit so userspace can
756 * understand that the ID has been squashed by the kernel.
758 if (!(report32[0] & dev_priv->perf.gen8_valid_ctx_bit))
759 ctx_id = report32[2] = INVALID_CTX_ID;
762 * NB: For Gen 8 the OA unit no longer supports clock gating
763 * off for a specific context and the kernel can't securely
764 * stop the counters from updating as system-wide / global
767 * Automatic reports now include a context ID so reports can be
768 * filtered on the cpu but it's not worth trying to
769 * automatically subtract/hide counter progress for other
770 * contexts while filtering since we can't stop userspace
771 * issuing MI_REPORT_PERF_COUNT commands which would still
772 * provide a side-band view of the real values.
774 * To allow userspace (such as Mesa/GL_INTEL_performance_query)
775 * to normalize counters for a single filtered context then it
776 * needs be forwarded bookend context-switch reports so that it
777 * can track switches in between MI_REPORT_PERF_COUNT commands
778 * and can itself subtract/ignore the progress of counters
779 * associated with other contexts. Note that the hardware
780 * automatically triggers reports when switching to a new
781 * context which are tagged with the ID of the newly active
782 * context. To avoid the complexity (and likely fragility) of
783 * reading ahead while parsing reports to try and minimize
784 * forwarding redundant context switch reports (i.e. between
785 * other, unrelated contexts) we simply elect to forward them
788 * We don't rely solely on the reason field to identify context
789 * switches since it's not-uncommon for periodic samples to
790 * identify a switch before any 'context switch' report.
792 if (!dev_priv->perf.exclusive_stream->ctx ||
793 stream->specific_ctx_id == ctx_id ||
794 stream->oa_buffer.last_ctx_id == stream->specific_ctx_id ||
795 reason & OAREPORT_REASON_CTX_SWITCH) {
798 * While filtering for a single context we avoid
799 * leaking the IDs of other contexts.
801 if (dev_priv->perf.exclusive_stream->ctx &&
802 stream->specific_ctx_id != ctx_id) {
803 report32[2] = INVALID_CTX_ID;
806 ret = append_oa_sample(stream, buf, count, offset,
811 stream->oa_buffer.last_ctx_id = ctx_id;
815 * The above reason field sanity check is based on
816 * the assumption that the OA buffer is initially
817 * zeroed and we reset the field after copying so the
818 * check is still meaningful once old reports start
824 if (start_offset != *offset) {
825 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
828 * We removed the gtt_offset for the copy loop above, indexing
829 * relative to oa_buf_base so put back here...
833 I915_WRITE(GEN8_OAHEADPTR, head & GEN8_OAHEADPTR_MASK);
834 stream->oa_buffer.head = head;
836 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
843 * gen8_oa_read - copy status records then buffered OA reports
844 * @stream: An i915-perf stream opened for OA metrics
845 * @buf: destination buffer given by userspace
846 * @count: the number of bytes userspace wants to read
847 * @offset: (inout): the current position for writing into @buf
849 * Checks OA unit status registers and if necessary appends corresponding
850 * status records for userspace (such as for a buffer full condition) and then
851 * initiate appending any buffered OA reports.
853 * Updates @offset according to the number of bytes successfully copied into
854 * the userspace buffer.
856 * NB: some data may be successfully copied to the userspace buffer
857 * even if an error is returned, and this is reflected in the
860 * Returns: zero on success or a negative error code
862 static int gen8_oa_read(struct i915_perf_stream *stream,
867 struct drm_i915_private *dev_priv = stream->dev_priv;
871 if (WARN_ON(!stream->oa_buffer.vaddr))
874 oastatus = I915_READ(GEN8_OASTATUS);
877 * We treat OABUFFER_OVERFLOW as a significant error:
879 * Although theoretically we could handle this more gracefully
880 * sometimes, some Gens don't correctly suppress certain
881 * automatically triggered reports in this condition and so we
882 * have to assume that old reports are now being trampled
885 * Considering how we don't currently give userspace control
886 * over the OA buffer size and always configure a large 16MB
887 * buffer, then a buffer overflow does anyway likely indicate
888 * that something has gone quite badly wrong.
890 if (oastatus & GEN8_OASTATUS_OABUFFER_OVERFLOW) {
891 ret = append_oa_status(stream, buf, count, offset,
892 DRM_I915_PERF_RECORD_OA_BUFFER_LOST);
896 DRM_DEBUG("OA buffer overflow (exponent = %d): force restart\n",
897 stream->period_exponent);
899 dev_priv->perf.ops.oa_disable(stream);
900 dev_priv->perf.ops.oa_enable(stream);
903 * Note: .oa_enable() is expected to re-init the oabuffer and
904 * reset GEN8_OASTATUS for us
906 oastatus = I915_READ(GEN8_OASTATUS);
909 if (oastatus & GEN8_OASTATUS_REPORT_LOST) {
910 ret = append_oa_status(stream, buf, count, offset,
911 DRM_I915_PERF_RECORD_OA_REPORT_LOST);
914 I915_WRITE(GEN8_OASTATUS,
915 oastatus & ~GEN8_OASTATUS_REPORT_LOST);
918 return gen8_append_oa_reports(stream, buf, count, offset);
922 * Copies all buffered OA reports into userspace read() buffer.
923 * @stream: An i915-perf stream opened for OA metrics
924 * @buf: destination buffer given by userspace
925 * @count: the number of bytes userspace wants to read
926 * @offset: (inout): the current position for writing into @buf
928 * Notably any error condition resulting in a short read (-%ENOSPC or
929 * -%EFAULT) will be returned even though one or more records may
930 * have been successfully copied. In this case it's up to the caller
931 * to decide if the error should be squashed before returning to
934 * Note: reports are consumed from the head, and appended to the
935 * tail, so the tail chases the head?... If you think that's mad
936 * and back-to-front you're not alone, but this follows the
937 * Gen PRM naming convention.
939 * Returns: 0 on success, negative error code on failure.
941 static int gen7_append_oa_reports(struct i915_perf_stream *stream,
946 struct drm_i915_private *dev_priv = stream->dev_priv;
947 int report_size = stream->oa_buffer.format_size;
948 u8 *oa_buf_base = stream->oa_buffer.vaddr;
949 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
950 u32 mask = (OA_BUFFER_SIZE - 1);
951 size_t start_offset = *offset;
953 unsigned int aged_tail_idx;
958 if (WARN_ON(!stream->enabled))
961 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
963 head = stream->oa_buffer.head;
964 aged_tail_idx = stream->oa_buffer.aged_tail_idx;
965 tail = stream->oa_buffer.tails[aged_tail_idx].offset;
967 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
969 /* An invalid tail pointer here means we're still waiting for the poll
970 * hrtimer callback to give us a pointer
972 if (tail == INVALID_TAIL_PTR)
975 /* NB: oa_buffer.head/tail include the gtt_offset which we don't want
976 * while indexing relative to oa_buf_base.
981 /* An out of bounds or misaligned head or tail pointer implies a driver
982 * bug since we validate + align the tail pointers we read from the
983 * hardware and we are in full control of the head pointer which should
984 * only be incremented by multiples of the report size (notably also
985 * all a power of two).
987 if (WARN_ONCE(head > OA_BUFFER_SIZE || head % report_size ||
988 tail > OA_BUFFER_SIZE || tail % report_size,
989 "Inconsistent OA buffer pointers: head = %u, tail = %u\n",
995 (taken = OA_TAKEN(tail, head));
996 head = (head + report_size) & mask) {
997 u8 *report = oa_buf_base + head;
998 u32 *report32 = (void *)report;
1000 /* All the report sizes factor neatly into the buffer
1001 * size so we never expect to see a report split
1002 * between the beginning and end of the buffer.
1004 * Given the initial alignment check a misalignment
1005 * here would imply a driver bug that would result
1008 if (WARN_ON((OA_BUFFER_SIZE - head) < report_size)) {
1009 DRM_ERROR("Spurious OA head ptr: non-integral report offset\n");
1013 /* The report-ID field for periodic samples includes
1014 * some undocumented flags related to what triggered
1015 * the report and is never expected to be zero so we
1016 * can check that the report isn't invalid before
1017 * copying it to userspace...
1019 if (report32[0] == 0) {
1020 if (__ratelimit(&dev_priv->perf.spurious_report_rs))
1021 DRM_NOTE("Skipping spurious, invalid OA report\n");
1025 ret = append_oa_sample(stream, buf, count, offset, report);
1029 /* The above report-id field sanity check is based on
1030 * the assumption that the OA buffer is initially
1031 * zeroed and we reset the field after copying so the
1032 * check is still meaningful once old reports start
1033 * being overwritten.
1038 if (start_offset != *offset) {
1039 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
1041 /* We removed the gtt_offset for the copy loop above, indexing
1042 * relative to oa_buf_base so put back here...
1046 I915_WRITE(GEN7_OASTATUS2,
1047 ((head & GEN7_OASTATUS2_HEAD_MASK) |
1048 GEN7_OASTATUS2_MEM_SELECT_GGTT));
1049 stream->oa_buffer.head = head;
1051 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
1058 * gen7_oa_read - copy status records then buffered OA reports
1059 * @stream: An i915-perf stream opened for OA metrics
1060 * @buf: destination buffer given by userspace
1061 * @count: the number of bytes userspace wants to read
1062 * @offset: (inout): the current position for writing into @buf
1064 * Checks Gen 7 specific OA unit status registers and if necessary appends
1065 * corresponding status records for userspace (such as for a buffer full
1066 * condition) and then initiate appending any buffered OA reports.
1068 * Updates @offset according to the number of bytes successfully copied into
1069 * the userspace buffer.
1071 * Returns: zero on success or a negative error code
1073 static int gen7_oa_read(struct i915_perf_stream *stream,
1078 struct drm_i915_private *dev_priv = stream->dev_priv;
1082 if (WARN_ON(!stream->oa_buffer.vaddr))
1085 oastatus1 = I915_READ(GEN7_OASTATUS1);
1087 /* XXX: On Haswell we don't have a safe way to clear oastatus1
1088 * bits while the OA unit is enabled (while the tail pointer
1089 * may be updated asynchronously) so we ignore status bits
1090 * that have already been reported to userspace.
1092 oastatus1 &= ~dev_priv->perf.gen7_latched_oastatus1;
1094 /* We treat OABUFFER_OVERFLOW as a significant error:
1096 * - The status can be interpreted to mean that the buffer is
1097 * currently full (with a higher precedence than OA_TAKEN()
1098 * which will start to report a near-empty buffer after an
1099 * overflow) but it's awkward that we can't clear the status
1100 * on Haswell, so without a reset we won't be able to catch
1103 * - Since it also implies the HW has started overwriting old
1104 * reports it may also affect our sanity checks for invalid
1105 * reports when copying to userspace that assume new reports
1106 * are being written to cleared memory.
1108 * - In the future we may want to introduce a flight recorder
1109 * mode where the driver will automatically maintain a safe
1110 * guard band between head/tail, avoiding this overflow
1111 * condition, but we avoid the added driver complexity for
1114 if (unlikely(oastatus1 & GEN7_OASTATUS1_OABUFFER_OVERFLOW)) {
1115 ret = append_oa_status(stream, buf, count, offset,
1116 DRM_I915_PERF_RECORD_OA_BUFFER_LOST);
1120 DRM_DEBUG("OA buffer overflow (exponent = %d): force restart\n",
1121 stream->period_exponent);
1123 dev_priv->perf.ops.oa_disable(stream);
1124 dev_priv->perf.ops.oa_enable(stream);
1126 oastatus1 = I915_READ(GEN7_OASTATUS1);
1129 if (unlikely(oastatus1 & GEN7_OASTATUS1_REPORT_LOST)) {
1130 ret = append_oa_status(stream, buf, count, offset,
1131 DRM_I915_PERF_RECORD_OA_REPORT_LOST);
1134 dev_priv->perf.gen7_latched_oastatus1 |=
1135 GEN7_OASTATUS1_REPORT_LOST;
1138 return gen7_append_oa_reports(stream, buf, count, offset);
1142 * i915_oa_wait_unlocked - handles blocking IO until OA data available
1143 * @stream: An i915-perf stream opened for OA metrics
1145 * Called when userspace tries to read() from a blocking stream FD opened
1146 * for OA metrics. It waits until the hrtimer callback finds a non-empty
1147 * OA buffer and wakes us.
1149 * Note: it's acceptable to have this return with some false positives
1150 * since any subsequent read handling will return -EAGAIN if there isn't
1151 * really data ready for userspace yet.
1153 * Returns: zero on success or a negative error code
1155 static int i915_oa_wait_unlocked(struct i915_perf_stream *stream)
1157 /* We would wait indefinitely if periodic sampling is not enabled */
1158 if (!stream->periodic)
1161 return wait_event_interruptible(stream->poll_wq,
1162 oa_buffer_check_unlocked(stream));
1166 * i915_oa_poll_wait - call poll_wait() for an OA stream poll()
1167 * @stream: An i915-perf stream opened for OA metrics
1168 * @file: An i915 perf stream file
1169 * @wait: poll() state table
1171 * For handling userspace polling on an i915 perf stream opened for OA metrics,
1172 * this starts a poll_wait with the wait queue that our hrtimer callback wakes
1173 * when it sees data ready to read in the circular OA buffer.
1175 static void i915_oa_poll_wait(struct i915_perf_stream *stream,
1179 poll_wait(file, &stream->poll_wq, wait);
1183 * i915_oa_read - just calls through to &i915_oa_ops->read
1184 * @stream: An i915-perf stream opened for OA metrics
1185 * @buf: destination buffer given by userspace
1186 * @count: the number of bytes userspace wants to read
1187 * @offset: (inout): the current position for writing into @buf
1189 * Updates @offset according to the number of bytes successfully copied into
1190 * the userspace buffer.
1192 * Returns: zero on success or a negative error code
1194 static int i915_oa_read(struct i915_perf_stream *stream,
1199 struct drm_i915_private *dev_priv = stream->dev_priv;
1201 return dev_priv->perf.ops.read(stream, buf, count, offset);
1204 static struct intel_context *oa_pin_context(struct i915_perf_stream *stream)
1206 struct i915_gem_engines_iter it;
1207 struct i915_gem_context *ctx = stream->ctx;
1208 struct intel_context *ce;
1211 for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
1212 if (ce->engine->class != RENDER_CLASS)
1216 * As the ID is the gtt offset of the context's vma we
1217 * pin the vma to ensure the ID remains fixed.
1219 err = intel_context_pin(ce);
1221 stream->pinned_ctx = ce;
1225 i915_gem_context_unlock_engines(ctx);
1227 return stream->pinned_ctx;
1231 * oa_get_render_ctx_id - determine and hold ctx hw id
1232 * @stream: An i915-perf stream opened for OA metrics
1234 * Determine the render context hw id, and ensure it remains fixed for the
1235 * lifetime of the stream. This ensures that we don't have to worry about
1236 * updating the context ID in OACONTROL on the fly.
1238 * Returns: zero on success or a negative error code
1240 static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
1242 struct drm_i915_private *i915 = stream->dev_priv;
1243 struct intel_context *ce;
1245 ce = oa_pin_context(stream);
1249 switch (INTEL_GEN(i915)) {
1252 * On Haswell we don't do any post processing of the reports
1253 * and don't need to use the mask.
1255 stream->specific_ctx_id = i915_ggtt_offset(ce->state);
1256 stream->specific_ctx_id_mask = 0;
1263 if (USES_GUC_SUBMISSION(i915)) {
1265 * When using GuC, the context descriptor we write in
1266 * i915 is read by GuC and rewritten before it's
1267 * actually written into the hardware. The LRCA is
1268 * what is put into the context id field of the
1269 * context descriptor by GuC. Because it's aligned to
1270 * a page, the lower 12bits are always at 0 and
1271 * dropped by GuC. They won't be part of the context
1272 * ID in the OA reports, so squash those lower bits.
1274 stream->specific_ctx_id =
1275 lower_32_bits(ce->lrc_desc) >> 12;
1278 * GuC uses the top bit to signal proxy submission, so
1281 stream->specific_ctx_id_mask =
1282 (1U << (GEN8_CTX_ID_WIDTH - 1)) - 1;
1284 stream->specific_ctx_id_mask =
1285 (1U << GEN8_CTX_ID_WIDTH) - 1;
1286 stream->specific_ctx_id =
1287 upper_32_bits(ce->lrc_desc);
1288 stream->specific_ctx_id &=
1289 stream->specific_ctx_id_mask;
1295 stream->specific_ctx_id_mask =
1296 ((1U << GEN11_SW_CTX_ID_WIDTH) - 1) << (GEN11_SW_CTX_ID_SHIFT - 32) |
1297 ((1U << GEN11_ENGINE_INSTANCE_WIDTH) - 1) << (GEN11_ENGINE_INSTANCE_SHIFT - 32) |
1298 ((1 << GEN11_ENGINE_CLASS_WIDTH) - 1) << (GEN11_ENGINE_CLASS_SHIFT - 32);
1299 stream->specific_ctx_id = upper_32_bits(ce->lrc_desc);
1300 stream->specific_ctx_id &=
1301 stream->specific_ctx_id_mask;
1306 MISSING_CASE(INTEL_GEN(i915));
1309 DRM_DEBUG_DRIVER("filtering on ctx_id=0x%x ctx_id_mask=0x%x\n",
1310 stream->specific_ctx_id,
1311 stream->specific_ctx_id_mask);
1317 * oa_put_render_ctx_id - counterpart to oa_get_render_ctx_id releases hold
1318 * @stream: An i915-perf stream opened for OA metrics
1320 * In case anything needed doing to ensure the context HW ID would remain valid
1321 * for the lifetime of the stream, then that can be undone here.
1323 static void oa_put_render_ctx_id(struct i915_perf_stream *stream)
1325 struct intel_context *ce;
1327 stream->specific_ctx_id = INVALID_CTX_ID;
1328 stream->specific_ctx_id_mask = 0;
1330 ce = fetch_and_zero(&stream->pinned_ctx);
1332 intel_context_unpin(ce);
1336 free_oa_buffer(struct i915_perf_stream *stream)
1338 i915_vma_unpin_and_release(&stream->oa_buffer.vma,
1339 I915_VMA_RELEASE_MAP);
1341 stream->oa_buffer.vaddr = NULL;
1344 static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
1346 struct drm_i915_private *dev_priv = stream->dev_priv;
1348 BUG_ON(stream != dev_priv->perf.exclusive_stream);
1351 * Unset exclusive_stream first, it will be checked while disabling
1352 * the metric set on gen8+.
1354 mutex_lock(&dev_priv->drm.struct_mutex);
1355 dev_priv->perf.exclusive_stream = NULL;
1356 dev_priv->perf.ops.disable_metric_set(stream);
1357 mutex_unlock(&dev_priv->drm.struct_mutex);
1359 free_oa_buffer(stream);
1361 intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
1362 intel_runtime_pm_put(&dev_priv->runtime_pm, stream->wakeref);
1365 oa_put_render_ctx_id(stream);
1367 put_oa_config(dev_priv, stream->oa_config);
1369 if (dev_priv->perf.spurious_report_rs.missed) {
1370 DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
1371 dev_priv->perf.spurious_report_rs.missed);
1375 static void gen7_init_oa_buffer(struct i915_perf_stream *stream)
1377 struct drm_i915_private *dev_priv = stream->dev_priv;
1378 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
1379 unsigned long flags;
1381 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
1383 /* Pre-DevBDW: OABUFFER must be set with counters off,
1384 * before OASTATUS1, but after OASTATUS2
1386 I915_WRITE(GEN7_OASTATUS2,
1387 gtt_offset | GEN7_OASTATUS2_MEM_SELECT_GGTT); /* head */
1388 stream->oa_buffer.head = gtt_offset;
1390 I915_WRITE(GEN7_OABUFFER, gtt_offset);
1392 I915_WRITE(GEN7_OASTATUS1, gtt_offset | OABUFFER_SIZE_16M); /* tail */
1394 /* Mark that we need updated tail pointers to read from... */
1395 stream->oa_buffer.tails[0].offset = INVALID_TAIL_PTR;
1396 stream->oa_buffer.tails[1].offset = INVALID_TAIL_PTR;
1398 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
1400 /* On Haswell we have to track which OASTATUS1 flags we've
1401 * already seen since they can't be cleared while periodic
1402 * sampling is enabled.
1404 dev_priv->perf.gen7_latched_oastatus1 = 0;
1406 /* NB: although the OA buffer will initially be allocated
1407 * zeroed via shmfs (and so this memset is redundant when
1408 * first allocating), we may re-init the OA buffer, either
1409 * when re-enabling a stream or in error/reset paths.
1411 * The reason we clear the buffer for each re-init is for the
1412 * sanity check in gen7_append_oa_reports() that looks at the
1413 * report-id field to make sure it's non-zero which relies on
1414 * the assumption that new reports are being written to zeroed
1417 memset(stream->oa_buffer.vaddr, 0, OA_BUFFER_SIZE);
1419 /* Maybe make ->pollin per-stream state if we support multiple
1420 * concurrent streams in the future.
1422 stream->pollin = false;
1425 static void gen8_init_oa_buffer(struct i915_perf_stream *stream)
1427 struct drm_i915_private *dev_priv = stream->dev_priv;
1428 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
1429 unsigned long flags;
1431 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
1433 I915_WRITE(GEN8_OASTATUS, 0);
1434 I915_WRITE(GEN8_OAHEADPTR, gtt_offset);
1435 stream->oa_buffer.head = gtt_offset;
1437 I915_WRITE(GEN8_OABUFFER_UDW, 0);
1442 * "This MMIO must be set before the OATAILPTR
1443 * register and after the OAHEADPTR register. This is
1444 * to enable proper functionality of the overflow
1447 I915_WRITE(GEN8_OABUFFER, gtt_offset |
1448 OABUFFER_SIZE_16M | GEN8_OABUFFER_MEM_SELECT_GGTT);
1449 I915_WRITE(GEN8_OATAILPTR, gtt_offset & GEN8_OATAILPTR_MASK);
1451 /* Mark that we need updated tail pointers to read from... */
1452 stream->oa_buffer.tails[0].offset = INVALID_TAIL_PTR;
1453 stream->oa_buffer.tails[1].offset = INVALID_TAIL_PTR;
1456 * Reset state used to recognise context switches, affecting which
1457 * reports we will forward to userspace while filtering for a single
1460 stream->oa_buffer.last_ctx_id = INVALID_CTX_ID;
1462 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
1465 * NB: although the OA buffer will initially be allocated
1466 * zeroed via shmfs (and so this memset is redundant when
1467 * first allocating), we may re-init the OA buffer, either
1468 * when re-enabling a stream or in error/reset paths.
1470 * The reason we clear the buffer for each re-init is for the
1471 * sanity check in gen8_append_oa_reports() that looks at the
1472 * reason field to make sure it's non-zero which relies on
1473 * the assumption that new reports are being written to zeroed
1476 memset(stream->oa_buffer.vaddr, 0, OA_BUFFER_SIZE);
1479 * Maybe make ->pollin per-stream state if we support multiple
1480 * concurrent streams in the future.
1482 stream->pollin = false;
1485 static int alloc_oa_buffer(struct i915_perf_stream *stream)
1487 struct drm_i915_gem_object *bo;
1488 struct drm_i915_private *dev_priv = stream->dev_priv;
1489 struct i915_vma *vma;
1492 if (WARN_ON(stream->oa_buffer.vma))
1495 BUILD_BUG_ON_NOT_POWER_OF_2(OA_BUFFER_SIZE);
1496 BUILD_BUG_ON(OA_BUFFER_SIZE < SZ_128K || OA_BUFFER_SIZE > SZ_16M);
1498 bo = i915_gem_object_create_shmem(dev_priv, OA_BUFFER_SIZE);
1500 DRM_ERROR("Failed to allocate OA buffer\n");
1504 i915_gem_object_set_cache_coherency(bo, I915_CACHE_LLC);
1506 /* PreHSW required 512K alignment, HSW requires 16M */
1507 vma = i915_gem_object_ggtt_pin(bo, NULL, 0, SZ_16M, 0);
1512 stream->oa_buffer.vma = vma;
1514 stream->oa_buffer.vaddr =
1515 i915_gem_object_pin_map(bo, I915_MAP_WB);
1516 if (IS_ERR(stream->oa_buffer.vaddr)) {
1517 ret = PTR_ERR(stream->oa_buffer.vaddr);
1521 DRM_DEBUG_DRIVER("OA Buffer initialized, gtt offset = 0x%x, vaddr = %p\n",
1522 i915_ggtt_offset(stream->oa_buffer.vma),
1523 stream->oa_buffer.vaddr);
1528 __i915_vma_unpin(vma);
1531 i915_gem_object_put(bo);
1533 stream->oa_buffer.vaddr = NULL;
1534 stream->oa_buffer.vma = NULL;
1539 static void config_oa_regs(struct drm_i915_private *dev_priv,
1540 const struct i915_oa_reg *regs,
1545 for (i = 0; i < n_regs; i++) {
1546 const struct i915_oa_reg *reg = regs + i;
1548 I915_WRITE(reg->addr, reg->value);
1552 static void delay_after_mux(void)
1555 * It apparently takes a fairly long time for a new MUX
1556 * configuration to be be applied after these register writes.
1557 * This delay duration was derived empirically based on the
1558 * render_basic config but hopefully it covers the maximum
1559 * configuration latency.
1561 * As a fallback, the checks in _append_oa_reports() to skip
1562 * invalid OA reports do also seem to work to discard reports
1563 * generated before this config has completed - albeit not
1566 * Unfortunately this is essentially a magic number, since we
1567 * don't currently know of a reliable mechanism for predicting
1568 * how long the MUX config will take to apply and besides
1569 * seeing invalid reports we don't know of a reliable way to
1570 * explicitly check that the MUX config has landed.
1572 * It's even possible we've miss characterized the underlying
1573 * problem - it just seems like the simplest explanation why
1574 * a delay at this location would mitigate any invalid reports.
1576 usleep_range(15000, 20000);
1579 static int hsw_enable_metric_set(struct i915_perf_stream *stream)
1581 struct drm_i915_private *dev_priv = stream->dev_priv;
1582 const struct i915_oa_config *oa_config = stream->oa_config;
1587 * OA unit is using “crclk” for its functionality. When trunk
1588 * level clock gating takes place, OA clock would be gated,
1589 * unable to count the events from non-render clock domain.
1590 * Render clock gating must be disabled when OA is enabled to
1591 * count the events from non-render domain. Unit level clock
1592 * gating for RCS should also be disabled.
1594 I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) &
1595 ~GEN7_DOP_CLOCK_GATE_ENABLE));
1596 I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) |
1597 GEN6_CSUNIT_CLOCK_GATE_DISABLE));
1599 config_oa_regs(dev_priv, oa_config->mux_regs, oa_config->mux_regs_len);
1602 config_oa_regs(dev_priv, oa_config->b_counter_regs,
1603 oa_config->b_counter_regs_len);
1608 static void hsw_disable_metric_set(struct i915_perf_stream *stream)
1610 struct drm_i915_private *dev_priv = stream->dev_priv;
1612 I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) &
1613 ~GEN6_CSUNIT_CLOCK_GATE_DISABLE));
1614 I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) |
1615 GEN7_DOP_CLOCK_GATE_ENABLE));
1617 I915_WRITE(GDT_CHICKEN_BITS, (I915_READ(GDT_CHICKEN_BITS) &
1621 static u32 oa_config_flex_reg(const struct i915_oa_config *oa_config,
1624 u32 mmio = i915_mmio_reg_offset(reg);
1628 * This arbitrary default will select the 'EU FPU0 Pipeline
1629 * Active' event. In the future it's anticipated that there
1630 * will be an explicit 'No Event' we can select, but not yet...
1635 for (i = 0; i < oa_config->flex_regs_len; i++) {
1636 if (i915_mmio_reg_offset(oa_config->flex_regs[i].addr) == mmio)
1637 return oa_config->flex_regs[i].value;
1643 * NB: It must always remain pointer safe to run this even if the OA unit
1644 * has been disabled.
1646 * It's fine to put out-of-date values into these per-context registers
1647 * in the case that the OA unit has been disabled.
1650 gen8_update_reg_state_unlocked(const struct intel_context *ce,
1651 const struct i915_perf_stream *stream)
1653 struct drm_i915_private *i915 = ce->engine->i915;
1654 u32 ctx_oactxctrl = i915->perf.ctx_oactxctrl_offset;
1655 u32 ctx_flexeu0 = i915->perf.ctx_flexeu0_offset;
1656 /* The MMIO offsets for Flex EU registers aren't contiguous */
1657 i915_reg_t flex_regs[] = {
1666 u32 *reg_state = ce->lrc_reg_state;
1669 reg_state[ctx_oactxctrl + 1] =
1670 (stream->period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) |
1671 (stream->periodic ? GEN8_OA_TIMER_ENABLE : 0) |
1672 GEN8_OA_COUNTER_RESUME;
1674 for (i = 0; i < ARRAY_SIZE(flex_regs); i++)
1675 reg_state[ctx_flexeu0 + i * 2 + 1] =
1676 oa_config_flex_reg(stream->oa_config, flex_regs[i]);
1678 reg_state[CTX_R_PWR_CLK_STATE] = intel_sseu_make_rpcs(i915, &ce->sseu);
1688 gen8_store_flex(struct i915_request *rq,
1689 struct intel_context *ce,
1690 const struct flex *flex, unsigned int count)
1695 cs = intel_ring_begin(rq, 4 * count);
1699 offset = i915_ggtt_offset(ce->state) + LRC_STATE_PN * PAGE_SIZE;
1701 *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
1702 *cs++ = offset + flex->offset * sizeof(u32);
1704 *cs++ = flex->value;
1705 } while (flex++, --count);
1707 intel_ring_advance(rq, cs);
1713 gen8_load_flex(struct i915_request *rq,
1714 struct intel_context *ce,
1715 const struct flex *flex, unsigned int count)
1719 GEM_BUG_ON(!count || count > 63);
1721 cs = intel_ring_begin(rq, 2 * count + 2);
1725 *cs++ = MI_LOAD_REGISTER_IMM(count);
1727 *cs++ = i915_mmio_reg_offset(flex->reg);
1728 *cs++ = flex->value;
1729 } while (flex++, --count);
1732 intel_ring_advance(rq, cs);
1737 static int gen8_modify_context(struct intel_context *ce,
1738 const struct flex *flex, unsigned int count)
1740 struct i915_request *rq;
1743 lockdep_assert_held(&ce->pin_mutex);
1745 rq = i915_request_create(ce->engine->kernel_context);
1749 /* Serialise with the remote context */
1750 err = intel_context_prepare_remote_request(ce, rq);
1752 err = gen8_store_flex(rq, ce, flex, count);
1754 i915_request_add(rq);
1758 static int gen8_modify_self(struct intel_context *ce,
1759 const struct flex *flex, unsigned int count)
1761 struct i915_request *rq;
1764 rq = i915_request_create(ce);
1768 err = gen8_load_flex(rq, ce, flex, count);
1770 i915_request_add(rq);
1774 static int gen8_configure_context(struct i915_gem_context *ctx,
1775 struct flex *flex, unsigned int count)
1777 struct i915_gem_engines_iter it;
1778 struct intel_context *ce;
1781 for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
1782 GEM_BUG_ON(ce == ce->engine->kernel_context);
1784 if (ce->engine->class != RENDER_CLASS)
1787 err = intel_context_lock_pinned(ce);
1791 flex->value = intel_sseu_make_rpcs(ctx->i915, &ce->sseu);
1793 /* Otherwise OA settings will be set upon first use */
1794 if (intel_context_is_pinned(ce))
1795 err = gen8_modify_context(ce, flex, count);
1797 intel_context_unlock_pinned(ce);
1801 i915_gem_context_unlock_engines(ctx);
1807 * Manages updating the per-context aspects of the OA stream
1808 * configuration across all contexts.
1810 * The awkward consideration here is that OACTXCONTROL controls the
1811 * exponent for periodic sampling which is primarily used for system
1812 * wide profiling where we'd like a consistent sampling period even in
1813 * the face of context switches.
1815 * Our approach of updating the register state context (as opposed to
1816 * say using a workaround batch buffer) ensures that the hardware
1817 * won't automatically reload an out-of-date timer exponent even
1818 * transiently before a WA BB could be parsed.
1820 * This function needs to:
1821 * - Ensure the currently running context's per-context OA state is
1823 * - Ensure that all existing contexts will have the correct per-context
1824 * OA state if they are scheduled for use.
1825 * - Ensure any new contexts will be initialized with the correct
1826 * per-context OA state.
1828 * Note: it's only the RCS/Render context that has any OA state.
1830 static int gen8_configure_all_contexts(struct i915_perf_stream *stream,
1831 const struct i915_oa_config *oa_config)
1833 struct drm_i915_private *i915 = stream->dev_priv;
1834 /* The MMIO offsets for Flex EU registers aren't contiguous */
1835 const u32 ctx_flexeu0 = i915->perf.ctx_flexeu0_offset;
1836 #define ctx_flexeuN(N) (ctx_flexeu0 + 2 * (N) + 1)
1837 struct flex regs[] = {
1839 GEN8_R_PWR_CLK_STATE,
1840 CTX_R_PWR_CLK_STATE,
1844 i915->perf.ctx_oactxctrl_offset + 1,
1845 ((stream->period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) |
1846 (stream->periodic ? GEN8_OA_TIMER_ENABLE : 0) |
1847 GEN8_OA_COUNTER_RESUME)
1849 { EU_PERF_CNTL0, ctx_flexeuN(0) },
1850 { EU_PERF_CNTL1, ctx_flexeuN(1) },
1851 { EU_PERF_CNTL2, ctx_flexeuN(2) },
1852 { EU_PERF_CNTL3, ctx_flexeuN(3) },
1853 { EU_PERF_CNTL4, ctx_flexeuN(4) },
1854 { EU_PERF_CNTL5, ctx_flexeuN(5) },
1855 { EU_PERF_CNTL6, ctx_flexeuN(6) },
1858 struct intel_engine_cs *engine;
1859 struct i915_gem_context *ctx;
1862 for (i = 2; i < ARRAY_SIZE(regs); i++)
1863 regs[i].value = oa_config_flex_reg(oa_config, regs[i].reg);
1865 lockdep_assert_held(&i915->drm.struct_mutex);
1868 * The OA register config is setup through the context image. This image
1869 * might be written to by the GPU on context switch (in particular on
1870 * lite-restore). This means we can't safely update a context's image,
1871 * if this context is scheduled/submitted to run on the GPU.
1873 * We could emit the OA register config through the batch buffer but
1874 * this might leave small interval of time where the OA unit is
1875 * configured at an invalid sampling period.
1877 * Note that since we emit all requests from a single ring, there
1878 * is still an implicit global barrier here that may cause a high
1879 * priority context to wait for an otherwise independent low priority
1880 * context. Contexts idle at the time of reconfiguration are not
1881 * trapped behind the barrier.
1883 list_for_each_entry(ctx, &i915->contexts.list, link) {
1886 if (ctx == i915->kernel_context)
1889 err = gen8_configure_context(ctx, regs, ARRAY_SIZE(regs));
1895 * After updating all other contexts, we need to modify ourselves.
1896 * If we don't modify the kernel_context, we do not get events while
1899 for_each_uabi_engine(engine, i915) {
1900 struct intel_context *ce = engine->kernel_context;
1903 if (engine->class != RENDER_CLASS)
1906 regs[0].value = intel_sseu_make_rpcs(i915, &ce->sseu);
1908 err = gen8_modify_self(ce, regs, ARRAY_SIZE(regs));
1916 static int gen8_enable_metric_set(struct i915_perf_stream *stream)
1918 struct drm_i915_private *dev_priv = stream->dev_priv;
1919 const struct i915_oa_config *oa_config = stream->oa_config;
1923 * We disable slice/unslice clock ratio change reports on SKL since
1924 * they are too noisy. The HW generates a lot of redundant reports
1925 * where the ratio hasn't really changed causing a lot of redundant
1926 * work to processes and increasing the chances we'll hit buffer
1929 * Although we don't currently use the 'disable overrun' OABUFFER
1930 * feature it's worth noting that clock ratio reports have to be
1931 * disabled before considering to use that feature since the HW doesn't
1932 * correctly block these reports.
1934 * Currently none of the high-level metrics we have depend on knowing
1935 * this ratio to normalize.
1937 * Note: This register is not power context saved and restored, but
1938 * that's OK considering that we disable RC6 while the OA unit is
1941 * The _INCLUDE_CLK_RATIO bit allows the slice/unslice frequency to
1942 * be read back from automatically triggered reports, as part of the
1945 if (IS_GEN_RANGE(dev_priv, 9, 11)) {
1946 I915_WRITE(GEN8_OA_DEBUG,
1947 _MASKED_BIT_ENABLE(GEN9_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS |
1948 GEN9_OA_DEBUG_INCLUDE_CLK_RATIO));
1952 * Update all contexts prior writing the mux configurations as we need
1953 * to make sure all slices/subslices are ON before writing to NOA
1956 ret = gen8_configure_all_contexts(stream, oa_config);
1960 config_oa_regs(dev_priv, oa_config->mux_regs, oa_config->mux_regs_len);
1963 config_oa_regs(dev_priv, oa_config->b_counter_regs,
1964 oa_config->b_counter_regs_len);
1969 static void gen8_disable_metric_set(struct i915_perf_stream *stream)
1971 struct drm_i915_private *dev_priv = stream->dev_priv;
1973 /* Reset all contexts' slices/subslices configurations. */
1974 gen8_configure_all_contexts(stream, NULL);
1976 I915_WRITE(GDT_CHICKEN_BITS, (I915_READ(GDT_CHICKEN_BITS) &
1980 static void gen10_disable_metric_set(struct i915_perf_stream *stream)
1982 struct drm_i915_private *dev_priv = stream->dev_priv;
1984 /* Reset all contexts' slices/subslices configurations. */
1985 gen8_configure_all_contexts(stream, NULL);
1987 /* Make sure we disable noa to save power. */
1988 I915_WRITE(RPM_CONFIG1,
1989 I915_READ(RPM_CONFIG1) & ~GEN10_GT_NOA_ENABLE);
1992 static void gen7_oa_enable(struct i915_perf_stream *stream)
1994 struct drm_i915_private *dev_priv = stream->dev_priv;
1995 struct i915_gem_context *ctx = stream->ctx;
1996 u32 ctx_id = stream->specific_ctx_id;
1997 bool periodic = stream->periodic;
1998 u32 period_exponent = stream->period_exponent;
1999 u32 report_format = stream->oa_buffer.format;
2002 * Reset buf pointers so we don't forward reports from before now.
2004 * Think carefully if considering trying to avoid this, since it
2005 * also ensures status flags and the buffer itself are cleared
2006 * in error paths, and we have checks for invalid reports based
2007 * on the assumption that certain fields are written to zeroed
2008 * memory which this helps maintains.
2010 gen7_init_oa_buffer(stream);
2012 I915_WRITE(GEN7_OACONTROL,
2013 (ctx_id & GEN7_OACONTROL_CTX_MASK) |
2015 GEN7_OACONTROL_TIMER_PERIOD_SHIFT) |
2016 (periodic ? GEN7_OACONTROL_TIMER_ENABLE : 0) |
2017 (report_format << GEN7_OACONTROL_FORMAT_SHIFT) |
2018 (ctx ? GEN7_OACONTROL_PER_CTX_ENABLE : 0) |
2019 GEN7_OACONTROL_ENABLE);
2022 static void gen8_oa_enable(struct i915_perf_stream *stream)
2024 struct drm_i915_private *dev_priv = stream->dev_priv;
2025 u32 report_format = stream->oa_buffer.format;
2028 * Reset buf pointers so we don't forward reports from before now.
2030 * Think carefully if considering trying to avoid this, since it
2031 * also ensures status flags and the buffer itself are cleared
2032 * in error paths, and we have checks for invalid reports based
2033 * on the assumption that certain fields are written to zeroed
2034 * memory which this helps maintains.
2036 gen8_init_oa_buffer(stream);
2039 * Note: we don't rely on the hardware to perform single context
2040 * filtering and instead filter on the cpu based on the context-id
2043 I915_WRITE(GEN8_OACONTROL, (report_format <<
2044 GEN8_OA_REPORT_FORMAT_SHIFT) |
2045 GEN8_OA_COUNTER_ENABLE);
2049 * i915_oa_stream_enable - handle `I915_PERF_IOCTL_ENABLE` for OA stream
2050 * @stream: An i915 perf stream opened for OA metrics
2052 * [Re]enables hardware periodic sampling according to the period configured
2053 * when opening the stream. This also starts a hrtimer that will periodically
2054 * check for data in the circular OA buffer for notifying userspace (e.g.
2055 * during a read() or poll()).
2057 static void i915_oa_stream_enable(struct i915_perf_stream *stream)
2059 struct drm_i915_private *dev_priv = stream->dev_priv;
2061 dev_priv->perf.ops.oa_enable(stream);
2063 if (stream->periodic)
2064 hrtimer_start(&stream->poll_check_timer,
2065 ns_to_ktime(POLL_PERIOD),
2066 HRTIMER_MODE_REL_PINNED);
2069 static void gen7_oa_disable(struct i915_perf_stream *stream)
2071 struct intel_uncore *uncore = &stream->dev_priv->uncore;
2073 intel_uncore_write(uncore, GEN7_OACONTROL, 0);
2074 if (intel_wait_for_register(uncore,
2075 GEN7_OACONTROL, GEN7_OACONTROL_ENABLE, 0,
2077 DRM_ERROR("wait for OA to be disabled timed out\n");
2080 static void gen8_oa_disable(struct i915_perf_stream *stream)
2082 struct intel_uncore *uncore = &stream->dev_priv->uncore;
2084 intel_uncore_write(uncore, GEN8_OACONTROL, 0);
2085 if (intel_wait_for_register(uncore,
2086 GEN8_OACONTROL, GEN8_OA_COUNTER_ENABLE, 0,
2088 DRM_ERROR("wait for OA to be disabled timed out\n");
2092 * i915_oa_stream_disable - handle `I915_PERF_IOCTL_DISABLE` for OA stream
2093 * @stream: An i915 perf stream opened for OA metrics
2095 * Stops the OA unit from periodically writing counter reports into the
2096 * circular OA buffer. This also stops the hrtimer that periodically checks for
2097 * data in the circular OA buffer, for notifying userspace.
2099 static void i915_oa_stream_disable(struct i915_perf_stream *stream)
2101 struct drm_i915_private *dev_priv = stream->dev_priv;
2103 dev_priv->perf.ops.oa_disable(stream);
2105 if (stream->periodic)
2106 hrtimer_cancel(&stream->poll_check_timer);
2109 static const struct i915_perf_stream_ops i915_oa_stream_ops = {
2110 .destroy = i915_oa_stream_destroy,
2111 .enable = i915_oa_stream_enable,
2112 .disable = i915_oa_stream_disable,
2113 .wait_unlocked = i915_oa_wait_unlocked,
2114 .poll_wait = i915_oa_poll_wait,
2115 .read = i915_oa_read,
2119 * i915_oa_stream_init - validate combined props for OA stream and init
2120 * @stream: An i915 perf stream
2121 * @param: The open parameters passed to `DRM_I915_PERF_OPEN`
2122 * @props: The property state that configures stream (individually validated)
2124 * While read_properties_unlocked() validates properties in isolation it
2125 * doesn't ensure that the combination necessarily makes sense.
2127 * At this point it has been determined that userspace wants a stream of
2128 * OA metrics, but still we need to further validate the combined
2129 * properties are OK.
2131 * If the configuration makes sense then we can allocate memory for
2132 * a circular OA buffer and apply the requested metric set configuration.
2134 * Returns: zero on success or a negative error code.
2136 static int i915_oa_stream_init(struct i915_perf_stream *stream,
2137 struct drm_i915_perf_open_param *param,
2138 struct perf_open_properties *props)
2140 struct drm_i915_private *dev_priv = stream->dev_priv;
2144 /* If the sysfs metrics/ directory wasn't registered for some
2145 * reason then don't let userspace try their luck with config
2148 if (!dev_priv->perf.metrics_kobj) {
2149 DRM_DEBUG("OA metrics weren't advertised via sysfs\n");
2153 if (!(props->sample_flags & SAMPLE_OA_REPORT)) {
2154 DRM_DEBUG("Only OA report sampling supported\n");
2158 if (!dev_priv->perf.ops.enable_metric_set) {
2159 DRM_DEBUG("OA unit not supported\n");
2163 /* To avoid the complexity of having to accurately filter
2164 * counter reports and marshal to the appropriate client
2165 * we currently only allow exclusive access
2167 if (dev_priv->perf.exclusive_stream) {
2168 DRM_DEBUG("OA unit already in use\n");
2172 if (!props->oa_format) {
2173 DRM_DEBUG("OA report format not specified\n");
2177 stream->sample_size = sizeof(struct drm_i915_perf_record_header);
2179 format_size = dev_priv->perf.oa_formats[props->oa_format].size;
2181 stream->sample_flags |= SAMPLE_OA_REPORT;
2182 stream->sample_size += format_size;
2184 stream->oa_buffer.format_size = format_size;
2185 if (WARN_ON(stream->oa_buffer.format_size == 0))
2188 stream->oa_buffer.format =
2189 dev_priv->perf.oa_formats[props->oa_format].format;
2191 stream->periodic = props->oa_periodic;
2192 if (stream->periodic)
2193 stream->period_exponent = props->oa_period_exponent;
2196 ret = oa_get_render_ctx_id(stream);
2198 DRM_DEBUG("Invalid context id to filter with\n");
2203 ret = get_oa_config(dev_priv, props->metrics_set, &stream->oa_config);
2205 DRM_DEBUG("Invalid OA config id=%i\n", props->metrics_set);
2209 /* PRM - observability performance counters:
2211 * OACONTROL, performance counter enable, note:
2213 * "When this bit is set, in order to have coherent counts,
2214 * RC6 power state and trunk clock gating must be disabled.
2215 * This can be achieved by programming MMIO registers as
2216 * 0xA094=0 and 0xA090[31]=1"
2218 * In our case we are expecting that taking pm + FORCEWAKE
2219 * references will effectively disable RC6.
2221 stream->wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
2222 intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
2224 ret = alloc_oa_buffer(stream);
2226 goto err_oa_buf_alloc;
2228 ret = i915_mutex_lock_interruptible(&dev_priv->drm);
2232 stream->ops = &i915_oa_stream_ops;
2233 dev_priv->perf.exclusive_stream = stream;
2235 ret = dev_priv->perf.ops.enable_metric_set(stream);
2237 DRM_DEBUG("Unable to enable metric set\n");
2241 mutex_unlock(&dev_priv->drm.struct_mutex);
2243 hrtimer_init(&stream->poll_check_timer,
2244 CLOCK_MONOTONIC, HRTIMER_MODE_REL);
2245 stream->poll_check_timer.function = oa_poll_check_timer_cb;
2246 init_waitqueue_head(&stream->poll_wq);
2247 spin_lock_init(&stream->oa_buffer.ptr_lock);
2252 dev_priv->perf.exclusive_stream = NULL;
2253 dev_priv->perf.ops.disable_metric_set(stream);
2254 mutex_unlock(&dev_priv->drm.struct_mutex);
2257 free_oa_buffer(stream);
2260 put_oa_config(dev_priv, stream->oa_config);
2262 intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
2263 intel_runtime_pm_put(&dev_priv->runtime_pm, stream->wakeref);
2267 oa_put_render_ctx_id(stream);
2272 void i915_oa_init_reg_state(const struct intel_context *ce,
2273 const struct intel_engine_cs *engine)
2275 struct i915_perf_stream *stream;
2277 /* perf.exclusive_stream serialised by gen8_configure_all_contexts() */
2278 lockdep_assert_held(&ce->pin_mutex);
2280 if (engine->class != RENDER_CLASS)
2283 stream = engine->i915->perf.exclusive_stream;
2285 gen8_update_reg_state_unlocked(ce, stream);
2289 * i915_perf_read_locked - &i915_perf_stream_ops->read with error normalisation
2290 * @stream: An i915 perf stream
2291 * @file: An i915 perf stream file
2292 * @buf: destination buffer given by userspace
2293 * @count: the number of bytes userspace wants to read
2294 * @ppos: (inout) file seek position (unused)
2296 * Besides wrapping &i915_perf_stream_ops->read this provides a common place to
2297 * ensure that if we've successfully copied any data then reporting that takes
2298 * precedence over any internal error status, so the data isn't lost.
2300 * For example ret will be -ENOSPC whenever there is more buffered data than
2301 * can be copied to userspace, but that's only interesting if we weren't able
2302 * to copy some data because it implies the userspace buffer is too small to
2303 * receive a single record (and we never split records).
2305 * Another case with ret == -EFAULT is more of a grey area since it would seem
2306 * like bad form for userspace to ask us to overrun its buffer, but the user
2309 * http://yarchive.net/comp/linux/partial_reads_writes.html
2311 * Returns: The number of bytes copied or a negative error code on failure.
2313 static ssize_t i915_perf_read_locked(struct i915_perf_stream *stream,
2319 /* Note we keep the offset (aka bytes read) separate from any
2320 * error status so that the final check for whether we return
2321 * the bytes read with a higher precedence than any error (see
2322 * comment below) doesn't need to be handled/duplicated in
2323 * stream->ops->read() implementations.
2326 int ret = stream->ops->read(stream, buf, count, &offset);
2328 return offset ?: (ret ?: -EAGAIN);
2332 * i915_perf_read - handles read() FOP for i915 perf stream FDs
2333 * @file: An i915 perf stream file
2334 * @buf: destination buffer given by userspace
2335 * @count: the number of bytes userspace wants to read
2336 * @ppos: (inout) file seek position (unused)
2338 * The entry point for handling a read() on a stream file descriptor from
2339 * userspace. Most of the work is left to the i915_perf_read_locked() and
2340 * &i915_perf_stream_ops->read but to save having stream implementations (of
2341 * which we might have multiple later) we handle blocking read here.
2343 * We can also consistently treat trying to read from a disabled stream
2344 * as an IO error so implementations can assume the stream is enabled
2347 * Returns: The number of bytes copied or a negative error code on failure.
2349 static ssize_t i915_perf_read(struct file *file,
2354 struct i915_perf_stream *stream = file->private_data;
2355 struct drm_i915_private *dev_priv = stream->dev_priv;
2358 /* To ensure it's handled consistently we simply treat all reads of a
2359 * disabled stream as an error. In particular it might otherwise lead
2360 * to a deadlock for blocking file descriptors...
2362 if (!stream->enabled)
2365 if (!(file->f_flags & O_NONBLOCK)) {
2366 /* There's the small chance of false positives from
2367 * stream->ops->wait_unlocked.
2369 * E.g. with single context filtering since we only wait until
2370 * oabuffer has >= 1 report we don't immediately know whether
2371 * any reports really belong to the current context
2374 ret = stream->ops->wait_unlocked(stream);
2378 mutex_lock(&dev_priv->perf.lock);
2379 ret = i915_perf_read_locked(stream, file,
2381 mutex_unlock(&dev_priv->perf.lock);
2382 } while (ret == -EAGAIN);
2384 mutex_lock(&dev_priv->perf.lock);
2385 ret = i915_perf_read_locked(stream, file, buf, count, ppos);
2386 mutex_unlock(&dev_priv->perf.lock);
2389 /* We allow the poll checking to sometimes report false positive EPOLLIN
2390 * events where we might actually report EAGAIN on read() if there's
2391 * not really any data available. In this situation though we don't
2392 * want to enter a busy loop between poll() reporting a EPOLLIN event
2393 * and read() returning -EAGAIN. Clearing the oa.pollin state here
2394 * effectively ensures we back off until the next hrtimer callback
2395 * before reporting another EPOLLIN event.
2397 if (ret >= 0 || ret == -EAGAIN) {
2398 /* Maybe make ->pollin per-stream state if we support multiple
2399 * concurrent streams in the future.
2401 stream->pollin = false;
2407 static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer)
2409 struct i915_perf_stream *stream =
2410 container_of(hrtimer, typeof(*stream), poll_check_timer);
2412 if (oa_buffer_check_unlocked(stream)) {
2413 stream->pollin = true;
2414 wake_up(&stream->poll_wq);
2417 hrtimer_forward_now(hrtimer, ns_to_ktime(POLL_PERIOD));
2419 return HRTIMER_RESTART;
2423 * i915_perf_poll_locked - poll_wait() with a suitable wait queue for stream
2424 * @dev_priv: i915 device instance
2425 * @stream: An i915 perf stream
2426 * @file: An i915 perf stream file
2427 * @wait: poll() state table
2429 * For handling userspace polling on an i915 perf stream, this calls through to
2430 * &i915_perf_stream_ops->poll_wait to call poll_wait() with a wait queue that
2431 * will be woken for new stream data.
2433 * Note: The &drm_i915_private->perf.lock mutex has been taken to serialize
2434 * with any non-file-operation driver hooks.
2436 * Returns: any poll events that are ready without sleeping
2438 static __poll_t i915_perf_poll_locked(struct drm_i915_private *dev_priv,
2439 struct i915_perf_stream *stream,
2443 __poll_t events = 0;
2445 stream->ops->poll_wait(stream, file, wait);
2447 /* Note: we don't explicitly check whether there's something to read
2448 * here since this path may be very hot depending on what else
2449 * userspace is polling, or on the timeout in use. We rely solely on
2450 * the hrtimer/oa_poll_check_timer_cb to notify us when there are
2460 * i915_perf_poll - call poll_wait() with a suitable wait queue for stream
2461 * @file: An i915 perf stream file
2462 * @wait: poll() state table
2464 * For handling userspace polling on an i915 perf stream, this ensures
2465 * poll_wait() gets called with a wait queue that will be woken for new stream
2468 * Note: Implementation deferred to i915_perf_poll_locked()
2470 * Returns: any poll events that are ready without sleeping
2472 static __poll_t i915_perf_poll(struct file *file, poll_table *wait)
2474 struct i915_perf_stream *stream = file->private_data;
2475 struct drm_i915_private *dev_priv = stream->dev_priv;
2478 mutex_lock(&dev_priv->perf.lock);
2479 ret = i915_perf_poll_locked(dev_priv, stream, file, wait);
2480 mutex_unlock(&dev_priv->perf.lock);
2486 * i915_perf_enable_locked - handle `I915_PERF_IOCTL_ENABLE` ioctl
2487 * @stream: A disabled i915 perf stream
2489 * [Re]enables the associated capture of data for this stream.
2491 * If a stream was previously enabled then there's currently no intention
2492 * to provide userspace any guarantee about the preservation of previously
2495 static void i915_perf_enable_locked(struct i915_perf_stream *stream)
2497 if (stream->enabled)
2500 /* Allow stream->ops->enable() to refer to this */
2501 stream->enabled = true;
2503 if (stream->ops->enable)
2504 stream->ops->enable(stream);
2508 * i915_perf_disable_locked - handle `I915_PERF_IOCTL_DISABLE` ioctl
2509 * @stream: An enabled i915 perf stream
2511 * Disables the associated capture of data for this stream.
2513 * The intention is that disabling an re-enabling a stream will ideally be
2514 * cheaper than destroying and re-opening a stream with the same configuration,
2515 * though there are no formal guarantees about what state or buffered data
2516 * must be retained between disabling and re-enabling a stream.
2518 * Note: while a stream is disabled it's considered an error for userspace
2519 * to attempt to read from the stream (-EIO).
2521 static void i915_perf_disable_locked(struct i915_perf_stream *stream)
2523 if (!stream->enabled)
2526 /* Allow stream->ops->disable() to refer to this */
2527 stream->enabled = false;
2529 if (stream->ops->disable)
2530 stream->ops->disable(stream);
2534 * i915_perf_ioctl - support ioctl() usage with i915 perf stream FDs
2535 * @stream: An i915 perf stream
2536 * @cmd: the ioctl request
2537 * @arg: the ioctl data
2539 * Note: The &drm_i915_private->perf.lock mutex has been taken to serialize
2540 * with any non-file-operation driver hooks.
2542 * Returns: zero on success or a negative error code. Returns -EINVAL for
2543 * an unknown ioctl request.
2545 static long i915_perf_ioctl_locked(struct i915_perf_stream *stream,
2550 case I915_PERF_IOCTL_ENABLE:
2551 i915_perf_enable_locked(stream);
2553 case I915_PERF_IOCTL_DISABLE:
2554 i915_perf_disable_locked(stream);
2562 * i915_perf_ioctl - support ioctl() usage with i915 perf stream FDs
2563 * @file: An i915 perf stream file
2564 * @cmd: the ioctl request
2565 * @arg: the ioctl data
2567 * Implementation deferred to i915_perf_ioctl_locked().
2569 * Returns: zero on success or a negative error code. Returns -EINVAL for
2570 * an unknown ioctl request.
2572 static long i915_perf_ioctl(struct file *file,
2576 struct i915_perf_stream *stream = file->private_data;
2577 struct drm_i915_private *dev_priv = stream->dev_priv;
2580 mutex_lock(&dev_priv->perf.lock);
2581 ret = i915_perf_ioctl_locked(stream, cmd, arg);
2582 mutex_unlock(&dev_priv->perf.lock);
2588 * i915_perf_destroy_locked - destroy an i915 perf stream
2589 * @stream: An i915 perf stream
2591 * Frees all resources associated with the given i915 perf @stream, disabling
2592 * any associated data capture in the process.
2594 * Note: The &drm_i915_private->perf.lock mutex has been taken to serialize
2595 * with any non-file-operation driver hooks.
2597 static void i915_perf_destroy_locked(struct i915_perf_stream *stream)
2599 if (stream->enabled)
2600 i915_perf_disable_locked(stream);
2602 if (stream->ops->destroy)
2603 stream->ops->destroy(stream);
2605 list_del(&stream->link);
2608 i915_gem_context_put(stream->ctx);
2614 * i915_perf_release - handles userspace close() of a stream file
2615 * @inode: anonymous inode associated with file
2616 * @file: An i915 perf stream file
2618 * Cleans up any resources associated with an open i915 perf stream file.
2620 * NB: close() can't really fail from the userspace point of view.
2622 * Returns: zero on success or a negative error code.
2624 static int i915_perf_release(struct inode *inode, struct file *file)
2626 struct i915_perf_stream *stream = file->private_data;
2627 struct drm_i915_private *dev_priv = stream->dev_priv;
2629 mutex_lock(&dev_priv->perf.lock);
2630 i915_perf_destroy_locked(stream);
2631 mutex_unlock(&dev_priv->perf.lock);
2633 /* Release the reference the perf stream kept on the driver. */
2634 drm_dev_put(&dev_priv->drm);
2640 static const struct file_operations fops = {
2641 .owner = THIS_MODULE,
2642 .llseek = no_llseek,
2643 .release = i915_perf_release,
2644 .poll = i915_perf_poll,
2645 .read = i915_perf_read,
2646 .unlocked_ioctl = i915_perf_ioctl,
2647 /* Our ioctl have no arguments, so it's safe to use the same function
2648 * to handle 32bits compatibility.
2650 .compat_ioctl = i915_perf_ioctl,
2655 * i915_perf_open_ioctl_locked - DRM ioctl() for userspace to open a stream FD
2656 * @dev_priv: i915 device instance
2657 * @param: The open parameters passed to 'DRM_I915_PERF_OPEN`
2658 * @props: individually validated u64 property value pairs
2661 * See i915_perf_ioctl_open() for interface details.
2663 * Implements further stream config validation and stream initialization on
2664 * behalf of i915_perf_open_ioctl() with the &drm_i915_private->perf.lock mutex
2665 * taken to serialize with any non-file-operation driver hooks.
2667 * Note: at this point the @props have only been validated in isolation and
2668 * it's still necessary to validate that the combination of properties makes
2671 * In the case where userspace is interested in OA unit metrics then further
2672 * config validation and stream initialization details will be handled by
2673 * i915_oa_stream_init(). The code here should only validate config state that
2674 * will be relevant to all stream types / backends.
2676 * Returns: zero on success or a negative error code.
2679 i915_perf_open_ioctl_locked(struct drm_i915_private *dev_priv,
2680 struct drm_i915_perf_open_param *param,
2681 struct perf_open_properties *props,
2682 struct drm_file *file)
2684 struct i915_gem_context *specific_ctx = NULL;
2685 struct i915_perf_stream *stream = NULL;
2686 unsigned long f_flags = 0;
2687 bool privileged_op = true;
2691 if (props->single_context) {
2692 u32 ctx_handle = props->ctx_handle;
2693 struct drm_i915_file_private *file_priv = file->driver_priv;
2695 specific_ctx = i915_gem_context_lookup(file_priv, ctx_handle);
2696 if (!specific_ctx) {
2697 DRM_DEBUG("Failed to look up context with ID %u for opening perf stream\n",
2705 * On Haswell the OA unit supports clock gating off for a specific
2706 * context and in this mode there's no visibility of metrics for the
2707 * rest of the system, which we consider acceptable for a
2708 * non-privileged client.
2710 * For Gen8+ the OA unit no longer supports clock gating off for a
2711 * specific context and the kernel can't securely stop the counters
2712 * from updating as system-wide / global values. Even though we can
2713 * filter reports based on the included context ID we can't block
2714 * clients from seeing the raw / global counter values via
2715 * MI_REPORT_PERF_COUNT commands and so consider it a privileged op to
2716 * enable the OA unit by default.
2718 if (IS_HASWELL(dev_priv) && specific_ctx)
2719 privileged_op = false;
2721 /* Similar to perf's kernel.perf_paranoid_cpu sysctl option
2722 * we check a dev.i915.perf_stream_paranoid sysctl option
2723 * to determine if it's ok to access system wide OA counters
2724 * without CAP_SYS_ADMIN privileges.
2726 if (privileged_op &&
2727 i915_perf_stream_paranoid && !capable(CAP_SYS_ADMIN)) {
2728 DRM_DEBUG("Insufficient privileges to open system-wide i915 perf stream\n");
2733 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
2739 stream->dev_priv = dev_priv;
2740 stream->ctx = specific_ctx;
2742 ret = i915_oa_stream_init(stream, param, props);
2746 /* we avoid simply assigning stream->sample_flags = props->sample_flags
2747 * to have _stream_init check the combination of sample flags more
2748 * thoroughly, but still this is the expected result at this point.
2750 if (WARN_ON(stream->sample_flags != props->sample_flags)) {
2755 list_add(&stream->link, &dev_priv->perf.streams);
2757 if (param->flags & I915_PERF_FLAG_FD_CLOEXEC)
2758 f_flags |= O_CLOEXEC;
2759 if (param->flags & I915_PERF_FLAG_FD_NONBLOCK)
2760 f_flags |= O_NONBLOCK;
2762 stream_fd = anon_inode_getfd("[i915_perf]", &fops, stream, f_flags);
2763 if (stream_fd < 0) {
2768 if (!(param->flags & I915_PERF_FLAG_DISABLED))
2769 i915_perf_enable_locked(stream);
2771 /* Take a reference on the driver that will be kept with stream_fd
2772 * until its release.
2774 drm_dev_get(&dev_priv->drm);
2779 list_del(&stream->link);
2781 if (stream->ops->destroy)
2782 stream->ops->destroy(stream);
2787 i915_gem_context_put(specific_ctx);
2792 static u64 oa_exponent_to_ns(struct drm_i915_private *dev_priv, int exponent)
2794 return div64_u64(1000000000ULL * (2ULL << exponent),
2795 1000ULL * RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz);
2799 * read_properties_unlocked - validate + copy userspace stream open properties
2800 * @dev_priv: i915 device instance
2801 * @uprops: The array of u64 key value pairs given by userspace
2802 * @n_props: The number of key value pairs expected in @uprops
2803 * @props: The stream configuration built up while validating properties
2805 * Note this function only validates properties in isolation it doesn't
2806 * validate that the combination of properties makes sense or that all
2807 * properties necessary for a particular kind of stream have been set.
2809 * Note that there currently aren't any ordering requirements for properties so
2810 * we shouldn't validate or assume anything about ordering here. This doesn't
2811 * rule out defining new properties with ordering requirements in the future.
2813 static int read_properties_unlocked(struct drm_i915_private *dev_priv,
2816 struct perf_open_properties *props)
2818 u64 __user *uprop = uprops;
2821 memset(props, 0, sizeof(struct perf_open_properties));
2824 DRM_DEBUG("No i915 perf properties given\n");
2828 /* Considering that ID = 0 is reserved and assuming that we don't
2829 * (currently) expect any configurations to ever specify duplicate
2830 * values for a particular property ID then the last _PROP_MAX value is
2831 * one greater than the maximum number of properties we expect to get
2834 if (n_props >= DRM_I915_PERF_PROP_MAX) {
2835 DRM_DEBUG("More i915 perf properties specified than exist\n");
2839 for (i = 0; i < n_props; i++) {
2840 u64 oa_period, oa_freq_hz;
2844 ret = get_user(id, uprop);
2848 ret = get_user(value, uprop + 1);
2852 if (id == 0 || id >= DRM_I915_PERF_PROP_MAX) {
2853 DRM_DEBUG("Unknown i915 perf property ID\n");
2857 switch ((enum drm_i915_perf_property_id)id) {
2858 case DRM_I915_PERF_PROP_CTX_HANDLE:
2859 props->single_context = 1;
2860 props->ctx_handle = value;
2862 case DRM_I915_PERF_PROP_SAMPLE_OA:
2864 props->sample_flags |= SAMPLE_OA_REPORT;
2866 case DRM_I915_PERF_PROP_OA_METRICS_SET:
2868 DRM_DEBUG("Unknown OA metric set ID\n");
2871 props->metrics_set = value;
2873 case DRM_I915_PERF_PROP_OA_FORMAT:
2874 if (value == 0 || value >= I915_OA_FORMAT_MAX) {
2875 DRM_DEBUG("Out-of-range OA report format %llu\n",
2879 if (!dev_priv->perf.oa_formats[value].size) {
2880 DRM_DEBUG("Unsupported OA report format %llu\n",
2884 props->oa_format = value;
2886 case DRM_I915_PERF_PROP_OA_EXPONENT:
2887 if (value > OA_EXPONENT_MAX) {
2888 DRM_DEBUG("OA timer exponent too high (> %u)\n",
2893 /* Theoretically we can program the OA unit to sample
2894 * e.g. every 160ns for HSW, 167ns for BDW/SKL or 104ns
2895 * for BXT. We don't allow such high sampling
2896 * frequencies by default unless root.
2899 BUILD_BUG_ON(sizeof(oa_period) != 8);
2900 oa_period = oa_exponent_to_ns(dev_priv, value);
2902 /* This check is primarily to ensure that oa_period <=
2903 * UINT32_MAX (before passing to do_div which only
2904 * accepts a u32 denominator), but we can also skip
2905 * checking anything < 1Hz which implicitly can't be
2906 * limited via an integer oa_max_sample_rate.
2908 if (oa_period <= NSEC_PER_SEC) {
2909 u64 tmp = NSEC_PER_SEC;
2910 do_div(tmp, oa_period);
2915 if (oa_freq_hz > i915_oa_max_sample_rate &&
2916 !capable(CAP_SYS_ADMIN)) {
2917 DRM_DEBUG("OA exponent would exceed the max sampling frequency (sysctl dev.i915.oa_max_sample_rate) %uHz without root privileges\n",
2918 i915_oa_max_sample_rate);
2922 props->oa_periodic = true;
2923 props->oa_period_exponent = value;
2925 case DRM_I915_PERF_PROP_MAX:
2937 * i915_perf_open_ioctl - DRM ioctl() for userspace to open a stream FD
2939 * @data: ioctl data copied from userspace (unvalidated)
2942 * Validates the stream open parameters given by userspace including flags
2943 * and an array of u64 key, value pair properties.
2945 * Very little is assumed up front about the nature of the stream being
2946 * opened (for instance we don't assume it's for periodic OA unit metrics). An
2947 * i915-perf stream is expected to be a suitable interface for other forms of
2948 * buffered data written by the GPU besides periodic OA metrics.
2950 * Note we copy the properties from userspace outside of the i915 perf
2951 * mutex to avoid an awkward lockdep with mmap_sem.
2953 * Most of the implementation details are handled by
2954 * i915_perf_open_ioctl_locked() after taking the &drm_i915_private->perf.lock
2955 * mutex for serializing with any non-file-operation driver hooks.
2957 * Return: A newly opened i915 Perf stream file descriptor or negative
2958 * error code on failure.
2960 int i915_perf_open_ioctl(struct drm_device *dev, void *data,
2961 struct drm_file *file)
2963 struct drm_i915_private *dev_priv = dev->dev_private;
2964 struct drm_i915_perf_open_param *param = data;
2965 struct perf_open_properties props;
2966 u32 known_open_flags;
2969 if (!dev_priv->perf.initialized) {
2970 DRM_DEBUG("i915 perf interface not available for this system\n");
2974 known_open_flags = I915_PERF_FLAG_FD_CLOEXEC |
2975 I915_PERF_FLAG_FD_NONBLOCK |
2976 I915_PERF_FLAG_DISABLED;
2977 if (param->flags & ~known_open_flags) {
2978 DRM_DEBUG("Unknown drm_i915_perf_open_param flag\n");
2982 ret = read_properties_unlocked(dev_priv,
2983 u64_to_user_ptr(param->properties_ptr),
2984 param->num_properties,
2989 mutex_lock(&dev_priv->perf.lock);
2990 ret = i915_perf_open_ioctl_locked(dev_priv, param, &props, file);
2991 mutex_unlock(&dev_priv->perf.lock);
2997 * i915_perf_register - exposes i915-perf to userspace
2998 * @dev_priv: i915 device instance
3000 * In particular OA metric sets are advertised under a sysfs metrics/
3001 * directory allowing userspace to enumerate valid IDs that can be
3002 * used to open an i915-perf stream.
3004 void i915_perf_register(struct drm_i915_private *dev_priv)
3008 if (!dev_priv->perf.initialized)
3011 /* To be sure we're synchronized with an attempted
3012 * i915_perf_open_ioctl(); considering that we register after
3013 * being exposed to userspace.
3015 mutex_lock(&dev_priv->perf.lock);
3017 dev_priv->perf.metrics_kobj =
3018 kobject_create_and_add("metrics",
3019 &dev_priv->drm.primary->kdev->kobj);
3020 if (!dev_priv->perf.metrics_kobj)
3023 sysfs_attr_init(&dev_priv->perf.test_config.sysfs_metric_id.attr);
3025 if (INTEL_GEN(dev_priv) >= 11) {
3026 i915_perf_load_test_config_icl(dev_priv);
3027 } else if (IS_CANNONLAKE(dev_priv)) {
3028 i915_perf_load_test_config_cnl(dev_priv);
3029 } else if (IS_COFFEELAKE(dev_priv)) {
3030 if (IS_CFL_GT2(dev_priv))
3031 i915_perf_load_test_config_cflgt2(dev_priv);
3032 if (IS_CFL_GT3(dev_priv))
3033 i915_perf_load_test_config_cflgt3(dev_priv);
3034 } else if (IS_GEMINILAKE(dev_priv)) {
3035 i915_perf_load_test_config_glk(dev_priv);
3036 } else if (IS_KABYLAKE(dev_priv)) {
3037 if (IS_KBL_GT2(dev_priv))
3038 i915_perf_load_test_config_kblgt2(dev_priv);
3039 else if (IS_KBL_GT3(dev_priv))
3040 i915_perf_load_test_config_kblgt3(dev_priv);
3041 } else if (IS_BROXTON(dev_priv)) {
3042 i915_perf_load_test_config_bxt(dev_priv);
3043 } else if (IS_SKYLAKE(dev_priv)) {
3044 if (IS_SKL_GT2(dev_priv))
3045 i915_perf_load_test_config_sklgt2(dev_priv);
3046 else if (IS_SKL_GT3(dev_priv))
3047 i915_perf_load_test_config_sklgt3(dev_priv);
3048 else if (IS_SKL_GT4(dev_priv))
3049 i915_perf_load_test_config_sklgt4(dev_priv);
3050 } else if (IS_CHERRYVIEW(dev_priv)) {
3051 i915_perf_load_test_config_chv(dev_priv);
3052 } else if (IS_BROADWELL(dev_priv)) {
3053 i915_perf_load_test_config_bdw(dev_priv);
3054 } else if (IS_HASWELL(dev_priv)) {
3055 i915_perf_load_test_config_hsw(dev_priv);
3058 if (dev_priv->perf.test_config.id == 0)
3061 ret = sysfs_create_group(dev_priv->perf.metrics_kobj,
3062 &dev_priv->perf.test_config.sysfs_metric);
3066 atomic_set(&dev_priv->perf.test_config.ref_count, 1);
3071 kobject_put(dev_priv->perf.metrics_kobj);
3072 dev_priv->perf.metrics_kobj = NULL;
3075 mutex_unlock(&dev_priv->perf.lock);
3079 * i915_perf_unregister - hide i915-perf from userspace
3080 * @dev_priv: i915 device instance
3082 * i915-perf state cleanup is split up into an 'unregister' and
3083 * 'deinit' phase where the interface is first hidden from
3084 * userspace by i915_perf_unregister() before cleaning up
3085 * remaining state in i915_perf_fini().
3087 void i915_perf_unregister(struct drm_i915_private *dev_priv)
3089 if (!dev_priv->perf.metrics_kobj)
3092 sysfs_remove_group(dev_priv->perf.metrics_kobj,
3093 &dev_priv->perf.test_config.sysfs_metric);
3095 kobject_put(dev_priv->perf.metrics_kobj);
3096 dev_priv->perf.metrics_kobj = NULL;
3099 static bool gen8_is_valid_flex_addr(struct drm_i915_private *dev_priv, u32 addr)
3101 static const i915_reg_t flex_eu_regs[] = {
3112 for (i = 0; i < ARRAY_SIZE(flex_eu_regs); i++) {
3113 if (i915_mmio_reg_offset(flex_eu_regs[i]) == addr)
3119 static bool gen7_is_valid_b_counter_addr(struct drm_i915_private *dev_priv, u32 addr)
3121 return (addr >= i915_mmio_reg_offset(OASTARTTRIG1) &&
3122 addr <= i915_mmio_reg_offset(OASTARTTRIG8)) ||
3123 (addr >= i915_mmio_reg_offset(OAREPORTTRIG1) &&
3124 addr <= i915_mmio_reg_offset(OAREPORTTRIG8)) ||
3125 (addr >= i915_mmio_reg_offset(OACEC0_0) &&
3126 addr <= i915_mmio_reg_offset(OACEC7_1));
3129 static bool gen7_is_valid_mux_addr(struct drm_i915_private *dev_priv, u32 addr)
3131 return addr == i915_mmio_reg_offset(HALF_SLICE_CHICKEN2) ||
3132 (addr >= i915_mmio_reg_offset(MICRO_BP0_0) &&
3133 addr <= i915_mmio_reg_offset(NOA_WRITE)) ||
3134 (addr >= i915_mmio_reg_offset(OA_PERFCNT1_LO) &&
3135 addr <= i915_mmio_reg_offset(OA_PERFCNT2_HI)) ||
3136 (addr >= i915_mmio_reg_offset(OA_PERFMATRIX_LO) &&
3137 addr <= i915_mmio_reg_offset(OA_PERFMATRIX_HI));
3140 static bool gen8_is_valid_mux_addr(struct drm_i915_private *dev_priv, u32 addr)
3142 return gen7_is_valid_mux_addr(dev_priv, addr) ||
3143 addr == i915_mmio_reg_offset(WAIT_FOR_RC6_EXIT) ||
3144 (addr >= i915_mmio_reg_offset(RPM_CONFIG0) &&
3145 addr <= i915_mmio_reg_offset(NOA_CONFIG(8)));
3148 static bool gen10_is_valid_mux_addr(struct drm_i915_private *dev_priv, u32 addr)
3150 return gen8_is_valid_mux_addr(dev_priv, addr) ||
3151 addr == i915_mmio_reg_offset(GEN10_NOA_WRITE_HIGH) ||
3152 (addr >= i915_mmio_reg_offset(OA_PERFCNT3_LO) &&
3153 addr <= i915_mmio_reg_offset(OA_PERFCNT4_HI));
3156 static bool hsw_is_valid_mux_addr(struct drm_i915_private *dev_priv, u32 addr)
3158 return gen7_is_valid_mux_addr(dev_priv, addr) ||
3159 (addr >= 0x25100 && addr <= 0x2FF90) ||
3160 (addr >= i915_mmio_reg_offset(HSW_MBVID2_NOA0) &&
3161 addr <= i915_mmio_reg_offset(HSW_MBVID2_NOA9)) ||
3162 addr == i915_mmio_reg_offset(HSW_MBVID2_MISR0);
3165 static bool chv_is_valid_mux_addr(struct drm_i915_private *dev_priv, u32 addr)
3167 return gen7_is_valid_mux_addr(dev_priv, addr) ||
3168 (addr >= 0x182300 && addr <= 0x1823A4);
3171 static u32 mask_reg_value(u32 reg, u32 val)
3173 /* HALF_SLICE_CHICKEN2 is programmed with a the
3174 * WaDisableSTUnitPowerOptimization workaround. Make sure the value
3175 * programmed by userspace doesn't change this.
3177 if (i915_mmio_reg_offset(HALF_SLICE_CHICKEN2) == reg)
3178 val = val & ~_MASKED_BIT_ENABLE(GEN8_ST_PO_DISABLE);
3180 /* WAIT_FOR_RC6_EXIT has only one bit fullfilling the function
3181 * indicated by its name and a bunch of selection fields used by OA
3184 if (i915_mmio_reg_offset(WAIT_FOR_RC6_EXIT) == reg)
3185 val = val & ~_MASKED_BIT_ENABLE(HSW_WAIT_FOR_RC6_EXIT_ENABLE);
3190 static struct i915_oa_reg *alloc_oa_regs(struct drm_i915_private *dev_priv,
3191 bool (*is_valid)(struct drm_i915_private *dev_priv, u32 addr),
3195 struct i915_oa_reg *oa_regs;
3202 if (!access_ok(regs, n_regs * sizeof(u32) * 2))
3203 return ERR_PTR(-EFAULT);
3205 /* No is_valid function means we're not allowing any register to be programmed. */
3206 GEM_BUG_ON(!is_valid);
3208 return ERR_PTR(-EINVAL);
3210 oa_regs = kmalloc_array(n_regs, sizeof(*oa_regs), GFP_KERNEL);
3212 return ERR_PTR(-ENOMEM);
3214 for (i = 0; i < n_regs; i++) {
3217 err = get_user(addr, regs);
3221 if (!is_valid(dev_priv, addr)) {
3222 DRM_DEBUG("Invalid oa_reg address: %X\n", addr);
3227 err = get_user(value, regs + 1);
3231 oa_regs[i].addr = _MMIO(addr);
3232 oa_regs[i].value = mask_reg_value(addr, value);
3241 return ERR_PTR(err);
3244 static ssize_t show_dynamic_id(struct device *dev,
3245 struct device_attribute *attr,
3248 struct i915_oa_config *oa_config =
3249 container_of(attr, typeof(*oa_config), sysfs_metric_id);
3251 return sprintf(buf, "%d\n", oa_config->id);
3254 static int create_dynamic_oa_sysfs_entry(struct drm_i915_private *dev_priv,
3255 struct i915_oa_config *oa_config)
3257 sysfs_attr_init(&oa_config->sysfs_metric_id.attr);
3258 oa_config->sysfs_metric_id.attr.name = "id";
3259 oa_config->sysfs_metric_id.attr.mode = S_IRUGO;
3260 oa_config->sysfs_metric_id.show = show_dynamic_id;
3261 oa_config->sysfs_metric_id.store = NULL;
3263 oa_config->attrs[0] = &oa_config->sysfs_metric_id.attr;
3264 oa_config->attrs[1] = NULL;
3266 oa_config->sysfs_metric.name = oa_config->uuid;
3267 oa_config->sysfs_metric.attrs = oa_config->attrs;
3269 return sysfs_create_group(dev_priv->perf.metrics_kobj,
3270 &oa_config->sysfs_metric);
3274 * i915_perf_add_config_ioctl - DRM ioctl() for userspace to add a new OA config
3276 * @data: ioctl data (pointer to struct drm_i915_perf_oa_config) copied from
3277 * userspace (unvalidated)
3280 * Validates the submitted OA register to be saved into a new OA config that
3281 * can then be used for programming the OA unit and its NOA network.
3283 * Returns: A new allocated config number to be used with the perf open ioctl
3284 * or a negative error code on failure.
3286 int i915_perf_add_config_ioctl(struct drm_device *dev, void *data,
3287 struct drm_file *file)
3289 struct drm_i915_private *dev_priv = dev->dev_private;
3290 struct drm_i915_perf_oa_config *args = data;
3291 struct i915_oa_config *oa_config, *tmp;
3294 if (!dev_priv->perf.initialized) {
3295 DRM_DEBUG("i915 perf interface not available for this system\n");
3299 if (!dev_priv->perf.metrics_kobj) {
3300 DRM_DEBUG("OA metrics weren't advertised via sysfs\n");
3304 if (i915_perf_stream_paranoid && !capable(CAP_SYS_ADMIN)) {
3305 DRM_DEBUG("Insufficient privileges to add i915 OA config\n");
3309 if ((!args->mux_regs_ptr || !args->n_mux_regs) &&
3310 (!args->boolean_regs_ptr || !args->n_boolean_regs) &&
3311 (!args->flex_regs_ptr || !args->n_flex_regs)) {
3312 DRM_DEBUG("No OA registers given\n");
3316 oa_config = kzalloc(sizeof(*oa_config), GFP_KERNEL);
3318 DRM_DEBUG("Failed to allocate memory for the OA config\n");
3322 atomic_set(&oa_config->ref_count, 1);
3324 if (!uuid_is_valid(args->uuid)) {
3325 DRM_DEBUG("Invalid uuid format for OA config\n");
3330 /* Last character in oa_config->uuid will be 0 because oa_config is
3333 memcpy(oa_config->uuid, args->uuid, sizeof(args->uuid));
3335 oa_config->mux_regs_len = args->n_mux_regs;
3336 oa_config->mux_regs =
3337 alloc_oa_regs(dev_priv,
3338 dev_priv->perf.ops.is_valid_mux_reg,
3339 u64_to_user_ptr(args->mux_regs_ptr),
3342 if (IS_ERR(oa_config->mux_regs)) {
3343 DRM_DEBUG("Failed to create OA config for mux_regs\n");
3344 err = PTR_ERR(oa_config->mux_regs);
3348 oa_config->b_counter_regs_len = args->n_boolean_regs;
3349 oa_config->b_counter_regs =
3350 alloc_oa_regs(dev_priv,
3351 dev_priv->perf.ops.is_valid_b_counter_reg,
3352 u64_to_user_ptr(args->boolean_regs_ptr),
3353 args->n_boolean_regs);
3355 if (IS_ERR(oa_config->b_counter_regs)) {
3356 DRM_DEBUG("Failed to create OA config for b_counter_regs\n");
3357 err = PTR_ERR(oa_config->b_counter_regs);
3361 if (INTEL_GEN(dev_priv) < 8) {
3362 if (args->n_flex_regs != 0) {
3367 oa_config->flex_regs_len = args->n_flex_regs;
3368 oa_config->flex_regs =
3369 alloc_oa_regs(dev_priv,
3370 dev_priv->perf.ops.is_valid_flex_reg,
3371 u64_to_user_ptr(args->flex_regs_ptr),
3374 if (IS_ERR(oa_config->flex_regs)) {
3375 DRM_DEBUG("Failed to create OA config for flex_regs\n");
3376 err = PTR_ERR(oa_config->flex_regs);
3381 err = mutex_lock_interruptible(&dev_priv->perf.metrics_lock);
3385 /* We shouldn't have too many configs, so this iteration shouldn't be
3388 idr_for_each_entry(&dev_priv->perf.metrics_idr, tmp, id) {
3389 if (!strcmp(tmp->uuid, oa_config->uuid)) {
3390 DRM_DEBUG("OA config already exists with this uuid\n");
3396 err = create_dynamic_oa_sysfs_entry(dev_priv, oa_config);
3398 DRM_DEBUG("Failed to create sysfs entry for OA config\n");
3402 /* Config id 0 is invalid, id 1 for kernel stored test config. */
3403 oa_config->id = idr_alloc(&dev_priv->perf.metrics_idr,
3406 if (oa_config->id < 0) {
3407 DRM_DEBUG("Failed to create sysfs entry for OA config\n");
3408 err = oa_config->id;
3412 mutex_unlock(&dev_priv->perf.metrics_lock);
3414 DRM_DEBUG("Added config %s id=%i\n", oa_config->uuid, oa_config->id);
3416 return oa_config->id;
3419 mutex_unlock(&dev_priv->perf.metrics_lock);
3421 put_oa_config(dev_priv, oa_config);
3422 DRM_DEBUG("Failed to add new OA config\n");
3427 * i915_perf_remove_config_ioctl - DRM ioctl() for userspace to remove an OA config
3429 * @data: ioctl data (pointer to u64 integer) copied from userspace
3432 * Configs can be removed while being used, the will stop appearing in sysfs
3433 * and their content will be freed when the stream using the config is closed.
3435 * Returns: 0 on success or a negative error code on failure.
3437 int i915_perf_remove_config_ioctl(struct drm_device *dev, void *data,
3438 struct drm_file *file)
3440 struct drm_i915_private *dev_priv = dev->dev_private;
3442 struct i915_oa_config *oa_config;
3445 if (!dev_priv->perf.initialized) {
3446 DRM_DEBUG("i915 perf interface not available for this system\n");
3450 if (i915_perf_stream_paranoid && !capable(CAP_SYS_ADMIN)) {
3451 DRM_DEBUG("Insufficient privileges to remove i915 OA config\n");
3455 ret = mutex_lock_interruptible(&dev_priv->perf.metrics_lock);
3459 oa_config = idr_find(&dev_priv->perf.metrics_idr, *arg);
3461 DRM_DEBUG("Failed to remove unknown OA config\n");
3466 GEM_BUG_ON(*arg != oa_config->id);
3468 sysfs_remove_group(dev_priv->perf.metrics_kobj,
3469 &oa_config->sysfs_metric);
3471 idr_remove(&dev_priv->perf.metrics_idr, *arg);
3473 DRM_DEBUG("Removed config %s id=%i\n", oa_config->uuid, oa_config->id);
3475 put_oa_config(dev_priv, oa_config);
3478 mutex_unlock(&dev_priv->perf.metrics_lock);
3483 static struct ctl_table oa_table[] = {
3485 .procname = "perf_stream_paranoid",
3486 .data = &i915_perf_stream_paranoid,
3487 .maxlen = sizeof(i915_perf_stream_paranoid),
3489 .proc_handler = proc_dointvec_minmax,
3490 .extra1 = SYSCTL_ZERO,
3491 .extra2 = SYSCTL_ONE,
3494 .procname = "oa_max_sample_rate",
3495 .data = &i915_oa_max_sample_rate,
3496 .maxlen = sizeof(i915_oa_max_sample_rate),
3498 .proc_handler = proc_dointvec_minmax,
3499 .extra1 = SYSCTL_ZERO,
3500 .extra2 = &oa_sample_rate_hard_limit,
3505 static struct ctl_table i915_root[] = {
3515 static struct ctl_table dev_root[] = {
3526 * i915_perf_init - initialize i915-perf state on module load
3527 * @dev_priv: i915 device instance
3529 * Initializes i915-perf state without exposing anything to userspace.
3531 * Note: i915-perf initialization is split into an 'init' and 'register'
3532 * phase with the i915_perf_register() exposing state to userspace.
3534 void i915_perf_init(struct drm_i915_private *dev_priv)
3536 if (IS_HASWELL(dev_priv)) {
3537 dev_priv->perf.ops.is_valid_b_counter_reg =
3538 gen7_is_valid_b_counter_addr;
3539 dev_priv->perf.ops.is_valid_mux_reg =
3540 hsw_is_valid_mux_addr;
3541 dev_priv->perf.ops.is_valid_flex_reg = NULL;
3542 dev_priv->perf.ops.enable_metric_set = hsw_enable_metric_set;
3543 dev_priv->perf.ops.disable_metric_set = hsw_disable_metric_set;
3544 dev_priv->perf.ops.oa_enable = gen7_oa_enable;
3545 dev_priv->perf.ops.oa_disable = gen7_oa_disable;
3546 dev_priv->perf.ops.read = gen7_oa_read;
3547 dev_priv->perf.ops.oa_hw_tail_read =
3548 gen7_oa_hw_tail_read;
3550 dev_priv->perf.oa_formats = hsw_oa_formats;
3551 } else if (HAS_LOGICAL_RING_CONTEXTS(dev_priv)) {
3552 /* Note: that although we could theoretically also support the
3553 * legacy ringbuffer mode on BDW (and earlier iterations of
3554 * this driver, before upstreaming did this) it didn't seem
3555 * worth the complexity to maintain now that BDW+ enable
3556 * execlist mode by default.
3558 dev_priv->perf.oa_formats = gen8_plus_oa_formats;
3560 dev_priv->perf.ops.oa_enable = gen8_oa_enable;
3561 dev_priv->perf.ops.oa_disable = gen8_oa_disable;
3562 dev_priv->perf.ops.read = gen8_oa_read;
3563 dev_priv->perf.ops.oa_hw_tail_read = gen8_oa_hw_tail_read;
3565 if (IS_GEN_RANGE(dev_priv, 8, 9)) {
3566 dev_priv->perf.ops.is_valid_b_counter_reg =
3567 gen7_is_valid_b_counter_addr;
3568 dev_priv->perf.ops.is_valid_mux_reg =
3569 gen8_is_valid_mux_addr;
3570 dev_priv->perf.ops.is_valid_flex_reg =
3571 gen8_is_valid_flex_addr;
3573 if (IS_CHERRYVIEW(dev_priv)) {
3574 dev_priv->perf.ops.is_valid_mux_reg =
3575 chv_is_valid_mux_addr;
3578 dev_priv->perf.ops.enable_metric_set = gen8_enable_metric_set;
3579 dev_priv->perf.ops.disable_metric_set = gen8_disable_metric_set;
3581 if (IS_GEN(dev_priv, 8)) {
3582 dev_priv->perf.ctx_oactxctrl_offset = 0x120;
3583 dev_priv->perf.ctx_flexeu0_offset = 0x2ce;
3585 dev_priv->perf.gen8_valid_ctx_bit = BIT(25);
3587 dev_priv->perf.ctx_oactxctrl_offset = 0x128;
3588 dev_priv->perf.ctx_flexeu0_offset = 0x3de;
3590 dev_priv->perf.gen8_valid_ctx_bit = BIT(16);
3592 } else if (IS_GEN_RANGE(dev_priv, 10, 11)) {
3593 dev_priv->perf.ops.is_valid_b_counter_reg =
3594 gen7_is_valid_b_counter_addr;
3595 dev_priv->perf.ops.is_valid_mux_reg =
3596 gen10_is_valid_mux_addr;
3597 dev_priv->perf.ops.is_valid_flex_reg =
3598 gen8_is_valid_flex_addr;
3600 dev_priv->perf.ops.enable_metric_set = gen8_enable_metric_set;
3601 dev_priv->perf.ops.disable_metric_set = gen10_disable_metric_set;
3603 if (IS_GEN(dev_priv, 10)) {
3604 dev_priv->perf.ctx_oactxctrl_offset = 0x128;
3605 dev_priv->perf.ctx_flexeu0_offset = 0x3de;
3607 dev_priv->perf.ctx_oactxctrl_offset = 0x124;
3608 dev_priv->perf.ctx_flexeu0_offset = 0x78e;
3610 dev_priv->perf.gen8_valid_ctx_bit = BIT(16);
3614 if (dev_priv->perf.ops.enable_metric_set) {
3615 INIT_LIST_HEAD(&dev_priv->perf.streams);
3616 mutex_init(&dev_priv->perf.lock);
3618 oa_sample_rate_hard_limit = 1000 *
3619 (RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz / 2);
3620 dev_priv->perf.sysctl_header = register_sysctl_table(dev_root);
3622 mutex_init(&dev_priv->perf.metrics_lock);
3623 idr_init(&dev_priv->perf.metrics_idr);
3625 /* We set up some ratelimit state to potentially throttle any
3626 * _NOTES about spurious, invalid OA reports which we don't
3627 * forward to userspace.
3629 * We print a _NOTE about any throttling when closing the
3630 * stream instead of waiting until driver _fini which no one
3633 * Using the same limiting factors as printk_ratelimit()
3635 ratelimit_state_init(&dev_priv->perf.spurious_report_rs,
3637 /* Since we use a DRM_NOTE for spurious reports it would be
3638 * inconsistent to let __ratelimit() automatically print a
3639 * warning for throttling.
3641 ratelimit_set_flags(&dev_priv->perf.spurious_report_rs,
3642 RATELIMIT_MSG_ON_RELEASE);
3644 dev_priv->perf.initialized = true;
3648 static int destroy_config(int id, void *p, void *data)
3650 struct drm_i915_private *dev_priv = data;
3651 struct i915_oa_config *oa_config = p;
3653 put_oa_config(dev_priv, oa_config);
3659 * i915_perf_fini - Counter part to i915_perf_init()
3660 * @dev_priv: i915 device instance
3662 void i915_perf_fini(struct drm_i915_private *dev_priv)
3664 if (!dev_priv->perf.initialized)
3667 idr_for_each(&dev_priv->perf.metrics_idr, destroy_config, dev_priv);
3668 idr_destroy(&dev_priv->perf.metrics_idr);
3670 unregister_sysctl_table(dev_priv->perf.sysctl_header);
3672 memset(&dev_priv->perf.ops, 0, sizeof(dev_priv->perf.ops));
3674 dev_priv->perf.initialized = false;