drivers/gpu/drm/i915/intel_atomic.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * DOC: atomic modeset support
  26  *
  27  * The functions here implement the state management and hardware programming
  28  * dispatch required by the atomic modeset infrastructure.
  29  * See intel_atomic_plane.c for the plane-specific atomic functionality.
  30  */
  31
  32 #include <drm/drm_atomic.h>
  33 #include <drm/drm_atomic_helper.h>
  34 #include <drm/drm_fourcc.h>
  35 #include <drm/drm_plane_helper.h>
  36
  37 #include "intel_drv.h"
  38
  39 /**
  40  * intel_digital_connector_atomic_get_property - hook for connector->atomic_get_property.
  41  * @connector: Connector to get the property for.
  42  * @state: Connector state to retrieve the property from.
  43  * @property: Property to retrieve.
  44  * @val: Return value for the property.
  45  *
  46  * Returns the atomic property value for a digital connector.
  47  */
  48 int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
  49                                                 const struct drm_connector_state *state,
  50                                                 struct drm_property *property,
  51                                                 u64 *val)
  52 {
  53         struct drm_device *dev = connector->dev;
  54         struct drm_i915_private *dev_priv = to_i915(dev);
  55         struct intel_digital_connector_state *intel_conn_state =
  56                 to_intel_digital_connector_state(state);
  57
  58         if (property == dev_priv->force_audio_property)
  59                 *val = intel_conn_state->force_audio;
  60         else if (property == dev_priv->broadcast_rgb_property)
  61                 *val = intel_conn_state->broadcast_rgb;
  62         else {
  63                 DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
  64                                  property->base.id, property->name);
  65                 return -EINVAL;
  66         }
  67
  68         return 0;
  69 }
  70
  71 /**
  72  * intel_digital_connector_atomic_set_property - hook for connector->atomic_set_property.
  73  * @connector: Connector to set the property for.
  74  * @state: Connector state to set the property on.
  75  * @property: Property to set.
  76  * @val: New value for the property.
  77  *
  78  * Sets the atomic property value for a digital connector.
  79  */
  80 int intel_digital_connector_atomic_set_property(struct drm_connector *connector,
  81                                                 struct drm_connector_state *state,
  82                                                 struct drm_property *property,
  83                                                 u64 val)
  84 {
  85         struct drm_device *dev = connector->dev;
  86         struct drm_i915_private *dev_priv = to_i915(dev);
  87         struct intel_digital_connector_state *intel_conn_state =
  88                 to_intel_digital_connector_state(state);
  89
  90         if (property == dev_priv->force_audio_property) {
  91                 intel_conn_state->force_audio = val;
  92                 return 0;
  93         }
  94
  95         if (property == dev_priv->broadcast_rgb_property) {
  96                 intel_conn_state->broadcast_rgb = val;
  97                 return 0;
  98         }
  99
 100         DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
 101                          property->base.id, property->name);
 102         return -EINVAL;
 103 }
 104
 105 int intel_digital_connector_atomic_check(struct drm_connector *conn,
 106                                          struct drm_connector_state *new_state)
 107 {
 108         struct intel_digital_connector_state *new_conn_state =
 109                 to_intel_digital_connector_state(new_state);
 110         struct drm_connector_state *old_state =
 111                 drm_atomic_get_old_connector_state(new_state->state, conn);
 112         struct intel_digital_connector_state *old_conn_state =
 113                 to_intel_digital_connector_state(old_state);
 114         struct drm_crtc_state *crtc_state;
 115
 116         intel_hdcp_atomic_check(conn, old_state, new_state);
 117
 118         if (!new_state->crtc)
 119                 return 0;
 120
 121         crtc_state = drm_atomic_get_new_crtc_state(new_state->state, new_state->crtc);
 122
 123         /*
 124          * These properties are handled by fastset, and might not end
 125          * up in a modeset.
 126          */
 127         if (new_conn_state->force_audio != old_conn_state->force_audio ||
 128             new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
 129             new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
 130             new_conn_state->base.content_type != old_conn_state->base.content_type ||
 131             new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode)
 132                 crtc_state->mode_changed = true;
 133
 134         return 0;
 135 }
 136
 137 /**
 138  * intel_digital_connector_duplicate_state - duplicate connector state
 139  * @connector: digital connector
 140  *
 141  * Allocates and returns a copy of the connector state (both common and
 142  * digital connector specific) for the specified connector.
 143  *
 144  * Returns: The newly allocated connector state, or NULL on failure.
 145  */
 146 struct drm_connector_state *
 147 intel_digital_connector_duplicate_state(struct drm_connector *connector)
 148 {
 149         struct intel_digital_connector_state *state;
 150
 151         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
 152         if (!state)
 153                 return NULL;
 154
 155         __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
 156         return &state->base;
 157 }
 158
 159 /**
 160  * intel_crtc_duplicate_state - duplicate crtc state
 161  * @crtc: drm crtc
 162  *
 163  * Allocates and returns a copy of the crtc state (both common and
 164  * Intel-specific) for the specified crtc.
 165  *
 166  * Returns: The newly allocated crtc state, or NULL on failure.
 167  */
 168 struct drm_crtc_state *
 169 intel_crtc_duplicate_state(struct drm_crtc *crtc)
 170 {
 171         struct intel_crtc_state *crtc_state;
 172
 173         crtc_state = kmemdup(crtc->state, sizeof(*crtc_state), GFP_KERNEL);
 174         if (!crtc_state)
 175                 return NULL;
 176
 177         __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);
 178
 179         crtc_state->update_pipe = false;
 180         crtc_state->disable_lp_wm = false;
 181         crtc_state->disable_cxsr = false;
 182         crtc_state->update_wm_pre = false;
 183         crtc_state->update_wm_post = false;
 184         crtc_state->fb_changed = false;
 185         crtc_state->fifo_changed = false;
 186         crtc_state->wm.need_postvbl_update = false;
 187         crtc_state->fb_bits = 0;
 188         crtc_state->update_planes = 0;
 189
 190         return &crtc_state->base;
 191 }
 192
 193 /**
 194  * intel_crtc_destroy_state - destroy crtc state
 195  * @crtc: drm crtc
 196  * @state: the state to destroy
 197  *
 198  * Destroys the crtc state (both common and Intel-specific) for the
 199  * specified crtc.
 200  */
 201 void
 202 intel_crtc_destroy_state(struct drm_crtc *crtc,
 203                          struct drm_crtc_state *state)
 204 {
 205         drm_atomic_helper_crtc_destroy_state(crtc, state);
 206 }
 207
 208 static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state,
 209                                       int num_scalers_need, struct intel_crtc *intel_crtc,
 210                                       const char *name, int idx,
 211                                       struct intel_plane_state *plane_state,
 212                                       int *scaler_id)
 213 {
 214         struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
 215         int j;
 216         u32 mode;
 217
 218         if (*scaler_id < 0) {
 219                 /* find a free scaler */
 220                 for (j = 0; j < intel_crtc->num_scalers; j++) {
 221                         if (scaler_state->scalers[j].in_use)
 222                                 continue;
 223
 224                         *scaler_id = j;
 225                         scaler_state->scalers[*scaler_id].in_use = 1;
 226                         break;
 227                 }
 228         }
 229
 230         if (WARN(*scaler_id < 0, "Cannot find scaler for %s:%d\n", name, idx))
 231                 return;
 232
 233         /* set scaler mode */
 234         if (plane_state && plane_state->base.fb &&
 235             plane_state->base.fb->format->is_yuv &&
 236             plane_state->base.fb->format->num_planes > 1) {
 237                 struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
 238                 if (IS_GEN(dev_priv, 9) &&
 239                     !IS_GEMINILAKE(dev_priv)) {
 240                         mode = SKL_PS_SCALER_MODE_NV12;
 241                 } else if (icl_is_hdr_plane(dev_priv, plane->id)) {
 242                         /*
 243                          * On gen11+'s HDR planes we only use the scaler for
 244                          * scaling. They have a dedicated chroma upsampler, so
 245                          * we don't need the scaler to upsample the UV plane.
 246                          */
 247                         mode = PS_SCALER_MODE_NORMAL;
 248                 } else {
 249                         mode = PS_SCALER_MODE_PLANAR;
 250
 251                         if (plane_state->linked_plane)
 252                                 mode |= PS_PLANE_Y_SEL(plane_state->linked_plane->id);
 253                 }
 254         } else if (INTEL_GEN(dev_priv) > 9 || IS_GEMINILAKE(dev_priv)) {
 255                 mode = PS_SCALER_MODE_NORMAL;
 256         } else if (num_scalers_need == 1 && intel_crtc->num_scalers > 1) {
 257                 /*
 258                  * when only 1 scaler is in use on a pipe with 2 scalers
 259                  * scaler 0 operates in high quality (HQ) mode.
 260                  * In this case use scaler 0 to take advantage of HQ mode
 261                  */
 262                 scaler_state->scalers[*scaler_id].in_use = 0;
 263                 *scaler_id = 0;
 264                 scaler_state->scalers[0].in_use = 1;
 265                 mode = SKL_PS_SCALER_MODE_HQ;
 266         } else {
 267                 mode = SKL_PS_SCALER_MODE_DYN;
 268         }
 269
 270         DRM_DEBUG_KMS("Attached scaler id %u.%u to %s:%d\n",
 271                       intel_crtc->pipe, *scaler_id, name, idx);
 272         scaler_state->scalers[*scaler_id].mode = mode;
 273 }
 274
 275 /**
 276  * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
 277  * @dev_priv: i915 device
 278  * @intel_crtc: intel crtc
 279  * @crtc_state: incoming crtc_state to validate and setup scalers
 280  *
 281  * This function sets up scalers based on staged scaling requests for
 282  * a @crtc and its planes. It is called from crtc level check path. If request
 283  * is a supportable request, it attaches scalers to requested planes and crtc.
 284  *
 285  * This function takes into account the current scaler(s) in use by any planes
 286  * not being part of this atomic state
 287  *
 288  *  Returns:
 289  *         0 - scalers were setup succesfully
 290  *         error code - otherwise
 291  */
 292 int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
 293                                struct intel_crtc *intel_crtc,
 294                                struct intel_crtc_state *crtc_state)
 295 {
 296         struct drm_plane *plane = NULL;
 297         struct intel_plane *intel_plane;
 298         struct intel_plane_state *plane_state = NULL;
 299         struct intel_crtc_scaler_state *scaler_state =
 300                 &crtc_state->scaler_state;
 301         struct drm_atomic_state *drm_state = crtc_state->base.state;
 302         struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state);
 303         int num_scalers_need;
 304         int i;
 305
 306         num_scalers_need = hweight32(scaler_state->scaler_users);
 307
 308         /*
 309          * High level flow:
 310          * - staged scaler requests are already in scaler_state->scaler_users
 311          * - check whether staged scaling requests can be supported
 312          * - add planes using scalers that aren't in current transaction
 313          * - assign scalers to requested users
 314          * - as part of plane commit, scalers will be committed
 315          *   (i.e., either attached or detached) to respective planes in hw
 316          * - as part of crtc_commit, scaler will be either attached or detached
 317          *   to crtc in hw
 318          */
 319
 320         /* fail if required scalers > available scalers */
 321         if (num_scalers_need > intel_crtc->num_scalers){
 322                 DRM_DEBUG_KMS("Too many scaling requests %d > %d\n",
 323                         num_scalers_need, intel_crtc->num_scalers);
 324                 return -EINVAL;
 325         }
 326
 327         /* walkthrough scaler_users bits and start assigning scalers */
 328         for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
 329                 int *scaler_id;
 330                 const char *name;
 331                 int idx;
 332
 333                 /* skip if scaler not required */
 334                 if (!(scaler_state->scaler_users & (1 << i)))
 335                         continue;
 336
 337                 if (i == SKL_CRTC_INDEX) {
 338                         name = "CRTC";
 339                         idx = intel_crtc->base.base.id;
 340
 341                         /* panel fitter case: assign as a crtc scaler */
 342                         scaler_id = &scaler_state->scaler_id;
 343                 } else {
 344                         name = "PLANE";
 345
 346                         /* plane scaler case: assign as a plane scaler */
 347                         /* find the plane that set the bit as scaler_user */
 348                         plane = drm_state->planes[i].ptr;
 349
 350                         /*
 351                          * to enable/disable hq mode, add planes that are using scaler
 352                          * into this transaction
 353                          */
 354                         if (!plane) {
 355                                 struct drm_plane_state *state;
 356                                 plane = drm_plane_from_index(&dev_priv->drm, i);
 357                                 state = drm_atomic_get_plane_state(drm_state, plane);
 358                                 if (IS_ERR(state)) {
 359                                         DRM_DEBUG_KMS("Failed to add [PLANE:%d] to drm_state\n",
 360                                                 plane->base.id);
 361                                         return PTR_ERR(state);
 362                                 }
 363
 364                                 /*
 365                                  * the plane is added after plane checks are run,
 366                                  * but since this plane is unchanged just do the
 367                                  * minimum required validation.
 368                                  */
 369                                 crtc_state->base.planes_changed = true;
 370                         }
 371
 372                         intel_plane = to_intel_plane(plane);
 373                         idx = plane->base.id;
 374
 375                         /* plane on different crtc cannot be a scaler user of this crtc */
 376                         if (WARN_ON(intel_plane->pipe != intel_crtc->pipe))
 377                                 continue;
 378
 379                         plane_state = intel_atomic_get_new_plane_state(intel_state,
 380                                                                        intel_plane);
 381                         scaler_id = &plane_state->scaler_id;
 382                 }
 383
 384                 intel_atomic_setup_scaler(scaler_state, num_scalers_need,
 385                                           intel_crtc, name, idx,
 386                                           plane_state, scaler_id);
 387         }
 388
 389         return 0;
 390 }
 391
 392 struct drm_atomic_state *
 393 intel_atomic_state_alloc(struct drm_device *dev)
 394 {
 395         struct intel_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
 396
 397         if (!state || drm_atomic_state_init(dev, &state->base) < 0) {
 398                 kfree(state);
 399                 return NULL;
 400         }
 401
 402         return &state->base;
 403 }
 404
 405 void intel_atomic_state_clear(struct drm_atomic_state *s)
 406 {
 407         struct intel_atomic_state *state = to_intel_atomic_state(s);
 408         drm_atomic_state_default_clear(&state->base);
 409         state->dpll_set = state->modeset = false;
 410 }