drivers/gpu/drm/i915/intel_atomic.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * DOC: atomic modeset support
  26  *
  27  * The functions here implement the state management and hardware programming
  28  * dispatch required by the atomic modeset infrastructure.
  29  * See intel_atomic_plane.c for the plane-specific atomic functionality.
  30  */
  31
  32 #include <drm/drm_atomic.h>
  33 #include <drm/drm_atomic_helper.h>
  34 #include <drm/drm_fourcc.h>
  35 #include <drm/drm_plane_helper.h>
  36
  37 #include "intel_atomic.h"
  38 #include "intel_drv.h"
  39 #include "intel_hdcp.h"
  40 #include "intel_sprite.h"
  41
  42 /**
  43  * intel_digital_connector_atomic_get_property - hook for connector->atomic_get_property.
  44  * @connector: Connector to get the property for.
  45  * @state: Connector state to retrieve the property from.
  46  * @property: Property to retrieve.
  47  * @val: Return value for the property.
  48  *
  49  * Returns the atomic property value for a digital connector.
  50  */
  51 int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
  52                                                 const struct drm_connector_state *state,
  53                                                 struct drm_property *property,
  54                                                 u64 *val)
  55 {
  56         struct drm_device *dev = connector->dev;
  57         struct drm_i915_private *dev_priv = to_i915(dev);
  58         struct intel_digital_connector_state *intel_conn_state =
  59                 to_intel_digital_connector_state(state);
  60
  61         if (property == dev_priv->force_audio_property)
  62                 *val = intel_conn_state->force_audio;
  63         else if (property == dev_priv->broadcast_rgb_property)
  64                 *val = intel_conn_state->broadcast_rgb;
  65         else {
  66                 DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
  67                                  property->base.id, property->name);
  68                 return -EINVAL;
  69         }
  70
  71         return 0;
  72 }
  73
  74 /**
  75  * intel_digital_connector_atomic_set_property - hook for connector->atomic_set_property.
  76  * @connector: Connector to set the property for.
  77  * @state: Connector state to set the property on.
  78  * @property: Property to set.
  79  * @val: New value for the property.
  80  *
  81  * Sets the atomic property value for a digital connector.
  82  */
  83 int intel_digital_connector_atomic_set_property(struct drm_connector *connector,
  84                                                 struct drm_connector_state *state,
  85                                                 struct drm_property *property,
  86                                                 u64 val)
  87 {
  88         struct drm_device *dev = connector->dev;
  89         struct drm_i915_private *dev_priv = to_i915(dev);
  90         struct intel_digital_connector_state *intel_conn_state =
  91                 to_intel_digital_connector_state(state);
  92
  93         if (property == dev_priv->force_audio_property) {
  94                 intel_conn_state->force_audio = val;
  95                 return 0;
  96         }
  97
  98         if (property == dev_priv->broadcast_rgb_property) {
  99                 intel_conn_state->broadcast_rgb = val;
 100                 return 0;
 101         }
 102
 103         DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
 104                          property->base.id, property->name);
 105         return -EINVAL;
 106 }
 107
 108 int intel_digital_connector_atomic_check(struct drm_connector *conn,
 109                                          struct drm_atomic_state *state)
 110 {
 111         struct drm_connector_state *new_state =
 112                 drm_atomic_get_new_connector_state(state, conn);
 113         struct intel_digital_connector_state *new_conn_state =
 114                 to_intel_digital_connector_state(new_state);
 115         struct drm_connector_state *old_state =
 116                 drm_atomic_get_old_connector_state(state, conn);
 117         struct intel_digital_connector_state *old_conn_state =
 118                 to_intel_digital_connector_state(old_state);
 119         struct drm_crtc_state *crtc_state;
 120
 121         intel_hdcp_atomic_check(conn, old_state, new_state);
 122
 123         if (!new_state->crtc)
 124                 return 0;
 125
 126         crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
 127
 128         /*
 129          * These properties are handled by fastset, and might not end
 130          * up in a modeset.
 131          */
 132         if (new_conn_state->force_audio != old_conn_state->force_audio ||
 133             new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
 134             new_conn_state->base.colorspace != old_conn_state->base.colorspace ||
 135             new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
 136             new_conn_state->base.content_type != old_conn_state->base.content_type ||
 137             new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode)
 138                 crtc_state->mode_changed = true;
 139
 140         return 0;
 141 }
 142
 143 /**
 144  * intel_digital_connector_duplicate_state - duplicate connector state
 145  * @connector: digital connector
 146  *
 147  * Allocates and returns a copy of the connector state (both common and
 148  * digital connector specific) for the specified connector.
 149  *
 150  * Returns: The newly allocated connector state, or NULL on failure.
 151  */
 152 struct drm_connector_state *
 153 intel_digital_connector_duplicate_state(struct drm_connector *connector)
 154 {
 155         struct intel_digital_connector_state *state;
 156
 157         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
 158         if (!state)
 159                 return NULL;
 160
 161         __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
 162         return &state->base;
 163 }
 164
 165 /**
 166  * intel_crtc_duplicate_state - duplicate crtc state
 167  * @crtc: drm crtc
 168  *
 169  * Allocates and returns a copy of the crtc state (both common and
 170  * Intel-specific) for the specified crtc.
 171  *
 172  * Returns: The newly allocated crtc state, or NULL on failure.
 173  */
 174 struct drm_crtc_state *
 175 intel_crtc_duplicate_state(struct drm_crtc *crtc)
 176 {
 177         struct intel_crtc_state *crtc_state;
 178
 179         crtc_state = kmemdup(crtc->state, sizeof(*crtc_state), GFP_KERNEL);
 180         if (!crtc_state)
 181                 return NULL;
 182
 183         __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);
 184
 185         crtc_state->update_pipe = false;
 186         crtc_state->disable_lp_wm = false;
 187         crtc_state->disable_cxsr = false;
 188         crtc_state->update_wm_pre = false;
 189         crtc_state->update_wm_post = false;
 190         crtc_state->fb_changed = false;
 191         crtc_state->fifo_changed = false;
 192         crtc_state->wm.need_postvbl_update = false;
 193         crtc_state->fb_bits = 0;
 194         crtc_state->update_planes = 0;
 195
 196         return &crtc_state->base;
 197 }
 198
 199 /**
 200  * intel_crtc_destroy_state - destroy crtc state
 201  * @crtc: drm crtc
 202  * @state: the state to destroy
 203  *
 204  * Destroys the crtc state (both common and Intel-specific) for the
 205  * specified crtc.
 206  */
 207 void
 208 intel_crtc_destroy_state(struct drm_crtc *crtc,
 209                          struct drm_crtc_state *state)
 210 {
 211         drm_atomic_helper_crtc_destroy_state(crtc, state);
 212 }
 213
 214 static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state,
 215                                       int num_scalers_need, struct intel_crtc *intel_crtc,
 216                                       const char *name, int idx,
 217                                       struct intel_plane_state *plane_state,
 218                                       int *scaler_id)
 219 {
 220         struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
 221         int j;
 222         u32 mode;
 223
 224         if (*scaler_id < 0) {
 225                 /* find a free scaler */
 226                 for (j = 0; j < intel_crtc->num_scalers; j++) {
 227                         if (scaler_state->scalers[j].in_use)
 228                                 continue;
 229
 230                         *scaler_id = j;
 231                         scaler_state->scalers[*scaler_id].in_use = 1;
 232                         break;
 233                 }
 234         }
 235
 236         if (WARN(*scaler_id < 0, "Cannot find scaler for %s:%d\n", name, idx))
 237                 return;
 238
 239         /* set scaler mode */
 240         if (plane_state && plane_state->base.fb &&
 241             plane_state->base.fb->format->is_yuv &&
 242             plane_state->base.fb->format->num_planes > 1) {
 243                 struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
 244                 if (IS_GEN(dev_priv, 9) &&
 245                     !IS_GEMINILAKE(dev_priv)) {
 246                         mode = SKL_PS_SCALER_MODE_NV12;
 247                 } else if (icl_is_hdr_plane(dev_priv, plane->id)) {
 248                         /*
 249                          * On gen11+'s HDR planes we only use the scaler for
 250                          * scaling. They have a dedicated chroma upsampler, so
 251                          * we don't need the scaler to upsample the UV plane.
 252                          */
 253                         mode = PS_SCALER_MODE_NORMAL;
 254                 } else {
 255                         mode = PS_SCALER_MODE_PLANAR;
 256
 257                         if (plane_state->linked_plane)
 258                                 mode |= PS_PLANE_Y_SEL(plane_state->linked_plane->id);
 259                 }
 260         } else if (INTEL_GEN(dev_priv) > 9 || IS_GEMINILAKE(dev_priv)) {
 261                 mode = PS_SCALER_MODE_NORMAL;
 262         } else if (num_scalers_need == 1 && intel_crtc->num_scalers > 1) {
 263                 /*
 264                  * when only 1 scaler is in use on a pipe with 2 scalers
 265                  * scaler 0 operates in high quality (HQ) mode.
 266                  * In this case use scaler 0 to take advantage of HQ mode
 267                  */
 268                 scaler_state->scalers[*scaler_id].in_use = 0;
 269                 *scaler_id = 0;
 270                 scaler_state->scalers[0].in_use = 1;
 271                 mode = SKL_PS_SCALER_MODE_HQ;
 272         } else {
 273                 mode = SKL_PS_SCALER_MODE_DYN;
 274         }
 275
 276         DRM_DEBUG_KMS("Attached scaler id %u.%u to %s:%d\n",
 277                       intel_crtc->pipe, *scaler_id, name, idx);
 278         scaler_state->scalers[*scaler_id].mode = mode;
 279 }
 280
 281 /**
 282  * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
 283  * @dev_priv: i915 device
 284  * @intel_crtc: intel crtc
 285  * @crtc_state: incoming crtc_state to validate and setup scalers
 286  *
 287  * This function sets up scalers based on staged scaling requests for
 288  * a @crtc and its planes. It is called from crtc level check path. If request
 289  * is a supportable request, it attaches scalers to requested planes and crtc.
 290  *
 291  * This function takes into account the current scaler(s) in use by any planes
 292  * not being part of this atomic state
 293  *
 294  *  Returns:
 295  *         0 - scalers were setup succesfully
 296  *         error code - otherwise
 297  */
 298 int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
 299                                struct intel_crtc *intel_crtc,
 300                                struct intel_crtc_state *crtc_state)
 301 {
 302         struct drm_plane *plane = NULL;
 303         struct intel_plane *intel_plane;
 304         struct intel_plane_state *plane_state = NULL;
 305         struct intel_crtc_scaler_state *scaler_state =
 306                 &crtc_state->scaler_state;
 307         struct drm_atomic_state *drm_state = crtc_state->base.state;
 308         struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state);
 309         int num_scalers_need;
 310         int i;
 311
 312         num_scalers_need = hweight32(scaler_state->scaler_users);
 313
 314         /*
 315          * High level flow:
 316          * - staged scaler requests are already in scaler_state->scaler_users
 317          * - check whether staged scaling requests can be supported
 318          * - add planes using scalers that aren't in current transaction
 319          * - assign scalers to requested users
 320          * - as part of plane commit, scalers will be committed
 321          *   (i.e., either attached or detached) to respective planes in hw
 322          * - as part of crtc_commit, scaler will be either attached or detached
 323          *   to crtc in hw
 324          */
 325
 326         /* fail if required scalers > available scalers */
 327         if (num_scalers_need > intel_crtc->num_scalers){
 328                 DRM_DEBUG_KMS("Too many scaling requests %d > %d\n",
 329                         num_scalers_need, intel_crtc->num_scalers);
 330                 return -EINVAL;
 331         }
 332
 333         /* walkthrough scaler_users bits and start assigning scalers */
 334         for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
 335                 int *scaler_id;
 336                 const char *name;
 337                 int idx;
 338
 339                 /* skip if scaler not required */
 340                 if (!(scaler_state->scaler_users & (1 << i)))
 341                         continue;
 342
 343                 if (i == SKL_CRTC_INDEX) {
 344                         name = "CRTC";
 345                         idx = intel_crtc->base.base.id;
 346
 347                         /* panel fitter case: assign as a crtc scaler */
 348                         scaler_id = &scaler_state->scaler_id;
 349                 } else {
 350                         name = "PLANE";
 351
 352                         /* plane scaler case: assign as a plane scaler */
 353                         /* find the plane that set the bit as scaler_user */
 354                         plane = drm_state->planes[i].ptr;
 355
 356                         /*
 357                          * to enable/disable hq mode, add planes that are using scaler
 358                          * into this transaction
 359                          */
 360                         if (!plane) {
 361                                 struct drm_plane_state *state;
 362                                 plane = drm_plane_from_index(&dev_priv->drm, i);
 363                                 state = drm_atomic_get_plane_state(drm_state, plane);
 364                                 if (IS_ERR(state)) {
 365                                         DRM_DEBUG_KMS("Failed to add [PLANE:%d] to drm_state\n",
 366                                                 plane->base.id);
 367                                         return PTR_ERR(state);
 368                                 }
 369
 370                                 /*
 371                                  * the plane is added after plane checks are run,
 372                                  * but since this plane is unchanged just do the
 373                                  * minimum required validation.
 374                                  */
 375                                 crtc_state->base.planes_changed = true;
 376                         }
 377
 378                         intel_plane = to_intel_plane(plane);
 379                         idx = plane->base.id;
 380
 381                         /* plane on different crtc cannot be a scaler user of this crtc */
 382                         if (WARN_ON(intel_plane->pipe != intel_crtc->pipe))
 383                                 continue;
 384
 385                         plane_state = intel_atomic_get_new_plane_state(intel_state,
 386                                                                        intel_plane);
 387                         scaler_id = &plane_state->scaler_id;
 388                 }
 389
 390                 intel_atomic_setup_scaler(scaler_state, num_scalers_need,
 391                                           intel_crtc, name, idx,
 392                                           plane_state, scaler_id);
 393         }
 394
 395         return 0;
 396 }
 397
 398 struct drm_atomic_state *
 399 intel_atomic_state_alloc(struct drm_device *dev)
 400 {
 401         struct intel_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
 402
 403         if (!state || drm_atomic_state_init(dev, &state->base) < 0) {
 404                 kfree(state);
 405                 return NULL;
 406         }
 407
 408         return &state->base;
 409 }
 410
 411 void intel_atomic_state_clear(struct drm_atomic_state *s)
 412 {
 413         struct intel_atomic_state *state = to_intel_atomic_state(s);
 414         drm_atomic_state_default_clear(&state->base);
 415         state->dpll_set = state->modeset = false;
 416 }
 417
 418 struct intel_crtc_state *
 419 intel_atomic_get_crtc_state(struct drm_atomic_state *state,
 420                             struct intel_crtc *crtc)
 421 {
 422         struct drm_crtc_state *crtc_state;
 423         crtc_state = drm_atomic_get_crtc_state(state, &crtc->base);
 424         if (IS_ERR(crtc_state))
 425                 return ERR_CAST(crtc_state);
 426
 427         return to_intel_crtc_state(crtc_state);
 428 }