drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28
  29 #include <linux/delay.h>
  30 #include <linux/export.h>
  31 #include <linux/i2c.h>
  32 #include <linux/slab.h>
  33
  34 #include <drm/drm_atomic_helper.h>
  35 #include <drm/drm_crtc.h>
  36 #include <drm/drm_edid.h>
  37 #include <drm/i915_drm.h>
  38
  39 #include "i915_drv.h"
  40 #include "intel_connector.h"
  41 #include "intel_drv.h"
  42 #include "intel_hdmi.h"
  43 #include "intel_panel.h"
  44 #include "intel_sdvo.h"
  45 #include "intel_sdvo_regs.h"
  46
  47 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  48 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  49 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  50 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  51
  52 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  53                         SDVO_TV_MASK)
  54
  55 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  56 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  57 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  58 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  59 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  60
  61
  62 static const char * const tv_format_names[] = {
  63         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  64         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  65         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  66         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  67         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  68         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  69         "SECAM_60"
  70 };
  71
  72 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  73
  74 struct intel_sdvo {
  75         struct intel_encoder base;
  76
  77         struct i2c_adapter *i2c;
  78         u8 slave_addr;
  79
  80         struct i2c_adapter ddc;
  81
  82         /* Register for the SDVO device: SDVOB or SDVOC */
  83         i915_reg_t sdvo_reg;
  84
  85         /* Active outputs controlled by this SDVO output */
  86         u16 controlled_output;
  87
  88         /*
  89          * Capabilities of the SDVO device returned by
  90          * intel_sdvo_get_capabilities()
  91          */
  92         struct intel_sdvo_caps caps;
  93
  94         /* Pixel clock limitations reported by the SDVO device, in kHz */
  95         int pixel_clock_min, pixel_clock_max;
  96
  97         /*
  98         * For multiple function SDVO device,
  99         * this is for current attached outputs.
 100         */
 101         u16 attached_output;
 102
 103         /*
 104          * Hotplug activation bits for this device
 105          */
 106         u16 hotplug_active;
 107
 108         enum port port;
 109
 110         bool has_hdmi_monitor;
 111         bool has_hdmi_audio;
 112
 113         /* DDC bus used by this SDVO encoder */
 114         u8 ddc_bus;
 115
 116         /*
 117          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 118          */
 119         u8 dtd_sdvo_flags;
 120 };
 121
 122 struct intel_sdvo_connector {
 123         struct intel_connector base;
 124
 125         /* Mark the type of connector */
 126         u16 output_flag;
 127
 128         /* This contains all current supported TV format */
 129         u8 tv_format_supported[TV_FORMAT_NUM];
 130         int   format_supported_num;
 131         struct drm_property *tv_format;
 132
 133         /* add the property for the SDVO-TV */
 134         struct drm_property *left;
 135         struct drm_property *right;
 136         struct drm_property *top;
 137         struct drm_property *bottom;
 138         struct drm_property *hpos;
 139         struct drm_property *vpos;
 140         struct drm_property *contrast;
 141         struct drm_property *saturation;
 142         struct drm_property *hue;
 143         struct drm_property *sharpness;
 144         struct drm_property *flicker_filter;
 145         struct drm_property *flicker_filter_adaptive;
 146         struct drm_property *flicker_filter_2d;
 147         struct drm_property *tv_chroma_filter;
 148         struct drm_property *tv_luma_filter;
 149         struct drm_property *dot_crawl;
 150
 151         /* add the property for the SDVO-TV/LVDS */
 152         struct drm_property *brightness;
 153
 154         /* this is to get the range of margin.*/
 155         u32 max_hscan, max_vscan;
 156
 157         /**
 158          * This is set if we treat the device as HDMI, instead of DVI.
 159          */
 160         bool is_hdmi;
 161 };
 162
 163 struct intel_sdvo_connector_state {
 164         /* base.base: tv.saturation/contrast/hue/brightness */
 165         struct intel_digital_connector_state base;
 166
 167         struct {
 168                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 169                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 170                 unsigned chroma_filter, luma_filter, dot_crawl;
 171         } tv;
 172 };
 173
 174 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 175 {
 176         return container_of(encoder, struct intel_sdvo, base);
 177 }
 178
 179 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 180 {
 181         return to_sdvo(intel_attached_encoder(connector));
 182 }
 183
 184 static struct intel_sdvo_connector *
 185 to_intel_sdvo_connector(struct drm_connector *connector)
 186 {
 187         return container_of(connector, struct intel_sdvo_connector, base.base);
 188 }
 189
 190 #define to_intel_sdvo_connector_state(conn_state) \
 191         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 192
 193 static bool
 194 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags);
 195 static bool
 196 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 197                               struct intel_sdvo_connector *intel_sdvo_connector,
 198                               int type);
 199 static bool
 200 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 201                                    struct intel_sdvo_connector *intel_sdvo_connector);
 202
 203 /*
 204  * Writes the SDVOB or SDVOC with the given value, but always writes both
 205  * SDVOB and SDVOC to work around apparent hardware issues (according to
 206  * comments in the BIOS).
 207  */
 208 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 209 {
 210         struct drm_device *dev = intel_sdvo->base.base.dev;
 211         struct drm_i915_private *dev_priv = to_i915(dev);
 212         u32 bval = val, cval = val;
 213         int i;
 214
 215         if (HAS_PCH_SPLIT(dev_priv)) {
 216                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 217                 POSTING_READ(intel_sdvo->sdvo_reg);
 218                 /*
 219                  * HW workaround, need to write this twice for issue
 220                  * that may result in first write getting masked.
 221                  */
 222                 if (HAS_PCH_IBX(dev_priv)) {
 223                         I915_WRITE(intel_sdvo->sdvo_reg, val);
 224                         POSTING_READ(intel_sdvo->sdvo_reg);
 225                 }
 226                 return;
 227         }
 228
 229         if (intel_sdvo->port == PORT_B)
 230                 cval = I915_READ(GEN3_SDVOC);
 231         else
 232                 bval = I915_READ(GEN3_SDVOB);
 233
 234         /*
 235          * Write the registers twice for luck. Sometimes,
 236          * writing them only once doesn't appear to 'stick'.
 237          * The BIOS does this too. Yay, magic
 238          */
 239         for (i = 0; i < 2; i++) {
 240                 I915_WRITE(GEN3_SDVOB, bval);
 241                 POSTING_READ(GEN3_SDVOB);
 242
 243                 I915_WRITE(GEN3_SDVOC, cval);
 244                 POSTING_READ(GEN3_SDVOC);
 245         }
 246 }
 247
 248 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 249 {
 250         struct i2c_msg msgs[] = {
 251                 {
 252                         .addr = intel_sdvo->slave_addr,
 253                         .flags = 0,
 254                         .len = 1,
 255                         .buf = &addr,
 256                 },
 257                 {
 258                         .addr = intel_sdvo->slave_addr,
 259                         .flags = I2C_M_RD,
 260                         .len = 1,
 261                         .buf = ch,
 262                 }
 263         };
 264         int ret;
 265
 266         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 267                 return true;
 268
 269         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 270         return false;
 271 }
 272
 273 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 274 /** Mapping of command numbers to names, for debug output */
 275 static const struct _sdvo_cmd_name {
 276         u8 cmd;
 277         const char *name;
 278 } __attribute__ ((packed)) sdvo_cmd_names[] = {
 279         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 280         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 281         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 282         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 283         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 284         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 285         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 286         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 287         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 288         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 289         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 290         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 291         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 292         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 293         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 294         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 295         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 322
 323         /* Add the op code for SDVO enhancements */
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 368
 369         /* HDMI op code */
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 390 };
 391
 392 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 393
 394 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 395                                    const void *args, int args_len)
 396 {
 397         int i, pos = 0;
 398 #define BUF_LEN 256
 399         char buffer[BUF_LEN];
 400
 401 #define BUF_PRINT(args...) \
 402         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 403
 404
 405         for (i = 0; i < args_len; i++) {
 406                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 407         }
 408         for (; i < 8; i++) {
 409                 BUF_PRINT("   ");
 410         }
 411         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 412                 if (cmd == sdvo_cmd_names[i].cmd) {
 413                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 414                         break;
 415                 }
 416         }
 417         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 418                 BUF_PRINT("(%02X)", cmd);
 419         }
 420         BUG_ON(pos >= BUF_LEN - 1);
 421 #undef BUF_PRINT
 422 #undef BUF_LEN
 423
 424         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 425 }
 426
 427 static const char * const cmd_status_names[] = {
 428         "Power on",
 429         "Success",
 430         "Not supported",
 431         "Invalid arg",
 432         "Pending",
 433         "Target not specified",
 434         "Scaling not supported"
 435 };
 436
 437 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 438                                    const void *args, int args_len,
 439                                    bool unlocked)
 440 {
 441         u8 *buf, status;
 442         struct i2c_msg *msgs;
 443         int i, ret = true;
 444
 445         /* Would be simpler to allocate both in one go ? */
 446         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 447         if (!buf)
 448                 return false;
 449
 450         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 451         if (!msgs) {
 452                 kfree(buf);
 453                 return false;
 454         }
 455
 456         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 457
 458         for (i = 0; i < args_len; i++) {
 459                 msgs[i].addr = intel_sdvo->slave_addr;
 460                 msgs[i].flags = 0;
 461                 msgs[i].len = 2;
 462                 msgs[i].buf = buf + 2 *i;
 463                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 464                 buf[2*i + 1] = ((u8*)args)[i];
 465         }
 466         msgs[i].addr = intel_sdvo->slave_addr;
 467         msgs[i].flags = 0;
 468         msgs[i].len = 2;
 469         msgs[i].buf = buf + 2*i;
 470         buf[2*i + 0] = SDVO_I2C_OPCODE;
 471         buf[2*i + 1] = cmd;
 472
 473         /* the following two are to read the response */
 474         status = SDVO_I2C_CMD_STATUS;
 475         msgs[i+1].addr = intel_sdvo->slave_addr;
 476         msgs[i+1].flags = 0;
 477         msgs[i+1].len = 1;
 478         msgs[i+1].buf = &status;
 479
 480         msgs[i+2].addr = intel_sdvo->slave_addr;
 481         msgs[i+2].flags = I2C_M_RD;
 482         msgs[i+2].len = 1;
 483         msgs[i+2].buf = &status;
 484
 485         if (unlocked)
 486                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 487         else
 488                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 489         if (ret < 0) {
 490                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 491                 ret = false;
 492                 goto out;
 493         }
 494         if (ret != i+3) {
 495                 /* failure in I2C transfer */
 496                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 497                 ret = false;
 498         }
 499
 500 out:
 501         kfree(msgs);
 502         kfree(buf);
 503         return ret;
 504 }
 505
 506 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 507                                  const void *args, int args_len)
 508 {
 509         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 510 }
 511
 512 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 513                                      void *response, int response_len)
 514 {
 515         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 516         u8 status;
 517         int i, pos = 0;
 518 #define BUF_LEN 256
 519         char buffer[BUF_LEN];
 520
 521
 522         /*
 523          * The documentation states that all commands will be
 524          * processed within 15µs, and that we need only poll
 525          * the status byte a maximum of 3 times in order for the
 526          * command to be complete.
 527          *
 528          * Check 5 times in case the hardware failed to read the docs.
 529          *
 530          * Also beware that the first response by many devices is to
 531          * reply PENDING and stall for time. TVs are notorious for
 532          * requiring longer than specified to complete their replies.
 533          * Originally (in the DDX long ago), the delay was only ever 15ms
 534          * with an additional delay of 30ms applied for TVs added later after
 535          * many experiments. To accommodate both sets of delays, we do a
 536          * sequence of slow checks if the device is falling behind and fails
 537          * to reply within 5*15µs.
 538          */
 539         if (!intel_sdvo_read_byte(intel_sdvo,
 540                                   SDVO_I2C_CMD_STATUS,
 541                                   &status))
 542                 goto log_fail;
 543
 544         while ((status == SDVO_CMD_STATUS_PENDING ||
 545                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 546                 if (retry < 10)
 547                         msleep(15);
 548                 else
 549                         udelay(15);
 550
 551                 if (!intel_sdvo_read_byte(intel_sdvo,
 552                                           SDVO_I2C_CMD_STATUS,
 553                                           &status))
 554                         goto log_fail;
 555         }
 556
 557 #define BUF_PRINT(args...) \
 558         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 559
 560         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 561                 BUF_PRINT("(%s)", cmd_status_names[status]);
 562         else
 563                 BUF_PRINT("(??? %d)", status);
 564
 565         if (status != SDVO_CMD_STATUS_SUCCESS)
 566                 goto log_fail;
 567
 568         /* Read the command response */
 569         for (i = 0; i < response_len; i++) {
 570                 if (!intel_sdvo_read_byte(intel_sdvo,
 571                                           SDVO_I2C_RETURN_0 + i,
 572                                           &((u8 *)response)[i]))
 573                         goto log_fail;
 574                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 575         }
 576         BUG_ON(pos >= BUF_LEN - 1);
 577 #undef BUF_PRINT
 578 #undef BUF_LEN
 579
 580         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 581         return true;
 582
 583 log_fail:
 584         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 585         return false;
 586 }
 587
 588 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 589 {
 590         if (adjusted_mode->crtc_clock >= 100000)
 591                 return 1;
 592         else if (adjusted_mode->crtc_clock >= 50000)
 593                 return 2;
 594         else
 595                 return 4;
 596 }
 597
 598 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 599                                                 u8 ddc_bus)
 600 {
 601         /* This must be the immediately preceding write before the i2c xfer */
 602         return __intel_sdvo_write_cmd(intel_sdvo,
 603                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 604                                       &ddc_bus, 1, false);
 605 }
 606
 607 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 608 {
 609         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 610                 return false;
 611
 612         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 613 }
 614
 615 static bool
 616 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 617 {
 618         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 619                 return false;
 620
 621         return intel_sdvo_read_response(intel_sdvo, value, len);
 622 }
 623
 624 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 625 {
 626         struct intel_sdvo_set_target_input_args targets = {0};
 627         return intel_sdvo_set_value(intel_sdvo,
 628                                     SDVO_CMD_SET_TARGET_INPUT,
 629                                     &targets, sizeof(targets));
 630 }
 631
 632 /*
 633  * Return whether each input is trained.
 634  *
 635  * This function is making an assumption about the layout of the response,
 636  * which should be checked against the docs.
 637  */
 638 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 639 {
 640         struct intel_sdvo_get_trained_inputs_response response;
 641
 642         BUILD_BUG_ON(sizeof(response) != 1);
 643         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 644                                   &response, sizeof(response)))
 645                 return false;
 646
 647         *input_1 = response.input0_trained;
 648         *input_2 = response.input1_trained;
 649         return true;
 650 }
 651
 652 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 653                                           u16 outputs)
 654 {
 655         return intel_sdvo_set_value(intel_sdvo,
 656                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 657                                     &outputs, sizeof(outputs));
 658 }
 659
 660 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 661                                           u16 *outputs)
 662 {
 663         return intel_sdvo_get_value(intel_sdvo,
 664                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 665                                     outputs, sizeof(*outputs));
 666 }
 667
 668 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 669                                                int mode)
 670 {
 671         u8 state = SDVO_ENCODER_STATE_ON;
 672
 673         switch (mode) {
 674         case DRM_MODE_DPMS_ON:
 675                 state = SDVO_ENCODER_STATE_ON;
 676                 break;
 677         case DRM_MODE_DPMS_STANDBY:
 678                 state = SDVO_ENCODER_STATE_STANDBY;
 679                 break;
 680         case DRM_MODE_DPMS_SUSPEND:
 681                 state = SDVO_ENCODER_STATE_SUSPEND;
 682                 break;
 683         case DRM_MODE_DPMS_OFF:
 684                 state = SDVO_ENCODER_STATE_OFF;
 685                 break;
 686         }
 687
 688         return intel_sdvo_set_value(intel_sdvo,
 689                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 690 }
 691
 692 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 693                                                    int *clock_min,
 694                                                    int *clock_max)
 695 {
 696         struct intel_sdvo_pixel_clock_range clocks;
 697
 698         BUILD_BUG_ON(sizeof(clocks) != 4);
 699         if (!intel_sdvo_get_value(intel_sdvo,
 700                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 701                                   &clocks, sizeof(clocks)))
 702                 return false;
 703
 704         /* Convert the values from units of 10 kHz to kHz. */
 705         *clock_min = clocks.min * 10;
 706         *clock_max = clocks.max * 10;
 707         return true;
 708 }
 709
 710 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 711                                          u16 outputs)
 712 {
 713         return intel_sdvo_set_value(intel_sdvo,
 714                                     SDVO_CMD_SET_TARGET_OUTPUT,
 715                                     &outputs, sizeof(outputs));
 716 }
 717
 718 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 719                                   struct intel_sdvo_dtd *dtd)
 720 {
 721         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 722                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 723 }
 724
 725 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 726                                   struct intel_sdvo_dtd *dtd)
 727 {
 728         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 729                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 730 }
 731
 732 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 733                                          struct intel_sdvo_dtd *dtd)
 734 {
 735         return intel_sdvo_set_timing(intel_sdvo,
 736                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 737 }
 738
 739 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 740                                          struct intel_sdvo_dtd *dtd)
 741 {
 742         return intel_sdvo_set_timing(intel_sdvo,
 743                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 744 }
 745
 746 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 747                                         struct intel_sdvo_dtd *dtd)
 748 {
 749         return intel_sdvo_get_timing(intel_sdvo,
 750                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 751 }
 752
 753 static bool
 754 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 755                                          struct intel_sdvo_connector *intel_sdvo_connector,
 756                                          u16 clock,
 757                                          u16 width,
 758                                          u16 height)
 759 {
 760         struct intel_sdvo_preferred_input_timing_args args;
 761
 762         memset(&args, 0, sizeof(args));
 763         args.clock = clock;
 764         args.width = width;
 765         args.height = height;
 766         args.interlace = 0;
 767
 768         if (IS_LVDS(intel_sdvo_connector)) {
 769                 const struct drm_display_mode *fixed_mode =
 770                         intel_sdvo_connector->base.panel.fixed_mode;
 771
 772                 if (fixed_mode->hdisplay != width ||
 773                     fixed_mode->vdisplay != height)
 774                         args.scaled = 1;
 775         }
 776
 777         return intel_sdvo_set_value(intel_sdvo,
 778                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 779                                     &args, sizeof(args));
 780 }
 781
 782 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 783                                                   struct intel_sdvo_dtd *dtd)
 784 {
 785         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 786         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 787         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 788                                     &dtd->part1, sizeof(dtd->part1)) &&
 789                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 790                                      &dtd->part2, sizeof(dtd->part2));
 791 }
 792
 793 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 794 {
 795         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 796 }
 797
 798 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 799                                          const struct drm_display_mode *mode)
 800 {
 801         u16 width, height;
 802         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 803         u16 h_sync_offset, v_sync_offset;
 804         int mode_clock;
 805
 806         memset(dtd, 0, sizeof(*dtd));
 807
 808         width = mode->hdisplay;
 809         height = mode->vdisplay;
 810
 811         /* do some mode translations */
 812         h_blank_len = mode->htotal - mode->hdisplay;
 813         h_sync_len = mode->hsync_end - mode->hsync_start;
 814
 815         v_blank_len = mode->vtotal - mode->vdisplay;
 816         v_sync_len = mode->vsync_end - mode->vsync_start;
 817
 818         h_sync_offset = mode->hsync_start - mode->hdisplay;
 819         v_sync_offset = mode->vsync_start - mode->vdisplay;
 820
 821         mode_clock = mode->clock;
 822         mode_clock /= 10;
 823         dtd->part1.clock = mode_clock;
 824
 825         dtd->part1.h_active = width & 0xff;
 826         dtd->part1.h_blank = h_blank_len & 0xff;
 827         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 828                 ((h_blank_len >> 8) & 0xf);
 829         dtd->part1.v_active = height & 0xff;
 830         dtd->part1.v_blank = v_blank_len & 0xff;
 831         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 832                 ((v_blank_len >> 8) & 0xf);
 833
 834         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 835         dtd->part2.h_sync_width = h_sync_len & 0xff;
 836         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 837                 (v_sync_len & 0xf);
 838         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 839                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 840                 ((v_sync_len & 0x30) >> 4);
 841
 842         dtd->part2.dtd_flags = 0x18;
 843         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 844                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 845         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 846                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 847         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 848                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 849
 850         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 851 }
 852
 853 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 854                                          const struct intel_sdvo_dtd *dtd)
 855 {
 856         struct drm_display_mode mode = {};
 857
 858         mode.hdisplay = dtd->part1.h_active;
 859         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 860         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 861         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 862         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 863         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 864         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 865         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 866
 867         mode.vdisplay = dtd->part1.v_active;
 868         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 869         mode.vsync_start = mode.vdisplay;
 870         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 871         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 872         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 873         mode.vsync_end = mode.vsync_start +
 874                 (dtd->part2.v_sync_off_width & 0xf);
 875         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 876         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 877         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 878
 879         mode.clock = dtd->part1.clock * 10;
 880
 881         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 882                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 883         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 884                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 885         else
 886                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 887         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 888                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 889         else
 890                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 891
 892         drm_mode_set_crtcinfo(&mode, 0);
 893
 894         drm_mode_copy(pmode, &mode);
 895 }
 896
 897 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 898 {
 899         struct intel_sdvo_encode encode;
 900
 901         BUILD_BUG_ON(sizeof(encode) != 2);
 902         return intel_sdvo_get_value(intel_sdvo,
 903                                   SDVO_CMD_GET_SUPP_ENCODE,
 904                                   &encode, sizeof(encode));
 905 }
 906
 907 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 908                                   u8 mode)
 909 {
 910         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 911 }
 912
 913 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 914                                        u8 mode)
 915 {
 916         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 917 }
 918
 919 #if 0
 920 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 921 {
 922         int i, j;
 923         u8 set_buf_index[2];
 924         u8 av_split;
 925         u8 buf_size;
 926         u8 buf[48];
 927         u8 *pos;
 928
 929         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 930
 931         for (i = 0; i <= av_split; i++) {
 932                 set_buf_index[0] = i; set_buf_index[1] = 0;
 933                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 934                                      set_buf_index, 2);
 935                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 936                 intel_sdvo_read_response(encoder, &buf_size, 1);
 937
 938                 pos = buf;
 939                 for (j = 0; j <= buf_size; j += 8) {
 940                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 941                                              NULL, 0);
 942                         intel_sdvo_read_response(encoder, pos, 8);
 943                         pos += 8;
 944                 }
 945         }
 946 }
 947 #endif
 948
 949 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 950                                        unsigned int if_index, u8 tx_rate,
 951                                        const u8 *data, unsigned int length)
 952 {
 953         u8 set_buf_index[2] = { if_index, 0 };
 954         u8 hbuf_size, tmp[8];
 955         int i;
 956
 957         if (!intel_sdvo_set_value(intel_sdvo,
 958                                   SDVO_CMD_SET_HBUF_INDEX,
 959                                   set_buf_index, 2))
 960                 return false;
 961
 962         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 963                                   &hbuf_size, 1))
 964                 return false;
 965
 966         /* Buffer size is 0 based, hooray! */
 967         hbuf_size++;
 968
 969         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 970                       if_index, length, hbuf_size);
 971
 972         for (i = 0; i < hbuf_size; i += 8) {
 973                 memset(tmp, 0, 8);
 974                 if (i < length)
 975                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 976
 977                 if (!intel_sdvo_set_value(intel_sdvo,
 978                                           SDVO_CMD_SET_HBUF_DATA,
 979                                           tmp, 8))
 980                         return false;
 981         }
 982
 983         return intel_sdvo_set_value(intel_sdvo,
 984                                     SDVO_CMD_SET_HBUF_TXRATE,
 985                                     &tx_rate, 1);
 986 }
 987
 988 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
 989                                          unsigned int if_index,
 990                                          u8 *data, unsigned int length)
 991 {
 992         u8 set_buf_index[2] = { if_index, 0 };
 993         u8 hbuf_size, tx_rate, av_split;
 994         int i;
 995
 996         if (!intel_sdvo_get_value(intel_sdvo,
 997                                   SDVO_CMD_GET_HBUF_AV_SPLIT,
 998                                   &av_split, 1))
 999                 return -ENXIO;
1000
1001         if (av_split < if_index)
1002                 return 0;
1003
1004         if (!intel_sdvo_get_value(intel_sdvo,
1005                                   SDVO_CMD_GET_HBUF_TXRATE,
1006                                   &tx_rate, 1))
1007                 return -ENXIO;
1008
1009         if (tx_rate == SDVO_HBUF_TX_DISABLED)
1010                 return 0;
1011
1012         if (!intel_sdvo_set_value(intel_sdvo,
1013                                   SDVO_CMD_SET_HBUF_INDEX,
1014                                   set_buf_index, 2))
1015                 return -ENXIO;
1016
1017         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
1018                                   &hbuf_size, 1))
1019                 return -ENXIO;
1020
1021         /* Buffer size is 0 based, hooray! */
1022         hbuf_size++;
1023
1024         DRM_DEBUG_KMS("reading sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
1025                       if_index, length, hbuf_size);
1026
1027         hbuf_size = min_t(unsigned int, length, hbuf_size);
1028
1029         for (i = 0; i < hbuf_size; i += 8) {
1030                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0))
1031                         return -ENXIO;
1032                 if (!intel_sdvo_read_response(intel_sdvo, &data[i],
1033                                               min_t(unsigned int, 8, hbuf_size - i)))
1034                         return -ENXIO;
1035         }
1036
1037         return hbuf_size;
1038 }
1039
1040 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
1041                                              struct intel_crtc_state *crtc_state,
1042                                              struct drm_connector_state *conn_state)
1043 {
1044         struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
1045         const struct drm_display_mode *adjusted_mode =
1046                 &crtc_state->base.adjusted_mode;
1047         int ret;
1048
1049         if (!crtc_state->has_hdmi_sink)
1050                 return true;
1051
1052         crtc_state->infoframes.enable |=
1053                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1054
1055         ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
1056                                                        conn_state->connector,
1057                                                        adjusted_mode);
1058         if (ret)
1059                 return false;
1060
1061         drm_hdmi_avi_infoframe_quant_range(frame,
1062                                            conn_state->connector,
1063                                            adjusted_mode,
1064                                            crtc_state->limited_color_range ?
1065                                            HDMI_QUANTIZATION_RANGE_LIMITED :
1066                                            HDMI_QUANTIZATION_RANGE_FULL);
1067
1068         ret = hdmi_avi_infoframe_check(frame);
1069         if (WARN_ON(ret))
1070                 return false;
1071
1072         return true;
1073 }
1074
1075 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1076                                          const struct intel_crtc_state *crtc_state)
1077 {
1078         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1079         const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1080         ssize_t len;
1081
1082         if ((crtc_state->infoframes.enable &
1083              intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
1084                 return true;
1085
1086         if (WARN_ON(frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
1087                 return false;
1088
1089         len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
1090         if (WARN_ON(len < 0))
1091                 return false;
1092
1093         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1094                                           SDVO_HBUF_TX_VSYNC,
1095                                           sdvo_data, sizeof(sdvo_data));
1096 }
1097
1098 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
1099                                          struct intel_crtc_state *crtc_state)
1100 {
1101         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1102         union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1103         ssize_t len;
1104         int ret;
1105
1106         if (!crtc_state->has_hdmi_sink)
1107                 return;
1108
1109         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1110                                         sdvo_data, sizeof(sdvo_data));
1111         if (len < 0) {
1112                 DRM_DEBUG_KMS("failed to read AVI infoframe\n");
1113                 return;
1114         } else if (len == 0) {
1115                 return;
1116         }
1117
1118         crtc_state->infoframes.enable |=
1119                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1120
1121         ret = hdmi_infoframe_unpack(frame, sdvo_data, sizeof(sdvo_data));
1122         if (ret) {
1123                 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n");
1124                 return;
1125         }
1126
1127         if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
1128                 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1129                               frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
1130 }
1131
1132 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1133                                      const struct drm_connector_state *conn_state)
1134 {
1135         struct intel_sdvo_tv_format format;
1136         u32 format_map;
1137
1138         format_map = 1 << conn_state->tv.mode;
1139         memset(&format, 0, sizeof(format));
1140         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1141
1142         BUILD_BUG_ON(sizeof(format) != 6);
1143         return intel_sdvo_set_value(intel_sdvo,
1144                                     SDVO_CMD_SET_TV_FORMAT,
1145                                     &format, sizeof(format));
1146 }
1147
1148 static bool
1149 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1150                                         const struct drm_display_mode *mode)
1151 {
1152         struct intel_sdvo_dtd output_dtd;
1153
1154         if (!intel_sdvo_set_target_output(intel_sdvo,
1155                                           intel_sdvo->attached_output))
1156                 return false;
1157
1158         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1159         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1160                 return false;
1161
1162         return true;
1163 }
1164
1165 /*
1166  * Asks the sdvo controller for the preferred input mode given the output mode.
1167  * Unfortunately we have to set up the full output mode to do that.
1168  */
1169 static bool
1170 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1171                                     struct intel_sdvo_connector *intel_sdvo_connector,
1172                                     const struct drm_display_mode *mode,
1173                                     struct drm_display_mode *adjusted_mode)
1174 {
1175         struct intel_sdvo_dtd input_dtd;
1176
1177         /* Reset the input timing to the screen. Assume always input 0. */
1178         if (!intel_sdvo_set_target_input(intel_sdvo))
1179                 return false;
1180
1181         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1182                                                       intel_sdvo_connector,
1183                                                       mode->clock / 10,
1184                                                       mode->hdisplay,
1185                                                       mode->vdisplay))
1186                 return false;
1187
1188         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1189                                                    &input_dtd))
1190                 return false;
1191
1192         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1193         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1194
1195         return true;
1196 }
1197
1198 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1199 {
1200         unsigned dotclock = pipe_config->port_clock;
1201         struct dpll *clock = &pipe_config->dpll;
1202
1203         /*
1204          * SDVO TV has fixed PLL values depend on its clock range,
1205          * this mirrors vbios setting.
1206          */
1207         if (dotclock >= 100000 && dotclock < 140500) {
1208                 clock->p1 = 2;
1209                 clock->p2 = 10;
1210                 clock->n = 3;
1211                 clock->m1 = 16;
1212                 clock->m2 = 8;
1213         } else if (dotclock >= 140500 && dotclock <= 200000) {
1214                 clock->p1 = 1;
1215                 clock->p2 = 10;
1216                 clock->n = 6;
1217                 clock->m1 = 12;
1218                 clock->m2 = 8;
1219         } else {
1220                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1221         }
1222
1223         pipe_config->clock_set = true;
1224 }
1225
1226 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1227                                      struct intel_crtc_state *pipe_config,
1228                                      struct drm_connector_state *conn_state)
1229 {
1230         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1231         struct intel_sdvo_connector_state *intel_sdvo_state =
1232                 to_intel_sdvo_connector_state(conn_state);
1233         struct intel_sdvo_connector *intel_sdvo_connector =
1234                 to_intel_sdvo_connector(conn_state->connector);
1235         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1236         struct drm_display_mode *mode = &pipe_config->base.mode;
1237
1238         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1239         pipe_config->pipe_bpp = 8*3;
1240         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1241
1242         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1243                 pipe_config->has_pch_encoder = true;
1244
1245         /*
1246          * We need to construct preferred input timings based on our
1247          * output timings.  To do that, we have to set the output
1248          * timings, even though this isn't really the right place in
1249          * the sequence to do it. Oh well.
1250          */
1251         if (IS_TV(intel_sdvo_connector)) {
1252                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1253                         return -EINVAL;
1254
1255                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1256                                                            intel_sdvo_connector,
1257                                                            mode,
1258                                                            adjusted_mode);
1259                 pipe_config->sdvo_tv_clock = true;
1260         } else if (IS_LVDS(intel_sdvo_connector)) {
1261                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1262                                                              intel_sdvo_connector->base.panel.fixed_mode))
1263                         return -EINVAL;
1264
1265                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1266                                                            intel_sdvo_connector,
1267                                                            mode,
1268                                                            adjusted_mode);
1269         }
1270
1271         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1272                 return -EINVAL;
1273
1274         /*
1275          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1276          * SDVO device will factor out the multiplier during mode_set.
1277          */
1278         pipe_config->pixel_multiplier =
1279                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1280
1281         if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1282                 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1283
1284         if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1285             (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1286                 pipe_config->has_audio = true;
1287
1288         if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1289                 /*
1290                  * See CEA-861-E - 5.1 Default Encoding Parameters
1291                  *
1292                  * FIXME: This bit is only valid when using TMDS encoding and 8
1293                  * bit per color mode.
1294                  */
1295                 if (pipe_config->has_hdmi_sink &&
1296                     drm_match_cea_mode(adjusted_mode) > 1)
1297                         pipe_config->limited_color_range = true;
1298         } else {
1299                 if (pipe_config->has_hdmi_sink &&
1300                     intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1301                         pipe_config->limited_color_range = true;
1302         }
1303
1304         /* Clock computation needs to happen after pixel multiplier. */
1305         if (IS_TV(intel_sdvo_connector))
1306                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1307
1308         /* Set user selected PAR to incoming mode's member */
1309         if (intel_sdvo_connector->is_hdmi)
1310                 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1311
1312         if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
1313                                               pipe_config, conn_state)) {
1314                 DRM_DEBUG_KMS("bad AVI infoframe\n");
1315                 return -EINVAL;
1316         }
1317
1318         return 0;
1319 }
1320
1321 #define UPDATE_PROPERTY(input, NAME) \
1322         do { \
1323                 val = input; \
1324                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1325         } while (0)
1326
1327 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1328                                     const struct intel_sdvo_connector_state *sdvo_state)
1329 {
1330         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1331         struct intel_sdvo_connector *intel_sdvo_conn =
1332                 to_intel_sdvo_connector(conn_state->connector);
1333         u16 val;
1334
1335         if (intel_sdvo_conn->left)
1336                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1337
1338         if (intel_sdvo_conn->top)
1339                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1340
1341         if (intel_sdvo_conn->hpos)
1342                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1343
1344         if (intel_sdvo_conn->vpos)
1345                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1346
1347         if (intel_sdvo_conn->saturation)
1348                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1349
1350         if (intel_sdvo_conn->contrast)
1351                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1352
1353         if (intel_sdvo_conn->hue)
1354                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1355
1356         if (intel_sdvo_conn->brightness)
1357                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1358
1359         if (intel_sdvo_conn->sharpness)
1360                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1361
1362         if (intel_sdvo_conn->flicker_filter)
1363                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1364
1365         if (intel_sdvo_conn->flicker_filter_2d)
1366                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1367
1368         if (intel_sdvo_conn->flicker_filter_adaptive)
1369                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1370
1371         if (intel_sdvo_conn->tv_chroma_filter)
1372                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1373
1374         if (intel_sdvo_conn->tv_luma_filter)
1375                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1376
1377         if (intel_sdvo_conn->dot_crawl)
1378                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1379
1380 #undef UPDATE_PROPERTY
1381 }
1382
1383 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1384                                   const struct intel_crtc_state *crtc_state,
1385                                   const struct drm_connector_state *conn_state)
1386 {
1387         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1388         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1389         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1390         const struct intel_sdvo_connector_state *sdvo_state =
1391                 to_intel_sdvo_connector_state(conn_state);
1392         const struct intel_sdvo_connector *intel_sdvo_connector =
1393                 to_intel_sdvo_connector(conn_state->connector);
1394         const struct drm_display_mode *mode = &crtc_state->base.mode;
1395         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1396         u32 sdvox;
1397         struct intel_sdvo_in_out_map in_out;
1398         struct intel_sdvo_dtd input_dtd, output_dtd;
1399         int rate;
1400
1401         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1402
1403         /*
1404          * First, set the input mapping for the first input to our controlled
1405          * output. This is only correct if we're a single-input device, in
1406          * which case the first input is the output from the appropriate SDVO
1407          * channel on the motherboard.  In a two-input device, the first input
1408          * will be SDVOB and the second SDVOC.
1409          */
1410         in_out.in0 = intel_sdvo->attached_output;
1411         in_out.in1 = 0;
1412
1413         intel_sdvo_set_value(intel_sdvo,
1414                              SDVO_CMD_SET_IN_OUT_MAP,
1415                              &in_out, sizeof(in_out));
1416
1417         /* Set the output timings to the screen */
1418         if (!intel_sdvo_set_target_output(intel_sdvo,
1419                                           intel_sdvo->attached_output))
1420                 return;
1421
1422         /* lvds has a special fixed output timing. */
1423         if (IS_LVDS(intel_sdvo_connector))
1424                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1425                                              intel_sdvo_connector->base.panel.fixed_mode);
1426         else
1427                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1428         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1429                 DRM_INFO("Setting output timings on %s failed\n",
1430                          SDVO_NAME(intel_sdvo));
1431
1432         /* Set the input timing to the screen. Assume always input 0. */
1433         if (!intel_sdvo_set_target_input(intel_sdvo))
1434                 return;
1435
1436         if (crtc_state->has_hdmi_sink) {
1437                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1438                 intel_sdvo_set_colorimetry(intel_sdvo,
1439                                            SDVO_COLORIMETRY_RGB256);
1440                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1441         } else
1442                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1443
1444         if (IS_TV(intel_sdvo_connector) &&
1445             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1446                 return;
1447
1448         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1449
1450         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1451                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1452         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1453                 DRM_INFO("Setting input timings on %s failed\n",
1454                          SDVO_NAME(intel_sdvo));
1455
1456         switch (crtc_state->pixel_multiplier) {
1457         default:
1458                 WARN(1, "unknown pixel multiplier specified\n");
1459                 /* fall through */
1460         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1461         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1462         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1463         }
1464         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1465                 return;
1466
1467         /* Set the SDVO control regs. */
1468         if (INTEL_GEN(dev_priv) >= 4) {
1469                 /* The real mode polarity is set by the SDVO commands, using
1470                  * struct intel_sdvo_dtd. */
1471                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1472                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1473                         sdvox |= HDMI_COLOR_RANGE_16_235;
1474                 if (INTEL_GEN(dev_priv) < 5)
1475                         sdvox |= SDVO_BORDER_ENABLE;
1476         } else {
1477                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1478                 if (intel_sdvo->port == PORT_B)
1479                         sdvox &= SDVOB_PRESERVE_MASK;
1480                 else
1481                         sdvox &= SDVOC_PRESERVE_MASK;
1482                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1483         }
1484
1485         if (HAS_PCH_CPT(dev_priv))
1486                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1487         else
1488                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1489
1490         if (crtc_state->has_audio) {
1491                 WARN_ON_ONCE(INTEL_GEN(dev_priv) < 4);
1492                 sdvox |= SDVO_AUDIO_ENABLE;
1493         }
1494
1495         if (INTEL_GEN(dev_priv) >= 4) {
1496                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1497         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1498                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1499                 /* done in crtc_mode_set as it lives inside the dpll register */
1500         } else {
1501                 sdvox |= (crtc_state->pixel_multiplier - 1)
1502                         << SDVO_PORT_MULTIPLY_SHIFT;
1503         }
1504
1505         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1506             INTEL_GEN(dev_priv) < 5)
1507                 sdvox |= SDVO_STALL_SELECT;
1508         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1509 }
1510
1511 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1512 {
1513         struct intel_sdvo_connector *intel_sdvo_connector =
1514                 to_intel_sdvo_connector(&connector->base);
1515         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1516         u16 active_outputs = 0;
1517
1518         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1519
1520         return active_outputs & intel_sdvo_connector->output_flag;
1521 }
1522
1523 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1524                              i915_reg_t sdvo_reg, enum pipe *pipe)
1525 {
1526         u32 val;
1527
1528         val = I915_READ(sdvo_reg);
1529
1530         /* asserts want to know the pipe even if the port is disabled */
1531         if (HAS_PCH_CPT(dev_priv))
1532                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1533         else if (IS_CHERRYVIEW(dev_priv))
1534                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1535         else
1536                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1537
1538         return val & SDVO_ENABLE;
1539 }
1540
1541 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1542                                     enum pipe *pipe)
1543 {
1544         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1545         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1546         u16 active_outputs = 0;
1547         bool ret;
1548
1549         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1550
1551         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1552
1553         return ret || active_outputs;
1554 }
1555
1556 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1557                                   struct intel_crtc_state *pipe_config)
1558 {
1559         struct drm_device *dev = encoder->base.dev;
1560         struct drm_i915_private *dev_priv = to_i915(dev);
1561         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1562         struct intel_sdvo_dtd dtd;
1563         int encoder_pixel_multiplier = 0;
1564         int dotclock;
1565         u32 flags = 0, sdvox;
1566         u8 val;
1567         bool ret;
1568
1569         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1570
1571         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1572
1573         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1574         if (!ret) {
1575                 /*
1576                  * Some sdvo encoders are not spec compliant and don't
1577                  * implement the mandatory get_timings function.
1578                  */
1579                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1580                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1581         } else {
1582                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1583                         flags |= DRM_MODE_FLAG_PHSYNC;
1584                 else
1585                         flags |= DRM_MODE_FLAG_NHSYNC;
1586
1587                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1588                         flags |= DRM_MODE_FLAG_PVSYNC;
1589                 else
1590                         flags |= DRM_MODE_FLAG_NVSYNC;
1591         }
1592
1593         pipe_config->base.adjusted_mode.flags |= flags;
1594
1595         /*
1596          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1597          * the sdvo port register, on all other platforms it is part of the dpll
1598          * state. Since the general pipe state readout happens before the
1599          * encoder->get_config we so already have a valid pixel multplier on all
1600          * other platfroms.
1601          */
1602         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1603                 pipe_config->pixel_multiplier =
1604                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1605                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1606         }
1607
1608         dotclock = pipe_config->port_clock;
1609
1610         if (pipe_config->pixel_multiplier)
1611                 dotclock /= pipe_config->pixel_multiplier;
1612
1613         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1614
1615         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1616         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1617                                  &val, 1)) {
1618                 switch (val) {
1619                 case SDVO_CLOCK_RATE_MULT_1X:
1620                         encoder_pixel_multiplier = 1;
1621                         break;
1622                 case SDVO_CLOCK_RATE_MULT_2X:
1623                         encoder_pixel_multiplier = 2;
1624                         break;
1625                 case SDVO_CLOCK_RATE_MULT_4X:
1626                         encoder_pixel_multiplier = 4;
1627                         break;
1628                 }
1629         }
1630
1631         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1632              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1633              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1634
1635         if (sdvox & HDMI_COLOR_RANGE_16_235)
1636                 pipe_config->limited_color_range = true;
1637
1638         if (sdvox & SDVO_AUDIO_ENABLE)
1639                 pipe_config->has_audio = true;
1640
1641         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1642                                  &val, 1)) {
1643                 if (val == SDVO_ENCODE_HDMI)
1644                         pipe_config->has_hdmi_sink = true;
1645         }
1646
1647         intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
1648 }
1649
1650 static void intel_disable_sdvo(struct intel_encoder *encoder,
1651                                const struct intel_crtc_state *old_crtc_state,
1652                                const struct drm_connector_state *conn_state)
1653 {
1654         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1655         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1656         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
1657         u32 temp;
1658
1659         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1660         if (0)
1661                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1662                                                    DRM_MODE_DPMS_OFF);
1663
1664         temp = I915_READ(intel_sdvo->sdvo_reg);
1665
1666         temp &= ~SDVO_ENABLE;
1667         intel_sdvo_write_sdvox(intel_sdvo, temp);
1668
1669         /*
1670          * HW workaround for IBX, we need to move the port
1671          * to transcoder A after disabling it to allow the
1672          * matching DP port to be enabled on transcoder A.
1673          */
1674         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1675                 /*
1676                  * We get CPU/PCH FIFO underruns on the other pipe when
1677                  * doing the workaround. Sweep them under the rug.
1678                  */
1679                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1680                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1681
1682                 temp &= ~SDVO_PIPE_SEL_MASK;
1683                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1684                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1685
1686                 temp &= ~SDVO_ENABLE;
1687                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1688
1689                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1690                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1691                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1692         }
1693 }
1694
1695 static void pch_disable_sdvo(struct intel_encoder *encoder,
1696                              const struct intel_crtc_state *old_crtc_state,
1697                              const struct drm_connector_state *old_conn_state)
1698 {
1699 }
1700
1701 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1702                                   const struct intel_crtc_state *old_crtc_state,
1703                                   const struct drm_connector_state *old_conn_state)
1704 {
1705         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1706 }
1707
1708 static void intel_enable_sdvo(struct intel_encoder *encoder,
1709                               const struct intel_crtc_state *pipe_config,
1710                               const struct drm_connector_state *conn_state)
1711 {
1712         struct drm_device *dev = encoder->base.dev;
1713         struct drm_i915_private *dev_priv = to_i915(dev);
1714         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1715         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
1716         u32 temp;
1717         bool input1, input2;
1718         int i;
1719         bool success;
1720
1721         temp = I915_READ(intel_sdvo->sdvo_reg);
1722         temp |= SDVO_ENABLE;
1723         intel_sdvo_write_sdvox(intel_sdvo, temp);
1724
1725         for (i = 0; i < 2; i++)
1726                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1727
1728         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1729         /*
1730          * Warn if the device reported failure to sync.
1731          *
1732          * A lot of SDVO devices fail to notify of sync, but it's
1733          * a given it the status is a success, we succeeded.
1734          */
1735         if (success && !input1) {
1736                 DRM_DEBUG_KMS("First %s output reported failure to "
1737                                 "sync\n", SDVO_NAME(intel_sdvo));
1738         }
1739
1740         if (0)
1741                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1742                                                    DRM_MODE_DPMS_ON);
1743         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1744 }
1745
1746 static enum drm_mode_status
1747 intel_sdvo_mode_valid(struct drm_connector *connector,
1748                       struct drm_display_mode *mode)
1749 {
1750         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1751         struct intel_sdvo_connector *intel_sdvo_connector =
1752                 to_intel_sdvo_connector(connector);
1753         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1754
1755         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1756                 return MODE_NO_DBLESCAN;
1757
1758         if (intel_sdvo->pixel_clock_min > mode->clock)
1759                 return MODE_CLOCK_LOW;
1760
1761         if (intel_sdvo->pixel_clock_max < mode->clock)
1762                 return MODE_CLOCK_HIGH;
1763
1764         if (mode->clock > max_dotclk)
1765                 return MODE_CLOCK_HIGH;
1766
1767         if (IS_LVDS(intel_sdvo_connector)) {
1768                 const struct drm_display_mode *fixed_mode =
1769                         intel_sdvo_connector->base.panel.fixed_mode;
1770
1771                 if (mode->hdisplay > fixed_mode->hdisplay)
1772                         return MODE_PANEL;
1773
1774                 if (mode->vdisplay > fixed_mode->vdisplay)
1775                         return MODE_PANEL;
1776         }
1777
1778         return MODE_OK;
1779 }
1780
1781 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1782 {
1783         BUILD_BUG_ON(sizeof(*caps) != 8);
1784         if (!intel_sdvo_get_value(intel_sdvo,
1785                                   SDVO_CMD_GET_DEVICE_CAPS,
1786                                   caps, sizeof(*caps)))
1787                 return false;
1788
1789         DRM_DEBUG_KMS("SDVO capabilities:\n"
1790                       "  vendor_id: %d\n"
1791                       "  device_id: %d\n"
1792                       "  device_rev_id: %d\n"
1793                       "  sdvo_version_major: %d\n"
1794                       "  sdvo_version_minor: %d\n"
1795                       "  sdvo_inputs_mask: %d\n"
1796                       "  smooth_scaling: %d\n"
1797                       "  sharp_scaling: %d\n"
1798                       "  up_scaling: %d\n"
1799                       "  down_scaling: %d\n"
1800                       "  stall_support: %d\n"
1801                       "  output_flags: %d\n",
1802                       caps->vendor_id,
1803                       caps->device_id,
1804                       caps->device_rev_id,
1805                       caps->sdvo_version_major,
1806                       caps->sdvo_version_minor,
1807                       caps->sdvo_inputs_mask,
1808                       caps->smooth_scaling,
1809                       caps->sharp_scaling,
1810                       caps->up_scaling,
1811                       caps->down_scaling,
1812                       caps->stall_support,
1813                       caps->output_flags);
1814
1815         return true;
1816 }
1817
1818 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1819 {
1820         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1821         u16 hotplug;
1822
1823         if (!I915_HAS_HOTPLUG(dev_priv))
1824                 return 0;
1825
1826         /*
1827          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1828          * on the line.
1829          */
1830         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1831                 return 0;
1832
1833         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1834                                         &hotplug, sizeof(hotplug)))
1835                 return 0;
1836
1837         return hotplug;
1838 }
1839
1840 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1841 {
1842         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1843
1844         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1845                              &intel_sdvo->hotplug_active, 2);
1846 }
1847
1848 static bool intel_sdvo_hotplug(struct intel_encoder *encoder,
1849                                struct intel_connector *connector)
1850 {
1851         intel_sdvo_enable_hotplug(encoder);
1852
1853         return intel_encoder_hotplug(encoder, connector);
1854 }
1855
1856 static bool
1857 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1858 {
1859         /* Is there more than one type of output? */
1860         return hweight16(intel_sdvo->caps.output_flags) > 1;
1861 }
1862
1863 static struct edid *
1864 intel_sdvo_get_edid(struct drm_connector *connector)
1865 {
1866         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1867         return drm_get_edid(connector, &sdvo->ddc);
1868 }
1869
1870 /* Mac mini hack -- use the same DDC as the analog connector */
1871 static struct edid *
1872 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1873 {
1874         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1875
1876         return drm_get_edid(connector,
1877                             intel_gmbus_get_adapter(dev_priv,
1878                                                     dev_priv->vbt.crt_ddc_pin));
1879 }
1880
1881 static enum drm_connector_status
1882 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1883 {
1884         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1885         struct intel_sdvo_connector *intel_sdvo_connector =
1886                 to_intel_sdvo_connector(connector);
1887         enum drm_connector_status status;
1888         struct edid *edid;
1889
1890         edid = intel_sdvo_get_edid(connector);
1891
1892         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1893                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1894
1895                 /*
1896                  * Don't use the 1 as the argument of DDC bus switch to get
1897                  * the EDID. It is used for SDVO SPD ROM.
1898                  */
1899                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1900                         intel_sdvo->ddc_bus = ddc;
1901                         edid = intel_sdvo_get_edid(connector);
1902                         if (edid)
1903                                 break;
1904                 }
1905                 /*
1906                  * If we found the EDID on the other bus,
1907                  * assume that is the correct DDC bus.
1908                  */
1909                 if (edid == NULL)
1910                         intel_sdvo->ddc_bus = saved_ddc;
1911         }
1912
1913         /*
1914          * When there is no edid and no monitor is connected with VGA
1915          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1916          */
1917         if (edid == NULL)
1918                 edid = intel_sdvo_get_analog_edid(connector);
1919
1920         status = connector_status_unknown;
1921         if (edid != NULL) {
1922                 /* DDC bus is shared, match EDID to connector type */
1923                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1924                         status = connector_status_connected;
1925                         if (intel_sdvo_connector->is_hdmi) {
1926                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1927                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1928                         }
1929                 } else
1930                         status = connector_status_disconnected;
1931                 kfree(edid);
1932         }
1933
1934         return status;
1935 }
1936
1937 static bool
1938 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1939                                   struct edid *edid)
1940 {
1941         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1942         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1943
1944         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1945                       connector_is_digital, monitor_is_digital);
1946         return connector_is_digital == monitor_is_digital;
1947 }
1948
1949 static enum drm_connector_status
1950 intel_sdvo_detect(struct drm_connector *connector, bool force)
1951 {
1952         u16 response;
1953         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1954         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1955         enum drm_connector_status ret;
1956
1957         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1958                       connector->base.id, connector->name);
1959
1960         if (!intel_sdvo_get_value(intel_sdvo,
1961                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1962                                   &response, 2))
1963                 return connector_status_unknown;
1964
1965         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1966                       response & 0xff, response >> 8,
1967                       intel_sdvo_connector->output_flag);
1968
1969         if (response == 0)
1970                 return connector_status_disconnected;
1971
1972         intel_sdvo->attached_output = response;
1973
1974         intel_sdvo->has_hdmi_monitor = false;
1975         intel_sdvo->has_hdmi_audio = false;
1976
1977         if ((intel_sdvo_connector->output_flag & response) == 0)
1978                 ret = connector_status_disconnected;
1979         else if (IS_TMDS(intel_sdvo_connector))
1980                 ret = intel_sdvo_tmds_sink_detect(connector);
1981         else {
1982                 struct edid *edid;
1983
1984                 /* if we have an edid check it matches the connection */
1985                 edid = intel_sdvo_get_edid(connector);
1986                 if (edid == NULL)
1987                         edid = intel_sdvo_get_analog_edid(connector);
1988                 if (edid != NULL) {
1989                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1990                                                               edid))
1991                                 ret = connector_status_connected;
1992                         else
1993                                 ret = connector_status_disconnected;
1994
1995                         kfree(edid);
1996                 } else
1997                         ret = connector_status_connected;
1998         }
1999
2000         return ret;
2001 }
2002
2003 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
2004 {
2005         struct edid *edid;
2006
2007         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2008                       connector->base.id, connector->name);
2009
2010         /* set the bus switch and get the modes */
2011         edid = intel_sdvo_get_edid(connector);
2012
2013         /*
2014          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
2015          * link between analog and digital outputs. So, if the regular SDVO
2016          * DDC fails, check to see if the analog output is disconnected, in
2017          * which case we'll look there for the digital DDC data.
2018          */
2019         if (edid == NULL)
2020                 edid = intel_sdvo_get_analog_edid(connector);
2021
2022         if (edid != NULL) {
2023                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
2024                                                       edid)) {
2025                         drm_connector_update_edid_property(connector, edid);
2026                         drm_add_edid_modes(connector, edid);
2027                 }
2028
2029                 kfree(edid);
2030         }
2031 }
2032
2033 /*
2034  * Set of SDVO TV modes.
2035  * Note!  This is in reply order (see loop in get_tv_modes).
2036  * XXX: all 60Hz refresh?
2037  */
2038 static const struct drm_display_mode sdvo_tv_modes[] = {
2039         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
2040                    416, 0, 200, 201, 232, 233, 0,
2041                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2042         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
2043                    416, 0, 240, 241, 272, 273, 0,
2044                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2045         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
2046                    496, 0, 300, 301, 332, 333, 0,
2047                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2048         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
2049                    736, 0, 350, 351, 382, 383, 0,
2050                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2051         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
2052                    736, 0, 400, 401, 432, 433, 0,
2053                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2054         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
2055                    736, 0, 480, 481, 512, 513, 0,
2056                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2057         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
2058                    800, 0, 480, 481, 512, 513, 0,
2059                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2060         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
2061                    800, 0, 576, 577, 608, 609, 0,
2062                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2063         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
2064                    816, 0, 350, 351, 382, 383, 0,
2065                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2066         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
2067                    816, 0, 400, 401, 432, 433, 0,
2068                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2069         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
2070                    816, 0, 480, 481, 512, 513, 0,
2071                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2072         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
2073                    816, 0, 540, 541, 572, 573, 0,
2074                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2075         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
2076                    816, 0, 576, 577, 608, 609, 0,
2077                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2078         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
2079                    864, 0, 576, 577, 608, 609, 0,
2080                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2081         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
2082                    896, 0, 600, 601, 632, 633, 0,
2083                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2084         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
2085                    928, 0, 624, 625, 656, 657, 0,
2086                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2087         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
2088                    1016, 0, 766, 767, 798, 799, 0,
2089                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2090         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
2091                    1120, 0, 768, 769, 800, 801, 0,
2092                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2093         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
2094                    1376, 0, 1024, 1025, 1056, 1057, 0,
2095                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2096 };
2097
2098 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
2099 {
2100         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2101         const struct drm_connector_state *conn_state = connector->state;
2102         struct intel_sdvo_sdtv_resolution_request tv_res;
2103         u32 reply = 0, format_map = 0;
2104         int i;
2105
2106         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2107                       connector->base.id, connector->name);
2108
2109         /*
2110          * Read the list of supported input resolutions for the selected TV
2111          * format.
2112          */
2113         format_map = 1 << conn_state->tv.mode;
2114         memcpy(&tv_res, &format_map,
2115                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2116
2117         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
2118                 return;
2119
2120         BUILD_BUG_ON(sizeof(tv_res) != 3);
2121         if (!intel_sdvo_write_cmd(intel_sdvo,
2122                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2123                                   &tv_res, sizeof(tv_res)))
2124                 return;
2125         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2126                 return;
2127
2128         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
2129                 if (reply & (1 << i)) {
2130                         struct drm_display_mode *nmode;
2131                         nmode = drm_mode_duplicate(connector->dev,
2132                                                    &sdvo_tv_modes[i]);
2133                         if (nmode)
2134                                 drm_mode_probed_add(connector, nmode);
2135                 }
2136 }
2137
2138 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2139 {
2140         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2141         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2142         struct drm_display_mode *newmode;
2143
2144         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2145                       connector->base.id, connector->name);
2146
2147         /*
2148          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2149          * SDVO->LVDS transcoders can't cope with the EDID mode.
2150          */
2151         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2152                 newmode = drm_mode_duplicate(connector->dev,
2153                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
2154                 if (newmode != NULL) {
2155                         /* Guarantee the mode is preferred */
2156                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
2157                                          DRM_MODE_TYPE_DRIVER);
2158                         drm_mode_probed_add(connector, newmode);
2159                 }
2160         }
2161
2162         /*
2163          * Attempt to get the mode list from DDC.
2164          * Assume that the preferred modes are
2165          * arranged in priority order.
2166          */
2167         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2168 }
2169
2170 static int intel_sdvo_get_modes(struct drm_connector *connector)
2171 {
2172         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2173
2174         if (IS_TV(intel_sdvo_connector))
2175                 intel_sdvo_get_tv_modes(connector);
2176         else if (IS_LVDS(intel_sdvo_connector))
2177                 intel_sdvo_get_lvds_modes(connector);
2178         else
2179                 intel_sdvo_get_ddc_modes(connector);
2180
2181         return !list_empty(&connector->probed_modes);
2182 }
2183
2184 static int
2185 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2186                                          const struct drm_connector_state *state,
2187                                          struct drm_property *property,
2188                                          u64 *val)
2189 {
2190         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2191         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2192
2193         if (property == intel_sdvo_connector->tv_format) {
2194                 int i;
2195
2196                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2197                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2198                                 *val = i;
2199
2200                                 return 0;
2201                         }
2202
2203                 WARN_ON(1);
2204                 *val = 0;
2205         } else if (property == intel_sdvo_connector->top ||
2206                    property == intel_sdvo_connector->bottom)
2207                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2208         else if (property == intel_sdvo_connector->left ||
2209                  property == intel_sdvo_connector->right)
2210                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2211         else if (property == intel_sdvo_connector->hpos)
2212                 *val = sdvo_state->tv.hpos;
2213         else if (property == intel_sdvo_connector->vpos)
2214                 *val = sdvo_state->tv.vpos;
2215         else if (property == intel_sdvo_connector->saturation)
2216                 *val = state->tv.saturation;
2217         else if (property == intel_sdvo_connector->contrast)
2218                 *val = state->tv.contrast;
2219         else if (property == intel_sdvo_connector->hue)
2220                 *val = state->tv.hue;
2221         else if (property == intel_sdvo_connector->brightness)
2222                 *val = state->tv.brightness;
2223         else if (property == intel_sdvo_connector->sharpness)
2224                 *val = sdvo_state->tv.sharpness;
2225         else if (property == intel_sdvo_connector->flicker_filter)
2226                 *val = sdvo_state->tv.flicker_filter;
2227         else if (property == intel_sdvo_connector->flicker_filter_2d)
2228                 *val = sdvo_state->tv.flicker_filter_2d;
2229         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2230                 *val = sdvo_state->tv.flicker_filter_adaptive;
2231         else if (property == intel_sdvo_connector->tv_chroma_filter)
2232                 *val = sdvo_state->tv.chroma_filter;
2233         else if (property == intel_sdvo_connector->tv_luma_filter)
2234                 *val = sdvo_state->tv.luma_filter;
2235         else if (property == intel_sdvo_connector->dot_crawl)
2236                 *val = sdvo_state->tv.dot_crawl;
2237         else
2238                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2239
2240         return 0;
2241 }
2242
2243 static int
2244 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2245                                          struct drm_connector_state *state,
2246                                          struct drm_property *property,
2247                                          u64 val)
2248 {
2249         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2250         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2251
2252         if (property == intel_sdvo_connector->tv_format) {
2253                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2254
2255                 if (state->crtc) {
2256                         struct drm_crtc_state *crtc_state =
2257                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2258
2259                         crtc_state->connectors_changed = true;
2260                 }
2261         } else if (property == intel_sdvo_connector->top ||
2262                    property == intel_sdvo_connector->bottom)
2263                 /* Cannot set these independent from each other */
2264                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2265         else if (property == intel_sdvo_connector->left ||
2266                  property == intel_sdvo_connector->right)
2267                 /* Cannot set these independent from each other */
2268                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2269         else if (property == intel_sdvo_connector->hpos)
2270                 sdvo_state->tv.hpos = val;
2271         else if (property == intel_sdvo_connector->vpos)
2272                 sdvo_state->tv.vpos = val;
2273         else if (property == intel_sdvo_connector->saturation)
2274                 state->tv.saturation = val;
2275         else if (property == intel_sdvo_connector->contrast)
2276                 state->tv.contrast = val;
2277         else if (property == intel_sdvo_connector->hue)
2278                 state->tv.hue = val;
2279         else if (property == intel_sdvo_connector->brightness)
2280                 state->tv.brightness = val;
2281         else if (property == intel_sdvo_connector->sharpness)
2282                 sdvo_state->tv.sharpness = val;
2283         else if (property == intel_sdvo_connector->flicker_filter)
2284                 sdvo_state->tv.flicker_filter = val;
2285         else if (property == intel_sdvo_connector->flicker_filter_2d)
2286                 sdvo_state->tv.flicker_filter_2d = val;
2287         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2288                 sdvo_state->tv.flicker_filter_adaptive = val;
2289         else if (property == intel_sdvo_connector->tv_chroma_filter)
2290                 sdvo_state->tv.chroma_filter = val;
2291         else if (property == intel_sdvo_connector->tv_luma_filter)
2292                 sdvo_state->tv.luma_filter = val;
2293         else if (property == intel_sdvo_connector->dot_crawl)
2294                 sdvo_state->tv.dot_crawl = val;
2295         else
2296                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2297
2298         return 0;
2299 }
2300
2301 static int
2302 intel_sdvo_connector_register(struct drm_connector *connector)
2303 {
2304         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2305         int ret;
2306
2307         ret = intel_connector_register(connector);
2308         if (ret)
2309                 return ret;
2310
2311         return sysfs_create_link(&connector->kdev->kobj,
2312                                  &sdvo->ddc.dev.kobj,
2313                                  sdvo->ddc.dev.kobj.name);
2314 }
2315
2316 static void
2317 intel_sdvo_connector_unregister(struct drm_connector *connector)
2318 {
2319         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2320
2321         sysfs_remove_link(&connector->kdev->kobj,
2322                           sdvo->ddc.dev.kobj.name);
2323         intel_connector_unregister(connector);
2324 }
2325
2326 static struct drm_connector_state *
2327 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2328 {
2329         struct intel_sdvo_connector_state *state;
2330
2331         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2332         if (!state)
2333                 return NULL;
2334
2335         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2336         return &state->base.base;
2337 }
2338
2339 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2340         .detect = intel_sdvo_detect,
2341         .fill_modes = drm_helper_probe_single_connector_modes,
2342         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2343         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2344         .late_register = intel_sdvo_connector_register,
2345         .early_unregister = intel_sdvo_connector_unregister,
2346         .destroy = intel_connector_destroy,
2347         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2348         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2349 };
2350
2351 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2352                                    struct drm_connector_state *new_conn_state)
2353 {
2354         struct drm_atomic_state *state = new_conn_state->state;
2355         struct drm_connector_state *old_conn_state =
2356                 drm_atomic_get_old_connector_state(state, conn);
2357         struct intel_sdvo_connector_state *old_state =
2358                 to_intel_sdvo_connector_state(old_conn_state);
2359         struct intel_sdvo_connector_state *new_state =
2360                 to_intel_sdvo_connector_state(new_conn_state);
2361
2362         if (new_conn_state->crtc &&
2363             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2364              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2365                 struct drm_crtc_state *crtc_state =
2366                         drm_atomic_get_new_crtc_state(new_conn_state->state,
2367                                                       new_conn_state->crtc);
2368
2369                 crtc_state->connectors_changed = true;
2370         }
2371
2372         return intel_digital_connector_atomic_check(conn, new_conn_state);
2373 }
2374
2375 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2376         .get_modes = intel_sdvo_get_modes,
2377         .mode_valid = intel_sdvo_mode_valid,
2378         .atomic_check = intel_sdvo_atomic_check,
2379 };
2380
2381 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2382 {
2383         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2384
2385         i2c_del_adapter(&intel_sdvo->ddc);
2386         intel_encoder_destroy(encoder);
2387 }
2388
2389 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2390         .destroy = intel_sdvo_enc_destroy,
2391 };
2392
2393 static void
2394 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2395 {
2396         u16 mask = 0;
2397         unsigned int num_bits;
2398
2399         /*
2400          * Make a mask of outputs less than or equal to our own priority in the
2401          * list.
2402          */
2403         switch (sdvo->controlled_output) {
2404         case SDVO_OUTPUT_LVDS1:
2405                 mask |= SDVO_OUTPUT_LVDS1;
2406                 /* fall through */
2407         case SDVO_OUTPUT_LVDS0:
2408                 mask |= SDVO_OUTPUT_LVDS0;
2409                 /* fall through */
2410         case SDVO_OUTPUT_TMDS1:
2411                 mask |= SDVO_OUTPUT_TMDS1;
2412                 /* fall through */
2413         case SDVO_OUTPUT_TMDS0:
2414                 mask |= SDVO_OUTPUT_TMDS0;
2415                 /* fall through */
2416         case SDVO_OUTPUT_RGB1:
2417                 mask |= SDVO_OUTPUT_RGB1;
2418                 /* fall through */
2419         case SDVO_OUTPUT_RGB0:
2420                 mask |= SDVO_OUTPUT_RGB0;
2421                 break;
2422         }
2423
2424         /* Count bits to find what number we are in the priority list. */
2425         mask &= sdvo->caps.output_flags;
2426         num_bits = hweight16(mask);
2427         /* If more than 3 outputs, default to DDC bus 3 for now. */
2428         if (num_bits > 3)
2429                 num_bits = 3;
2430
2431         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2432         sdvo->ddc_bus = 1 << num_bits;
2433 }
2434
2435 /*
2436  * Choose the appropriate DDC bus for control bus switch command for this
2437  * SDVO output based on the controlled output.
2438  *
2439  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2440  * outputs, then LVDS outputs.
2441  */
2442 static void
2443 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2444                           struct intel_sdvo *sdvo)
2445 {
2446         struct sdvo_device_mapping *mapping;
2447
2448         if (sdvo->port == PORT_B)
2449                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2450         else
2451                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2452
2453         if (mapping->initialized)
2454                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2455         else
2456                 intel_sdvo_guess_ddc_bus(sdvo);
2457 }
2458
2459 static void
2460 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2461                           struct intel_sdvo *sdvo)
2462 {
2463         struct sdvo_device_mapping *mapping;
2464         u8 pin;
2465
2466         if (sdvo->port == PORT_B)
2467                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2468         else
2469                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2470
2471         if (mapping->initialized &&
2472             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2473                 pin = mapping->i2c_pin;
2474         else
2475                 pin = GMBUS_PIN_DPB;
2476
2477         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2478
2479         /*
2480          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2481          * our code totally fails once we start using gmbus. Hence fall back to
2482          * bit banging for now.
2483          */
2484         intel_gmbus_force_bit(sdvo->i2c, true);
2485 }
2486
2487 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2488 static void
2489 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2490 {
2491         intel_gmbus_force_bit(sdvo->i2c, false);
2492 }
2493
2494 static bool
2495 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2496 {
2497         return intel_sdvo_check_supp_encode(intel_sdvo);
2498 }
2499
2500 static u8
2501 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2502                           struct intel_sdvo *sdvo)
2503 {
2504         struct sdvo_device_mapping *my_mapping, *other_mapping;
2505
2506         if (sdvo->port == PORT_B) {
2507                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2508                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2509         } else {
2510                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2511                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2512         }
2513
2514         /* If the BIOS described our SDVO device, take advantage of it. */
2515         if (my_mapping->slave_addr)
2516                 return my_mapping->slave_addr;
2517
2518         /*
2519          * If the BIOS only described a different SDVO device, use the
2520          * address that it isn't using.
2521          */
2522         if (other_mapping->slave_addr) {
2523                 if (other_mapping->slave_addr == 0x70)
2524                         return 0x72;
2525                 else
2526                         return 0x70;
2527         }
2528
2529         /*
2530          * No SDVO device info is found for another DVO port,
2531          * so use mapping assumption we had before BIOS parsing.
2532          */
2533         if (sdvo->port == PORT_B)
2534                 return 0x70;
2535         else
2536                 return 0x72;
2537 }
2538
2539 static int
2540 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2541                           struct intel_sdvo *encoder)
2542 {
2543         struct drm_connector *drm_connector;
2544         int ret;
2545
2546         drm_connector = &connector->base.base;
2547         ret = drm_connector_init(encoder->base.base.dev,
2548                            drm_connector,
2549                            &intel_sdvo_connector_funcs,
2550                            connector->base.base.connector_type);
2551         if (ret < 0)
2552                 return ret;
2553
2554         drm_connector_helper_add(drm_connector,
2555                                  &intel_sdvo_connector_helper_funcs);
2556
2557         connector->base.base.interlace_allowed = 1;
2558         connector->base.base.doublescan_allowed = 0;
2559         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2560         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2561
2562         intel_connector_attach_encoder(&connector->base, &encoder->base);
2563
2564         return 0;
2565 }
2566
2567 static void
2568 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2569                                struct intel_sdvo_connector *connector)
2570 {
2571         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2572
2573         intel_attach_force_audio_property(&connector->base.base);
2574         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2575                 intel_attach_broadcast_rgb_property(&connector->base.base);
2576         }
2577         intel_attach_aspect_ratio_property(&connector->base.base);
2578         connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2579 }
2580
2581 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2582 {
2583         struct intel_sdvo_connector *sdvo_connector;
2584         struct intel_sdvo_connector_state *conn_state;
2585
2586         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2587         if (!sdvo_connector)
2588                 return NULL;
2589
2590         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2591         if (!conn_state) {
2592                 kfree(sdvo_connector);
2593                 return NULL;
2594         }
2595
2596         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2597                                             &conn_state->base.base);
2598
2599         return sdvo_connector;
2600 }
2601
2602 static bool
2603 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2604 {
2605         struct drm_encoder *encoder = &intel_sdvo->base.base;
2606         struct drm_i915_private *dev_priv = to_i915(encoder->dev);
2607         struct drm_connector *connector;
2608         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2609         struct intel_connector *intel_connector;
2610         struct intel_sdvo_connector *intel_sdvo_connector;
2611
2612         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2613
2614         intel_sdvo_connector = intel_sdvo_connector_alloc();
2615         if (!intel_sdvo_connector)
2616                 return false;
2617
2618         if (device == 0) {
2619                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2620                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2621         } else if (device == 1) {
2622                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2623                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2624         }
2625
2626         intel_connector = &intel_sdvo_connector->base;
2627         connector = &intel_connector->base;
2628         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2629                 intel_sdvo_connector->output_flag) {
2630                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2631                 /*
2632                  * Some SDVO devices have one-shot hotplug interrupts.
2633                  * Ensure that they get re-enabled when an interrupt happens.
2634                  */
2635                 intel_encoder->hotplug = intel_sdvo_hotplug;
2636                 intel_sdvo_enable_hotplug(intel_encoder);
2637         } else {
2638                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2639         }
2640         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2641         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2642
2643         /* gen3 doesn't do the hdmi bits in the SDVO register */
2644         if (INTEL_GEN(dev_priv) >= 4 &&
2645             intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2646                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2647                 intel_sdvo_connector->is_hdmi = true;
2648         }
2649
2650         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2651                 kfree(intel_sdvo_connector);
2652                 return false;
2653         }
2654
2655         if (intel_sdvo_connector->is_hdmi)
2656                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2657
2658         return true;
2659 }
2660
2661 static bool
2662 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2663 {
2664         struct drm_encoder *encoder = &intel_sdvo->base.base;
2665         struct drm_connector *connector;
2666         struct intel_connector *intel_connector;
2667         struct intel_sdvo_connector *intel_sdvo_connector;
2668
2669         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2670
2671         intel_sdvo_connector = intel_sdvo_connector_alloc();
2672         if (!intel_sdvo_connector)
2673                 return false;
2674
2675         intel_connector = &intel_sdvo_connector->base;
2676         connector = &intel_connector->base;
2677         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2678         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2679
2680         intel_sdvo->controlled_output |= type;
2681         intel_sdvo_connector->output_flag = type;
2682
2683         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2684                 kfree(intel_sdvo_connector);
2685                 return false;
2686         }
2687
2688         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2689                 goto err;
2690
2691         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2692                 goto err;
2693
2694         return true;
2695
2696 err:
2697         intel_connector_destroy(connector);
2698         return false;
2699 }
2700
2701 static bool
2702 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2703 {
2704         struct drm_encoder *encoder = &intel_sdvo->base.base;
2705         struct drm_connector *connector;
2706         struct intel_connector *intel_connector;
2707         struct intel_sdvo_connector *intel_sdvo_connector;
2708
2709         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2710
2711         intel_sdvo_connector = intel_sdvo_connector_alloc();
2712         if (!intel_sdvo_connector)
2713                 return false;
2714
2715         intel_connector = &intel_sdvo_connector->base;
2716         connector = &intel_connector->base;
2717         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2718         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2719         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2720
2721         if (device == 0) {
2722                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2723                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2724         } else if (device == 1) {
2725                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2726                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2727         }
2728
2729         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2730                 kfree(intel_sdvo_connector);
2731                 return false;
2732         }
2733
2734         return true;
2735 }
2736
2737 static bool
2738 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2739 {
2740         struct drm_encoder *encoder = &intel_sdvo->base.base;
2741         struct drm_connector *connector;
2742         struct intel_connector *intel_connector;
2743         struct intel_sdvo_connector *intel_sdvo_connector;
2744         struct drm_display_mode *mode;
2745
2746         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2747
2748         intel_sdvo_connector = intel_sdvo_connector_alloc();
2749         if (!intel_sdvo_connector)
2750                 return false;
2751
2752         intel_connector = &intel_sdvo_connector->base;
2753         connector = &intel_connector->base;
2754         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2755         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2756
2757         if (device == 0) {
2758                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2759                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2760         } else if (device == 1) {
2761                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2762                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2763         }
2764
2765         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2766                 kfree(intel_sdvo_connector);
2767                 return false;
2768         }
2769
2770         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2771                 goto err;
2772
2773         intel_sdvo_get_lvds_modes(connector);
2774
2775         list_for_each_entry(mode, &connector->probed_modes, head) {
2776                 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
2777                         struct drm_display_mode *fixed_mode =
2778                                 drm_mode_duplicate(connector->dev, mode);
2779
2780                         intel_panel_init(&intel_connector->panel,
2781                                          fixed_mode, NULL);
2782                         break;
2783                 }
2784         }
2785
2786         if (!intel_connector->panel.fixed_mode)
2787                 goto err;
2788
2789         return true;
2790
2791 err:
2792         intel_connector_destroy(connector);
2793         return false;
2794 }
2795
2796 static bool
2797 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags)
2798 {
2799         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2800
2801         if (flags & SDVO_OUTPUT_TMDS0)
2802                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2803                         return false;
2804
2805         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2806                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2807                         return false;
2808
2809         /* TV has no XXX1 function block */
2810         if (flags & SDVO_OUTPUT_SVID0)
2811                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2812                         return false;
2813
2814         if (flags & SDVO_OUTPUT_CVBS0)
2815                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2816                         return false;
2817
2818         if (flags & SDVO_OUTPUT_YPRPB0)
2819                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2820                         return false;
2821
2822         if (flags & SDVO_OUTPUT_RGB0)
2823                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2824                         return false;
2825
2826         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2827                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2828                         return false;
2829
2830         if (flags & SDVO_OUTPUT_LVDS0)
2831                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2832                         return false;
2833
2834         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2835                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2836                         return false;
2837
2838         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2839                 unsigned char bytes[2];
2840
2841                 intel_sdvo->controlled_output = 0;
2842                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2843                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2844                               SDVO_NAME(intel_sdvo),
2845                               bytes[0], bytes[1]);
2846                 return false;
2847         }
2848         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2849
2850         return true;
2851 }
2852
2853 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2854 {
2855         struct drm_device *dev = intel_sdvo->base.base.dev;
2856         struct drm_connector *connector, *tmp;
2857
2858         list_for_each_entry_safe(connector, tmp,
2859                                  &dev->mode_config.connector_list, head) {
2860                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2861                         drm_connector_unregister(connector);
2862                         intel_connector_destroy(connector);
2863                 }
2864         }
2865 }
2866
2867 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2868                                           struct intel_sdvo_connector *intel_sdvo_connector,
2869                                           int type)
2870 {
2871         struct drm_device *dev = intel_sdvo->base.base.dev;
2872         struct intel_sdvo_tv_format format;
2873         u32 format_map, i;
2874
2875         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2876                 return false;
2877
2878         BUILD_BUG_ON(sizeof(format) != 6);
2879         if (!intel_sdvo_get_value(intel_sdvo,
2880                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2881                                   &format, sizeof(format)))
2882                 return false;
2883
2884         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2885
2886         if (format_map == 0)
2887                 return false;
2888
2889         intel_sdvo_connector->format_supported_num = 0;
2890         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2891                 if (format_map & (1 << i))
2892                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2893
2894
2895         intel_sdvo_connector->tv_format =
2896                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2897                                             "mode", intel_sdvo_connector->format_supported_num);
2898         if (!intel_sdvo_connector->tv_format)
2899                 return false;
2900
2901         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2902                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
2903                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2904
2905         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2906         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2907                                    intel_sdvo_connector->tv_format, 0);
2908         return true;
2909
2910 }
2911
2912 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2913         if (enhancements.name) { \
2914                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2915                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2916                         return false; \
2917                 intel_sdvo_connector->name = \
2918                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2919                 if (!intel_sdvo_connector->name) return false; \
2920                 state_assignment = response; \
2921                 drm_object_attach_property(&connector->base, \
2922                                            intel_sdvo_connector->name, 0); \
2923                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2924                               data_value[0], data_value[1], response); \
2925         } \
2926 } while (0)
2927
2928 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2929
2930 static bool
2931 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2932                                       struct intel_sdvo_connector *intel_sdvo_connector,
2933                                       struct intel_sdvo_enhancements_reply enhancements)
2934 {
2935         struct drm_device *dev = intel_sdvo->base.base.dev;
2936         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2937         struct drm_connector_state *conn_state = connector->state;
2938         struct intel_sdvo_connector_state *sdvo_state =
2939                 to_intel_sdvo_connector_state(conn_state);
2940         u16 response, data_value[2];
2941
2942         /* when horizontal overscan is supported, Add the left/right property */
2943         if (enhancements.overscan_h) {
2944                 if (!intel_sdvo_get_value(intel_sdvo,
2945                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2946                                           &data_value, 4))
2947                         return false;
2948
2949                 if (!intel_sdvo_get_value(intel_sdvo,
2950                                           SDVO_CMD_GET_OVERSCAN_H,
2951                                           &response, 2))
2952                         return false;
2953
2954                 sdvo_state->tv.overscan_h = response;
2955
2956                 intel_sdvo_connector->max_hscan = data_value[0];
2957                 intel_sdvo_connector->left =
2958                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2959                 if (!intel_sdvo_connector->left)
2960                         return false;
2961
2962                 drm_object_attach_property(&connector->base,
2963                                            intel_sdvo_connector->left, 0);
2964
2965                 intel_sdvo_connector->right =
2966                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2967                 if (!intel_sdvo_connector->right)
2968                         return false;
2969
2970                 drm_object_attach_property(&connector->base,
2971                                               intel_sdvo_connector->right, 0);
2972                 DRM_DEBUG_KMS("h_overscan: max %d, "
2973                               "default %d, current %d\n",
2974                               data_value[0], data_value[1], response);
2975         }
2976
2977         if (enhancements.overscan_v) {
2978                 if (!intel_sdvo_get_value(intel_sdvo,
2979                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2980                                           &data_value, 4))
2981                         return false;
2982
2983                 if (!intel_sdvo_get_value(intel_sdvo,
2984                                           SDVO_CMD_GET_OVERSCAN_V,
2985                                           &response, 2))
2986                         return false;
2987
2988                 sdvo_state->tv.overscan_v = response;
2989
2990                 intel_sdvo_connector->max_vscan = data_value[0];
2991                 intel_sdvo_connector->top =
2992                         drm_property_create_range(dev, 0,
2993                                             "top_margin", 0, data_value[0]);
2994                 if (!intel_sdvo_connector->top)
2995                         return false;
2996
2997                 drm_object_attach_property(&connector->base,
2998                                            intel_sdvo_connector->top, 0);
2999
3000                 intel_sdvo_connector->bottom =
3001                         drm_property_create_range(dev, 0,
3002                                             "bottom_margin", 0, data_value[0]);
3003                 if (!intel_sdvo_connector->bottom)
3004                         return false;
3005
3006                 drm_object_attach_property(&connector->base,
3007                                               intel_sdvo_connector->bottom, 0);
3008                 DRM_DEBUG_KMS("v_overscan: max %d, "
3009                               "default %d, current %d\n",
3010                               data_value[0], data_value[1], response);
3011         }
3012
3013         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
3014         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
3015         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
3016         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
3017         ENHANCEMENT(&conn_state->tv, hue, HUE);
3018         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
3019         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
3020         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
3021         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
3022         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
3023         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
3024         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
3025
3026         if (enhancements.dot_crawl) {
3027                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
3028                         return false;
3029
3030                 sdvo_state->tv.dot_crawl = response & 0x1;
3031                 intel_sdvo_connector->dot_crawl =
3032                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
3033                 if (!intel_sdvo_connector->dot_crawl)
3034                         return false;
3035
3036                 drm_object_attach_property(&connector->base,
3037                                            intel_sdvo_connector->dot_crawl, 0);
3038                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
3039         }
3040
3041         return true;
3042 }
3043
3044 static bool
3045 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
3046                                         struct intel_sdvo_connector *intel_sdvo_connector,
3047                                         struct intel_sdvo_enhancements_reply enhancements)
3048 {
3049         struct drm_device *dev = intel_sdvo->base.base.dev;
3050         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3051         u16 response, data_value[2];
3052
3053         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
3054
3055         return true;
3056 }
3057 #undef ENHANCEMENT
3058 #undef _ENHANCEMENT
3059
3060 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
3061                                                struct intel_sdvo_connector *intel_sdvo_connector)
3062 {
3063         union {
3064                 struct intel_sdvo_enhancements_reply reply;
3065                 u16 response;
3066         } enhancements;
3067
3068         BUILD_BUG_ON(sizeof(enhancements) != 2);
3069
3070         if (!intel_sdvo_get_value(intel_sdvo,
3071                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
3072                                   &enhancements, sizeof(enhancements)) ||
3073             enhancements.response == 0) {
3074                 DRM_DEBUG_KMS("No enhancement is supported\n");
3075                 return true;
3076         }
3077
3078         if (IS_TV(intel_sdvo_connector))
3079                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3080         else if (IS_LVDS(intel_sdvo_connector))
3081                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3082         else
3083                 return true;
3084 }
3085
3086 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
3087                                      struct i2c_msg *msgs,
3088                                      int num)
3089 {
3090         struct intel_sdvo *sdvo = adapter->algo_data;
3091
3092         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
3093                 return -EIO;
3094
3095         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
3096 }
3097
3098 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
3099 {
3100         struct intel_sdvo *sdvo = adapter->algo_data;
3101         return sdvo->i2c->algo->functionality(sdvo->i2c);
3102 }
3103
3104 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3105         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3106         .functionality  = intel_sdvo_ddc_proxy_func
3107 };
3108
3109 static void proxy_lock_bus(struct i2c_adapter *adapter,
3110                            unsigned int flags)
3111 {
3112         struct intel_sdvo *sdvo = adapter->algo_data;
3113         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3114 }
3115
3116 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3117                              unsigned int flags)
3118 {
3119         struct intel_sdvo *sdvo = adapter->algo_data;
3120         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3121 }
3122
3123 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3124                              unsigned int flags)
3125 {
3126         struct intel_sdvo *sdvo = adapter->algo_data;
3127         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3128 }
3129
3130 static const struct i2c_lock_operations proxy_lock_ops = {
3131         .lock_bus =    proxy_lock_bus,
3132         .trylock_bus = proxy_trylock_bus,
3133         .unlock_bus =  proxy_unlock_bus,
3134 };
3135
3136 static bool
3137 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3138                           struct drm_i915_private *dev_priv)
3139 {
3140         struct pci_dev *pdev = dev_priv->drm.pdev;
3141
3142         sdvo->ddc.owner = THIS_MODULE;
3143         sdvo->ddc.class = I2C_CLASS_DDC;
3144         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3145         sdvo->ddc.dev.parent = &pdev->dev;
3146         sdvo->ddc.algo_data = sdvo;
3147         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3148         sdvo->ddc.lock_ops = &proxy_lock_ops;
3149
3150         return i2c_add_adapter(&sdvo->ddc) == 0;
3151 }
3152
3153 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3154                                    enum port port)
3155 {
3156         if (HAS_PCH_SPLIT(dev_priv))
3157                 WARN_ON(port != PORT_B);
3158         else
3159                 WARN_ON(port != PORT_B && port != PORT_C);
3160 }
3161
3162 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3163                      i915_reg_t sdvo_reg, enum port port)
3164 {
3165         struct intel_encoder *intel_encoder;
3166         struct intel_sdvo *intel_sdvo;
3167         int i;
3168
3169         assert_sdvo_port_valid(dev_priv, port);
3170
3171         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3172         if (!intel_sdvo)
3173                 return false;
3174
3175         intel_sdvo->sdvo_reg = sdvo_reg;
3176         intel_sdvo->port = port;
3177         intel_sdvo->slave_addr =
3178                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3179         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3180         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3181                 goto err_i2c_bus;
3182
3183         /* encoder type will be decided later */
3184         intel_encoder = &intel_sdvo->base;
3185         intel_encoder->type = INTEL_OUTPUT_SDVO;
3186         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3187         intel_encoder->port = port;
3188         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3189                          &intel_sdvo_enc_funcs, 0,
3190                          "SDVO %c", port_name(port));
3191
3192         /* Read the regs to test if we can talk to the device */
3193         for (i = 0; i < 0x40; i++) {
3194                 u8 byte;
3195
3196                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3197                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
3198                                       SDVO_NAME(intel_sdvo));
3199                         goto err;
3200                 }
3201         }
3202
3203         intel_encoder->compute_config = intel_sdvo_compute_config;
3204         if (HAS_PCH_SPLIT(dev_priv)) {
3205                 intel_encoder->disable = pch_disable_sdvo;
3206                 intel_encoder->post_disable = pch_post_disable_sdvo;
3207         } else {
3208                 intel_encoder->disable = intel_disable_sdvo;
3209         }
3210         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3211         intel_encoder->enable = intel_enable_sdvo;
3212         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3213         intel_encoder->get_config = intel_sdvo_get_config;
3214
3215         /* In default case sdvo lvds is false */
3216         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3217                 goto err;
3218
3219         if (intel_sdvo_output_setup(intel_sdvo,
3220                                     intel_sdvo->caps.output_flags) != true) {
3221                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3222                               SDVO_NAME(intel_sdvo));
3223                 /* Output_setup can leave behind connectors! */
3224                 goto err_output;
3225         }
3226
3227         /*
3228          * Only enable the hotplug irq if we need it, to work around noisy
3229          * hotplug lines.
3230          */
3231         if (intel_sdvo->hotplug_active) {
3232                 if (intel_sdvo->port == PORT_B)
3233                         intel_encoder->hpd_pin = HPD_SDVO_B;
3234                 else
3235                         intel_encoder->hpd_pin = HPD_SDVO_C;
3236         }
3237
3238         /*
3239          * Cloning SDVO with anything is often impossible, since the SDVO
3240          * encoder can request a special input timing mode. And even if that's
3241          * not the case we have evidence that cloning a plain unscaled mode with
3242          * VGA doesn't really work. Furthermore the cloning flags are way too
3243          * simplistic anyway to express such constraints, so just give up on
3244          * cloning for SDVO encoders.
3245          */
3246         intel_sdvo->base.cloneable = 0;
3247
3248         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3249
3250         /* Set the input timing to the screen. Assume always input 0. */
3251         if (!intel_sdvo_set_target_input(intel_sdvo))
3252                 goto err_output;
3253
3254         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3255                                                     &intel_sdvo->pixel_clock_min,
3256                                                     &intel_sdvo->pixel_clock_max))
3257                 goto err_output;
3258
3259         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3260                         "clock range %dMHz - %dMHz, "
3261                         "input 1: %c, input 2: %c, "
3262                         "output 1: %c, output 2: %c\n",
3263                         SDVO_NAME(intel_sdvo),
3264                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3265                         intel_sdvo->caps.device_rev_id,
3266                         intel_sdvo->pixel_clock_min / 1000,
3267                         intel_sdvo->pixel_clock_max / 1000,
3268                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3269                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3270                         /* check currently supported outputs */
3271                         intel_sdvo->caps.output_flags &
3272                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3273                         intel_sdvo->caps.output_flags &
3274                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3275         return true;
3276
3277 err_output:
3278         intel_sdvo_output_cleanup(intel_sdvo);
3279
3280 err:
3281         drm_encoder_cleanup(&intel_encoder->base);
3282         i2c_del_adapter(&intel_sdvo->ddc);
3283 err_i2c_bus:
3284         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3285         kfree(intel_sdvo);
3286
3287         return false;
3288 }