drivers/gpu/drm/imx/imx-ldb.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX drm driver - LVDS display bridge
   4  *
   5  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/component.h>
  10 #include <linux/mfd/syscon.h>
  11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  12 #include <linux/module.h>
  13 #include <linux/of_device.h>
  14 #include <linux/of_graph.h>
  15 #include <linux/regmap.h>
  16 #include <linux/videodev2.h>
  17
  18 #include <video/of_display_timing.h>
  19 #include <video/of_videomode.h>
  20
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_fb_helper.h>
  24 #include <drm/drm_of.h>
  25 #include <drm/drm_panel.h>
  26 #include <drm/drm_print.h>
  27 #include <drm/drm_probe_helper.h>
  28
  29 #include "imx-drm.h"
  30
  31 #define DRIVER_NAME "imx-ldb"
  32
  33 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  34 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  35 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  36 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  37 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  38 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  39 #define LDB_SPLIT_MODE_EN               (1 << 4)
  40 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  41 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  42 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  43 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  44 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  45 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  46 #define LDB_BGREF_RMODE_INT             (1 << 15)
  47
  48 struct imx_ldb;
  49
  50 struct imx_ldb_channel {
  51         struct imx_ldb *ldb;
  52         struct drm_connector connector;
  53         struct drm_encoder encoder;
  54
  55         /* Defines what is connected to the ldb, only one at a time */
  56         struct drm_panel *panel;
  57         struct drm_bridge *bridge;
  58
  59         struct device_node *child;
  60         struct i2c_adapter *ddc;
  61         int chno;
  62         void *edid;
  63         int edid_len;
  64         struct drm_display_mode mode;
  65         int mode_valid;
  66         u32 bus_format;
  67         u32 bus_flags;
  68 };
  69
  70 static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
  71 {
  72         return container_of(c, struct imx_ldb_channel, connector);
  73 }
  74
  75 static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
  76 {
  77         return container_of(e, struct imx_ldb_channel, encoder);
  78 }
  79
  80 struct bus_mux {
  81         int reg;
  82         int shift;
  83         int mask;
  84 };
  85
  86 struct imx_ldb {
  87         struct regmap *regmap;
  88         struct device *dev;
  89         struct imx_ldb_channel channel[2];
  90         struct clk *clk[2]; /* our own clock */
  91         struct clk *clk_sel[4]; /* parent of display clock */
  92         struct clk *clk_parent[4]; /* original parent of clk_sel */
  93         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  94         u32 ldb_ctrl;
  95         const struct bus_mux *lvds_mux;
  96 };
  97
  98 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
  99                                       u32 bus_format)
 100 {
 101         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 102         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 103
 104         switch (bus_format) {
 105         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 106                 break;
 107         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 108                 if (imx_ldb_ch->chno == 0 || dual)
 109                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 110                 if (imx_ldb_ch->chno == 1 || dual)
 111                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 112                 break;
 113         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 114                 if (imx_ldb_ch->chno == 0 || dual)
 115                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 116                                          LDB_BIT_MAP_CH0_JEIDA;
 117                 if (imx_ldb_ch->chno == 1 || dual)
 118                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 119                                          LDB_BIT_MAP_CH1_JEIDA;
 120                 break;
 121         }
 122 }
 123
 124 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
 125 {
 126         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 127         int num_modes;
 128
 129         num_modes = drm_panel_get_modes(imx_ldb_ch->panel);
 130         if (num_modes > 0)
 131                 return num_modes;
 132
 133         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 134                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 135
 136         if (imx_ldb_ch->edid) {
 137                 drm_connector_update_edid_property(connector,
 138                                                         imx_ldb_ch->edid);
 139                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 140         }
 141
 142         if (imx_ldb_ch->mode_valid) {
 143                 struct drm_display_mode *mode;
 144
 145                 mode = drm_mode_create(connector->dev);
 146                 if (!mode)
 147                         return -EINVAL;
 148                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 149                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 150                 drm_mode_probed_add(connector, mode);
 151                 num_modes++;
 152         }
 153
 154         return num_modes;
 155 }
 156
 157 static struct drm_encoder *imx_ldb_connector_best_encoder(
 158                 struct drm_connector *connector)
 159 {
 160         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 161
 162         return &imx_ldb_ch->encoder;
 163 }
 164
 165 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 166                 unsigned long serial_clk, unsigned long di_clk)
 167 {
 168         int ret;
 169
 170         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 171                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 172         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 173
 174         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 175                         clk_get_rate(ldb->clk_pll[chno]));
 176
 177         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 178                         clk_get_rate(ldb->clk[chno]),
 179                         (long int)di_clk);
 180         clk_set_rate(ldb->clk[chno], di_clk);
 181
 182         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 183                         clk_get_rate(ldb->clk[chno]));
 184
 185         /* set display clock mux to LDB input clock */
 186         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 187         if (ret)
 188                 dev_err(ldb->dev,
 189                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 190                         chno);
 191 }
 192
 193 static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
 194 {
 195         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 196         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 197         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 198         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 199
 200         drm_panel_prepare(imx_ldb_ch->panel);
 201
 202         if (dual) {
 203                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
 204                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
 205
 206                 clk_prepare_enable(ldb->clk[0]);
 207                 clk_prepare_enable(ldb->clk[1]);
 208         } else {
 209                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
 210         }
 211
 212         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 213                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 214                 if (mux == 0 || ldb->lvds_mux)
 215                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 216                 else if (mux == 1)
 217                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 218         }
 219         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 220                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 221                 if (mux == 1 || ldb->lvds_mux)
 222                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 223                 else if (mux == 0)
 224                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 225         }
 226
 227         if (ldb->lvds_mux) {
 228                 const struct bus_mux *lvds_mux = NULL;
 229
 230                 if (imx_ldb_ch == &ldb->channel[0])
 231                         lvds_mux = &ldb->lvds_mux[0];
 232                 else if (imx_ldb_ch == &ldb->channel[1])
 233                         lvds_mux = &ldb->lvds_mux[1];
 234
 235                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 236                                    mux << lvds_mux->shift);
 237         }
 238
 239         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 240
 241         drm_panel_enable(imx_ldb_ch->panel);
 242 }
 243
 244 static void
 245 imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
 246                                 struct drm_crtc_state *crtc_state,
 247                                 struct drm_connector_state *connector_state)
 248 {
 249         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 250         struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 251         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 252         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 253         unsigned long serial_clk;
 254         unsigned long di_clk = mode->clock * 1000;
 255         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 256         u32 bus_format = imx_ldb_ch->bus_format;
 257
 258         if (mode->clock > 170000) {
 259                 dev_warn(ldb->dev,
 260                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 261         }
 262         if (mode->clock > 85000 && !dual) {
 263                 dev_warn(ldb->dev,
 264                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 265         }
 266
 267         if (dual) {
 268                 serial_clk = 3500UL * mode->clock;
 269                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 270                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 271         } else {
 272                 serial_clk = 7000UL * mode->clock;
 273                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 274                                   di_clk);
 275         }
 276
 277         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 278         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 279                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 280                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 281                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 282                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 283         }
 284         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 285                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 286                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 287                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 288                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 289         }
 290
 291         if (!bus_format) {
 292                 struct drm_connector *connector = connector_state->connector;
 293                 struct drm_display_info *di = &connector->display_info;
 294
 295                 if (di->num_bus_formats)
 296                         bus_format = di->bus_formats[0];
 297         }
 298         imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
 299 }
 300
 301 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 302 {
 303         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 304         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 305         int mux, ret;
 306
 307         drm_panel_disable(imx_ldb_ch->panel);
 308
 309         if (imx_ldb_ch == &ldb->channel[0])
 310                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 311         else if (imx_ldb_ch == &ldb->channel[1])
 312                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 313
 314         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 315
 316         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 317                 clk_disable_unprepare(ldb->clk[0]);
 318                 clk_disable_unprepare(ldb->clk[1]);
 319         }
 320
 321         if (ldb->lvds_mux) {
 322                 const struct bus_mux *lvds_mux = NULL;
 323
 324                 if (imx_ldb_ch == &ldb->channel[0])
 325                         lvds_mux = &ldb->lvds_mux[0];
 326                 else if (imx_ldb_ch == &ldb->channel[1])
 327                         lvds_mux = &ldb->lvds_mux[1];
 328
 329                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 330                 mux &= lvds_mux->mask;
 331                 mux >>= lvds_mux->shift;
 332         } else {
 333                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 334         }
 335
 336         /* set display clock mux back to original input clock */
 337         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 338         if (ret)
 339                 dev_err(ldb->dev,
 340                         "unable to set di%d parent clock to original parent\n",
 341                         mux);
 342
 343         drm_panel_unprepare(imx_ldb_ch->panel);
 344 }
 345
 346 static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 347                                         struct drm_crtc_state *crtc_state,
 348                                         struct drm_connector_state *conn_state)
 349 {
 350         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
 351         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 352         struct drm_display_info *di = &conn_state->connector->display_info;
 353         u32 bus_format = imx_ldb_ch->bus_format;
 354
 355         /* Bus format description in DT overrides connector display info. */
 356         if (!bus_format && di->num_bus_formats) {
 357                 bus_format = di->bus_formats[0];
 358                 imx_crtc_state->bus_flags = di->bus_flags;
 359         } else {
 360                 bus_format = imx_ldb_ch->bus_format;
 361                 imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
 362         }
 363         switch (bus_format) {
 364         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 365                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 366                 break;
 367         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 368         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 369                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 370                 break;
 371         default:
 372                 return -EINVAL;
 373         }
 374
 375         imx_crtc_state->di_hsync_pin = 2;
 376         imx_crtc_state->di_vsync_pin = 3;
 377
 378         return 0;
 379 }
 380
 381
 382 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 383         .fill_modes = drm_helper_probe_single_connector_modes,
 384         .destroy = imx_drm_connector_destroy,
 385         .reset = drm_atomic_helper_connector_reset,
 386         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 387         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 388 };
 389
 390 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 391         .get_modes = imx_ldb_connector_get_modes,
 392         .best_encoder = imx_ldb_connector_best_encoder,
 393 };
 394
 395 static const struct drm_encoder_funcs imx_ldb_encoder_funcs = {
 396         .destroy = imx_drm_encoder_destroy,
 397 };
 398
 399 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 400         .atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
 401         .enable = imx_ldb_encoder_enable,
 402         .disable = imx_ldb_encoder_disable,
 403         .atomic_check = imx_ldb_encoder_atomic_check,
 404 };
 405
 406 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 407 {
 408         char clkname[16];
 409
 410         snprintf(clkname, sizeof(clkname), "di%d", chno);
 411         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 412         if (IS_ERR(ldb->clk[chno]))
 413                 return PTR_ERR(ldb->clk[chno]);
 414
 415         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 416         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 417
 418         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 419 }
 420
 421 static int imx_ldb_register(struct drm_device *drm,
 422         struct imx_ldb_channel *imx_ldb_ch)
 423 {
 424         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 425         struct drm_encoder *encoder = &imx_ldb_ch->encoder;
 426         int ret;
 427
 428         ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
 429         if (ret)
 430                 return ret;
 431
 432         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 433         if (ret)
 434                 return ret;
 435
 436         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 437                 ret = imx_ldb_get_clk(ldb, 1);
 438                 if (ret)
 439                         return ret;
 440         }
 441
 442         drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
 443         drm_encoder_init(drm, encoder, &imx_ldb_encoder_funcs,
 444                          DRM_MODE_ENCODER_LVDS, NULL);
 445
 446         if (imx_ldb_ch->bridge) {
 447                 ret = drm_bridge_attach(&imx_ldb_ch->encoder,
 448                                         imx_ldb_ch->bridge, NULL);
 449                 if (ret) {
 450                         DRM_ERROR("Failed to initialize bridge with drm\n");
 451                         return ret;
 452                 }
 453         } else {
 454                 /*
 455                  * We want to add the connector whenever there is no bridge
 456                  * that brings its own, not only when there is a panel. For
 457                  * historical reasons, the ldb driver can also work without
 458                  * a panel.
 459                  */
 460                 drm_connector_helper_add(&imx_ldb_ch->connector,
 461                                 &imx_ldb_connector_helper_funcs);
 462                 drm_connector_init_with_ddc(drm, &imx_ldb_ch->connector,
 463                                             &imx_ldb_connector_funcs,
 464                                             DRM_MODE_CONNECTOR_LVDS,
 465                                             imx_ldb_ch->ddc);
 466                 drm_connector_attach_encoder(&imx_ldb_ch->connector, encoder);
 467         }
 468
 469         if (imx_ldb_ch->panel) {
 470                 ret = drm_panel_attach(imx_ldb_ch->panel,
 471                                        &imx_ldb_ch->connector);
 472                 if (ret)
 473                         return ret;
 474         }
 475
 476         return 0;
 477 }
 478
 479 enum {
 480         LVDS_BIT_MAP_SPWG,
 481         LVDS_BIT_MAP_JEIDA
 482 };
 483
 484 struct imx_ldb_bit_mapping {
 485         u32 bus_format;
 486         u32 datawidth;
 487         const char * const mapping;
 488 };
 489
 490 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 491         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 492         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 493         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 494 };
 495
 496 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 497 {
 498         const char *bm;
 499         u32 datawidth = 0;
 500         int ret, i;
 501
 502         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 503         if (ret < 0)
 504                 return ret;
 505
 506         of_property_read_u32(np, "fsl,data-width", &datawidth);
 507
 508         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 509                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 510                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 511                         return imx_ldb_bit_mappings[i].bus_format;
 512         }
 513
 514         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 515
 516         return -ENOENT;
 517 }
 518
 519 static struct bus_mux imx6q_lvds_mux[2] = {
 520         {
 521                 .reg = IOMUXC_GPR3,
 522                 .shift = 6,
 523                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 524         }, {
 525                 .reg = IOMUXC_GPR3,
 526                 .shift = 8,
 527                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 528         }
 529 };
 530
 531 /*
 532  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 533  * of_match_device will walk through this list and take the first entry
 534  * matching any of its compatible values. Therefore, the more generic
 535  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 536  */
 537 static const struct of_device_id imx_ldb_dt_ids[] = {
 538         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 539         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 540         { }
 541 };
 542 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 543
 544 static int imx_ldb_panel_ddc(struct device *dev,
 545                 struct imx_ldb_channel *channel, struct device_node *child)
 546 {
 547         struct device_node *ddc_node;
 548         const u8 *edidp;
 549         int ret;
 550
 551         ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 552         if (ddc_node) {
 553                 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 554                 of_node_put(ddc_node);
 555                 if (!channel->ddc) {
 556                         dev_warn(dev, "failed to get ddc i2c adapter\n");
 557                         return -EPROBE_DEFER;
 558                 }
 559         }
 560
 561         if (!channel->ddc) {
 562                 /* if no DDC available, fallback to hardcoded EDID */
 563                 dev_dbg(dev, "no ddc available\n");
 564
 565                 edidp = of_get_property(child, "edid",
 566                                         &channel->edid_len);
 567                 if (edidp) {
 568                         channel->edid = kmemdup(edidp,
 569                                                 channel->edid_len,
 570                                                 GFP_KERNEL);
 571                 } else if (!channel->panel) {
 572                         /* fallback to display-timings node */
 573                         ret = of_get_drm_display_mode(child,
 574                                                       &channel->mode,
 575                                                       &channel->bus_flags,
 576                                                       OF_USE_NATIVE_MODE);
 577                         if (!ret)
 578                                 channel->mode_valid = 1;
 579                 }
 580         }
 581         return 0;
 582 }
 583
 584 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 585 {
 586         struct drm_device *drm = data;
 587         struct device_node *np = dev->of_node;
 588         const struct of_device_id *of_id =
 589                         of_match_device(imx_ldb_dt_ids, dev);
 590         struct device_node *child;
 591         struct imx_ldb *imx_ldb;
 592         int dual;
 593         int ret;
 594         int i;
 595
 596         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 597         if (!imx_ldb)
 598                 return -ENOMEM;
 599
 600         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 601         if (IS_ERR(imx_ldb->regmap)) {
 602                 dev_err(dev, "failed to get parent regmap\n");
 603                 return PTR_ERR(imx_ldb->regmap);
 604         }
 605
 606         /* disable LDB by resetting the control register to POR default */
 607         regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
 608
 609         imx_ldb->dev = dev;
 610
 611         if (of_id)
 612                 imx_ldb->lvds_mux = of_id->data;
 613
 614         dual = of_property_read_bool(np, "fsl,dual-channel");
 615         if (dual)
 616                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 617
 618         /*
 619          * There are three different possible clock mux configurations:
 620          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 621          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 622          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 623          * Map them all to di0_sel...di3_sel.
 624          */
 625         for (i = 0; i < 4; i++) {
 626                 char clkname[16];
 627
 628                 sprintf(clkname, "di%d_sel", i);
 629                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 630                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 631                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 632                         imx_ldb->clk_sel[i] = NULL;
 633                         break;
 634                 }
 635
 636                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 637         }
 638         if (i == 0)
 639                 return ret;
 640
 641         for_each_child_of_node(np, child) {
 642                 struct imx_ldb_channel *channel;
 643                 int bus_format;
 644
 645                 ret = of_property_read_u32(child, "reg", &i);
 646                 if (ret || i < 0 || i > 1) {
 647                         ret = -EINVAL;
 648                         goto free_child;
 649                 }
 650
 651                 if (!of_device_is_available(child))
 652                         continue;
 653
 654                 if (dual && i > 0) {
 655                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 656                         continue;
 657                 }
 658
 659                 channel = &imx_ldb->channel[i];
 660                 channel->ldb = imx_ldb;
 661                 channel->chno = i;
 662
 663                 /*
 664                  * The output port is port@4 with an external 4-port mux or
 665                  * port@2 with the internal 2-port mux.
 666                  */
 667                 ret = drm_of_find_panel_or_bridge(child,
 668                                                   imx_ldb->lvds_mux ? 4 : 2, 0,
 669                                                   &channel->panel, &channel->bridge);
 670                 if (ret && ret != -ENODEV)
 671                         goto free_child;
 672
 673                 /* panel ddc only if there is no bridge */
 674                 if (!channel->bridge) {
 675                         ret = imx_ldb_panel_ddc(dev, channel, child);
 676                         if (ret)
 677                                 goto free_child;
 678                 }
 679
 680                 bus_format = of_get_bus_format(dev, child);
 681                 if (bus_format == -EINVAL) {
 682                         /*
 683                          * If no bus format was specified in the device tree,
 684                          * we can still get it from the connected panel later.
 685                          */
 686                         if (channel->panel && channel->panel->funcs &&
 687                             channel->panel->funcs->get_modes)
 688                                 bus_format = 0;
 689                 }
 690                 if (bus_format < 0) {
 691                         dev_err(dev, "could not determine data mapping: %d\n",
 692                                 bus_format);
 693                         ret = bus_format;
 694                         goto free_child;
 695                 }
 696                 channel->bus_format = bus_format;
 697                 channel->child = child;
 698
 699                 ret = imx_ldb_register(drm, channel);
 700                 if (ret) {
 701                         channel->child = NULL;
 702                         goto free_child;
 703                 }
 704         }
 705
 706         dev_set_drvdata(dev, imx_ldb);
 707
 708         return 0;
 709
 710 free_child:
 711         of_node_put(child);
 712         return ret;
 713 }
 714
 715 static void imx_ldb_unbind(struct device *dev, struct device *master,
 716         void *data)
 717 {
 718         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 719         int i;
 720
 721         for (i = 0; i < 2; i++) {
 722                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 723
 724                 if (channel->panel)
 725                         drm_panel_detach(channel->panel);
 726
 727                 kfree(channel->edid);
 728                 i2c_put_adapter(channel->ddc);
 729         }
 730 }
 731
 732 static const struct component_ops imx_ldb_ops = {
 733         .bind   = imx_ldb_bind,
 734         .unbind = imx_ldb_unbind,
 735 };
 736
 737 static int imx_ldb_probe(struct platform_device *pdev)
 738 {
 739         return component_add(&pdev->dev, &imx_ldb_ops);
 740 }
 741
 742 static int imx_ldb_remove(struct platform_device *pdev)
 743 {
 744         component_del(&pdev->dev, &imx_ldb_ops);
 745         return 0;
 746 }
 747
 748 static struct platform_driver imx_ldb_driver = {
 749         .probe          = imx_ldb_probe,
 750         .remove         = imx_ldb_remove,
 751         .driver         = {
 752                 .of_match_table = imx_ldb_dt_ids,
 753                 .name   = DRIVER_NAME,
 754         },
 755 };
 756
 757 module_platform_driver(imx_ldb_driver);
 758
 759 MODULE_DESCRIPTION("i.MX LVDS driver");
 760 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 761 MODULE_LICENSE("GPL");
 762 MODULE_ALIAS("platform:" DRIVER_NAME);