drivers/gpu/drm/imx/imx-ldb.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX drm driver - LVDS display bridge
   4  *
   5  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/component.h>
  10 #include <linux/mfd/syscon.h>
  11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  12 #include <linux/module.h>
  13 #include <linux/of_device.h>
  14 #include <linux/of_graph.h>
  15 #include <linux/regmap.h>
  16 #include <linux/videodev2.h>
  17
  18 #include <video/of_display_timing.h>
  19 #include <video/of_videomode.h>
  20
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_fb_helper.h>
  24 #include <drm/drm_of.h>
  25 #include <drm/drm_panel.h>
  26 #include <drm/drm_print.h>
  27 #include <drm/drm_probe_helper.h>
  28
  29 #include "imx-drm.h"
  30
  31 #define DRIVER_NAME "imx-ldb"
  32
  33 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  34 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  35 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  36 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  37 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  38 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  39 #define LDB_SPLIT_MODE_EN               (1 << 4)
  40 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  41 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  42 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  43 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  44 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  45 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  46 #define LDB_BGREF_RMODE_INT             (1 << 15)
  47
  48 struct imx_ldb;
  49
  50 struct imx_ldb_channel {
  51         struct imx_ldb *ldb;
  52         struct drm_connector connector;
  53         struct drm_encoder encoder;
  54
  55         /* Defines what is connected to the ldb, only one at a time */
  56         struct drm_panel *panel;
  57         struct drm_bridge *bridge;
  58
  59         struct device_node *child;
  60         struct i2c_adapter *ddc;
  61         int chno;
  62         void *edid;
  63         int edid_len;
  64         struct drm_display_mode mode;
  65         int mode_valid;
  66         u32 bus_format;
  67         u32 bus_flags;
  68 };
  69
  70 static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
  71 {
  72         return container_of(c, struct imx_ldb_channel, connector);
  73 }
  74
  75 static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
  76 {
  77         return container_of(e, struct imx_ldb_channel, encoder);
  78 }
  79
  80 struct bus_mux {
  81         int reg;
  82         int shift;
  83         int mask;
  84 };
  85
  86 struct imx_ldb {
  87         struct regmap *regmap;
  88         struct device *dev;
  89         struct imx_ldb_channel channel[2];
  90         struct clk *clk[2]; /* our own clock */
  91         struct clk *clk_sel[4]; /* parent of display clock */
  92         struct clk *clk_parent[4]; /* original parent of clk_sel */
  93         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  94         u32 ldb_ctrl;
  95         const struct bus_mux *lvds_mux;
  96 };
  97
  98 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
  99                                       u32 bus_format)
 100 {
 101         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 102         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 103
 104         switch (bus_format) {
 105         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 106                 break;
 107         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 108                 if (imx_ldb_ch->chno == 0 || dual)
 109                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 110                 if (imx_ldb_ch->chno == 1 || dual)
 111                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 112                 break;
 113         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 114                 if (imx_ldb_ch->chno == 0 || dual)
 115                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 116                                          LDB_BIT_MAP_CH0_JEIDA;
 117                 if (imx_ldb_ch->chno == 1 || dual)
 118                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 119                                          LDB_BIT_MAP_CH1_JEIDA;
 120                 break;
 121         }
 122 }
 123
 124 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
 125 {
 126         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 127         int num_modes = 0;
 128
 129         if (imx_ldb_ch->panel && imx_ldb_ch->panel->funcs &&
 130             imx_ldb_ch->panel->funcs->get_modes) {
 131                 num_modes = imx_ldb_ch->panel->funcs->get_modes(imx_ldb_ch->panel);
 132                 if (num_modes > 0)
 133                         return num_modes;
 134         }
 135
 136         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 137                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 138
 139         if (imx_ldb_ch->edid) {
 140                 drm_connector_update_edid_property(connector,
 141                                                         imx_ldb_ch->edid);
 142                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 143         }
 144
 145         if (imx_ldb_ch->mode_valid) {
 146                 struct drm_display_mode *mode;
 147
 148                 mode = drm_mode_create(connector->dev);
 149                 if (!mode)
 150                         return -EINVAL;
 151                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 152                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 153                 drm_mode_probed_add(connector, mode);
 154                 num_modes++;
 155         }
 156
 157         return num_modes;
 158 }
 159
 160 static struct drm_encoder *imx_ldb_connector_best_encoder(
 161                 struct drm_connector *connector)
 162 {
 163         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 164
 165         return &imx_ldb_ch->encoder;
 166 }
 167
 168 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 169                 unsigned long serial_clk, unsigned long di_clk)
 170 {
 171         int ret;
 172
 173         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 174                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 175         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 176
 177         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 178                         clk_get_rate(ldb->clk_pll[chno]));
 179
 180         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 181                         clk_get_rate(ldb->clk[chno]),
 182                         (long int)di_clk);
 183         clk_set_rate(ldb->clk[chno], di_clk);
 184
 185         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 186                         clk_get_rate(ldb->clk[chno]));
 187
 188         /* set display clock mux to LDB input clock */
 189         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 190         if (ret)
 191                 dev_err(ldb->dev,
 192                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 193                         chno);
 194 }
 195
 196 static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
 197 {
 198         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 199         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 200         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 201         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 202
 203         drm_panel_prepare(imx_ldb_ch->panel);
 204
 205         if (dual) {
 206                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
 207                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
 208
 209                 clk_prepare_enable(ldb->clk[0]);
 210                 clk_prepare_enable(ldb->clk[1]);
 211         } else {
 212                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
 213         }
 214
 215         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 216                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 217                 if (mux == 0 || ldb->lvds_mux)
 218                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 219                 else if (mux == 1)
 220                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 221         }
 222         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 223                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 224                 if (mux == 1 || ldb->lvds_mux)
 225                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 226                 else if (mux == 0)
 227                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 228         }
 229
 230         if (ldb->lvds_mux) {
 231                 const struct bus_mux *lvds_mux = NULL;
 232
 233                 if (imx_ldb_ch == &ldb->channel[0])
 234                         lvds_mux = &ldb->lvds_mux[0];
 235                 else if (imx_ldb_ch == &ldb->channel[1])
 236                         lvds_mux = &ldb->lvds_mux[1];
 237
 238                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 239                                    mux << lvds_mux->shift);
 240         }
 241
 242         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 243
 244         drm_panel_enable(imx_ldb_ch->panel);
 245 }
 246
 247 static void
 248 imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
 249                                 struct drm_crtc_state *crtc_state,
 250                                 struct drm_connector_state *connector_state)
 251 {
 252         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 253         struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 254         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 255         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 256         unsigned long serial_clk;
 257         unsigned long di_clk = mode->clock * 1000;
 258         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 259         u32 bus_format = imx_ldb_ch->bus_format;
 260
 261         if (mode->clock > 170000) {
 262                 dev_warn(ldb->dev,
 263                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 264         }
 265         if (mode->clock > 85000 && !dual) {
 266                 dev_warn(ldb->dev,
 267                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 268         }
 269
 270         if (dual) {
 271                 serial_clk = 3500UL * mode->clock;
 272                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 273                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 274         } else {
 275                 serial_clk = 7000UL * mode->clock;
 276                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 277                                   di_clk);
 278         }
 279
 280         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 281         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 282                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 283                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 284                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 285                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 286         }
 287         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 288                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 289                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 290                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 291                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 292         }
 293
 294         if (!bus_format) {
 295                 struct drm_connector *connector = connector_state->connector;
 296                 struct drm_display_info *di = &connector->display_info;
 297
 298                 if (di->num_bus_formats)
 299                         bus_format = di->bus_formats[0];
 300         }
 301         imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
 302 }
 303
 304 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 305 {
 306         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 307         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 308         int mux, ret;
 309
 310         drm_panel_disable(imx_ldb_ch->panel);
 311
 312         if (imx_ldb_ch == &ldb->channel[0])
 313                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 314         else if (imx_ldb_ch == &ldb->channel[1])
 315                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 316
 317         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 318
 319         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 320                 clk_disable_unprepare(ldb->clk[0]);
 321                 clk_disable_unprepare(ldb->clk[1]);
 322         }
 323
 324         if (ldb->lvds_mux) {
 325                 const struct bus_mux *lvds_mux = NULL;
 326
 327                 if (imx_ldb_ch == &ldb->channel[0])
 328                         lvds_mux = &ldb->lvds_mux[0];
 329                 else if (imx_ldb_ch == &ldb->channel[1])
 330                         lvds_mux = &ldb->lvds_mux[1];
 331
 332                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 333                 mux &= lvds_mux->mask;
 334                 mux >>= lvds_mux->shift;
 335         } else {
 336                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 337         }
 338
 339         /* set display clock mux back to original input clock */
 340         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 341         if (ret)
 342                 dev_err(ldb->dev,
 343                         "unable to set di%d parent clock to original parent\n",
 344                         mux);
 345
 346         drm_panel_unprepare(imx_ldb_ch->panel);
 347 }
 348
 349 static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 350                                         struct drm_crtc_state *crtc_state,
 351                                         struct drm_connector_state *conn_state)
 352 {
 353         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
 354         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 355         struct drm_display_info *di = &conn_state->connector->display_info;
 356         u32 bus_format = imx_ldb_ch->bus_format;
 357
 358         /* Bus format description in DT overrides connector display info. */
 359         if (!bus_format && di->num_bus_formats) {
 360                 bus_format = di->bus_formats[0];
 361                 imx_crtc_state->bus_flags = di->bus_flags;
 362         } else {
 363                 bus_format = imx_ldb_ch->bus_format;
 364                 imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
 365         }
 366         switch (bus_format) {
 367         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 368                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 369                 break;
 370         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 371         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 372                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 373                 break;
 374         default:
 375                 return -EINVAL;
 376         }
 377
 378         imx_crtc_state->di_hsync_pin = 2;
 379         imx_crtc_state->di_vsync_pin = 3;
 380
 381         return 0;
 382 }
 383
 384
 385 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 386         .fill_modes = drm_helper_probe_single_connector_modes,
 387         .destroy = imx_drm_connector_destroy,
 388         .reset = drm_atomic_helper_connector_reset,
 389         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 390         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 391 };
 392
 393 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 394         .get_modes = imx_ldb_connector_get_modes,
 395         .best_encoder = imx_ldb_connector_best_encoder,
 396 };
 397
 398 static const struct drm_encoder_funcs imx_ldb_encoder_funcs = {
 399         .destroy = imx_drm_encoder_destroy,
 400 };
 401
 402 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 403         .atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
 404         .enable = imx_ldb_encoder_enable,
 405         .disable = imx_ldb_encoder_disable,
 406         .atomic_check = imx_ldb_encoder_atomic_check,
 407 };
 408
 409 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 410 {
 411         char clkname[16];
 412
 413         snprintf(clkname, sizeof(clkname), "di%d", chno);
 414         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 415         if (IS_ERR(ldb->clk[chno]))
 416                 return PTR_ERR(ldb->clk[chno]);
 417
 418         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 419         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 420
 421         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 422 }
 423
 424 static int imx_ldb_register(struct drm_device *drm,
 425         struct imx_ldb_channel *imx_ldb_ch)
 426 {
 427         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 428         struct drm_encoder *encoder = &imx_ldb_ch->encoder;
 429         int ret;
 430
 431         ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
 432         if (ret)
 433                 return ret;
 434
 435         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 436         if (ret)
 437                 return ret;
 438
 439         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 440                 ret = imx_ldb_get_clk(ldb, 1);
 441                 if (ret)
 442                         return ret;
 443         }
 444
 445         drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
 446         drm_encoder_init(drm, encoder, &imx_ldb_encoder_funcs,
 447                          DRM_MODE_ENCODER_LVDS, NULL);
 448
 449         if (imx_ldb_ch->bridge) {
 450                 ret = drm_bridge_attach(&imx_ldb_ch->encoder,
 451                                         imx_ldb_ch->bridge, NULL);
 452                 if (ret) {
 453                         DRM_ERROR("Failed to initialize bridge with drm\n");
 454                         return ret;
 455                 }
 456         } else {
 457                 /*
 458                  * We want to add the connector whenever there is no bridge
 459                  * that brings its own, not only when there is a panel. For
 460                  * historical reasons, the ldb driver can also work without
 461                  * a panel.
 462                  */
 463                 drm_connector_helper_add(&imx_ldb_ch->connector,
 464                                 &imx_ldb_connector_helper_funcs);
 465                 drm_connector_init(drm, &imx_ldb_ch->connector,
 466                                 &imx_ldb_connector_funcs,
 467                                 DRM_MODE_CONNECTOR_LVDS);
 468                 drm_connector_attach_encoder(&imx_ldb_ch->connector, encoder);
 469         }
 470
 471         if (imx_ldb_ch->panel) {
 472                 ret = drm_panel_attach(imx_ldb_ch->panel,
 473                                        &imx_ldb_ch->connector);
 474                 if (ret)
 475                         return ret;
 476         }
 477
 478         return 0;
 479 }
 480
 481 enum {
 482         LVDS_BIT_MAP_SPWG,
 483         LVDS_BIT_MAP_JEIDA
 484 };
 485
 486 struct imx_ldb_bit_mapping {
 487         u32 bus_format;
 488         u32 datawidth;
 489         const char * const mapping;
 490 };
 491
 492 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 493         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 494         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 495         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 496 };
 497
 498 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 499 {
 500         const char *bm;
 501         u32 datawidth = 0;
 502         int ret, i;
 503
 504         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 505         if (ret < 0)
 506                 return ret;
 507
 508         of_property_read_u32(np, "fsl,data-width", &datawidth);
 509
 510         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 511                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 512                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 513                         return imx_ldb_bit_mappings[i].bus_format;
 514         }
 515
 516         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 517
 518         return -ENOENT;
 519 }
 520
 521 static struct bus_mux imx6q_lvds_mux[2] = {
 522         {
 523                 .reg = IOMUXC_GPR3,
 524                 .shift = 6,
 525                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 526         }, {
 527                 .reg = IOMUXC_GPR3,
 528                 .shift = 8,
 529                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 530         }
 531 };
 532
 533 /*
 534  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 535  * of_match_device will walk through this list and take the first entry
 536  * matching any of its compatible values. Therefore, the more generic
 537  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 538  */
 539 static const struct of_device_id imx_ldb_dt_ids[] = {
 540         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 541         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 542         { }
 543 };
 544 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 545
 546 static int imx_ldb_panel_ddc(struct device *dev,
 547                 struct imx_ldb_channel *channel, struct device_node *child)
 548 {
 549         struct device_node *ddc_node;
 550         const u8 *edidp;
 551         int ret;
 552
 553         ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 554         if (ddc_node) {
 555                 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 556                 of_node_put(ddc_node);
 557                 if (!channel->ddc) {
 558                         dev_warn(dev, "failed to get ddc i2c adapter\n");
 559                         return -EPROBE_DEFER;
 560                 }
 561         }
 562
 563         if (!channel->ddc) {
 564                 /* if no DDC available, fallback to hardcoded EDID */
 565                 dev_dbg(dev, "no ddc available\n");
 566
 567                 edidp = of_get_property(child, "edid",
 568                                         &channel->edid_len);
 569                 if (edidp) {
 570                         channel->edid = kmemdup(edidp,
 571                                                 channel->edid_len,
 572                                                 GFP_KERNEL);
 573                 } else if (!channel->panel) {
 574                         /* fallback to display-timings node */
 575                         ret = of_get_drm_display_mode(child,
 576                                                       &channel->mode,
 577                                                       &channel->bus_flags,
 578                                                       OF_USE_NATIVE_MODE);
 579                         if (!ret)
 580                                 channel->mode_valid = 1;
 581                 }
 582         }
 583         return 0;
 584 }
 585
 586 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 587 {
 588         struct drm_device *drm = data;
 589         struct device_node *np = dev->of_node;
 590         const struct of_device_id *of_id =
 591                         of_match_device(imx_ldb_dt_ids, dev);
 592         struct device_node *child;
 593         struct imx_ldb *imx_ldb;
 594         int dual;
 595         int ret;
 596         int i;
 597
 598         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 599         if (!imx_ldb)
 600                 return -ENOMEM;
 601
 602         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 603         if (IS_ERR(imx_ldb->regmap)) {
 604                 dev_err(dev, "failed to get parent regmap\n");
 605                 return PTR_ERR(imx_ldb->regmap);
 606         }
 607
 608         /* disable LDB by resetting the control register to POR default */
 609         regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
 610
 611         imx_ldb->dev = dev;
 612
 613         if (of_id)
 614                 imx_ldb->lvds_mux = of_id->data;
 615
 616         dual = of_property_read_bool(np, "fsl,dual-channel");
 617         if (dual)
 618                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 619
 620         /*
 621          * There are three different possible clock mux configurations:
 622          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 623          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 624          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 625          * Map them all to di0_sel...di3_sel.
 626          */
 627         for (i = 0; i < 4; i++) {
 628                 char clkname[16];
 629
 630                 sprintf(clkname, "di%d_sel", i);
 631                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 632                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 633                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 634                         imx_ldb->clk_sel[i] = NULL;
 635                         break;
 636                 }
 637
 638                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 639         }
 640         if (i == 0)
 641                 return ret;
 642
 643         for_each_child_of_node(np, child) {
 644                 struct imx_ldb_channel *channel;
 645                 int bus_format;
 646
 647                 ret = of_property_read_u32(child, "reg", &i);
 648                 if (ret || i < 0 || i > 1) {
 649                         ret = -EINVAL;
 650                         goto free_child;
 651                 }
 652
 653                 if (!of_device_is_available(child))
 654                         continue;
 655
 656                 if (dual && i > 0) {
 657                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 658                         continue;
 659                 }
 660
 661                 channel = &imx_ldb->channel[i];
 662                 channel->ldb = imx_ldb;
 663                 channel->chno = i;
 664
 665                 /*
 666                  * The output port is port@4 with an external 4-port mux or
 667                  * port@2 with the internal 2-port mux.
 668                  */
 669                 ret = drm_of_find_panel_or_bridge(child,
 670                                                   imx_ldb->lvds_mux ? 4 : 2, 0,
 671                                                   &channel->panel, &channel->bridge);
 672                 if (ret && ret != -ENODEV)
 673                         goto free_child;
 674
 675                 /* panel ddc only if there is no bridge */
 676                 if (!channel->bridge) {
 677                         ret = imx_ldb_panel_ddc(dev, channel, child);
 678                         if (ret)
 679                                 goto free_child;
 680                 }
 681
 682                 bus_format = of_get_bus_format(dev, child);
 683                 if (bus_format == -EINVAL) {
 684                         /*
 685                          * If no bus format was specified in the device tree,
 686                          * we can still get it from the connected panel later.
 687                          */
 688                         if (channel->panel && channel->panel->funcs &&
 689                             channel->panel->funcs->get_modes)
 690                                 bus_format = 0;
 691                 }
 692                 if (bus_format < 0) {
 693                         dev_err(dev, "could not determine data mapping: %d\n",
 694                                 bus_format);
 695                         ret = bus_format;
 696                         goto free_child;
 697                 }
 698                 channel->bus_format = bus_format;
 699                 channel->child = child;
 700
 701                 ret = imx_ldb_register(drm, channel);
 702                 if (ret) {
 703                         channel->child = NULL;
 704                         goto free_child;
 705                 }
 706         }
 707
 708         dev_set_drvdata(dev, imx_ldb);
 709
 710         return 0;
 711
 712 free_child:
 713         of_node_put(child);
 714         return ret;
 715 }
 716
 717 static void imx_ldb_unbind(struct device *dev, struct device *master,
 718         void *data)
 719 {
 720         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 721         int i;
 722
 723         for (i = 0; i < 2; i++) {
 724                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 725
 726                 if (channel->panel)
 727                         drm_panel_detach(channel->panel);
 728
 729                 kfree(channel->edid);
 730                 i2c_put_adapter(channel->ddc);
 731         }
 732 }
 733
 734 static const struct component_ops imx_ldb_ops = {
 735         .bind   = imx_ldb_bind,
 736         .unbind = imx_ldb_unbind,
 737 };
 738
 739 static int imx_ldb_probe(struct platform_device *pdev)
 740 {
 741         return component_add(&pdev->dev, &imx_ldb_ops);
 742 }
 743
 744 static int imx_ldb_remove(struct platform_device *pdev)
 745 {
 746         component_del(&pdev->dev, &imx_ldb_ops);
 747         return 0;
 748 }
 749
 750 static struct platform_driver imx_ldb_driver = {
 751         .probe          = imx_ldb_probe,
 752         .remove         = imx_ldb_remove,
 753         .driver         = {
 754                 .of_match_table = imx_ldb_dt_ids,
 755                 .name   = DRIVER_NAME,
 756         },
 757 };
 758
 759 module_platform_driver(imx_ldb_driver);
 760
 761 MODULE_DESCRIPTION("i.MX LVDS driver");
 762 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 763 MODULE_LICENSE("GPL");
 764 MODULE_ALIAS("platform:" DRIVER_NAME);