2 * Copyright 2010 Matt Turner.
3 * Copyright 2012 Red Hat
5 * This file is subject to the terms and conditions of the GNU General
6 * Public License version 2. See the file COPYING in the main
7 * directory of this archive for more details.
9 * Authors: Matthew Garrett
13 #ifndef __MGAG200_DRV_H__
14 #define __MGAG200_DRV_H__
16 #include <video/vga.h>
18 #include <drm/drm_encoder.h>
19 #include <drm/drm_fb_helper.h>
20 #include <drm/ttm/ttm_bo_api.h>
21 #include <drm/ttm/ttm_bo_driver.h>
22 #include <drm/ttm/ttm_placement.h>
23 #include <drm/ttm/ttm_memory.h>
24 #include <drm/ttm/ttm_module.h>
26 #include <drm/drm_gem.h>
27 #include <drm/drm_gem_vram_helper.h>
29 #include <linux/i2c.h>
30 #include <linux/i2c-algo-bit.h>
32 #include "mgag200_reg.h"
34 #define DRIVER_AUTHOR "Matthew Garrett"
36 #define DRIVER_NAME "mgag200"
37 #define DRIVER_DESC "MGA G200 SE"
38 #define DRIVER_DATE "20110418"
40 #define DRIVER_MAJOR 1
41 #define DRIVER_MINOR 0
42 #define DRIVER_PATCHLEVEL 0
44 #define MGAG200FB_CONN_LIMIT 1
46 #define RREG8(reg) ioread8(((void __iomem *)mdev->rmmio) + (reg))
47 #define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev->rmmio) + (reg))
48 #define RREG32(reg) ioread32(((void __iomem *)mdev->rmmio) + (reg))
49 #define WREG32(reg, v) iowrite32(v, ((void __iomem *)mdev->rmmio) + (reg))
51 #define ATTR_INDEX 0x1fc0
52 #define ATTR_DATA 0x1fc1
54 #define WREG_ATTR(reg, v) \
57 WREG8(ATTR_INDEX, reg); \
58 WREG8(ATTR_DATA, v); \
61 #define WREG_SEQ(reg, v) \
63 WREG8(MGAREG_SEQ_INDEX, reg); \
64 WREG8(MGAREG_SEQ_DATA, v); \
67 #define WREG_CRT(reg, v) \
69 WREG8(MGAREG_CRTC_INDEX, reg); \
70 WREG8(MGAREG_CRTC_DATA, v); \
74 #define WREG_ECRT(reg, v) \
76 WREG8(MGAREG_CRTCEXT_INDEX, reg); \
77 WREG8(MGAREG_CRTCEXT_DATA, v); \
80 #define GFX_INDEX 0x1fce
81 #define GFX_DATA 0x1fcf
83 #define WREG_GFX(reg, v) \
85 WREG8(GFX_INDEX, reg); \
89 #define DAC_INDEX 0x3c00
90 #define DAC_DATA 0x3c0a
92 #define WREG_DAC(reg, v) \
94 WREG8(DAC_INDEX, reg); \
98 #define MGA_MISC_OUT 0x1fc2
99 #define MGA_MISC_IN 0x1fcc
101 #define MGAG200_MAX_FB_HEIGHT 4096
102 #define MGAG200_MAX_FB_WIDTH 4096
104 #define MATROX_DPMS_CLEARED (-1)
106 #define to_mga_crtc(x) container_of(x, struct mga_crtc, base)
107 #define to_mga_encoder(x) container_of(x, struct mga_encoder, base)
108 #define to_mga_connector(x) container_of(x, struct mga_connector, base)
109 #define to_mga_framebuffer(x) container_of(x, struct mga_framebuffer, base)
111 struct mga_framebuffer {
112 struct drm_framebuffer base;
113 struct drm_gem_object *obj;
117 struct drm_fb_helper helper; /* must be first */
118 struct mga_framebuffer mfb;
121 struct ttm_bo_kmap_obj mapping;
122 int x1, y1, x2, y2; /* dirty rect */
123 spinlock_t dirty_lock;
127 struct drm_crtc base;
128 u8 lut_r[256], lut_g[256], lut_b[256];
133 struct mga_mode_info {
134 bool mode_config_initialized;
135 struct mga_crtc *crtc;
139 struct drm_encoder base;
144 struct mga_i2c_chan {
145 struct i2c_adapter adapter;
146 struct drm_device *dev;
147 struct i2c_algo_bit_data bit;
151 struct mga_connector {
152 struct drm_connector base;
153 struct mga_i2c_chan *i2c;
158 We have to have 2 buffers for the cursor to avoid occasional
159 corruption while switching cursor icons.
160 If either of these is NULL, then don't do hardware cursors, and
161 fall back to software.
163 struct drm_gem_vram_object *pixels_1;
164 struct drm_gem_vram_object *pixels_2;
165 u64 pixels_1_gpu_addr, pixels_2_gpu_addr;
166 /* The currently displayed icon, this points to one of pixels_1, or pixels_2 */
167 struct drm_gem_vram_object *pixels_current;
168 /* The previously displayed icon */
169 struct drm_gem_vram_object *pixels_prev;
173 resource_size_t vram_size;
174 resource_size_t vram_base;
175 resource_size_t vram_window;
189 #define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
192 struct drm_device *dev;
195 resource_size_t rmmio_base;
196 resource_size_t rmmio_size;
200 struct mga_mode_info mode_info;
202 struct mga_fbdev *mfbdev;
203 struct mga_cursor cursor;
209 struct drm_display_mode mode;
216 struct ttm_bo_device bdev;
219 /* SE model number stored in reg 0x1e24 */
224 int mgag200_modeset_init(struct mga_device *mdev);
225 void mgag200_modeset_fini(struct mga_device *mdev);
228 int mgag200_fbdev_init(struct mga_device *mdev);
229 void mgag200_fbdev_fini(struct mga_device *mdev);
232 int mgag200_framebuffer_init(struct drm_device *dev,
233 struct mga_framebuffer *mfb,
234 const struct drm_mode_fb_cmd2 *mode_cmd,
235 struct drm_gem_object *obj);
238 int mgag200_driver_load(struct drm_device *dev, unsigned long flags);
239 void mgag200_driver_unload(struct drm_device *dev);
240 int mgag200_gem_create(struct drm_device *dev,
241 u32 size, bool iskernel,
242 struct drm_gem_object **obj);
243 int mgag200_dumb_create(struct drm_file *file,
244 struct drm_device *dev,
245 struct drm_mode_create_dumb *args);
248 struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev);
249 void mgag200_i2c_destroy(struct mga_i2c_chan *i2c);
251 int mgag200_mm_init(struct mga_device *mdev);
252 void mgag200_mm_fini(struct mga_device *mdev);
253 int mgag200_mmap(struct file *filp, struct vm_area_struct *vma);
255 int mga_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
256 uint32_t handle, uint32_t width, uint32_t height);
257 int mga_crtc_cursor_move(struct drm_crtc *crtc, int x, int y);
259 #endif /* __MGAG200_DRV_H__ */